2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/skbuff.h>
22 #include <linux/if_ether.h>
23 #include <linux/spinlock.h>
24 #include <net/mac80211.h>
27 * The key cache is used for h/w cipher state and also for
28 * tracking station state such as the current tx antenna.
29 * We also setup a mapping table between key cache slot indices
30 * and station state to short-circuit node lookups on rx.
31 * Different parts have different size key caches. We handle
32 * up to ATH_KEYMAX entries (could dynamically allocate state).
34 #define ATH_KEYMAX 128 /* max key cache size we handle */
36 static const u8 ath_bcast_mac
[ETH_ALEN
] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
40 unsigned int longcal_timer
;
41 unsigned int shortcal_timer
;
42 unsigned int resetcal_timer
;
43 unsigned int checkani_timer
;
44 struct timer_list timer
;
47 struct ath_cycle_counters
{
54 enum ath_device_state
{
75 struct reg_dmn_pair_mapping
{
81 struct ath_regulatory
{
87 struct reg_dmn_pair_mapping
*regpair
;
91 ATH_CRYPT_CAP_CIPHER_AESCCM
= BIT(0),
92 ATH_CRYPT_CAP_MIC_COMBINED
= BIT(1),
99 u8 kv_val
[16]; /* TK */
100 u8 kv_mic
[8]; /* Michael MIC key */
101 u8 kv_txmic
[8]; /* Michael MIC TX key (used only if the hardware
102 * supports both MIC keys in the same key cache entry;
103 * in that case, kv_mic is the RX key) */
108 ATH_CIPHER_AES_OCB
= 1,
109 ATH_CIPHER_AES_CCM
= 2,
117 * struct ath_ops - Register read/write operations
119 * @read: Register read
120 * @multi_read: Multiple register read
121 * @write: Register write
122 * @enable_write_buffer: Enable multiple register writes
123 * @write_flush: flush buffered register writes and disable buffering
126 unsigned int (*read
)(void *, u32 reg_offset
);
127 void (*multi_read
)(void *, u32
*addr
, u32
*val
, u16 count
);
128 void (*write
)(void *, u32 val
, u32 reg_offset
);
129 void (*enable_write_buffer
)(void *);
130 void (*write_flush
) (void *);
131 u32 (*rmw
)(void *, u32 reg_offset
, u32 set
, u32 clr
);
140 struct ieee80211_hw
*hw
;
142 enum ath_device_state state
;
143 unsigned long op_flags
;
149 u8 macaddr
[ETH_ALEN
];
150 u8 curbssid
[ETH_ALEN
] __aligned(2);
151 u8 bssidmask
[ETH_ALEN
];
156 DECLARE_BITMAP(keymap
, ATH_KEYMAX
);
157 DECLARE_BITMAP(tkip_keymap
, ATH_KEYMAX
);
158 DECLARE_BITMAP(ccmp_keymap
, ATH_KEYMAX
);
159 enum ath_crypt_caps crypt_caps
;
161 unsigned int clockrate
;
164 struct ath_cycle_counters cc_ani
;
165 struct ath_cycle_counters cc_survey
;
167 struct ath_regulatory regulatory
;
168 struct ath_regulatory reg_world_copy
;
169 const struct ath_ops
*ops
;
170 const struct ath_bus_ops
*bus_ops
;
174 bool bt_ant_diversity
;
177 struct ieee80211_supported_band sbands
[IEEE80211_NUM_BANDS
];
180 struct sk_buff
*ath_rxbuf_alloc(struct ath_common
*common
,
183 bool ath_is_mybeacon(struct ath_common
*common
, struct ieee80211_hdr
*hdr
);
185 void ath_hw_setbssidmask(struct ath_common
*common
);
186 void ath_key_delete(struct ath_common
*common
, struct ieee80211_key_conf
*key
);
187 int ath_key_config(struct ath_common
*common
,
188 struct ieee80211_vif
*vif
,
189 struct ieee80211_sta
*sta
,
190 struct ieee80211_key_conf
*key
);
191 bool ath_hw_keyreset(struct ath_common
*common
, u16 entry
);
192 void ath_hw_cycle_counters_update(struct ath_common
*common
);
193 int32_t ath_hw_get_listen_time(struct ath_common
*common
);
196 void ath_printk(const char *level
, const struct ath_common
*common
,
197 const char *fmt
, ...);
199 #define ath_emerg(common, fmt, ...) \
200 ath_printk(KERN_EMERG, common, fmt, ##__VA_ARGS__)
201 #define ath_alert(common, fmt, ...) \
202 ath_printk(KERN_ALERT, common, fmt, ##__VA_ARGS__)
203 #define ath_crit(common, fmt, ...) \
204 ath_printk(KERN_CRIT, common, fmt, ##__VA_ARGS__)
205 #define ath_err(common, fmt, ...) \
206 ath_printk(KERN_ERR, common, fmt, ##__VA_ARGS__)
207 #define ath_warn(common, fmt, ...) \
208 ath_printk(KERN_WARNING, common, fmt, ##__VA_ARGS__)
209 #define ath_notice(common, fmt, ...) \
210 ath_printk(KERN_NOTICE, common, fmt, ##__VA_ARGS__)
211 #define ath_info(common, fmt, ...) \
212 ath_printk(KERN_INFO, common, fmt, ##__VA_ARGS__)
215 * enum ath_debug_level - atheros wireless debug level
217 * @ATH_DBG_RESET: reset processing
218 * @ATH_DBG_QUEUE: hardware queue management
219 * @ATH_DBG_EEPROM: eeprom processing
220 * @ATH_DBG_CALIBRATE: periodic calibration
221 * @ATH_DBG_INTERRUPT: interrupt processing
222 * @ATH_DBG_REGULATORY: regulatory processing
223 * @ATH_DBG_ANI: adaptive noise immunitive processing
224 * @ATH_DBG_XMIT: basic xmit operation
225 * @ATH_DBG_BEACON: beacon handling
226 * @ATH_DBG_CONFIG: configuration of the hardware
227 * @ATH_DBG_FATAL: fatal errors, this is the default, DBG_DEFAULT
228 * @ATH_DBG_PS: power save processing
229 * @ATH_DBG_HWTIMER: hardware timer handling
230 * @ATH_DBG_BTCOEX: bluetooth coexistance
231 * @ATH_DBG_BSTUCK: stuck beacons
232 * @ATH_DBG_MCI: Message Coexistence Interface, a private protocol
233 * used exclusively for WLAN-BT coexistence starting from
235 * @ATH_DBG_DFS: radar datection
236 * @ATH_DBG_WOW: Wake on Wireless
237 * @ATH_DBG_DYNACK: dynack handling
238 * @ATH_DBG_ANY: enable all debugging
240 * The debug level is used to control the amount and type of debugging output
241 * we want to see. Each driver has its own method for enabling debugging and
242 * modifying debug level states -- but this is typically done through a
243 * module parameter 'debug' along with a respective 'debug' debugfs file
247 ATH_DBG_RESET
= 0x00000001,
248 ATH_DBG_QUEUE
= 0x00000002,
249 ATH_DBG_EEPROM
= 0x00000004,
250 ATH_DBG_CALIBRATE
= 0x00000008,
251 ATH_DBG_INTERRUPT
= 0x00000010,
252 ATH_DBG_REGULATORY
= 0x00000020,
253 ATH_DBG_ANI
= 0x00000040,
254 ATH_DBG_XMIT
= 0x00000080,
255 ATH_DBG_BEACON
= 0x00000100,
256 ATH_DBG_CONFIG
= 0x00000200,
257 ATH_DBG_FATAL
= 0x00000400,
258 ATH_DBG_PS
= 0x00000800,
259 ATH_DBG_BTCOEX
= 0x00001000,
260 ATH_DBG_WMI
= 0x00002000,
261 ATH_DBG_BSTUCK
= 0x00004000,
262 ATH_DBG_MCI
= 0x00008000,
263 ATH_DBG_DFS
= 0x00010000,
264 ATH_DBG_WOW
= 0x00020000,
265 ATH_DBG_CHAN_CTX
= 0x00040000,
266 ATH_DBG_DYNACK
= 0x00080000,
267 ATH_DBG_ANY
= 0xffffffff
270 #define ATH_DBG_DEFAULT (ATH_DBG_FATAL)
271 #define ATH_DBG_MAX_LEN 512
273 #ifdef CONFIG_ATH_DEBUG
275 #define ath_dbg(common, dbg_mask, fmt, ...) \
277 if ((common)->debug_mask & ATH_DBG_##dbg_mask) \
278 ath_printk(KERN_DEBUG, common, fmt, ##__VA_ARGS__); \
281 #define ATH_DBG_WARN(foo, arg...) WARN(foo, arg)
282 #define ATH_DBG_WARN_ON_ONCE(foo) WARN_ON_ONCE(foo)
286 static inline __attribute__ ((format (printf
, 3, 4)))
287 void _ath_dbg(struct ath_common
*common
, enum ATH_DEBUG dbg_mask
,
288 const char *fmt
, ...)
291 #define ath_dbg(common, dbg_mask, fmt, ...) \
292 _ath_dbg(common, ATH_DBG_##dbg_mask, fmt, ##__VA_ARGS__)
294 #define ATH_DBG_WARN(foo, arg...) do {} while (0)
295 #define ATH_DBG_WARN_ON_ONCE(foo) ({ \
296 int __ret_warn_once = !!(foo); \
297 unlikely(__ret_warn_once); \
300 #endif /* CONFIG_ATH_DEBUG */
302 /** Returns string describing opmode, or NULL if unknown mode. */
303 #ifdef CONFIG_ATH_DEBUG
304 const char *ath_opmode_to_string(enum nl80211_iftype opmode
);
306 static inline const char *ath_opmode_to_string(enum nl80211_iftype opmode
)