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ath10k: implement beacon template command
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #include <linux/skbuff.h>
19 #include <linux/ctype.h>
20
21 #include "core.h"
22 #include "htc.h"
23 #include "debug.h"
24 #include "wmi.h"
25 #include "wmi-tlv.h"
26 #include "mac.h"
27 #include "testmode.h"
28 #include "wmi-ops.h"
29
30 /* MAIN WMI cmd track */
31 static struct wmi_cmd_map wmi_cmd_map = {
32 .init_cmdid = WMI_INIT_CMDID,
33 .start_scan_cmdid = WMI_START_SCAN_CMDID,
34 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
35 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
36 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
37 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
38 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
39 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
40 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
41 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
42 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
43 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
44 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
45 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
46 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
47 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
48 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
49 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
50 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
51 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
52 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
53 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
54 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
55 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
56 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
57 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
58 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
59 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
60 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
61 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
62 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
63 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
64 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
65 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
66 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
67 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
68 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
69 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
70 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
71 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
72 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
73 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
74 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
75 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
76 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
77 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
78 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
79 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
80 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
81 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
82 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
83 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
84 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
85 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
86 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
87 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
88 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
89 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
90 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
91 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
92 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
93 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
94 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
95 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
96 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
97 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
98 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
99 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
100 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
101 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
102 .wlan_profile_set_hist_intvl_cmdid =
103 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
104 .wlan_profile_get_profile_data_cmdid =
105 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
106 .wlan_profile_enable_profile_id_cmdid =
107 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
108 .wlan_profile_list_profile_id_cmdid =
109 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
110 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
111 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
112 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
113 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
114 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
115 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
116 .wow_enable_disable_wake_event_cmdid =
117 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
118 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
119 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
120 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
121 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
122 .vdev_spectral_scan_configure_cmdid =
123 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
124 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
125 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
126 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
127 .network_list_offload_config_cmdid =
128 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
129 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
130 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
131 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
132 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
133 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
134 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
135 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
136 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
137 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
138 .echo_cmdid = WMI_ECHO_CMDID,
139 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
140 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
141 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
142 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
143 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
144 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
145 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
146 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
147 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
148 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
149 };
150
151 /* 10.X WMI cmd track */
152 static struct wmi_cmd_map wmi_10x_cmd_map = {
153 .init_cmdid = WMI_10X_INIT_CMDID,
154 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
155 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
156 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
157 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
158 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
159 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
160 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
161 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
162 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
163 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
164 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
165 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
166 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
167 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
168 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
169 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
170 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
171 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
172 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
173 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
174 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
175 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
176 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
177 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
178 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
179 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
180 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
181 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
182 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
183 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
184 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
185 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
186 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
187 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
188 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
189 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
190 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
191 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
192 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
193 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
194 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
195 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
196 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
197 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
198 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
199 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
200 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
201 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
202 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
203 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
204 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
205 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
206 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
207 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
208 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
209 .roam_scan_rssi_change_threshold =
210 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
211 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
212 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
213 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
214 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
215 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
216 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
217 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
218 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
219 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
220 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
221 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
222 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
223 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
224 .wlan_profile_set_hist_intvl_cmdid =
225 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
226 .wlan_profile_get_profile_data_cmdid =
227 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
228 .wlan_profile_enable_profile_id_cmdid =
229 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
230 .wlan_profile_list_profile_id_cmdid =
231 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
232 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
233 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
234 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
235 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
236 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
237 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
238 .wow_enable_disable_wake_event_cmdid =
239 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
240 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
241 .wow_hostwakeup_from_sleep_cmdid =
242 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
243 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
244 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
245 .vdev_spectral_scan_configure_cmdid =
246 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
247 .vdev_spectral_scan_enable_cmdid =
248 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
249 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
250 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
251 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
252 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
253 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
254 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
255 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
256 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
257 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
258 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
259 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
260 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
261 .echo_cmdid = WMI_10X_ECHO_CMDID,
262 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
263 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
264 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
265 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
266 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
267 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
268 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
269 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
270 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
271 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
272 };
273
274 /* 10.2.4 WMI cmd track */
275 static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
276 .init_cmdid = WMI_10_2_INIT_CMDID,
277 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
278 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
279 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
280 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
281 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
282 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
283 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
284 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
285 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
286 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
287 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
288 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
289 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
290 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
291 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
292 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
293 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
294 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
295 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
296 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
297 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
298 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
299 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
300 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
301 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
302 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
303 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
304 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
305 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
306 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
307 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
308 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
309 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
310 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
311 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
312 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
313 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
314 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
315 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
316 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
317 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
318 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
319 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
320 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
321 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
322 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
323 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
324 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
325 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
326 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
327 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
328 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
329 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
330 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
331 .roam_scan_rssi_change_threshold =
332 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
333 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
334 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
335 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
336 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
337 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
338 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
339 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
340 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
341 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
342 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
343 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
344 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
345 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
346 .wlan_profile_set_hist_intvl_cmdid =
347 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
348 .wlan_profile_get_profile_data_cmdid =
349 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
350 .wlan_profile_enable_profile_id_cmdid =
351 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
352 .wlan_profile_list_profile_id_cmdid =
353 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
354 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
355 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
356 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
357 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
358 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
359 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
360 .wow_enable_disable_wake_event_cmdid =
361 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
362 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
363 .wow_hostwakeup_from_sleep_cmdid =
364 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
365 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
366 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
367 .vdev_spectral_scan_configure_cmdid =
368 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
369 .vdev_spectral_scan_enable_cmdid =
370 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
371 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
372 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
373 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
374 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
375 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
376 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
377 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
378 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
379 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
380 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
381 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
382 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
383 .echo_cmdid = WMI_10_2_ECHO_CMDID,
384 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
385 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
386 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
387 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
388 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
389 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
390 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
391 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
392 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
393 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
394 };
395
396 /* MAIN WMI VDEV param map */
397 static struct wmi_vdev_param_map wmi_vdev_param_map = {
398 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
399 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
400 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
401 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
402 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
403 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
404 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
405 .preamble = WMI_VDEV_PARAM_PREAMBLE,
406 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
407 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
408 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
409 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
410 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
411 .wmi_vdev_oc_scheduler_air_time_limit =
412 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
413 .wds = WMI_VDEV_PARAM_WDS,
414 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
415 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
416 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
417 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
418 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
419 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
420 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
421 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
422 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
423 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
424 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
425 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
426 .sgi = WMI_VDEV_PARAM_SGI,
427 .ldpc = WMI_VDEV_PARAM_LDPC,
428 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
429 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
430 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
431 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
432 .nss = WMI_VDEV_PARAM_NSS,
433 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
434 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
435 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
436 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
437 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
438 .ap_keepalive_min_idle_inactive_time_secs =
439 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
440 .ap_keepalive_max_idle_inactive_time_secs =
441 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
442 .ap_keepalive_max_unresponsive_time_secs =
443 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
444 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
445 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
446 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
447 .txbf = WMI_VDEV_PARAM_TXBF,
448 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
449 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
450 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
451 .ap_detect_out_of_sync_sleeping_sta_time_secs =
452 WMI_VDEV_PARAM_UNSUPPORTED,
453 };
454
455 /* 10.X WMI VDEV param map */
456 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
457 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
458 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
459 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
460 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
461 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
462 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
463 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
464 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
465 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
466 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
467 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
468 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
469 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
470 .wmi_vdev_oc_scheduler_air_time_limit =
471 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
472 .wds = WMI_10X_VDEV_PARAM_WDS,
473 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
474 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
475 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
476 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
477 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
478 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
479 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
480 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
481 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
482 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
483 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
484 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
485 .sgi = WMI_10X_VDEV_PARAM_SGI,
486 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
487 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
488 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
489 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
490 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
491 .nss = WMI_10X_VDEV_PARAM_NSS,
492 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
493 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
494 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
495 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
496 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
497 .ap_keepalive_min_idle_inactive_time_secs =
498 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
499 .ap_keepalive_max_idle_inactive_time_secs =
500 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
501 .ap_keepalive_max_unresponsive_time_secs =
502 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
503 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
504 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
505 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
506 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
507 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
508 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
509 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
510 .ap_detect_out_of_sync_sleeping_sta_time_secs =
511 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
512 };
513
514 static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
515 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
516 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
517 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
518 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
519 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
520 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
521 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
522 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
523 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
524 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
525 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
526 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
527 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
528 .wmi_vdev_oc_scheduler_air_time_limit =
529 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
530 .wds = WMI_10X_VDEV_PARAM_WDS,
531 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
532 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
533 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
534 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
535 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
536 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
537 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
538 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
539 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
540 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
541 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
542 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
543 .sgi = WMI_10X_VDEV_PARAM_SGI,
544 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
545 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
546 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
547 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
548 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
549 .nss = WMI_10X_VDEV_PARAM_NSS,
550 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
551 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
552 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
553 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
554 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
555 .ap_keepalive_min_idle_inactive_time_secs =
556 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
557 .ap_keepalive_max_idle_inactive_time_secs =
558 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
559 .ap_keepalive_max_unresponsive_time_secs =
560 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
561 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
562 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
563 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
564 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
565 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
566 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
567 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
568 .ap_detect_out_of_sync_sleeping_sta_time_secs =
569 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
570 };
571
572 static struct wmi_pdev_param_map wmi_pdev_param_map = {
573 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
574 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
575 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
576 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
577 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
578 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
579 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
580 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
581 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
582 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
583 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
584 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
585 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
586 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
587 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
588 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
589 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
590 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
591 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
592 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
593 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
594 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
595 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
596 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
597 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
598 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
599 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
600 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
601 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
602 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
603 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
604 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
605 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
606 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
607 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
608 .dcs = WMI_PDEV_PARAM_DCS,
609 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
610 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
611 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
612 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
613 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
614 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
615 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
616 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
617 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
618 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
619 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
620 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
621 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
622 };
623
624 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
625 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
626 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
627 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
628 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
629 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
630 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
631 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
632 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
633 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
634 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
635 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
636 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
637 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
638 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
639 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
640 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
641 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
642 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
643 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
644 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
645 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
646 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
647 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
648 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
649 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
650 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
651 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
652 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
653 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
654 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
655 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
656 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
657 .bcnflt_stats_update_period =
658 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
659 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
660 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
661 .dcs = WMI_10X_PDEV_PARAM_DCS,
662 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
663 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
664 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
665 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
666 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
667 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
668 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
669 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
670 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
671 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
672 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
673 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
674 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
675 };
676
677 static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
678 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
679 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
680 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
681 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
682 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
683 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
684 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
685 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
686 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
687 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
688 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
689 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
690 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
691 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
692 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
693 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
694 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
695 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
696 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
697 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
698 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
699 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
700 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
701 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
702 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
703 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
704 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
705 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
706 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
707 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
708 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
709 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
710 .bcnflt_stats_update_period =
711 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
712 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
713 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
714 .dcs = WMI_10X_PDEV_PARAM_DCS,
715 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
716 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
717 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
718 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
719 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
720 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
721 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
722 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
723 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
724 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
725 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
726 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
727 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
728 };
729
730 /* firmware 10.2 specific mappings */
731 static struct wmi_cmd_map wmi_10_2_cmd_map = {
732 .init_cmdid = WMI_10_2_INIT_CMDID,
733 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
734 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
735 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
736 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
737 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
738 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
739 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
740 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
741 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
742 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
743 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
744 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
745 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
746 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
747 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
748 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
749 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
750 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
751 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
752 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
753 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
754 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
755 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
756 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
757 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
758 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
759 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
760 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
761 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
762 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
763 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
764 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
765 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
766 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
767 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
768 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
769 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
770 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
771 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
772 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
773 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
774 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
775 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
776 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
777 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
778 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
779 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
780 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
781 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
782 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
783 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
784 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
785 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
786 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
787 .roam_scan_rssi_change_threshold =
788 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
789 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
790 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
791 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
792 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
793 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
794 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
795 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
796 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
797 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
798 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
799 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
800 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
801 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
802 .wlan_profile_set_hist_intvl_cmdid =
803 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
804 .wlan_profile_get_profile_data_cmdid =
805 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
806 .wlan_profile_enable_profile_id_cmdid =
807 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
808 .wlan_profile_list_profile_id_cmdid =
809 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
810 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
811 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
812 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
813 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
814 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
815 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
816 .wow_enable_disable_wake_event_cmdid =
817 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
818 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
819 .wow_hostwakeup_from_sleep_cmdid =
820 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
821 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
822 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
823 .vdev_spectral_scan_configure_cmdid =
824 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
825 .vdev_spectral_scan_enable_cmdid =
826 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
827 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
828 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
829 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
830 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
831 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
832 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
833 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
834 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
835 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
836 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
837 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
838 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
839 .echo_cmdid = WMI_10_2_ECHO_CMDID,
840 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
841 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
842 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
843 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
844 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
845 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
846 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
847 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
848 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
849 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
850 };
851
852 void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
853 const struct wmi_channel_arg *arg)
854 {
855 u32 flags = 0;
856
857 memset(ch, 0, sizeof(*ch));
858
859 if (arg->passive)
860 flags |= WMI_CHAN_FLAG_PASSIVE;
861 if (arg->allow_ibss)
862 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
863 if (arg->allow_ht)
864 flags |= WMI_CHAN_FLAG_ALLOW_HT;
865 if (arg->allow_vht)
866 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
867 if (arg->ht40plus)
868 flags |= WMI_CHAN_FLAG_HT40_PLUS;
869 if (arg->chan_radar)
870 flags |= WMI_CHAN_FLAG_DFS;
871
872 ch->mhz = __cpu_to_le32(arg->freq);
873 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
874 ch->band_center_freq2 = 0;
875 ch->min_power = arg->min_power;
876 ch->max_power = arg->max_power;
877 ch->reg_power = arg->max_reg_power;
878 ch->antenna_max = arg->max_antenna_gain;
879
880 /* mode & flags share storage */
881 ch->mode = arg->mode;
882 ch->flags |= __cpu_to_le32(flags);
883 }
884
885 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
886 {
887 int ret;
888
889 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
890 WMI_SERVICE_READY_TIMEOUT_HZ);
891 return ret;
892 }
893
894 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
895 {
896 int ret;
897
898 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
899 WMI_UNIFIED_READY_TIMEOUT_HZ);
900 return ret;
901 }
902
903 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
904 {
905 struct sk_buff *skb;
906 u32 round_len = roundup(len, 4);
907
908 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
909 if (!skb)
910 return NULL;
911
912 skb_reserve(skb, WMI_SKB_HEADROOM);
913 if (!IS_ALIGNED((unsigned long)skb->data, 4))
914 ath10k_warn(ar, "Unaligned WMI skb\n");
915
916 skb_put(skb, round_len);
917 memset(skb->data, 0, round_len);
918
919 return skb;
920 }
921
922 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
923 {
924 dev_kfree_skb(skb);
925 }
926
927 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
928 u32 cmd_id)
929 {
930 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
931 struct wmi_cmd_hdr *cmd_hdr;
932 int ret;
933 u32 cmd = 0;
934
935 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
936 return -ENOMEM;
937
938 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
939
940 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
941 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
942
943 memset(skb_cb, 0, sizeof(*skb_cb));
944 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
945 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
946
947 if (ret)
948 goto err_pull;
949
950 return 0;
951
952 err_pull:
953 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
954 return ret;
955 }
956
957 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
958 {
959 int ret;
960
961 lockdep_assert_held(&arvif->ar->data_lock);
962
963 if (arvif->beacon == NULL)
964 return;
965
966 if (arvif->beacon_sent)
967 return;
968
969 ret = ath10k_wmi_beacon_send_ref_nowait(arvif);
970 if (ret)
971 return;
972
973 /* We need to retain the arvif->beacon reference for DMA unmapping and
974 * freeing the skbuff later. */
975 arvif->beacon_sent = true;
976 }
977
978 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
979 struct ieee80211_vif *vif)
980 {
981 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
982
983 ath10k_wmi_tx_beacon_nowait(arvif);
984 }
985
986 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
987 {
988 spin_lock_bh(&ar->data_lock);
989 ieee80211_iterate_active_interfaces_atomic(ar->hw,
990 IEEE80211_IFACE_ITER_NORMAL,
991 ath10k_wmi_tx_beacons_iter,
992 NULL);
993 spin_unlock_bh(&ar->data_lock);
994 }
995
996 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
997 {
998 /* try to send pending beacons first. they take priority */
999 ath10k_wmi_tx_beacons_nowait(ar);
1000
1001 wake_up(&ar->wmi.tx_credits_wq);
1002 }
1003
1004 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
1005 {
1006 int ret = -EOPNOTSUPP;
1007
1008 might_sleep();
1009
1010 if (cmd_id == WMI_CMD_UNSUPPORTED) {
1011 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
1012 cmd_id);
1013 return ret;
1014 }
1015
1016 wait_event_timeout(ar->wmi.tx_credits_wq, ({
1017 /* try to send pending beacons first. they take priority */
1018 ath10k_wmi_tx_beacons_nowait(ar);
1019
1020 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
1021
1022 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1023 ret = -ESHUTDOWN;
1024
1025 (ret != -EAGAIN);
1026 }), 3*HZ);
1027
1028 if (ret)
1029 dev_kfree_skb_any(skb);
1030
1031 return ret;
1032 }
1033
1034 static struct sk_buff *
1035 ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
1036 {
1037 struct wmi_mgmt_tx_cmd *cmd;
1038 struct ieee80211_hdr *hdr;
1039 struct sk_buff *skb;
1040 int len;
1041 u32 buf_len = msdu->len;
1042 u16 fc;
1043
1044 hdr = (struct ieee80211_hdr *)msdu->data;
1045 fc = le16_to_cpu(hdr->frame_control);
1046
1047 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
1048 return ERR_PTR(-EINVAL);
1049
1050 len = sizeof(cmd->hdr) + msdu->len;
1051
1052 if ((ieee80211_is_action(hdr->frame_control) ||
1053 ieee80211_is_deauth(hdr->frame_control) ||
1054 ieee80211_is_disassoc(hdr->frame_control)) &&
1055 ieee80211_has_protected(hdr->frame_control)) {
1056 len += IEEE80211_CCMP_MIC_LEN;
1057 buf_len += IEEE80211_CCMP_MIC_LEN;
1058 }
1059
1060 len = round_up(len, 4);
1061
1062 skb = ath10k_wmi_alloc_skb(ar, len);
1063 if (!skb)
1064 return ERR_PTR(-ENOMEM);
1065
1066 cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
1067
1068 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(msdu)->vdev_id);
1069 cmd->hdr.tx_rate = 0;
1070 cmd->hdr.tx_power = 0;
1071 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
1072
1073 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
1074 memcpy(cmd->buf, msdu->data, msdu->len);
1075
1076 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
1077 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
1078 fc & IEEE80211_FCTL_STYPE);
1079 trace_ath10k_tx_hdr(ar, skb->data, skb->len);
1080 trace_ath10k_tx_payload(ar, skb->data, skb->len);
1081
1082 return skb;
1083 }
1084
1085 static void ath10k_wmi_event_scan_started(struct ath10k *ar)
1086 {
1087 lockdep_assert_held(&ar->data_lock);
1088
1089 switch (ar->scan.state) {
1090 case ATH10K_SCAN_IDLE:
1091 case ATH10K_SCAN_RUNNING:
1092 case ATH10K_SCAN_ABORTING:
1093 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
1094 ath10k_scan_state_str(ar->scan.state),
1095 ar->scan.state);
1096 break;
1097 case ATH10K_SCAN_STARTING:
1098 ar->scan.state = ATH10K_SCAN_RUNNING;
1099
1100 if (ar->scan.is_roc)
1101 ieee80211_ready_on_channel(ar->hw);
1102
1103 complete(&ar->scan.started);
1104 break;
1105 }
1106 }
1107
1108 static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
1109 {
1110 lockdep_assert_held(&ar->data_lock);
1111
1112 switch (ar->scan.state) {
1113 case ATH10K_SCAN_IDLE:
1114 case ATH10K_SCAN_STARTING:
1115 /* One suspected reason scan can be completed while starting is
1116 * if firmware fails to deliver all scan events to the host,
1117 * e.g. when transport pipe is full. This has been observed
1118 * with spectral scan phyerr events starving wmi transport
1119 * pipe. In such case the "scan completed" event should be (and
1120 * is) ignored by the host as it may be just firmware's scan
1121 * state machine recovering.
1122 */
1123 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
1124 ath10k_scan_state_str(ar->scan.state),
1125 ar->scan.state);
1126 break;
1127 case ATH10K_SCAN_RUNNING:
1128 case ATH10K_SCAN_ABORTING:
1129 __ath10k_scan_finish(ar);
1130 break;
1131 }
1132 }
1133
1134 static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
1135 {
1136 lockdep_assert_held(&ar->data_lock);
1137
1138 switch (ar->scan.state) {
1139 case ATH10K_SCAN_IDLE:
1140 case ATH10K_SCAN_STARTING:
1141 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
1142 ath10k_scan_state_str(ar->scan.state),
1143 ar->scan.state);
1144 break;
1145 case ATH10K_SCAN_RUNNING:
1146 case ATH10K_SCAN_ABORTING:
1147 ar->scan_channel = NULL;
1148 break;
1149 }
1150 }
1151
1152 static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
1153 {
1154 lockdep_assert_held(&ar->data_lock);
1155
1156 switch (ar->scan.state) {
1157 case ATH10K_SCAN_IDLE:
1158 case ATH10K_SCAN_STARTING:
1159 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
1160 ath10k_scan_state_str(ar->scan.state),
1161 ar->scan.state);
1162 break;
1163 case ATH10K_SCAN_RUNNING:
1164 case ATH10K_SCAN_ABORTING:
1165 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
1166
1167 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
1168 complete(&ar->scan.on_channel);
1169 break;
1170 }
1171 }
1172
1173 static const char *
1174 ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
1175 enum wmi_scan_completion_reason reason)
1176 {
1177 switch (type) {
1178 case WMI_SCAN_EVENT_STARTED:
1179 return "started";
1180 case WMI_SCAN_EVENT_COMPLETED:
1181 switch (reason) {
1182 case WMI_SCAN_REASON_COMPLETED:
1183 return "completed";
1184 case WMI_SCAN_REASON_CANCELLED:
1185 return "completed [cancelled]";
1186 case WMI_SCAN_REASON_PREEMPTED:
1187 return "completed [preempted]";
1188 case WMI_SCAN_REASON_TIMEDOUT:
1189 return "completed [timedout]";
1190 case WMI_SCAN_REASON_MAX:
1191 break;
1192 }
1193 return "completed [unknown]";
1194 case WMI_SCAN_EVENT_BSS_CHANNEL:
1195 return "bss channel";
1196 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
1197 return "foreign channel";
1198 case WMI_SCAN_EVENT_DEQUEUED:
1199 return "dequeued";
1200 case WMI_SCAN_EVENT_PREEMPTED:
1201 return "preempted";
1202 case WMI_SCAN_EVENT_START_FAILED:
1203 return "start failed";
1204 default:
1205 return "unknown";
1206 }
1207 }
1208
1209 static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
1210 struct wmi_scan_ev_arg *arg)
1211 {
1212 struct wmi_scan_event *ev = (void *)skb->data;
1213
1214 if (skb->len < sizeof(*ev))
1215 return -EPROTO;
1216
1217 skb_pull(skb, sizeof(*ev));
1218 arg->event_type = ev->event_type;
1219 arg->reason = ev->reason;
1220 arg->channel_freq = ev->channel_freq;
1221 arg->scan_req_id = ev->scan_req_id;
1222 arg->scan_id = ev->scan_id;
1223 arg->vdev_id = ev->vdev_id;
1224
1225 return 0;
1226 }
1227
1228 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
1229 {
1230 struct wmi_scan_ev_arg arg = {};
1231 enum wmi_scan_event_type event_type;
1232 enum wmi_scan_completion_reason reason;
1233 u32 freq;
1234 u32 req_id;
1235 u32 scan_id;
1236 u32 vdev_id;
1237 int ret;
1238
1239 ret = ath10k_wmi_pull_scan(ar, skb, &arg);
1240 if (ret) {
1241 ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
1242 return ret;
1243 }
1244
1245 event_type = __le32_to_cpu(arg.event_type);
1246 reason = __le32_to_cpu(arg.reason);
1247 freq = __le32_to_cpu(arg.channel_freq);
1248 req_id = __le32_to_cpu(arg.scan_req_id);
1249 scan_id = __le32_to_cpu(arg.scan_id);
1250 vdev_id = __le32_to_cpu(arg.vdev_id);
1251
1252 spin_lock_bh(&ar->data_lock);
1253
1254 ath10k_dbg(ar, ATH10K_DBG_WMI,
1255 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
1256 ath10k_wmi_event_scan_type_str(event_type, reason),
1257 event_type, reason, freq, req_id, scan_id, vdev_id,
1258 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
1259
1260 switch (event_type) {
1261 case WMI_SCAN_EVENT_STARTED:
1262 ath10k_wmi_event_scan_started(ar);
1263 break;
1264 case WMI_SCAN_EVENT_COMPLETED:
1265 ath10k_wmi_event_scan_completed(ar);
1266 break;
1267 case WMI_SCAN_EVENT_BSS_CHANNEL:
1268 ath10k_wmi_event_scan_bss_chan(ar);
1269 break;
1270 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
1271 ath10k_wmi_event_scan_foreign_chan(ar, freq);
1272 break;
1273 case WMI_SCAN_EVENT_START_FAILED:
1274 ath10k_warn(ar, "received scan start failure event\n");
1275 break;
1276 case WMI_SCAN_EVENT_DEQUEUED:
1277 case WMI_SCAN_EVENT_PREEMPTED:
1278 default:
1279 break;
1280 }
1281
1282 spin_unlock_bh(&ar->data_lock);
1283 return 0;
1284 }
1285
1286 static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
1287 {
1288 enum ieee80211_band band;
1289
1290 switch (phy_mode) {
1291 case MODE_11A:
1292 case MODE_11NA_HT20:
1293 case MODE_11NA_HT40:
1294 case MODE_11AC_VHT20:
1295 case MODE_11AC_VHT40:
1296 case MODE_11AC_VHT80:
1297 band = IEEE80211_BAND_5GHZ;
1298 break;
1299 case MODE_11G:
1300 case MODE_11B:
1301 case MODE_11GONLY:
1302 case MODE_11NG_HT20:
1303 case MODE_11NG_HT40:
1304 case MODE_11AC_VHT20_2G:
1305 case MODE_11AC_VHT40_2G:
1306 case MODE_11AC_VHT80_2G:
1307 default:
1308 band = IEEE80211_BAND_2GHZ;
1309 }
1310
1311 return band;
1312 }
1313
1314 static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
1315 {
1316 u8 rate_idx = 0;
1317
1318 /* rate in Kbps */
1319 switch (rate) {
1320 case 1000:
1321 rate_idx = 0;
1322 break;
1323 case 2000:
1324 rate_idx = 1;
1325 break;
1326 case 5500:
1327 rate_idx = 2;
1328 break;
1329 case 11000:
1330 rate_idx = 3;
1331 break;
1332 case 6000:
1333 rate_idx = 4;
1334 break;
1335 case 9000:
1336 rate_idx = 5;
1337 break;
1338 case 12000:
1339 rate_idx = 6;
1340 break;
1341 case 18000:
1342 rate_idx = 7;
1343 break;
1344 case 24000:
1345 rate_idx = 8;
1346 break;
1347 case 36000:
1348 rate_idx = 9;
1349 break;
1350 case 48000:
1351 rate_idx = 10;
1352 break;
1353 case 54000:
1354 rate_idx = 11;
1355 break;
1356 default:
1357 break;
1358 }
1359
1360 if (band == IEEE80211_BAND_5GHZ) {
1361 if (rate_idx > 3)
1362 /* Omit CCK rates */
1363 rate_idx -= 4;
1364 else
1365 rate_idx = 0;
1366 }
1367
1368 return rate_idx;
1369 }
1370
1371 /* If keys are configured, HW decrypts all frames
1372 * with protected bit set. Mark such frames as decrypted.
1373 */
1374 static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
1375 struct sk_buff *skb,
1376 struct ieee80211_rx_status *status)
1377 {
1378 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1379 unsigned int hdrlen;
1380 bool peer_key;
1381 u8 *addr, keyidx;
1382
1383 if (!ieee80211_is_auth(hdr->frame_control) ||
1384 !ieee80211_has_protected(hdr->frame_control))
1385 return;
1386
1387 hdrlen = ieee80211_hdrlen(hdr->frame_control);
1388 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
1389 return;
1390
1391 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
1392 addr = ieee80211_get_SA(hdr);
1393
1394 spin_lock_bh(&ar->data_lock);
1395 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
1396 spin_unlock_bh(&ar->data_lock);
1397
1398 if (peer_key) {
1399 ath10k_dbg(ar, ATH10K_DBG_MAC,
1400 "mac wep key present for peer %pM\n", addr);
1401 status->flag |= RX_FLAG_DECRYPTED;
1402 }
1403 }
1404
1405 static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
1406 struct wmi_mgmt_rx_ev_arg *arg)
1407 {
1408 struct wmi_mgmt_rx_event_v1 *ev_v1;
1409 struct wmi_mgmt_rx_event_v2 *ev_v2;
1410 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
1411 size_t pull_len;
1412 u32 msdu_len;
1413
1414 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
1415 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
1416 ev_hdr = &ev_v2->hdr.v1;
1417 pull_len = sizeof(*ev_v2);
1418 } else {
1419 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
1420 ev_hdr = &ev_v1->hdr;
1421 pull_len = sizeof(*ev_v1);
1422 }
1423
1424 if (skb->len < pull_len)
1425 return -EPROTO;
1426
1427 skb_pull(skb, pull_len);
1428 arg->channel = ev_hdr->channel;
1429 arg->buf_len = ev_hdr->buf_len;
1430 arg->status = ev_hdr->status;
1431 arg->snr = ev_hdr->snr;
1432 arg->phy_mode = ev_hdr->phy_mode;
1433 arg->rate = ev_hdr->rate;
1434
1435 msdu_len = __le32_to_cpu(arg->buf_len);
1436 if (skb->len < msdu_len)
1437 return -EPROTO;
1438
1439 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
1440 * trailer with credit update. Trim the excess garbage.
1441 */
1442 skb_trim(skb, msdu_len);
1443
1444 return 0;
1445 }
1446
1447 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
1448 {
1449 struct wmi_mgmt_rx_ev_arg arg = {};
1450 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
1451 struct ieee80211_hdr *hdr;
1452 u32 rx_status;
1453 u32 channel;
1454 u32 phy_mode;
1455 u32 snr;
1456 u32 rate;
1457 u32 buf_len;
1458 u16 fc;
1459 int ret;
1460
1461 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
1462 if (ret) {
1463 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
1464 return ret;
1465 }
1466
1467 channel = __le32_to_cpu(arg.channel);
1468 buf_len = __le32_to_cpu(arg.buf_len);
1469 rx_status = __le32_to_cpu(arg.status);
1470 snr = __le32_to_cpu(arg.snr);
1471 phy_mode = __le32_to_cpu(arg.phy_mode);
1472 rate = __le32_to_cpu(arg.rate);
1473
1474 memset(status, 0, sizeof(*status));
1475
1476 ath10k_dbg(ar, ATH10K_DBG_MGMT,
1477 "event mgmt rx status %08x\n", rx_status);
1478
1479 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1480 dev_kfree_skb(skb);
1481 return 0;
1482 }
1483
1484 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
1485 dev_kfree_skb(skb);
1486 return 0;
1487 }
1488
1489 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
1490 dev_kfree_skb(skb);
1491 return 0;
1492 }
1493
1494 if (rx_status & WMI_RX_STATUS_ERR_CRC) {
1495 dev_kfree_skb(skb);
1496 return 0;
1497 }
1498
1499 if (rx_status & WMI_RX_STATUS_ERR_MIC)
1500 status->flag |= RX_FLAG_MMIC_ERROR;
1501
1502 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
1503 * MODE_11B. This means phy_mode is not a reliable source for the band
1504 * of mgmt rx.
1505 */
1506 if (channel >= 1 && channel <= 14) {
1507 status->band = IEEE80211_BAND_2GHZ;
1508 } else if (channel >= 36 && channel <= 165) {
1509 status->band = IEEE80211_BAND_5GHZ;
1510 } else {
1511 /* Shouldn't happen unless list of advertised channels to
1512 * mac80211 has been changed.
1513 */
1514 WARN_ON_ONCE(1);
1515 dev_kfree_skb(skb);
1516 return 0;
1517 }
1518
1519 if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ)
1520 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
1521
1522 status->freq = ieee80211_channel_to_frequency(channel, status->band);
1523 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
1524 status->rate_idx = get_rate_idx(rate, status->band);
1525
1526 hdr = (struct ieee80211_hdr *)skb->data;
1527 fc = le16_to_cpu(hdr->frame_control);
1528
1529 ath10k_wmi_handle_wep_reauth(ar, skb, status);
1530
1531 /* FW delivers WEP Shared Auth frame with Protected Bit set and
1532 * encrypted payload. However in case of PMF it delivers decrypted
1533 * frames with Protected Bit set. */
1534 if (ieee80211_has_protected(hdr->frame_control) &&
1535 !ieee80211_is_auth(hdr->frame_control)) {
1536 status->flag |= RX_FLAG_DECRYPTED;
1537
1538 if (!ieee80211_is_action(hdr->frame_control) &&
1539 !ieee80211_is_deauth(hdr->frame_control) &&
1540 !ieee80211_is_disassoc(hdr->frame_control)) {
1541 status->flag |= RX_FLAG_IV_STRIPPED |
1542 RX_FLAG_MMIC_STRIPPED;
1543 hdr->frame_control = __cpu_to_le16(fc &
1544 ~IEEE80211_FCTL_PROTECTED);
1545 }
1546 }
1547
1548 ath10k_dbg(ar, ATH10K_DBG_MGMT,
1549 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
1550 skb, skb->len,
1551 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
1552
1553 ath10k_dbg(ar, ATH10K_DBG_MGMT,
1554 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
1555 status->freq, status->band, status->signal,
1556 status->rate_idx);
1557
1558 ieee80211_rx(ar->hw, skb);
1559 return 0;
1560 }
1561
1562 static int freq_to_idx(struct ath10k *ar, int freq)
1563 {
1564 struct ieee80211_supported_band *sband;
1565 int band, ch, idx = 0;
1566
1567 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
1568 sband = ar->hw->wiphy->bands[band];
1569 if (!sband)
1570 continue;
1571
1572 for (ch = 0; ch < sband->n_channels; ch++, idx++)
1573 if (sband->channels[ch].center_freq == freq)
1574 goto exit;
1575 }
1576
1577 exit:
1578 return idx;
1579 }
1580
1581 static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
1582 struct wmi_ch_info_ev_arg *arg)
1583 {
1584 struct wmi_chan_info_event *ev = (void *)skb->data;
1585
1586 if (skb->len < sizeof(*ev))
1587 return -EPROTO;
1588
1589 skb_pull(skb, sizeof(*ev));
1590 arg->err_code = ev->err_code;
1591 arg->freq = ev->freq;
1592 arg->cmd_flags = ev->cmd_flags;
1593 arg->noise_floor = ev->noise_floor;
1594 arg->rx_clear_count = ev->rx_clear_count;
1595 arg->cycle_count = ev->cycle_count;
1596
1597 return 0;
1598 }
1599
1600 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1601 {
1602 struct wmi_ch_info_ev_arg arg = {};
1603 struct survey_info *survey;
1604 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1605 int idx, ret;
1606
1607 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
1608 if (ret) {
1609 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
1610 return;
1611 }
1612
1613 err_code = __le32_to_cpu(arg.err_code);
1614 freq = __le32_to_cpu(arg.freq);
1615 cmd_flags = __le32_to_cpu(arg.cmd_flags);
1616 noise_floor = __le32_to_cpu(arg.noise_floor);
1617 rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
1618 cycle_count = __le32_to_cpu(arg.cycle_count);
1619
1620 ath10k_dbg(ar, ATH10K_DBG_WMI,
1621 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1622 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1623 cycle_count);
1624
1625 spin_lock_bh(&ar->data_lock);
1626
1627 switch (ar->scan.state) {
1628 case ATH10K_SCAN_IDLE:
1629 case ATH10K_SCAN_STARTING:
1630 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
1631 goto exit;
1632 case ATH10K_SCAN_RUNNING:
1633 case ATH10K_SCAN_ABORTING:
1634 break;
1635 }
1636
1637 idx = freq_to_idx(ar, freq);
1638 if (idx >= ARRAY_SIZE(ar->survey)) {
1639 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
1640 freq, idx);
1641 goto exit;
1642 }
1643
1644 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1645 /* During scanning chan info is reported twice for each
1646 * visited channel. The reported cycle count is global
1647 * and per-channel cycle count must be calculated */
1648
1649 cycle_count -= ar->survey_last_cycle_count;
1650 rx_clear_count -= ar->survey_last_rx_clear_count;
1651
1652 survey = &ar->survey[idx];
1653 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1654 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1655 survey->noise = noise_floor;
1656 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1657 SURVEY_INFO_CHANNEL_TIME_RX |
1658 SURVEY_INFO_NOISE_DBM;
1659 }
1660
1661 ar->survey_last_rx_clear_count = rx_clear_count;
1662 ar->survey_last_cycle_count = cycle_count;
1663
1664 exit:
1665 spin_unlock_bh(&ar->data_lock);
1666 }
1667
1668 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1669 {
1670 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
1671 }
1672
1673 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
1674 {
1675 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
1676 skb->len);
1677
1678 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
1679
1680 return 0;
1681 }
1682
1683 void ath10k_wmi_pull_pdev_stats(const struct wmi_pdev_stats *src,
1684 struct ath10k_fw_stats_pdev *dst)
1685 {
1686 const struct wal_dbg_tx_stats *tx = &src->wal.tx;
1687 const struct wal_dbg_rx_stats *rx = &src->wal.rx;
1688
1689 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
1690 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
1691 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
1692 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
1693 dst->cycle_count = __le32_to_cpu(src->cycle_count);
1694 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
1695 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
1696
1697 dst->comp_queued = __le32_to_cpu(tx->comp_queued);
1698 dst->comp_delivered = __le32_to_cpu(tx->comp_delivered);
1699 dst->msdu_enqued = __le32_to_cpu(tx->msdu_enqued);
1700 dst->mpdu_enqued = __le32_to_cpu(tx->mpdu_enqued);
1701 dst->wmm_drop = __le32_to_cpu(tx->wmm_drop);
1702 dst->local_enqued = __le32_to_cpu(tx->local_enqued);
1703 dst->local_freed = __le32_to_cpu(tx->local_freed);
1704 dst->hw_queued = __le32_to_cpu(tx->hw_queued);
1705 dst->hw_reaped = __le32_to_cpu(tx->hw_reaped);
1706 dst->underrun = __le32_to_cpu(tx->underrun);
1707 dst->tx_abort = __le32_to_cpu(tx->tx_abort);
1708 dst->mpdus_requed = __le32_to_cpu(tx->mpdus_requed);
1709 dst->tx_ko = __le32_to_cpu(tx->tx_ko);
1710 dst->data_rc = __le32_to_cpu(tx->data_rc);
1711 dst->self_triggers = __le32_to_cpu(tx->self_triggers);
1712 dst->sw_retry_failure = __le32_to_cpu(tx->sw_retry_failure);
1713 dst->illgl_rate_phy_err = __le32_to_cpu(tx->illgl_rate_phy_err);
1714 dst->pdev_cont_xretry = __le32_to_cpu(tx->pdev_cont_xretry);
1715 dst->pdev_tx_timeout = __le32_to_cpu(tx->pdev_tx_timeout);
1716 dst->pdev_resets = __le32_to_cpu(tx->pdev_resets);
1717 dst->phy_underrun = __le32_to_cpu(tx->phy_underrun);
1718 dst->txop_ovf = __le32_to_cpu(tx->txop_ovf);
1719
1720 dst->mid_ppdu_route_change = __le32_to_cpu(rx->mid_ppdu_route_change);
1721 dst->status_rcvd = __le32_to_cpu(rx->status_rcvd);
1722 dst->r0_frags = __le32_to_cpu(rx->r0_frags);
1723 dst->r1_frags = __le32_to_cpu(rx->r1_frags);
1724 dst->r2_frags = __le32_to_cpu(rx->r2_frags);
1725 dst->r3_frags = __le32_to_cpu(rx->r3_frags);
1726 dst->htt_msdus = __le32_to_cpu(rx->htt_msdus);
1727 dst->htt_mpdus = __le32_to_cpu(rx->htt_mpdus);
1728 dst->loc_msdus = __le32_to_cpu(rx->loc_msdus);
1729 dst->loc_mpdus = __le32_to_cpu(rx->loc_mpdus);
1730 dst->oversize_amsdu = __le32_to_cpu(rx->oversize_amsdu);
1731 dst->phy_errs = __le32_to_cpu(rx->phy_errs);
1732 dst->phy_err_drop = __le32_to_cpu(rx->phy_err_drop);
1733 dst->mpdu_errs = __le32_to_cpu(rx->mpdu_errs);
1734 }
1735
1736 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
1737 struct ath10k_fw_stats_peer *dst)
1738 {
1739 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
1740 dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
1741 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
1742 }
1743
1744 static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
1745 struct sk_buff *skb,
1746 struct ath10k_fw_stats *stats)
1747 {
1748 const struct wmi_stats_event *ev = (void *)skb->data;
1749 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
1750 int i;
1751
1752 if (!skb_pull(skb, sizeof(*ev)))
1753 return -EPROTO;
1754
1755 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1756 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1757 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1758
1759 for (i = 0; i < num_pdev_stats; i++) {
1760 const struct wmi_pdev_stats *src;
1761 struct ath10k_fw_stats_pdev *dst;
1762
1763 src = (void *)skb->data;
1764 if (!skb_pull(skb, sizeof(*src)))
1765 return -EPROTO;
1766
1767 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1768 if (!dst)
1769 continue;
1770
1771 ath10k_wmi_pull_pdev_stats(src, dst);
1772 list_add_tail(&dst->list, &stats->pdevs);
1773 }
1774
1775 /* fw doesn't implement vdev stats */
1776
1777 for (i = 0; i < num_peer_stats; i++) {
1778 const struct wmi_peer_stats *src;
1779 struct ath10k_fw_stats_peer *dst;
1780
1781 src = (void *)skb->data;
1782 if (!skb_pull(skb, sizeof(*src)))
1783 return -EPROTO;
1784
1785 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1786 if (!dst)
1787 continue;
1788
1789 ath10k_wmi_pull_peer_stats(src, dst);
1790 list_add_tail(&dst->list, &stats->peers);
1791 }
1792
1793 return 0;
1794 }
1795
1796 static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
1797 struct sk_buff *skb,
1798 struct ath10k_fw_stats *stats)
1799 {
1800 const struct wmi_stats_event *ev = (void *)skb->data;
1801 u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
1802 int i;
1803
1804 if (!skb_pull(skb, sizeof(*ev)))
1805 return -EPROTO;
1806
1807 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
1808 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
1809 num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
1810
1811 for (i = 0; i < num_pdev_stats; i++) {
1812 const struct wmi_10x_pdev_stats *src;
1813 struct ath10k_fw_stats_pdev *dst;
1814
1815 src = (void *)skb->data;
1816 if (!skb_pull(skb, sizeof(*src)))
1817 return -EPROTO;
1818
1819 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1820 if (!dst)
1821 continue;
1822
1823 ath10k_wmi_pull_pdev_stats(&src->old, dst);
1824
1825 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
1826 dst->rts_bad = __le32_to_cpu(src->rts_bad);
1827 dst->rts_good = __le32_to_cpu(src->rts_good);
1828 dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
1829 dst->no_beacons = __le32_to_cpu(src->no_beacons);
1830 dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
1831
1832 list_add_tail(&dst->list, &stats->pdevs);
1833 }
1834
1835 /* fw doesn't implement vdev stats */
1836
1837 for (i = 0; i < num_peer_stats; i++) {
1838 const struct wmi_10x_peer_stats *src;
1839 struct ath10k_fw_stats_peer *dst;
1840
1841 src = (void *)skb->data;
1842 if (!skb_pull(skb, sizeof(*src)))
1843 return -EPROTO;
1844
1845 dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
1846 if (!dst)
1847 continue;
1848
1849 ath10k_wmi_pull_peer_stats(&src->old, dst);
1850
1851 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
1852
1853 list_add_tail(&dst->list, &stats->peers);
1854 }
1855
1856 return 0;
1857 }
1858
1859 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
1860 {
1861 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
1862 ath10k_debug_fw_stats_process(ar, skb);
1863 }
1864
1865 static int
1866 ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
1867 struct wmi_vdev_start_ev_arg *arg)
1868 {
1869 struct wmi_vdev_start_response_event *ev = (void *)skb->data;
1870
1871 if (skb->len < sizeof(*ev))
1872 return -EPROTO;
1873
1874 skb_pull(skb, sizeof(*ev));
1875 arg->vdev_id = ev->vdev_id;
1876 arg->req_id = ev->req_id;
1877 arg->resp_type = ev->resp_type;
1878 arg->status = ev->status;
1879
1880 return 0;
1881 }
1882
1883 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
1884 {
1885 struct wmi_vdev_start_ev_arg arg = {};
1886 int ret;
1887
1888 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
1889
1890 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
1891 if (ret) {
1892 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
1893 return;
1894 }
1895
1896 if (WARN_ON(__le32_to_cpu(arg.status)))
1897 return;
1898
1899 complete(&ar->vdev_setup_done);
1900 }
1901
1902 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
1903 {
1904 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
1905 complete(&ar->vdev_setup_done);
1906 }
1907
1908 static int
1909 ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
1910 struct wmi_peer_kick_ev_arg *arg)
1911 {
1912 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
1913
1914 if (skb->len < sizeof(*ev))
1915 return -EPROTO;
1916
1917 skb_pull(skb, sizeof(*ev));
1918 arg->mac_addr = ev->peer_macaddr.addr;
1919
1920 return 0;
1921 }
1922
1923 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
1924 {
1925 struct wmi_peer_kick_ev_arg arg = {};
1926 struct ieee80211_sta *sta;
1927 int ret;
1928
1929 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
1930 if (ret) {
1931 ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
1932 ret);
1933 return;
1934 }
1935
1936 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
1937 arg.mac_addr);
1938
1939 rcu_read_lock();
1940
1941 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
1942 if (!sta) {
1943 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
1944 arg.mac_addr);
1945 goto exit;
1946 }
1947
1948 ieee80211_report_low_ack(sta, 10);
1949
1950 exit:
1951 rcu_read_unlock();
1952 }
1953
1954 /*
1955 * FIXME
1956 *
1957 * We don't report to mac80211 sleep state of connected
1958 * stations. Due to this mac80211 can't fill in TIM IE
1959 * correctly.
1960 *
1961 * I know of no way of getting nullfunc frames that contain
1962 * sleep transition from connected stations - these do not
1963 * seem to be sent from the target to the host. There also
1964 * doesn't seem to be a dedicated event for that. So the
1965 * only way left to do this would be to read tim_bitmap
1966 * during SWBA.
1967 *
1968 * We could probably try using tim_bitmap from SWBA to tell
1969 * mac80211 which stations are asleep and which are not. The
1970 * problem here is calling mac80211 functions so many times
1971 * could take too long and make us miss the time to submit
1972 * the beacon to the target.
1973 *
1974 * So as a workaround we try to extend the TIM IE if there
1975 * is unicast buffered for stations with aid > 7 and fill it
1976 * in ourselves.
1977 */
1978 static void ath10k_wmi_update_tim(struct ath10k *ar,
1979 struct ath10k_vif *arvif,
1980 struct sk_buff *bcn,
1981 const struct wmi_tim_info *tim_info)
1982 {
1983 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1984 struct ieee80211_tim_ie *tim;
1985 u8 *ies, *ie;
1986 u8 ie_len, pvm_len;
1987 __le32 t;
1988 u32 v;
1989
1990 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1991 * we must copy the bitmap upon change and reuse it later */
1992 if (__le32_to_cpu(tim_info->tim_changed)) {
1993 int i;
1994
1995 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1996 sizeof(tim_info->tim_bitmap));
1997
1998 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
1999 t = tim_info->tim_bitmap[i / 4];
2000 v = __le32_to_cpu(t);
2001 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
2002 }
2003
2004 /* FW reports either length 0 or 16
2005 * so we calculate this on our own */
2006 arvif->u.ap.tim_len = 0;
2007 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
2008 if (arvif->u.ap.tim_bitmap[i])
2009 arvif->u.ap.tim_len = i;
2010
2011 arvif->u.ap.tim_len++;
2012 }
2013
2014 ies = bcn->data;
2015 ies += ieee80211_hdrlen(hdr->frame_control);
2016 ies += 12; /* fixed parameters */
2017
2018 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
2019 (u8 *)skb_tail_pointer(bcn) - ies);
2020 if (!ie) {
2021 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
2022 ath10k_warn(ar, "no tim ie found;\n");
2023 return;
2024 }
2025
2026 tim = (void *)ie + 2;
2027 ie_len = ie[1];
2028 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
2029
2030 if (pvm_len < arvif->u.ap.tim_len) {
2031 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
2032 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
2033 void *next_ie = ie + 2 + ie_len;
2034
2035 if (skb_put(bcn, expand_size)) {
2036 memmove(next_ie + expand_size, next_ie, move_size);
2037
2038 ie[1] += expand_size;
2039 ie_len += expand_size;
2040 pvm_len += expand_size;
2041 } else {
2042 ath10k_warn(ar, "tim expansion failed\n");
2043 }
2044 }
2045
2046 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
2047 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
2048 return;
2049 }
2050
2051 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
2052 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
2053
2054 if (tim->dtim_count == 0) {
2055 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
2056
2057 if (__le32_to_cpu(tim_info->tim_mcast) == 1)
2058 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
2059 }
2060
2061 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
2062 tim->dtim_count, tim->dtim_period,
2063 tim->bitmap_ctrl, pvm_len);
2064 }
2065
2066 static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
2067 const struct wmi_p2p_noa_info *noa)
2068 {
2069 struct ieee80211_p2p_noa_attr *noa_attr;
2070 u8 ctwindow_oppps = noa->ctwindow_oppps;
2071 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
2072 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
2073 __le16 *noa_attr_len;
2074 u16 attr_len;
2075 u8 noa_descriptors = noa->num_descriptors;
2076 int i;
2077
2078 /* P2P IE */
2079 data[0] = WLAN_EID_VENDOR_SPECIFIC;
2080 data[1] = len - 2;
2081 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
2082 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
2083 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
2084 data[5] = WLAN_OUI_TYPE_WFA_P2P;
2085
2086 /* NOA ATTR */
2087 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
2088 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
2089 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
2090
2091 noa_attr->index = noa->index;
2092 noa_attr->oppps_ctwindow = ctwindow;
2093 if (oppps)
2094 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
2095
2096 for (i = 0; i < noa_descriptors; i++) {
2097 noa_attr->desc[i].count =
2098 __le32_to_cpu(noa->descriptors[i].type_count);
2099 noa_attr->desc[i].duration = noa->descriptors[i].duration;
2100 noa_attr->desc[i].interval = noa->descriptors[i].interval;
2101 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
2102 }
2103
2104 attr_len = 2; /* index + oppps_ctwindow */
2105 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
2106 *noa_attr_len = __cpu_to_le16(attr_len);
2107 }
2108
2109 static u32 ath10k_p2p_calc_noa_ie_len(const struct wmi_p2p_noa_info *noa)
2110 {
2111 u32 len = 0;
2112 u8 noa_descriptors = noa->num_descriptors;
2113 u8 opp_ps_info = noa->ctwindow_oppps;
2114 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
2115
2116 if (!noa_descriptors && !opps_enabled)
2117 return len;
2118
2119 len += 1 + 1 + 4; /* EID + len + OUI */
2120 len += 1 + 2; /* noa attr + attr len */
2121 len += 1 + 1; /* index + oppps_ctwindow */
2122 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
2123
2124 return len;
2125 }
2126
2127 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
2128 struct sk_buff *bcn,
2129 const struct wmi_p2p_noa_info *noa)
2130 {
2131 u8 *new_data, *old_data = arvif->u.ap.noa_data;
2132 u32 new_len;
2133
2134 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
2135 return;
2136
2137 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
2138 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
2139 new_len = ath10k_p2p_calc_noa_ie_len(noa);
2140 if (!new_len)
2141 goto cleanup;
2142
2143 new_data = kmalloc(new_len, GFP_ATOMIC);
2144 if (!new_data)
2145 goto cleanup;
2146
2147 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
2148
2149 spin_lock_bh(&ar->data_lock);
2150 arvif->u.ap.noa_data = new_data;
2151 arvif->u.ap.noa_len = new_len;
2152 spin_unlock_bh(&ar->data_lock);
2153 kfree(old_data);
2154 }
2155
2156 if (arvif->u.ap.noa_data)
2157 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
2158 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
2159 arvif->u.ap.noa_data,
2160 arvif->u.ap.noa_len);
2161 return;
2162
2163 cleanup:
2164 spin_lock_bh(&ar->data_lock);
2165 arvif->u.ap.noa_data = NULL;
2166 arvif->u.ap.noa_len = 0;
2167 spin_unlock_bh(&ar->data_lock);
2168 kfree(old_data);
2169 }
2170
2171 static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
2172 struct wmi_swba_ev_arg *arg)
2173 {
2174 struct wmi_host_swba_event *ev = (void *)skb->data;
2175 u32 map;
2176 size_t i;
2177
2178 if (skb->len < sizeof(*ev))
2179 return -EPROTO;
2180
2181 skb_pull(skb, sizeof(*ev));
2182 arg->vdev_map = ev->vdev_map;
2183
2184 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
2185 if (!(map & BIT(0)))
2186 continue;
2187
2188 /* If this happens there were some changes in firmware and
2189 * ath10k should update the max size of tim_info array.
2190 */
2191 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
2192 break;
2193
2194 arg->tim_info[i] = &ev->bcn_info[i].tim_info;
2195 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
2196 i++;
2197 }
2198
2199 return 0;
2200 }
2201
2202 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
2203 {
2204 struct wmi_swba_ev_arg arg = {};
2205 u32 map;
2206 int i = -1;
2207 const struct wmi_tim_info *tim_info;
2208 const struct wmi_p2p_noa_info *noa_info;
2209 struct ath10k_vif *arvif;
2210 struct sk_buff *bcn;
2211 dma_addr_t paddr;
2212 int ret, vdev_id = 0;
2213
2214 ret = ath10k_wmi_pull_swba(ar, skb, &arg);
2215 if (ret) {
2216 ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
2217 return;
2218 }
2219
2220 map = __le32_to_cpu(arg.vdev_map);
2221
2222 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
2223 map);
2224
2225 for (; map; map >>= 1, vdev_id++) {
2226 if (!(map & 0x1))
2227 continue;
2228
2229 i++;
2230
2231 if (i >= WMI_MAX_AP_VDEV) {
2232 ath10k_warn(ar, "swba has corrupted vdev map\n");
2233 break;
2234 }
2235
2236 tim_info = arg.tim_info[i];
2237 noa_info = arg.noa_info[i];
2238
2239 ath10k_dbg(ar, ATH10K_DBG_MGMT,
2240 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
2241 i,
2242 __le32_to_cpu(tim_info->tim_len),
2243 __le32_to_cpu(tim_info->tim_mcast),
2244 __le32_to_cpu(tim_info->tim_changed),
2245 __le32_to_cpu(tim_info->tim_num_ps_pending),
2246 __le32_to_cpu(tim_info->tim_bitmap[3]),
2247 __le32_to_cpu(tim_info->tim_bitmap[2]),
2248 __le32_to_cpu(tim_info->tim_bitmap[1]),
2249 __le32_to_cpu(tim_info->tim_bitmap[0]));
2250
2251 arvif = ath10k_get_arvif(ar, vdev_id);
2252 if (arvif == NULL) {
2253 ath10k_warn(ar, "no vif for vdev_id %d found\n",
2254 vdev_id);
2255 continue;
2256 }
2257
2258 /* There are no completions for beacons so wait for next SWBA
2259 * before telling mac80211 to decrement CSA counter
2260 *
2261 * Once CSA counter is completed stop sending beacons until
2262 * actual channel switch is done */
2263 if (arvif->vif->csa_active &&
2264 ieee80211_csa_is_complete(arvif->vif)) {
2265 ieee80211_csa_finish(arvif->vif);
2266 continue;
2267 }
2268
2269 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
2270 if (!bcn) {
2271 ath10k_warn(ar, "could not get mac80211 beacon\n");
2272 continue;
2273 }
2274
2275 ath10k_tx_h_seq_no(arvif->vif, bcn);
2276 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
2277 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
2278
2279 spin_lock_bh(&ar->data_lock);
2280
2281 if (arvif->beacon) {
2282 if (!arvif->beacon_sent)
2283 ath10k_warn(ar, "SWBA overrun on vdev %d\n",
2284 arvif->vdev_id);
2285
2286 ath10k_mac_vif_beacon_free(arvif);
2287 }
2288
2289 if (!arvif->beacon_buf) {
2290 paddr = dma_map_single(arvif->ar->dev, bcn->data,
2291 bcn->len, DMA_TO_DEVICE);
2292 ret = dma_mapping_error(arvif->ar->dev, paddr);
2293 if (ret) {
2294 ath10k_warn(ar, "failed to map beacon: %d\n",
2295 ret);
2296 dev_kfree_skb_any(bcn);
2297 goto skip;
2298 }
2299
2300 ATH10K_SKB_CB(bcn)->paddr = paddr;
2301 } else {
2302 if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
2303 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
2304 bcn->len, IEEE80211_MAX_FRAME_LEN);
2305 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
2306 }
2307 memcpy(arvif->beacon_buf, bcn->data, bcn->len);
2308 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
2309 }
2310
2311 arvif->beacon = bcn;
2312 arvif->beacon_sent = false;
2313
2314 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
2315 trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
2316
2317 ath10k_wmi_tx_beacon_nowait(arvif);
2318 skip:
2319 spin_unlock_bh(&ar->data_lock);
2320 }
2321 }
2322
2323 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
2324 {
2325 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
2326 }
2327
2328 static void ath10k_dfs_radar_report(struct ath10k *ar,
2329 const struct wmi_phyerr *phyerr,
2330 const struct phyerr_radar_report *rr,
2331 u64 tsf)
2332 {
2333 u32 reg0, reg1, tsf32l;
2334 struct pulse_event pe;
2335 u64 tsf64;
2336 u8 rssi, width;
2337
2338 reg0 = __le32_to_cpu(rr->reg0);
2339 reg1 = __le32_to_cpu(rr->reg1);
2340
2341 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2342 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
2343 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
2344 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
2345 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
2346 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
2347 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2348 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
2349 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
2350 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
2351 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
2352 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
2353 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
2354 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2355 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
2356 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
2357 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
2358
2359 if (!ar->dfs_detector)
2360 return;
2361
2362 /* report event to DFS pattern detector */
2363 tsf32l = __le32_to_cpu(phyerr->tsf_timestamp);
2364 tsf64 = tsf & (~0xFFFFFFFFULL);
2365 tsf64 |= tsf32l;
2366
2367 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
2368 rssi = phyerr->rssi_combined;
2369
2370 /* hardware store this as 8 bit signed value,
2371 * set to zero if negative number
2372 */
2373 if (rssi & 0x80)
2374 rssi = 0;
2375
2376 pe.ts = tsf64;
2377 pe.freq = ar->hw->conf.chandef.chan->center_freq;
2378 pe.width = width;
2379 pe.rssi = rssi;
2380
2381 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2382 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
2383 pe.freq, pe.width, pe.rssi, pe.ts);
2384
2385 ATH10K_DFS_STAT_INC(ar, pulses_detected);
2386
2387 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
2388 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2389 "dfs no pulse pattern detected, yet\n");
2390 return;
2391 }
2392
2393 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
2394 ATH10K_DFS_STAT_INC(ar, radar_detected);
2395
2396 /* Control radar events reporting in debugfs file
2397 dfs_block_radar_events */
2398 if (ar->dfs_block_radar_events) {
2399 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
2400 return;
2401 }
2402
2403 ieee80211_radar_detected(ar->hw);
2404 }
2405
2406 static int ath10k_dfs_fft_report(struct ath10k *ar,
2407 const struct wmi_phyerr *phyerr,
2408 const struct phyerr_fft_report *fftr,
2409 u64 tsf)
2410 {
2411 u32 reg0, reg1;
2412 u8 rssi, peak_mag;
2413
2414 reg0 = __le32_to_cpu(fftr->reg0);
2415 reg1 = __le32_to_cpu(fftr->reg1);
2416 rssi = phyerr->rssi_combined;
2417
2418 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2419 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
2420 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
2421 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
2422 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
2423 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
2424 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2425 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
2426 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
2427 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
2428 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
2429 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
2430
2431 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
2432
2433 /* false event detection */
2434 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
2435 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
2436 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
2437 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
2438 return -EINVAL;
2439 }
2440
2441 return 0;
2442 }
2443
2444 void ath10k_wmi_event_dfs(struct ath10k *ar,
2445 const struct wmi_phyerr *phyerr,
2446 u64 tsf)
2447 {
2448 int buf_len, tlv_len, res, i = 0;
2449 const struct phyerr_tlv *tlv;
2450 const struct phyerr_radar_report *rr;
2451 const struct phyerr_fft_report *fftr;
2452 const u8 *tlv_buf;
2453
2454 buf_len = __le32_to_cpu(phyerr->buf_len);
2455 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2456 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
2457 phyerr->phy_err_code, phyerr->rssi_combined,
2458 __le32_to_cpu(phyerr->tsf_timestamp), tsf, buf_len);
2459
2460 /* Skip event if DFS disabled */
2461 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
2462 return;
2463
2464 ATH10K_DFS_STAT_INC(ar, pulses_total);
2465
2466 while (i < buf_len) {
2467 if (i + sizeof(*tlv) > buf_len) {
2468 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
2469 i);
2470 return;
2471 }
2472
2473 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
2474 tlv_len = __le16_to_cpu(tlv->len);
2475 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
2476 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
2477 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
2478 tlv_len, tlv->tag, tlv->sig);
2479
2480 switch (tlv->tag) {
2481 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
2482 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
2483 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
2484 i);
2485 return;
2486 }
2487
2488 rr = (struct phyerr_radar_report *)tlv_buf;
2489 ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
2490 break;
2491 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
2492 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
2493 ath10k_warn(ar, "too short fft report (%d)\n",
2494 i);
2495 return;
2496 }
2497
2498 fftr = (struct phyerr_fft_report *)tlv_buf;
2499 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
2500 if (res)
2501 return;
2502 break;
2503 }
2504
2505 i += sizeof(*tlv) + tlv_len;
2506 }
2507 }
2508
2509 void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
2510 const struct wmi_phyerr *phyerr,
2511 u64 tsf)
2512 {
2513 int buf_len, tlv_len, res, i = 0;
2514 struct phyerr_tlv *tlv;
2515 const void *tlv_buf;
2516 const struct phyerr_fft_report *fftr;
2517 size_t fftr_len;
2518
2519 buf_len = __le32_to_cpu(phyerr->buf_len);
2520
2521 while (i < buf_len) {
2522 if (i + sizeof(*tlv) > buf_len) {
2523 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
2524 i);
2525 return;
2526 }
2527
2528 tlv = (struct phyerr_tlv *)&phyerr->buf[i];
2529 tlv_len = __le16_to_cpu(tlv->len);
2530 tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
2531
2532 if (i + sizeof(*tlv) + tlv_len > buf_len) {
2533 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
2534 i);
2535 return;
2536 }
2537
2538 switch (tlv->tag) {
2539 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
2540 if (sizeof(*fftr) > tlv_len) {
2541 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
2542 i);
2543 return;
2544 }
2545
2546 fftr_len = tlv_len - sizeof(*fftr);
2547 fftr = tlv_buf;
2548 res = ath10k_spectral_process_fft(ar, phyerr,
2549 fftr, fftr_len,
2550 tsf);
2551 if (res < 0) {
2552 ath10k_warn(ar, "failed to process fft report: %d\n",
2553 res);
2554 return;
2555 }
2556 break;
2557 }
2558
2559 i += sizeof(*tlv) + tlv_len;
2560 }
2561 }
2562
2563 static int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, struct sk_buff *skb,
2564 struct wmi_phyerr_ev_arg *arg)
2565 {
2566 struct wmi_phyerr_event *ev = (void *)skb->data;
2567
2568 if (skb->len < sizeof(*ev))
2569 return -EPROTO;
2570
2571 arg->num_phyerrs = ev->num_phyerrs;
2572 arg->tsf_l32 = ev->tsf_l32;
2573 arg->tsf_u32 = ev->tsf_u32;
2574 arg->buf_len = __cpu_to_le32(skb->len - sizeof(*ev));
2575 arg->phyerrs = ev->phyerrs;
2576
2577 return 0;
2578 }
2579
2580 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
2581 {
2582 struct wmi_phyerr_ev_arg arg = {};
2583 const struct wmi_phyerr *phyerr;
2584 u32 count, i, buf_len, phy_err_code;
2585 u64 tsf;
2586 int left_len, ret;
2587
2588 ATH10K_DFS_STAT_INC(ar, phy_errors);
2589
2590 ret = ath10k_wmi_pull_phyerr(ar, skb, &arg);
2591 if (ret) {
2592 ath10k_warn(ar, "failed to parse phyerr event: %d\n", ret);
2593 return;
2594 }
2595
2596 left_len = __le32_to_cpu(arg.buf_len);
2597
2598 /* Check number of included events */
2599 count = __le32_to_cpu(arg.num_phyerrs);
2600
2601 tsf = __le32_to_cpu(arg.tsf_u32);
2602 tsf <<= 32;
2603 tsf |= __le32_to_cpu(arg.tsf_l32);
2604
2605 ath10k_dbg(ar, ATH10K_DBG_WMI,
2606 "wmi event phyerr count %d tsf64 0x%llX\n",
2607 count, tsf);
2608
2609 phyerr = arg.phyerrs;
2610 for (i = 0; i < count; i++) {
2611 /* Check if we can read event header */
2612 if (left_len < sizeof(*phyerr)) {
2613 ath10k_warn(ar, "single event (%d) wrong head len\n",
2614 i);
2615 return;
2616 }
2617
2618 left_len -= sizeof(*phyerr);
2619
2620 buf_len = __le32_to_cpu(phyerr->buf_len);
2621 phy_err_code = phyerr->phy_err_code;
2622
2623 if (left_len < buf_len) {
2624 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
2625 return;
2626 }
2627
2628 left_len -= buf_len;
2629
2630 switch (phy_err_code) {
2631 case PHY_ERROR_RADAR:
2632 ath10k_wmi_event_dfs(ar, phyerr, tsf);
2633 break;
2634 case PHY_ERROR_SPECTRAL_SCAN:
2635 ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
2636 break;
2637 case PHY_ERROR_FALSE_RADAR_EXT:
2638 ath10k_wmi_event_dfs(ar, phyerr, tsf);
2639 ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
2640 break;
2641 default:
2642 break;
2643 }
2644
2645 phyerr = (void *)phyerr + sizeof(*phyerr) + buf_len;
2646 }
2647 }
2648
2649 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
2650 {
2651 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
2652 }
2653
2654 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
2655 {
2656 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
2657 }
2658
2659 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
2660 {
2661 char buf[101], c;
2662 int i;
2663
2664 for (i = 0; i < sizeof(buf) - 1; i++) {
2665 if (i >= skb->len)
2666 break;
2667
2668 c = skb->data[i];
2669
2670 if (c == '\0')
2671 break;
2672
2673 if (isascii(c) && isprint(c))
2674 buf[i] = c;
2675 else
2676 buf[i] = '.';
2677 }
2678
2679 if (i == sizeof(buf) - 1)
2680 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2681
2682 /* for some reason the debug prints end with \n, remove that */
2683 if (skb->data[i - 1] == '\n')
2684 i--;
2685
2686 /* the last byte is always reserved for the null character */
2687 buf[i] = '\0';
2688
2689 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
2690 }
2691
2692 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
2693 {
2694 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
2695 }
2696
2697 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
2698 {
2699 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
2700 }
2701
2702 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
2703 struct sk_buff *skb)
2704 {
2705 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
2706 }
2707
2708 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
2709 struct sk_buff *skb)
2710 {
2711 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
2712 }
2713
2714 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
2715 {
2716 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
2717 }
2718
2719 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
2720 {
2721 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
2722 }
2723
2724 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
2725 {
2726 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
2727 }
2728
2729 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
2730 {
2731 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
2732 }
2733
2734 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
2735 {
2736 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
2737 }
2738
2739 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
2740 {
2741 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
2742 }
2743
2744 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
2745 {
2746 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
2747 }
2748
2749 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
2750 {
2751 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
2752 }
2753
2754 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
2755 {
2756 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
2757 }
2758
2759 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
2760 struct sk_buff *skb)
2761 {
2762 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
2763 }
2764
2765 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
2766 {
2767 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
2768 }
2769
2770 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
2771 {
2772 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
2773 }
2774
2775 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
2776 {
2777 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
2778 }
2779
2780 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
2781 u32 num_units, u32 unit_len)
2782 {
2783 dma_addr_t paddr;
2784 u32 pool_size;
2785 int idx = ar->wmi.num_mem_chunks;
2786
2787 pool_size = num_units * round_up(unit_len, 4);
2788
2789 if (!pool_size)
2790 return -EINVAL;
2791
2792 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
2793 pool_size,
2794 &paddr,
2795 GFP_ATOMIC);
2796 if (!ar->wmi.mem_chunks[idx].vaddr) {
2797 ath10k_warn(ar, "failed to allocate memory chunk\n");
2798 return -ENOMEM;
2799 }
2800
2801 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
2802
2803 ar->wmi.mem_chunks[idx].paddr = paddr;
2804 ar->wmi.mem_chunks[idx].len = pool_size;
2805 ar->wmi.mem_chunks[idx].req_id = req_id;
2806 ar->wmi.num_mem_chunks++;
2807
2808 return 0;
2809 }
2810
2811 static int
2812 ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
2813 struct wmi_svc_rdy_ev_arg *arg)
2814 {
2815 struct wmi_service_ready_event *ev;
2816 size_t i, n;
2817
2818 if (skb->len < sizeof(*ev))
2819 return -EPROTO;
2820
2821 ev = (void *)skb->data;
2822 skb_pull(skb, sizeof(*ev));
2823 arg->min_tx_power = ev->hw_min_tx_power;
2824 arg->max_tx_power = ev->hw_max_tx_power;
2825 arg->ht_cap = ev->ht_cap_info;
2826 arg->vht_cap = ev->vht_cap_info;
2827 arg->sw_ver0 = ev->sw_version;
2828 arg->sw_ver1 = ev->sw_version_1;
2829 arg->phy_capab = ev->phy_capability;
2830 arg->num_rf_chains = ev->num_rf_chains;
2831 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
2832 arg->num_mem_reqs = ev->num_mem_reqs;
2833 arg->service_map = ev->wmi_service_bitmap;
2834 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
2835
2836 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
2837 ARRAY_SIZE(arg->mem_reqs));
2838 for (i = 0; i < n; i++)
2839 arg->mem_reqs[i] = &ev->mem_reqs[i];
2840
2841 if (skb->len <
2842 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
2843 return -EPROTO;
2844
2845 return 0;
2846 }
2847
2848 static int
2849 ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
2850 struct wmi_svc_rdy_ev_arg *arg)
2851 {
2852 struct wmi_10x_service_ready_event *ev;
2853 int i, n;
2854
2855 if (skb->len < sizeof(*ev))
2856 return -EPROTO;
2857
2858 ev = (void *)skb->data;
2859 skb_pull(skb, sizeof(*ev));
2860 arg->min_tx_power = ev->hw_min_tx_power;
2861 arg->max_tx_power = ev->hw_max_tx_power;
2862 arg->ht_cap = ev->ht_cap_info;
2863 arg->vht_cap = ev->vht_cap_info;
2864 arg->sw_ver0 = ev->sw_version;
2865 arg->phy_capab = ev->phy_capability;
2866 arg->num_rf_chains = ev->num_rf_chains;
2867 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
2868 arg->num_mem_reqs = ev->num_mem_reqs;
2869 arg->service_map = ev->wmi_service_bitmap;
2870 arg->service_map_len = sizeof(ev->wmi_service_bitmap);
2871
2872 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
2873 ARRAY_SIZE(arg->mem_reqs));
2874 for (i = 0; i < n; i++)
2875 arg->mem_reqs[i] = &ev->mem_reqs[i];
2876
2877 if (skb->len <
2878 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
2879 return -EPROTO;
2880
2881 return 0;
2882 }
2883
2884 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
2885 {
2886 struct wmi_svc_rdy_ev_arg arg = {};
2887 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
2888 int ret;
2889
2890 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
2891 if (ret) {
2892 ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
2893 return;
2894 }
2895
2896 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
2897 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
2898 arg.service_map_len);
2899
2900 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
2901 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
2902 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
2903 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
2904 ar->fw_version_major =
2905 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
2906 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
2907 ar->fw_version_release =
2908 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
2909 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
2910 ar->phy_capability = __le32_to_cpu(arg.phy_capab);
2911 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
2912 ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
2913
2914 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
2915 arg.service_map, arg.service_map_len);
2916
2917 /* only manually set fw features when not using FW IE format */
2918 if (ar->fw_api == 1 && ar->fw_version_build > 636)
2919 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
2920
2921 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
2922 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
2923 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
2924 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
2925 }
2926
2927 ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1;
2928 ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1;
2929
2930 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2931 snprintf(ar->hw->wiphy->fw_version,
2932 sizeof(ar->hw->wiphy->fw_version),
2933 "%u.%u.%u.%u",
2934 ar->fw_version_major,
2935 ar->fw_version_minor,
2936 ar->fw_version_release,
2937 ar->fw_version_build);
2938 }
2939
2940 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
2941 if (num_mem_reqs > WMI_MAX_MEM_REQS) {
2942 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
2943 num_mem_reqs);
2944 return;
2945 }
2946
2947 for (i = 0; i < num_mem_reqs; ++i) {
2948 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
2949 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
2950 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
2951 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
2952
2953 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
2954 /* number of units to allocate is number of
2955 * peers, 1 extra for self peer on target */
2956 /* this needs to be tied, host and target
2957 * can get out of sync */
2958 num_units = TARGET_10X_NUM_PEERS + 1;
2959 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
2960 num_units = TARGET_10X_NUM_VDEVS + 1;
2961
2962 ath10k_dbg(ar, ATH10K_DBG_WMI,
2963 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
2964 req_id,
2965 __le32_to_cpu(arg.mem_reqs[i]->num_units),
2966 num_unit_info,
2967 unit_size,
2968 num_units);
2969
2970 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2971 unit_size);
2972 if (ret)
2973 return;
2974 }
2975
2976 ath10k_dbg(ar, ATH10K_DBG_WMI,
2977 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
2978 __le32_to_cpu(arg.min_tx_power),
2979 __le32_to_cpu(arg.max_tx_power),
2980 __le32_to_cpu(arg.ht_cap),
2981 __le32_to_cpu(arg.vht_cap),
2982 __le32_to_cpu(arg.sw_ver0),
2983 __le32_to_cpu(arg.sw_ver1),
2984 __le32_to_cpu(arg.fw_build),
2985 __le32_to_cpu(arg.phy_capab),
2986 __le32_to_cpu(arg.num_rf_chains),
2987 __le32_to_cpu(arg.eeprom_rd),
2988 __le32_to_cpu(arg.num_mem_reqs));
2989
2990 complete(&ar->wmi.service_ready);
2991 }
2992
2993 static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
2994 struct wmi_rdy_ev_arg *arg)
2995 {
2996 struct wmi_ready_event *ev = (void *)skb->data;
2997
2998 if (skb->len < sizeof(*ev))
2999 return -EPROTO;
3000
3001 skb_pull(skb, sizeof(*ev));
3002 arg->sw_version = ev->sw_version;
3003 arg->abi_version = ev->abi_version;
3004 arg->status = ev->status;
3005 arg->mac_addr = ev->mac_addr.addr;
3006
3007 return 0;
3008 }
3009
3010 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
3011 {
3012 struct wmi_rdy_ev_arg arg = {};
3013 int ret;
3014
3015 ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
3016 if (ret) {
3017 ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
3018 return ret;
3019 }
3020
3021 ath10k_dbg(ar, ATH10K_DBG_WMI,
3022 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
3023 __le32_to_cpu(arg.sw_version),
3024 __le32_to_cpu(arg.abi_version),
3025 arg.mac_addr,
3026 __le32_to_cpu(arg.status));
3027
3028 ether_addr_copy(ar->mac_addr, arg.mac_addr);
3029 complete(&ar->wmi.unified_ready);
3030 return 0;
3031 }
3032
3033 static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
3034 {
3035 const struct wmi_pdev_temperature_event *ev;
3036
3037 ev = (struct wmi_pdev_temperature_event *)skb->data;
3038 if (WARN_ON(skb->len < sizeof(*ev)))
3039 return -EPROTO;
3040
3041 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
3042 return 0;
3043 }
3044
3045 static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
3046 {
3047 struct wmi_cmd_hdr *cmd_hdr;
3048 enum wmi_event_id id;
3049
3050 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
3051 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
3052
3053 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
3054 return;
3055
3056 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
3057
3058 switch (id) {
3059 case WMI_MGMT_RX_EVENTID:
3060 ath10k_wmi_event_mgmt_rx(ar, skb);
3061 /* mgmt_rx() owns the skb now! */
3062 return;
3063 case WMI_SCAN_EVENTID:
3064 ath10k_wmi_event_scan(ar, skb);
3065 break;
3066 case WMI_CHAN_INFO_EVENTID:
3067 ath10k_wmi_event_chan_info(ar, skb);
3068 break;
3069 case WMI_ECHO_EVENTID:
3070 ath10k_wmi_event_echo(ar, skb);
3071 break;
3072 case WMI_DEBUG_MESG_EVENTID:
3073 ath10k_wmi_event_debug_mesg(ar, skb);
3074 break;
3075 case WMI_UPDATE_STATS_EVENTID:
3076 ath10k_wmi_event_update_stats(ar, skb);
3077 break;
3078 case WMI_VDEV_START_RESP_EVENTID:
3079 ath10k_wmi_event_vdev_start_resp(ar, skb);
3080 break;
3081 case WMI_VDEV_STOPPED_EVENTID:
3082 ath10k_wmi_event_vdev_stopped(ar, skb);
3083 break;
3084 case WMI_PEER_STA_KICKOUT_EVENTID:
3085 ath10k_wmi_event_peer_sta_kickout(ar, skb);
3086 break;
3087 case WMI_HOST_SWBA_EVENTID:
3088 ath10k_wmi_event_host_swba(ar, skb);
3089 break;
3090 case WMI_TBTTOFFSET_UPDATE_EVENTID:
3091 ath10k_wmi_event_tbttoffset_update(ar, skb);
3092 break;
3093 case WMI_PHYERR_EVENTID:
3094 ath10k_wmi_event_phyerr(ar, skb);
3095 break;
3096 case WMI_ROAM_EVENTID:
3097 ath10k_wmi_event_roam(ar, skb);
3098 break;
3099 case WMI_PROFILE_MATCH:
3100 ath10k_wmi_event_profile_match(ar, skb);
3101 break;
3102 case WMI_DEBUG_PRINT_EVENTID:
3103 ath10k_wmi_event_debug_print(ar, skb);
3104 break;
3105 case WMI_PDEV_QVIT_EVENTID:
3106 ath10k_wmi_event_pdev_qvit(ar, skb);
3107 break;
3108 case WMI_WLAN_PROFILE_DATA_EVENTID:
3109 ath10k_wmi_event_wlan_profile_data(ar, skb);
3110 break;
3111 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
3112 ath10k_wmi_event_rtt_measurement_report(ar, skb);
3113 break;
3114 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
3115 ath10k_wmi_event_tsf_measurement_report(ar, skb);
3116 break;
3117 case WMI_RTT_ERROR_REPORT_EVENTID:
3118 ath10k_wmi_event_rtt_error_report(ar, skb);
3119 break;
3120 case WMI_WOW_WAKEUP_HOST_EVENTID:
3121 ath10k_wmi_event_wow_wakeup_host(ar, skb);
3122 break;
3123 case WMI_DCS_INTERFERENCE_EVENTID:
3124 ath10k_wmi_event_dcs_interference(ar, skb);
3125 break;
3126 case WMI_PDEV_TPC_CONFIG_EVENTID:
3127 ath10k_wmi_event_pdev_tpc_config(ar, skb);
3128 break;
3129 case WMI_PDEV_FTM_INTG_EVENTID:
3130 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
3131 break;
3132 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
3133 ath10k_wmi_event_gtk_offload_status(ar, skb);
3134 break;
3135 case WMI_GTK_REKEY_FAIL_EVENTID:
3136 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
3137 break;
3138 case WMI_TX_DELBA_COMPLETE_EVENTID:
3139 ath10k_wmi_event_delba_complete(ar, skb);
3140 break;
3141 case WMI_TX_ADDBA_COMPLETE_EVENTID:
3142 ath10k_wmi_event_addba_complete(ar, skb);
3143 break;
3144 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
3145 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
3146 break;
3147 case WMI_SERVICE_READY_EVENTID:
3148 ath10k_wmi_event_service_ready(ar, skb);
3149 break;
3150 case WMI_READY_EVENTID:
3151 ath10k_wmi_event_ready(ar, skb);
3152 break;
3153 default:
3154 ath10k_warn(ar, "Unknown eventid: %d\n", id);
3155 break;
3156 }
3157
3158 dev_kfree_skb(skb);
3159 }
3160
3161 static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
3162 {
3163 struct wmi_cmd_hdr *cmd_hdr;
3164 enum wmi_10x_event_id id;
3165 bool consumed;
3166
3167 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
3168 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
3169
3170 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
3171 return;
3172
3173 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
3174
3175 consumed = ath10k_tm_event_wmi(ar, id, skb);
3176
3177 /* Ready event must be handled normally also in UTF mode so that we
3178 * know the UTF firmware has booted, others we are just bypass WMI
3179 * events to testmode.
3180 */
3181 if (consumed && id != WMI_10X_READY_EVENTID) {
3182 ath10k_dbg(ar, ATH10K_DBG_WMI,
3183 "wmi testmode consumed 0x%x\n", id);
3184 goto out;
3185 }
3186
3187 switch (id) {
3188 case WMI_10X_MGMT_RX_EVENTID:
3189 ath10k_wmi_event_mgmt_rx(ar, skb);
3190 /* mgmt_rx() owns the skb now! */
3191 return;
3192 case WMI_10X_SCAN_EVENTID:
3193 ath10k_wmi_event_scan(ar, skb);
3194 break;
3195 case WMI_10X_CHAN_INFO_EVENTID:
3196 ath10k_wmi_event_chan_info(ar, skb);
3197 break;
3198 case WMI_10X_ECHO_EVENTID:
3199 ath10k_wmi_event_echo(ar, skb);
3200 break;
3201 case WMI_10X_DEBUG_MESG_EVENTID:
3202 ath10k_wmi_event_debug_mesg(ar, skb);
3203 break;
3204 case WMI_10X_UPDATE_STATS_EVENTID:
3205 ath10k_wmi_event_update_stats(ar, skb);
3206 break;
3207 case WMI_10X_VDEV_START_RESP_EVENTID:
3208 ath10k_wmi_event_vdev_start_resp(ar, skb);
3209 break;
3210 case WMI_10X_VDEV_STOPPED_EVENTID:
3211 ath10k_wmi_event_vdev_stopped(ar, skb);
3212 break;
3213 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
3214 ath10k_wmi_event_peer_sta_kickout(ar, skb);
3215 break;
3216 case WMI_10X_HOST_SWBA_EVENTID:
3217 ath10k_wmi_event_host_swba(ar, skb);
3218 break;
3219 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
3220 ath10k_wmi_event_tbttoffset_update(ar, skb);
3221 break;
3222 case WMI_10X_PHYERR_EVENTID:
3223 ath10k_wmi_event_phyerr(ar, skb);
3224 break;
3225 case WMI_10X_ROAM_EVENTID:
3226 ath10k_wmi_event_roam(ar, skb);
3227 break;
3228 case WMI_10X_PROFILE_MATCH:
3229 ath10k_wmi_event_profile_match(ar, skb);
3230 break;
3231 case WMI_10X_DEBUG_PRINT_EVENTID:
3232 ath10k_wmi_event_debug_print(ar, skb);
3233 break;
3234 case WMI_10X_PDEV_QVIT_EVENTID:
3235 ath10k_wmi_event_pdev_qvit(ar, skb);
3236 break;
3237 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
3238 ath10k_wmi_event_wlan_profile_data(ar, skb);
3239 break;
3240 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
3241 ath10k_wmi_event_rtt_measurement_report(ar, skb);
3242 break;
3243 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
3244 ath10k_wmi_event_tsf_measurement_report(ar, skb);
3245 break;
3246 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
3247 ath10k_wmi_event_rtt_error_report(ar, skb);
3248 break;
3249 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
3250 ath10k_wmi_event_wow_wakeup_host(ar, skb);
3251 break;
3252 case WMI_10X_DCS_INTERFERENCE_EVENTID:
3253 ath10k_wmi_event_dcs_interference(ar, skb);
3254 break;
3255 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
3256 ath10k_wmi_event_pdev_tpc_config(ar, skb);
3257 break;
3258 case WMI_10X_INST_RSSI_STATS_EVENTID:
3259 ath10k_wmi_event_inst_rssi_stats(ar, skb);
3260 break;
3261 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
3262 ath10k_wmi_event_vdev_standby_req(ar, skb);
3263 break;
3264 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
3265 ath10k_wmi_event_vdev_resume_req(ar, skb);
3266 break;
3267 case WMI_10X_SERVICE_READY_EVENTID:
3268 ath10k_wmi_event_service_ready(ar, skb);
3269 break;
3270 case WMI_10X_READY_EVENTID:
3271 ath10k_wmi_event_ready(ar, skb);
3272 break;
3273 case WMI_10X_PDEV_UTF_EVENTID:
3274 /* ignore utf events */
3275 break;
3276 default:
3277 ath10k_warn(ar, "Unknown eventid: %d\n", id);
3278 break;
3279 }
3280
3281 out:
3282 dev_kfree_skb(skb);
3283 }
3284
3285 static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
3286 {
3287 struct wmi_cmd_hdr *cmd_hdr;
3288 enum wmi_10_2_event_id id;
3289
3290 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
3291 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
3292
3293 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
3294 return;
3295
3296 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
3297
3298 switch (id) {
3299 case WMI_10_2_MGMT_RX_EVENTID:
3300 ath10k_wmi_event_mgmt_rx(ar, skb);
3301 /* mgmt_rx() owns the skb now! */
3302 return;
3303 case WMI_10_2_SCAN_EVENTID:
3304 ath10k_wmi_event_scan(ar, skb);
3305 break;
3306 case WMI_10_2_CHAN_INFO_EVENTID:
3307 ath10k_wmi_event_chan_info(ar, skb);
3308 break;
3309 case WMI_10_2_ECHO_EVENTID:
3310 ath10k_wmi_event_echo(ar, skb);
3311 break;
3312 case WMI_10_2_DEBUG_MESG_EVENTID:
3313 ath10k_wmi_event_debug_mesg(ar, skb);
3314 break;
3315 case WMI_10_2_UPDATE_STATS_EVENTID:
3316 ath10k_wmi_event_update_stats(ar, skb);
3317 break;
3318 case WMI_10_2_VDEV_START_RESP_EVENTID:
3319 ath10k_wmi_event_vdev_start_resp(ar, skb);
3320 break;
3321 case WMI_10_2_VDEV_STOPPED_EVENTID:
3322 ath10k_wmi_event_vdev_stopped(ar, skb);
3323 break;
3324 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
3325 ath10k_wmi_event_peer_sta_kickout(ar, skb);
3326 break;
3327 case WMI_10_2_HOST_SWBA_EVENTID:
3328 ath10k_wmi_event_host_swba(ar, skb);
3329 break;
3330 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
3331 ath10k_wmi_event_tbttoffset_update(ar, skb);
3332 break;
3333 case WMI_10_2_PHYERR_EVENTID:
3334 ath10k_wmi_event_phyerr(ar, skb);
3335 break;
3336 case WMI_10_2_ROAM_EVENTID:
3337 ath10k_wmi_event_roam(ar, skb);
3338 break;
3339 case WMI_10_2_PROFILE_MATCH:
3340 ath10k_wmi_event_profile_match(ar, skb);
3341 break;
3342 case WMI_10_2_DEBUG_PRINT_EVENTID:
3343 ath10k_wmi_event_debug_print(ar, skb);
3344 break;
3345 case WMI_10_2_PDEV_QVIT_EVENTID:
3346 ath10k_wmi_event_pdev_qvit(ar, skb);
3347 break;
3348 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
3349 ath10k_wmi_event_wlan_profile_data(ar, skb);
3350 break;
3351 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
3352 ath10k_wmi_event_rtt_measurement_report(ar, skb);
3353 break;
3354 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
3355 ath10k_wmi_event_tsf_measurement_report(ar, skb);
3356 break;
3357 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
3358 ath10k_wmi_event_rtt_error_report(ar, skb);
3359 break;
3360 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
3361 ath10k_wmi_event_wow_wakeup_host(ar, skb);
3362 break;
3363 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
3364 ath10k_wmi_event_dcs_interference(ar, skb);
3365 break;
3366 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
3367 ath10k_wmi_event_pdev_tpc_config(ar, skb);
3368 break;
3369 case WMI_10_2_INST_RSSI_STATS_EVENTID:
3370 ath10k_wmi_event_inst_rssi_stats(ar, skb);
3371 break;
3372 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
3373 ath10k_wmi_event_vdev_standby_req(ar, skb);
3374 break;
3375 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
3376 ath10k_wmi_event_vdev_resume_req(ar, skb);
3377 break;
3378 case WMI_10_2_SERVICE_READY_EVENTID:
3379 ath10k_wmi_event_service_ready(ar, skb);
3380 break;
3381 case WMI_10_2_READY_EVENTID:
3382 ath10k_wmi_event_ready(ar, skb);
3383 break;
3384 case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
3385 ath10k_wmi_event_temperature(ar, skb);
3386 break;
3387 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
3388 case WMI_10_2_GPIO_INPUT_EVENTID:
3389 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
3390 case WMI_10_2_GENERIC_BUFFER_EVENTID:
3391 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
3392 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
3393 case WMI_10_2_WDS_PEER_EVENTID:
3394 ath10k_dbg(ar, ATH10K_DBG_WMI,
3395 "received event id %d not implemented\n", id);
3396 break;
3397 default:
3398 ath10k_warn(ar, "Unknown eventid: %d\n", id);
3399 break;
3400 }
3401
3402 dev_kfree_skb(skb);
3403 }
3404
3405 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
3406 {
3407 int ret;
3408
3409 ret = ath10k_wmi_rx(ar, skb);
3410 if (ret)
3411 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
3412 }
3413
3414 int ath10k_wmi_connect(struct ath10k *ar)
3415 {
3416 int status;
3417 struct ath10k_htc_svc_conn_req conn_req;
3418 struct ath10k_htc_svc_conn_resp conn_resp;
3419
3420 memset(&conn_req, 0, sizeof(conn_req));
3421 memset(&conn_resp, 0, sizeof(conn_resp));
3422
3423 /* these fields are the same for all service endpoints */
3424 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
3425 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
3426 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
3427
3428 /* connect to control service */
3429 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
3430
3431 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
3432 if (status) {
3433 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
3434 status);
3435 return status;
3436 }
3437
3438 ar->wmi.eid = conn_resp.eid;
3439 return 0;
3440 }
3441
3442 static struct sk_buff *
3443 ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
3444 u16 ctl2g, u16 ctl5g,
3445 enum wmi_dfs_region dfs_reg)
3446 {
3447 struct wmi_pdev_set_regdomain_cmd *cmd;
3448 struct sk_buff *skb;
3449
3450 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3451 if (!skb)
3452 return ERR_PTR(-ENOMEM);
3453
3454 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
3455 cmd->reg_domain = __cpu_to_le32(rd);
3456 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
3457 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
3458 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
3459 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
3460
3461 ath10k_dbg(ar, ATH10K_DBG_WMI,
3462 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
3463 rd, rd2g, rd5g, ctl2g, ctl5g);
3464 return skb;
3465 }
3466
3467 static struct sk_buff *
3468 ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
3469 rd5g, u16 ctl2g, u16 ctl5g,
3470 enum wmi_dfs_region dfs_reg)
3471 {
3472 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
3473 struct sk_buff *skb;
3474
3475 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3476 if (!skb)
3477 return ERR_PTR(-ENOMEM);
3478
3479 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
3480 cmd->reg_domain = __cpu_to_le32(rd);
3481 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
3482 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
3483 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
3484 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
3485 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
3486
3487 ath10k_dbg(ar, ATH10K_DBG_WMI,
3488 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
3489 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
3490 return skb;
3491 }
3492
3493 static struct sk_buff *
3494 ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
3495 {
3496 struct wmi_pdev_suspend_cmd *cmd;
3497 struct sk_buff *skb;
3498
3499 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3500 if (!skb)
3501 return ERR_PTR(-ENOMEM);
3502
3503 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
3504 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
3505
3506 return skb;
3507 }
3508
3509 static struct sk_buff *
3510 ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
3511 {
3512 struct sk_buff *skb;
3513
3514 skb = ath10k_wmi_alloc_skb(ar, 0);
3515 if (!skb)
3516 return ERR_PTR(-ENOMEM);
3517
3518 return skb;
3519 }
3520
3521 static struct sk_buff *
3522 ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
3523 {
3524 struct wmi_pdev_set_param_cmd *cmd;
3525 struct sk_buff *skb;
3526
3527 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
3528 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
3529 id);
3530 return ERR_PTR(-EOPNOTSUPP);
3531 }
3532
3533 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3534 if (!skb)
3535 return ERR_PTR(-ENOMEM);
3536
3537 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
3538 cmd->param_id = __cpu_to_le32(id);
3539 cmd->param_value = __cpu_to_le32(value);
3540
3541 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
3542 id, value);
3543 return skb;
3544 }
3545
3546 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
3547 struct wmi_host_mem_chunks *chunks)
3548 {
3549 struct host_memory_chunk *chunk;
3550 int i;
3551
3552 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
3553
3554 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3555 chunk = &chunks->items[i];
3556 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3557 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3558 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3559
3560 ath10k_dbg(ar, ATH10K_DBG_WMI,
3561 "wmi chunk %d len %d requested, addr 0x%llx\n",
3562 i,
3563 ar->wmi.mem_chunks[i].len,
3564 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
3565 }
3566 }
3567
3568 static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
3569 {
3570 struct wmi_init_cmd *cmd;
3571 struct sk_buff *buf;
3572 struct wmi_resource_config config = {};
3573 u32 len, val;
3574
3575 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
3576 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
3577 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
3578
3579 config.num_offload_reorder_bufs =
3580 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
3581
3582 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
3583 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
3584 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
3585 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
3586 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
3587 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3588 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3589 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
3590 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
3591 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
3592
3593 config.scan_max_pending_reqs =
3594 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
3595
3596 config.bmiss_offload_max_vdev =
3597 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
3598
3599 config.roam_offload_max_vdev =
3600 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
3601
3602 config.roam_offload_max_ap_profiles =
3603 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
3604
3605 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
3606 config.num_mcast_table_elems =
3607 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
3608
3609 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
3610 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
3611 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
3612 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
3613 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
3614
3615 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3616 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3617
3618 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
3619
3620 config.gtk_offload_max_vdev =
3621 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
3622
3623 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
3624 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
3625
3626 len = sizeof(*cmd) +
3627 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3628
3629 buf = ath10k_wmi_alloc_skb(ar, len);
3630 if (!buf)
3631 return ERR_PTR(-ENOMEM);
3632
3633 cmd = (struct wmi_init_cmd *)buf->data;
3634
3635 memcpy(&cmd->resource_config, &config, sizeof(config));
3636 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
3637
3638 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
3639 return buf;
3640 }
3641
3642 static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
3643 {
3644 struct wmi_init_cmd_10x *cmd;
3645 struct sk_buff *buf;
3646 struct wmi_resource_config_10x config = {};
3647 u32 len, val;
3648
3649 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3650 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3651 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3652 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3653 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3654 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3655 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3656 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3657 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3658 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3659 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3660 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3661
3662 config.scan_max_pending_reqs =
3663 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3664
3665 config.bmiss_offload_max_vdev =
3666 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3667
3668 config.roam_offload_max_vdev =
3669 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3670
3671 config.roam_offload_max_ap_profiles =
3672 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3673
3674 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3675 config.num_mcast_table_elems =
3676 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3677
3678 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3679 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3680 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3681 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3682 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3683
3684 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3685 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3686
3687 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3688
3689 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3690 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3691
3692 len = sizeof(*cmd) +
3693 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3694
3695 buf = ath10k_wmi_alloc_skb(ar, len);
3696 if (!buf)
3697 return ERR_PTR(-ENOMEM);
3698
3699 cmd = (struct wmi_init_cmd_10x *)buf->data;
3700
3701 memcpy(&cmd->resource_config, &config, sizeof(config));
3702 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
3703
3704 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
3705 return buf;
3706 }
3707
3708 static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
3709 {
3710 struct wmi_init_cmd_10_2 *cmd;
3711 struct sk_buff *buf;
3712 struct wmi_resource_config_10x config = {};
3713 u32 len, val, features;
3714
3715 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3716 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3717 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3718 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3719 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3720 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3721 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3722 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3723 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3724 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3725 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3726 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3727
3728 config.scan_max_pending_reqs =
3729 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3730
3731 config.bmiss_offload_max_vdev =
3732 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3733
3734 config.roam_offload_max_vdev =
3735 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3736
3737 config.roam_offload_max_ap_profiles =
3738 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3739
3740 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3741 config.num_mcast_table_elems =
3742 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3743
3744 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3745 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3746 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3747 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
3748 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3749
3750 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3751 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3752
3753 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3754
3755 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3756 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3757
3758 len = sizeof(*cmd) +
3759 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3760
3761 buf = ath10k_wmi_alloc_skb(ar, len);
3762 if (!buf)
3763 return ERR_PTR(-ENOMEM);
3764
3765 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
3766
3767 features = WMI_10_2_RX_BATCH_MODE;
3768 cmd->resource_config.feature_mask = __cpu_to_le32(features);
3769
3770 memcpy(&cmd->resource_config.common, &config, sizeof(config));
3771 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
3772
3773 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
3774 return buf;
3775 }
3776
3777 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
3778 {
3779 if (arg->ie_len && !arg->ie)
3780 return -EINVAL;
3781 if (arg->n_channels && !arg->channels)
3782 return -EINVAL;
3783 if (arg->n_ssids && !arg->ssids)
3784 return -EINVAL;
3785 if (arg->n_bssids && !arg->bssids)
3786 return -EINVAL;
3787
3788 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
3789 return -EINVAL;
3790 if (arg->n_channels > ARRAY_SIZE(arg->channels))
3791 return -EINVAL;
3792 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
3793 return -EINVAL;
3794 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
3795 return -EINVAL;
3796
3797 return 0;
3798 }
3799
3800 static size_t
3801 ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
3802 {
3803 int len = 0;
3804
3805 if (arg->ie_len) {
3806 len += sizeof(struct wmi_ie_data);
3807 len += roundup(arg->ie_len, 4);
3808 }
3809
3810 if (arg->n_channels) {
3811 len += sizeof(struct wmi_chan_list);
3812 len += sizeof(__le32) * arg->n_channels;
3813 }
3814
3815 if (arg->n_ssids) {
3816 len += sizeof(struct wmi_ssid_list);
3817 len += sizeof(struct wmi_ssid) * arg->n_ssids;
3818 }
3819
3820 if (arg->n_bssids) {
3821 len += sizeof(struct wmi_bssid_list);
3822 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3823 }
3824
3825 return len;
3826 }
3827
3828 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
3829 const struct wmi_start_scan_arg *arg)
3830 {
3831 u32 scan_id;
3832 u32 scan_req_id;
3833
3834 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
3835 scan_id |= arg->scan_id;
3836
3837 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3838 scan_req_id |= arg->scan_req_id;
3839
3840 cmn->scan_id = __cpu_to_le32(scan_id);
3841 cmn->scan_req_id = __cpu_to_le32(scan_req_id);
3842 cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
3843 cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
3844 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
3845 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
3846 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
3847 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
3848 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
3849 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
3850 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
3851 cmn->idle_time = __cpu_to_le32(arg->idle_time);
3852 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
3853 cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
3854 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
3855 }
3856
3857 static void
3858 ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
3859 const struct wmi_start_scan_arg *arg)
3860 {
3861 struct wmi_ie_data *ie;
3862 struct wmi_chan_list *channels;
3863 struct wmi_ssid_list *ssids;
3864 struct wmi_bssid_list *bssids;
3865 void *ptr = tlvs->tlvs;
3866 int i;
3867
3868 if (arg->n_channels) {
3869 channels = ptr;
3870 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
3871 channels->num_chan = __cpu_to_le32(arg->n_channels);
3872
3873 for (i = 0; i < arg->n_channels; i++)
3874 channels->channel_list[i].freq =
3875 __cpu_to_le16(arg->channels[i]);
3876
3877 ptr += sizeof(*channels);
3878 ptr += sizeof(__le32) * arg->n_channels;
3879 }
3880
3881 if (arg->n_ssids) {
3882 ssids = ptr;
3883 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
3884 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
3885
3886 for (i = 0; i < arg->n_ssids; i++) {
3887 ssids->ssids[i].ssid_len =
3888 __cpu_to_le32(arg->ssids[i].len);
3889 memcpy(&ssids->ssids[i].ssid,
3890 arg->ssids[i].ssid,
3891 arg->ssids[i].len);
3892 }
3893
3894 ptr += sizeof(*ssids);
3895 ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
3896 }
3897
3898 if (arg->n_bssids) {
3899 bssids = ptr;
3900 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
3901 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
3902
3903 for (i = 0; i < arg->n_bssids; i++)
3904 memcpy(&bssids->bssid_list[i],
3905 arg->bssids[i].bssid,
3906 ETH_ALEN);
3907
3908 ptr += sizeof(*bssids);
3909 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3910 }
3911
3912 if (arg->ie_len) {
3913 ie = ptr;
3914 ie->tag = __cpu_to_le32(WMI_IE_TAG);
3915 ie->ie_len = __cpu_to_le32(arg->ie_len);
3916 memcpy(ie->ie_data, arg->ie, arg->ie_len);
3917
3918 ptr += sizeof(*ie);
3919 ptr += roundup(arg->ie_len, 4);
3920 }
3921 }
3922
3923 static struct sk_buff *
3924 ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
3925 const struct wmi_start_scan_arg *arg)
3926 {
3927 struct wmi_start_scan_cmd *cmd;
3928 struct sk_buff *skb;
3929 size_t len;
3930 int ret;
3931
3932 ret = ath10k_wmi_start_scan_verify(arg);
3933 if (ret)
3934 return ERR_PTR(ret);
3935
3936 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
3937 skb = ath10k_wmi_alloc_skb(ar, len);
3938 if (!skb)
3939 return ERR_PTR(-ENOMEM);
3940
3941 cmd = (struct wmi_start_scan_cmd *)skb->data;
3942
3943 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
3944 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
3945
3946 cmd->burst_duration_ms = __cpu_to_le32(0);
3947
3948 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
3949 return skb;
3950 }
3951
3952 static struct sk_buff *
3953 ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
3954 const struct wmi_start_scan_arg *arg)
3955 {
3956 struct wmi_10x_start_scan_cmd *cmd;
3957 struct sk_buff *skb;
3958 size_t len;
3959 int ret;
3960
3961 ret = ath10k_wmi_start_scan_verify(arg);
3962 if (ret)
3963 return ERR_PTR(ret);
3964
3965 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
3966 skb = ath10k_wmi_alloc_skb(ar, len);
3967 if (!skb)
3968 return ERR_PTR(-ENOMEM);
3969
3970 cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
3971
3972 ath10k_wmi_put_start_scan_common(&cmd->common, arg);
3973 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
3974
3975 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
3976 return skb;
3977 }
3978
3979 void ath10k_wmi_start_scan_init(struct ath10k *ar,
3980 struct wmi_start_scan_arg *arg)
3981 {
3982 /* setup commonly used values */
3983 arg->scan_req_id = 1;
3984 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
3985 arg->dwell_time_active = 50;
3986 arg->dwell_time_passive = 150;
3987 arg->min_rest_time = 50;
3988 arg->max_rest_time = 500;
3989 arg->repeat_probe_time = 0;
3990 arg->probe_spacing_time = 0;
3991 arg->idle_time = 0;
3992 arg->max_scan_time = 20000;
3993 arg->probe_delay = 5;
3994 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
3995 | WMI_SCAN_EVENT_COMPLETED
3996 | WMI_SCAN_EVENT_BSS_CHANNEL
3997 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
3998 | WMI_SCAN_EVENT_DEQUEUED;
3999 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
4000 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
4001 arg->n_bssids = 1;
4002 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
4003 }
4004
4005 static struct sk_buff *
4006 ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
4007 const struct wmi_stop_scan_arg *arg)
4008 {
4009 struct wmi_stop_scan_cmd *cmd;
4010 struct sk_buff *skb;
4011 u32 scan_id;
4012 u32 req_id;
4013
4014 if (arg->req_id > 0xFFF)
4015 return ERR_PTR(-EINVAL);
4016 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
4017 return ERR_PTR(-EINVAL);
4018
4019 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4020 if (!skb)
4021 return ERR_PTR(-ENOMEM);
4022
4023 scan_id = arg->u.scan_id;
4024 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
4025
4026 req_id = arg->req_id;
4027 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
4028
4029 cmd = (struct wmi_stop_scan_cmd *)skb->data;
4030 cmd->req_type = __cpu_to_le32(arg->req_type);
4031 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
4032 cmd->scan_id = __cpu_to_le32(scan_id);
4033 cmd->scan_req_id = __cpu_to_le32(req_id);
4034
4035 ath10k_dbg(ar, ATH10K_DBG_WMI,
4036 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
4037 arg->req_id, arg->req_type, arg->u.scan_id);
4038 return skb;
4039 }
4040
4041 static struct sk_buff *
4042 ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
4043 enum wmi_vdev_type type,
4044 enum wmi_vdev_subtype subtype,
4045 const u8 macaddr[ETH_ALEN])
4046 {
4047 struct wmi_vdev_create_cmd *cmd;
4048 struct sk_buff *skb;
4049
4050 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4051 if (!skb)
4052 return ERR_PTR(-ENOMEM);
4053
4054 cmd = (struct wmi_vdev_create_cmd *)skb->data;
4055 cmd->vdev_id = __cpu_to_le32(vdev_id);
4056 cmd->vdev_type = __cpu_to_le32(type);
4057 cmd->vdev_subtype = __cpu_to_le32(subtype);
4058 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
4059
4060 ath10k_dbg(ar, ATH10K_DBG_WMI,
4061 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
4062 vdev_id, type, subtype, macaddr);
4063 return skb;
4064 }
4065
4066 static struct sk_buff *
4067 ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
4068 {
4069 struct wmi_vdev_delete_cmd *cmd;
4070 struct sk_buff *skb;
4071
4072 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4073 if (!skb)
4074 return ERR_PTR(-ENOMEM);
4075
4076 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
4077 cmd->vdev_id = __cpu_to_le32(vdev_id);
4078
4079 ath10k_dbg(ar, ATH10K_DBG_WMI,
4080 "WMI vdev delete id %d\n", vdev_id);
4081 return skb;
4082 }
4083
4084 static struct sk_buff *
4085 ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
4086 const struct wmi_vdev_start_request_arg *arg,
4087 bool restart)
4088 {
4089 struct wmi_vdev_start_request_cmd *cmd;
4090 struct sk_buff *skb;
4091 const char *cmdname;
4092 u32 flags = 0;
4093
4094 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
4095 return ERR_PTR(-EINVAL);
4096 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
4097 return ERR_PTR(-EINVAL);
4098 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
4099 return ERR_PTR(-EINVAL);
4100
4101 if (restart)
4102 cmdname = "restart";
4103 else
4104 cmdname = "start";
4105
4106 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4107 if (!skb)
4108 return ERR_PTR(-ENOMEM);
4109
4110 if (arg->hidden_ssid)
4111 flags |= WMI_VDEV_START_HIDDEN_SSID;
4112 if (arg->pmf_enabled)
4113 flags |= WMI_VDEV_START_PMF_ENABLED;
4114
4115 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
4116 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4117 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
4118 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
4119 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
4120 cmd->flags = __cpu_to_le32(flags);
4121 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
4122 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
4123
4124 if (arg->ssid) {
4125 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
4126 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
4127 }
4128
4129 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
4130
4131 ath10k_dbg(ar, ATH10K_DBG_WMI,
4132 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
4133 cmdname, arg->vdev_id,
4134 flags, arg->channel.freq, arg->channel.mode,
4135 cmd->chan.flags, arg->channel.max_power);
4136
4137 return skb;
4138 }
4139
4140 static struct sk_buff *
4141 ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
4142 {
4143 struct wmi_vdev_stop_cmd *cmd;
4144 struct sk_buff *skb;
4145
4146 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4147 if (!skb)
4148 return ERR_PTR(-ENOMEM);
4149
4150 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
4151 cmd->vdev_id = __cpu_to_le32(vdev_id);
4152
4153 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
4154 return skb;
4155 }
4156
4157 static struct sk_buff *
4158 ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
4159 const u8 *bssid)
4160 {
4161 struct wmi_vdev_up_cmd *cmd;
4162 struct sk_buff *skb;
4163
4164 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4165 if (!skb)
4166 return ERR_PTR(-ENOMEM);
4167
4168 cmd = (struct wmi_vdev_up_cmd *)skb->data;
4169 cmd->vdev_id = __cpu_to_le32(vdev_id);
4170 cmd->vdev_assoc_id = __cpu_to_le32(aid);
4171 ether_addr_copy(cmd->vdev_bssid.addr, bssid);
4172
4173 ath10k_dbg(ar, ATH10K_DBG_WMI,
4174 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
4175 vdev_id, aid, bssid);
4176 return skb;
4177 }
4178
4179 static struct sk_buff *
4180 ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
4181 {
4182 struct wmi_vdev_down_cmd *cmd;
4183 struct sk_buff *skb;
4184
4185 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4186 if (!skb)
4187 return ERR_PTR(-ENOMEM);
4188
4189 cmd = (struct wmi_vdev_down_cmd *)skb->data;
4190 cmd->vdev_id = __cpu_to_le32(vdev_id);
4191
4192 ath10k_dbg(ar, ATH10K_DBG_WMI,
4193 "wmi mgmt vdev down id 0x%x\n", vdev_id);
4194 return skb;
4195 }
4196
4197 static struct sk_buff *
4198 ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
4199 u32 param_id, u32 param_value)
4200 {
4201 struct wmi_vdev_set_param_cmd *cmd;
4202 struct sk_buff *skb;
4203
4204 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
4205 ath10k_dbg(ar, ATH10K_DBG_WMI,
4206 "vdev param %d not supported by firmware\n",
4207 param_id);
4208 return ERR_PTR(-EOPNOTSUPP);
4209 }
4210
4211 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4212 if (!skb)
4213 return ERR_PTR(-ENOMEM);
4214
4215 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
4216 cmd->vdev_id = __cpu_to_le32(vdev_id);
4217 cmd->param_id = __cpu_to_le32(param_id);
4218 cmd->param_value = __cpu_to_le32(param_value);
4219
4220 ath10k_dbg(ar, ATH10K_DBG_WMI,
4221 "wmi vdev id 0x%x set param %d value %d\n",
4222 vdev_id, param_id, param_value);
4223 return skb;
4224 }
4225
4226 static struct sk_buff *
4227 ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
4228 const struct wmi_vdev_install_key_arg *arg)
4229 {
4230 struct wmi_vdev_install_key_cmd *cmd;
4231 struct sk_buff *skb;
4232
4233 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
4234 return ERR_PTR(-EINVAL);
4235 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
4236 return ERR_PTR(-EINVAL);
4237
4238 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
4239 if (!skb)
4240 return ERR_PTR(-ENOMEM);
4241
4242 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
4243 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4244 cmd->key_idx = __cpu_to_le32(arg->key_idx);
4245 cmd->key_flags = __cpu_to_le32(arg->key_flags);
4246 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
4247 cmd->key_len = __cpu_to_le32(arg->key_len);
4248 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
4249 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
4250
4251 if (arg->macaddr)
4252 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
4253 if (arg->key_data)
4254 memcpy(cmd->key_data, arg->key_data, arg->key_len);
4255
4256 ath10k_dbg(ar, ATH10K_DBG_WMI,
4257 "wmi vdev install key idx %d cipher %d len %d\n",
4258 arg->key_idx, arg->key_cipher, arg->key_len);
4259 return skb;
4260 }
4261
4262 static struct sk_buff *
4263 ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
4264 const struct wmi_vdev_spectral_conf_arg *arg)
4265 {
4266 struct wmi_vdev_spectral_conf_cmd *cmd;
4267 struct sk_buff *skb;
4268
4269 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4270 if (!skb)
4271 return ERR_PTR(-ENOMEM);
4272
4273 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
4274 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4275 cmd->scan_count = __cpu_to_le32(arg->scan_count);
4276 cmd->scan_period = __cpu_to_le32(arg->scan_period);
4277 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
4278 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
4279 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
4280 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
4281 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
4282 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
4283 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
4284 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
4285 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
4286 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
4287 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
4288 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
4289 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
4290 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
4291 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
4292 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
4293
4294 return skb;
4295 }
4296
4297 static struct sk_buff *
4298 ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
4299 u32 trigger, u32 enable)
4300 {
4301 struct wmi_vdev_spectral_enable_cmd *cmd;
4302 struct sk_buff *skb;
4303
4304 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4305 if (!skb)
4306 return ERR_PTR(-ENOMEM);
4307
4308 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
4309 cmd->vdev_id = __cpu_to_le32(vdev_id);
4310 cmd->trigger_cmd = __cpu_to_le32(trigger);
4311 cmd->enable_cmd = __cpu_to_le32(enable);
4312
4313 return skb;
4314 }
4315
4316 static struct sk_buff *
4317 ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
4318 const u8 peer_addr[ETH_ALEN])
4319 {
4320 struct wmi_peer_create_cmd *cmd;
4321 struct sk_buff *skb;
4322
4323 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4324 if (!skb)
4325 return ERR_PTR(-ENOMEM);
4326
4327 cmd = (struct wmi_peer_create_cmd *)skb->data;
4328 cmd->vdev_id = __cpu_to_le32(vdev_id);
4329 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
4330
4331 ath10k_dbg(ar, ATH10K_DBG_WMI,
4332 "wmi peer create vdev_id %d peer_addr %pM\n",
4333 vdev_id, peer_addr);
4334 return skb;
4335 }
4336
4337 static struct sk_buff *
4338 ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
4339 const u8 peer_addr[ETH_ALEN])
4340 {
4341 struct wmi_peer_delete_cmd *cmd;
4342 struct sk_buff *skb;
4343
4344 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4345 if (!skb)
4346 return ERR_PTR(-ENOMEM);
4347
4348 cmd = (struct wmi_peer_delete_cmd *)skb->data;
4349 cmd->vdev_id = __cpu_to_le32(vdev_id);
4350 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
4351
4352 ath10k_dbg(ar, ATH10K_DBG_WMI,
4353 "wmi peer delete vdev_id %d peer_addr %pM\n",
4354 vdev_id, peer_addr);
4355 return skb;
4356 }
4357
4358 static struct sk_buff *
4359 ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
4360 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
4361 {
4362 struct wmi_peer_flush_tids_cmd *cmd;
4363 struct sk_buff *skb;
4364
4365 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4366 if (!skb)
4367 return ERR_PTR(-ENOMEM);
4368
4369 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
4370 cmd->vdev_id = __cpu_to_le32(vdev_id);
4371 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
4372 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
4373
4374 ath10k_dbg(ar, ATH10K_DBG_WMI,
4375 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
4376 vdev_id, peer_addr, tid_bitmap);
4377 return skb;
4378 }
4379
4380 static struct sk_buff *
4381 ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
4382 const u8 *peer_addr,
4383 enum wmi_peer_param param_id,
4384 u32 param_value)
4385 {
4386 struct wmi_peer_set_param_cmd *cmd;
4387 struct sk_buff *skb;
4388
4389 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4390 if (!skb)
4391 return ERR_PTR(-ENOMEM);
4392
4393 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
4394 cmd->vdev_id = __cpu_to_le32(vdev_id);
4395 cmd->param_id = __cpu_to_le32(param_id);
4396 cmd->param_value = __cpu_to_le32(param_value);
4397 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
4398
4399 ath10k_dbg(ar, ATH10K_DBG_WMI,
4400 "wmi vdev %d peer 0x%pM set param %d value %d\n",
4401 vdev_id, peer_addr, param_id, param_value);
4402 return skb;
4403 }
4404
4405 static struct sk_buff *
4406 ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
4407 enum wmi_sta_ps_mode psmode)
4408 {
4409 struct wmi_sta_powersave_mode_cmd *cmd;
4410 struct sk_buff *skb;
4411
4412 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4413 if (!skb)
4414 return ERR_PTR(-ENOMEM);
4415
4416 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
4417 cmd->vdev_id = __cpu_to_le32(vdev_id);
4418 cmd->sta_ps_mode = __cpu_to_le32(psmode);
4419
4420 ath10k_dbg(ar, ATH10K_DBG_WMI,
4421 "wmi set powersave id 0x%x mode %d\n",
4422 vdev_id, psmode);
4423 return skb;
4424 }
4425
4426 static struct sk_buff *
4427 ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
4428 enum wmi_sta_powersave_param param_id,
4429 u32 value)
4430 {
4431 struct wmi_sta_powersave_param_cmd *cmd;
4432 struct sk_buff *skb;
4433
4434 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4435 if (!skb)
4436 return ERR_PTR(-ENOMEM);
4437
4438 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
4439 cmd->vdev_id = __cpu_to_le32(vdev_id);
4440 cmd->param_id = __cpu_to_le32(param_id);
4441 cmd->param_value = __cpu_to_le32(value);
4442
4443 ath10k_dbg(ar, ATH10K_DBG_WMI,
4444 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
4445 vdev_id, param_id, value);
4446 return skb;
4447 }
4448
4449 static struct sk_buff *
4450 ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
4451 enum wmi_ap_ps_peer_param param_id, u32 value)
4452 {
4453 struct wmi_ap_ps_peer_cmd *cmd;
4454 struct sk_buff *skb;
4455
4456 if (!mac)
4457 return ERR_PTR(-EINVAL);
4458
4459 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4460 if (!skb)
4461 return ERR_PTR(-ENOMEM);
4462
4463 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
4464 cmd->vdev_id = __cpu_to_le32(vdev_id);
4465 cmd->param_id = __cpu_to_le32(param_id);
4466 cmd->param_value = __cpu_to_le32(value);
4467 ether_addr_copy(cmd->peer_macaddr.addr, mac);
4468
4469 ath10k_dbg(ar, ATH10K_DBG_WMI,
4470 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
4471 vdev_id, param_id, value, mac);
4472 return skb;
4473 }
4474
4475 static struct sk_buff *
4476 ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
4477 const struct wmi_scan_chan_list_arg *arg)
4478 {
4479 struct wmi_scan_chan_list_cmd *cmd;
4480 struct sk_buff *skb;
4481 struct wmi_channel_arg *ch;
4482 struct wmi_channel *ci;
4483 int len;
4484 int i;
4485
4486 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
4487
4488 skb = ath10k_wmi_alloc_skb(ar, len);
4489 if (!skb)
4490 return ERR_PTR(-EINVAL);
4491
4492 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
4493 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
4494
4495 for (i = 0; i < arg->n_channels; i++) {
4496 ch = &arg->channels[i];
4497 ci = &cmd->chan_info[i];
4498
4499 ath10k_wmi_put_wmi_channel(ci, ch);
4500 }
4501
4502 return skb;
4503 }
4504
4505 static void
4506 ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
4507 const struct wmi_peer_assoc_complete_arg *arg)
4508 {
4509 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
4510
4511 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4512 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
4513 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
4514 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
4515 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
4516 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
4517 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
4518 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
4519 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
4520 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
4521 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
4522 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
4523 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
4524
4525 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
4526
4527 cmd->peer_legacy_rates.num_rates =
4528 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
4529 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
4530 arg->peer_legacy_rates.num_rates);
4531
4532 cmd->peer_ht_rates.num_rates =
4533 __cpu_to_le32(arg->peer_ht_rates.num_rates);
4534 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
4535 arg->peer_ht_rates.num_rates);
4536
4537 cmd->peer_vht_rates.rx_max_rate =
4538 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
4539 cmd->peer_vht_rates.rx_mcs_set =
4540 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
4541 cmd->peer_vht_rates.tx_max_rate =
4542 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
4543 cmd->peer_vht_rates.tx_mcs_set =
4544 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
4545 }
4546
4547 static void
4548 ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
4549 const struct wmi_peer_assoc_complete_arg *arg)
4550 {
4551 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
4552
4553 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4554 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
4555 }
4556
4557 static void
4558 ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
4559 const struct wmi_peer_assoc_complete_arg *arg)
4560 {
4561 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4562 }
4563
4564 static void
4565 ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
4566 const struct wmi_peer_assoc_complete_arg *arg)
4567 {
4568 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
4569 int max_mcs, max_nss;
4570 u32 info0;
4571
4572 /* TODO: Is using max values okay with firmware? */
4573 max_mcs = 0xf;
4574 max_nss = 0xf;
4575
4576 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
4577 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
4578
4579 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4580 cmd->info0 = __cpu_to_le32(info0);
4581 }
4582
4583 static int
4584 ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
4585 {
4586 if (arg->peer_mpdu_density > 16)
4587 return -EINVAL;
4588 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
4589 return -EINVAL;
4590 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
4591 return -EINVAL;
4592
4593 return 0;
4594 }
4595
4596 static struct sk_buff *
4597 ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
4598 const struct wmi_peer_assoc_complete_arg *arg)
4599 {
4600 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
4601 struct sk_buff *skb;
4602 int ret;
4603
4604 ret = ath10k_wmi_peer_assoc_check_arg(arg);
4605 if (ret)
4606 return ERR_PTR(ret);
4607
4608 skb = ath10k_wmi_alloc_skb(ar, len);
4609 if (!skb)
4610 return ERR_PTR(-ENOMEM);
4611
4612 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
4613
4614 ath10k_dbg(ar, ATH10K_DBG_WMI,
4615 "wmi peer assoc vdev %d addr %pM (%s)\n",
4616 arg->vdev_id, arg->addr,
4617 arg->peer_reassoc ? "reassociate" : "new");
4618 return skb;
4619 }
4620
4621 static struct sk_buff *
4622 ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
4623 const struct wmi_peer_assoc_complete_arg *arg)
4624 {
4625 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
4626 struct sk_buff *skb;
4627 int ret;
4628
4629 ret = ath10k_wmi_peer_assoc_check_arg(arg);
4630 if (ret)
4631 return ERR_PTR(ret);
4632
4633 skb = ath10k_wmi_alloc_skb(ar, len);
4634 if (!skb)
4635 return ERR_PTR(-ENOMEM);
4636
4637 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
4638
4639 ath10k_dbg(ar, ATH10K_DBG_WMI,
4640 "wmi peer assoc vdev %d addr %pM (%s)\n",
4641 arg->vdev_id, arg->addr,
4642 arg->peer_reassoc ? "reassociate" : "new");
4643 return skb;
4644 }
4645
4646 static struct sk_buff *
4647 ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
4648 const struct wmi_peer_assoc_complete_arg *arg)
4649 {
4650 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
4651 struct sk_buff *skb;
4652 int ret;
4653
4654 ret = ath10k_wmi_peer_assoc_check_arg(arg);
4655 if (ret)
4656 return ERR_PTR(ret);
4657
4658 skb = ath10k_wmi_alloc_skb(ar, len);
4659 if (!skb)
4660 return ERR_PTR(-ENOMEM);
4661
4662 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
4663
4664 ath10k_dbg(ar, ATH10K_DBG_WMI,
4665 "wmi peer assoc vdev %d addr %pM (%s)\n",
4666 arg->vdev_id, arg->addr,
4667 arg->peer_reassoc ? "reassociate" : "new");
4668 return skb;
4669 }
4670
4671 static struct sk_buff *
4672 ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
4673 {
4674 struct sk_buff *skb;
4675
4676 skb = ath10k_wmi_alloc_skb(ar, 0);
4677 if (!skb)
4678 return ERR_PTR(-ENOMEM);
4679
4680 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
4681 return skb;
4682 }
4683
4684 /* This function assumes the beacon is already DMA mapped */
4685 static struct sk_buff *
4686 ath10k_wmi_op_gen_beacon_dma(struct ath10k_vif *arvif)
4687 {
4688 struct ath10k *ar = arvif->ar;
4689 struct wmi_bcn_tx_ref_cmd *cmd;
4690 struct sk_buff *skb;
4691 struct sk_buff *beacon = arvif->beacon;
4692 struct ieee80211_hdr *hdr;
4693 u16 fc;
4694
4695 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4696 if (!skb)
4697 return ERR_PTR(-ENOMEM);
4698
4699 hdr = (struct ieee80211_hdr *)beacon->data;
4700 fc = le16_to_cpu(hdr->frame_control);
4701
4702 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
4703 cmd->vdev_id = __cpu_to_le32(arvif->vdev_id);
4704 cmd->data_len = __cpu_to_le32(beacon->len);
4705 cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr);
4706 cmd->msdu_id = 0;
4707 cmd->frame_control = __cpu_to_le32(fc);
4708 cmd->flags = 0;
4709 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
4710
4711 if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero)
4712 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
4713
4714 if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab)
4715 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
4716
4717 return skb;
4718 }
4719
4720 void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
4721 const struct wmi_wmm_params_arg *arg)
4722 {
4723 params->cwmin = __cpu_to_le32(arg->cwmin);
4724 params->cwmax = __cpu_to_le32(arg->cwmax);
4725 params->aifs = __cpu_to_le32(arg->aifs);
4726 params->txop = __cpu_to_le32(arg->txop);
4727 params->acm = __cpu_to_le32(arg->acm);
4728 params->no_ack = __cpu_to_le32(arg->no_ack);
4729 }
4730
4731 static struct sk_buff *
4732 ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
4733 const struct wmi_pdev_set_wmm_params_arg *arg)
4734 {
4735 struct wmi_pdev_set_wmm_params *cmd;
4736 struct sk_buff *skb;
4737
4738 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4739 if (!skb)
4740 return ERR_PTR(-ENOMEM);
4741
4742 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
4743 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
4744 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
4745 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
4746 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
4747
4748 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
4749 return skb;
4750 }
4751
4752 static struct sk_buff *
4753 ath10k_wmi_op_gen_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
4754 {
4755 struct wmi_request_stats_cmd *cmd;
4756 struct sk_buff *skb;
4757
4758 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4759 if (!skb)
4760 return ERR_PTR(-ENOMEM);
4761
4762 cmd = (struct wmi_request_stats_cmd *)skb->data;
4763 cmd->stats_id = __cpu_to_le32(stats_id);
4764
4765 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
4766 return skb;
4767 }
4768
4769 static struct sk_buff *
4770 ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
4771 enum wmi_force_fw_hang_type type, u32 delay_ms)
4772 {
4773 struct wmi_force_fw_hang_cmd *cmd;
4774 struct sk_buff *skb;
4775
4776 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4777 if (!skb)
4778 return ERR_PTR(-ENOMEM);
4779
4780 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
4781 cmd->type = __cpu_to_le32(type);
4782 cmd->delay_ms = __cpu_to_le32(delay_ms);
4783
4784 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
4785 type, delay_ms);
4786 return skb;
4787 }
4788
4789 static struct sk_buff *
4790 ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable)
4791 {
4792 struct wmi_dbglog_cfg_cmd *cmd;
4793 struct sk_buff *skb;
4794 u32 cfg;
4795
4796 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4797 if (!skb)
4798 return ERR_PTR(-ENOMEM);
4799
4800 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
4801
4802 if (module_enable) {
4803 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
4804 ATH10K_DBGLOG_CFG_LOG_LVL);
4805 } else {
4806 /* set back defaults, all modules with WARN level */
4807 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
4808 ATH10K_DBGLOG_CFG_LOG_LVL);
4809 module_enable = ~0;
4810 }
4811
4812 cmd->module_enable = __cpu_to_le32(module_enable);
4813 cmd->module_valid = __cpu_to_le32(~0);
4814 cmd->config_enable = __cpu_to_le32(cfg);
4815 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
4816
4817 ath10k_dbg(ar, ATH10K_DBG_WMI,
4818 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
4819 __le32_to_cpu(cmd->module_enable),
4820 __le32_to_cpu(cmd->module_valid),
4821 __le32_to_cpu(cmd->config_enable),
4822 __le32_to_cpu(cmd->config_valid));
4823 return skb;
4824 }
4825
4826 static struct sk_buff *
4827 ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
4828 {
4829 struct wmi_pdev_pktlog_enable_cmd *cmd;
4830 struct sk_buff *skb;
4831
4832 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4833 if (!skb)
4834 return ERR_PTR(-ENOMEM);
4835
4836 ev_bitmap &= ATH10K_PKTLOG_ANY;
4837
4838 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
4839 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
4840
4841 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
4842 ev_bitmap);
4843 return skb;
4844 }
4845
4846 static struct sk_buff *
4847 ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
4848 {
4849 struct sk_buff *skb;
4850
4851 skb = ath10k_wmi_alloc_skb(ar, 0);
4852 if (!skb)
4853 return ERR_PTR(-ENOMEM);
4854
4855 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
4856 return skb;
4857 }
4858
4859 static struct sk_buff *
4860 ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
4861 u32 duration, u32 next_offset,
4862 u32 enabled)
4863 {
4864 struct wmi_pdev_set_quiet_cmd *cmd;
4865 struct sk_buff *skb;
4866
4867 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4868 if (!skb)
4869 return ERR_PTR(-ENOMEM);
4870
4871 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
4872 cmd->period = __cpu_to_le32(period);
4873 cmd->duration = __cpu_to_le32(duration);
4874 cmd->next_start = __cpu_to_le32(next_offset);
4875 cmd->enabled = __cpu_to_le32(enabled);
4876
4877 ath10k_dbg(ar, ATH10K_DBG_WMI,
4878 "wmi quiet param: period %u duration %u enabled %d\n",
4879 period, duration, enabled);
4880 return skb;
4881 }
4882
4883 static struct sk_buff *
4884 ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
4885 const u8 *mac)
4886 {
4887 struct wmi_addba_clear_resp_cmd *cmd;
4888 struct sk_buff *skb;
4889
4890 if (!mac)
4891 return ERR_PTR(-EINVAL);
4892
4893 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4894 if (!skb)
4895 return ERR_PTR(-ENOMEM);
4896
4897 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
4898 cmd->vdev_id = __cpu_to_le32(vdev_id);
4899 ether_addr_copy(cmd->peer_macaddr.addr, mac);
4900
4901 ath10k_dbg(ar, ATH10K_DBG_WMI,
4902 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
4903 vdev_id, mac);
4904 return skb;
4905 }
4906
4907 static struct sk_buff *
4908 ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
4909 u32 tid, u32 buf_size)
4910 {
4911 struct wmi_addba_send_cmd *cmd;
4912 struct sk_buff *skb;
4913
4914 if (!mac)
4915 return ERR_PTR(-EINVAL);
4916
4917 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4918 if (!skb)
4919 return ERR_PTR(-ENOMEM);
4920
4921 cmd = (struct wmi_addba_send_cmd *)skb->data;
4922 cmd->vdev_id = __cpu_to_le32(vdev_id);
4923 ether_addr_copy(cmd->peer_macaddr.addr, mac);
4924 cmd->tid = __cpu_to_le32(tid);
4925 cmd->buffersize = __cpu_to_le32(buf_size);
4926
4927 ath10k_dbg(ar, ATH10K_DBG_WMI,
4928 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
4929 vdev_id, mac, tid, buf_size);
4930 return skb;
4931 }
4932
4933 static struct sk_buff *
4934 ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
4935 u32 tid, u32 status)
4936 {
4937 struct wmi_addba_setresponse_cmd *cmd;
4938 struct sk_buff *skb;
4939
4940 if (!mac)
4941 return ERR_PTR(-EINVAL);
4942
4943 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4944 if (!skb)
4945 return ERR_PTR(-ENOMEM);
4946
4947 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
4948 cmd->vdev_id = __cpu_to_le32(vdev_id);
4949 ether_addr_copy(cmd->peer_macaddr.addr, mac);
4950 cmd->tid = __cpu_to_le32(tid);
4951 cmd->statuscode = __cpu_to_le32(status);
4952
4953 ath10k_dbg(ar, ATH10K_DBG_WMI,
4954 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
4955 vdev_id, mac, tid, status);
4956 return skb;
4957 }
4958
4959 static struct sk_buff *
4960 ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
4961 u32 tid, u32 initiator, u32 reason)
4962 {
4963 struct wmi_delba_send_cmd *cmd;
4964 struct sk_buff *skb;
4965
4966 if (!mac)
4967 return ERR_PTR(-EINVAL);
4968
4969 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4970 if (!skb)
4971 return ERR_PTR(-ENOMEM);
4972
4973 cmd = (struct wmi_delba_send_cmd *)skb->data;
4974 cmd->vdev_id = __cpu_to_le32(vdev_id);
4975 ether_addr_copy(cmd->peer_macaddr.addr, mac);
4976 cmd->tid = __cpu_to_le32(tid);
4977 cmd->initiator = __cpu_to_le32(initiator);
4978 cmd->reasoncode = __cpu_to_le32(reason);
4979
4980 ath10k_dbg(ar, ATH10K_DBG_WMI,
4981 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
4982 vdev_id, mac, tid, initiator, reason);
4983 return skb;
4984 }
4985
4986 static const struct wmi_ops wmi_ops = {
4987 .rx = ath10k_wmi_op_rx,
4988 .map_svc = wmi_main_svc_map,
4989
4990 .pull_scan = ath10k_wmi_op_pull_scan_ev,
4991 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
4992 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
4993 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
4994 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
4995 .pull_swba = ath10k_wmi_op_pull_swba_ev,
4996 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
4997 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
4998 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
4999 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
5000
5001 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5002 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5003 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
5004 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5005 .gen_init = ath10k_wmi_op_gen_init,
5006 .gen_start_scan = ath10k_wmi_op_gen_start_scan,
5007 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5008 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5009 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5010 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5011 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5012 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5013 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5014 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5015 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5016 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5017 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
5018 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
5019 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5020 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5021 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5022 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
5023 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5024 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5025 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5026 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5027 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5028 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5029 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
5030 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5031 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5032 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5033 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5034 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
5035 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
5036 /* .gen_pdev_get_temperature not implemented */
5037 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
5038 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
5039 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
5040 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
5041 /* .gen_bcn_tmpl not implemented */
5042 };
5043
5044 static const struct wmi_ops wmi_10_1_ops = {
5045 .rx = ath10k_wmi_10_1_op_rx,
5046 .map_svc = wmi_10x_svc_map,
5047 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
5048 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
5049 .gen_init = ath10k_wmi_10_1_op_gen_init,
5050 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
5051 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
5052 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
5053 /* .gen_pdev_get_temperature not implemented */
5054
5055 /* shared with main branch */
5056 .pull_scan = ath10k_wmi_op_pull_scan_ev,
5057 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5058 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5059 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5060 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5061 .pull_swba = ath10k_wmi_op_pull_swba_ev,
5062 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5063 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5064
5065 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5066 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5067 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5068 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5069 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5070 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5071 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5072 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5073 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5074 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5075 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5076 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5077 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5078 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
5079 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
5080 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5081 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5082 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5083 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5084 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5085 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5086 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5087 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5088 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5089 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
5090 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5091 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5092 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5093 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5094 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
5095 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
5096 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
5097 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
5098 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
5099 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
5100 /* .gen_bcn_tmpl not implemented */
5101 };
5102
5103 static const struct wmi_ops wmi_10_2_ops = {
5104 .rx = ath10k_wmi_10_2_op_rx,
5105 .gen_init = ath10k_wmi_10_2_op_gen_init,
5106 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
5107 /* .gen_pdev_get_temperature not implemented */
5108
5109 /* shared with 10.1 */
5110 .map_svc = wmi_10x_svc_map,
5111 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
5112 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
5113 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
5114 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
5115
5116 .pull_scan = ath10k_wmi_op_pull_scan_ev,
5117 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5118 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5119 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5120 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5121 .pull_swba = ath10k_wmi_op_pull_swba_ev,
5122 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5123 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5124
5125 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5126 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5127 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5128 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5129 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5130 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5131 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5132 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5133 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5134 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5135 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5136 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5137 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5138 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
5139 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
5140 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5141 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5142 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5143 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5144 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5145 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5146 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5147 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5148 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5149 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
5150 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5151 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5152 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5153 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5154 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
5155 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
5156 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
5157 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
5158 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
5159 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
5160 };
5161
5162 static const struct wmi_ops wmi_10_2_4_ops = {
5163 .rx = ath10k_wmi_10_2_op_rx,
5164 .gen_init = ath10k_wmi_10_2_op_gen_init,
5165 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
5166 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
5167
5168 /* shared with 10.1 */
5169 .map_svc = wmi_10x_svc_map,
5170 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
5171 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
5172 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
5173 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
5174
5175 .pull_scan = ath10k_wmi_op_pull_scan_ev,
5176 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
5177 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
5178 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
5179 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
5180 .pull_swba = ath10k_wmi_op_pull_swba_ev,
5181 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
5182 .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
5183
5184 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
5185 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
5186 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
5187 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
5188 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
5189 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
5190 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
5191 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
5192 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
5193 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
5194 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
5195 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
5196 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
5197 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
5198 .gen_peer_create = ath10k_wmi_op_gen_peer_create,
5199 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
5200 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
5201 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
5202 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
5203 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
5204 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
5205 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
5206 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
5207 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
5208 .gen_request_stats = ath10k_wmi_op_gen_request_stats,
5209 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
5210 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
5211 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
5212 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
5213 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
5214 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
5215 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
5216 .gen_addba_send = ath10k_wmi_op_gen_addba_send,
5217 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
5218 .gen_delba_send = ath10k_wmi_op_gen_delba_send,
5219 /* .gen_bcn_tmpl not implemented */
5220 };
5221
5222 int ath10k_wmi_attach(struct ath10k *ar)
5223 {
5224 switch (ar->wmi.op_version) {
5225 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
5226 ar->wmi.cmd = &wmi_10_2_4_cmd_map;
5227 ar->wmi.ops = &wmi_10_2_4_ops;
5228 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
5229 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
5230 break;
5231 case ATH10K_FW_WMI_OP_VERSION_10_2:
5232 ar->wmi.cmd = &wmi_10_2_cmd_map;
5233 ar->wmi.ops = &wmi_10_2_ops;
5234 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
5235 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
5236 break;
5237 case ATH10K_FW_WMI_OP_VERSION_10_1:
5238 ar->wmi.cmd = &wmi_10x_cmd_map;
5239 ar->wmi.ops = &wmi_10_1_ops;
5240 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
5241 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
5242 break;
5243 case ATH10K_FW_WMI_OP_VERSION_MAIN:
5244 ar->wmi.cmd = &wmi_cmd_map;
5245 ar->wmi.ops = &wmi_ops;
5246 ar->wmi.vdev_param = &wmi_vdev_param_map;
5247 ar->wmi.pdev_param = &wmi_pdev_param_map;
5248 break;
5249 case ATH10K_FW_WMI_OP_VERSION_TLV:
5250 ath10k_wmi_tlv_attach(ar);
5251 break;
5252 case ATH10K_FW_WMI_OP_VERSION_UNSET:
5253 case ATH10K_FW_WMI_OP_VERSION_MAX:
5254 ath10k_err(ar, "unsupported WMI op version: %d\n",
5255 ar->wmi.op_version);
5256 return -EINVAL;
5257 }
5258
5259 init_completion(&ar->wmi.service_ready);
5260 init_completion(&ar->wmi.unified_ready);
5261
5262 return 0;
5263 }
5264
5265 void ath10k_wmi_detach(struct ath10k *ar)
5266 {
5267 int i;
5268
5269 /* free the host memory chunks requested by firmware */
5270 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
5271 dma_free_coherent(ar->dev,
5272 ar->wmi.mem_chunks[i].len,
5273 ar->wmi.mem_chunks[i].vaddr,
5274 ar->wmi.mem_chunks[i].paddr);
5275 }
5276
5277 ar->wmi.num_mem_chunks = 0;
5278 }
Linux kernel - Deliverables
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