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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/klassert/ipsec...
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #include <linux/skbuff.h>
19 #include <linux/ctype.h>
20
21 #include "core.h"
22 #include "htc.h"
23 #include "debug.h"
24 #include "wmi.h"
25 #include "mac.h"
26
27 /* MAIN WMI cmd track */
28 static struct wmi_cmd_map wmi_cmd_map = {
29 .init_cmdid = WMI_INIT_CMDID,
30 .start_scan_cmdid = WMI_START_SCAN_CMDID,
31 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
32 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
33 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
34 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
35 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
36 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
37 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
38 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
39 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
40 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
41 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
42 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
43 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
44 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
45 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
46 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
47 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
48 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
49 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
50 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
51 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
52 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
53 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
54 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
55 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
56 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
57 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
58 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
59 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
60 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
61 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
62 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
63 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
64 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
65 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
66 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
67 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
68 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
69 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
70 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
71 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
72 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
73 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
74 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
75 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
76 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
77 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
78 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
79 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
80 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
81 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
82 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
83 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
84 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
85 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
86 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
87 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
88 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
89 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
90 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
91 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
92 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
93 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
94 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
95 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
96 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
97 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
98 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
99 .wlan_profile_set_hist_intvl_cmdid =
100 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
101 .wlan_profile_get_profile_data_cmdid =
102 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
103 .wlan_profile_enable_profile_id_cmdid =
104 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
105 .wlan_profile_list_profile_id_cmdid =
106 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
107 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
108 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
109 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
110 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
111 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
112 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
113 .wow_enable_disable_wake_event_cmdid =
114 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
115 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
116 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
117 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
118 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
119 .vdev_spectral_scan_configure_cmdid =
120 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
121 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
122 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
123 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
124 .network_list_offload_config_cmdid =
125 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
126 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
127 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
128 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
129 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
130 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
131 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
132 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
133 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
134 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
135 .echo_cmdid = WMI_ECHO_CMDID,
136 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
137 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
138 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
139 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
140 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
141 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
142 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
143 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
144 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
145 };
146
147 /* 10.X WMI cmd track */
148 static struct wmi_cmd_map wmi_10x_cmd_map = {
149 .init_cmdid = WMI_10X_INIT_CMDID,
150 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
151 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
152 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
153 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
154 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
155 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
156 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
157 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
158 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
159 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
160 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
161 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
162 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
163 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
164 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
165 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
166 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
167 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
168 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
169 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
170 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
171 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
172 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
173 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
174 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
175 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
176 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
177 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
178 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
179 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
180 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
181 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
182 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
183 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
184 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
185 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
186 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
187 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
188 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
189 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
190 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
191 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
192 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
193 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
194 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
195 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
196 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
197 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
198 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
199 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
200 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
201 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
202 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
203 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
204 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
205 .roam_scan_rssi_change_threshold =
206 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
207 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
208 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
209 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
210 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
211 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
212 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
213 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
214 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
215 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
216 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
217 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
218 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
219 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
220 .wlan_profile_set_hist_intvl_cmdid =
221 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
222 .wlan_profile_get_profile_data_cmdid =
223 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
224 .wlan_profile_enable_profile_id_cmdid =
225 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
226 .wlan_profile_list_profile_id_cmdid =
227 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
228 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
229 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
230 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
231 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
232 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
233 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
234 .wow_enable_disable_wake_event_cmdid =
235 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
236 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
237 .wow_hostwakeup_from_sleep_cmdid =
238 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
239 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
240 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
241 .vdev_spectral_scan_configure_cmdid =
242 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
243 .vdev_spectral_scan_enable_cmdid =
244 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
245 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
246 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
247 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
248 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
249 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
250 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
251 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
252 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
253 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
254 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
255 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
256 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
257 .echo_cmdid = WMI_10X_ECHO_CMDID,
258 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
259 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
260 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
261 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
262 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
263 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
264 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
265 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
266 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
267 };
268
269 /* MAIN WMI VDEV param map */
270 static struct wmi_vdev_param_map wmi_vdev_param_map = {
271 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
272 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
273 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
274 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
275 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
276 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
277 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
278 .preamble = WMI_VDEV_PARAM_PREAMBLE,
279 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
280 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
281 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
282 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
283 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
284 .wmi_vdev_oc_scheduler_air_time_limit =
285 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
286 .wds = WMI_VDEV_PARAM_WDS,
287 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
288 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
289 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
290 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
291 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
292 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
293 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
294 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
295 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
296 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
297 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
298 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
299 .sgi = WMI_VDEV_PARAM_SGI,
300 .ldpc = WMI_VDEV_PARAM_LDPC,
301 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
302 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
303 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
304 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
305 .nss = WMI_VDEV_PARAM_NSS,
306 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
307 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
308 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
309 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
310 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
311 .ap_keepalive_min_idle_inactive_time_secs =
312 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
313 .ap_keepalive_max_idle_inactive_time_secs =
314 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
315 .ap_keepalive_max_unresponsive_time_secs =
316 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
317 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
318 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
319 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
320 .txbf = WMI_VDEV_PARAM_TXBF,
321 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
322 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
323 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
324 .ap_detect_out_of_sync_sleeping_sta_time_secs =
325 WMI_VDEV_PARAM_UNSUPPORTED,
326 };
327
328 /* 10.X WMI VDEV param map */
329 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
330 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
331 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
332 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
333 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
334 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
335 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
336 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
337 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
338 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
339 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
340 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
341 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
342 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
343 .wmi_vdev_oc_scheduler_air_time_limit =
344 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
345 .wds = WMI_10X_VDEV_PARAM_WDS,
346 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
347 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
348 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
349 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
350 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
351 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
352 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
353 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
354 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
355 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
356 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
357 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
358 .sgi = WMI_10X_VDEV_PARAM_SGI,
359 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
360 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
361 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
362 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
363 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
364 .nss = WMI_10X_VDEV_PARAM_NSS,
365 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
366 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
367 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
368 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
369 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
370 .ap_keepalive_min_idle_inactive_time_secs =
371 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
372 .ap_keepalive_max_idle_inactive_time_secs =
373 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
374 .ap_keepalive_max_unresponsive_time_secs =
375 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
376 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
377 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
378 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
379 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
380 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
381 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
382 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
383 .ap_detect_out_of_sync_sleeping_sta_time_secs =
384 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
385 };
386
387 static struct wmi_pdev_param_map wmi_pdev_param_map = {
388 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
389 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
390 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
391 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
392 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
393 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
394 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
395 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
396 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
397 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
398 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
399 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
400 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
401 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
402 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
403 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
404 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
405 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
406 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
407 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
408 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
409 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
410 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
411 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
412 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
413 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
414 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
415 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
416 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
417 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
418 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
419 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
420 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
421 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
422 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
423 .dcs = WMI_PDEV_PARAM_DCS,
424 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
425 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
426 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
427 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
428 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
429 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
430 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
431 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
432 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
433 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
434 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
435 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
436 };
437
438 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
439 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
440 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
441 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
442 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
443 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
444 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
445 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
446 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
447 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
448 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
449 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
450 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
451 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
452 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
453 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
454 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
455 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
456 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
457 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
458 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
459 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
460 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
461 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
462 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
463 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
464 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
465 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
466 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
467 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
468 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
469 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
470 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
471 .bcnflt_stats_update_period =
472 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
473 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
474 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
475 .dcs = WMI_10X_PDEV_PARAM_DCS,
476 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
477 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
478 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
479 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
480 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
481 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
482 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
483 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
484 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
485 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
486 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
487 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
488 };
489
490 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
491 {
492 int ret;
493 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
494 WMI_SERVICE_READY_TIMEOUT_HZ);
495 return ret;
496 }
497
498 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
499 {
500 int ret;
501 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
502 WMI_UNIFIED_READY_TIMEOUT_HZ);
503 return ret;
504 }
505
506 static struct sk_buff *ath10k_wmi_alloc_skb(u32 len)
507 {
508 struct sk_buff *skb;
509 u32 round_len = roundup(len, 4);
510
511 skb = ath10k_htc_alloc_skb(WMI_SKB_HEADROOM + round_len);
512 if (!skb)
513 return NULL;
514
515 skb_reserve(skb, WMI_SKB_HEADROOM);
516 if (!IS_ALIGNED((unsigned long)skb->data, 4))
517 ath10k_warn("Unaligned WMI skb\n");
518
519 skb_put(skb, round_len);
520 memset(skb->data, 0, round_len);
521
522 return skb;
523 }
524
525 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
526 {
527 dev_kfree_skb(skb);
528 }
529
530 static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
531 u32 cmd_id)
532 {
533 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
534 struct wmi_cmd_hdr *cmd_hdr;
535 int ret;
536 u32 cmd = 0;
537
538 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
539 return -ENOMEM;
540
541 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
542
543 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
544 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
545
546 memset(skb_cb, 0, sizeof(*skb_cb));
547 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
548 trace_ath10k_wmi_cmd(cmd_id, skb->data, skb->len, ret);
549
550 if (ret)
551 goto err_pull;
552
553 return 0;
554
555 err_pull:
556 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
557 return ret;
558 }
559
560 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
561 {
562 int ret;
563
564 lockdep_assert_held(&arvif->ar->data_lock);
565
566 if (arvif->beacon == NULL)
567 return;
568
569 if (arvif->beacon_sent)
570 return;
571
572 ret = ath10k_wmi_beacon_send_ref_nowait(arvif);
573 if (ret)
574 return;
575
576 /* We need to retain the arvif->beacon reference for DMA unmapping and
577 * freeing the skbuff later. */
578 arvif->beacon_sent = true;
579 }
580
581 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
582 struct ieee80211_vif *vif)
583 {
584 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
585
586 ath10k_wmi_tx_beacon_nowait(arvif);
587 }
588
589 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
590 {
591 spin_lock_bh(&ar->data_lock);
592 ieee80211_iterate_active_interfaces_atomic(ar->hw,
593 IEEE80211_IFACE_ITER_NORMAL,
594 ath10k_wmi_tx_beacons_iter,
595 NULL);
596 spin_unlock_bh(&ar->data_lock);
597 }
598
599 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
600 {
601 /* try to send pending beacons first. they take priority */
602 ath10k_wmi_tx_beacons_nowait(ar);
603
604 wake_up(&ar->wmi.tx_credits_wq);
605 }
606
607 static int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb,
608 u32 cmd_id)
609 {
610 int ret = -EOPNOTSUPP;
611
612 might_sleep();
613
614 if (cmd_id == WMI_CMD_UNSUPPORTED) {
615 ath10k_warn("wmi command %d is not supported by firmware\n",
616 cmd_id);
617 return ret;
618 }
619
620 wait_event_timeout(ar->wmi.tx_credits_wq, ({
621 /* try to send pending beacons first. they take priority */
622 ath10k_wmi_tx_beacons_nowait(ar);
623
624 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
625 (ret != -EAGAIN);
626 }), 3*HZ);
627
628 if (ret)
629 dev_kfree_skb_any(skb);
630
631 return ret;
632 }
633
634 int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
635 {
636 int ret = 0;
637 struct wmi_mgmt_tx_cmd *cmd;
638 struct ieee80211_hdr *hdr;
639 struct sk_buff *wmi_skb;
640 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
641 int len;
642 u16 fc;
643
644 hdr = (struct ieee80211_hdr *)skb->data;
645 fc = le16_to_cpu(hdr->frame_control);
646
647 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
648 return -EINVAL;
649
650 len = sizeof(cmd->hdr) + skb->len;
651 len = round_up(len, 4);
652
653 wmi_skb = ath10k_wmi_alloc_skb(len);
654 if (!wmi_skb)
655 return -ENOMEM;
656
657 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
658
659 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
660 cmd->hdr.tx_rate = 0;
661 cmd->hdr.tx_power = 0;
662 cmd->hdr.buf_len = __cpu_to_le32((u32)(skb->len));
663
664 memcpy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr), ETH_ALEN);
665 memcpy(cmd->buf, skb->data, skb->len);
666
667 ath10k_dbg(ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
668 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
669 fc & IEEE80211_FCTL_STYPE);
670
671 /* Send the management frame buffer to the target */
672 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
673 if (ret)
674 return ret;
675
676 /* TODO: report tx status to mac80211 - temporary just ACK */
677 info->flags |= IEEE80211_TX_STAT_ACK;
678 ieee80211_tx_status_irqsafe(ar->hw, skb);
679
680 return ret;
681 }
682
683 static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
684 {
685 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
686 enum wmi_scan_event_type event_type;
687 enum wmi_scan_completion_reason reason;
688 u32 freq;
689 u32 req_id;
690 u32 scan_id;
691 u32 vdev_id;
692
693 event_type = __le32_to_cpu(event->event_type);
694 reason = __le32_to_cpu(event->reason);
695 freq = __le32_to_cpu(event->channel_freq);
696 req_id = __le32_to_cpu(event->scan_req_id);
697 scan_id = __le32_to_cpu(event->scan_id);
698 vdev_id = __le32_to_cpu(event->vdev_id);
699
700 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENTID\n");
701 ath10k_dbg(ATH10K_DBG_WMI,
702 "scan event type %d reason %d freq %d req_id %d "
703 "scan_id %d vdev_id %d\n",
704 event_type, reason, freq, req_id, scan_id, vdev_id);
705
706 spin_lock_bh(&ar->data_lock);
707
708 switch (event_type) {
709 case WMI_SCAN_EVENT_STARTED:
710 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_STARTED\n");
711 if (ar->scan.in_progress && ar->scan.is_roc)
712 ieee80211_ready_on_channel(ar->hw);
713
714 complete(&ar->scan.started);
715 break;
716 case WMI_SCAN_EVENT_COMPLETED:
717 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_COMPLETED\n");
718 switch (reason) {
719 case WMI_SCAN_REASON_COMPLETED:
720 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_COMPLETED\n");
721 break;
722 case WMI_SCAN_REASON_CANCELLED:
723 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_CANCELED\n");
724 break;
725 case WMI_SCAN_REASON_PREEMPTED:
726 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_PREEMPTED\n");
727 break;
728 case WMI_SCAN_REASON_TIMEDOUT:
729 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_TIMEDOUT\n");
730 break;
731 default:
732 break;
733 }
734
735 ar->scan_channel = NULL;
736 if (!ar->scan.in_progress) {
737 ath10k_warn("no scan requested, ignoring\n");
738 break;
739 }
740
741 if (ar->scan.is_roc) {
742 ath10k_offchan_tx_purge(ar);
743
744 if (!ar->scan.aborting)
745 ieee80211_remain_on_channel_expired(ar->hw);
746 } else {
747 ieee80211_scan_completed(ar->hw, ar->scan.aborting);
748 }
749
750 del_timer(&ar->scan.timeout);
751 complete_all(&ar->scan.completed);
752 ar->scan.in_progress = false;
753 break;
754 case WMI_SCAN_EVENT_BSS_CHANNEL:
755 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_BSS_CHANNEL\n");
756 ar->scan_channel = NULL;
757 break;
758 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
759 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_FOREIGN_CHANNEL\n");
760 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
761 if (ar->scan.in_progress && ar->scan.is_roc &&
762 ar->scan.roc_freq == freq) {
763 complete(&ar->scan.on_channel);
764 }
765 break;
766 case WMI_SCAN_EVENT_DEQUEUED:
767 ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_DEQUEUED\n");
768 break;
769 case WMI_SCAN_EVENT_PREEMPTED:
770 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_PREEMPTED\n");
771 break;
772 case WMI_SCAN_EVENT_START_FAILED:
773 ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_START_FAILED\n");
774 break;
775 default:
776 break;
777 }
778
779 spin_unlock_bh(&ar->data_lock);
780 return 0;
781 }
782
783 static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
784 {
785 enum ieee80211_band band;
786
787 switch (phy_mode) {
788 case MODE_11A:
789 case MODE_11NA_HT20:
790 case MODE_11NA_HT40:
791 case MODE_11AC_VHT20:
792 case MODE_11AC_VHT40:
793 case MODE_11AC_VHT80:
794 band = IEEE80211_BAND_5GHZ;
795 break;
796 case MODE_11G:
797 case MODE_11B:
798 case MODE_11GONLY:
799 case MODE_11NG_HT20:
800 case MODE_11NG_HT40:
801 case MODE_11AC_VHT20_2G:
802 case MODE_11AC_VHT40_2G:
803 case MODE_11AC_VHT80_2G:
804 default:
805 band = IEEE80211_BAND_2GHZ;
806 }
807
808 return band;
809 }
810
811 static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
812 {
813 u8 rate_idx = 0;
814
815 /* rate in Kbps */
816 switch (rate) {
817 case 1000:
818 rate_idx = 0;
819 break;
820 case 2000:
821 rate_idx = 1;
822 break;
823 case 5500:
824 rate_idx = 2;
825 break;
826 case 11000:
827 rate_idx = 3;
828 break;
829 case 6000:
830 rate_idx = 4;
831 break;
832 case 9000:
833 rate_idx = 5;
834 break;
835 case 12000:
836 rate_idx = 6;
837 break;
838 case 18000:
839 rate_idx = 7;
840 break;
841 case 24000:
842 rate_idx = 8;
843 break;
844 case 36000:
845 rate_idx = 9;
846 break;
847 case 48000:
848 rate_idx = 10;
849 break;
850 case 54000:
851 rate_idx = 11;
852 break;
853 default:
854 break;
855 }
856
857 if (band == IEEE80211_BAND_5GHZ) {
858 if (rate_idx > 3)
859 /* Omit CCK rates */
860 rate_idx -= 4;
861 else
862 rate_idx = 0;
863 }
864
865 return rate_idx;
866 }
867
868 static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
869 {
870 struct wmi_mgmt_rx_event_v1 *ev_v1;
871 struct wmi_mgmt_rx_event_v2 *ev_v2;
872 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
873 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
874 struct ieee80211_channel *ch;
875 struct ieee80211_hdr *hdr;
876 u32 rx_status;
877 u32 channel;
878 u32 phy_mode;
879 u32 snr;
880 u32 rate;
881 u32 buf_len;
882 u16 fc;
883 int pull_len;
884
885 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
886 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
887 ev_hdr = &ev_v2->hdr.v1;
888 pull_len = sizeof(*ev_v2);
889 } else {
890 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
891 ev_hdr = &ev_v1->hdr;
892 pull_len = sizeof(*ev_v1);
893 }
894
895 channel = __le32_to_cpu(ev_hdr->channel);
896 buf_len = __le32_to_cpu(ev_hdr->buf_len);
897 rx_status = __le32_to_cpu(ev_hdr->status);
898 snr = __le32_to_cpu(ev_hdr->snr);
899 phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
900 rate = __le32_to_cpu(ev_hdr->rate);
901
902 memset(status, 0, sizeof(*status));
903
904 ath10k_dbg(ATH10K_DBG_MGMT,
905 "event mgmt rx status %08x\n", rx_status);
906
907 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
908 dev_kfree_skb(skb);
909 return 0;
910 }
911
912 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
913 dev_kfree_skb(skb);
914 return 0;
915 }
916
917 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
918 dev_kfree_skb(skb);
919 return 0;
920 }
921
922 if (rx_status & WMI_RX_STATUS_ERR_CRC)
923 status->flag |= RX_FLAG_FAILED_FCS_CRC;
924 if (rx_status & WMI_RX_STATUS_ERR_MIC)
925 status->flag |= RX_FLAG_MMIC_ERROR;
926
927 /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to
928 * MODE_11B. This means phy_mode is not a reliable source for the band
929 * of mgmt rx. */
930
931 ch = ar->scan_channel;
932 if (!ch)
933 ch = ar->rx_channel;
934
935 if (ch) {
936 status->band = ch->band;
937
938 if (phy_mode == MODE_11B &&
939 status->band == IEEE80211_BAND_5GHZ)
940 ath10k_dbg(ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
941 } else {
942 ath10k_warn("using (unreliable) phy_mode to extract band for mgmt rx\n");
943 status->band = phy_mode_to_band(phy_mode);
944 }
945
946 status->freq = ieee80211_channel_to_frequency(channel, status->band);
947 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
948 status->rate_idx = get_rate_idx(rate, status->band);
949
950 skb_pull(skb, pull_len);
951
952 hdr = (struct ieee80211_hdr *)skb->data;
953 fc = le16_to_cpu(hdr->frame_control);
954
955 /* FW delivers WEP Shared Auth frame with Protected Bit set and
956 * encrypted payload. However in case of PMF it delivers decrypted
957 * frames with Protected Bit set. */
958 if (ieee80211_has_protected(hdr->frame_control) &&
959 !ieee80211_is_auth(hdr->frame_control)) {
960 status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED |
961 RX_FLAG_MMIC_STRIPPED;
962 hdr->frame_control = __cpu_to_le16(fc &
963 ~IEEE80211_FCTL_PROTECTED);
964 }
965
966 ath10k_dbg(ATH10K_DBG_MGMT,
967 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
968 skb, skb->len,
969 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
970
971 ath10k_dbg(ATH10K_DBG_MGMT,
972 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
973 status->freq, status->band, status->signal,
974 status->rate_idx);
975
976 /*
977 * packets from HTC come aligned to 4byte boundaries
978 * because they can originally come in along with a trailer
979 */
980 skb_trim(skb, buf_len);
981
982 ieee80211_rx(ar->hw, skb);
983 return 0;
984 }
985
986 static int freq_to_idx(struct ath10k *ar, int freq)
987 {
988 struct ieee80211_supported_band *sband;
989 int band, ch, idx = 0;
990
991 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
992 sband = ar->hw->wiphy->bands[band];
993 if (!sband)
994 continue;
995
996 for (ch = 0; ch < sband->n_channels; ch++, idx++)
997 if (sband->channels[ch].center_freq == freq)
998 goto exit;
999 }
1000
1001 exit:
1002 return idx;
1003 }
1004
1005 static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1006 {
1007 struct wmi_chan_info_event *ev;
1008 struct survey_info *survey;
1009 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1010 int idx;
1011
1012 ev = (struct wmi_chan_info_event *)skb->data;
1013
1014 err_code = __le32_to_cpu(ev->err_code);
1015 freq = __le32_to_cpu(ev->freq);
1016 cmd_flags = __le32_to_cpu(ev->cmd_flags);
1017 noise_floor = __le32_to_cpu(ev->noise_floor);
1018 rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
1019 cycle_count = __le32_to_cpu(ev->cycle_count);
1020
1021 ath10k_dbg(ATH10K_DBG_WMI,
1022 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1023 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1024 cycle_count);
1025
1026 spin_lock_bh(&ar->data_lock);
1027
1028 if (!ar->scan.in_progress) {
1029 ath10k_warn("chan info event without a scan request?\n");
1030 goto exit;
1031 }
1032
1033 idx = freq_to_idx(ar, freq);
1034 if (idx >= ARRAY_SIZE(ar->survey)) {
1035 ath10k_warn("chan info: invalid frequency %d (idx %d out of bounds)\n",
1036 freq, idx);
1037 goto exit;
1038 }
1039
1040 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1041 /* During scanning chan info is reported twice for each
1042 * visited channel. The reported cycle count is global
1043 * and per-channel cycle count must be calculated */
1044
1045 cycle_count -= ar->survey_last_cycle_count;
1046 rx_clear_count -= ar->survey_last_rx_clear_count;
1047
1048 survey = &ar->survey[idx];
1049 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1050 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1051 survey->noise = noise_floor;
1052 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1053 SURVEY_INFO_CHANNEL_TIME_RX |
1054 SURVEY_INFO_NOISE_DBM;
1055 }
1056
1057 ar->survey_last_rx_clear_count = rx_clear_count;
1058 ar->survey_last_cycle_count = cycle_count;
1059
1060 exit:
1061 spin_unlock_bh(&ar->data_lock);
1062 }
1063
1064 static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1065 {
1066 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
1067 }
1068
1069 static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
1070 {
1071 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
1072 skb->len);
1073
1074 trace_ath10k_wmi_dbglog(skb->data, skb->len);
1075
1076 return 0;
1077 }
1078
1079 static void ath10k_wmi_event_update_stats(struct ath10k *ar,
1080 struct sk_buff *skb)
1081 {
1082 struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
1083
1084 ath10k_dbg(ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
1085
1086 ath10k_debug_read_target_stats(ar, ev);
1087 }
1088
1089 static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
1090 struct sk_buff *skb)
1091 {
1092 struct wmi_vdev_start_response_event *ev;
1093
1094 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
1095
1096 ev = (struct wmi_vdev_start_response_event *)skb->data;
1097
1098 if (WARN_ON(__le32_to_cpu(ev->status)))
1099 return;
1100
1101 complete(&ar->vdev_setup_done);
1102 }
1103
1104 static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
1105 struct sk_buff *skb)
1106 {
1107 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
1108 complete(&ar->vdev_setup_done);
1109 }
1110
1111 static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
1112 struct sk_buff *skb)
1113 {
1114 struct wmi_peer_sta_kickout_event *ev;
1115 struct ieee80211_sta *sta;
1116
1117 ev = (struct wmi_peer_sta_kickout_event *)skb->data;
1118
1119 ath10k_dbg(ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
1120 ev->peer_macaddr.addr);
1121
1122 rcu_read_lock();
1123
1124 sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL);
1125 if (!sta) {
1126 ath10k_warn("Spurious quick kickout for STA %pM\n",
1127 ev->peer_macaddr.addr);
1128 goto exit;
1129 }
1130
1131 ieee80211_report_low_ack(sta, 10);
1132
1133 exit:
1134 rcu_read_unlock();
1135 }
1136
1137 /*
1138 * FIXME
1139 *
1140 * We don't report to mac80211 sleep state of connected
1141 * stations. Due to this mac80211 can't fill in TIM IE
1142 * correctly.
1143 *
1144 * I know of no way of getting nullfunc frames that contain
1145 * sleep transition from connected stations - these do not
1146 * seem to be sent from the target to the host. There also
1147 * doesn't seem to be a dedicated event for that. So the
1148 * only way left to do this would be to read tim_bitmap
1149 * during SWBA.
1150 *
1151 * We could probably try using tim_bitmap from SWBA to tell
1152 * mac80211 which stations are asleep and which are not. The
1153 * problem here is calling mac80211 functions so many times
1154 * could take too long and make us miss the time to submit
1155 * the beacon to the target.
1156 *
1157 * So as a workaround we try to extend the TIM IE if there
1158 * is unicast buffered for stations with aid > 7 and fill it
1159 * in ourselves.
1160 */
1161 static void ath10k_wmi_update_tim(struct ath10k *ar,
1162 struct ath10k_vif *arvif,
1163 struct sk_buff *bcn,
1164 struct wmi_bcn_info *bcn_info)
1165 {
1166 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1167 struct ieee80211_tim_ie *tim;
1168 u8 *ies, *ie;
1169 u8 ie_len, pvm_len;
1170
1171 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1172 * we must copy the bitmap upon change and reuse it later */
1173 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
1174 int i;
1175
1176 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1177 sizeof(bcn_info->tim_info.tim_bitmap));
1178
1179 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
1180 __le32 t = bcn_info->tim_info.tim_bitmap[i / 4];
1181 u32 v = __le32_to_cpu(t);
1182 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
1183 }
1184
1185 /* FW reports either length 0 or 16
1186 * so we calculate this on our own */
1187 arvif->u.ap.tim_len = 0;
1188 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
1189 if (arvif->u.ap.tim_bitmap[i])
1190 arvif->u.ap.tim_len = i;
1191
1192 arvif->u.ap.tim_len++;
1193 }
1194
1195 ies = bcn->data;
1196 ies += ieee80211_hdrlen(hdr->frame_control);
1197 ies += 12; /* fixed parameters */
1198
1199 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
1200 (u8 *)skb_tail_pointer(bcn) - ies);
1201 if (!ie) {
1202 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
1203 ath10k_warn("no tim ie found;\n");
1204 return;
1205 }
1206
1207 tim = (void *)ie + 2;
1208 ie_len = ie[1];
1209 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
1210
1211 if (pvm_len < arvif->u.ap.tim_len) {
1212 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
1213 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
1214 void *next_ie = ie + 2 + ie_len;
1215
1216 if (skb_put(bcn, expand_size)) {
1217 memmove(next_ie + expand_size, next_ie, move_size);
1218
1219 ie[1] += expand_size;
1220 ie_len += expand_size;
1221 pvm_len += expand_size;
1222 } else {
1223 ath10k_warn("tim expansion failed\n");
1224 }
1225 }
1226
1227 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
1228 ath10k_warn("tim pvm length is too great (%d)\n", pvm_len);
1229 return;
1230 }
1231
1232 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
1233 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
1234
1235 if (tim->dtim_count == 0) {
1236 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
1237
1238 if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1)
1239 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
1240 }
1241
1242 ath10k_dbg(ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
1243 tim->dtim_count, tim->dtim_period,
1244 tim->bitmap_ctrl, pvm_len);
1245 }
1246
1247 static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
1248 struct wmi_p2p_noa_info *noa)
1249 {
1250 struct ieee80211_p2p_noa_attr *noa_attr;
1251 u8 ctwindow_oppps = noa->ctwindow_oppps;
1252 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
1253 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
1254 __le16 *noa_attr_len;
1255 u16 attr_len;
1256 u8 noa_descriptors = noa->num_descriptors;
1257 int i;
1258
1259 /* P2P IE */
1260 data[0] = WLAN_EID_VENDOR_SPECIFIC;
1261 data[1] = len - 2;
1262 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
1263 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
1264 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
1265 data[5] = WLAN_OUI_TYPE_WFA_P2P;
1266
1267 /* NOA ATTR */
1268 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
1269 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
1270 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
1271
1272 noa_attr->index = noa->index;
1273 noa_attr->oppps_ctwindow = ctwindow;
1274 if (oppps)
1275 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
1276
1277 for (i = 0; i < noa_descriptors; i++) {
1278 noa_attr->desc[i].count =
1279 __le32_to_cpu(noa->descriptors[i].type_count);
1280 noa_attr->desc[i].duration = noa->descriptors[i].duration;
1281 noa_attr->desc[i].interval = noa->descriptors[i].interval;
1282 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
1283 }
1284
1285 attr_len = 2; /* index + oppps_ctwindow */
1286 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1287 *noa_attr_len = __cpu_to_le16(attr_len);
1288 }
1289
1290 static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
1291 {
1292 u32 len = 0;
1293 u8 noa_descriptors = noa->num_descriptors;
1294 u8 opp_ps_info = noa->ctwindow_oppps;
1295 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
1296
1297
1298 if (!noa_descriptors && !opps_enabled)
1299 return len;
1300
1301 len += 1 + 1 + 4; /* EID + len + OUI */
1302 len += 1 + 2; /* noa attr + attr len */
1303 len += 1 + 1; /* index + oppps_ctwindow */
1304 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1305
1306 return len;
1307 }
1308
1309 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
1310 struct sk_buff *bcn,
1311 struct wmi_bcn_info *bcn_info)
1312 {
1313 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
1314 u8 *new_data, *old_data = arvif->u.ap.noa_data;
1315 u32 new_len;
1316
1317 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
1318 return;
1319
1320 ath10k_dbg(ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
1321 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
1322 new_len = ath10k_p2p_calc_noa_ie_len(noa);
1323 if (!new_len)
1324 goto cleanup;
1325
1326 new_data = kmalloc(new_len, GFP_ATOMIC);
1327 if (!new_data)
1328 goto cleanup;
1329
1330 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
1331
1332 spin_lock_bh(&ar->data_lock);
1333 arvif->u.ap.noa_data = new_data;
1334 arvif->u.ap.noa_len = new_len;
1335 spin_unlock_bh(&ar->data_lock);
1336 kfree(old_data);
1337 }
1338
1339 if (arvif->u.ap.noa_data)
1340 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
1341 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
1342 arvif->u.ap.noa_data,
1343 arvif->u.ap.noa_len);
1344 return;
1345
1346 cleanup:
1347 spin_lock_bh(&ar->data_lock);
1348 arvif->u.ap.noa_data = NULL;
1349 arvif->u.ap.noa_len = 0;
1350 spin_unlock_bh(&ar->data_lock);
1351 kfree(old_data);
1352 }
1353
1354
1355 static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
1356 {
1357 struct wmi_host_swba_event *ev;
1358 u32 map;
1359 int i = -1;
1360 struct wmi_bcn_info *bcn_info;
1361 struct ath10k_vif *arvif;
1362 struct sk_buff *bcn;
1363 int ret, vdev_id = 0;
1364
1365 ev = (struct wmi_host_swba_event *)skb->data;
1366 map = __le32_to_cpu(ev->vdev_map);
1367
1368 ath10k_dbg(ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
1369 ev->vdev_map);
1370
1371 for (; map; map >>= 1, vdev_id++) {
1372 if (!(map & 0x1))
1373 continue;
1374
1375 i++;
1376
1377 if (i >= WMI_MAX_AP_VDEV) {
1378 ath10k_warn("swba has corrupted vdev map\n");
1379 break;
1380 }
1381
1382 bcn_info = &ev->bcn_info[i];
1383
1384 ath10k_dbg(ATH10K_DBG_MGMT,
1385 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
1386 i,
1387 __le32_to_cpu(bcn_info->tim_info.tim_len),
1388 __le32_to_cpu(bcn_info->tim_info.tim_mcast),
1389 __le32_to_cpu(bcn_info->tim_info.tim_changed),
1390 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
1391 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
1392 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
1393 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
1394 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
1395
1396 arvif = ath10k_get_arvif(ar, vdev_id);
1397 if (arvif == NULL) {
1398 ath10k_warn("no vif for vdev_id %d found\n", vdev_id);
1399 continue;
1400 }
1401
1402 /* There are no completions for beacons so wait for next SWBA
1403 * before telling mac80211 to decrement CSA counter
1404 *
1405 * Once CSA counter is completed stop sending beacons until
1406 * actual channel switch is done */
1407 if (arvif->vif->csa_active &&
1408 ieee80211_csa_is_complete(arvif->vif)) {
1409 ieee80211_csa_finish(arvif->vif);
1410 continue;
1411 }
1412
1413 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
1414 if (!bcn) {
1415 ath10k_warn("could not get mac80211 beacon\n");
1416 continue;
1417 }
1418
1419 ath10k_tx_h_seq_no(bcn);
1420 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
1421 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
1422
1423 spin_lock_bh(&ar->data_lock);
1424
1425 if (arvif->beacon) {
1426 if (!arvif->beacon_sent)
1427 ath10k_warn("SWBA overrun on vdev %d\n",
1428 arvif->vdev_id);
1429
1430 dma_unmap_single(arvif->ar->dev,
1431 ATH10K_SKB_CB(arvif->beacon)->paddr,
1432 arvif->beacon->len, DMA_TO_DEVICE);
1433 dev_kfree_skb_any(arvif->beacon);
1434 }
1435
1436 ATH10K_SKB_CB(bcn)->paddr = dma_map_single(arvif->ar->dev,
1437 bcn->data, bcn->len,
1438 DMA_TO_DEVICE);
1439 ret = dma_mapping_error(arvif->ar->dev,
1440 ATH10K_SKB_CB(bcn)->paddr);
1441 if (ret) {
1442 ath10k_warn("failed to map beacon: %d\n", ret);
1443 goto skip;
1444 }
1445
1446 arvif->beacon = bcn;
1447 arvif->beacon_sent = false;
1448
1449 ath10k_wmi_tx_beacon_nowait(arvif);
1450 skip:
1451 spin_unlock_bh(&ar->data_lock);
1452 }
1453 }
1454
1455 static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
1456 struct sk_buff *skb)
1457 {
1458 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
1459 }
1460
1461 static void ath10k_dfs_radar_report(struct ath10k *ar,
1462 struct wmi_single_phyerr_rx_event *event,
1463 struct phyerr_radar_report *rr,
1464 u64 tsf)
1465 {
1466 u32 reg0, reg1, tsf32l;
1467 struct pulse_event pe;
1468 u64 tsf64;
1469 u8 rssi, width;
1470
1471 reg0 = __le32_to_cpu(rr->reg0);
1472 reg1 = __le32_to_cpu(rr->reg1);
1473
1474 ath10k_dbg(ATH10K_DBG_REGULATORY,
1475 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
1476 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
1477 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
1478 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
1479 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
1480 ath10k_dbg(ATH10K_DBG_REGULATORY,
1481 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
1482 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
1483 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
1484 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
1485 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
1486 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
1487 ath10k_dbg(ATH10K_DBG_REGULATORY,
1488 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
1489 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
1490 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
1491
1492 if (!ar->dfs_detector)
1493 return;
1494
1495 /* report event to DFS pattern detector */
1496 tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
1497 tsf64 = tsf & (~0xFFFFFFFFULL);
1498 tsf64 |= tsf32l;
1499
1500 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
1501 rssi = event->hdr.rssi_combined;
1502
1503 /* hardware store this as 8 bit signed value,
1504 * set to zero if negative number
1505 */
1506 if (rssi & 0x80)
1507 rssi = 0;
1508
1509 pe.ts = tsf64;
1510 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1511 pe.width = width;
1512 pe.rssi = rssi;
1513
1514 ath10k_dbg(ATH10K_DBG_REGULATORY,
1515 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
1516 pe.freq, pe.width, pe.rssi, pe.ts);
1517
1518 ATH10K_DFS_STAT_INC(ar, pulses_detected);
1519
1520 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
1521 ath10k_dbg(ATH10K_DBG_REGULATORY,
1522 "dfs no pulse pattern detected, yet\n");
1523 return;
1524 }
1525
1526 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs radar detected\n");
1527 ATH10K_DFS_STAT_INC(ar, radar_detected);
1528
1529 /* Control radar events reporting in debugfs file
1530 dfs_block_radar_events */
1531 if (ar->dfs_block_radar_events) {
1532 ath10k_info("DFS Radar detected, but ignored as requested\n");
1533 return;
1534 }
1535
1536 ieee80211_radar_detected(ar->hw);
1537 }
1538
1539 static int ath10k_dfs_fft_report(struct ath10k *ar,
1540 struct wmi_single_phyerr_rx_event *event,
1541 struct phyerr_fft_report *fftr,
1542 u64 tsf)
1543 {
1544 u32 reg0, reg1;
1545 u8 rssi, peak_mag;
1546
1547 reg0 = __le32_to_cpu(fftr->reg0);
1548 reg1 = __le32_to_cpu(fftr->reg1);
1549 rssi = event->hdr.rssi_combined;
1550
1551 ath10k_dbg(ATH10K_DBG_REGULATORY,
1552 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
1553 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
1554 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
1555 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
1556 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
1557 ath10k_dbg(ATH10K_DBG_REGULATORY,
1558 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
1559 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
1560 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
1561 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
1562 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
1563
1564 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
1565
1566 /* false event detection */
1567 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
1568 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
1569 ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
1570 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
1571 return -EINVAL;
1572 }
1573
1574 return 0;
1575 }
1576
1577 static void ath10k_wmi_event_dfs(struct ath10k *ar,
1578 struct wmi_single_phyerr_rx_event *event,
1579 u64 tsf)
1580 {
1581 int buf_len, tlv_len, res, i = 0;
1582 struct phyerr_tlv *tlv;
1583 struct phyerr_radar_report *rr;
1584 struct phyerr_fft_report *fftr;
1585 u8 *tlv_buf;
1586
1587 buf_len = __le32_to_cpu(event->hdr.buf_len);
1588 ath10k_dbg(ATH10K_DBG_REGULATORY,
1589 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
1590 event->hdr.phy_err_code, event->hdr.rssi_combined,
1591 __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
1592
1593 /* Skip event if DFS disabled */
1594 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
1595 return;
1596
1597 ATH10K_DFS_STAT_INC(ar, pulses_total);
1598
1599 while (i < buf_len) {
1600 if (i + sizeof(*tlv) > buf_len) {
1601 ath10k_warn("too short buf for tlv header (%d)\n", i);
1602 return;
1603 }
1604
1605 tlv = (struct phyerr_tlv *)&event->bufp[i];
1606 tlv_len = __le16_to_cpu(tlv->len);
1607 tlv_buf = &event->bufp[i + sizeof(*tlv)];
1608 ath10k_dbg(ATH10K_DBG_REGULATORY,
1609 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
1610 tlv_len, tlv->tag, tlv->sig);
1611
1612 switch (tlv->tag) {
1613 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
1614 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
1615 ath10k_warn("too short radar pulse summary (%d)\n",
1616 i);
1617 return;
1618 }
1619
1620 rr = (struct phyerr_radar_report *)tlv_buf;
1621 ath10k_dfs_radar_report(ar, event, rr, tsf);
1622 break;
1623 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1624 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
1625 ath10k_warn("too short fft report (%d)\n", i);
1626 return;
1627 }
1628
1629 fftr = (struct phyerr_fft_report *)tlv_buf;
1630 res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
1631 if (res)
1632 return;
1633 break;
1634 }
1635
1636 i += sizeof(*tlv) + tlv_len;
1637 }
1638 }
1639
1640 static void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
1641 struct wmi_single_phyerr_rx_event *event,
1642 u64 tsf)
1643 {
1644 ath10k_dbg(ATH10K_DBG_WMI, "wmi event spectral scan\n");
1645 }
1646
1647 static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
1648 {
1649 struct wmi_comb_phyerr_rx_event *comb_event;
1650 struct wmi_single_phyerr_rx_event *event;
1651 u32 count, i, buf_len, phy_err_code;
1652 u64 tsf;
1653 int left_len = skb->len;
1654
1655 ATH10K_DFS_STAT_INC(ar, phy_errors);
1656
1657 /* Check if combined event available */
1658 if (left_len < sizeof(*comb_event)) {
1659 ath10k_warn("wmi phyerr combined event wrong len\n");
1660 return;
1661 }
1662
1663 left_len -= sizeof(*comb_event);
1664
1665 /* Check number of included events */
1666 comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
1667 count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
1668
1669 tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
1670 tsf <<= 32;
1671 tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
1672
1673 ath10k_dbg(ATH10K_DBG_WMI,
1674 "wmi event phyerr count %d tsf64 0x%llX\n",
1675 count, tsf);
1676
1677 event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
1678 for (i = 0; i < count; i++) {
1679 /* Check if we can read event header */
1680 if (left_len < sizeof(*event)) {
1681 ath10k_warn("single event (%d) wrong head len\n", i);
1682 return;
1683 }
1684
1685 left_len -= sizeof(*event);
1686
1687 buf_len = __le32_to_cpu(event->hdr.buf_len);
1688 phy_err_code = event->hdr.phy_err_code;
1689
1690 if (left_len < buf_len) {
1691 ath10k_warn("single event (%d) wrong buf len\n", i);
1692 return;
1693 }
1694
1695 left_len -= buf_len;
1696
1697 switch (phy_err_code) {
1698 case PHY_ERROR_RADAR:
1699 ath10k_wmi_event_dfs(ar, event, tsf);
1700 break;
1701 case PHY_ERROR_SPECTRAL_SCAN:
1702 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1703 break;
1704 case PHY_ERROR_FALSE_RADAR_EXT:
1705 ath10k_wmi_event_dfs(ar, event, tsf);
1706 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1707 break;
1708 default:
1709 break;
1710 }
1711
1712 event += sizeof(*event) + buf_len;
1713 }
1714 }
1715
1716 static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
1717 {
1718 ath10k_dbg(ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
1719 }
1720
1721 static void ath10k_wmi_event_profile_match(struct ath10k *ar,
1722 struct sk_buff *skb)
1723 {
1724 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
1725 }
1726
1727 static void ath10k_wmi_event_debug_print(struct ath10k *ar,
1728 struct sk_buff *skb)
1729 {
1730 char buf[101], c;
1731 int i;
1732
1733 for (i = 0; i < sizeof(buf) - 1; i++) {
1734 if (i >= skb->len)
1735 break;
1736
1737 c = skb->data[i];
1738
1739 if (c == '\0')
1740 break;
1741
1742 if (isascii(c) && isprint(c))
1743 buf[i] = c;
1744 else
1745 buf[i] = '.';
1746 }
1747
1748 if (i == sizeof(buf) - 1)
1749 ath10k_warn("wmi debug print truncated: %d\n", skb->len);
1750
1751 /* for some reason the debug prints end with \n, remove that */
1752 if (skb->data[i - 1] == '\n')
1753 i--;
1754
1755 /* the last byte is always reserved for the null character */
1756 buf[i] = '\0';
1757
1758 ath10k_dbg(ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
1759 }
1760
1761 static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
1762 {
1763 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
1764 }
1765
1766 static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
1767 struct sk_buff *skb)
1768 {
1769 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
1770 }
1771
1772 static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
1773 struct sk_buff *skb)
1774 {
1775 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
1776 }
1777
1778 static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
1779 struct sk_buff *skb)
1780 {
1781 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
1782 }
1783
1784 static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
1785 struct sk_buff *skb)
1786 {
1787 ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
1788 }
1789
1790 static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
1791 struct sk_buff *skb)
1792 {
1793 ath10k_dbg(ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
1794 }
1795
1796 static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
1797 struct sk_buff *skb)
1798 {
1799 ath10k_dbg(ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
1800 }
1801
1802 static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
1803 struct sk_buff *skb)
1804 {
1805 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
1806 }
1807
1808 static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
1809 struct sk_buff *skb)
1810 {
1811 ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
1812 }
1813
1814 static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
1815 struct sk_buff *skb)
1816 {
1817 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
1818 }
1819
1820 static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
1821 struct sk_buff *skb)
1822 {
1823 ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
1824 }
1825
1826 static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
1827 struct sk_buff *skb)
1828 {
1829 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
1830 }
1831
1832 static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
1833 struct sk_buff *skb)
1834 {
1835 ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
1836 }
1837
1838 static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
1839 struct sk_buff *skb)
1840 {
1841 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
1842 }
1843
1844 static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
1845 struct sk_buff *skb)
1846 {
1847 ath10k_dbg(ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
1848 }
1849
1850 static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
1851 struct sk_buff *skb)
1852 {
1853 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
1854 }
1855
1856 static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
1857 struct sk_buff *skb)
1858 {
1859 ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
1860 }
1861
1862 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
1863 u32 num_units, u32 unit_len)
1864 {
1865 dma_addr_t paddr;
1866 u32 pool_size;
1867 int idx = ar->wmi.num_mem_chunks;
1868
1869 pool_size = num_units * round_up(unit_len, 4);
1870
1871 if (!pool_size)
1872 return -EINVAL;
1873
1874 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
1875 pool_size,
1876 &paddr,
1877 GFP_ATOMIC);
1878 if (!ar->wmi.mem_chunks[idx].vaddr) {
1879 ath10k_warn("failed to allocate memory chunk\n");
1880 return -ENOMEM;
1881 }
1882
1883 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
1884
1885 ar->wmi.mem_chunks[idx].paddr = paddr;
1886 ar->wmi.mem_chunks[idx].len = pool_size;
1887 ar->wmi.mem_chunks[idx].req_id = req_id;
1888 ar->wmi.num_mem_chunks++;
1889
1890 return 0;
1891 }
1892
1893 static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
1894 struct sk_buff *skb)
1895 {
1896 struct wmi_service_ready_event *ev = (void *)skb->data;
1897
1898 if (skb->len < sizeof(*ev)) {
1899 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1900 skb->len, sizeof(*ev));
1901 return;
1902 }
1903
1904 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1905 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1906 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1907 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
1908 ar->fw_version_major =
1909 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
1910 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
1911 ar->fw_version_release =
1912 (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
1913 ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
1914 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
1915 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
1916
1917 /* only manually set fw features when not using FW IE format */
1918 if (ar->fw_api == 1 && ar->fw_version_build > 636)
1919 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
1920
1921 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
1922 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
1923 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
1924 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
1925 }
1926
1927 ar->ath_common.regulatory.current_rd =
1928 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
1929
1930 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
1931 sizeof(ev->wmi_service_bitmap));
1932
1933 if (strlen(ar->hw->wiphy->fw_version) == 0) {
1934 snprintf(ar->hw->wiphy->fw_version,
1935 sizeof(ar->hw->wiphy->fw_version),
1936 "%u.%u.%u.%u",
1937 ar->fw_version_major,
1938 ar->fw_version_minor,
1939 ar->fw_version_release,
1940 ar->fw_version_build);
1941 }
1942
1943 /* FIXME: it probably should be better to support this */
1944 if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
1945 ath10k_warn("target requested %d memory chunks; ignoring\n",
1946 __le32_to_cpu(ev->num_mem_reqs));
1947 }
1948
1949 ath10k_dbg(ATH10K_DBG_WMI,
1950 "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
1951 __le32_to_cpu(ev->sw_version),
1952 __le32_to_cpu(ev->sw_version_1),
1953 __le32_to_cpu(ev->abi_version),
1954 __le32_to_cpu(ev->phy_capability),
1955 __le32_to_cpu(ev->ht_cap_info),
1956 __le32_to_cpu(ev->vht_cap_info),
1957 __le32_to_cpu(ev->vht_supp_mcs),
1958 __le32_to_cpu(ev->sys_cap_info),
1959 __le32_to_cpu(ev->num_mem_reqs),
1960 __le32_to_cpu(ev->num_rf_chains));
1961
1962 complete(&ar->wmi.service_ready);
1963 }
1964
1965 static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
1966 struct sk_buff *skb)
1967 {
1968 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
1969 int ret;
1970 struct wmi_service_ready_event_10x *ev = (void *)skb->data;
1971
1972 if (skb->len < sizeof(*ev)) {
1973 ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
1974 skb->len, sizeof(*ev));
1975 return;
1976 }
1977
1978 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
1979 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
1980 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
1981 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
1982 ar->fw_version_major =
1983 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
1984 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
1985 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
1986 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
1987
1988 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
1989 ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
1990 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
1991 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
1992 }
1993
1994 ar->ath_common.regulatory.current_rd =
1995 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
1996
1997 ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
1998 sizeof(ev->wmi_service_bitmap));
1999
2000 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2001 snprintf(ar->hw->wiphy->fw_version,
2002 sizeof(ar->hw->wiphy->fw_version),
2003 "%u.%u",
2004 ar->fw_version_major,
2005 ar->fw_version_minor);
2006 }
2007
2008 num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
2009
2010 if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
2011 ath10k_warn("requested memory chunks number (%d) exceeds the limit\n",
2012 num_mem_reqs);
2013 return;
2014 }
2015
2016 if (!num_mem_reqs)
2017 goto exit;
2018
2019 ath10k_dbg(ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
2020 num_mem_reqs);
2021
2022 for (i = 0; i < num_mem_reqs; ++i) {
2023 req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
2024 num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
2025 unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
2026 num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
2027
2028 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
2029 /* number of units to allocate is number of
2030 * peers, 1 extra for self peer on target */
2031 /* this needs to be tied, host and target
2032 * can get out of sync */
2033 num_units = TARGET_10X_NUM_PEERS + 1;
2034 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
2035 num_units = TARGET_10X_NUM_VDEVS + 1;
2036
2037 ath10k_dbg(ATH10K_DBG_WMI,
2038 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
2039 req_id,
2040 __le32_to_cpu(ev->mem_reqs[i].num_units),
2041 num_unit_info,
2042 unit_size,
2043 num_units);
2044
2045 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2046 unit_size);
2047 if (ret)
2048 return;
2049 }
2050
2051 exit:
2052 ath10k_dbg(ATH10K_DBG_WMI,
2053 "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
2054 __le32_to_cpu(ev->sw_version),
2055 __le32_to_cpu(ev->abi_version),
2056 __le32_to_cpu(ev->phy_capability),
2057 __le32_to_cpu(ev->ht_cap_info),
2058 __le32_to_cpu(ev->vht_cap_info),
2059 __le32_to_cpu(ev->vht_supp_mcs),
2060 __le32_to_cpu(ev->sys_cap_info),
2061 __le32_to_cpu(ev->num_mem_reqs),
2062 __le32_to_cpu(ev->num_rf_chains));
2063
2064 complete(&ar->wmi.service_ready);
2065 }
2066
2067 static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
2068 {
2069 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
2070
2071 if (WARN_ON(skb->len < sizeof(*ev)))
2072 return -EINVAL;
2073
2074 memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN);
2075
2076 ath10k_dbg(ATH10K_DBG_WMI,
2077 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n",
2078 __le32_to_cpu(ev->sw_version),
2079 __le32_to_cpu(ev->abi_version),
2080 ev->mac_addr.addr,
2081 __le32_to_cpu(ev->status), skb->len, sizeof(*ev));
2082
2083 complete(&ar->wmi.unified_ready);
2084 return 0;
2085 }
2086
2087 static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
2088 {
2089 struct wmi_cmd_hdr *cmd_hdr;
2090 enum wmi_event_id id;
2091 u16 len;
2092
2093 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2094 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2095
2096 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2097 return;
2098
2099 len = skb->len;
2100
2101 trace_ath10k_wmi_event(id, skb->data, skb->len);
2102
2103 switch (id) {
2104 case WMI_MGMT_RX_EVENTID:
2105 ath10k_wmi_event_mgmt_rx(ar, skb);
2106 /* mgmt_rx() owns the skb now! */
2107 return;
2108 case WMI_SCAN_EVENTID:
2109 ath10k_wmi_event_scan(ar, skb);
2110 break;
2111 case WMI_CHAN_INFO_EVENTID:
2112 ath10k_wmi_event_chan_info(ar, skb);
2113 break;
2114 case WMI_ECHO_EVENTID:
2115 ath10k_wmi_event_echo(ar, skb);
2116 break;
2117 case WMI_DEBUG_MESG_EVENTID:
2118 ath10k_wmi_event_debug_mesg(ar, skb);
2119 break;
2120 case WMI_UPDATE_STATS_EVENTID:
2121 ath10k_wmi_event_update_stats(ar, skb);
2122 break;
2123 case WMI_VDEV_START_RESP_EVENTID:
2124 ath10k_wmi_event_vdev_start_resp(ar, skb);
2125 break;
2126 case WMI_VDEV_STOPPED_EVENTID:
2127 ath10k_wmi_event_vdev_stopped(ar, skb);
2128 break;
2129 case WMI_PEER_STA_KICKOUT_EVENTID:
2130 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2131 break;
2132 case WMI_HOST_SWBA_EVENTID:
2133 ath10k_wmi_event_host_swba(ar, skb);
2134 break;
2135 case WMI_TBTTOFFSET_UPDATE_EVENTID:
2136 ath10k_wmi_event_tbttoffset_update(ar, skb);
2137 break;
2138 case WMI_PHYERR_EVENTID:
2139 ath10k_wmi_event_phyerr(ar, skb);
2140 break;
2141 case WMI_ROAM_EVENTID:
2142 ath10k_wmi_event_roam(ar, skb);
2143 break;
2144 case WMI_PROFILE_MATCH:
2145 ath10k_wmi_event_profile_match(ar, skb);
2146 break;
2147 case WMI_DEBUG_PRINT_EVENTID:
2148 ath10k_wmi_event_debug_print(ar, skb);
2149 break;
2150 case WMI_PDEV_QVIT_EVENTID:
2151 ath10k_wmi_event_pdev_qvit(ar, skb);
2152 break;
2153 case WMI_WLAN_PROFILE_DATA_EVENTID:
2154 ath10k_wmi_event_wlan_profile_data(ar, skb);
2155 break;
2156 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
2157 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2158 break;
2159 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
2160 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2161 break;
2162 case WMI_RTT_ERROR_REPORT_EVENTID:
2163 ath10k_wmi_event_rtt_error_report(ar, skb);
2164 break;
2165 case WMI_WOW_WAKEUP_HOST_EVENTID:
2166 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2167 break;
2168 case WMI_DCS_INTERFERENCE_EVENTID:
2169 ath10k_wmi_event_dcs_interference(ar, skb);
2170 break;
2171 case WMI_PDEV_TPC_CONFIG_EVENTID:
2172 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2173 break;
2174 case WMI_PDEV_FTM_INTG_EVENTID:
2175 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
2176 break;
2177 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
2178 ath10k_wmi_event_gtk_offload_status(ar, skb);
2179 break;
2180 case WMI_GTK_REKEY_FAIL_EVENTID:
2181 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
2182 break;
2183 case WMI_TX_DELBA_COMPLETE_EVENTID:
2184 ath10k_wmi_event_delba_complete(ar, skb);
2185 break;
2186 case WMI_TX_ADDBA_COMPLETE_EVENTID:
2187 ath10k_wmi_event_addba_complete(ar, skb);
2188 break;
2189 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
2190 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
2191 break;
2192 case WMI_SERVICE_READY_EVENTID:
2193 ath10k_wmi_service_ready_event_rx(ar, skb);
2194 break;
2195 case WMI_READY_EVENTID:
2196 ath10k_wmi_ready_event_rx(ar, skb);
2197 break;
2198 default:
2199 ath10k_warn("Unknown eventid: %d\n", id);
2200 break;
2201 }
2202
2203 dev_kfree_skb(skb);
2204 }
2205
2206 static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
2207 {
2208 struct wmi_cmd_hdr *cmd_hdr;
2209 enum wmi_10x_event_id id;
2210 u16 len;
2211
2212 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2213 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2214
2215 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2216 return;
2217
2218 len = skb->len;
2219
2220 trace_ath10k_wmi_event(id, skb->data, skb->len);
2221
2222 switch (id) {
2223 case WMI_10X_MGMT_RX_EVENTID:
2224 ath10k_wmi_event_mgmt_rx(ar, skb);
2225 /* mgmt_rx() owns the skb now! */
2226 return;
2227 case WMI_10X_SCAN_EVENTID:
2228 ath10k_wmi_event_scan(ar, skb);
2229 break;
2230 case WMI_10X_CHAN_INFO_EVENTID:
2231 ath10k_wmi_event_chan_info(ar, skb);
2232 break;
2233 case WMI_10X_ECHO_EVENTID:
2234 ath10k_wmi_event_echo(ar, skb);
2235 break;
2236 case WMI_10X_DEBUG_MESG_EVENTID:
2237 ath10k_wmi_event_debug_mesg(ar, skb);
2238 break;
2239 case WMI_10X_UPDATE_STATS_EVENTID:
2240 ath10k_wmi_event_update_stats(ar, skb);
2241 break;
2242 case WMI_10X_VDEV_START_RESP_EVENTID:
2243 ath10k_wmi_event_vdev_start_resp(ar, skb);
2244 break;
2245 case WMI_10X_VDEV_STOPPED_EVENTID:
2246 ath10k_wmi_event_vdev_stopped(ar, skb);
2247 break;
2248 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
2249 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2250 break;
2251 case WMI_10X_HOST_SWBA_EVENTID:
2252 ath10k_wmi_event_host_swba(ar, skb);
2253 break;
2254 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
2255 ath10k_wmi_event_tbttoffset_update(ar, skb);
2256 break;
2257 case WMI_10X_PHYERR_EVENTID:
2258 ath10k_wmi_event_phyerr(ar, skb);
2259 break;
2260 case WMI_10X_ROAM_EVENTID:
2261 ath10k_wmi_event_roam(ar, skb);
2262 break;
2263 case WMI_10X_PROFILE_MATCH:
2264 ath10k_wmi_event_profile_match(ar, skb);
2265 break;
2266 case WMI_10X_DEBUG_PRINT_EVENTID:
2267 ath10k_wmi_event_debug_print(ar, skb);
2268 break;
2269 case WMI_10X_PDEV_QVIT_EVENTID:
2270 ath10k_wmi_event_pdev_qvit(ar, skb);
2271 break;
2272 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
2273 ath10k_wmi_event_wlan_profile_data(ar, skb);
2274 break;
2275 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
2276 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2277 break;
2278 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
2279 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2280 break;
2281 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
2282 ath10k_wmi_event_rtt_error_report(ar, skb);
2283 break;
2284 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
2285 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2286 break;
2287 case WMI_10X_DCS_INTERFERENCE_EVENTID:
2288 ath10k_wmi_event_dcs_interference(ar, skb);
2289 break;
2290 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
2291 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2292 break;
2293 case WMI_10X_INST_RSSI_STATS_EVENTID:
2294 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2295 break;
2296 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
2297 ath10k_wmi_event_vdev_standby_req(ar, skb);
2298 break;
2299 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
2300 ath10k_wmi_event_vdev_resume_req(ar, skb);
2301 break;
2302 case WMI_10X_SERVICE_READY_EVENTID:
2303 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
2304 break;
2305 case WMI_10X_READY_EVENTID:
2306 ath10k_wmi_ready_event_rx(ar, skb);
2307 break;
2308 default:
2309 ath10k_warn("Unknown eventid: %d\n", id);
2310 break;
2311 }
2312
2313 dev_kfree_skb(skb);
2314 }
2315
2316
2317 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
2318 {
2319 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2320 ath10k_wmi_10x_process_rx(ar, skb);
2321 else
2322 ath10k_wmi_main_process_rx(ar, skb);
2323 }
2324
2325 /* WMI Initialization functions */
2326 int ath10k_wmi_attach(struct ath10k *ar)
2327 {
2328 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
2329 ar->wmi.cmd = &wmi_10x_cmd_map;
2330 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
2331 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
2332 } else {
2333 ar->wmi.cmd = &wmi_cmd_map;
2334 ar->wmi.vdev_param = &wmi_vdev_param_map;
2335 ar->wmi.pdev_param = &wmi_pdev_param_map;
2336 }
2337
2338 init_completion(&ar->wmi.service_ready);
2339 init_completion(&ar->wmi.unified_ready);
2340 init_waitqueue_head(&ar->wmi.tx_credits_wq);
2341
2342 return 0;
2343 }
2344
2345 void ath10k_wmi_detach(struct ath10k *ar)
2346 {
2347 int i;
2348
2349 /* free the host memory chunks requested by firmware */
2350 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2351 dma_free_coherent(ar->dev,
2352 ar->wmi.mem_chunks[i].len,
2353 ar->wmi.mem_chunks[i].vaddr,
2354 ar->wmi.mem_chunks[i].paddr);
2355 }
2356
2357 ar->wmi.num_mem_chunks = 0;
2358 }
2359
2360 int ath10k_wmi_connect_htc_service(struct ath10k *ar)
2361 {
2362 int status;
2363 struct ath10k_htc_svc_conn_req conn_req;
2364 struct ath10k_htc_svc_conn_resp conn_resp;
2365
2366 memset(&conn_req, 0, sizeof(conn_req));
2367 memset(&conn_resp, 0, sizeof(conn_resp));
2368
2369 /* these fields are the same for all service endpoints */
2370 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
2371 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
2372 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
2373
2374 /* connect to control service */
2375 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
2376
2377 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
2378 if (status) {
2379 ath10k_warn("failed to connect to WMI CONTROL service status: %d\n",
2380 status);
2381 return status;
2382 }
2383
2384 ar->wmi.eid = conn_resp.eid;
2385 return 0;
2386 }
2387
2388 static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2389 u16 rd2g, u16 rd5g, u16 ctl2g,
2390 u16 ctl5g)
2391 {
2392 struct wmi_pdev_set_regdomain_cmd *cmd;
2393 struct sk_buff *skb;
2394
2395 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2396 if (!skb)
2397 return -ENOMEM;
2398
2399 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
2400 cmd->reg_domain = __cpu_to_le32(rd);
2401 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2402 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2403 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2404 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2405
2406 ath10k_dbg(ATH10K_DBG_WMI,
2407 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
2408 rd, rd2g, rd5g, ctl2g, ctl5g);
2409
2410 return ath10k_wmi_cmd_send(ar, skb,
2411 ar->wmi.cmd->pdev_set_regdomain_cmdid);
2412 }
2413
2414 static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2415 u16 rd2g, u16 rd5g,
2416 u16 ctl2g, u16 ctl5g,
2417 enum wmi_dfs_region dfs_reg)
2418 {
2419 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
2420 struct sk_buff *skb;
2421
2422 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2423 if (!skb)
2424 return -ENOMEM;
2425
2426 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
2427 cmd->reg_domain = __cpu_to_le32(rd);
2428 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2429 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2430 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2431 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2432 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
2433
2434 ath10k_dbg(ATH10K_DBG_WMI,
2435 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
2436 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
2437
2438 return ath10k_wmi_cmd_send(ar, skb,
2439 ar->wmi.cmd->pdev_set_regdomain_cmdid);
2440 }
2441
2442 int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
2443 u16 rd5g, u16 ctl2g, u16 ctl5g,
2444 enum wmi_dfs_region dfs_reg)
2445 {
2446 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2447 return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2448 ctl2g, ctl5g, dfs_reg);
2449 else
2450 return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2451 ctl2g, ctl5g);
2452 }
2453
2454 int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
2455 const struct wmi_channel_arg *arg)
2456 {
2457 struct wmi_set_channel_cmd *cmd;
2458 struct sk_buff *skb;
2459 u32 ch_flags = 0;
2460
2461 if (arg->passive)
2462 return -EINVAL;
2463
2464 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2465 if (!skb)
2466 return -ENOMEM;
2467
2468 if (arg->chan_radar)
2469 ch_flags |= WMI_CHAN_FLAG_DFS;
2470
2471 cmd = (struct wmi_set_channel_cmd *)skb->data;
2472 cmd->chan.mhz = __cpu_to_le32(arg->freq);
2473 cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
2474 cmd->chan.mode = arg->mode;
2475 cmd->chan.flags |= __cpu_to_le32(ch_flags);
2476 cmd->chan.min_power = arg->min_power;
2477 cmd->chan.max_power = arg->max_power;
2478 cmd->chan.reg_power = arg->max_reg_power;
2479 cmd->chan.reg_classid = arg->reg_class_id;
2480 cmd->chan.antenna_max = arg->max_antenna_gain;
2481
2482 ath10k_dbg(ATH10K_DBG_WMI,
2483 "wmi set channel mode %d freq %d\n",
2484 arg->mode, arg->freq);
2485
2486 return ath10k_wmi_cmd_send(ar, skb,
2487 ar->wmi.cmd->pdev_set_channel_cmdid);
2488 }
2489
2490 int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt)
2491 {
2492 struct wmi_pdev_suspend_cmd *cmd;
2493 struct sk_buff *skb;
2494
2495 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2496 if (!skb)
2497 return -ENOMEM;
2498
2499 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
2500 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
2501
2502 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
2503 }
2504
2505 int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
2506 {
2507 struct sk_buff *skb;
2508
2509 skb = ath10k_wmi_alloc_skb(0);
2510 if (skb == NULL)
2511 return -ENOMEM;
2512
2513 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
2514 }
2515
2516 int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
2517 {
2518 struct wmi_pdev_set_param_cmd *cmd;
2519 struct sk_buff *skb;
2520
2521 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
2522 ath10k_warn("pdev param %d not supported by firmware\n", id);
2523 return -EOPNOTSUPP;
2524 }
2525
2526 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2527 if (!skb)
2528 return -ENOMEM;
2529
2530 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
2531 cmd->param_id = __cpu_to_le32(id);
2532 cmd->param_value = __cpu_to_le32(value);
2533
2534 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
2535 id, value);
2536 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
2537 }
2538
2539 static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
2540 {
2541 struct wmi_init_cmd *cmd;
2542 struct sk_buff *buf;
2543 struct wmi_resource_config config = {};
2544 u32 len, val;
2545 int i;
2546
2547 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
2548 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
2549 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
2550
2551 config.num_offload_reorder_bufs =
2552 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
2553
2554 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
2555 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
2556 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
2557 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
2558 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
2559 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2560 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2561 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2562 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
2563 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
2564
2565 config.scan_max_pending_reqs =
2566 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
2567
2568 config.bmiss_offload_max_vdev =
2569 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
2570
2571 config.roam_offload_max_vdev =
2572 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
2573
2574 config.roam_offload_max_ap_profiles =
2575 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
2576
2577 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
2578 config.num_mcast_table_elems =
2579 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
2580
2581 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
2582 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
2583 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
2584 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
2585 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
2586
2587 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
2588 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2589
2590 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
2591
2592 config.gtk_offload_max_vdev =
2593 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
2594
2595 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
2596 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
2597
2598 len = sizeof(*cmd) +
2599 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2600
2601 buf = ath10k_wmi_alloc_skb(len);
2602 if (!buf)
2603 return -ENOMEM;
2604
2605 cmd = (struct wmi_init_cmd *)buf->data;
2606
2607 if (ar->wmi.num_mem_chunks == 0) {
2608 cmd->num_host_mem_chunks = 0;
2609 goto out;
2610 }
2611
2612 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
2613 ar->wmi.num_mem_chunks);
2614
2615 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2616
2617 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2618 cmd->host_mem_chunks[i].ptr =
2619 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2620 cmd->host_mem_chunks[i].size =
2621 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2622 cmd->host_mem_chunks[i].req_id =
2623 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2624
2625 ath10k_dbg(ATH10K_DBG_WMI,
2626 "wmi chunk %d len %d requested, addr 0x%llx\n",
2627 i,
2628 ar->wmi.mem_chunks[i].len,
2629 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
2630 }
2631 out:
2632 memcpy(&cmd->resource_config, &config, sizeof(config));
2633
2634 ath10k_dbg(ATH10K_DBG_WMI, "wmi init\n");
2635 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
2636 }
2637
2638 static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
2639 {
2640 struct wmi_init_cmd_10x *cmd;
2641 struct sk_buff *buf;
2642 struct wmi_resource_config_10x config = {};
2643 u32 len, val;
2644 int i;
2645
2646 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
2647 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
2648 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
2649 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
2650 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
2651 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
2652 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
2653 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2654 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2655 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
2656 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
2657 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
2658
2659 config.scan_max_pending_reqs =
2660 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
2661
2662 config.bmiss_offload_max_vdev =
2663 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
2664
2665 config.roam_offload_max_vdev =
2666 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
2667
2668 config.roam_offload_max_ap_profiles =
2669 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
2670
2671 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
2672 config.num_mcast_table_elems =
2673 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
2674
2675 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
2676 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
2677 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
2678 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
2679 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
2680
2681 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
2682 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
2683
2684 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
2685
2686 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
2687 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
2688
2689 len = sizeof(*cmd) +
2690 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
2691
2692 buf = ath10k_wmi_alloc_skb(len);
2693 if (!buf)
2694 return -ENOMEM;
2695
2696 cmd = (struct wmi_init_cmd_10x *)buf->data;
2697
2698 if (ar->wmi.num_mem_chunks == 0) {
2699 cmd->num_host_mem_chunks = 0;
2700 goto out;
2701 }
2702
2703 ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
2704 ar->wmi.num_mem_chunks);
2705
2706 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
2707
2708 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2709 cmd->host_mem_chunks[i].ptr =
2710 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
2711 cmd->host_mem_chunks[i].size =
2712 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
2713 cmd->host_mem_chunks[i].req_id =
2714 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
2715
2716 ath10k_dbg(ATH10K_DBG_WMI,
2717 "wmi chunk %d len %d requested, addr 0x%llx\n",
2718 i,
2719 ar->wmi.mem_chunks[i].len,
2720 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
2721 }
2722 out:
2723 memcpy(&cmd->resource_config, &config, sizeof(config));
2724
2725 ath10k_dbg(ATH10K_DBG_WMI, "wmi init 10x\n");
2726 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
2727 }
2728
2729 int ath10k_wmi_cmd_init(struct ath10k *ar)
2730 {
2731 int ret;
2732
2733 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2734 ret = ath10k_wmi_10x_cmd_init(ar);
2735 else
2736 ret = ath10k_wmi_main_cmd_init(ar);
2737
2738 return ret;
2739 }
2740
2741 static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
2742 const struct wmi_start_scan_arg *arg)
2743 {
2744 int len;
2745
2746 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2747 len = sizeof(struct wmi_start_scan_cmd_10x);
2748 else
2749 len = sizeof(struct wmi_start_scan_cmd);
2750
2751 if (arg->ie_len) {
2752 if (!arg->ie)
2753 return -EINVAL;
2754 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
2755 return -EINVAL;
2756
2757 len += sizeof(struct wmi_ie_data);
2758 len += roundup(arg->ie_len, 4);
2759 }
2760
2761 if (arg->n_channels) {
2762 if (!arg->channels)
2763 return -EINVAL;
2764 if (arg->n_channels > ARRAY_SIZE(arg->channels))
2765 return -EINVAL;
2766
2767 len += sizeof(struct wmi_chan_list);
2768 len += sizeof(__le32) * arg->n_channels;
2769 }
2770
2771 if (arg->n_ssids) {
2772 if (!arg->ssids)
2773 return -EINVAL;
2774 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
2775 return -EINVAL;
2776
2777 len += sizeof(struct wmi_ssid_list);
2778 len += sizeof(struct wmi_ssid) * arg->n_ssids;
2779 }
2780
2781 if (arg->n_bssids) {
2782 if (!arg->bssids)
2783 return -EINVAL;
2784 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
2785 return -EINVAL;
2786
2787 len += sizeof(struct wmi_bssid_list);
2788 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2789 }
2790
2791 return len;
2792 }
2793
2794 int ath10k_wmi_start_scan(struct ath10k *ar,
2795 const struct wmi_start_scan_arg *arg)
2796 {
2797 struct wmi_start_scan_cmd *cmd;
2798 struct sk_buff *skb;
2799 struct wmi_ie_data *ie;
2800 struct wmi_chan_list *channels;
2801 struct wmi_ssid_list *ssids;
2802 struct wmi_bssid_list *bssids;
2803 u32 scan_id;
2804 u32 scan_req_id;
2805 int off;
2806 int len = 0;
2807 int i;
2808
2809 len = ath10k_wmi_start_scan_calc_len(ar, arg);
2810 if (len < 0)
2811 return len; /* len contains error code here */
2812
2813 skb = ath10k_wmi_alloc_skb(len);
2814 if (!skb)
2815 return -ENOMEM;
2816
2817 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
2818 scan_id |= arg->scan_id;
2819
2820 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2821 scan_req_id |= arg->scan_req_id;
2822
2823 cmd = (struct wmi_start_scan_cmd *)skb->data;
2824 cmd->scan_id = __cpu_to_le32(scan_id);
2825 cmd->scan_req_id = __cpu_to_le32(scan_req_id);
2826 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
2827 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
2828 cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
2829 cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
2830 cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
2831 cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
2832 cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
2833 cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
2834 cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
2835 cmd->idle_time = __cpu_to_le32(arg->idle_time);
2836 cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
2837 cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
2838 cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
2839
2840 /* TLV list starts after fields included in the struct */
2841 /* There's just one filed that differes the two start_scan
2842 * structures - burst_duration, which we are not using btw,
2843 no point to make the split here, just shift the buffer to fit with
2844 given FW */
2845 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2846 off = sizeof(struct wmi_start_scan_cmd_10x);
2847 else
2848 off = sizeof(struct wmi_start_scan_cmd);
2849
2850 if (arg->n_channels) {
2851 channels = (void *)skb->data + off;
2852 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
2853 channels->num_chan = __cpu_to_le32(arg->n_channels);
2854
2855 for (i = 0; i < arg->n_channels; i++)
2856 channels->channel_list[i] =
2857 __cpu_to_le32(arg->channels[i]);
2858
2859 off += sizeof(*channels);
2860 off += sizeof(__le32) * arg->n_channels;
2861 }
2862
2863 if (arg->n_ssids) {
2864 ssids = (void *)skb->data + off;
2865 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
2866 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
2867
2868 for (i = 0; i < arg->n_ssids; i++) {
2869 ssids->ssids[i].ssid_len =
2870 __cpu_to_le32(arg->ssids[i].len);
2871 memcpy(&ssids->ssids[i].ssid,
2872 arg->ssids[i].ssid,
2873 arg->ssids[i].len);
2874 }
2875
2876 off += sizeof(*ssids);
2877 off += sizeof(struct wmi_ssid) * arg->n_ssids;
2878 }
2879
2880 if (arg->n_bssids) {
2881 bssids = (void *)skb->data + off;
2882 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
2883 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
2884
2885 for (i = 0; i < arg->n_bssids; i++)
2886 memcpy(&bssids->bssid_list[i],
2887 arg->bssids[i].bssid,
2888 ETH_ALEN);
2889
2890 off += sizeof(*bssids);
2891 off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
2892 }
2893
2894 if (arg->ie_len) {
2895 ie = (void *)skb->data + off;
2896 ie->tag = __cpu_to_le32(WMI_IE_TAG);
2897 ie->ie_len = __cpu_to_le32(arg->ie_len);
2898 memcpy(ie->ie_data, arg->ie, arg->ie_len);
2899
2900 off += sizeof(*ie);
2901 off += roundup(arg->ie_len, 4);
2902 }
2903
2904 if (off != skb->len) {
2905 dev_kfree_skb(skb);
2906 return -EINVAL;
2907 }
2908
2909 ath10k_dbg(ATH10K_DBG_WMI, "wmi start scan\n");
2910 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
2911 }
2912
2913 void ath10k_wmi_start_scan_init(struct ath10k *ar,
2914 struct wmi_start_scan_arg *arg)
2915 {
2916 /* setup commonly used values */
2917 arg->scan_req_id = 1;
2918 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2919 arg->dwell_time_active = 50;
2920 arg->dwell_time_passive = 150;
2921 arg->min_rest_time = 50;
2922 arg->max_rest_time = 500;
2923 arg->repeat_probe_time = 0;
2924 arg->probe_spacing_time = 0;
2925 arg->idle_time = 0;
2926 arg->max_scan_time = 20000;
2927 arg->probe_delay = 5;
2928 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
2929 | WMI_SCAN_EVENT_COMPLETED
2930 | WMI_SCAN_EVENT_BSS_CHANNEL
2931 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
2932 | WMI_SCAN_EVENT_DEQUEUED;
2933 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
2934 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
2935 arg->n_bssids = 1;
2936 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
2937 }
2938
2939 int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
2940 {
2941 struct wmi_stop_scan_cmd *cmd;
2942 struct sk_buff *skb;
2943 u32 scan_id;
2944 u32 req_id;
2945
2946 if (arg->req_id > 0xFFF)
2947 return -EINVAL;
2948 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
2949 return -EINVAL;
2950
2951 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2952 if (!skb)
2953 return -ENOMEM;
2954
2955 scan_id = arg->u.scan_id;
2956 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
2957
2958 req_id = arg->req_id;
2959 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
2960
2961 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2962 cmd->req_type = __cpu_to_le32(arg->req_type);
2963 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
2964 cmd->scan_id = __cpu_to_le32(scan_id);
2965 cmd->scan_req_id = __cpu_to_le32(req_id);
2966
2967 ath10k_dbg(ATH10K_DBG_WMI,
2968 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
2969 arg->req_id, arg->req_type, arg->u.scan_id);
2970 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
2971 }
2972
2973 int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
2974 enum wmi_vdev_type type,
2975 enum wmi_vdev_subtype subtype,
2976 const u8 macaddr[ETH_ALEN])
2977 {
2978 struct wmi_vdev_create_cmd *cmd;
2979 struct sk_buff *skb;
2980
2981 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
2982 if (!skb)
2983 return -ENOMEM;
2984
2985 cmd = (struct wmi_vdev_create_cmd *)skb->data;
2986 cmd->vdev_id = __cpu_to_le32(vdev_id);
2987 cmd->vdev_type = __cpu_to_le32(type);
2988 cmd->vdev_subtype = __cpu_to_le32(subtype);
2989 memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN);
2990
2991 ath10k_dbg(ATH10K_DBG_WMI,
2992 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
2993 vdev_id, type, subtype, macaddr);
2994
2995 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
2996 }
2997
2998 int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
2999 {
3000 struct wmi_vdev_delete_cmd *cmd;
3001 struct sk_buff *skb;
3002
3003 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3004 if (!skb)
3005 return -ENOMEM;
3006
3007 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
3008 cmd->vdev_id = __cpu_to_le32(vdev_id);
3009
3010 ath10k_dbg(ATH10K_DBG_WMI,
3011 "WMI vdev delete id %d\n", vdev_id);
3012
3013 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
3014 }
3015
3016 static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
3017 const struct wmi_vdev_start_request_arg *arg,
3018 u32 cmd_id)
3019 {
3020 struct wmi_vdev_start_request_cmd *cmd;
3021 struct sk_buff *skb;
3022 const char *cmdname;
3023 u32 flags = 0;
3024 u32 ch_flags = 0;
3025
3026 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
3027 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
3028 return -EINVAL;
3029 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
3030 return -EINVAL;
3031 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
3032 return -EINVAL;
3033 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
3034 return -EINVAL;
3035
3036 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
3037 cmdname = "start";
3038 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
3039 cmdname = "restart";
3040 else
3041 return -EINVAL; /* should not happen, we already check cmd_id */
3042
3043 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3044 if (!skb)
3045 return -ENOMEM;
3046
3047 if (arg->hidden_ssid)
3048 flags |= WMI_VDEV_START_HIDDEN_SSID;
3049 if (arg->pmf_enabled)
3050 flags |= WMI_VDEV_START_PMF_ENABLED;
3051 if (arg->channel.chan_radar)
3052 ch_flags |= WMI_CHAN_FLAG_DFS;
3053
3054 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
3055 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3056 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
3057 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
3058 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
3059 cmd->flags = __cpu_to_le32(flags);
3060 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
3061 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
3062
3063 if (arg->ssid) {
3064 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
3065 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
3066 }
3067
3068 cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
3069
3070 cmd->chan.band_center_freq1 =
3071 __cpu_to_le32(arg->channel.band_center_freq1);
3072
3073 cmd->chan.mode = arg->channel.mode;
3074 cmd->chan.flags |= __cpu_to_le32(ch_flags);
3075 cmd->chan.min_power = arg->channel.min_power;
3076 cmd->chan.max_power = arg->channel.max_power;
3077 cmd->chan.reg_power = arg->channel.max_reg_power;
3078 cmd->chan.reg_classid = arg->channel.reg_class_id;
3079 cmd->chan.antenna_max = arg->channel.max_antenna_gain;
3080
3081 ath10k_dbg(ATH10K_DBG_WMI,
3082 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, "
3083 "ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id,
3084 flags, arg->channel.freq, arg->channel.mode,
3085 cmd->chan.flags, arg->channel.max_power);
3086
3087 return ath10k_wmi_cmd_send(ar, skb, cmd_id);
3088 }
3089
3090 int ath10k_wmi_vdev_start(struct ath10k *ar,
3091 const struct wmi_vdev_start_request_arg *arg)
3092 {
3093 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
3094
3095 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
3096 }
3097
3098 int ath10k_wmi_vdev_restart(struct ath10k *ar,
3099 const struct wmi_vdev_start_request_arg *arg)
3100 {
3101 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
3102
3103 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
3104 }
3105
3106 int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
3107 {
3108 struct wmi_vdev_stop_cmd *cmd;
3109 struct sk_buff *skb;
3110
3111 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3112 if (!skb)
3113 return -ENOMEM;
3114
3115 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
3116 cmd->vdev_id = __cpu_to_le32(vdev_id);
3117
3118 ath10k_dbg(ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
3119
3120 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
3121 }
3122
3123 int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
3124 {
3125 struct wmi_vdev_up_cmd *cmd;
3126 struct sk_buff *skb;
3127
3128 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3129 if (!skb)
3130 return -ENOMEM;
3131
3132 cmd = (struct wmi_vdev_up_cmd *)skb->data;
3133 cmd->vdev_id = __cpu_to_le32(vdev_id);
3134 cmd->vdev_assoc_id = __cpu_to_le32(aid);
3135 memcpy(&cmd->vdev_bssid.addr, bssid, ETH_ALEN);
3136
3137 ath10k_dbg(ATH10K_DBG_WMI,
3138 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
3139 vdev_id, aid, bssid);
3140
3141 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
3142 }
3143
3144 int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
3145 {
3146 struct wmi_vdev_down_cmd *cmd;
3147 struct sk_buff *skb;
3148
3149 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3150 if (!skb)
3151 return -ENOMEM;
3152
3153 cmd = (struct wmi_vdev_down_cmd *)skb->data;
3154 cmd->vdev_id = __cpu_to_le32(vdev_id);
3155
3156 ath10k_dbg(ATH10K_DBG_WMI,
3157 "wmi mgmt vdev down id 0x%x\n", vdev_id);
3158
3159 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
3160 }
3161
3162 int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
3163 u32 param_id, u32 param_value)
3164 {
3165 struct wmi_vdev_set_param_cmd *cmd;
3166 struct sk_buff *skb;
3167
3168 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
3169 ath10k_dbg(ATH10K_DBG_WMI,
3170 "vdev param %d not supported by firmware\n",
3171 param_id);
3172 return -EOPNOTSUPP;
3173 }
3174
3175 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3176 if (!skb)
3177 return -ENOMEM;
3178
3179 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
3180 cmd->vdev_id = __cpu_to_le32(vdev_id);
3181 cmd->param_id = __cpu_to_le32(param_id);
3182 cmd->param_value = __cpu_to_le32(param_value);
3183
3184 ath10k_dbg(ATH10K_DBG_WMI,
3185 "wmi vdev id 0x%x set param %d value %d\n",
3186 vdev_id, param_id, param_value);
3187
3188 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
3189 }
3190
3191 int ath10k_wmi_vdev_install_key(struct ath10k *ar,
3192 const struct wmi_vdev_install_key_arg *arg)
3193 {
3194 struct wmi_vdev_install_key_cmd *cmd;
3195 struct sk_buff *skb;
3196
3197 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
3198 return -EINVAL;
3199 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
3200 return -EINVAL;
3201
3202 skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->key_len);
3203 if (!skb)
3204 return -ENOMEM;
3205
3206 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
3207 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3208 cmd->key_idx = __cpu_to_le32(arg->key_idx);
3209 cmd->key_flags = __cpu_to_le32(arg->key_flags);
3210 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
3211 cmd->key_len = __cpu_to_le32(arg->key_len);
3212 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
3213 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
3214
3215 if (arg->macaddr)
3216 memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN);
3217 if (arg->key_data)
3218 memcpy(cmd->key_data, arg->key_data, arg->key_len);
3219
3220 ath10k_dbg(ATH10K_DBG_WMI,
3221 "wmi vdev install key idx %d cipher %d len %d\n",
3222 arg->key_idx, arg->key_cipher, arg->key_len);
3223 return ath10k_wmi_cmd_send(ar, skb,
3224 ar->wmi.cmd->vdev_install_key_cmdid);
3225 }
3226
3227 int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
3228 const u8 peer_addr[ETH_ALEN])
3229 {
3230 struct wmi_peer_create_cmd *cmd;
3231 struct sk_buff *skb;
3232
3233 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3234 if (!skb)
3235 return -ENOMEM;
3236
3237 cmd = (struct wmi_peer_create_cmd *)skb->data;
3238 cmd->vdev_id = __cpu_to_le32(vdev_id);
3239 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3240
3241 ath10k_dbg(ATH10K_DBG_WMI,
3242 "wmi peer create vdev_id %d peer_addr %pM\n",
3243 vdev_id, peer_addr);
3244 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
3245 }
3246
3247 int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
3248 const u8 peer_addr[ETH_ALEN])
3249 {
3250 struct wmi_peer_delete_cmd *cmd;
3251 struct sk_buff *skb;
3252
3253 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3254 if (!skb)
3255 return -ENOMEM;
3256
3257 cmd = (struct wmi_peer_delete_cmd *)skb->data;
3258 cmd->vdev_id = __cpu_to_le32(vdev_id);
3259 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3260
3261 ath10k_dbg(ATH10K_DBG_WMI,
3262 "wmi peer delete vdev_id %d peer_addr %pM\n",
3263 vdev_id, peer_addr);
3264 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
3265 }
3266
3267 int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
3268 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
3269 {
3270 struct wmi_peer_flush_tids_cmd *cmd;
3271 struct sk_buff *skb;
3272
3273 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3274 if (!skb)
3275 return -ENOMEM;
3276
3277 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
3278 cmd->vdev_id = __cpu_to_le32(vdev_id);
3279 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
3280 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3281
3282 ath10k_dbg(ATH10K_DBG_WMI,
3283 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
3284 vdev_id, peer_addr, tid_bitmap);
3285 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
3286 }
3287
3288 int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
3289 const u8 *peer_addr, enum wmi_peer_param param_id,
3290 u32 param_value)
3291 {
3292 struct wmi_peer_set_param_cmd *cmd;
3293 struct sk_buff *skb;
3294
3295 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3296 if (!skb)
3297 return -ENOMEM;
3298
3299 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
3300 cmd->vdev_id = __cpu_to_le32(vdev_id);
3301 cmd->param_id = __cpu_to_le32(param_id);
3302 cmd->param_value = __cpu_to_le32(param_value);
3303 memcpy(&cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3304
3305 ath10k_dbg(ATH10K_DBG_WMI,
3306 "wmi vdev %d peer 0x%pM set param %d value %d\n",
3307 vdev_id, peer_addr, param_id, param_value);
3308
3309 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
3310 }
3311
3312 int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
3313 enum wmi_sta_ps_mode psmode)
3314 {
3315 struct wmi_sta_powersave_mode_cmd *cmd;
3316 struct sk_buff *skb;
3317
3318 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3319 if (!skb)
3320 return -ENOMEM;
3321
3322 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
3323 cmd->vdev_id = __cpu_to_le32(vdev_id);
3324 cmd->sta_ps_mode = __cpu_to_le32(psmode);
3325
3326 ath10k_dbg(ATH10K_DBG_WMI,
3327 "wmi set powersave id 0x%x mode %d\n",
3328 vdev_id, psmode);
3329
3330 return ath10k_wmi_cmd_send(ar, skb,
3331 ar->wmi.cmd->sta_powersave_mode_cmdid);
3332 }
3333
3334 int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
3335 enum wmi_sta_powersave_param param_id,
3336 u32 value)
3337 {
3338 struct wmi_sta_powersave_param_cmd *cmd;
3339 struct sk_buff *skb;
3340
3341 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3342 if (!skb)
3343 return -ENOMEM;
3344
3345 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
3346 cmd->vdev_id = __cpu_to_le32(vdev_id);
3347 cmd->param_id = __cpu_to_le32(param_id);
3348 cmd->param_value = __cpu_to_le32(value);
3349
3350 ath10k_dbg(ATH10K_DBG_WMI,
3351 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
3352 vdev_id, param_id, value);
3353 return ath10k_wmi_cmd_send(ar, skb,
3354 ar->wmi.cmd->sta_powersave_param_cmdid);
3355 }
3356
3357 int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
3358 enum wmi_ap_ps_peer_param param_id, u32 value)
3359 {
3360 struct wmi_ap_ps_peer_cmd *cmd;
3361 struct sk_buff *skb;
3362
3363 if (!mac)
3364 return -EINVAL;
3365
3366 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3367 if (!skb)
3368 return -ENOMEM;
3369
3370 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
3371 cmd->vdev_id = __cpu_to_le32(vdev_id);
3372 cmd->param_id = __cpu_to_le32(param_id);
3373 cmd->param_value = __cpu_to_le32(value);
3374 memcpy(&cmd->peer_macaddr, mac, ETH_ALEN);
3375
3376 ath10k_dbg(ATH10K_DBG_WMI,
3377 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
3378 vdev_id, param_id, value, mac);
3379
3380 return ath10k_wmi_cmd_send(ar, skb,
3381 ar->wmi.cmd->ap_ps_peer_param_cmdid);
3382 }
3383
3384 int ath10k_wmi_scan_chan_list(struct ath10k *ar,
3385 const struct wmi_scan_chan_list_arg *arg)
3386 {
3387 struct wmi_scan_chan_list_cmd *cmd;
3388 struct sk_buff *skb;
3389 struct wmi_channel_arg *ch;
3390 struct wmi_channel *ci;
3391 int len;
3392 int i;
3393
3394 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
3395
3396 skb = ath10k_wmi_alloc_skb(len);
3397 if (!skb)
3398 return -EINVAL;
3399
3400 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
3401 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
3402
3403 for (i = 0; i < arg->n_channels; i++) {
3404 u32 flags = 0;
3405
3406 ch = &arg->channels[i];
3407 ci = &cmd->chan_info[i];
3408
3409 if (ch->passive)
3410 flags |= WMI_CHAN_FLAG_PASSIVE;
3411 if (ch->allow_ibss)
3412 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
3413 if (ch->allow_ht)
3414 flags |= WMI_CHAN_FLAG_ALLOW_HT;
3415 if (ch->allow_vht)
3416 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
3417 if (ch->ht40plus)
3418 flags |= WMI_CHAN_FLAG_HT40_PLUS;
3419 if (ch->chan_radar)
3420 flags |= WMI_CHAN_FLAG_DFS;
3421
3422 ci->mhz = __cpu_to_le32(ch->freq);
3423 ci->band_center_freq1 = __cpu_to_le32(ch->freq);
3424 ci->band_center_freq2 = 0;
3425 ci->min_power = ch->min_power;
3426 ci->max_power = ch->max_power;
3427 ci->reg_power = ch->max_reg_power;
3428 ci->antenna_max = ch->max_antenna_gain;
3429
3430 /* mode & flags share storage */
3431 ci->mode = ch->mode;
3432 ci->flags |= __cpu_to_le32(flags);
3433 }
3434
3435 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
3436 }
3437
3438 int ath10k_wmi_peer_assoc(struct ath10k *ar,
3439 const struct wmi_peer_assoc_complete_arg *arg)
3440 {
3441 struct wmi_peer_assoc_complete_cmd *cmd;
3442 struct sk_buff *skb;
3443
3444 if (arg->peer_mpdu_density > 16)
3445 return -EINVAL;
3446 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
3447 return -EINVAL;
3448 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
3449 return -EINVAL;
3450
3451 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3452 if (!skb)
3453 return -ENOMEM;
3454
3455 cmd = (struct wmi_peer_assoc_complete_cmd *)skb->data;
3456 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3457 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
3458 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
3459 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
3460 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
3461 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
3462 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
3463 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
3464 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
3465 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
3466 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
3467 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
3468 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
3469
3470 memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN);
3471
3472 cmd->peer_legacy_rates.num_rates =
3473 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
3474 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
3475 arg->peer_legacy_rates.num_rates);
3476
3477 cmd->peer_ht_rates.num_rates =
3478 __cpu_to_le32(arg->peer_ht_rates.num_rates);
3479 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
3480 arg->peer_ht_rates.num_rates);
3481
3482 cmd->peer_vht_rates.rx_max_rate =
3483 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
3484 cmd->peer_vht_rates.rx_mcs_set =
3485 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
3486 cmd->peer_vht_rates.tx_max_rate =
3487 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
3488 cmd->peer_vht_rates.tx_mcs_set =
3489 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
3490
3491 ath10k_dbg(ATH10K_DBG_WMI,
3492 "wmi peer assoc vdev %d addr %pM (%s)\n",
3493 arg->vdev_id, arg->addr,
3494 arg->peer_reassoc ? "reassociate" : "new");
3495 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
3496 }
3497
3498 /* This function assumes the beacon is already DMA mapped */
3499 int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif)
3500 {
3501 struct wmi_bcn_tx_ref_cmd *cmd;
3502 struct sk_buff *skb;
3503 struct sk_buff *beacon = arvif->beacon;
3504 struct ath10k *ar = arvif->ar;
3505 struct ieee80211_hdr *hdr;
3506 int ret;
3507 u16 fc;
3508
3509 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3510 if (!skb)
3511 return -ENOMEM;
3512
3513 hdr = (struct ieee80211_hdr *)beacon->data;
3514 fc = le16_to_cpu(hdr->frame_control);
3515
3516 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
3517 cmd->vdev_id = __cpu_to_le32(arvif->vdev_id);
3518 cmd->data_len = __cpu_to_le32(beacon->len);
3519 cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr);
3520 cmd->msdu_id = 0;
3521 cmd->frame_control = __cpu_to_le32(fc);
3522 cmd->flags = 0;
3523
3524 if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero)
3525 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
3526
3527 if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab)
3528 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
3529
3530 ret = ath10k_wmi_cmd_send_nowait(ar, skb,
3531 ar->wmi.cmd->pdev_send_bcn_cmdid);
3532
3533 if (ret)
3534 dev_kfree_skb(skb);
3535
3536 return ret;
3537 }
3538
3539 static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
3540 const struct wmi_wmm_params_arg *arg)
3541 {
3542 params->cwmin = __cpu_to_le32(arg->cwmin);
3543 params->cwmax = __cpu_to_le32(arg->cwmax);
3544 params->aifs = __cpu_to_le32(arg->aifs);
3545 params->txop = __cpu_to_le32(arg->txop);
3546 params->acm = __cpu_to_le32(arg->acm);
3547 params->no_ack = __cpu_to_le32(arg->no_ack);
3548 }
3549
3550 int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
3551 const struct wmi_pdev_set_wmm_params_arg *arg)
3552 {
3553 struct wmi_pdev_set_wmm_params *cmd;
3554 struct sk_buff *skb;
3555
3556 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3557 if (!skb)
3558 return -ENOMEM;
3559
3560 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
3561 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
3562 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
3563 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
3564 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
3565
3566 ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
3567 return ath10k_wmi_cmd_send(ar, skb,
3568 ar->wmi.cmd->pdev_set_wmm_params_cmdid);
3569 }
3570
3571 int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
3572 {
3573 struct wmi_request_stats_cmd *cmd;
3574 struct sk_buff *skb;
3575
3576 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3577 if (!skb)
3578 return -ENOMEM;
3579
3580 cmd = (struct wmi_request_stats_cmd *)skb->data;
3581 cmd->stats_id = __cpu_to_le32(stats_id);
3582
3583 ath10k_dbg(ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
3584 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
3585 }
3586
3587 int ath10k_wmi_force_fw_hang(struct ath10k *ar,
3588 enum wmi_force_fw_hang_type type, u32 delay_ms)
3589 {
3590 struct wmi_force_fw_hang_cmd *cmd;
3591 struct sk_buff *skb;
3592
3593 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3594 if (!skb)
3595 return -ENOMEM;
3596
3597 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
3598 cmd->type = __cpu_to_le32(type);
3599 cmd->delay_ms = __cpu_to_le32(delay_ms);
3600
3601 ath10k_dbg(ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
3602 type, delay_ms);
3603 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
3604 }
3605
3606 int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
3607 {
3608 struct wmi_dbglog_cfg_cmd *cmd;
3609 struct sk_buff *skb;
3610 u32 cfg;
3611
3612 skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
3613 if (!skb)
3614 return -ENOMEM;
3615
3616 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
3617
3618 if (module_enable) {
3619 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
3620 ATH10K_DBGLOG_CFG_LOG_LVL);
3621 } else {
3622 /* set back defaults, all modules with WARN level */
3623 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
3624 ATH10K_DBGLOG_CFG_LOG_LVL);
3625 module_enable = ~0;
3626 }
3627
3628 cmd->module_enable = __cpu_to_le32(module_enable);
3629 cmd->module_valid = __cpu_to_le32(~0);
3630 cmd->config_enable = __cpu_to_le32(cfg);
3631 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
3632
3633 ath10k_dbg(ATH10K_DBG_WMI,
3634 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
3635 __le32_to_cpu(cmd->module_enable),
3636 __le32_to_cpu(cmd->module_valid),
3637 __le32_to_cpu(cmd->config_enable),
3638 __le32_to_cpu(cmd->config_valid));
3639
3640 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
3641 }
Linux kernel - Deliverables
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