drivers/net/wireless/ath/ath5k/attach.c

   1 /*
   2  * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
   3  * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
   4  *
   5  * Permission to use, copy, modify, and distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  */
  18
  19 /*************************************\
  20 * Attach/Detach Functions and helpers *
  21 \*************************************/
  22
  23 #include <linux/pci.h>
  24 #include <linux/slab.h>
  25 #include "ath5k.h"
  26 #include "reg.h"
  27 #include "debug.h"
  28 #include "base.h"
  29
  30 /**
  31  * ath5k_hw_post - Power On Self Test helper function
  32  *
  33  * @ah: The &struct ath5k_hw
  34  */
  35 static int ath5k_hw_post(struct ath5k_hw *ah)
  36 {
  37
  38         static const u32 static_pattern[4] = {
  39                 0x55555555,     0xaaaaaaaa,
  40                 0x66666666,     0x99999999
  41         };
  42         static const u16 regs[2] = { AR5K_STA_ID0, AR5K_PHY(8) };
  43         int i, c;
  44         u16 cur_reg;
  45         u32 var_pattern;
  46         u32 init_val;
  47         u32 cur_val;
  48
  49         for (c = 0; c < 2; c++) {
  50
  51                 cur_reg = regs[c];
  52
  53                 /* Save previous value */
  54                 init_val = ath5k_hw_reg_read(ah, cur_reg);
  55
  56                 for (i = 0; i < 256; i++) {
  57                         var_pattern = i << 16 | i;
  58                         ath5k_hw_reg_write(ah, var_pattern, cur_reg);
  59                         cur_val = ath5k_hw_reg_read(ah, cur_reg);
  60
  61                         if (cur_val != var_pattern) {
  62                                 ATH5K_ERR(ah, "POST Failed !!!\n");
  63                                 return -EAGAIN;
  64                         }
  65
  66                         /* Found on ndiswrapper dumps */
  67                         var_pattern = 0x0039080f;
  68                         ath5k_hw_reg_write(ah, var_pattern, cur_reg);
  69                 }
  70
  71                 for (i = 0; i < 4; i++) {
  72                         var_pattern = static_pattern[i];
  73                         ath5k_hw_reg_write(ah, var_pattern, cur_reg);
  74                         cur_val = ath5k_hw_reg_read(ah, cur_reg);
  75
  76                         if (cur_val != var_pattern) {
  77                                 ATH5K_ERR(ah, "POST Failed !!!\n");
  78                                 return -EAGAIN;
  79                         }
  80
  81                         /* Found on ndiswrapper dumps */
  82                         var_pattern = 0x003b080f;
  83                         ath5k_hw_reg_write(ah, var_pattern, cur_reg);
  84                 }
  85
  86                 /* Restore previous value */
  87                 ath5k_hw_reg_write(ah, init_val, cur_reg);
  88
  89         }
  90
  91         return 0;
  92
  93 }
  94
  95 /**
  96  * ath5k_hw_init - Check if hw is supported and init the needed structs
  97  *
  98  * @ah: The &struct ath5k_hw we got from the driver's init_softc function
  99  *
 100  * Check if the device is supported, perform a POST and initialize the needed
 101  * structs. Returns -ENOMEM if we don't have memory for the needed structs,
 102  * -ENODEV if the device is not supported or prints an error msg if something
 103  * else went wrong.
 104  */
 105 int ath5k_hw_init(struct ath5k_hw *ah)
 106 {
 107         static const u8 zero_mac[ETH_ALEN] = { };
 108         struct ath_common *common = ath5k_hw_common(ah);
 109         struct pci_dev *pdev = ah->pdev;
 110         struct ath5k_eeprom_info *ee;
 111         int ret;
 112         u32 srev;
 113
 114         /*
 115          * HW information
 116          */
 117         ah->ah_radar.r_enabled = AR5K_TUNE_RADAR_ALERT;
 118         ah->ah_bwmode = AR5K_BWMODE_DEFAULT;
 119         ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER;
 120         ah->ah_imr = 0;
 121         ah->ah_retry_short = AR5K_INIT_RETRY_SHORT;
 122         ah->ah_retry_long = AR5K_INIT_RETRY_LONG;
 123         ah->ah_ant_mode = AR5K_ANTMODE_DEFAULT;
 124         ah->ah_noise_floor = -95;       /* until first NF calibration is run */
 125         ah->ani_state.ani_mode = ATH5K_ANI_MODE_AUTO;
 126         ah->ah_current_channel = &ah->channels[0];
 127
 128         /*
 129          * Find the mac version
 130          */
 131         ath5k_hw_read_srev(ah);
 132         srev = ah->ah_mac_srev;
 133         if (srev < AR5K_SREV_AR5311)
 134                 ah->ah_version = AR5K_AR5210;
 135         else if (srev < AR5K_SREV_AR5212)
 136                 ah->ah_version = AR5K_AR5211;
 137         else
 138                 ah->ah_version = AR5K_AR5212;
 139
 140         /* Get the MAC revision */
 141         ah->ah_mac_version = AR5K_REG_MS(srev, AR5K_SREV_VER);
 142         ah->ah_mac_revision = AR5K_REG_MS(srev, AR5K_SREV_REV);
 143
 144         /* Fill the ath5k_hw struct with the needed functions */
 145         ret = ath5k_hw_init_desc_functions(ah);
 146         if (ret)
 147                 goto err;
 148
 149         /* Bring device out of sleep and reset its units */
 150         ret = ath5k_hw_nic_wakeup(ah, 0, true);
 151         if (ret)
 152                 goto err;
 153
 154         /* Get PHY and RADIO revisions */
 155         ah->ah_phy_revision = ath5k_hw_reg_read(ah, AR5K_PHY_CHIP_ID) &
 156                         0xffffffff;
 157         ah->ah_radio_5ghz_revision = ath5k_hw_radio_revision(ah,
 158                         CHANNEL_5GHZ);
 159         ah->ah_phy = AR5K_PHY(0);
 160
 161         /* Try to identify radio chip based on its srev */
 162         switch (ah->ah_radio_5ghz_revision & 0xf0) {
 163         case AR5K_SREV_RAD_5111:
 164                 ah->ah_radio = AR5K_RF5111;
 165                 ah->ah_single_chip = false;
 166                 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
 167                                                         CHANNEL_2GHZ);
 168                 break;
 169         case AR5K_SREV_RAD_5112:
 170         case AR5K_SREV_RAD_2112:
 171                 ah->ah_radio = AR5K_RF5112;
 172                 ah->ah_single_chip = false;
 173                 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
 174                                                         CHANNEL_2GHZ);
 175                 break;
 176         case AR5K_SREV_RAD_2413:
 177                 ah->ah_radio = AR5K_RF2413;
 178                 ah->ah_single_chip = true;
 179                 break;
 180         case AR5K_SREV_RAD_5413:
 181                 ah->ah_radio = AR5K_RF5413;
 182                 ah->ah_single_chip = true;
 183                 break;
 184         case AR5K_SREV_RAD_2316:
 185                 ah->ah_radio = AR5K_RF2316;
 186                 ah->ah_single_chip = true;
 187                 break;
 188         case AR5K_SREV_RAD_2317:
 189                 ah->ah_radio = AR5K_RF2317;
 190                 ah->ah_single_chip = true;
 191                 break;
 192         case AR5K_SREV_RAD_5424:
 193                 if (ah->ah_mac_version == AR5K_SREV_AR2425 ||
 194                     ah->ah_mac_version == AR5K_SREV_AR2417) {
 195                         ah->ah_radio = AR5K_RF2425;
 196                         ah->ah_single_chip = true;
 197                 } else {
 198                         ah->ah_radio = AR5K_RF5413;
 199                         ah->ah_single_chip = true;
 200                 }
 201                 break;
 202         default:
 203                 /* Identify radio based on mac/phy srev */
 204                 if (ah->ah_version == AR5K_AR5210) {
 205                         ah->ah_radio = AR5K_RF5110;
 206                         ah->ah_single_chip = false;
 207                 } else if (ah->ah_version == AR5K_AR5211) {
 208                         ah->ah_radio = AR5K_RF5111;
 209                         ah->ah_single_chip = false;
 210                         ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
 211                                                                 CHANNEL_2GHZ);
 212                 } else if (ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4) ||
 213                            ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4) ||
 214                            ah->ah_phy_revision == AR5K_SREV_PHY_2425) {
 215                         ah->ah_radio = AR5K_RF2425;
 216                         ah->ah_single_chip = true;
 217                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2425;
 218                 } else if (srev == AR5K_SREV_AR5213A &&
 219                            ah->ah_phy_revision == AR5K_SREV_PHY_5212B) {
 220                         ah->ah_radio = AR5K_RF5112;
 221                         ah->ah_single_chip = false;
 222                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_5112B;
 223                 } else if (ah->ah_mac_version == (AR5K_SREV_AR2415 >> 4) ||
 224                            ah->ah_mac_version == (AR5K_SREV_AR2315_R6 >> 4)) {
 225                         ah->ah_radio = AR5K_RF2316;
 226                         ah->ah_single_chip = true;
 227                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2316;
 228                 } else if (ah->ah_mac_version == (AR5K_SREV_AR5414 >> 4) ||
 229                            ah->ah_phy_revision == AR5K_SREV_PHY_5413) {
 230                         ah->ah_radio = AR5K_RF5413;
 231                         ah->ah_single_chip = true;
 232                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_5413;
 233                 } else if (ah->ah_mac_version == (AR5K_SREV_AR2414 >> 4) ||
 234                            ah->ah_phy_revision == AR5K_SREV_PHY_2413) {
 235                         ah->ah_radio = AR5K_RF2413;
 236                         ah->ah_single_chip = true;
 237                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413;
 238                 } else {
 239                         ATH5K_ERR(ah, "Couldn't identify radio revision.\n");
 240                         ret = -ENODEV;
 241                         goto err;
 242                 }
 243         }
 244
 245
 246         /* Return on unsupported chips (unsupported eeprom etc) */
 247         if ((srev >= AR5K_SREV_AR5416) && (srev < AR5K_SREV_AR2425)) {
 248                 ATH5K_ERR(ah, "Device not yet supported.\n");
 249                 ret = -ENODEV;
 250                 goto err;
 251         }
 252
 253         /*
 254          * POST
 255          */
 256         ret = ath5k_hw_post(ah);
 257         if (ret)
 258                 goto err;
 259
 260         /* Enable pci core retry fix on Hainan (5213A) and later chips */
 261         if (srev >= AR5K_SREV_AR5213A)
 262                 AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_RETRY_FIX);
 263
 264         /*
 265          * Get card capabilities, calibration values etc
 266          * TODO: EEPROM work
 267          */
 268         ret = ath5k_eeprom_init(ah);
 269         if (ret) {
 270                 ATH5K_ERR(ah, "unable to init EEPROM\n");
 271                 goto err;
 272         }
 273
 274         ee = &ah->ah_capabilities.cap_eeprom;
 275
 276         /*
 277          * Write PCI-E power save settings
 278          */
 279         if ((ah->ah_version == AR5K_AR5212) && pdev && (pci_is_pcie(pdev))) {
 280                 ath5k_hw_reg_write(ah, 0x9248fc00, AR5K_PCIE_SERDES);
 281                 ath5k_hw_reg_write(ah, 0x24924924, AR5K_PCIE_SERDES);
 282
 283                 /* Shut off RX when elecidle is asserted */
 284                 ath5k_hw_reg_write(ah, 0x28000039, AR5K_PCIE_SERDES);
 285                 ath5k_hw_reg_write(ah, 0x53160824, AR5K_PCIE_SERDES);
 286
 287                 /* If serdes programming is enabled, increase PCI-E
 288                  * tx power for systems with long trace from host
 289                  * to minicard connector. */
 290                 if (ee->ee_serdes)
 291                         ath5k_hw_reg_write(ah, 0xe5980579, AR5K_PCIE_SERDES);
 292                 else
 293                         ath5k_hw_reg_write(ah, 0xf6800579, AR5K_PCIE_SERDES);
 294
 295                 /* Shut off PLL and CLKREQ active in L1 */
 296                 ath5k_hw_reg_write(ah, 0x001defff, AR5K_PCIE_SERDES);
 297
 298                 /* Preserve other settings */
 299                 ath5k_hw_reg_write(ah, 0x1aaabe40, AR5K_PCIE_SERDES);
 300                 ath5k_hw_reg_write(ah, 0xbe105554, AR5K_PCIE_SERDES);
 301                 ath5k_hw_reg_write(ah, 0x000e3007, AR5K_PCIE_SERDES);
 302
 303                 /* Reset SERDES to load new settings */
 304                 ath5k_hw_reg_write(ah, 0x00000000, AR5K_PCIE_SERDES_RESET);
 305                 mdelay(1);
 306         }
 307
 308         /* Get misc capabilities */
 309         ret = ath5k_hw_set_capabilities(ah);
 310         if (ret) {
 311                 ATH5K_ERR(ah, "unable to get device capabilities\n");
 312                 goto err;
 313         }
 314
 315         if (test_bit(ATH_STAT_2G_DISABLED, ah->status)) {
 316                 __clear_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode);
 317                 __clear_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode);
 318         }
 319
 320         /* Crypto settings */
 321         common->keymax = (ah->ah_version == AR5K_AR5210 ?
 322                           AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211);
 323
 324         if (srev >= AR5K_SREV_AR5212_V4 &&
 325             (ee->ee_version < AR5K_EEPROM_VERSION_5_0 ||
 326             !AR5K_EEPROM_AES_DIS(ee->ee_misc5)))
 327                 common->crypt_caps |= ATH_CRYPT_CAP_CIPHER_AESCCM;
 328
 329         if (srev >= AR5K_SREV_AR2414) {
 330                 common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
 331                 AR5K_REG_ENABLE_BITS(ah, AR5K_MISC_MODE,
 332                         AR5K_MISC_MODE_COMBINED_MIC);
 333         }
 334
 335         /* MAC address is cleared until add_interface */
 336         ath5k_hw_set_lladdr(ah, zero_mac);
 337
 338         /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
 339         memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN);
 340         ath5k_hw_set_bssid(ah);
 341         ath5k_hw_set_opmode(ah, ah->opmode);
 342
 343         ath5k_hw_rfgain_opt_init(ah);
 344
 345         ath5k_hw_init_nfcal_hist(ah);
 346
 347         /* turn on HW LEDs */
 348         ath5k_hw_set_ledstate(ah, AR5K_LED_INIT);
 349
 350         return 0;
 351 err:
 352         return ret;
 353 }
 354
 355 /**
 356  * ath5k_hw_deinit - Free the ath5k_hw struct
 357  *
 358  * @ah: The &struct ath5k_hw
 359  */
 360 void ath5k_hw_deinit(struct ath5k_hw *ah)
 361 {
 362         __set_bit(ATH_STAT_INVALID, ah->status);
 363
 364         if (ah->ah_rf_banks != NULL)
 365                 kfree(ah->ah_rf_banks);
 366
 367         ath5k_eeprom_detach(ah);
 368
 369         /* assume interrupts are down */
 370 }