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ath9k: Use static const
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / ar9003_calib.c
1 /*
2 * Copyright (c) 2010 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include "hw.h"
18 #include "hw-ops.h"
19 #include "ar9003_phy.h"
20
21 enum ar9003_cal_types {
22 IQ_MISMATCH_CAL = BIT(0),
23 TEMP_COMP_CAL = BIT(1),
24 };
25
26 static void ar9003_hw_setup_calibration(struct ath_hw *ah,
27 struct ath9k_cal_list *currCal)
28 {
29 struct ath_common *common = ath9k_hw_common(ah);
30
31 /* Select calibration to run */
32 switch (currCal->calData->calType) {
33 case IQ_MISMATCH_CAL:
34 /*
35 * Start calibration with
36 * 2^(INIT_IQCAL_LOG_COUNT_MAX+1) samples
37 */
38 REG_RMW_FIELD(ah, AR_PHY_TIMING4,
39 AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
40 currCal->calData->calCountMax);
41 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
42
43 ath_print(common, ATH_DBG_CALIBRATE,
44 "starting IQ Mismatch Calibration\n");
45
46 /* Kick-off cal */
47 REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
48 break;
49 case TEMP_COMP_CAL:
50 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
51 AR_PHY_65NM_CH0_THERM_LOCAL, 1);
52 REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
53 AR_PHY_65NM_CH0_THERM_START, 1);
54
55 ath_print(common, ATH_DBG_CALIBRATE,
56 "starting Temperature Compensation Calibration\n");
57 break;
58 }
59 }
60
61 /*
62 * Generic calibration routine.
63 * Recalibrate the lower PHY chips to account for temperature/environment
64 * changes.
65 */
66 static bool ar9003_hw_per_calibration(struct ath_hw *ah,
67 struct ath9k_channel *ichan,
68 u8 rxchainmask,
69 struct ath9k_cal_list *currCal)
70 {
71 struct ath9k_hw_cal_data *caldata = ah->caldata;
72 /* Cal is assumed not done until explicitly set below */
73 bool iscaldone = false;
74
75 /* Calibration in progress. */
76 if (currCal->calState == CAL_RUNNING) {
77 /* Check to see if it has finished. */
78 if (!(REG_READ(ah, AR_PHY_TIMING4) & AR_PHY_TIMING4_DO_CAL)) {
79 /*
80 * Accumulate cal measures for active chains
81 */
82 currCal->calData->calCollect(ah);
83 ah->cal_samples++;
84
85 if (ah->cal_samples >=
86 currCal->calData->calNumSamples) {
87 unsigned int i, numChains = 0;
88 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
89 if (rxchainmask & (1 << i))
90 numChains++;
91 }
92
93 /*
94 * Process accumulated data
95 */
96 currCal->calData->calPostProc(ah, numChains);
97
98 /* Calibration has finished. */
99 caldata->CalValid |= currCal->calData->calType;
100 currCal->calState = CAL_DONE;
101 iscaldone = true;
102 } else {
103 /*
104 * Set-up collection of another sub-sample until we
105 * get desired number
106 */
107 ar9003_hw_setup_calibration(ah, currCal);
108 }
109 }
110 } else if (!(caldata->CalValid & currCal->calData->calType)) {
111 /* If current cal is marked invalid in channel, kick it off */
112 ath9k_hw_reset_calibration(ah, currCal);
113 }
114
115 return iscaldone;
116 }
117
118 static bool ar9003_hw_calibrate(struct ath_hw *ah,
119 struct ath9k_channel *chan,
120 u8 rxchainmask,
121 bool longcal)
122 {
123 bool iscaldone = true;
124 struct ath9k_cal_list *currCal = ah->cal_list_curr;
125
126 /*
127 * For given calibration:
128 * 1. Call generic cal routine
129 * 2. When this cal is done (isCalDone) if we have more cals waiting
130 * (eg after reset), mask this to upper layers by not propagating
131 * isCalDone if it is set to TRUE.
132 * Instead, change isCalDone to FALSE and setup the waiting cal(s)
133 * to be run.
134 */
135 if (currCal &&
136 (currCal->calState == CAL_RUNNING ||
137 currCal->calState == CAL_WAITING)) {
138 iscaldone = ar9003_hw_per_calibration(ah, chan,
139 rxchainmask, currCal);
140 if (iscaldone) {
141 ah->cal_list_curr = currCal = currCal->calNext;
142
143 if (currCal->calState == CAL_WAITING) {
144 iscaldone = false;
145 ath9k_hw_reset_calibration(ah, currCal);
146 }
147 }
148 }
149
150 /* Do NF cal only at longer intervals */
151 if (longcal) {
152 /*
153 * Get the value from the previous NF cal and update
154 * history buffer.
155 */
156 ath9k_hw_getnf(ah, chan);
157
158 /*
159 * Load the NF from history buffer of the current channel.
160 * NF is slow time-variant, so it is OK to use a historical
161 * value.
162 */
163 ath9k_hw_loadnf(ah, ah->curchan);
164
165 /* start NF calibration, without updating BB NF register */
166 ath9k_hw_start_nfcal(ah, false);
167 }
168
169 return iscaldone;
170 }
171
172 static void ar9003_hw_iqcal_collect(struct ath_hw *ah)
173 {
174 int i;
175
176 /* Accumulate IQ cal measures for active chains */
177 for (i = 0; i < AR5416_MAX_CHAINS; i++) {
178 ah->totalPowerMeasI[i] +=
179 REG_READ(ah, AR_PHY_CAL_MEAS_0(i));
180 ah->totalPowerMeasQ[i] +=
181 REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
182 ah->totalIqCorrMeas[i] +=
183 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
184 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
185 "%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
186 ah->cal_samples, i, ah->totalPowerMeasI[i],
187 ah->totalPowerMeasQ[i],
188 ah->totalIqCorrMeas[i]);
189 }
190 }
191
192 static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
193 {
194 struct ath_common *common = ath9k_hw_common(ah);
195 u32 powerMeasQ, powerMeasI, iqCorrMeas;
196 u32 qCoffDenom, iCoffDenom;
197 int32_t qCoff, iCoff;
198 int iqCorrNeg, i;
199 static const u_int32_t offset_array[3] = {
200 AR_PHY_RX_IQCAL_CORR_B0,
201 AR_PHY_RX_IQCAL_CORR_B1,
202 AR_PHY_RX_IQCAL_CORR_B2,
203 };
204
205 for (i = 0; i < numChains; i++) {
206 powerMeasI = ah->totalPowerMeasI[i];
207 powerMeasQ = ah->totalPowerMeasQ[i];
208 iqCorrMeas = ah->totalIqCorrMeas[i];
209
210 ath_print(common, ATH_DBG_CALIBRATE,
211 "Starting IQ Cal and Correction for Chain %d\n",
212 i);
213
214 ath_print(common, ATH_DBG_CALIBRATE,
215 "Orignal: Chn %diq_corr_meas = 0x%08x\n",
216 i, ah->totalIqCorrMeas[i]);
217
218 iqCorrNeg = 0;
219
220 if (iqCorrMeas > 0x80000000) {
221 iqCorrMeas = (0xffffffff - iqCorrMeas) + 1;
222 iqCorrNeg = 1;
223 }
224
225 ath_print(common, ATH_DBG_CALIBRATE,
226 "Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI);
227 ath_print(common, ATH_DBG_CALIBRATE,
228 "Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ);
229 ath_print(common, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n",
230 iqCorrNeg);
231
232 iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 256;
233 qCoffDenom = powerMeasQ / 64;
234
235 if ((iCoffDenom != 0) && (qCoffDenom != 0)) {
236 iCoff = iqCorrMeas / iCoffDenom;
237 qCoff = powerMeasI / qCoffDenom - 64;
238 ath_print(common, ATH_DBG_CALIBRATE,
239 "Chn %d iCoff = 0x%08x\n", i, iCoff);
240 ath_print(common, ATH_DBG_CALIBRATE,
241 "Chn %d qCoff = 0x%08x\n", i, qCoff);
242
243 /* Force bounds on iCoff */
244 if (iCoff >= 63)
245 iCoff = 63;
246 else if (iCoff <= -63)
247 iCoff = -63;
248
249 /* Negate iCoff if iqCorrNeg == 0 */
250 if (iqCorrNeg == 0x0)
251 iCoff = -iCoff;
252
253 /* Force bounds on qCoff */
254 if (qCoff >= 63)
255 qCoff = 63;
256 else if (qCoff <= -63)
257 qCoff = -63;
258
259 iCoff = iCoff & 0x7f;
260 qCoff = qCoff & 0x7f;
261
262 ath_print(common, ATH_DBG_CALIBRATE,
263 "Chn %d : iCoff = 0x%x qCoff = 0x%x\n",
264 i, iCoff, qCoff);
265 ath_print(common, ATH_DBG_CALIBRATE,
266 "Register offset (0x%04x) "
267 "before update = 0x%x\n",
268 offset_array[i],
269 REG_READ(ah, offset_array[i]));
270
271 REG_RMW_FIELD(ah, offset_array[i],
272 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
273 iCoff);
274 REG_RMW_FIELD(ah, offset_array[i],
275 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
276 qCoff);
277 ath_print(common, ATH_DBG_CALIBRATE,
278 "Register offset (0x%04x) QI COFF "
279 "(bitfields 0x%08x) after update = 0x%x\n",
280 offset_array[i],
281 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
282 REG_READ(ah, offset_array[i]));
283 ath_print(common, ATH_DBG_CALIBRATE,
284 "Register offset (0x%04x) QQ COFF "
285 "(bitfields 0x%08x) after update = 0x%x\n",
286 offset_array[i],
287 AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
288 REG_READ(ah, offset_array[i]));
289
290 ath_print(common, ATH_DBG_CALIBRATE,
291 "IQ Cal and Correction done for Chain %d\n",
292 i);
293 }
294 }
295
296 REG_SET_BIT(ah, AR_PHY_RX_IQCAL_CORR_B0,
297 AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE);
298 ath_print(common, ATH_DBG_CALIBRATE,
299 "IQ Cal and Correction (offset 0x%04x) enabled "
300 "(bit position 0x%08x). New Value 0x%08x\n",
301 (unsigned) (AR_PHY_RX_IQCAL_CORR_B0),
302 AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE,
303 REG_READ(ah, AR_PHY_RX_IQCAL_CORR_B0));
304 }
305
306 static const struct ath9k_percal_data iq_cal_single_sample = {
307 IQ_MISMATCH_CAL,
308 MIN_CAL_SAMPLES,
309 PER_MAX_LOG_COUNT,
310 ar9003_hw_iqcal_collect,
311 ar9003_hw_iqcalibrate
312 };
313
314 static void ar9003_hw_init_cal_settings(struct ath_hw *ah)
315 {
316 ah->iq_caldata.calData = &iq_cal_single_sample;
317 }
318
319 /*
320 * solve 4x4 linear equation used in loopback iq cal.
321 */
322 static bool ar9003_hw_solve_iq_cal(struct ath_hw *ah,
323 s32 sin_2phi_1,
324 s32 cos_2phi_1,
325 s32 sin_2phi_2,
326 s32 cos_2phi_2,
327 s32 mag_a0_d0,
328 s32 phs_a0_d0,
329 s32 mag_a1_d0,
330 s32 phs_a1_d0,
331 s32 solved_eq[])
332 {
333 s32 f1 = cos_2phi_1 - cos_2phi_2,
334 f3 = sin_2phi_1 - sin_2phi_2,
335 f2;
336 s32 mag_tx, phs_tx, mag_rx, phs_rx;
337 const s32 result_shift = 1 << 15;
338 struct ath_common *common = ath9k_hw_common(ah);
339
340 f2 = (f1 * f1 + f3 * f3) / result_shift;
341
342 if (!f2) {
343 ath_print(common, ATH_DBG_CALIBRATE, "Divide by 0\n");
344 return false;
345 }
346
347 /* mag mismatch, tx */
348 mag_tx = f1 * (mag_a0_d0 - mag_a1_d0) + f3 * (phs_a0_d0 - phs_a1_d0);
349 /* phs mismatch, tx */
350 phs_tx = f3 * (-mag_a0_d0 + mag_a1_d0) + f1 * (phs_a0_d0 - phs_a1_d0);
351
352 mag_tx = (mag_tx / f2);
353 phs_tx = (phs_tx / f2);
354
355 /* mag mismatch, rx */
356 mag_rx = mag_a0_d0 - (cos_2phi_1 * mag_tx + sin_2phi_1 * phs_tx) /
357 result_shift;
358 /* phs mismatch, rx */
359 phs_rx = phs_a0_d0 + (sin_2phi_1 * mag_tx - cos_2phi_1 * phs_tx) /
360 result_shift;
361
362 solved_eq[0] = mag_tx;
363 solved_eq[1] = phs_tx;
364 solved_eq[2] = mag_rx;
365 solved_eq[3] = phs_rx;
366
367 return true;
368 }
369
370 static s32 ar9003_hw_find_mag_approx(struct ath_hw *ah, s32 in_re, s32 in_im)
371 {
372 s32 abs_i = abs(in_re),
373 abs_q = abs(in_im),
374 max_abs, min_abs;
375
376 if (abs_i > abs_q) {
377 max_abs = abs_i;
378 min_abs = abs_q;
379 } else {
380 max_abs = abs_q;
381 min_abs = abs_i;
382 }
383
384 return max_abs - (max_abs / 32) + (min_abs / 8) + (min_abs / 4);
385 }
386
387 #define DELPT 32
388
389 static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
390 s32 chain_idx,
391 const s32 iq_res[],
392 s32 iqc_coeff[])
393 {
394 s32 i2_m_q2_a0_d0, i2_p_q2_a0_d0, iq_corr_a0_d0,
395 i2_m_q2_a0_d1, i2_p_q2_a0_d1, iq_corr_a0_d1,
396 i2_m_q2_a1_d0, i2_p_q2_a1_d0, iq_corr_a1_d0,
397 i2_m_q2_a1_d1, i2_p_q2_a1_d1, iq_corr_a1_d1;
398 s32 mag_a0_d0, mag_a1_d0, mag_a0_d1, mag_a1_d1,
399 phs_a0_d0, phs_a1_d0, phs_a0_d1, phs_a1_d1,
400 sin_2phi_1, cos_2phi_1,
401 sin_2phi_2, cos_2phi_2;
402 s32 mag_tx, phs_tx, mag_rx, phs_rx;
403 s32 solved_eq[4], mag_corr_tx, phs_corr_tx, mag_corr_rx, phs_corr_rx,
404 q_q_coff, q_i_coff;
405 const s32 res_scale = 1 << 15;
406 const s32 delpt_shift = 1 << 8;
407 s32 mag1, mag2;
408 struct ath_common *common = ath9k_hw_common(ah);
409
410 i2_m_q2_a0_d0 = iq_res[0] & 0xfff;
411 i2_p_q2_a0_d0 = (iq_res[0] >> 12) & 0xfff;
412 iq_corr_a0_d0 = ((iq_res[0] >> 24) & 0xff) + ((iq_res[1] & 0xf) << 8);
413
414 if (i2_m_q2_a0_d0 > 0x800)
415 i2_m_q2_a0_d0 = -((0xfff - i2_m_q2_a0_d0) + 1);
416
417 if (i2_p_q2_a0_d0 > 0x800)
418 i2_p_q2_a0_d0 = -((0xfff - i2_p_q2_a0_d0) + 1);
419
420 if (iq_corr_a0_d0 > 0x800)
421 iq_corr_a0_d0 = -((0xfff - iq_corr_a0_d0) + 1);
422
423 i2_m_q2_a0_d1 = (iq_res[1] >> 4) & 0xfff;
424 i2_p_q2_a0_d1 = (iq_res[2] & 0xfff);
425 iq_corr_a0_d1 = (iq_res[2] >> 12) & 0xfff;
426
427 if (i2_m_q2_a0_d1 > 0x800)
428 i2_m_q2_a0_d1 = -((0xfff - i2_m_q2_a0_d1) + 1);
429
430 if (i2_p_q2_a0_d1 > 0x800)
431 i2_p_q2_a0_d1 = -((0xfff - i2_p_q2_a0_d1) + 1);
432
433 if (iq_corr_a0_d1 > 0x800)
434 iq_corr_a0_d1 = -((0xfff - iq_corr_a0_d1) + 1);
435
436 i2_m_q2_a1_d0 = ((iq_res[2] >> 24) & 0xff) + ((iq_res[3] & 0xf) << 8);
437 i2_p_q2_a1_d0 = (iq_res[3] >> 4) & 0xfff;
438 iq_corr_a1_d0 = iq_res[4] & 0xfff;
439
440 if (i2_m_q2_a1_d0 > 0x800)
441 i2_m_q2_a1_d0 = -((0xfff - i2_m_q2_a1_d0) + 1);
442
443 if (i2_p_q2_a1_d0 > 0x800)
444 i2_p_q2_a1_d0 = -((0xfff - i2_p_q2_a1_d0) + 1);
445
446 if (iq_corr_a1_d0 > 0x800)
447 iq_corr_a1_d0 = -((0xfff - iq_corr_a1_d0) + 1);
448
449 i2_m_q2_a1_d1 = (iq_res[4] >> 12) & 0xfff;
450 i2_p_q2_a1_d1 = ((iq_res[4] >> 24) & 0xff) + ((iq_res[5] & 0xf) << 8);
451 iq_corr_a1_d1 = (iq_res[5] >> 4) & 0xfff;
452
453 if (i2_m_q2_a1_d1 > 0x800)
454 i2_m_q2_a1_d1 = -((0xfff - i2_m_q2_a1_d1) + 1);
455
456 if (i2_p_q2_a1_d1 > 0x800)
457 i2_p_q2_a1_d1 = -((0xfff - i2_p_q2_a1_d1) + 1);
458
459 if (iq_corr_a1_d1 > 0x800)
460 iq_corr_a1_d1 = -((0xfff - iq_corr_a1_d1) + 1);
461
462 if ((i2_p_q2_a0_d0 == 0) || (i2_p_q2_a0_d1 == 0) ||
463 (i2_p_q2_a1_d0 == 0) || (i2_p_q2_a1_d1 == 0)) {
464 ath_print(common, ATH_DBG_CALIBRATE,
465 "Divide by 0:\na0_d0=%d\n"
466 "a0_d1=%d\na2_d0=%d\na1_d1=%d\n",
467 i2_p_q2_a0_d0, i2_p_q2_a0_d1,
468 i2_p_q2_a1_d0, i2_p_q2_a1_d1);
469 return false;
470 }
471
472 mag_a0_d0 = (i2_m_q2_a0_d0 * res_scale) / i2_p_q2_a0_d0;
473 phs_a0_d0 = (iq_corr_a0_d0 * res_scale) / i2_p_q2_a0_d0;
474
475 mag_a0_d1 = (i2_m_q2_a0_d1 * res_scale) / i2_p_q2_a0_d1;
476 phs_a0_d1 = (iq_corr_a0_d1 * res_scale) / i2_p_q2_a0_d1;
477
478 mag_a1_d0 = (i2_m_q2_a1_d0 * res_scale) / i2_p_q2_a1_d0;
479 phs_a1_d0 = (iq_corr_a1_d0 * res_scale) / i2_p_q2_a1_d0;
480
481 mag_a1_d1 = (i2_m_q2_a1_d1 * res_scale) / i2_p_q2_a1_d1;
482 phs_a1_d1 = (iq_corr_a1_d1 * res_scale) / i2_p_q2_a1_d1;
483
484 /* w/o analog phase shift */
485 sin_2phi_1 = (((mag_a0_d0 - mag_a0_d1) * delpt_shift) / DELPT);
486 /* w/o analog phase shift */
487 cos_2phi_1 = (((phs_a0_d1 - phs_a0_d0) * delpt_shift) / DELPT);
488 /* w/ analog phase shift */
489 sin_2phi_2 = (((mag_a1_d0 - mag_a1_d1) * delpt_shift) / DELPT);
490 /* w/ analog phase shift */
491 cos_2phi_2 = (((phs_a1_d1 - phs_a1_d0) * delpt_shift) / DELPT);
492
493 /*
494 * force sin^2 + cos^2 = 1;
495 * find magnitude by approximation
496 */
497 mag1 = ar9003_hw_find_mag_approx(ah, cos_2phi_1, sin_2phi_1);
498 mag2 = ar9003_hw_find_mag_approx(ah, cos_2phi_2, sin_2phi_2);
499
500 if ((mag1 == 0) || (mag2 == 0)) {
501 ath_print(common, ATH_DBG_CALIBRATE,
502 "Divide by 0: mag1=%d, mag2=%d\n",
503 mag1, mag2);
504 return false;
505 }
506
507 /* normalization sin and cos by mag */
508 sin_2phi_1 = (sin_2phi_1 * res_scale / mag1);
509 cos_2phi_1 = (cos_2phi_1 * res_scale / mag1);
510 sin_2phi_2 = (sin_2phi_2 * res_scale / mag2);
511 cos_2phi_2 = (cos_2phi_2 * res_scale / mag2);
512
513 /* calculate IQ mismatch */
514 if (!ar9003_hw_solve_iq_cal(ah,
515 sin_2phi_1, cos_2phi_1,
516 sin_2phi_2, cos_2phi_2,
517 mag_a0_d0, phs_a0_d0,
518 mag_a1_d0,
519 phs_a1_d0, solved_eq)) {
520 ath_print(common, ATH_DBG_CALIBRATE,
521 "Call to ar9003_hw_solve_iq_cal() failed.\n");
522 return false;
523 }
524
525 mag_tx = solved_eq[0];
526 phs_tx = solved_eq[1];
527 mag_rx = solved_eq[2];
528 phs_rx = solved_eq[3];
529
530 ath_print(common, ATH_DBG_CALIBRATE,
531 "chain %d: mag mismatch=%d phase mismatch=%d\n",
532 chain_idx, mag_tx/res_scale, phs_tx/res_scale);
533
534 if (res_scale == mag_tx) {
535 ath_print(common, ATH_DBG_CALIBRATE,
536 "Divide by 0: mag_tx=%d, res_scale=%d\n",
537 mag_tx, res_scale);
538 return false;
539 }
540
541 /* calculate and quantize Tx IQ correction factor */
542 mag_corr_tx = (mag_tx * res_scale) / (res_scale - mag_tx);
543 phs_corr_tx = -phs_tx;
544
545 q_q_coff = (mag_corr_tx * 128 / res_scale);
546 q_i_coff = (phs_corr_tx * 256 / res_scale);
547
548 ath_print(common, ATH_DBG_CALIBRATE,
549 "tx chain %d: mag corr=%d phase corr=%d\n",
550 chain_idx, q_q_coff, q_i_coff);
551
552 if (q_i_coff < -63)
553 q_i_coff = -63;
554 if (q_i_coff > 63)
555 q_i_coff = 63;
556 if (q_q_coff < -63)
557 q_q_coff = -63;
558 if (q_q_coff > 63)
559 q_q_coff = 63;
560
561 iqc_coeff[0] = (q_q_coff * 128) + q_i_coff;
562
563 ath_print(common, ATH_DBG_CALIBRATE,
564 "tx chain %d: iq corr coeff=%x\n",
565 chain_idx, iqc_coeff[0]);
566
567 if (-mag_rx == res_scale) {
568 ath_print(common, ATH_DBG_CALIBRATE,
569 "Divide by 0: mag_rx=%d, res_scale=%d\n",
570 mag_rx, res_scale);
571 return false;
572 }
573
574 /* calculate and quantize Rx IQ correction factors */
575 mag_corr_rx = (-mag_rx * res_scale) / (res_scale + mag_rx);
576 phs_corr_rx = -phs_rx;
577
578 q_q_coff = (mag_corr_rx * 128 / res_scale);
579 q_i_coff = (phs_corr_rx * 256 / res_scale);
580
581 ath_print(common, ATH_DBG_CALIBRATE,
582 "rx chain %d: mag corr=%d phase corr=%d\n",
583 chain_idx, q_q_coff, q_i_coff);
584
585 if (q_i_coff < -63)
586 q_i_coff = -63;
587 if (q_i_coff > 63)
588 q_i_coff = 63;
589 if (q_q_coff < -63)
590 q_q_coff = -63;
591 if (q_q_coff > 63)
592 q_q_coff = 63;
593
594 iqc_coeff[1] = (q_q_coff * 128) + q_i_coff;
595
596 ath_print(common, ATH_DBG_CALIBRATE,
597 "rx chain %d: iq corr coeff=%x\n",
598 chain_idx, iqc_coeff[1]);
599
600 return true;
601 }
602
603 static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
604 {
605 struct ath_common *common = ath9k_hw_common(ah);
606 static const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
607 AR_PHY_TX_IQCAL_STATUS_B0,
608 AR_PHY_TX_IQCAL_STATUS_B1,
609 AR_PHY_TX_IQCAL_STATUS_B2,
610 };
611 static const u32 tx_corr_coeff[AR9300_MAX_CHAINS] = {
612 AR_PHY_TX_IQCAL_CORR_COEFF_01_B0,
613 AR_PHY_TX_IQCAL_CORR_COEFF_01_B1,
614 AR_PHY_TX_IQCAL_CORR_COEFF_01_B2,
615 };
616 static const u32 rx_corr[AR9300_MAX_CHAINS] = {
617 AR_PHY_RX_IQCAL_CORR_B0,
618 AR_PHY_RX_IQCAL_CORR_B1,
619 AR_PHY_RX_IQCAL_CORR_B2,
620 };
621 static const u_int32_t chan_info_tab[] = {
622 AR_PHY_CHAN_INFO_TAB_0,
623 AR_PHY_CHAN_INFO_TAB_1,
624 AR_PHY_CHAN_INFO_TAB_2,
625 };
626 s32 iq_res[6];
627 s32 iqc_coeff[2];
628 s32 i, j;
629 u32 num_chains = 0;
630
631 for (i = 0; i < AR9300_MAX_CHAINS; i++) {
632 if (ah->txchainmask & (1 << i))
633 num_chains++;
634 }
635
636 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
637 AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
638 DELPT);
639 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
640 AR_PHY_TX_IQCAL_START_DO_CAL,
641 AR_PHY_TX_IQCAL_START_DO_CAL);
642
643 if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
644 AR_PHY_TX_IQCAL_START_DO_CAL,
645 0, AH_WAIT_TIMEOUT)) {
646 ath_print(common, ATH_DBG_CALIBRATE,
647 "Tx IQ Cal not complete.\n");
648 goto TX_IQ_CAL_FAILED;
649 }
650
651 for (i = 0; i < num_chains; i++) {
652 ath_print(common, ATH_DBG_CALIBRATE,
653 "Doing Tx IQ Cal for chain %d.\n", i);
654
655 if (REG_READ(ah, txiqcal_status[i]) &
656 AR_PHY_TX_IQCAL_STATUS_FAILED) {
657 ath_print(common, ATH_DBG_CALIBRATE,
658 "Tx IQ Cal failed for chain %d.\n", i);
659 goto TX_IQ_CAL_FAILED;
660 }
661
662 for (j = 0; j < 3; j++) {
663 u_int8_t idx = 2 * j,
664 offset = 4 * j;
665
666 REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
667 AR_PHY_CHAN_INFO_TAB_S2_READ, 0);
668
669 /* 32 bits */
670 iq_res[idx] = REG_READ(ah, chan_info_tab[i] + offset);
671
672 REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
673 AR_PHY_CHAN_INFO_TAB_S2_READ, 1);
674
675 /* 16 bits */
676 iq_res[idx+1] = 0xffff & REG_READ(ah,
677 chan_info_tab[i] +
678 offset);
679
680 ath_print(common, ATH_DBG_CALIBRATE,
681 "IQ RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
682 idx, iq_res[idx], idx+1, iq_res[idx+1]);
683 }
684
685 if (!ar9003_hw_calc_iq_corr(ah, i, iq_res, iqc_coeff)) {
686 ath_print(common, ATH_DBG_CALIBRATE,
687 "Failed in calculation of IQ correction.\n");
688 goto TX_IQ_CAL_FAILED;
689 }
690
691 ath_print(common, ATH_DBG_CALIBRATE,
692 "IQ_COEFF[0] = 0x%x IQ_COEFF[1] = 0x%x\n",
693 iqc_coeff[0], iqc_coeff[1]);
694
695 REG_RMW_FIELD(ah, tx_corr_coeff[i],
696 AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
697 iqc_coeff[0]);
698 REG_RMW_FIELD(ah, rx_corr[i],
699 AR_PHY_RX_IQCAL_CORR_LOOPBACK_IQCORR_Q_Q_COFF,
700 iqc_coeff[1] >> 7);
701 REG_RMW_FIELD(ah, rx_corr[i],
702 AR_PHY_RX_IQCAL_CORR_LOOPBACK_IQCORR_Q_I_COFF,
703 iqc_coeff[1]);
704 }
705
706 REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
707 AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
708 REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
709 AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
710
711 return;
712
713 TX_IQ_CAL_FAILED:
714 ath_print(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
715 }
716
717 static bool ar9003_hw_init_cal(struct ath_hw *ah,
718 struct ath9k_channel *chan)
719 {
720 struct ath_common *common = ath9k_hw_common(ah);
721 int val;
722
723 val = REG_READ(ah, AR_ENT_OTP);
724 ath_print(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val);
725
726 if (val & AR_ENT_OTP_CHAIN2_DISABLE)
727 ar9003_hw_set_chain_masks(ah, 0x3, 0x3);
728 else
729 /*
730 * 0x7 = 0b111 , AR9003 needs to be configured for 3-chain
731 * mode before running AGC/TxIQ cals
732 */
733 ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
734
735 /* Do Tx IQ Calibration */
736 ar9003_hw_tx_iq_cal(ah);
737 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
738 udelay(5);
739 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
740
741 /* Calibrate the AGC */
742 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
743 REG_READ(ah, AR_PHY_AGC_CONTROL) |
744 AR_PHY_AGC_CONTROL_CAL);
745
746 /* Poll for offset calibration complete */
747 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
748 0, AH_WAIT_TIMEOUT)) {
749 ath_print(common, ATH_DBG_CALIBRATE,
750 "offset calibration failed to "
751 "complete in 1ms; noisy environment?\n");
752 return false;
753 }
754
755 /* Revert chainmasks to their original values before NF cal */
756 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
757
758 ath9k_hw_start_nfcal(ah, true);
759
760 /* Initialize list pointers */
761 ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
762 ah->supp_cals = IQ_MISMATCH_CAL;
763
764 if (ah->supp_cals & IQ_MISMATCH_CAL) {
765 INIT_CAL(&ah->iq_caldata);
766 INSERT_CAL(ah, &ah->iq_caldata);
767 ath_print(common, ATH_DBG_CALIBRATE,
768 "enabling IQ Calibration.\n");
769 }
770
771 if (ah->supp_cals & TEMP_COMP_CAL) {
772 INIT_CAL(&ah->tempCompCalData);
773 INSERT_CAL(ah, &ah->tempCompCalData);
774 ath_print(common, ATH_DBG_CALIBRATE,
775 "enabling Temperature Compensation Calibration.\n");
776 }
777
778 /* Initialize current pointer to first element in list */
779 ah->cal_list_curr = ah->cal_list;
780
781 if (ah->cal_list_curr)
782 ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
783
784 if (ah->caldata)
785 ah->caldata->CalValid = 0;
786
787 return true;
788 }
789
790 void ar9003_hw_attach_calib_ops(struct ath_hw *ah)
791 {
792 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
793 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
794
795 priv_ops->init_cal_settings = ar9003_hw_init_cal_settings;
796 priv_ops->init_cal = ar9003_hw_init_cal;
797 priv_ops->setup_calibration = ar9003_hw_setup_calibration;
798
799 ops->calibrate = ar9003_hw_calibrate;
800 }
Linux kernel - Deliverables
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