drivers/net/wireless/ath/ath9k/ar9003_phy.c

   1 /*
   2  * Copyright (c) 2010 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "hw.h"
  18
  19 /**
  20  * ar9003_hw_set_channel - set channel on single-chip device
  21  * @ah: atheros hardware structure
  22  * @chan:
  23  *
  24  * This is the function to change channel on single-chip devices, that is
  25  * all devices after ar9280.
  26  *
  27  * This function takes the channel value in MHz and sets
  28  * hardware channel value. Assumes writes have been enabled to analog bus.
  29  *
  30  * Actual Expression,
  31  *
  32  * For 2GHz channel,
  33  * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
  34  * (freq_ref = 40MHz)
  35  *
  36  * For 5GHz channel,
  37  * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
  38  * (freq_ref = 40MHz/(24>>amodeRefSel))
  39  *
  40  * For 5GHz channels which are 5MHz spaced,
  41  * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
  42  * (freq_ref = 40MHz)
  43  */
  44 static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
  45 {
  46         /* TODO */
  47         return 0;
  48 }
  49
  50 /**
  51  * ar9003_hw_spur_mitigate - convert baseband spur frequency
  52  * @ah: atheros hardware structure
  53  * @chan:
  54  *
  55  * For single-chip solutions. Converts to baseband spur frequency given the
  56  * input channel frequency and compute register settings below.
  57  *
  58  * Spur mitigation for MRC CCK
  59  */
  60 static void ar9003_hw_spur_mitigate(struct ath_hw *ah,
  61                                     struct ath9k_channel *chan)
  62 {
  63         /* TODO */
  64 }
  65
  66 static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah,
  67                                          struct ath9k_channel *chan)
  68 {
  69         /* TODO */
  70         return 0;
  71 }
  72
  73 static void ar9003_hw_set_channel_regs(struct ath_hw *ah,
  74                                        struct ath9k_channel *chan)
  75 {
  76         /* TODO */
  77 }
  78
  79 static void ar9003_hw_init_bb(struct ath_hw *ah,
  80                               struct ath9k_channel *chan)
  81 {
  82         /* TODO */
  83 }
  84
  85 static int ar9003_hw_process_ini(struct ath_hw *ah,
  86                                  struct ath9k_channel *chan)
  87 {
  88         /* TODO */
  89         return -1;
  90 }
  91
  92 static void ar9003_hw_set_rfmode(struct ath_hw *ah,
  93                                  struct ath9k_channel *chan)
  94 {
  95         /* TODO */
  96 }
  97
  98 static void ar9003_hw_mark_phy_inactive(struct ath_hw *ah)
  99 {
 100         /* TODO */
 101 }
 102
 103 static void ar9003_hw_set_delta_slope(struct ath_hw *ah,
 104                                       struct ath9k_channel *chan)
 105 {
 106         /* TODO */
 107 }
 108
 109 static bool ar9003_hw_rfbus_req(struct ath_hw *ah)
 110 {
 111         /* TODO */
 112         return false;
 113 }
 114
 115 static void ar9003_hw_rfbus_done(struct ath_hw *ah)
 116 {
 117         /* TODO */
 118 }
 119
 120 static void ar9003_hw_enable_rfkill(struct ath_hw *ah)
 121 {
 122         /* TODO */
 123 }
 124
 125 static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
 126 {
 127         /* TODO */
 128 }
 129
 130 void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
 131 {
 132         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
 133
 134         priv_ops->rf_set_freq = ar9003_hw_set_channel;
 135         priv_ops->spur_mitigate_freq = ar9003_hw_spur_mitigate;
 136         priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
 137         priv_ops->set_channel_regs = ar9003_hw_set_channel_regs;
 138         priv_ops->init_bb = ar9003_hw_init_bb;
 139         priv_ops->process_ini = ar9003_hw_process_ini;
 140         priv_ops->set_rfmode = ar9003_hw_set_rfmode;
 141         priv_ops->mark_phy_inactive = ar9003_hw_mark_phy_inactive;
 142         priv_ops->set_delta_slope = ar9003_hw_set_delta_slope;
 143         priv_ops->rfbus_req = ar9003_hw_rfbus_req;
 144         priv_ops->rfbus_done = ar9003_hw_rfbus_done;
 145         priv_ops->enable_rfkill = ar9003_hw_enable_rfkill;
 146         priv_ops->set_diversity = ar9003_hw_set_diversity;
 147 }