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[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / ath9k.h
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #ifndef ATH9K_H
18 #define ATH9K_H
19
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
25 #include <linux/time.h>
26
27 #include "common.h"
28 #include "debug.h"
29 #include "mci.h"
30 #include "dfs.h"
31 #include "spectral.h"
32
33 struct ath_node;
34 struct ath_vif;
35
36 extern struct ieee80211_ops ath9k_ops;
37 extern int ath9k_modparam_nohwcrypt;
38 extern int led_blink;
39 extern bool is_ath9k_unloaded;
40 extern int ath9k_use_chanctx;
41
42 /*************************/
43 /* Descriptor Management */
44 /*************************/
45
46 #define ATH_TXSTATUS_RING_SIZE 512
47
48 /* Macro to expand scalars to 64-bit objects */
49 #define ito64(x) (sizeof(x) == 1) ? \
50 (((unsigned long long int)(x)) & (0xff)) : \
51 (sizeof(x) == 2) ? \
52 (((unsigned long long int)(x)) & 0xffff) : \
53 ((sizeof(x) == 4) ? \
54 (((unsigned long long int)(x)) & 0xffffffff) : \
55 (unsigned long long int)(x))
56
57 #define ATH_TXBUF_RESET(_bf) do { \
58 (_bf)->bf_lastbf = NULL; \
59 (_bf)->bf_next = NULL; \
60 memset(&((_bf)->bf_state), 0, \
61 sizeof(struct ath_buf_state)); \
62 } while (0)
63
64 #define DS2PHYS(_dd, _ds) \
65 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
66 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
67 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
68
69 struct ath_descdma {
70 void *dd_desc;
71 dma_addr_t dd_desc_paddr;
72 u32 dd_desc_len;
73 };
74
75 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
76 struct list_head *head, const char *name,
77 int nbuf, int ndesc, bool is_tx);
78
79 /***********/
80 /* RX / TX */
81 /***********/
82
83 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
84
85 /* increment with wrap-around */
86 #define INCR(_l, _sz) do { \
87 (_l)++; \
88 (_l) &= ((_sz) - 1); \
89 } while (0)
90
91 #define ATH_RXBUF 512
92 #define ATH_TXBUF 512
93 #define ATH_TXBUF_RESERVE 5
94 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
95 #define ATH_TXMAXTRY 13
96 #define ATH_MAX_SW_RETRIES 30
97
98 #define TID_TO_WME_AC(_tid) \
99 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
100 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
101 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
102 IEEE80211_AC_VO)
103
104 #define ATH_AGGR_DELIM_SZ 4
105 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
106 /* number of delimiters for encryption padding */
107 #define ATH_AGGR_ENCRYPTDELIM 10
108 /* minimum h/w qdepth to be sustained to maximize aggregation */
109 #define ATH_AGGR_MIN_QDEPTH 2
110 /* minimum h/w qdepth for non-aggregated traffic */
111 #define ATH_NON_AGGR_MIN_QDEPTH 8
112 #define ATH_TX_COMPLETE_POLL_INT 1000
113 #define ATH_TXFIFO_DEPTH 8
114 #define ATH_TX_ERROR 0x01
115
116 /* Stop tx traffic 1ms before the GO goes away */
117 #define ATH_P2P_PS_STOP_TIME 1000
118
119 #define IEEE80211_SEQ_SEQ_SHIFT 4
120 #define IEEE80211_SEQ_MAX 4096
121 #define IEEE80211_WEP_IVLEN 3
122 #define IEEE80211_WEP_KIDLEN 1
123 #define IEEE80211_WEP_CRCLEN 4
124 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
125 (IEEE80211_WEP_IVLEN + \
126 IEEE80211_WEP_KIDLEN + \
127 IEEE80211_WEP_CRCLEN))
128
129 /* return whether a bit at index _n in bitmap _bm is set
130 * _sz is the size of the bitmap */
131 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
132 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
133
134 /* return block-ack bitmap index given sequence and starting sequence */
135 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
136
137 /* return the seqno for _start + _offset */
138 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
139
140 /* returns delimiter padding required given the packet length */
141 #define ATH_AGGR_GET_NDELIM(_len) \
142 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
143 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
144
145 #define BAW_WITHIN(_start, _bawsz, _seqno) \
146 ((((_seqno) - (_start)) & 4095) < (_bawsz))
147
148 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
149
150 #define IS_HT_RATE(rate) (rate & 0x80)
151 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
152 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
153
154 enum {
155 WLAN_RC_PHY_OFDM,
156 WLAN_RC_PHY_CCK,
157 };
158
159 struct ath_txq {
160 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
161 u32 axq_qnum; /* ath9k hardware queue number */
162 void *axq_link;
163 struct list_head axq_q;
164 spinlock_t axq_lock;
165 u32 axq_depth;
166 u32 axq_ampdu_depth;
167 bool stopped;
168 bool axq_tx_inprogress;
169 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
170 u8 txq_headidx;
171 u8 txq_tailidx;
172 int pending_frames;
173 struct sk_buff_head complete_q;
174 };
175
176 struct ath_atx_ac {
177 struct ath_txq *txq;
178 struct list_head list;
179 struct list_head tid_q;
180 bool clear_ps_filter;
181 bool sched;
182 };
183
184 struct ath_frame_info {
185 struct ath_buf *bf;
186 u16 framelen;
187 s8 txq;
188 enum ath9k_key_type keytype;
189 u8 keyix;
190 u8 rtscts_rate;
191 u8 retries : 7;
192 u8 baw_tracked : 1;
193 };
194
195 struct ath_rxbuf {
196 struct list_head list;
197 struct sk_buff *bf_mpdu;
198 void *bf_desc;
199 dma_addr_t bf_daddr;
200 dma_addr_t bf_buf_addr;
201 };
202
203 /**
204 * enum buffer_type - Buffer type flags
205 *
206 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
207 * @BUF_AGGR: Indicates whether the buffer can be aggregated
208 * (used in aggregation scheduling)
209 */
210 enum buffer_type {
211 BUF_AMPDU = BIT(0),
212 BUF_AGGR = BIT(1),
213 };
214
215 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
216 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
217
218 struct ath_buf_state {
219 u8 bf_type;
220 u8 bfs_paprd;
221 u8 ndelim;
222 bool stale;
223 u16 seqno;
224 unsigned long bfs_paprd_timestamp;
225 };
226
227 struct ath_buf {
228 struct list_head list;
229 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
230 an aggregate) */
231 struct ath_buf *bf_next; /* next subframe in the aggregate */
232 struct sk_buff *bf_mpdu; /* enclosing frame structure */
233 void *bf_desc; /* virtual addr of desc */
234 dma_addr_t bf_daddr; /* physical addr of desc */
235 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
236 struct ieee80211_tx_rate rates[4];
237 struct ath_buf_state bf_state;
238 };
239
240 struct ath_atx_tid {
241 struct list_head list;
242 struct sk_buff_head buf_q;
243 struct sk_buff_head retry_q;
244 struct ath_node *an;
245 struct ath_atx_ac *ac;
246 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
247 u16 seq_start;
248 u16 seq_next;
249 u16 baw_size;
250 u8 tidno;
251 int baw_head; /* first un-acked tx buffer */
252 int baw_tail; /* next unused tx buffer slot */
253
254 s8 bar_index;
255 bool sched;
256 bool active;
257 };
258
259 struct ath_node {
260 struct ath_softc *sc;
261 struct ieee80211_sta *sta; /* station struct we're part of */
262 struct ieee80211_vif *vif; /* interface with which we're associated */
263 struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
264 struct ath_atx_ac ac[IEEE80211_NUM_ACS];
265
266 u16 maxampdu;
267 u8 mpdudensity;
268 s8 ps_key;
269
270 bool sleeping;
271 bool no_ps_filter;
272
273 #ifdef CONFIG_ATH9K_STATION_STATISTICS
274 struct ath_rx_rate_stats rx_rate_stats;
275 #endif
276 u8 key_idx[4];
277
278 u32 ackto;
279 struct list_head list;
280 };
281
282 struct ath_tx_control {
283 struct ath_txq *txq;
284 struct ath_node *an;
285 struct ieee80211_sta *sta;
286 u8 paprd;
287 bool force_channel;
288 };
289
290
291 /**
292 * @txq_map: Index is mac80211 queue number. This is
293 * not necessarily the same as the hardware queue number
294 * (axq_qnum).
295 */
296 struct ath_tx {
297 u32 txqsetup;
298 spinlock_t txbuflock;
299 struct list_head txbuf;
300 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
301 struct ath_descdma txdma;
302 struct ath_txq *txq_map[IEEE80211_NUM_ACS];
303 struct ath_txq *uapsdq;
304 u32 txq_max_pending[IEEE80211_NUM_ACS];
305 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
306 };
307
308 struct ath_rx_edma {
309 struct sk_buff_head rx_fifo;
310 u32 rx_fifo_hwsize;
311 };
312
313 struct ath_rx {
314 u8 defant;
315 u8 rxotherant;
316 bool discard_next;
317 u32 *rxlink;
318 u32 num_pkts;
319 struct list_head rxbuf;
320 struct ath_descdma rxdma;
321 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
322
323 struct ath_rxbuf *buf_hold;
324 struct sk_buff *frag;
325
326 u32 ampdu_ref;
327 };
328
329 /*******************/
330 /* Channel Context */
331 /*******************/
332
333 struct ath_chanctx {
334 struct cfg80211_chan_def chandef;
335 struct list_head vifs;
336 struct list_head acq[IEEE80211_NUM_ACS];
337 int hw_queue_base;
338
339 /* do not dereference, use for comparison only */
340 struct ieee80211_vif *primary_sta;
341
342 struct ath_beacon_config beacon;
343 struct ath9k_hw_cal_data caldata;
344 struct timespec tsf_ts;
345 u64 tsf_val;
346 u32 last_beacon;
347
348 int flush_timeout;
349 u16 txpower;
350 bool offchannel;
351 bool stopped;
352 bool active;
353 bool assigned;
354 bool switch_after_beacon;
355
356 short nvifs;
357 short nvifs_assigned;
358 unsigned int rxfilter;
359 };
360
361 enum ath_chanctx_event {
362 ATH_CHANCTX_EVENT_BEACON_PREPARE,
363 ATH_CHANCTX_EVENT_BEACON_SENT,
364 ATH_CHANCTX_EVENT_TSF_TIMER,
365 ATH_CHANCTX_EVENT_BEACON_RECEIVED,
366 ATH_CHANCTX_EVENT_AUTHORIZED,
367 ATH_CHANCTX_EVENT_SWITCH,
368 ATH_CHANCTX_EVENT_ASSIGN,
369 ATH_CHANCTX_EVENT_UNASSIGN,
370 ATH_CHANCTX_EVENT_CHANGE,
371 ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL,
372 };
373
374 enum ath_chanctx_state {
375 ATH_CHANCTX_STATE_IDLE,
376 ATH_CHANCTX_STATE_WAIT_FOR_BEACON,
377 ATH_CHANCTX_STATE_WAIT_FOR_TIMER,
378 ATH_CHANCTX_STATE_SWITCH,
379 ATH_CHANCTX_STATE_FORCE_ACTIVE,
380 };
381
382 struct ath_chanctx_sched {
383 bool beacon_pending;
384 bool offchannel_pending;
385 bool wait_switch;
386 bool force_noa_update;
387 bool extend_absence;
388 enum ath_chanctx_state state;
389 u8 beacon_miss;
390
391 u32 next_tbtt;
392 u32 switch_start_time;
393 unsigned int offchannel_duration;
394 unsigned int channel_switch_time;
395
396 /* backup, in case the hardware timer fails */
397 struct timer_list timer;
398 };
399
400 enum ath_offchannel_state {
401 ATH_OFFCHANNEL_IDLE,
402 ATH_OFFCHANNEL_PROBE_SEND,
403 ATH_OFFCHANNEL_PROBE_WAIT,
404 ATH_OFFCHANNEL_SUSPEND,
405 ATH_OFFCHANNEL_ROC_START,
406 ATH_OFFCHANNEL_ROC_WAIT,
407 ATH_OFFCHANNEL_ROC_DONE,
408 };
409
410 struct ath_offchannel {
411 struct ath_chanctx chan;
412 struct timer_list timer;
413 struct cfg80211_scan_request *scan_req;
414 struct ieee80211_vif *scan_vif;
415 int scan_idx;
416 enum ath_offchannel_state state;
417 struct ieee80211_channel *roc_chan;
418 struct ieee80211_vif *roc_vif;
419 int roc_duration;
420 int duration;
421 };
422
423 #define case_rtn_string(val) case val: return #val
424
425 #define ath_for_each_chanctx(_sc, _ctx) \
426 for (ctx = &sc->chanctx[0]; \
427 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \
428 ctx++)
429
430 void ath_chanctx_init(struct ath_softc *sc);
431 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
432 struct cfg80211_chan_def *chandef);
433
434 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
435
436 static inline struct ath_chanctx *
437 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx)
438 {
439 struct ath_chanctx **ptr = (void *) ctx->drv_priv;
440 return *ptr;
441 }
442
443 bool ath9k_is_chanctx_enabled(void);
444 void ath9k_fill_chanctx_ops(void);
445 void ath9k_init_channel_context(struct ath_softc *sc);
446 void ath9k_offchannel_init(struct ath_softc *sc);
447 void ath9k_deinit_channel_context(struct ath_softc *sc);
448 int ath9k_init_p2p(struct ath_softc *sc);
449 void ath9k_deinit_p2p(struct ath_softc *sc);
450 void ath9k_p2p_remove_vif(struct ath_softc *sc,
451 struct ieee80211_vif *vif);
452 void ath9k_p2p_beacon_sync(struct ath_softc *sc);
453 void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
454 struct ieee80211_vif *vif);
455 void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
456 struct sk_buff *skb);
457 void ath9k_p2p_ps_timer(void *priv);
458 void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
459 void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
460 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx);
461
462 void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
463 enum ath_chanctx_event ev);
464 void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
465 enum ath_chanctx_event ev);
466 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
467 enum ath_chanctx_event ev);
468 void ath_chanctx_set_next(struct ath_softc *sc, bool force);
469 void ath_offchannel_next(struct ath_softc *sc);
470 void ath_scan_complete(struct ath_softc *sc, bool abort);
471 void ath_roc_complete(struct ath_softc *sc, bool abort);
472 struct ath_chanctx* ath_is_go_chanctx_present(struct ath_softc *sc);
473
474 #else
475
476 static inline bool ath9k_is_chanctx_enabled(void)
477 {
478 return false;
479 }
480 static inline void ath9k_fill_chanctx_ops(void)
481 {
482 }
483 static inline void ath9k_init_channel_context(struct ath_softc *sc)
484 {
485 }
486 static inline void ath9k_offchannel_init(struct ath_softc *sc)
487 {
488 }
489 static inline void ath9k_deinit_channel_context(struct ath_softc *sc)
490 {
491 }
492 static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
493 enum ath_chanctx_event ev)
494 {
495 }
496 static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
497 enum ath_chanctx_event ev)
498 {
499 }
500 static inline void ath_chanctx_event(struct ath_softc *sc,
501 struct ieee80211_vif *vif,
502 enum ath_chanctx_event ev)
503 {
504 }
505 static inline int ath9k_init_p2p(struct ath_softc *sc)
506 {
507 return 0;
508 }
509 static inline void ath9k_deinit_p2p(struct ath_softc *sc)
510 {
511 }
512 static inline void ath9k_p2p_remove_vif(struct ath_softc *sc,
513 struct ieee80211_vif *vif)
514 {
515 }
516 static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc)
517 {
518 }
519 static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
520 struct ieee80211_vif *vif)
521 {
522 }
523 static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
524 struct sk_buff *skb)
525 {
526 }
527 static inline void ath9k_p2p_ps_timer(struct ath_softc *sc)
528 {
529 }
530 static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc,
531 struct ath_chanctx *ctx)
532 {
533 }
534 static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc,
535 struct ath_chanctx *ctx)
536 {
537 }
538 static inline void ath_chanctx_check_active(struct ath_softc *sc,
539 struct ath_chanctx *ctx)
540 {
541 }
542
543 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */
544
545 void ath_startrecv(struct ath_softc *sc);
546 bool ath_stoprecv(struct ath_softc *sc);
547 u32 ath_calcrxfilter(struct ath_softc *sc);
548 int ath_rx_init(struct ath_softc *sc, int nbufs);
549 void ath_rx_cleanup(struct ath_softc *sc);
550 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
551 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
552 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
553 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
554 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
555 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
556 bool ath_drain_all_txq(struct ath_softc *sc);
557 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
558 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
559 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
560 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
561 void ath_txq_schedule_all(struct ath_softc *sc);
562 int ath_tx_init(struct ath_softc *sc, int nbufs);
563 int ath_txq_update(struct ath_softc *sc, int qnum,
564 struct ath9k_tx_queue_info *q);
565 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
566 void ath_assign_seq(struct ath_common *common, struct sk_buff *skb);
567 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
568 struct ath_tx_control *txctl);
569 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
570 struct sk_buff *skb);
571 void ath_tx_tasklet(struct ath_softc *sc);
572 void ath_tx_edma_tasklet(struct ath_softc *sc);
573 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
574 u16 tid, u16 *ssn);
575 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
576 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
577
578 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
579 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
580 struct ath_node *an);
581 void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
582 struct ieee80211_sta *sta,
583 u16 tids, int nframes,
584 enum ieee80211_frame_release_type reason,
585 bool more_data);
586
587 /********/
588 /* VIFs */
589 /********/
590
591 #define P2P_DEFAULT_CTWIN 10
592
593 struct ath_vif {
594 struct list_head list;
595
596 u16 seq_no;
597
598 /* BSS info */
599 u8 bssid[ETH_ALEN] __aligned(2);
600 u16 aid;
601 bool assoc;
602
603 struct ieee80211_vif *vif;
604 struct ath_node mcast_node;
605 int av_bslot;
606 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
607 struct ath_buf *av_bcbuf;
608 struct ath_chanctx *chanctx;
609
610 /* P2P Client */
611 struct ieee80211_noa_data noa;
612
613 /* P2P GO */
614 u8 noa_index;
615 u32 offchannel_start;
616 u32 offchannel_duration;
617
618 /* These are used for both periodic and one-shot */
619 u32 noa_start;
620 u32 noa_duration;
621 bool periodic_noa;
622 };
623
624 struct ath9k_vif_iter_data {
625 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
626 u8 mask[ETH_ALEN]; /* bssid mask */
627 bool has_hw_macaddr;
628 u8 slottime;
629 bool beacons;
630
631 int naps; /* number of AP vifs */
632 int nmeshes; /* number of mesh vifs */
633 int nstations; /* number of station vifs */
634 int nwds; /* number of WDS vifs */
635 int nadhocs; /* number of adhoc vifs */
636 struct ieee80211_vif *primary_sta;
637 };
638
639 void ath9k_calculate_iter_data(struct ath_softc *sc,
640 struct ath_chanctx *ctx,
641 struct ath9k_vif_iter_data *iter_data);
642 void ath9k_calculate_summary_state(struct ath_softc *sc,
643 struct ath_chanctx *ctx);
644
645 /*******************/
646 /* Beacon Handling */
647 /*******************/
648
649 /*
650 * Regardless of the number of beacons we stagger, (i.e. regardless of the
651 * number of BSSIDs) if a given beacon does not go out even after waiting this
652 * number of beacon intervals, the game's up.
653 */
654 #define BSTUCK_THRESH 9
655 #define ATH_BCBUF 8
656 #define ATH_DEFAULT_BINTVAL 100 /* TU */
657 #define ATH_DEFAULT_BMISS_LIMIT 10
658
659 #define TSF_TO_TU(_h,_l) \
660 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
661
662 struct ath_beacon {
663 enum {
664 OK, /* no change needed */
665 UPDATE, /* update pending */
666 COMMIT /* beacon sent, commit change */
667 } updateslot; /* slot time update fsm */
668
669 u32 beaconq;
670 u32 bmisscnt;
671 struct ieee80211_vif *bslot[ATH_BCBUF];
672 int slottime;
673 int slotupdate;
674 struct ath_descdma bdma;
675 struct ath_txq *cabq;
676 struct list_head bbuf;
677
678 bool tx_processed;
679 bool tx_last;
680 };
681
682 void ath9k_beacon_tasklet(unsigned long data);
683 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
684 u32 changed);
685 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
686 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
687 void ath9k_set_beacon(struct ath_softc *sc);
688 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);
689 void ath9k_csa_update(struct ath_softc *sc);
690
691 /*******************/
692 /* Link Monitoring */
693 /*******************/
694
695 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
696 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
697 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
698 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
699 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
700 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
701 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
702 #define ATH_ANI_MAX_SKIP_COUNT 10
703 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
704 #define ATH_PLL_WORK_INTERVAL 100
705
706 void ath_tx_complete_poll_work(struct work_struct *work);
707 void ath_reset_work(struct work_struct *work);
708 bool ath_hw_check(struct ath_softc *sc);
709 void ath_hw_pll_work(struct work_struct *work);
710 void ath_paprd_calibrate(struct work_struct *work);
711 void ath_ani_calibrate(unsigned long data);
712 void ath_start_ani(struct ath_softc *sc);
713 void ath_stop_ani(struct ath_softc *sc);
714 void ath_check_ani(struct ath_softc *sc);
715 int ath_update_survey_stats(struct ath_softc *sc);
716 void ath_update_survey_nf(struct ath_softc *sc, int channel);
717 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
718 void ath_ps_full_sleep(unsigned long data);
719 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
720 bool sw_pending);
721
722 /**********/
723 /* BTCOEX */
724 /**********/
725
726 #define ATH_DUMP_BTCOEX(_s, _val) \
727 do { \
728 len += scnprintf(buf + len, size - len, \
729 "%20s : %10d\n", _s, (_val)); \
730 } while (0)
731
732 enum bt_op_flags {
733 BT_OP_PRIORITY_DETECTED,
734 BT_OP_SCAN,
735 };
736
737 struct ath_btcoex {
738 spinlock_t btcoex_lock;
739 struct timer_list period_timer; /* Timer for BT period */
740 struct timer_list no_stomp_timer;
741 u32 bt_priority_cnt;
742 unsigned long bt_priority_time;
743 unsigned long op_flags;
744 int bt_stomp_type; /* Types of BT stomping */
745 u32 btcoex_no_stomp; /* in msec */
746 u32 btcoex_period; /* in msec */
747 u32 btscan_no_stomp; /* in msec */
748 u32 duty_cycle;
749 u32 bt_wait_time;
750 int rssi_count;
751 struct ath_mci_profile mci;
752 u8 stomp_audio;
753 };
754
755 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
756 int ath9k_init_btcoex(struct ath_softc *sc);
757 void ath9k_deinit_btcoex(struct ath_softc *sc);
758 void ath9k_start_btcoex(struct ath_softc *sc);
759 void ath9k_stop_btcoex(struct ath_softc *sc);
760 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
761 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
762 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
763 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
764 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
765 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
766 #else
767 static inline int ath9k_init_btcoex(struct ath_softc *sc)
768 {
769 return 0;
770 }
771 static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
772 {
773 }
774 static inline void ath9k_start_btcoex(struct ath_softc *sc)
775 {
776 }
777 static inline void ath9k_stop_btcoex(struct ath_softc *sc)
778 {
779 }
780 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
781 u32 status)
782 {
783 }
784 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
785 u32 max_4ms_framelen)
786 {
787 return 0;
788 }
789 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
790 {
791 }
792 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
793 {
794 return 0;
795 }
796 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
797
798 /********************/
799 /* LED Control */
800 /********************/
801
802 #define ATH_LED_PIN_DEF 1
803 #define ATH_LED_PIN_9287 8
804 #define ATH_LED_PIN_9300 10
805 #define ATH_LED_PIN_9485 6
806 #define ATH_LED_PIN_9462 4
807
808 #ifdef CONFIG_MAC80211_LEDS
809 void ath_init_leds(struct ath_softc *sc);
810 void ath_deinit_leds(struct ath_softc *sc);
811 void ath_fill_led_pin(struct ath_softc *sc);
812 #else
813 static inline void ath_init_leds(struct ath_softc *sc)
814 {
815 }
816
817 static inline void ath_deinit_leds(struct ath_softc *sc)
818 {
819 }
820 static inline void ath_fill_led_pin(struct ath_softc *sc)
821 {
822 }
823 #endif
824
825 /************************/
826 /* Wake on Wireless LAN */
827 /************************/
828
829 struct ath9k_wow_pattern {
830 u8 pattern_bytes[MAX_PATTERN_SIZE];
831 u8 mask_bytes[MAX_PATTERN_SIZE];
832 u32 pattern_len;
833 };
834
835 #ifdef CONFIG_ATH9K_WOW
836 void ath9k_init_wow(struct ieee80211_hw *hw);
837 int ath9k_suspend(struct ieee80211_hw *hw,
838 struct cfg80211_wowlan *wowlan);
839 int ath9k_resume(struct ieee80211_hw *hw);
840 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
841 #else
842 static inline void ath9k_init_wow(struct ieee80211_hw *hw)
843 {
844 }
845 static inline int ath9k_suspend(struct ieee80211_hw *hw,
846 struct cfg80211_wowlan *wowlan)
847 {
848 return 0;
849 }
850 static inline int ath9k_resume(struct ieee80211_hw *hw)
851 {
852 return 0;
853 }
854 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
855 {
856 }
857 #endif /* CONFIG_ATH9K_WOW */
858
859 /*******************************/
860 /* Antenna diversity/combining */
861 /*******************************/
862
863 #define ATH_ANT_RX_CURRENT_SHIFT 4
864 #define ATH_ANT_RX_MAIN_SHIFT 2
865 #define ATH_ANT_RX_MASK 0x3
866
867 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
868 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
869 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
870 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
871 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
872 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
873 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
874 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
875 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
876
877 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
878 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
879 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
880
881 struct ath_ant_comb {
882 u16 count;
883 u16 total_pkt_count;
884 bool scan;
885 bool scan_not_start;
886 int main_total_rssi;
887 int alt_total_rssi;
888 int alt_recv_cnt;
889 int main_recv_cnt;
890 int rssi_lna1;
891 int rssi_lna2;
892 int rssi_add;
893 int rssi_sub;
894 int rssi_first;
895 int rssi_second;
896 int rssi_third;
897 int ant_ratio;
898 int ant_ratio2;
899 bool alt_good;
900 int quick_scan_cnt;
901 enum ath9k_ant_div_comb_lna_conf main_conf;
902 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
903 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
904 bool first_ratio;
905 bool second_ratio;
906 unsigned long scan_start_time;
907
908 /*
909 * Card-specific config values.
910 */
911 int low_rssi_thresh;
912 int fast_div_bias;
913 };
914
915 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
916
917 /********************/
918 /* Main driver core */
919 /********************/
920
921 #define ATH9K_PCI_CUS198 0x0001
922 #define ATH9K_PCI_CUS230 0x0002
923 #define ATH9K_PCI_CUS217 0x0004
924 #define ATH9K_PCI_CUS252 0x0008
925 #define ATH9K_PCI_WOW 0x0010
926 #define ATH9K_PCI_BT_ANT_DIV 0x0020
927 #define ATH9K_PCI_D3_L1_WAR 0x0040
928 #define ATH9K_PCI_AR9565_1ANT 0x0080
929 #define ATH9K_PCI_AR9565_2ANT 0x0100
930 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
931 #define ATH9K_PCI_KILLER 0x0400
932
933 /*
934 * Default cache line size, in bytes.
935 * Used when PCI device not fully initialized by bootrom/BIOS
936 */
937 #define DEFAULT_CACHELINE 32
938 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
939 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
940 #define MAX_GTT_CNT 5
941
942 /* Powersave flags */
943 #define PS_WAIT_FOR_BEACON BIT(0)
944 #define PS_WAIT_FOR_CAB BIT(1)
945 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
946 #define PS_WAIT_FOR_TX_ACK BIT(3)
947 #define PS_BEACON_SYNC BIT(4)
948 #define PS_WAIT_FOR_ANI BIT(5)
949
950 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */
951
952 struct ath_softc {
953 struct ieee80211_hw *hw;
954 struct device *dev;
955
956 struct survey_info *cur_survey;
957 struct survey_info survey[ATH9K_NUM_CHANNELS];
958
959 struct tasklet_struct intr_tq;
960 struct tasklet_struct bcon_tasklet;
961 struct ath_hw *sc_ah;
962 void __iomem *mem;
963 int irq;
964 spinlock_t sc_serial_rw;
965 spinlock_t sc_pm_lock;
966 spinlock_t sc_pcu_lock;
967 struct mutex mutex;
968 struct work_struct paprd_work;
969 struct work_struct hw_reset_work;
970 struct completion paprd_complete;
971 wait_queue_head_t tx_wait;
972
973 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
974 struct work_struct chanctx_work;
975 struct ath_gen_timer *p2p_ps_timer;
976 struct ath_vif *p2p_ps_vif;
977 struct ath_chanctx_sched sched;
978 struct ath_offchannel offchannel;
979 struct ath_chanctx *next_chan;
980 #endif
981
982 unsigned long driver_data;
983
984 u8 gtt_cnt;
985 u32 intrstatus;
986 u16 ps_flags; /* PS_* */
987 u16 curtxpow;
988 bool ps_enabled;
989 bool ps_idle;
990 short nbcnvifs;
991 unsigned long ps_usecount;
992
993 struct ath_rx rx;
994 struct ath_tx tx;
995 struct ath_beacon beacon;
996
997 struct cfg80211_chan_def cur_chandef;
998 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];
999 struct ath_chanctx *cur_chan;
1000 spinlock_t chan_lock;
1001
1002 #ifdef CONFIG_MAC80211_LEDS
1003 bool led_registered;
1004 char led_name[32];
1005 struct led_classdev led_cdev;
1006 #endif
1007
1008 #ifdef CONFIG_ATH9K_DEBUGFS
1009 struct ath9k_debug debug;
1010 #endif
1011 struct delayed_work tx_complete_work;
1012 struct delayed_work hw_pll_work;
1013 struct timer_list sleep_timer;
1014
1015 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
1016 struct ath_btcoex btcoex;
1017 struct ath_mci_coex mci_coex;
1018 struct work_struct mci_work;
1019 #endif
1020
1021 struct ath_descdma txsdma;
1022
1023 struct ath_ant_comb ant_comb;
1024 u8 ant_tx, ant_rx;
1025 struct dfs_pattern_detector *dfs_detector;
1026 u64 dfs_prev_pulse_ts;
1027 u32 wow_enabled;
1028 /* relay(fs) channel for spectral scan */
1029 struct rchan *rfs_chan_spec_scan;
1030 enum spectral_mode spectral_mode;
1031 struct ath_spec_scan spec_config;
1032
1033 struct ieee80211_vif *tx99_vif;
1034 struct sk_buff *tx99_skb;
1035 bool tx99_state;
1036 s16 tx99_power;
1037
1038 #ifdef CONFIG_ATH9K_WOW
1039 atomic_t wow_got_bmiss_intr;
1040 atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
1041 u32 wow_intr_before_sleep;
1042 #endif
1043 };
1044
1045 /********/
1046 /* TX99 */
1047 /********/
1048
1049 #ifdef CONFIG_ATH9K_TX99
1050 void ath9k_tx99_init_debug(struct ath_softc *sc);
1051 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
1052 struct ath_tx_control *txctl);
1053 #else
1054 static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
1055 {
1056 }
1057 static inline int ath9k_tx99_send(struct ath_softc *sc,
1058 struct sk_buff *skb,
1059 struct ath_tx_control *txctl)
1060 {
1061 return 0;
1062 }
1063 #endif /* CONFIG_ATH9K_TX99 */
1064
1065 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
1066 {
1067 common->bus_ops->read_cachesize(common, csz);
1068 }
1069
1070 void ath9k_tasklet(unsigned long data);
1071 int ath_cabq_update(struct ath_softc *);
1072 u8 ath9k_parse_mpdudensity(u8 mpdudensity);
1073 irqreturn_t ath_isr(int irq, void *dev);
1074 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan);
1075 void ath_cancel_work(struct ath_softc *sc);
1076 void ath_restart_work(struct ath_softc *sc);
1077 int ath9k_init_device(u16 devid, struct ath_softc *sc,
1078 const struct ath_bus_ops *bus_ops);
1079 void ath9k_deinit_device(struct ath_softc *sc);
1080 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
1081 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
1082 void ath_start_rfkill_poll(struct ath_softc *sc);
1083 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
1084 void ath9k_ps_wakeup(struct ath_softc *sc);
1085 void ath9k_ps_restore(struct ath_softc *sc);
1086
1087 #ifdef CONFIG_ATH9K_PCI
1088 int ath_pci_init(void);
1089 void ath_pci_exit(void);
1090 #else
1091 static inline int ath_pci_init(void) { return 0; };
1092 static inline void ath_pci_exit(void) {};
1093 #endif
1094
1095 #ifdef CONFIG_ATH9K_AHB
1096 int ath_ahb_init(void);
1097 void ath_ahb_exit(void);
1098 #else
1099 static inline int ath_ahb_init(void) { return 0; };
1100 static inline void ath_ahb_exit(void) {};
1101 #endif
1102
1103 #endif /* ATH9K_H */
Linux kernel - Deliverables
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