drivers/net/wireless/ath/ath9k/ath9k.h

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef ATH9K_H
  18 #define ATH9K_H
  19
  20 #include <linux/etherdevice.h>
  21 #include <linux/device.h>
  22 #include <linux/leds.h>
  23
  24 #include "debug.h"
  25 #include "common.h"
  26
  27 /*
  28  * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
  29  * should rely on this file or its contents.
  30  */
  31
  32 struct ath_node;
  33
  34 /* Macro to expand scalars to 64-bit objects */
  35
  36 #define ito64(x) (sizeof(x) == 1) ?                     \
  37         (((unsigned long long int)(x)) & (0xff)) :      \
  38         (sizeof(x) == 2) ?                              \
  39         (((unsigned long long int)(x)) & 0xffff) :      \
  40         ((sizeof(x) == 4) ?                             \
  41          (((unsigned long long int)(x)) & 0xffffffff) : \
  42          (unsigned long long int)(x))
  43
  44 /* increment with wrap-around */
  45 #define INCR(_l, _sz)   do {                    \
  46                 (_l)++;                         \
  47                 (_l) &= ((_sz) - 1);            \
  48         } while (0)
  49
  50 /* decrement with wrap-around */
  51 #define DECR(_l,  _sz)  do {                    \
  52                 (_l)--;                         \
  53                 (_l) &= ((_sz) - 1);            \
  54         } while (0)
  55
  56 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
  57
  58 #define TSF_TO_TU(_h,_l) \
  59         ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
  60
  61 #define ATH_TXQ_SETUP(sc, i)        ((sc)->tx.txqsetup & (1<<i))
  62
  63 struct ath_config {
  64         u32 ath_aggr_prot;
  65         u16 txpowlimit;
  66         u8 cabqReadytime;
  67 };
  68
  69 /*************************/
  70 /* Descriptor Management */
  71 /*************************/
  72
  73 #define ATH_TXBUF_RESET(_bf) do {                               \
  74                 (_bf)->bf_stale = false;                        \
  75                 (_bf)->bf_lastbf = NULL;                        \
  76                 (_bf)->bf_next = NULL;                          \
  77                 memset(&((_bf)->bf_state), 0,                   \
  78                        sizeof(struct ath_buf_state));           \
  79         } while (0)
  80
  81 #define ATH_RXBUF_RESET(_bf) do {               \
  82                 (_bf)->bf_stale = false;        \
  83         } while (0)
  84
  85 /**
  86  * enum buffer_type - Buffer type flags
  87  *
  88  * @BUF_HT: Send this buffer using HT capabilities
  89  * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
  90  * @BUF_AGGR: Indicates whether the buffer can be aggregated
  91  *      (used in aggregation scheduling)
  92  * @BUF_RETRY: Indicates whether the buffer is retried
  93  * @BUF_XRETRY: To denote excessive retries of the buffer
  94  */
  95 enum buffer_type {
  96         BUF_HT                  = BIT(1),
  97         BUF_AMPDU               = BIT(2),
  98         BUF_AGGR                = BIT(3),
  99         BUF_RETRY               = BIT(4),
 100         BUF_XRETRY              = BIT(5),
 101 };
 102
 103 #define bf_nframes              bf_state.bfs_nframes
 104 #define bf_al                   bf_state.bfs_al
 105 #define bf_frmlen               bf_state.bfs_frmlen
 106 #define bf_retries              bf_state.bfs_retries
 107 #define bf_seqno                bf_state.bfs_seqno
 108 #define bf_tidno                bf_state.bfs_tidno
 109 #define bf_keyix                bf_state.bfs_keyix
 110 #define bf_keytype              bf_state.bfs_keytype
 111 #define bf_isht(bf)             (bf->bf_state.bf_type & BUF_HT)
 112 #define bf_isampdu(bf)          (bf->bf_state.bf_type & BUF_AMPDU)
 113 #define bf_isaggr(bf)           (bf->bf_state.bf_type & BUF_AGGR)
 114 #define bf_isretried(bf)        (bf->bf_state.bf_type & BUF_RETRY)
 115 #define bf_isxretried(bf)       (bf->bf_state.bf_type & BUF_XRETRY)
 116
 117 #define ATH_TXSTATUS_RING_SIZE 64
 118
 119 struct ath_descdma {
 120         void *dd_desc;
 121         dma_addr_t dd_desc_paddr;
 122         u32 dd_desc_len;
 123         struct ath_buf *dd_bufptr;
 124 };
 125
 126 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
 127                       struct list_head *head, const char *name,
 128                       int nbuf, int ndesc, bool is_tx);
 129 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
 130                          struct list_head *head);
 131
 132 /***********/
 133 /* RX / TX */
 134 /***********/
 135
 136 #define ATH_MAX_ANTENNA         3
 137 #define ATH_RXBUF               512
 138 #define ATH_TXBUF               512
 139 #define ATH_TXMAXTRY            13
 140 #define ATH_MGT_TXMAXTRY        4
 141
 142 #define TID_TO_WME_AC(_tid)                             \
 143         ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
 144          (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
 145          (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
 146          WME_AC_VO)
 147
 148 #define ADDBA_EXCHANGE_ATTEMPTS    10
 149 #define ATH_AGGR_DELIM_SZ          4
 150 #define ATH_AGGR_MINPLEN           256 /* in bytes, minimum packet length */
 151 /* number of delimiters for encryption padding */
 152 #define ATH_AGGR_ENCRYPTDELIM      10
 153 /* minimum h/w qdepth to be sustained to maximize aggregation */
 154 #define ATH_AGGR_MIN_QDEPTH        2
 155 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
 156
 157 #define IEEE80211_SEQ_SEQ_SHIFT    4
 158 #define IEEE80211_SEQ_MAX          4096
 159 #define IEEE80211_WEP_IVLEN        3
 160 #define IEEE80211_WEP_KIDLEN       1
 161 #define IEEE80211_WEP_CRCLEN       4
 162 #define IEEE80211_MAX_MPDU_LEN     (3840 + FCS_LEN +            \
 163                                     (IEEE80211_WEP_IVLEN +      \
 164                                      IEEE80211_WEP_KIDLEN +     \
 165                                      IEEE80211_WEP_CRCLEN))
 166
 167 /* return whether a bit at index _n in bitmap _bm is set
 168  * _sz is the size of the bitmap  */
 169 #define ATH_BA_ISSET(_bm, _n)  (((_n) < (WME_BA_BMP_SIZE)) &&           \
 170                                 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
 171
 172 /* return block-ack bitmap index given sequence and starting sequence */
 173 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
 174
 175 /* returns delimiter padding required given the packet length */
 176 #define ATH_AGGR_GET_NDELIM(_len)                                       \
 177         (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ?           \
 178           (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
 179
 180 #define BAW_WITHIN(_start, _bawsz, _seqno) \
 181         ((((_seqno) - (_start)) & 4095) < (_bawsz))
 182
 183 #define ATH_AN_2_TID(_an, _tidno)  (&(_an)->tid[(_tidno)])
 184
 185 #define ATH_TX_COMPLETE_POLL_INT        1000
 186
 187 enum ATH_AGGR_STATUS {
 188         ATH_AGGR_DONE,
 189         ATH_AGGR_BAW_CLOSED,
 190         ATH_AGGR_LIMITED,
 191 };
 192
 193 #define ATH_TXFIFO_DEPTH 8
 194 struct ath_txq {
 195         u32 axq_qnum;
 196         u32 *axq_link;
 197         struct list_head axq_q;
 198         spinlock_t axq_lock;
 199         u32 axq_depth;
 200         bool stopped;
 201         bool axq_tx_inprogress;
 202         struct list_head axq_acq;
 203         struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
 204         struct list_head txq_fifo_pending;
 205         u8 txq_headidx;
 206         u8 txq_tailidx;
 207 };
 208
 209 #define AGGR_CLEANUP         BIT(1)
 210 #define AGGR_ADDBA_COMPLETE  BIT(2)
 211 #define AGGR_ADDBA_PROGRESS  BIT(3)
 212
 213 struct ath_tx_control {
 214         struct ath_txq *txq;
 215         int if_id;
 216         enum ath9k_internal_frame_type frame_type;
 217 };
 218
 219 #define ATH_TX_ERROR        0x01
 220 #define ATH_TX_XRETRY       0x02
 221 #define ATH_TX_BAR          0x04
 222
 223 struct ath_tx {
 224         u16 seq_no;
 225         u32 txqsetup;
 226         int hwq_map[ATH9K_WME_AC_VO+1];
 227         spinlock_t txbuflock;
 228         struct list_head txbuf;
 229         struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
 230         struct ath_descdma txdma;
 231 };
 232
 233 struct ath_rx_edma {
 234         struct sk_buff_head rx_fifo;
 235         struct sk_buff_head rx_buffers;
 236         u32 rx_fifo_hwsize;
 237 };
 238
 239 struct ath_rx {
 240         u8 defant;
 241         u8 rxotherant;
 242         u32 *rxlink;
 243         unsigned int rxfilter;
 244         spinlock_t rxflushlock;
 245         spinlock_t rxbuflock;
 246         struct list_head rxbuf;
 247         struct ath_descdma rxdma;
 248         struct ath_buf *rx_bufptr;
 249         struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
 250 };
 251
 252 int ath_startrecv(struct ath_softc *sc);
 253 bool ath_stoprecv(struct ath_softc *sc);
 254 void ath_flushrecv(struct ath_softc *sc);
 255 u32 ath_calcrxfilter(struct ath_softc *sc);
 256 int ath_rx_init(struct ath_softc *sc, int nbufs);
 257 void ath_rx_cleanup(struct ath_softc *sc);
 258 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
 259 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
 260 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
 261 int ath_tx_setup(struct ath_softc *sc, int haltype);
 262 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
 263 void ath_draintxq(struct ath_softc *sc,
 264                      struct ath_txq *txq, bool retry_tx);
 265 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
 266 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
 267 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
 268 int ath_tx_init(struct ath_softc *sc, int nbufs);
 269 void ath_tx_cleanup(struct ath_softc *sc);
 270 struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb);
 271 int ath_txq_update(struct ath_softc *sc, int qnum,
 272                    struct ath9k_tx_queue_info *q);
 273 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
 274                  struct ath_tx_control *txctl);
 275 void ath_tx_tasklet(struct ath_softc *sc);
 276 void ath_tx_edma_tasklet(struct ath_softc *sc);
 277 void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb);
 278 bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
 279 void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
 280                        u16 tid, u16 *ssn);
 281 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 282 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 283 void ath9k_enable_ps(struct ath_softc *sc);
 284
 285 /********/
 286 /* VIFs */
 287 /********/
 288
 289 struct ath_vif {
 290         int av_bslot;
 291         __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
 292         enum nl80211_iftype av_opmode;
 293         struct ath_buf *av_bcbuf;
 294         struct ath_tx_control av_btxctl;
 295         u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
 296 };
 297
 298 /*******************/
 299 /* Beacon Handling */
 300 /*******************/
 301
 302 /*
 303  * Regardless of the number of beacons we stagger, (i.e. regardless of the
 304  * number of BSSIDs) if a given beacon does not go out even after waiting this
 305  * number of beacon intervals, the game's up.
 306  */
 307 #define BSTUCK_THRESH                   (9 * ATH_BCBUF)
 308 #define ATH_BCBUF                       4
 309 #define ATH_DEFAULT_BINTVAL             100 /* TU */
 310 #define ATH_DEFAULT_BMISS_LIMIT         10
 311 #define IEEE80211_MS_TO_TU(x)           (((x) * 1000) / 1024)
 312
 313 struct ath_beacon_config {
 314         u16 beacon_interval;
 315         u16 listen_interval;
 316         u16 dtim_period;
 317         u16 bmiss_timeout;
 318         u8 dtim_count;
 319 };
 320
 321 struct ath_beacon {
 322         enum {
 323                 OK,             /* no change needed */
 324                 UPDATE,         /* update pending */
 325                 COMMIT          /* beacon sent, commit change */
 326         } updateslot;           /* slot time update fsm */
 327
 328         u32 beaconq;
 329         u32 bmisscnt;
 330         u32 ast_be_xmit;
 331         u64 bc_tstamp;
 332         struct ieee80211_vif *bslot[ATH_BCBUF];
 333         struct ath_wiphy *bslot_aphy[ATH_BCBUF];
 334         int slottime;
 335         int slotupdate;
 336         struct ath9k_tx_queue_info beacon_qi;
 337         struct ath_descdma bdma;
 338         struct ath_txq *cabq;
 339         struct list_head bbuf;
 340 };
 341
 342 void ath_beacon_tasklet(unsigned long data);
 343 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
 344 int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
 345 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
 346 int ath_beaconq_config(struct ath_softc *sc);
 347
 348 /*******/
 349 /* ANI */
 350 /*******/
 351
 352 #define ATH_STA_SHORT_CALINTERVAL 1000    /* 1 second */
 353 #define ATH_AP_SHORT_CALINTERVAL  100     /* 100 ms */
 354 #define ATH_ANI_POLLINTERVAL      100     /* 100 ms */
 355 #define ATH_LONG_CALINTERVAL      30000   /* 30 seconds */
 356 #define ATH_RESTART_CALINTERVAL   1200000 /* 20 minutes */
 357
 358 void ath_ani_calibrate(unsigned long data);
 359
 360 /**********/
 361 /* BTCOEX */
 362 /**********/
 363
 364 /* Defines the BT AR_BT_COEX_WGHT used */
 365 enum ath_stomp_type {
 366         ATH_BTCOEX_NO_STOMP,
 367         ATH_BTCOEX_STOMP_ALL,
 368         ATH_BTCOEX_STOMP_LOW,
 369         ATH_BTCOEX_STOMP_NONE
 370 };
 371
 372 struct ath_btcoex {
 373         bool hw_timer_enabled;
 374         spinlock_t btcoex_lock;
 375         struct timer_list period_timer; /* Timer for BT period */
 376         u32 bt_priority_cnt;
 377         unsigned long bt_priority_time;
 378         int bt_stomp_type; /* Types of BT stomping */
 379         u32 btcoex_no_stomp; /* in usec */
 380         u32 btcoex_period; /* in usec */
 381         u32 btscan_no_stomp; /* in usec */
 382         struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
 383 };
 384
 385 int ath_init_btcoex_timer(struct ath_softc *sc);
 386 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
 387 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
 388
 389 /********************/
 390 /*   LED Control    */
 391 /********************/
 392
 393 #define ATH_LED_PIN_DEF                 1
 394 #define ATH_LED_PIN_9287                8
 395 #define ATH_LED_ON_DURATION_IDLE        350     /* in msecs */
 396 #define ATH_LED_OFF_DURATION_IDLE       250     /* in msecs */
 397
 398 enum ath_led_type {
 399         ATH_LED_RADIO,
 400         ATH_LED_ASSOC,
 401         ATH_LED_TX,
 402         ATH_LED_RX
 403 };
 404
 405 struct ath_led {
 406         struct ath_softc *sc;
 407         struct led_classdev led_cdev;
 408         enum ath_led_type led_type;
 409         char name[32];
 410         bool registered;
 411 };
 412
 413 void ath_init_leds(struct ath_softc *sc);
 414 void ath_deinit_leds(struct ath_softc *sc);
 415
 416 /********************/
 417 /* Main driver core */
 418 /********************/
 419
 420 /*
 421  * Default cache line size, in bytes.
 422  * Used when PCI device not fully initialized by bootrom/BIOS
 423 */
 424 #define DEFAULT_CACHELINE       32
 425 #define ATH_REGCLASSIDS_MAX     10
 426 #define ATH_CABQ_READY_TIME     80      /* % of beacon interval */
 427 #define ATH_MAX_SW_RETRIES      10
 428 #define ATH_CHAN_MAX            255
 429 #define IEEE80211_WEP_NKID      4       /* number of key ids */
 430
 431 #define ATH_TXPOWER_MAX         100     /* .5 dBm units */
 432 #define ATH_RATE_DUMMY_MARKER   0
 433
 434 #define SC_OP_INVALID                BIT(0)
 435 #define SC_OP_BEACONS                BIT(1)
 436 #define SC_OP_RXAGGR                 BIT(2)
 437 #define SC_OP_TXAGGR                 BIT(3)
 438 #define SC_OP_FULL_RESET             BIT(4)
 439 #define SC_OP_PREAMBLE_SHORT         BIT(5)
 440 #define SC_OP_PROTECT_ENABLE         BIT(6)
 441 #define SC_OP_RXFLUSH                BIT(7)
 442 #define SC_OP_LED_ASSOCIATED         BIT(8)
 443 #define SC_OP_LED_ON                 BIT(9)
 444 #define SC_OP_SCANNING               BIT(10)
 445 #define SC_OP_TSF_RESET              BIT(11)
 446 #define SC_OP_BT_PRIORITY_DETECTED   BIT(12)
 447 #define SC_OP_BT_SCAN                BIT(13)
 448
 449 /* Powersave flags */
 450 #define PS_WAIT_FOR_BEACON        BIT(0)
 451 #define PS_WAIT_FOR_CAB           BIT(1)
 452 #define PS_WAIT_FOR_PSPOLL_DATA   BIT(2)
 453 #define PS_WAIT_FOR_TX_ACK        BIT(3)
 454 #define PS_BEACON_SYNC            BIT(4)
 455 #define PS_NULLFUNC_COMPLETED     BIT(5)
 456 #define PS_ENABLED                BIT(6)
 457
 458 struct ath_wiphy;
 459 struct ath_rate_table;
 460
 461 struct ath_softc {
 462         struct ieee80211_hw *hw;
 463         struct device *dev;
 464
 465         spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
 466         struct ath_wiphy *pri_wiphy;
 467         struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
 468                                        * have NULL entries */
 469         int num_sec_wiphy; /* number of sec_wiphy pointers in the array */
 470         int chan_idx;
 471         int chan_is_ht;
 472         struct ath_wiphy *next_wiphy;
 473         struct work_struct chan_work;
 474         int wiphy_select_failures;
 475         unsigned long wiphy_select_first_fail;
 476         struct delayed_work wiphy_work;
 477         unsigned long wiphy_scheduler_int;
 478         int wiphy_scheduler_index;
 479
 480         struct tasklet_struct intr_tq;
 481         struct tasklet_struct bcon_tasklet;
 482         struct ath_hw *sc_ah;
 483         void __iomem *mem;
 484         int irq;
 485         spinlock_t sc_resetlock;
 486         spinlock_t sc_serial_rw;
 487         spinlock_t sc_pm_lock;
 488         struct mutex mutex;
 489
 490         u32 intrstatus;
 491         u32 sc_flags; /* SC_OP_* */
 492         u16 ps_flags; /* PS_* */
 493         u16 curtxpow;
 494         u8 nbcnvifs;
 495         u16 nvifs;
 496         bool ps_enabled;
 497         bool ps_idle;
 498         unsigned long ps_usecount;
 499
 500         struct ath_config config;
 501         struct ath_rx rx;
 502         struct ath_tx tx;
 503         struct ath_beacon beacon;
 504         const struct ath_rate_table *cur_rate_table;
 505         enum wireless_mode cur_rate_mode;
 506         struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
 507
 508         struct ath_led radio_led;
 509         struct ath_led assoc_led;
 510         struct ath_led tx_led;
 511         struct ath_led rx_led;
 512         struct delayed_work ath_led_blink_work;
 513         int led_on_duration;
 514         int led_off_duration;
 515         int led_on_cnt;
 516         int led_off_cnt;
 517
 518         int beacon_interval;
 519
 520 #ifdef CONFIG_ATH9K_DEBUGFS
 521         struct ath9k_debug debug;
 522 #endif
 523         struct ath_beacon_config cur_beacon_conf;
 524         struct delayed_work tx_complete_work;
 525         struct ath_btcoex btcoex;
 526
 527         struct ath_descdma txsdma;
 528 };
 529
 530 struct ath_wiphy {
 531         struct ath_softc *sc; /* shared for all virtual wiphys */
 532         struct ieee80211_hw *hw;
 533         enum ath_wiphy_state {
 534                 ATH_WIPHY_INACTIVE,
 535                 ATH_WIPHY_ACTIVE,
 536                 ATH_WIPHY_PAUSING,
 537                 ATH_WIPHY_PAUSED,
 538                 ATH_WIPHY_SCAN,
 539         } state;
 540         bool idle;
 541         int chan_idx;
 542         int chan_is_ht;
 543 };
 544
 545 void ath9k_tasklet(unsigned long data);
 546 int ath_reset(struct ath_softc *sc, bool retry_tx);
 547 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
 548 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
 549 int ath_cabq_update(struct ath_softc *);
 550
 551 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
 552 {
 553         common->bus_ops->read_cachesize(common, csz);
 554 }
 555
 556 extern struct ieee80211_ops ath9k_ops;
 557 extern int modparam_nohwcrypt;
 558
 559 irqreturn_t ath_isr(int irq, void *dev);
 560 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
 561                     const struct ath_bus_ops *bus_ops);
 562 void ath9k_deinit_device(struct ath_softc *sc);
 563 const char *ath_mac_bb_name(u32 mac_bb_version);
 564 const char *ath_rf_name(u16 rf_version);
 565 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
 566 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
 567                            struct ath9k_channel *ichan);
 568 void ath_update_chainmask(struct ath_softc *sc, int is_ht);
 569 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 570                     struct ath9k_channel *hchan);
 571
 572 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
 573 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
 574 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
 575
 576 #ifdef CONFIG_PCI
 577 int ath_pci_init(void);
 578 void ath_pci_exit(void);
 579 #else
 580 static inline int ath_pci_init(void) { return 0; };
 581 static inline void ath_pci_exit(void) {};
 582 #endif
 583
 584 #ifdef CONFIG_ATHEROS_AR71XX
 585 int ath_ahb_init(void);
 586 void ath_ahb_exit(void);
 587 #else
 588 static inline int ath_ahb_init(void) { return 0; };
 589 static inline void ath_ahb_exit(void) {};
 590 #endif
 591
 592 void ath9k_ps_wakeup(struct ath_softc *sc);
 593 void ath9k_ps_restore(struct ath_softc *sc);
 594
 595 void ath9k_set_bssid_mask(struct ieee80211_hw *hw);
 596 int ath9k_wiphy_add(struct ath_softc *sc);
 597 int ath9k_wiphy_del(struct ath_wiphy *aphy);
 598 void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb);
 599 int ath9k_wiphy_pause(struct ath_wiphy *aphy);
 600 int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
 601 int ath9k_wiphy_select(struct ath_wiphy *aphy);
 602 void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int);
 603 void ath9k_wiphy_chan_work(struct work_struct *work);
 604 bool ath9k_wiphy_started(struct ath_softc *sc);
 605 void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
 606                                   struct ath_wiphy *selected);
 607 bool ath9k_wiphy_scanning(struct ath_softc *sc);
 608 void ath9k_wiphy_work(struct work_struct *work);
 609 bool ath9k_all_wiphys_idle(struct ath_softc *sc);
 610 void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle);
 611
 612 void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue);
 613 void ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue);
 614
 615 int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype);
 616
 617 void ath_start_rfkill_poll(struct ath_softc *sc);
 618 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
 619
 620 #endif /* ATH9K_H */