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ath9k: implement p2p client powersave support
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static void ath9k_set_assoc_state(struct ath_softc *sc,
23 struct ieee80211_vif *vif);
24
25 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
26 {
27 /*
28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
29 * 0 for no restriction
30 * 1 for 1/4 us
31 * 2 for 1/2 us
32 * 3 for 1 us
33 * 4 for 2 us
34 * 5 for 4 us
35 * 6 for 8 us
36 * 7 for 16 us
37 */
38 switch (mpdudensity) {
39 case 0:
40 return 0;
41 case 1:
42 case 2:
43 case 3:
44 /* Our lower layer calculations limit our precision to
45 1 microsecond */
46 return 1;
47 case 4:
48 return 2;
49 case 5:
50 return 4;
51 case 6:
52 return 8;
53 case 7:
54 return 16;
55 default:
56 return 0;
57 }
58 }
59
60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 {
62 bool pending = false;
63
64 spin_lock_bh(&txq->axq_lock);
65
66 if (txq->axq_depth || !list_empty(&txq->axq_acq))
67 pending = true;
68
69 spin_unlock_bh(&txq->axq_lock);
70 return pending;
71 }
72
73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
74 {
75 unsigned long flags;
76 bool ret;
77
78 spin_lock_irqsave(&sc->sc_pm_lock, flags);
79 ret = ath9k_hw_setpower(sc->sc_ah, mode);
80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
81
82 return ret;
83 }
84
85 void ath_ps_full_sleep(unsigned long data)
86 {
87 struct ath_softc *sc = (struct ath_softc *) data;
88 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
89 bool reset;
90
91 spin_lock(&common->cc_lock);
92 ath_hw_cycle_counters_update(common);
93 spin_unlock(&common->cc_lock);
94
95 ath9k_hw_setrxabort(sc->sc_ah, 1);
96 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
97
98 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
99 }
100
101 void ath9k_ps_wakeup(struct ath_softc *sc)
102 {
103 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
104 unsigned long flags;
105 enum ath9k_power_mode power_mode;
106
107 spin_lock_irqsave(&sc->sc_pm_lock, flags);
108 if (++sc->ps_usecount != 1)
109 goto unlock;
110
111 del_timer_sync(&sc->sleep_timer);
112 power_mode = sc->sc_ah->power_mode;
113 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
114
115 /*
116 * While the hardware is asleep, the cycle counters contain no
117 * useful data. Better clear them now so that they don't mess up
118 * survey data results.
119 */
120 if (power_mode != ATH9K_PM_AWAKE) {
121 spin_lock(&common->cc_lock);
122 ath_hw_cycle_counters_update(common);
123 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
124 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
125 spin_unlock(&common->cc_lock);
126 }
127
128 unlock:
129 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
130 }
131
132 void ath9k_ps_restore(struct ath_softc *sc)
133 {
134 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
135 enum ath9k_power_mode mode;
136 unsigned long flags;
137
138 spin_lock_irqsave(&sc->sc_pm_lock, flags);
139 if (--sc->ps_usecount != 0)
140 goto unlock;
141
142 if (sc->ps_idle) {
143 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
144 goto unlock;
145 }
146
147 if (sc->ps_enabled &&
148 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
149 PS_WAIT_FOR_CAB |
150 PS_WAIT_FOR_PSPOLL_DATA |
151 PS_WAIT_FOR_TX_ACK |
152 PS_WAIT_FOR_ANI))) {
153 mode = ATH9K_PM_NETWORK_SLEEP;
154 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
155 ath9k_btcoex_stop_gen_timer(sc);
156 } else {
157 goto unlock;
158 }
159
160 spin_lock(&common->cc_lock);
161 ath_hw_cycle_counters_update(common);
162 spin_unlock(&common->cc_lock);
163
164 ath9k_hw_setpower(sc->sc_ah, mode);
165
166 unlock:
167 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
168 }
169
170 static void __ath_cancel_work(struct ath_softc *sc)
171 {
172 cancel_work_sync(&sc->paprd_work);
173 cancel_delayed_work_sync(&sc->tx_complete_work);
174 cancel_delayed_work_sync(&sc->hw_pll_work);
175
176 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
177 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
178 cancel_work_sync(&sc->mci_work);
179 #endif
180 }
181
182 void ath_cancel_work(struct ath_softc *sc)
183 {
184 __ath_cancel_work(sc);
185 cancel_work_sync(&sc->hw_reset_work);
186 }
187
188 void ath_restart_work(struct ath_softc *sc)
189 {
190 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
191
192 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
193 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
194 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
195
196 ath_start_ani(sc);
197 }
198
199 static bool ath_prepare_reset(struct ath_softc *sc)
200 {
201 struct ath_hw *ah = sc->sc_ah;
202 bool ret = true;
203
204 ieee80211_stop_queues(sc->hw);
205 ath_stop_ani(sc);
206 ath9k_hw_disable_interrupts(ah);
207
208 if (!ath_drain_all_txq(sc))
209 ret = false;
210
211 if (!ath_stoprecv(sc))
212 ret = false;
213
214 return ret;
215 }
216
217 static bool ath_complete_reset(struct ath_softc *sc, bool start)
218 {
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 unsigned long flags;
222 int i;
223
224 if (ath_startrecv(sc) != 0) {
225 ath_err(common, "Unable to restart recv logic\n");
226 return false;
227 }
228
229 ath9k_cmn_update_txpow(ah, sc->curtxpow,
230 sc->config.txpowlimit, &sc->curtxpow);
231
232 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
233 ath9k_hw_set_interrupts(ah);
234 ath9k_hw_enable_interrupts(ah);
235
236 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
237 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
238 goto work;
239
240 if (ah->opmode == NL80211_IFTYPE_STATION &&
241 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
242 spin_lock_irqsave(&sc->sc_pm_lock, flags);
243 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
244 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
245 } else {
246 ath9k_set_beacon(sc);
247 }
248 work:
249 ath_restart_work(sc);
250
251 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
252 if (!ATH_TXQ_SETUP(sc, i))
253 continue;
254
255 spin_lock_bh(&sc->tx.txq[i].axq_lock);
256 ath_txq_schedule(sc, &sc->tx.txq[i]);
257 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
258 }
259 }
260
261 sc->gtt_cnt = 0;
262 ieee80211_wake_queues(sc->hw);
263
264 ath9k_p2p_ps_timer(sc);
265
266 return true;
267 }
268
269 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
270 {
271 struct ath_hw *ah = sc->sc_ah;
272 struct ath_common *common = ath9k_hw_common(ah);
273 struct ath9k_hw_cal_data *caldata = NULL;
274 bool fastcc = true;
275 int r;
276
277 __ath_cancel_work(sc);
278
279 tasklet_disable(&sc->intr_tq);
280 spin_lock_bh(&sc->sc_pcu_lock);
281
282 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
283 fastcc = false;
284 caldata = &sc->caldata;
285 }
286
287 if (!hchan) {
288 fastcc = false;
289 hchan = ah->curchan;
290 }
291
292 if (!ath_prepare_reset(sc))
293 fastcc = false;
294
295 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
296 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
297
298 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
299 if (r) {
300 ath_err(common,
301 "Unable to reset channel, reset status %d\n", r);
302
303 ath9k_hw_enable_interrupts(ah);
304 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
305
306 goto out;
307 }
308
309 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
310 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
311 ath9k_mci_set_txpower(sc, true, false);
312
313 if (!ath_complete_reset(sc, true))
314 r = -EIO;
315
316 out:
317 spin_unlock_bh(&sc->sc_pcu_lock);
318 tasklet_enable(&sc->intr_tq);
319
320 return r;
321 }
322
323
324 /*
325 * Set/change channels. If the channel is really being changed, it's done
326 * by reseting the chip. To accomplish this we must first cleanup any pending
327 * DMA, then restart stuff.
328 */
329 static int ath_set_channel(struct ath_softc *sc, struct cfg80211_chan_def *chandef)
330 {
331 struct ath_hw *ah = sc->sc_ah;
332 struct ath_common *common = ath9k_hw_common(ah);
333 struct ieee80211_hw *hw = sc->hw;
334 struct ath9k_channel *hchan;
335 struct ieee80211_channel *chan = chandef->chan;
336 bool offchannel;
337 int pos = chan->hw_value;
338 int old_pos = -1;
339 int r;
340
341 if (test_bit(ATH_OP_INVALID, &common->op_flags))
342 return -EIO;
343
344 offchannel = !!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL);
345
346 if (ah->curchan)
347 old_pos = ah->curchan - &ah->channels[0];
348
349 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
350 chan->center_freq, chandef->width);
351
352 /* update survey stats for the old channel before switching */
353 spin_lock_bh(&common->cc_lock);
354 ath_update_survey_stats(sc);
355 spin_unlock_bh(&common->cc_lock);
356
357 ath9k_cmn_get_channel(hw, ah, chandef);
358
359 /*
360 * If the operating channel changes, change the survey in-use flags
361 * along with it.
362 * Reset the survey data for the new channel, unless we're switching
363 * back to the operating channel from an off-channel operation.
364 */
365 if (!offchannel && sc->cur_survey != &sc->survey[pos]) {
366 if (sc->cur_survey)
367 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
368
369 sc->cur_survey = &sc->survey[pos];
370
371 memset(sc->cur_survey, 0, sizeof(struct survey_info));
372 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
373 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
374 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
375 }
376
377 hchan = &sc->sc_ah->channels[pos];
378 r = ath_reset_internal(sc, hchan);
379 if (r)
380 return r;
381
382 /*
383 * The most recent snapshot of channel->noisefloor for the old
384 * channel is only available after the hardware reset. Copy it to
385 * the survey stats now.
386 */
387 if (old_pos >= 0)
388 ath_update_survey_nf(sc, old_pos);
389
390 /*
391 * Enable radar pulse detection if on a DFS channel. Spectral
392 * scanning and radar detection can not be used concurrently.
393 */
394 if (hw->conf.radar_enabled) {
395 u32 rxfilter;
396
397 /* set HW specific DFS configuration */
398 ath9k_hw_set_radar_params(ah);
399 rxfilter = ath9k_hw_getrxfilter(ah);
400 rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
401 ATH9K_RX_FILTER_PHYERR;
402 ath9k_hw_setrxfilter(ah, rxfilter);
403 ath_dbg(common, DFS, "DFS enabled at freq %d\n",
404 chan->center_freq);
405 } else {
406 /* perform spectral scan if requested. */
407 if (test_bit(ATH_OP_SCANNING, &common->op_flags) &&
408 sc->spectral_mode == SPECTRAL_CHANSCAN)
409 ath9k_spectral_scan_trigger(hw);
410 }
411
412 return 0;
413 }
414
415 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
416 struct ieee80211_vif *vif)
417 {
418 struct ath_node *an;
419 an = (struct ath_node *)sta->drv_priv;
420
421 an->sc = sc;
422 an->sta = sta;
423 an->vif = vif;
424
425 ath_tx_node_init(sc, an);
426 }
427
428 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
429 {
430 struct ath_node *an = (struct ath_node *)sta->drv_priv;
431 ath_tx_node_cleanup(sc, an);
432 }
433
434 void ath9k_tasklet(unsigned long data)
435 {
436 struct ath_softc *sc = (struct ath_softc *)data;
437 struct ath_hw *ah = sc->sc_ah;
438 struct ath_common *common = ath9k_hw_common(ah);
439 enum ath_reset_type type;
440 unsigned long flags;
441 u32 status = sc->intrstatus;
442 u32 rxmask;
443
444 ath9k_ps_wakeup(sc);
445 spin_lock(&sc->sc_pcu_lock);
446
447 if (status & ATH9K_INT_FATAL) {
448 type = RESET_TYPE_FATAL_INT;
449 ath9k_queue_reset(sc, type);
450
451 /*
452 * Increment the ref. counter here so that
453 * interrupts are enabled in the reset routine.
454 */
455 atomic_inc(&ah->intr_ref_cnt);
456 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
457 goto out;
458 }
459
460 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
461 (status & ATH9K_INT_BB_WATCHDOG)) {
462 spin_lock(&common->cc_lock);
463 ath_hw_cycle_counters_update(common);
464 ar9003_hw_bb_watchdog_dbg_info(ah);
465 spin_unlock(&common->cc_lock);
466
467 if (ar9003_hw_bb_watchdog_check(ah)) {
468 type = RESET_TYPE_BB_WATCHDOG;
469 ath9k_queue_reset(sc, type);
470
471 /*
472 * Increment the ref. counter here so that
473 * interrupts are enabled in the reset routine.
474 */
475 atomic_inc(&ah->intr_ref_cnt);
476 ath_dbg(common, RESET,
477 "BB_WATCHDOG: Skipping interrupts\n");
478 goto out;
479 }
480 }
481
482 if (status & ATH9K_INT_GTT) {
483 sc->gtt_cnt++;
484
485 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
486 type = RESET_TYPE_TX_GTT;
487 ath9k_queue_reset(sc, type);
488 atomic_inc(&ah->intr_ref_cnt);
489 ath_dbg(common, RESET,
490 "GTT: Skipping interrupts\n");
491 goto out;
492 }
493 }
494
495 spin_lock_irqsave(&sc->sc_pm_lock, flags);
496 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
497 /*
498 * TSF sync does not look correct; remain awake to sync with
499 * the next Beacon.
500 */
501 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
502 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
503 }
504 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
505
506 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
507 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
508 ATH9K_INT_RXORN);
509 else
510 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
511
512 if (status & rxmask) {
513 /* Check for high priority Rx first */
514 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
515 (status & ATH9K_INT_RXHP))
516 ath_rx_tasklet(sc, 0, true);
517
518 ath_rx_tasklet(sc, 0, false);
519 }
520
521 if (status & ATH9K_INT_TX) {
522 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
523 /*
524 * For EDMA chips, TX completion is enabled for the
525 * beacon queue, so if a beacon has been transmitted
526 * successfully after a GTT interrupt, the GTT counter
527 * gets reset to zero here.
528 */
529 sc->gtt_cnt = 0;
530
531 ath_tx_edma_tasklet(sc);
532 } else {
533 ath_tx_tasklet(sc);
534 }
535
536 wake_up(&sc->tx_wait);
537 }
538
539 if (status & ATH9K_INT_GENTIMER)
540 ath_gen_timer_isr(sc->sc_ah);
541
542 ath9k_btcoex_handle_interrupt(sc, status);
543
544 /* re-enable hardware interrupt */
545 ath9k_hw_enable_interrupts(ah);
546 out:
547 spin_unlock(&sc->sc_pcu_lock);
548 ath9k_ps_restore(sc);
549 }
550
551 irqreturn_t ath_isr(int irq, void *dev)
552 {
553 #define SCHED_INTR ( \
554 ATH9K_INT_FATAL | \
555 ATH9K_INT_BB_WATCHDOG | \
556 ATH9K_INT_RXORN | \
557 ATH9K_INT_RXEOL | \
558 ATH9K_INT_RX | \
559 ATH9K_INT_RXLP | \
560 ATH9K_INT_RXHP | \
561 ATH9K_INT_TX | \
562 ATH9K_INT_BMISS | \
563 ATH9K_INT_CST | \
564 ATH9K_INT_GTT | \
565 ATH9K_INT_TSFOOR | \
566 ATH9K_INT_GENTIMER | \
567 ATH9K_INT_MCI)
568
569 struct ath_softc *sc = dev;
570 struct ath_hw *ah = sc->sc_ah;
571 struct ath_common *common = ath9k_hw_common(ah);
572 enum ath9k_int status;
573 u32 sync_cause = 0;
574 bool sched = false;
575
576 /*
577 * The hardware is not ready/present, don't
578 * touch anything. Note this can happen early
579 * on if the IRQ is shared.
580 */
581 if (test_bit(ATH_OP_INVALID, &common->op_flags))
582 return IRQ_NONE;
583
584 /* shared irq, not for us */
585
586 if (!ath9k_hw_intrpend(ah))
587 return IRQ_NONE;
588
589 if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
590 ath9k_hw_kill_interrupts(ah);
591 return IRQ_HANDLED;
592 }
593
594 /*
595 * Figure out the reason(s) for the interrupt. Note
596 * that the hal returns a pseudo-ISR that may include
597 * bits we haven't explicitly enabled so we mask the
598 * value to insure we only process bits we requested.
599 */
600 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
601 ath9k_debug_sync_cause(sc, sync_cause);
602 status &= ah->imask; /* discard unasked-for bits */
603
604 /*
605 * If there are no status bits set, then this interrupt was not
606 * for me (should have been caught above).
607 */
608 if (!status)
609 return IRQ_NONE;
610
611 /* Cache the status */
612 sc->intrstatus = status;
613
614 if (status & SCHED_INTR)
615 sched = true;
616
617 /*
618 * If a FATAL or RXORN interrupt is received, we have to reset the
619 * chip immediately.
620 */
621 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
622 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
623 goto chip_reset;
624
625 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
626 (status & ATH9K_INT_BB_WATCHDOG))
627 goto chip_reset;
628
629 #ifdef CONFIG_ATH9K_WOW
630 if (status & ATH9K_INT_BMISS) {
631 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
632 atomic_inc(&sc->wow_got_bmiss_intr);
633 atomic_dec(&sc->wow_sleep_proc_intr);
634 }
635 }
636 #endif
637
638 if (status & ATH9K_INT_SWBA)
639 tasklet_schedule(&sc->bcon_tasklet);
640
641 if (status & ATH9K_INT_TXURN)
642 ath9k_hw_updatetxtriglevel(ah, true);
643
644 if (status & ATH9K_INT_RXEOL) {
645 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
646 ath9k_hw_set_interrupts(ah);
647 }
648
649 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
650 if (status & ATH9K_INT_TIM_TIMER) {
651 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
652 goto chip_reset;
653 /* Clear RxAbort bit so that we can
654 * receive frames */
655 ath9k_setpower(sc, ATH9K_PM_AWAKE);
656 spin_lock(&sc->sc_pm_lock);
657 ath9k_hw_setrxabort(sc->sc_ah, 0);
658 sc->ps_flags |= PS_WAIT_FOR_BEACON;
659 spin_unlock(&sc->sc_pm_lock);
660 }
661
662 chip_reset:
663
664 ath_debug_stat_interrupt(sc, status);
665
666 if (sched) {
667 /* turn off every interrupt */
668 ath9k_hw_disable_interrupts(ah);
669 tasklet_schedule(&sc->intr_tq);
670 }
671
672 return IRQ_HANDLED;
673
674 #undef SCHED_INTR
675 }
676
677 int ath_reset(struct ath_softc *sc)
678 {
679 int r;
680
681 ath9k_ps_wakeup(sc);
682 r = ath_reset_internal(sc, NULL);
683 ath9k_ps_restore(sc);
684
685 return r;
686 }
687
688 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
689 {
690 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
691 #ifdef CONFIG_ATH9K_DEBUGFS
692 RESET_STAT_INC(sc, type);
693 #endif
694 set_bit(ATH_OP_HW_RESET, &common->op_flags);
695 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
696 }
697
698 void ath_reset_work(struct work_struct *work)
699 {
700 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
701
702 ath_reset(sc);
703 }
704
705 /**********************/
706 /* mac80211 callbacks */
707 /**********************/
708
709 static int ath9k_start(struct ieee80211_hw *hw)
710 {
711 struct ath_softc *sc = hw->priv;
712 struct ath_hw *ah = sc->sc_ah;
713 struct ath_common *common = ath9k_hw_common(ah);
714 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
715 struct ath9k_channel *init_channel;
716 int r;
717
718 ath_dbg(common, CONFIG,
719 "Starting driver with initial channel: %d MHz\n",
720 curchan->center_freq);
721
722 ath9k_ps_wakeup(sc);
723 mutex_lock(&sc->mutex);
724
725 init_channel = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
726
727 /* Reset SERDES registers */
728 ath9k_hw_configpcipowersave(ah, false);
729
730 /*
731 * The basic interface to setting the hardware in a good
732 * state is ``reset''. On return the hardware is known to
733 * be powered up and with interrupts disabled. This must
734 * be followed by initialization of the appropriate bits
735 * and then setup of the interrupt mask.
736 */
737 spin_lock_bh(&sc->sc_pcu_lock);
738
739 atomic_set(&ah->intr_ref_cnt, -1);
740
741 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
742 if (r) {
743 ath_err(common,
744 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
745 r, curchan->center_freq);
746 ah->reset_power_on = false;
747 }
748
749 /* Setup our intr mask. */
750 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
751 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
752 ATH9K_INT_GLOBAL;
753
754 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
755 ah->imask |= ATH9K_INT_RXHP |
756 ATH9K_INT_RXLP;
757 else
758 ah->imask |= ATH9K_INT_RX;
759
760 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
761 ah->imask |= ATH9K_INT_BB_WATCHDOG;
762
763 /*
764 * Enable GTT interrupts only for AR9003/AR9004 chips
765 * for now.
766 */
767 if (AR_SREV_9300_20_OR_LATER(ah))
768 ah->imask |= ATH9K_INT_GTT;
769
770 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
771 ah->imask |= ATH9K_INT_CST;
772
773 ath_mci_enable(sc);
774
775 clear_bit(ATH_OP_INVALID, &common->op_flags);
776 sc->sc_ah->is_monitoring = false;
777
778 if (!ath_complete_reset(sc, false))
779 ah->reset_power_on = false;
780
781 if (ah->led_pin >= 0) {
782 ath9k_hw_cfg_output(ah, ah->led_pin,
783 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
784 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
785 }
786
787 /*
788 * Reset key cache to sane defaults (all entries cleared) instead of
789 * semi-random values after suspend/resume.
790 */
791 ath9k_cmn_init_crypto(sc->sc_ah);
792
793 ath9k_hw_reset_tsf(ah);
794
795 spin_unlock_bh(&sc->sc_pcu_lock);
796
797 mutex_unlock(&sc->mutex);
798
799 ath9k_ps_restore(sc);
800
801 return 0;
802 }
803
804 static void ath9k_tx(struct ieee80211_hw *hw,
805 struct ieee80211_tx_control *control,
806 struct sk_buff *skb)
807 {
808 struct ath_softc *sc = hw->priv;
809 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
810 struct ath_tx_control txctl;
811 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
812 unsigned long flags;
813
814 if (sc->ps_enabled) {
815 /*
816 * mac80211 does not set PM field for normal data frames, so we
817 * need to update that based on the current PS mode.
818 */
819 if (ieee80211_is_data(hdr->frame_control) &&
820 !ieee80211_is_nullfunc(hdr->frame_control) &&
821 !ieee80211_has_pm(hdr->frame_control)) {
822 ath_dbg(common, PS,
823 "Add PM=1 for a TX frame while in PS mode\n");
824 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
825 }
826 }
827
828 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
829 /*
830 * We are using PS-Poll and mac80211 can request TX while in
831 * power save mode. Need to wake up hardware for the TX to be
832 * completed and if needed, also for RX of buffered frames.
833 */
834 ath9k_ps_wakeup(sc);
835 spin_lock_irqsave(&sc->sc_pm_lock, flags);
836 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
837 ath9k_hw_setrxabort(sc->sc_ah, 0);
838 if (ieee80211_is_pspoll(hdr->frame_control)) {
839 ath_dbg(common, PS,
840 "Sending PS-Poll to pick a buffered frame\n");
841 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
842 } else {
843 ath_dbg(common, PS, "Wake up to complete TX\n");
844 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
845 }
846 /*
847 * The actual restore operation will happen only after
848 * the ps_flags bit is cleared. We are just dropping
849 * the ps_usecount here.
850 */
851 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
852 ath9k_ps_restore(sc);
853 }
854
855 /*
856 * Cannot tx while the hardware is in full sleep, it first needs a full
857 * chip reset to recover from that
858 */
859 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
860 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
861 goto exit;
862 }
863
864 memset(&txctl, 0, sizeof(struct ath_tx_control));
865 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
866 txctl.sta = control->sta;
867
868 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
869
870 if (ath_tx_start(hw, skb, &txctl) != 0) {
871 ath_dbg(common, XMIT, "TX failed\n");
872 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
873 goto exit;
874 }
875
876 return;
877 exit:
878 ieee80211_free_txskb(hw, skb);
879 }
880
881 static void ath9k_stop(struct ieee80211_hw *hw)
882 {
883 struct ath_softc *sc = hw->priv;
884 struct ath_hw *ah = sc->sc_ah;
885 struct ath_common *common = ath9k_hw_common(ah);
886 bool prev_idle;
887
888 mutex_lock(&sc->mutex);
889
890 ath_cancel_work(sc);
891
892 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
893 ath_dbg(common, ANY, "Device not present\n");
894 mutex_unlock(&sc->mutex);
895 return;
896 }
897
898 /* Ensure HW is awake when we try to shut it down. */
899 ath9k_ps_wakeup(sc);
900
901 spin_lock_bh(&sc->sc_pcu_lock);
902
903 /* prevent tasklets to enable interrupts once we disable them */
904 ah->imask &= ~ATH9K_INT_GLOBAL;
905
906 /* make sure h/w will not generate any interrupt
907 * before setting the invalid flag. */
908 ath9k_hw_disable_interrupts(ah);
909
910 spin_unlock_bh(&sc->sc_pcu_lock);
911
912 /* we can now sync irq and kill any running tasklets, since we already
913 * disabled interrupts and not holding a spin lock */
914 synchronize_irq(sc->irq);
915 tasklet_kill(&sc->intr_tq);
916 tasklet_kill(&sc->bcon_tasklet);
917
918 prev_idle = sc->ps_idle;
919 sc->ps_idle = true;
920
921 spin_lock_bh(&sc->sc_pcu_lock);
922
923 if (ah->led_pin >= 0) {
924 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
925 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
926 }
927
928 ath_prepare_reset(sc);
929
930 if (sc->rx.frag) {
931 dev_kfree_skb_any(sc->rx.frag);
932 sc->rx.frag = NULL;
933 }
934
935 if (!ah->curchan)
936 ah->curchan = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
937
938 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
939 ath9k_hw_phy_disable(ah);
940
941 ath9k_hw_configpcipowersave(ah, true);
942
943 spin_unlock_bh(&sc->sc_pcu_lock);
944
945 ath9k_ps_restore(sc);
946
947 set_bit(ATH_OP_INVALID, &common->op_flags);
948 sc->ps_idle = prev_idle;
949
950 mutex_unlock(&sc->mutex);
951
952 ath_dbg(common, CONFIG, "Driver halt\n");
953 }
954
955 static bool ath9k_uses_beacons(int type)
956 {
957 switch (type) {
958 case NL80211_IFTYPE_AP:
959 case NL80211_IFTYPE_ADHOC:
960 case NL80211_IFTYPE_MESH_POINT:
961 return true;
962 default:
963 return false;
964 }
965 }
966
967 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
968 {
969 struct ath9k_vif_iter_data *iter_data = data;
970 int i;
971
972 if (iter_data->has_hw_macaddr) {
973 for (i = 0; i < ETH_ALEN; i++)
974 iter_data->mask[i] &=
975 ~(iter_data->hw_macaddr[i] ^ mac[i]);
976 } else {
977 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
978 iter_data->has_hw_macaddr = true;
979 }
980
981 switch (vif->type) {
982 case NL80211_IFTYPE_AP:
983 iter_data->naps++;
984 break;
985 case NL80211_IFTYPE_STATION:
986 iter_data->nstations++;
987 break;
988 case NL80211_IFTYPE_ADHOC:
989 iter_data->nadhocs++;
990 break;
991 case NL80211_IFTYPE_MESH_POINT:
992 iter_data->nmeshes++;
993 break;
994 case NL80211_IFTYPE_WDS:
995 iter_data->nwds++;
996 break;
997 default:
998 break;
999 }
1000 }
1001
1002 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1003 {
1004 struct ath_softc *sc = data;
1005 struct ath_vif *avp = (void *)vif->drv_priv;
1006
1007 if (vif->type != NL80211_IFTYPE_STATION)
1008 return;
1009
1010 if (avp->primary_sta_vif)
1011 ath9k_set_assoc_state(sc, vif);
1012 }
1013
1014 /* Called with sc->mutex held. */
1015 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1016 struct ieee80211_vif *vif,
1017 struct ath9k_vif_iter_data *iter_data)
1018 {
1019 struct ath_softc *sc = hw->priv;
1020 struct ath_hw *ah = sc->sc_ah;
1021 struct ath_common *common = ath9k_hw_common(ah);
1022
1023 /*
1024 * Pick the MAC address of the first interface as the new hardware
1025 * MAC address. The hardware will use it together with the BSSID mask
1026 * when matching addresses.
1027 */
1028 memset(iter_data, 0, sizeof(*iter_data));
1029 memset(&iter_data->mask, 0xff, ETH_ALEN);
1030
1031 if (vif)
1032 ath9k_vif_iter(iter_data, vif->addr, vif);
1033
1034 /* Get list of all active MAC addresses */
1035 ieee80211_iterate_active_interfaces_atomic(
1036 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1037 ath9k_vif_iter, iter_data);
1038
1039 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN);
1040 }
1041
1042 /* Called with sc->mutex held. */
1043 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1044 struct ieee80211_vif *vif)
1045 {
1046 struct ath_softc *sc = hw->priv;
1047 struct ath_hw *ah = sc->sc_ah;
1048 struct ath_common *common = ath9k_hw_common(ah);
1049 struct ath9k_vif_iter_data iter_data;
1050 enum nl80211_iftype old_opmode = ah->opmode;
1051
1052 ath9k_calculate_iter_data(hw, vif, &iter_data);
1053
1054 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1055 ath_hw_setbssidmask(common);
1056
1057 if (iter_data.naps > 0) {
1058 ath9k_hw_set_tsfadjust(ah, true);
1059 ah->opmode = NL80211_IFTYPE_AP;
1060 } else {
1061 ath9k_hw_set_tsfadjust(ah, false);
1062
1063 if (iter_data.nmeshes)
1064 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1065 else if (iter_data.nwds)
1066 ah->opmode = NL80211_IFTYPE_AP;
1067 else if (iter_data.nadhocs)
1068 ah->opmode = NL80211_IFTYPE_ADHOC;
1069 else
1070 ah->opmode = NL80211_IFTYPE_STATION;
1071 }
1072
1073 ath9k_hw_setopmode(ah);
1074
1075 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1076 ah->imask |= ATH9K_INT_TSFOOR;
1077 else
1078 ah->imask &= ~ATH9K_INT_TSFOOR;
1079
1080 ath9k_hw_set_interrupts(ah);
1081
1082 /*
1083 * If we are changing the opmode to STATION,
1084 * a beacon sync needs to be done.
1085 */
1086 if (ah->opmode == NL80211_IFTYPE_STATION &&
1087 old_opmode == NL80211_IFTYPE_AP &&
1088 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
1089 ieee80211_iterate_active_interfaces_atomic(
1090 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1091 ath9k_sta_vif_iter, sc);
1092 }
1093 }
1094
1095 static int ath9k_add_interface(struct ieee80211_hw *hw,
1096 struct ieee80211_vif *vif)
1097 {
1098 struct ath_softc *sc = hw->priv;
1099 struct ath_hw *ah = sc->sc_ah;
1100 struct ath_common *common = ath9k_hw_common(ah);
1101 struct ath_vif *avp = (void *)vif->drv_priv;
1102 struct ath_node *an = &avp->mcast_node;
1103
1104 mutex_lock(&sc->mutex);
1105
1106 if (config_enabled(CONFIG_ATH9K_TX99)) {
1107 if (sc->nvifs >= 1) {
1108 mutex_unlock(&sc->mutex);
1109 return -EOPNOTSUPP;
1110 }
1111 sc->tx99_vif = vif;
1112 }
1113
1114 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1115 sc->nvifs++;
1116
1117 ath9k_ps_wakeup(sc);
1118 ath9k_calculate_summary_state(hw, vif);
1119 ath9k_ps_restore(sc);
1120
1121 if (ath9k_uses_beacons(vif->type))
1122 ath9k_beacon_assign_slot(sc, vif);
1123
1124 avp->vif = vif;
1125
1126 an->sc = sc;
1127 an->sta = NULL;
1128 an->vif = vif;
1129 an->no_ps_filter = true;
1130 ath_tx_node_init(sc, an);
1131
1132 mutex_unlock(&sc->mutex);
1133 return 0;
1134 }
1135
1136 static int ath9k_change_interface(struct ieee80211_hw *hw,
1137 struct ieee80211_vif *vif,
1138 enum nl80211_iftype new_type,
1139 bool p2p)
1140 {
1141 struct ath_softc *sc = hw->priv;
1142 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1143
1144 mutex_lock(&sc->mutex);
1145
1146 if (config_enabled(CONFIG_ATH9K_TX99)) {
1147 mutex_unlock(&sc->mutex);
1148 return -EOPNOTSUPP;
1149 }
1150
1151 ath_dbg(common, CONFIG, "Change Interface\n");
1152
1153 if (ath9k_uses_beacons(vif->type))
1154 ath9k_beacon_remove_slot(sc, vif);
1155
1156 vif->type = new_type;
1157 vif->p2p = p2p;
1158
1159 ath9k_ps_wakeup(sc);
1160 ath9k_calculate_summary_state(hw, vif);
1161 ath9k_ps_restore(sc);
1162
1163 if (ath9k_uses_beacons(vif->type))
1164 ath9k_beacon_assign_slot(sc, vif);
1165
1166 mutex_unlock(&sc->mutex);
1167 return 0;
1168 }
1169
1170 static void
1171 ath9k_update_p2p_ps_timer(struct ath_softc *sc, struct ath_vif *avp)
1172 {
1173 struct ath_hw *ah = sc->sc_ah;
1174 s32 tsf, target_tsf;
1175
1176 if (!avp || !avp->noa.has_next_tsf)
1177 return;
1178
1179 ath9k_hw_gen_timer_stop(ah, sc->p2p_ps_timer);
1180
1181 tsf = ath9k_hw_gettsf32(sc->sc_ah);
1182
1183 target_tsf = avp->noa.next_tsf;
1184 if (!avp->noa.absent)
1185 target_tsf -= ATH_P2P_PS_STOP_TIME;
1186
1187 if (target_tsf - tsf < ATH_P2P_PS_STOP_TIME)
1188 target_tsf = tsf + ATH_P2P_PS_STOP_TIME;
1189
1190 ath9k_hw_gen_timer_start(ah, sc->p2p_ps_timer, (u32) target_tsf, 1000000);
1191 }
1192
1193 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1194 struct ieee80211_vif *vif)
1195 {
1196 struct ath_softc *sc = hw->priv;
1197 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1198 struct ath_vif *avp = (void *)vif->drv_priv;
1199
1200 ath_dbg(common, CONFIG, "Detach Interface\n");
1201
1202 mutex_lock(&sc->mutex);
1203
1204 spin_lock_bh(&sc->sc_pcu_lock);
1205 if (avp == sc->p2p_ps_vif) {
1206 sc->p2p_ps_vif = NULL;
1207 ath9k_update_p2p_ps_timer(sc, NULL);
1208 }
1209 spin_unlock_bh(&sc->sc_pcu_lock);
1210
1211 sc->nvifs--;
1212 sc->tx99_vif = NULL;
1213
1214 if (ath9k_uses_beacons(vif->type))
1215 ath9k_beacon_remove_slot(sc, vif);
1216
1217 ath9k_ps_wakeup(sc);
1218 ath9k_calculate_summary_state(hw, NULL);
1219 ath9k_ps_restore(sc);
1220
1221 ath_tx_node_cleanup(sc, &avp->mcast_node);
1222
1223 mutex_unlock(&sc->mutex);
1224 }
1225
1226 static void ath9k_enable_ps(struct ath_softc *sc)
1227 {
1228 struct ath_hw *ah = sc->sc_ah;
1229 struct ath_common *common = ath9k_hw_common(ah);
1230
1231 if (config_enabled(CONFIG_ATH9K_TX99))
1232 return;
1233
1234 sc->ps_enabled = true;
1235 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1236 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1237 ah->imask |= ATH9K_INT_TIM_TIMER;
1238 ath9k_hw_set_interrupts(ah);
1239 }
1240 ath9k_hw_setrxabort(ah, 1);
1241 }
1242 ath_dbg(common, PS, "PowerSave enabled\n");
1243 }
1244
1245 static void ath9k_disable_ps(struct ath_softc *sc)
1246 {
1247 struct ath_hw *ah = sc->sc_ah;
1248 struct ath_common *common = ath9k_hw_common(ah);
1249
1250 if (config_enabled(CONFIG_ATH9K_TX99))
1251 return;
1252
1253 sc->ps_enabled = false;
1254 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1255 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1256 ath9k_hw_setrxabort(ah, 0);
1257 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1258 PS_WAIT_FOR_CAB |
1259 PS_WAIT_FOR_PSPOLL_DATA |
1260 PS_WAIT_FOR_TX_ACK);
1261 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1262 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1263 ath9k_hw_set_interrupts(ah);
1264 }
1265 }
1266 ath_dbg(common, PS, "PowerSave disabled\n");
1267 }
1268
1269 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1270 {
1271 struct ath_softc *sc = hw->priv;
1272 struct ath_hw *ah = sc->sc_ah;
1273 struct ath_common *common = ath9k_hw_common(ah);
1274 u32 rxfilter;
1275
1276 if (config_enabled(CONFIG_ATH9K_TX99))
1277 return;
1278
1279 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1280 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1281 return;
1282 }
1283
1284 ath9k_ps_wakeup(sc);
1285 rxfilter = ath9k_hw_getrxfilter(ah);
1286 ath9k_hw_setrxfilter(ah, rxfilter |
1287 ATH9K_RX_FILTER_PHYRADAR |
1288 ATH9K_RX_FILTER_PHYERR);
1289
1290 /* TODO: usually this should not be neccesary, but for some reason
1291 * (or in some mode?) the trigger must be called after the
1292 * configuration, otherwise the register will have its values reset
1293 * (on my ar9220 to value 0x01002310)
1294 */
1295 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1296 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1297 ath9k_ps_restore(sc);
1298 }
1299
1300 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1301 enum spectral_mode spectral_mode)
1302 {
1303 struct ath_softc *sc = hw->priv;
1304 struct ath_hw *ah = sc->sc_ah;
1305 struct ath_common *common = ath9k_hw_common(ah);
1306
1307 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1308 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1309 return -1;
1310 }
1311
1312 switch (spectral_mode) {
1313 case SPECTRAL_DISABLED:
1314 sc->spec_config.enabled = 0;
1315 break;
1316 case SPECTRAL_BACKGROUND:
1317 /* send endless samples.
1318 * TODO: is this really useful for "background"?
1319 */
1320 sc->spec_config.endless = 1;
1321 sc->spec_config.enabled = 1;
1322 break;
1323 case SPECTRAL_CHANSCAN:
1324 case SPECTRAL_MANUAL:
1325 sc->spec_config.endless = 0;
1326 sc->spec_config.enabled = 1;
1327 break;
1328 default:
1329 return -1;
1330 }
1331
1332 ath9k_ps_wakeup(sc);
1333 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1334 ath9k_ps_restore(sc);
1335
1336 sc->spectral_mode = spectral_mode;
1337
1338 return 0;
1339 }
1340
1341 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1342 {
1343 struct ath_softc *sc = hw->priv;
1344 struct ath_hw *ah = sc->sc_ah;
1345 struct ath_common *common = ath9k_hw_common(ah);
1346 struct ieee80211_conf *conf = &hw->conf;
1347 bool reset_channel = false;
1348
1349 ath9k_ps_wakeup(sc);
1350 mutex_lock(&sc->mutex);
1351
1352 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1353 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1354 if (sc->ps_idle) {
1355 ath_cancel_work(sc);
1356 ath9k_stop_btcoex(sc);
1357 } else {
1358 ath9k_start_btcoex(sc);
1359 /*
1360 * The chip needs a reset to properly wake up from
1361 * full sleep
1362 */
1363 reset_channel = ah->chip_fullsleep;
1364 }
1365 }
1366
1367 /*
1368 * We just prepare to enable PS. We have to wait until our AP has
1369 * ACK'd our null data frame to disable RX otherwise we'll ignore
1370 * those ACKs and end up retransmitting the same null data frames.
1371 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1372 */
1373 if (changed & IEEE80211_CONF_CHANGE_PS) {
1374 unsigned long flags;
1375 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1376 if (conf->flags & IEEE80211_CONF_PS)
1377 ath9k_enable_ps(sc);
1378 else
1379 ath9k_disable_ps(sc);
1380 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1381 }
1382
1383 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1384 if (conf->flags & IEEE80211_CONF_MONITOR) {
1385 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1386 sc->sc_ah->is_monitoring = true;
1387 } else {
1388 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1389 sc->sc_ah->is_monitoring = false;
1390 }
1391 }
1392
1393 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1394 if (ath_set_channel(sc, &hw->conf.chandef) < 0) {
1395 ath_err(common, "Unable to set channel\n");
1396 mutex_unlock(&sc->mutex);
1397 ath9k_ps_restore(sc);
1398 return -EINVAL;
1399 }
1400 }
1401
1402 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1403 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1404 sc->config.txpowlimit = 2 * conf->power_level;
1405 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1406 sc->config.txpowlimit, &sc->curtxpow);
1407 }
1408
1409 mutex_unlock(&sc->mutex);
1410 ath9k_ps_restore(sc);
1411
1412 return 0;
1413 }
1414
1415 #define SUPPORTED_FILTERS \
1416 (FIF_PROMISC_IN_BSS | \
1417 FIF_ALLMULTI | \
1418 FIF_CONTROL | \
1419 FIF_PSPOLL | \
1420 FIF_OTHER_BSS | \
1421 FIF_BCN_PRBRESP_PROMISC | \
1422 FIF_PROBE_REQ | \
1423 FIF_FCSFAIL)
1424
1425 /* FIXME: sc->sc_full_reset ? */
1426 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1427 unsigned int changed_flags,
1428 unsigned int *total_flags,
1429 u64 multicast)
1430 {
1431 struct ath_softc *sc = hw->priv;
1432 u32 rfilt;
1433
1434 changed_flags &= SUPPORTED_FILTERS;
1435 *total_flags &= SUPPORTED_FILTERS;
1436
1437 sc->rx.rxfilter = *total_flags;
1438 ath9k_ps_wakeup(sc);
1439 rfilt = ath_calcrxfilter(sc);
1440 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1441 ath9k_ps_restore(sc);
1442
1443 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1444 rfilt);
1445 }
1446
1447 static int ath9k_sta_add(struct ieee80211_hw *hw,
1448 struct ieee80211_vif *vif,
1449 struct ieee80211_sta *sta)
1450 {
1451 struct ath_softc *sc = hw->priv;
1452 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1453 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1454 struct ieee80211_key_conf ps_key = { };
1455 int key;
1456
1457 ath_node_attach(sc, sta, vif);
1458
1459 if (vif->type != NL80211_IFTYPE_AP &&
1460 vif->type != NL80211_IFTYPE_AP_VLAN)
1461 return 0;
1462
1463 key = ath_key_config(common, vif, sta, &ps_key);
1464 if (key > 0)
1465 an->ps_key = key;
1466
1467 return 0;
1468 }
1469
1470 static void ath9k_del_ps_key(struct ath_softc *sc,
1471 struct ieee80211_vif *vif,
1472 struct ieee80211_sta *sta)
1473 {
1474 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1475 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1476 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1477
1478 if (!an->ps_key)
1479 return;
1480
1481 ath_key_delete(common, &ps_key);
1482 an->ps_key = 0;
1483 }
1484
1485 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1486 struct ieee80211_vif *vif,
1487 struct ieee80211_sta *sta)
1488 {
1489 struct ath_softc *sc = hw->priv;
1490
1491 ath9k_del_ps_key(sc, vif, sta);
1492 ath_node_detach(sc, sta);
1493
1494 return 0;
1495 }
1496
1497 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1498 struct ieee80211_vif *vif,
1499 enum sta_notify_cmd cmd,
1500 struct ieee80211_sta *sta)
1501 {
1502 struct ath_softc *sc = hw->priv;
1503 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1504
1505 switch (cmd) {
1506 case STA_NOTIFY_SLEEP:
1507 an->sleeping = true;
1508 ath_tx_aggr_sleep(sta, sc, an);
1509 break;
1510 case STA_NOTIFY_AWAKE:
1511 an->sleeping = false;
1512 ath_tx_aggr_wakeup(sc, an);
1513 break;
1514 }
1515 }
1516
1517 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1518 struct ieee80211_vif *vif, u16 queue,
1519 const struct ieee80211_tx_queue_params *params)
1520 {
1521 struct ath_softc *sc = hw->priv;
1522 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1523 struct ath_txq *txq;
1524 struct ath9k_tx_queue_info qi;
1525 int ret = 0;
1526
1527 if (queue >= IEEE80211_NUM_ACS)
1528 return 0;
1529
1530 txq = sc->tx.txq_map[queue];
1531
1532 ath9k_ps_wakeup(sc);
1533 mutex_lock(&sc->mutex);
1534
1535 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1536
1537 qi.tqi_aifs = params->aifs;
1538 qi.tqi_cwmin = params->cw_min;
1539 qi.tqi_cwmax = params->cw_max;
1540 qi.tqi_burstTime = params->txop * 32;
1541
1542 ath_dbg(common, CONFIG,
1543 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1544 queue, txq->axq_qnum, params->aifs, params->cw_min,
1545 params->cw_max, params->txop);
1546
1547 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1548 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1549 if (ret)
1550 ath_err(common, "TXQ Update failed\n");
1551
1552 mutex_unlock(&sc->mutex);
1553 ath9k_ps_restore(sc);
1554
1555 return ret;
1556 }
1557
1558 static int ath9k_set_key(struct ieee80211_hw *hw,
1559 enum set_key_cmd cmd,
1560 struct ieee80211_vif *vif,
1561 struct ieee80211_sta *sta,
1562 struct ieee80211_key_conf *key)
1563 {
1564 struct ath_softc *sc = hw->priv;
1565 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1566 int ret = 0;
1567
1568 if (ath9k_modparam_nohwcrypt)
1569 return -ENOSPC;
1570
1571 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1572 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1573 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1574 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1575 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1576 /*
1577 * For now, disable hw crypto for the RSN IBSS group keys. This
1578 * could be optimized in the future to use a modified key cache
1579 * design to support per-STA RX GTK, but until that gets
1580 * implemented, use of software crypto for group addressed
1581 * frames is a acceptable to allow RSN IBSS to be used.
1582 */
1583 return -EOPNOTSUPP;
1584 }
1585
1586 mutex_lock(&sc->mutex);
1587 ath9k_ps_wakeup(sc);
1588 ath_dbg(common, CONFIG, "Set HW Key\n");
1589
1590 switch (cmd) {
1591 case SET_KEY:
1592 if (sta)
1593 ath9k_del_ps_key(sc, vif, sta);
1594
1595 ret = ath_key_config(common, vif, sta, key);
1596 if (ret >= 0) {
1597 key->hw_key_idx = ret;
1598 /* push IV and Michael MIC generation to stack */
1599 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1600 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1601 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1602 if (sc->sc_ah->sw_mgmt_crypto &&
1603 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1604 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1605 ret = 0;
1606 }
1607 break;
1608 case DISABLE_KEY:
1609 ath_key_delete(common, key);
1610 break;
1611 default:
1612 ret = -EINVAL;
1613 }
1614
1615 ath9k_ps_restore(sc);
1616 mutex_unlock(&sc->mutex);
1617
1618 return ret;
1619 }
1620
1621 static void ath9k_set_assoc_state(struct ath_softc *sc,
1622 struct ieee80211_vif *vif)
1623 {
1624 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1625 struct ath_vif *avp = (void *)vif->drv_priv;
1626 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1627 unsigned long flags;
1628
1629 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1630 avp->primary_sta_vif = true;
1631
1632 /*
1633 * Set the AID, BSSID and do beacon-sync only when
1634 * the HW opmode is STATION.
1635 *
1636 * But the primary bit is set above in any case.
1637 */
1638 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1639 return;
1640
1641 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1642 common->curaid = bss_conf->aid;
1643 ath9k_hw_write_associd(sc->sc_ah);
1644
1645 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1646 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1647
1648 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1649 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1650 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1651
1652 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1653 ath9k_mci_update_wlan_channels(sc, false);
1654
1655 ath_dbg(common, CONFIG,
1656 "Primary Station interface: %pM, BSSID: %pM\n",
1657 vif->addr, common->curbssid);
1658 }
1659
1660 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1661 {
1662 struct ath_softc *sc = data;
1663 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1664 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1665
1666 if (test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags))
1667 return;
1668
1669 if (bss_conf->assoc)
1670 ath9k_set_assoc_state(sc, vif);
1671 }
1672
1673 void ath9k_p2p_ps_timer(void *priv)
1674 {
1675 struct ath_softc *sc = priv;
1676 struct ath_vif *avp = sc->p2p_ps_vif;
1677 struct ieee80211_vif *vif;
1678 struct ieee80211_sta *sta;
1679 struct ath_node *an;
1680 u32 tsf;
1681
1682 if (!avp)
1683 return;
1684
1685 tsf = ath9k_hw_gettsf32(sc->sc_ah);
1686 if (!avp->noa.absent)
1687 tsf += ATH_P2P_PS_STOP_TIME;
1688
1689 if (!avp->noa.has_next_tsf ||
1690 avp->noa.next_tsf - tsf > BIT(31))
1691 ieee80211_update_p2p_noa(&avp->noa, tsf);
1692
1693 ath9k_update_p2p_ps_timer(sc, avp);
1694
1695 rcu_read_lock();
1696
1697 vif = avp->vif;
1698 sta = ieee80211_find_sta(vif, vif->bss_conf.bssid);
1699 if (!sta)
1700 goto out;
1701
1702 an = (void *) sta->drv_priv;
1703 if (an->sleeping == !!avp->noa.absent)
1704 goto out;
1705
1706 an->sleeping = avp->noa.absent;
1707 if (an->sleeping)
1708 ath_tx_aggr_sleep(sta, sc, an);
1709 else
1710 ath_tx_aggr_wakeup(sc, an);
1711
1712 out:
1713 rcu_read_unlock();
1714 }
1715
1716 void ath9k_update_p2p_ps(struct ath_softc *sc, struct ieee80211_vif *vif)
1717 {
1718 struct ath_vif *avp = (void *)vif->drv_priv;
1719 unsigned long flags;
1720 u32 tsf;
1721
1722 if (!sc->p2p_ps_timer)
1723 return;
1724
1725 if (vif->type != NL80211_IFTYPE_STATION || !vif->p2p)
1726 return;
1727
1728 sc->p2p_ps_vif = avp;
1729
1730 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1731 if (!(sc->ps_flags & PS_BEACON_SYNC)) {
1732 tsf = ath9k_hw_gettsf32(sc->sc_ah);
1733 ieee80211_parse_p2p_noa(&vif->bss_conf.p2p_noa_attr, &avp->noa, tsf);
1734 ath9k_update_p2p_ps_timer(sc, avp);
1735 }
1736 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1737 }
1738
1739 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1740 struct ieee80211_vif *vif,
1741 struct ieee80211_bss_conf *bss_conf,
1742 u32 changed)
1743 {
1744 #define CHECK_ANI \
1745 (BSS_CHANGED_ASSOC | \
1746 BSS_CHANGED_IBSS | \
1747 BSS_CHANGED_BEACON_ENABLED)
1748
1749 struct ath_softc *sc = hw->priv;
1750 struct ath_hw *ah = sc->sc_ah;
1751 struct ath_common *common = ath9k_hw_common(ah);
1752 struct ath_vif *avp = (void *)vif->drv_priv;
1753 int slottime;
1754
1755 ath9k_ps_wakeup(sc);
1756 mutex_lock(&sc->mutex);
1757
1758 if (changed & BSS_CHANGED_ASSOC) {
1759 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1760 bss_conf->bssid, bss_conf->assoc);
1761
1762 if (avp->primary_sta_vif && !bss_conf->assoc) {
1763 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1764 avp->primary_sta_vif = false;
1765
1766 if (ah->opmode == NL80211_IFTYPE_STATION)
1767 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1768 }
1769
1770 ieee80211_iterate_active_interfaces_atomic(
1771 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1772 ath9k_bss_assoc_iter, sc);
1773
1774 if (!test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags) &&
1775 ah->opmode == NL80211_IFTYPE_STATION) {
1776 memset(common->curbssid, 0, ETH_ALEN);
1777 common->curaid = 0;
1778 ath9k_hw_write_associd(sc->sc_ah);
1779 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1780 ath9k_mci_update_wlan_channels(sc, true);
1781 }
1782 }
1783
1784 if (changed & BSS_CHANGED_IBSS) {
1785 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1786 common->curaid = bss_conf->aid;
1787 ath9k_hw_write_associd(sc->sc_ah);
1788 }
1789
1790 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1791 (changed & BSS_CHANGED_BEACON_INT))
1792 ath9k_beacon_config(sc, vif, changed);
1793
1794 if (changed & BSS_CHANGED_ERP_SLOT) {
1795 if (bss_conf->use_short_slot)
1796 slottime = 9;
1797 else
1798 slottime = 20;
1799 if (vif->type == NL80211_IFTYPE_AP) {
1800 /*
1801 * Defer update, so that connected stations can adjust
1802 * their settings at the same time.
1803 * See beacon.c for more details
1804 */
1805 sc->beacon.slottime = slottime;
1806 sc->beacon.updateslot = UPDATE;
1807 } else {
1808 ah->slottime = slottime;
1809 ath9k_hw_init_global_settings(ah);
1810 }
1811 }
1812
1813 if (changed & BSS_CHANGED_P2P_PS) {
1814 spin_lock_bh(&sc->sc_pcu_lock);
1815 ath9k_update_p2p_ps(sc, vif);
1816 spin_unlock_bh(&sc->sc_pcu_lock);
1817 }
1818
1819 if (changed & CHECK_ANI)
1820 ath_check_ani(sc);
1821
1822 mutex_unlock(&sc->mutex);
1823 ath9k_ps_restore(sc);
1824
1825 #undef CHECK_ANI
1826 }
1827
1828 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1829 {
1830 struct ath_softc *sc = hw->priv;
1831 u64 tsf;
1832
1833 mutex_lock(&sc->mutex);
1834 ath9k_ps_wakeup(sc);
1835 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1836 ath9k_ps_restore(sc);
1837 mutex_unlock(&sc->mutex);
1838
1839 return tsf;
1840 }
1841
1842 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1843 struct ieee80211_vif *vif,
1844 u64 tsf)
1845 {
1846 struct ath_softc *sc = hw->priv;
1847
1848 mutex_lock(&sc->mutex);
1849 ath9k_ps_wakeup(sc);
1850 ath9k_hw_settsf64(sc->sc_ah, tsf);
1851 ath9k_ps_restore(sc);
1852 mutex_unlock(&sc->mutex);
1853 }
1854
1855 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1856 {
1857 struct ath_softc *sc = hw->priv;
1858
1859 mutex_lock(&sc->mutex);
1860
1861 ath9k_ps_wakeup(sc);
1862 ath9k_hw_reset_tsf(sc->sc_ah);
1863 ath9k_ps_restore(sc);
1864
1865 mutex_unlock(&sc->mutex);
1866 }
1867
1868 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1869 struct ieee80211_vif *vif,
1870 enum ieee80211_ampdu_mlme_action action,
1871 struct ieee80211_sta *sta,
1872 u16 tid, u16 *ssn, u8 buf_size)
1873 {
1874 struct ath_softc *sc = hw->priv;
1875 bool flush = false;
1876 int ret = 0;
1877
1878 mutex_lock(&sc->mutex);
1879
1880 switch (action) {
1881 case IEEE80211_AMPDU_RX_START:
1882 break;
1883 case IEEE80211_AMPDU_RX_STOP:
1884 break;
1885 case IEEE80211_AMPDU_TX_START:
1886 ath9k_ps_wakeup(sc);
1887 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1888 if (!ret)
1889 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1890 ath9k_ps_restore(sc);
1891 break;
1892 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1893 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1894 flush = true;
1895 case IEEE80211_AMPDU_TX_STOP_CONT:
1896 ath9k_ps_wakeup(sc);
1897 ath_tx_aggr_stop(sc, sta, tid);
1898 if (!flush)
1899 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1900 ath9k_ps_restore(sc);
1901 break;
1902 case IEEE80211_AMPDU_TX_OPERATIONAL:
1903 ath9k_ps_wakeup(sc);
1904 ath_tx_aggr_resume(sc, sta, tid);
1905 ath9k_ps_restore(sc);
1906 break;
1907 default:
1908 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1909 }
1910
1911 mutex_unlock(&sc->mutex);
1912
1913 return ret;
1914 }
1915
1916 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1917 struct survey_info *survey)
1918 {
1919 struct ath_softc *sc = hw->priv;
1920 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1921 struct ieee80211_supported_band *sband;
1922 struct ieee80211_channel *chan;
1923 int pos;
1924
1925 if (config_enabled(CONFIG_ATH9K_TX99))
1926 return -EOPNOTSUPP;
1927
1928 spin_lock_bh(&common->cc_lock);
1929 if (idx == 0)
1930 ath_update_survey_stats(sc);
1931
1932 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1933 if (sband && idx >= sband->n_channels) {
1934 idx -= sband->n_channels;
1935 sband = NULL;
1936 }
1937
1938 if (!sband)
1939 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1940
1941 if (!sband || idx >= sband->n_channels) {
1942 spin_unlock_bh(&common->cc_lock);
1943 return -ENOENT;
1944 }
1945
1946 chan = &sband->channels[idx];
1947 pos = chan->hw_value;
1948 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1949 survey->channel = chan;
1950 spin_unlock_bh(&common->cc_lock);
1951
1952 return 0;
1953 }
1954
1955 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1956 {
1957 struct ath_softc *sc = hw->priv;
1958 struct ath_hw *ah = sc->sc_ah;
1959
1960 if (config_enabled(CONFIG_ATH9K_TX99))
1961 return;
1962
1963 mutex_lock(&sc->mutex);
1964 ah->coverage_class = coverage_class;
1965
1966 ath9k_ps_wakeup(sc);
1967 ath9k_hw_init_global_settings(ah);
1968 ath9k_ps_restore(sc);
1969
1970 mutex_unlock(&sc->mutex);
1971 }
1972
1973 static bool ath9k_has_tx_pending(struct ath_softc *sc)
1974 {
1975 int i, npend = 0;
1976
1977 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1978 if (!ATH_TXQ_SETUP(sc, i))
1979 continue;
1980
1981 if (!sc->tx.txq[i].axq_depth)
1982 continue;
1983
1984 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1985 if (npend)
1986 break;
1987 }
1988
1989 return !!npend;
1990 }
1991
1992 static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1993 {
1994 struct ath_softc *sc = hw->priv;
1995 struct ath_hw *ah = sc->sc_ah;
1996 struct ath_common *common = ath9k_hw_common(ah);
1997 int timeout = HZ / 5; /* 200 ms */
1998 bool drain_txq;
1999
2000 mutex_lock(&sc->mutex);
2001 cancel_delayed_work_sync(&sc->tx_complete_work);
2002
2003 if (ah->ah_flags & AH_UNPLUGGED) {
2004 ath_dbg(common, ANY, "Device has been unplugged!\n");
2005 mutex_unlock(&sc->mutex);
2006 return;
2007 }
2008
2009 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2010 ath_dbg(common, ANY, "Device not present\n");
2011 mutex_unlock(&sc->mutex);
2012 return;
2013 }
2014
2015 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
2016 timeout) > 0)
2017 drop = false;
2018
2019 if (drop) {
2020 ath9k_ps_wakeup(sc);
2021 spin_lock_bh(&sc->sc_pcu_lock);
2022 drain_txq = ath_drain_all_txq(sc);
2023 spin_unlock_bh(&sc->sc_pcu_lock);
2024
2025 if (!drain_txq)
2026 ath_reset(sc);
2027
2028 ath9k_ps_restore(sc);
2029 ieee80211_wake_queues(hw);
2030 }
2031
2032 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2033 mutex_unlock(&sc->mutex);
2034 }
2035
2036 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2037 {
2038 struct ath_softc *sc = hw->priv;
2039 int i;
2040
2041 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2042 if (!ATH_TXQ_SETUP(sc, i))
2043 continue;
2044
2045 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2046 return true;
2047 }
2048 return false;
2049 }
2050
2051 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2052 {
2053 struct ath_softc *sc = hw->priv;
2054 struct ath_hw *ah = sc->sc_ah;
2055 struct ieee80211_vif *vif;
2056 struct ath_vif *avp;
2057 struct ath_buf *bf;
2058 struct ath_tx_status ts;
2059 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2060 int status;
2061
2062 vif = sc->beacon.bslot[0];
2063 if (!vif)
2064 return 0;
2065
2066 if (!vif->bss_conf.enable_beacon)
2067 return 0;
2068
2069 avp = (void *)vif->drv_priv;
2070
2071 if (!sc->beacon.tx_processed && !edma) {
2072 tasklet_disable(&sc->bcon_tasklet);
2073
2074 bf = avp->av_bcbuf;
2075 if (!bf || !bf->bf_mpdu)
2076 goto skip;
2077
2078 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2079 if (status == -EINPROGRESS)
2080 goto skip;
2081
2082 sc->beacon.tx_processed = true;
2083 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2084
2085 skip:
2086 tasklet_enable(&sc->bcon_tasklet);
2087 }
2088
2089 return sc->beacon.tx_last;
2090 }
2091
2092 static int ath9k_get_stats(struct ieee80211_hw *hw,
2093 struct ieee80211_low_level_stats *stats)
2094 {
2095 struct ath_softc *sc = hw->priv;
2096 struct ath_hw *ah = sc->sc_ah;
2097 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2098
2099 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2100 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2101 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2102 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2103 return 0;
2104 }
2105
2106 static u32 fill_chainmask(u32 cap, u32 new)
2107 {
2108 u32 filled = 0;
2109 int i;
2110
2111 for (i = 0; cap && new; i++, cap >>= 1) {
2112 if (!(cap & BIT(0)))
2113 continue;
2114
2115 if (new & BIT(0))
2116 filled |= BIT(i);
2117
2118 new >>= 1;
2119 }
2120
2121 return filled;
2122 }
2123
2124 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2125 {
2126 if (AR_SREV_9300_20_OR_LATER(ah))
2127 return true;
2128
2129 switch (val & 0x7) {
2130 case 0x1:
2131 case 0x3:
2132 case 0x7:
2133 return true;
2134 case 0x2:
2135 return (ah->caps.rx_chainmask == 1);
2136 default:
2137 return false;
2138 }
2139 }
2140
2141 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2142 {
2143 struct ath_softc *sc = hw->priv;
2144 struct ath_hw *ah = sc->sc_ah;
2145
2146 if (ah->caps.rx_chainmask != 1)
2147 rx_ant |= tx_ant;
2148
2149 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2150 return -EINVAL;
2151
2152 sc->ant_rx = rx_ant;
2153 sc->ant_tx = tx_ant;
2154
2155 if (ah->caps.rx_chainmask == 1)
2156 return 0;
2157
2158 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2159 if (AR_SREV_9100(ah))
2160 ah->rxchainmask = 0x7;
2161 else
2162 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2163
2164 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2165 ath9k_cmn_reload_chainmask(ah);
2166
2167 return 0;
2168 }
2169
2170 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2171 {
2172 struct ath_softc *sc = hw->priv;
2173
2174 *tx_ant = sc->ant_tx;
2175 *rx_ant = sc->ant_rx;
2176 return 0;
2177 }
2178
2179 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2180 {
2181 struct ath_softc *sc = hw->priv;
2182 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2183 set_bit(ATH_OP_SCANNING, &common->op_flags);
2184 }
2185
2186 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2187 {
2188 struct ath_softc *sc = hw->priv;
2189 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2190 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2191 }
2192
2193 static void ath9k_channel_switch_beacon(struct ieee80211_hw *hw,
2194 struct ieee80211_vif *vif,
2195 struct cfg80211_chan_def *chandef)
2196 {
2197 /* depend on vif->csa_active only */
2198 return;
2199 }
2200
2201 struct ieee80211_ops ath9k_ops = {
2202 .tx = ath9k_tx,
2203 .start = ath9k_start,
2204 .stop = ath9k_stop,
2205 .add_interface = ath9k_add_interface,
2206 .change_interface = ath9k_change_interface,
2207 .remove_interface = ath9k_remove_interface,
2208 .config = ath9k_config,
2209 .configure_filter = ath9k_configure_filter,
2210 .sta_add = ath9k_sta_add,
2211 .sta_remove = ath9k_sta_remove,
2212 .sta_notify = ath9k_sta_notify,
2213 .conf_tx = ath9k_conf_tx,
2214 .bss_info_changed = ath9k_bss_info_changed,
2215 .set_key = ath9k_set_key,
2216 .get_tsf = ath9k_get_tsf,
2217 .set_tsf = ath9k_set_tsf,
2218 .reset_tsf = ath9k_reset_tsf,
2219 .ampdu_action = ath9k_ampdu_action,
2220 .get_survey = ath9k_get_survey,
2221 .rfkill_poll = ath9k_rfkill_poll_state,
2222 .set_coverage_class = ath9k_set_coverage_class,
2223 .flush = ath9k_flush,
2224 .tx_frames_pending = ath9k_tx_frames_pending,
2225 .tx_last_beacon = ath9k_tx_last_beacon,
2226 .release_buffered_frames = ath9k_release_buffered_frames,
2227 .get_stats = ath9k_get_stats,
2228 .set_antenna = ath9k_set_antenna,
2229 .get_antenna = ath9k_get_antenna,
2230
2231 #ifdef CONFIG_ATH9K_WOW
2232 .suspend = ath9k_suspend,
2233 .resume = ath9k_resume,
2234 .set_wakeup = ath9k_set_wakeup,
2235 #endif
2236
2237 #ifdef CONFIG_ATH9K_DEBUGFS
2238 .get_et_sset_count = ath9k_get_et_sset_count,
2239 .get_et_stats = ath9k_get_et_stats,
2240 .get_et_strings = ath9k_get_et_strings,
2241 #endif
2242
2243 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2244 .sta_add_debugfs = ath9k_sta_add_debugfs,
2245 #endif
2246 .sw_scan_start = ath9k_sw_scan_start,
2247 .sw_scan_complete = ath9k_sw_scan_complete,
2248 .channel_switch_beacon = ath9k_channel_switch_beacon,
2249 };
Linux kernel - Deliverables
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