2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 u8
ath9k_parse_mpdudensity(u8 mpdudensity
)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity
) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc
*sc
, struct ath_txq
*txq
,
62 spin_lock_bh(&txq
->axq_lock
);
72 if (txq
->mac80211_qnum
>= 0) {
73 struct list_head
*list
;
75 list
= &sc
->cur_chan
->acq
[txq
->mac80211_qnum
];
76 if (!list_empty(list
))
80 spin_unlock_bh(&txq
->axq_lock
);
84 static bool ath9k_setpower(struct ath_softc
*sc
, enum ath9k_power_mode mode
)
89 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
90 ret
= ath9k_hw_setpower(sc
->sc_ah
, mode
);
91 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
96 void ath_ps_full_sleep(unsigned long data
)
98 struct ath_softc
*sc
= (struct ath_softc
*) data
;
99 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
102 spin_lock(&common
->cc_lock
);
103 ath_hw_cycle_counters_update(common
);
104 spin_unlock(&common
->cc_lock
);
106 ath9k_hw_setrxabort(sc
->sc_ah
, 1);
107 ath9k_hw_stopdmarecv(sc
->sc_ah
, &reset
);
109 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_FULL_SLEEP
);
112 void ath9k_ps_wakeup(struct ath_softc
*sc
)
114 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
116 enum ath9k_power_mode power_mode
;
118 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
119 if (++sc
->ps_usecount
!= 1)
122 del_timer_sync(&sc
->sleep_timer
);
123 power_mode
= sc
->sc_ah
->power_mode
;
124 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_AWAKE
);
127 * While the hardware is asleep, the cycle counters contain no
128 * useful data. Better clear them now so that they don't mess up
129 * survey data results.
131 if (power_mode
!= ATH9K_PM_AWAKE
) {
132 spin_lock(&common
->cc_lock
);
133 ath_hw_cycle_counters_update(common
);
134 memset(&common
->cc_survey
, 0, sizeof(common
->cc_survey
));
135 memset(&common
->cc_ani
, 0, sizeof(common
->cc_ani
));
136 spin_unlock(&common
->cc_lock
);
140 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
143 void ath9k_ps_restore(struct ath_softc
*sc
)
145 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
146 enum ath9k_power_mode mode
;
149 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
150 if (--sc
->ps_usecount
!= 0)
154 mod_timer(&sc
->sleep_timer
, jiffies
+ HZ
/ 10);
158 if (sc
->ps_enabled
&&
159 !(sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
161 PS_WAIT_FOR_PSPOLL_DATA
|
164 mode
= ATH9K_PM_NETWORK_SLEEP
;
165 if (ath9k_hw_btcoex_is_enabled(sc
->sc_ah
))
166 ath9k_btcoex_stop_gen_timer(sc
);
171 spin_lock(&common
->cc_lock
);
172 ath_hw_cycle_counters_update(common
);
173 spin_unlock(&common
->cc_lock
);
175 ath9k_hw_setpower(sc
->sc_ah
, mode
);
178 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
181 static void __ath_cancel_work(struct ath_softc
*sc
)
183 cancel_work_sync(&sc
->paprd_work
);
184 cancel_delayed_work_sync(&sc
->tx_complete_work
);
185 cancel_delayed_work_sync(&sc
->hw_pll_work
);
187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
188 if (ath9k_hw_mci_is_enabled(sc
->sc_ah
))
189 cancel_work_sync(&sc
->mci_work
);
193 void ath_cancel_work(struct ath_softc
*sc
)
195 __ath_cancel_work(sc
);
196 cancel_work_sync(&sc
->hw_reset_work
);
199 void ath_restart_work(struct ath_softc
*sc
)
201 ieee80211_queue_delayed_work(sc
->hw
, &sc
->tx_complete_work
, 0);
203 if (AR_SREV_9340(sc
->sc_ah
) || AR_SREV_9330(sc
->sc_ah
))
204 ieee80211_queue_delayed_work(sc
->hw
, &sc
->hw_pll_work
,
205 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL
));
210 static bool ath_prepare_reset(struct ath_softc
*sc
)
212 struct ath_hw
*ah
= sc
->sc_ah
;
215 ieee80211_stop_queues(sc
->hw
);
217 ath9k_hw_disable_interrupts(ah
);
219 if (!ath_drain_all_txq(sc
))
222 if (!ath_stoprecv(sc
))
228 static bool ath_complete_reset(struct ath_softc
*sc
, bool start
)
230 struct ath_hw
*ah
= sc
->sc_ah
;
231 struct ath_common
*common
= ath9k_hw_common(ah
);
234 ath9k_calculate_summary_state(sc
, sc
->cur_chan
);
236 ath9k_cmn_update_txpow(ah
, sc
->cur_chan
->cur_txpower
,
237 sc
->cur_chan
->txpower
,
238 &sc
->cur_chan
->cur_txpower
);
239 clear_bit(ATH_OP_HW_RESET
, &common
->op_flags
);
241 if (!sc
->cur_chan
->offchannel
&& start
) {
242 /* restore per chanctx TSF timer */
243 if (sc
->cur_chan
->tsf_val
) {
246 offset
= ath9k_hw_get_tsf_offset(&sc
->cur_chan
->tsf_ts
,
248 ath9k_hw_settsf64(ah
, sc
->cur_chan
->tsf_val
+ offset
);
252 if (!test_bit(ATH_OP_BEACONS
, &common
->op_flags
))
255 if (ah
->opmode
== NL80211_IFTYPE_STATION
&&
256 test_bit(ATH_OP_PRIM_STA_VIF
, &common
->op_flags
)) {
257 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
258 sc
->ps_flags
|= PS_BEACON_SYNC
| PS_WAIT_FOR_BEACON
;
259 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
261 ath9k_set_beacon(sc
);
264 ath_restart_work(sc
);
265 ath_txq_schedule_all(sc
);
270 ath9k_hw_set_interrupts(ah
);
271 ath9k_hw_enable_interrupts(ah
);
272 ieee80211_wake_queues(sc
->hw
);
273 ath9k_p2p_ps_timer(sc
);
278 static int ath_reset_internal(struct ath_softc
*sc
, struct ath9k_channel
*hchan
)
280 struct ath_hw
*ah
= sc
->sc_ah
;
281 struct ath_common
*common
= ath9k_hw_common(ah
);
282 struct ath9k_hw_cal_data
*caldata
= NULL
;
286 __ath_cancel_work(sc
);
288 tasklet_disable(&sc
->intr_tq
);
289 tasklet_disable(&sc
->bcon_tasklet
);
290 spin_lock_bh(&sc
->sc_pcu_lock
);
292 if (!sc
->cur_chan
->offchannel
) {
294 caldata
= &sc
->cur_chan
->caldata
;
302 if (!ath_prepare_reset(sc
))
305 if (ath9k_is_chanctx_enabled())
308 spin_lock_bh(&sc
->chan_lock
);
309 sc
->cur_chandef
= sc
->cur_chan
->chandef
;
310 spin_unlock_bh(&sc
->chan_lock
);
312 ath_dbg(common
, CONFIG
, "Reset to %u MHz, HT40: %d fastcc: %d\n",
313 hchan
->channel
, IS_CHAN_HT40(hchan
), fastcc
);
315 r
= ath9k_hw_reset(ah
, hchan
, caldata
, fastcc
);
318 "Unable to reset channel, reset status %d\n", r
);
320 ath9k_hw_enable_interrupts(ah
);
321 ath9k_queue_reset(sc
, RESET_TYPE_BB_HANG
);
326 if (ath9k_hw_mci_is_enabled(sc
->sc_ah
) &&
327 sc
->cur_chan
->offchannel
)
328 ath9k_mci_set_txpower(sc
, true, false);
330 if (!ath_complete_reset(sc
, true))
334 spin_unlock_bh(&sc
->sc_pcu_lock
);
335 tasklet_enable(&sc
->bcon_tasklet
);
336 tasklet_enable(&sc
->intr_tq
);
341 static void ath_node_attach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
,
342 struct ieee80211_vif
*vif
)
345 an
= (struct ath_node
*)sta
->drv_priv
;
350 memset(&an
->key_idx
, 0, sizeof(an
->key_idx
));
352 ath_tx_node_init(sc
, an
);
354 ath_dynack_node_init(sc
->sc_ah
, an
);
357 static void ath_node_detach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
)
359 struct ath_node
*an
= (struct ath_node
*)sta
->drv_priv
;
360 ath_tx_node_cleanup(sc
, an
);
362 ath_dynack_node_deinit(sc
->sc_ah
, an
);
365 void ath9k_tasklet(unsigned long data
)
367 struct ath_softc
*sc
= (struct ath_softc
*)data
;
368 struct ath_hw
*ah
= sc
->sc_ah
;
369 struct ath_common
*common
= ath9k_hw_common(ah
);
370 enum ath_reset_type type
;
372 u32 status
= sc
->intrstatus
;
376 spin_lock(&sc
->sc_pcu_lock
);
378 if (status
& ATH9K_INT_FATAL
) {
379 type
= RESET_TYPE_FATAL_INT
;
380 ath9k_queue_reset(sc
, type
);
383 * Increment the ref. counter here so that
384 * interrupts are enabled in the reset routine.
386 atomic_inc(&ah
->intr_ref_cnt
);
387 ath_dbg(common
, RESET
, "FATAL: Skipping interrupts\n");
391 if ((ah
->config
.hw_hang_checks
& HW_BB_WATCHDOG
) &&
392 (status
& ATH9K_INT_BB_WATCHDOG
)) {
393 spin_lock(&common
->cc_lock
);
394 ath_hw_cycle_counters_update(common
);
395 ar9003_hw_bb_watchdog_dbg_info(ah
);
396 spin_unlock(&common
->cc_lock
);
398 if (ar9003_hw_bb_watchdog_check(ah
)) {
399 type
= RESET_TYPE_BB_WATCHDOG
;
400 ath9k_queue_reset(sc
, type
);
403 * Increment the ref. counter here so that
404 * interrupts are enabled in the reset routine.
406 atomic_inc(&ah
->intr_ref_cnt
);
407 ath_dbg(common
, RESET
,
408 "BB_WATCHDOG: Skipping interrupts\n");
413 if (status
& ATH9K_INT_GTT
) {
416 if ((sc
->gtt_cnt
>= MAX_GTT_CNT
) && !ath9k_hw_check_alive(ah
)) {
417 type
= RESET_TYPE_TX_GTT
;
418 ath9k_queue_reset(sc
, type
);
419 atomic_inc(&ah
->intr_ref_cnt
);
420 ath_dbg(common
, RESET
,
421 "GTT: Skipping interrupts\n");
426 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
427 if ((status
& ATH9K_INT_TSFOOR
) && sc
->ps_enabled
) {
429 * TSF sync does not look correct; remain awake to sync with
432 ath_dbg(common
, PS
, "TSFOOR - Sync with next Beacon\n");
433 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
| PS_BEACON_SYNC
;
435 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
437 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
438 rxmask
= (ATH9K_INT_RXHP
| ATH9K_INT_RXLP
| ATH9K_INT_RXEOL
|
441 rxmask
= (ATH9K_INT_RX
| ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
443 if (status
& rxmask
) {
444 /* Check for high priority Rx first */
445 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) &&
446 (status
& ATH9K_INT_RXHP
))
447 ath_rx_tasklet(sc
, 0, true);
449 ath_rx_tasklet(sc
, 0, false);
452 if (status
& ATH9K_INT_TX
) {
453 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
455 * For EDMA chips, TX completion is enabled for the
456 * beacon queue, so if a beacon has been transmitted
457 * successfully after a GTT interrupt, the GTT counter
458 * gets reset to zero here.
462 ath_tx_edma_tasklet(sc
);
467 wake_up(&sc
->tx_wait
);
470 if (status
& ATH9K_INT_GENTIMER
)
471 ath_gen_timer_isr(sc
->sc_ah
);
473 ath9k_btcoex_handle_interrupt(sc
, status
);
475 /* re-enable hardware interrupt */
476 ath9k_hw_enable_interrupts(ah
);
478 spin_unlock(&sc
->sc_pcu_lock
);
479 ath9k_ps_restore(sc
);
482 irqreturn_t
ath_isr(int irq
, void *dev
)
484 #define SCHED_INTR ( \
486 ATH9K_INT_BB_WATCHDOG | \
497 ATH9K_INT_GENTIMER | \
500 struct ath_softc
*sc
= dev
;
501 struct ath_hw
*ah
= sc
->sc_ah
;
502 struct ath_common
*common
= ath9k_hw_common(ah
);
503 enum ath9k_int status
;
508 * The hardware is not ready/present, don't
509 * touch anything. Note this can happen early
510 * on if the IRQ is shared.
512 if (!ah
|| test_bit(ATH_OP_INVALID
, &common
->op_flags
))
515 if (!AR_SREV_9100(ah
) && test_bit(ATH_OP_HW_RESET
, &common
->op_flags
))
518 /* shared irq, not for us */
519 if (!ath9k_hw_intrpend(ah
))
523 * Figure out the reason(s) for the interrupt. Note
524 * that the hal returns a pseudo-ISR that may include
525 * bits we haven't explicitly enabled so we mask the
526 * value to insure we only process bits we requested.
528 ath9k_hw_getisr(ah
, &status
, &sync_cause
); /* NB: clears ISR too */
529 ath9k_debug_sync_cause(sc
, sync_cause
);
530 status
&= ah
->imask
; /* discard unasked-for bits */
532 if (AR_SREV_9100(ah
) && test_bit(ATH_OP_HW_RESET
, &common
->op_flags
))
536 * If there are no status bits set, then this interrupt was not
537 * for me (should have been caught above).
542 /* Cache the status */
543 sc
->intrstatus
= status
;
545 if (status
& SCHED_INTR
)
549 * If a FATAL interrupt is received, we have to reset the chip
552 if (status
& ATH9K_INT_FATAL
)
555 if ((ah
->config
.hw_hang_checks
& HW_BB_WATCHDOG
) &&
556 (status
& ATH9K_INT_BB_WATCHDOG
))
559 #ifdef CONFIG_ATH9K_WOW
560 if (status
& ATH9K_INT_BMISS
) {
561 if (atomic_read(&sc
->wow_sleep_proc_intr
) == 0) {
562 atomic_inc(&sc
->wow_got_bmiss_intr
);
563 atomic_dec(&sc
->wow_sleep_proc_intr
);
568 if (status
& ATH9K_INT_SWBA
)
569 tasklet_schedule(&sc
->bcon_tasklet
);
571 if (status
& ATH9K_INT_TXURN
)
572 ath9k_hw_updatetxtriglevel(ah
, true);
574 if (status
& ATH9K_INT_RXEOL
) {
575 ah
->imask
&= ~(ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
576 ath9k_hw_set_interrupts(ah
);
579 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
580 if (status
& ATH9K_INT_TIM_TIMER
) {
581 if (ATH_DBG_WARN_ON_ONCE(sc
->ps_idle
))
583 /* Clear RxAbort bit so that we can
585 ath9k_setpower(sc
, ATH9K_PM_AWAKE
);
586 spin_lock(&sc
->sc_pm_lock
);
587 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
588 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
;
589 spin_unlock(&sc
->sc_pm_lock
);
594 ath_debug_stat_interrupt(sc
, status
);
597 /* turn off every interrupt */
598 ath9k_hw_disable_interrupts(ah
);
599 tasklet_schedule(&sc
->intr_tq
);
608 * This function is called when a HW reset cannot be deferred
609 * and has to be immediate.
611 int ath_reset(struct ath_softc
*sc
, struct ath9k_channel
*hchan
)
613 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
616 ath9k_hw_kill_interrupts(sc
->sc_ah
);
617 set_bit(ATH_OP_HW_RESET
, &common
->op_flags
);
620 r
= ath_reset_internal(sc
, hchan
);
621 ath9k_ps_restore(sc
);
627 * When a HW reset can be deferred, it is added to the
628 * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
631 void ath9k_queue_reset(struct ath_softc
*sc
, enum ath_reset_type type
)
633 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
634 #ifdef CONFIG_ATH9K_DEBUGFS
635 RESET_STAT_INC(sc
, type
);
637 ath9k_hw_kill_interrupts(sc
->sc_ah
);
638 set_bit(ATH_OP_HW_RESET
, &common
->op_flags
);
639 ieee80211_queue_work(sc
->hw
, &sc
->hw_reset_work
);
642 void ath_reset_work(struct work_struct
*work
)
644 struct ath_softc
*sc
= container_of(work
, struct ath_softc
, hw_reset_work
);
647 ath_reset_internal(sc
, NULL
);
648 ath9k_ps_restore(sc
);
651 /**********************/
652 /* mac80211 callbacks */
653 /**********************/
655 static int ath9k_start(struct ieee80211_hw
*hw
)
657 struct ath_softc
*sc
= hw
->priv
;
658 struct ath_hw
*ah
= sc
->sc_ah
;
659 struct ath_common
*common
= ath9k_hw_common(ah
);
660 struct ieee80211_channel
*curchan
= sc
->cur_chan
->chandef
.chan
;
661 struct ath_chanctx
*ctx
= sc
->cur_chan
;
662 struct ath9k_channel
*init_channel
;
665 ath_dbg(common
, CONFIG
,
666 "Starting driver with initial channel: %d MHz\n",
667 curchan
->center_freq
);
670 mutex_lock(&sc
->mutex
);
672 init_channel
= ath9k_cmn_get_channel(hw
, ah
, &ctx
->chandef
);
673 sc
->cur_chandef
= hw
->conf
.chandef
;
675 /* Reset SERDES registers */
676 ath9k_hw_configpcipowersave(ah
, false);
679 * The basic interface to setting the hardware in a good
680 * state is ``reset''. On return the hardware is known to
681 * be powered up and with interrupts disabled. This must
682 * be followed by initialization of the appropriate bits
683 * and then setup of the interrupt mask.
685 spin_lock_bh(&sc
->sc_pcu_lock
);
687 atomic_set(&ah
->intr_ref_cnt
, -1);
689 r
= ath9k_hw_reset(ah
, init_channel
, ah
->caldata
, false);
692 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
693 r
, curchan
->center_freq
);
694 ah
->reset_power_on
= false;
697 /* Setup our intr mask. */
698 ah
->imask
= ATH9K_INT_TX
| ATH9K_INT_RXEOL
|
699 ATH9K_INT_RXORN
| ATH9K_INT_FATAL
|
702 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
703 ah
->imask
|= ATH9K_INT_RXHP
|
706 ah
->imask
|= ATH9K_INT_RX
;
708 if (ah
->config
.hw_hang_checks
& HW_BB_WATCHDOG
)
709 ah
->imask
|= ATH9K_INT_BB_WATCHDOG
;
712 * Enable GTT interrupts only for AR9003/AR9004 chips
715 if (AR_SREV_9300_20_OR_LATER(ah
))
716 ah
->imask
|= ATH9K_INT_GTT
;
718 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_HT
)
719 ah
->imask
|= ATH9K_INT_CST
;
723 clear_bit(ATH_OP_INVALID
, &common
->op_flags
);
724 sc
->sc_ah
->is_monitoring
= false;
726 if (!ath_complete_reset(sc
, false))
727 ah
->reset_power_on
= false;
729 if (ah
->led_pin
>= 0) {
730 ath9k_hw_cfg_output(ah
, ah
->led_pin
,
731 AR_GPIO_OUTPUT_MUX_AS_OUTPUT
);
732 ath9k_hw_set_gpio(ah
, ah
->led_pin
,
733 (ah
->config
.led_active_high
) ? 1 : 0);
737 * Reset key cache to sane defaults (all entries cleared) instead of
738 * semi-random values after suspend/resume.
740 ath9k_cmn_init_crypto(sc
->sc_ah
);
742 ath9k_hw_reset_tsf(ah
);
744 spin_unlock_bh(&sc
->sc_pcu_lock
);
746 mutex_unlock(&sc
->mutex
);
748 ath9k_ps_restore(sc
);
753 static void ath9k_tx(struct ieee80211_hw
*hw
,
754 struct ieee80211_tx_control
*control
,
757 struct ath_softc
*sc
= hw
->priv
;
758 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
759 struct ath_tx_control txctl
;
760 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
763 if (sc
->ps_enabled
) {
765 * mac80211 does not set PM field for normal data frames, so we
766 * need to update that based on the current PS mode.
768 if (ieee80211_is_data(hdr
->frame_control
) &&
769 !ieee80211_is_nullfunc(hdr
->frame_control
) &&
770 !ieee80211_has_pm(hdr
->frame_control
)) {
772 "Add PM=1 for a TX frame while in PS mode\n");
773 hdr
->frame_control
|= cpu_to_le16(IEEE80211_FCTL_PM
);
777 if (unlikely(sc
->sc_ah
->power_mode
== ATH9K_PM_NETWORK_SLEEP
)) {
779 * We are using PS-Poll and mac80211 can request TX while in
780 * power save mode. Need to wake up hardware for the TX to be
781 * completed and if needed, also for RX of buffered frames.
784 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
785 if (!(sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
786 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
787 if (ieee80211_is_pspoll(hdr
->frame_control
)) {
789 "Sending PS-Poll to pick a buffered frame\n");
790 sc
->ps_flags
|= PS_WAIT_FOR_PSPOLL_DATA
;
792 ath_dbg(common
, PS
, "Wake up to complete TX\n");
793 sc
->ps_flags
|= PS_WAIT_FOR_TX_ACK
;
796 * The actual restore operation will happen only after
797 * the ps_flags bit is cleared. We are just dropping
798 * the ps_usecount here.
800 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
801 ath9k_ps_restore(sc
);
805 * Cannot tx while the hardware is in full sleep, it first needs a full
806 * chip reset to recover from that
808 if (unlikely(sc
->sc_ah
->power_mode
== ATH9K_PM_FULL_SLEEP
)) {
809 ath_err(common
, "TX while HW is in FULL_SLEEP mode\n");
813 memset(&txctl
, 0, sizeof(struct ath_tx_control
));
814 txctl
.txq
= sc
->tx
.txq_map
[skb_get_queue_mapping(skb
)];
815 txctl
.sta
= control
->sta
;
817 ath_dbg(common
, XMIT
, "transmitting packet, skb: %p\n", skb
);
819 if (ath_tx_start(hw
, skb
, &txctl
) != 0) {
820 ath_dbg(common
, XMIT
, "TX failed\n");
821 TX_STAT_INC(txctl
.txq
->axq_qnum
, txfailed
);
827 ieee80211_free_txskb(hw
, skb
);
830 static void ath9k_stop(struct ieee80211_hw
*hw
)
832 struct ath_softc
*sc
= hw
->priv
;
833 struct ath_hw
*ah
= sc
->sc_ah
;
834 struct ath_common
*common
= ath9k_hw_common(ah
);
837 ath9k_deinit_channel_context(sc
);
839 mutex_lock(&sc
->mutex
);
843 if (test_bit(ATH_OP_INVALID
, &common
->op_flags
)) {
844 ath_dbg(common
, ANY
, "Device not present\n");
845 mutex_unlock(&sc
->mutex
);
849 /* Ensure HW is awake when we try to shut it down. */
852 spin_lock_bh(&sc
->sc_pcu_lock
);
854 /* prevent tasklets to enable interrupts once we disable them */
855 ah
->imask
&= ~ATH9K_INT_GLOBAL
;
857 /* make sure h/w will not generate any interrupt
858 * before setting the invalid flag. */
859 ath9k_hw_disable_interrupts(ah
);
861 spin_unlock_bh(&sc
->sc_pcu_lock
);
863 /* we can now sync irq and kill any running tasklets, since we already
864 * disabled interrupts and not holding a spin lock */
865 synchronize_irq(sc
->irq
);
866 tasklet_kill(&sc
->intr_tq
);
867 tasklet_kill(&sc
->bcon_tasklet
);
869 prev_idle
= sc
->ps_idle
;
872 spin_lock_bh(&sc
->sc_pcu_lock
);
874 if (ah
->led_pin
>= 0) {
875 ath9k_hw_set_gpio(ah
, ah
->led_pin
,
876 (ah
->config
.led_active_high
) ? 0 : 1);
877 ath9k_hw_cfg_gpio_input(ah
, ah
->led_pin
);
880 ath_prepare_reset(sc
);
883 dev_kfree_skb_any(sc
->rx
.frag
);
888 ah
->curchan
= ath9k_cmn_get_channel(hw
, ah
,
889 &sc
->cur_chan
->chandef
);
891 ath9k_hw_reset(ah
, ah
->curchan
, ah
->caldata
, false);
893 set_bit(ATH_OP_INVALID
, &common
->op_flags
);
895 ath9k_hw_phy_disable(ah
);
897 ath9k_hw_configpcipowersave(ah
, true);
899 spin_unlock_bh(&sc
->sc_pcu_lock
);
901 ath9k_ps_restore(sc
);
903 sc
->ps_idle
= prev_idle
;
905 mutex_unlock(&sc
->mutex
);
907 ath_dbg(common
, CONFIG
, "Driver halt\n");
910 static bool ath9k_uses_beacons(int type
)
913 case NL80211_IFTYPE_AP
:
914 case NL80211_IFTYPE_ADHOC
:
915 case NL80211_IFTYPE_MESH_POINT
:
922 static void ath9k_vif_iter(struct ath9k_vif_iter_data
*iter_data
,
923 u8
*mac
, struct ieee80211_vif
*vif
)
925 struct ath_vif
*avp
= (struct ath_vif
*)vif
->drv_priv
;
928 if (iter_data
->has_hw_macaddr
) {
929 for (i
= 0; i
< ETH_ALEN
; i
++)
930 iter_data
->mask
[i
] &=
931 ~(iter_data
->hw_macaddr
[i
] ^ mac
[i
]);
933 memcpy(iter_data
->hw_macaddr
, mac
, ETH_ALEN
);
934 iter_data
->has_hw_macaddr
= true;
937 if (!vif
->bss_conf
.use_short_slot
)
938 iter_data
->slottime
= ATH9K_SLOT_TIME_20
;
941 case NL80211_IFTYPE_AP
:
944 case NL80211_IFTYPE_STATION
:
945 iter_data
->nstations
++;
946 if (avp
->assoc
&& !iter_data
->primary_sta
)
947 iter_data
->primary_sta
= vif
;
949 case NL80211_IFTYPE_ADHOC
:
950 iter_data
->nadhocs
++;
951 if (vif
->bss_conf
.enable_beacon
)
952 iter_data
->beacons
= true;
954 case NL80211_IFTYPE_MESH_POINT
:
955 iter_data
->nmeshes
++;
956 if (vif
->bss_conf
.enable_beacon
)
957 iter_data
->beacons
= true;
959 case NL80211_IFTYPE_WDS
:
967 static void ath9k_update_bssid_mask(struct ath_softc
*sc
,
968 struct ath_chanctx
*ctx
,
969 struct ath9k_vif_iter_data
*iter_data
)
971 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
975 if (!ath9k_is_chanctx_enabled())
978 list_for_each_entry(avp
, &ctx
->vifs
, list
) {
979 if (ctx
->nvifs_assigned
!= 1)
982 if (!avp
->vif
->p2p
|| !iter_data
->has_hw_macaddr
)
985 ether_addr_copy(common
->curbssid
, avp
->bssid
);
987 /* perm_addr will be used as the p2p device address. */
988 for (i
= 0; i
< ETH_ALEN
; i
++)
989 iter_data
->mask
[i
] &=
990 ~(iter_data
->hw_macaddr
[i
] ^
991 sc
->hw
->wiphy
->perm_addr
[i
]);
995 /* Called with sc->mutex held. */
996 void ath9k_calculate_iter_data(struct ath_softc
*sc
,
997 struct ath_chanctx
*ctx
,
998 struct ath9k_vif_iter_data
*iter_data
)
1000 struct ath_vif
*avp
;
1003 * The hardware will use primary station addr together with the
1004 * BSSID mask when matching addresses.
1006 memset(iter_data
, 0, sizeof(*iter_data
));
1007 memset(&iter_data
->mask
, 0xff, ETH_ALEN
);
1008 iter_data
->slottime
= ATH9K_SLOT_TIME_9
;
1010 list_for_each_entry(avp
, &ctx
->vifs
, list
)
1011 ath9k_vif_iter(iter_data
, avp
->vif
->addr
, avp
->vif
);
1013 ath9k_update_bssid_mask(sc
, ctx
, iter_data
);
1016 static void ath9k_set_assoc_state(struct ath_softc
*sc
,
1017 struct ieee80211_vif
*vif
, bool changed
)
1019 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1020 struct ath_vif
*avp
= (struct ath_vif
*)vif
->drv_priv
;
1021 unsigned long flags
;
1023 set_bit(ATH_OP_PRIM_STA_VIF
, &common
->op_flags
);
1025 ether_addr_copy(common
->curbssid
, avp
->bssid
);
1026 common
->curaid
= avp
->aid
;
1027 ath9k_hw_write_associd(sc
->sc_ah
);
1030 common
->last_rssi
= ATH_RSSI_DUMMY_MARKER
;
1031 sc
->sc_ah
->stats
.avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
1033 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1034 sc
->ps_flags
|= PS_BEACON_SYNC
| PS_WAIT_FOR_BEACON
;
1035 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1038 if (ath9k_hw_mci_is_enabled(sc
->sc_ah
))
1039 ath9k_mci_update_wlan_channels(sc
, false);
1041 ath_dbg(common
, CONFIG
,
1042 "Primary Station interface: %pM, BSSID: %pM\n",
1043 vif
->addr
, common
->curbssid
);
1046 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1047 static void ath9k_set_offchannel_state(struct ath_softc
*sc
)
1049 struct ath_hw
*ah
= sc
->sc_ah
;
1050 struct ath_common
*common
= ath9k_hw_common(ah
);
1051 struct ieee80211_vif
*vif
= NULL
;
1053 ath9k_ps_wakeup(sc
);
1055 if (sc
->offchannel
.state
< ATH_OFFCHANNEL_ROC_START
)
1056 vif
= sc
->offchannel
.scan_vif
;
1058 vif
= sc
->offchannel
.roc_vif
;
1063 eth_zero_addr(common
->curbssid
);
1064 eth_broadcast_addr(common
->bssidmask
);
1065 memcpy(common
->macaddr
, vif
->addr
, ETH_ALEN
);
1067 ah
->opmode
= vif
->type
;
1068 ah
->imask
&= ~ATH9K_INT_SWBA
;
1069 ah
->imask
&= ~ATH9K_INT_TSFOOR
;
1070 ah
->slottime
= ATH9K_SLOT_TIME_9
;
1072 ath_hw_setbssidmask(common
);
1073 ath9k_hw_setopmode(ah
);
1074 ath9k_hw_write_associd(sc
->sc_ah
);
1075 ath9k_hw_set_interrupts(ah
);
1076 ath9k_hw_init_global_settings(ah
);
1079 ath9k_ps_restore(sc
);
1083 /* Called with sc->mutex held. */
1084 void ath9k_calculate_summary_state(struct ath_softc
*sc
,
1085 struct ath_chanctx
*ctx
)
1087 struct ath_hw
*ah
= sc
->sc_ah
;
1088 struct ath_common
*common
= ath9k_hw_common(ah
);
1089 struct ath9k_vif_iter_data iter_data
;
1090 struct ath_beacon_config
*cur_conf
;
1092 ath_chanctx_check_active(sc
, ctx
);
1094 if (ctx
!= sc
->cur_chan
)
1097 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1098 if (ctx
== &sc
->offchannel
.chan
)
1099 return ath9k_set_offchannel_state(sc
);
1102 ath9k_ps_wakeup(sc
);
1103 ath9k_calculate_iter_data(sc
, ctx
, &iter_data
);
1105 if (iter_data
.has_hw_macaddr
)
1106 memcpy(common
->macaddr
, iter_data
.hw_macaddr
, ETH_ALEN
);
1108 memcpy(common
->bssidmask
, iter_data
.mask
, ETH_ALEN
);
1109 ath_hw_setbssidmask(common
);
1111 if (iter_data
.naps
> 0) {
1112 cur_conf
= &ctx
->beacon
;
1113 ath9k_hw_set_tsfadjust(ah
, true);
1114 ah
->opmode
= NL80211_IFTYPE_AP
;
1115 if (cur_conf
->enable_beacon
)
1116 iter_data
.beacons
= true;
1118 ath9k_hw_set_tsfadjust(ah
, false);
1120 if (iter_data
.nmeshes
)
1121 ah
->opmode
= NL80211_IFTYPE_MESH_POINT
;
1122 else if (iter_data
.nwds
)
1123 ah
->opmode
= NL80211_IFTYPE_AP
;
1124 else if (iter_data
.nadhocs
)
1125 ah
->opmode
= NL80211_IFTYPE_ADHOC
;
1127 ah
->opmode
= NL80211_IFTYPE_STATION
;
1130 ath9k_hw_setopmode(ah
);
1132 ctx
->switch_after_beacon
= false;
1133 if ((iter_data
.nstations
+ iter_data
.nadhocs
+ iter_data
.nmeshes
) > 0)
1134 ah
->imask
|= ATH9K_INT_TSFOOR
;
1136 ah
->imask
&= ~ATH9K_INT_TSFOOR
;
1137 if (iter_data
.naps
== 1 && iter_data
.beacons
)
1138 ctx
->switch_after_beacon
= true;
1141 ah
->imask
&= ~ATH9K_INT_SWBA
;
1142 if (ah
->opmode
== NL80211_IFTYPE_STATION
) {
1143 bool changed
= (iter_data
.primary_sta
!= ctx
->primary_sta
);
1145 if (iter_data
.primary_sta
) {
1146 iter_data
.beacons
= true;
1147 ath9k_set_assoc_state(sc
, iter_data
.primary_sta
,
1149 ctx
->primary_sta
= iter_data
.primary_sta
;
1151 ctx
->primary_sta
= NULL
;
1152 memset(common
->curbssid
, 0, ETH_ALEN
);
1154 ath9k_hw_write_associd(sc
->sc_ah
);
1155 if (ath9k_hw_mci_is_enabled(sc
->sc_ah
))
1156 ath9k_mci_update_wlan_channels(sc
, true);
1158 } else if (iter_data
.beacons
) {
1159 ah
->imask
|= ATH9K_INT_SWBA
;
1161 ath9k_hw_set_interrupts(ah
);
1163 if (iter_data
.beacons
)
1164 set_bit(ATH_OP_BEACONS
, &common
->op_flags
);
1166 clear_bit(ATH_OP_BEACONS
, &common
->op_flags
);
1168 if (ah
->slottime
!= iter_data
.slottime
) {
1169 ah
->slottime
= iter_data
.slottime
;
1170 ath9k_hw_init_global_settings(ah
);
1173 if (iter_data
.primary_sta
)
1174 set_bit(ATH_OP_PRIM_STA_VIF
, &common
->op_flags
);
1176 clear_bit(ATH_OP_PRIM_STA_VIF
, &common
->op_flags
);
1178 ath_dbg(common
, CONFIG
,
1179 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1180 common
->macaddr
, common
->curbssid
, common
->bssidmask
);
1182 ath9k_ps_restore(sc
);
1185 static void ath9k_assign_hw_queues(struct ieee80211_hw
*hw
,
1186 struct ieee80211_vif
*vif
)
1190 if (!ath9k_is_chanctx_enabled())
1193 for (i
= 0; i
< IEEE80211_NUM_ACS
; i
++)
1194 vif
->hw_queue
[i
] = i
;
1196 if (vif
->type
== NL80211_IFTYPE_AP
||
1197 vif
->type
== NL80211_IFTYPE_MESH_POINT
)
1198 vif
->cab_queue
= hw
->queues
- 2;
1200 vif
->cab_queue
= IEEE80211_INVAL_HW_QUEUE
;
1203 static int ath9k_add_interface(struct ieee80211_hw
*hw
,
1204 struct ieee80211_vif
*vif
)
1206 struct ath_softc
*sc
= hw
->priv
;
1207 struct ath_hw
*ah
= sc
->sc_ah
;
1208 struct ath_common
*common
= ath9k_hw_common(ah
);
1209 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1210 struct ath_node
*an
= &avp
->mcast_node
;
1212 mutex_lock(&sc
->mutex
);
1214 if (config_enabled(CONFIG_ATH9K_TX99
)) {
1215 if (sc
->cur_chan
->nvifs
>= 1) {
1216 mutex_unlock(&sc
->mutex
);
1222 ath_dbg(common
, CONFIG
, "Attach a VIF of type: %d\n", vif
->type
);
1223 sc
->cur_chan
->nvifs
++;
1225 if (ath9k_uses_beacons(vif
->type
))
1226 ath9k_beacon_assign_slot(sc
, vif
);
1229 if (!ath9k_is_chanctx_enabled()) {
1230 avp
->chanctx
= sc
->cur_chan
;
1231 list_add_tail(&avp
->list
, &avp
->chanctx
->vifs
);
1234 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1236 ath9k_assign_hw_queues(hw
, vif
);
1241 an
->no_ps_filter
= true;
1242 ath_tx_node_init(sc
, an
);
1244 mutex_unlock(&sc
->mutex
);
1248 static int ath9k_change_interface(struct ieee80211_hw
*hw
,
1249 struct ieee80211_vif
*vif
,
1250 enum nl80211_iftype new_type
,
1253 struct ath_softc
*sc
= hw
->priv
;
1254 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1255 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1257 mutex_lock(&sc
->mutex
);
1259 if (config_enabled(CONFIG_ATH9K_TX99
)) {
1260 mutex_unlock(&sc
->mutex
);
1264 ath_dbg(common
, CONFIG
, "Change Interface\n");
1266 if (ath9k_uses_beacons(vif
->type
))
1267 ath9k_beacon_remove_slot(sc
, vif
);
1269 vif
->type
= new_type
;
1272 if (ath9k_uses_beacons(vif
->type
))
1273 ath9k_beacon_assign_slot(sc
, vif
);
1275 ath9k_assign_hw_queues(hw
, vif
);
1276 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1278 mutex_unlock(&sc
->mutex
);
1282 static void ath9k_remove_interface(struct ieee80211_hw
*hw
,
1283 struct ieee80211_vif
*vif
)
1285 struct ath_softc
*sc
= hw
->priv
;
1286 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1287 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1289 ath_dbg(common
, CONFIG
, "Detach Interface\n");
1291 mutex_lock(&sc
->mutex
);
1293 ath9k_p2p_remove_vif(sc
, vif
);
1295 sc
->cur_chan
->nvifs
--;
1296 sc
->tx99_vif
= NULL
;
1297 if (!ath9k_is_chanctx_enabled())
1298 list_del(&avp
->list
);
1300 if (ath9k_uses_beacons(vif
->type
))
1301 ath9k_beacon_remove_slot(sc
, vif
);
1303 ath_tx_node_cleanup(sc
, &avp
->mcast_node
);
1305 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1307 mutex_unlock(&sc
->mutex
);
1310 static void ath9k_enable_ps(struct ath_softc
*sc
)
1312 struct ath_hw
*ah
= sc
->sc_ah
;
1313 struct ath_common
*common
= ath9k_hw_common(ah
);
1315 if (config_enabled(CONFIG_ATH9K_TX99
))
1318 sc
->ps_enabled
= true;
1319 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1320 if ((ah
->imask
& ATH9K_INT_TIM_TIMER
) == 0) {
1321 ah
->imask
|= ATH9K_INT_TIM_TIMER
;
1322 ath9k_hw_set_interrupts(ah
);
1324 ath9k_hw_setrxabort(ah
, 1);
1326 ath_dbg(common
, PS
, "PowerSave enabled\n");
1329 static void ath9k_disable_ps(struct ath_softc
*sc
)
1331 struct ath_hw
*ah
= sc
->sc_ah
;
1332 struct ath_common
*common
= ath9k_hw_common(ah
);
1334 if (config_enabled(CONFIG_ATH9K_TX99
))
1337 sc
->ps_enabled
= false;
1338 ath9k_hw_setpower(ah
, ATH9K_PM_AWAKE
);
1339 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1340 ath9k_hw_setrxabort(ah
, 0);
1341 sc
->ps_flags
&= ~(PS_WAIT_FOR_BEACON
|
1343 PS_WAIT_FOR_PSPOLL_DATA
|
1344 PS_WAIT_FOR_TX_ACK
);
1345 if (ah
->imask
& ATH9K_INT_TIM_TIMER
) {
1346 ah
->imask
&= ~ATH9K_INT_TIM_TIMER
;
1347 ath9k_hw_set_interrupts(ah
);
1350 ath_dbg(common
, PS
, "PowerSave disabled\n");
1353 static int ath9k_config(struct ieee80211_hw
*hw
, u32 changed
)
1355 struct ath_softc
*sc
= hw
->priv
;
1356 struct ath_hw
*ah
= sc
->sc_ah
;
1357 struct ath_common
*common
= ath9k_hw_common(ah
);
1358 struct ieee80211_conf
*conf
= &hw
->conf
;
1359 struct ath_chanctx
*ctx
= sc
->cur_chan
;
1361 ath9k_ps_wakeup(sc
);
1362 mutex_lock(&sc
->mutex
);
1364 if (changed
& IEEE80211_CONF_CHANGE_IDLE
) {
1365 sc
->ps_idle
= !!(conf
->flags
& IEEE80211_CONF_IDLE
);
1367 ath_cancel_work(sc
);
1368 ath9k_stop_btcoex(sc
);
1370 ath9k_start_btcoex(sc
);
1372 * The chip needs a reset to properly wake up from
1375 ath_chanctx_set_channel(sc
, ctx
, &ctx
->chandef
);
1380 * We just prepare to enable PS. We have to wait until our AP has
1381 * ACK'd our null data frame to disable RX otherwise we'll ignore
1382 * those ACKs and end up retransmitting the same null data frames.
1383 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1385 if (changed
& IEEE80211_CONF_CHANGE_PS
) {
1386 unsigned long flags
;
1387 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1388 if (conf
->flags
& IEEE80211_CONF_PS
)
1389 ath9k_enable_ps(sc
);
1391 ath9k_disable_ps(sc
);
1392 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1395 if (changed
& IEEE80211_CONF_CHANGE_MONITOR
) {
1396 if (conf
->flags
& IEEE80211_CONF_MONITOR
) {
1397 ath_dbg(common
, CONFIG
, "Monitor mode is enabled\n");
1398 sc
->sc_ah
->is_monitoring
= true;
1400 ath_dbg(common
, CONFIG
, "Monitor mode is disabled\n");
1401 sc
->sc_ah
->is_monitoring
= false;
1405 if (!ath9k_is_chanctx_enabled() && (changed
& IEEE80211_CONF_CHANGE_CHANNEL
)) {
1406 ctx
->offchannel
= !!(conf
->flags
& IEEE80211_CONF_OFFCHANNEL
);
1407 ath_chanctx_set_channel(sc
, ctx
, &hw
->conf
.chandef
);
1410 if (changed
& IEEE80211_CONF_CHANGE_POWER
) {
1411 ath_dbg(common
, CONFIG
, "Set power: %d\n", conf
->power_level
);
1412 sc
->cur_chan
->txpower
= 2 * conf
->power_level
;
1413 ath9k_cmn_update_txpow(ah
, sc
->cur_chan
->cur_txpower
,
1414 sc
->cur_chan
->txpower
,
1415 &sc
->cur_chan
->cur_txpower
);
1418 mutex_unlock(&sc
->mutex
);
1419 ath9k_ps_restore(sc
);
1424 #define SUPPORTED_FILTERS \
1425 (FIF_PROMISC_IN_BSS | \
1430 FIF_BCN_PRBRESP_PROMISC | \
1434 /* FIXME: sc->sc_full_reset ? */
1435 static void ath9k_configure_filter(struct ieee80211_hw
*hw
,
1436 unsigned int changed_flags
,
1437 unsigned int *total_flags
,
1440 struct ath_softc
*sc
= hw
->priv
;
1443 changed_flags
&= SUPPORTED_FILTERS
;
1444 *total_flags
&= SUPPORTED_FILTERS
;
1446 spin_lock_bh(&sc
->chan_lock
);
1447 sc
->cur_chan
->rxfilter
= *total_flags
;
1448 spin_unlock_bh(&sc
->chan_lock
);
1450 ath9k_ps_wakeup(sc
);
1451 rfilt
= ath_calcrxfilter(sc
);
1452 ath9k_hw_setrxfilter(sc
->sc_ah
, rfilt
);
1453 ath9k_ps_restore(sc
);
1455 ath_dbg(ath9k_hw_common(sc
->sc_ah
), CONFIG
, "Set HW RX filter: 0x%x\n",
1459 static int ath9k_sta_add(struct ieee80211_hw
*hw
,
1460 struct ieee80211_vif
*vif
,
1461 struct ieee80211_sta
*sta
)
1463 struct ath_softc
*sc
= hw
->priv
;
1464 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1465 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1466 struct ieee80211_key_conf ps_key
= { };
1469 ath_node_attach(sc
, sta
, vif
);
1471 if (vif
->type
!= NL80211_IFTYPE_AP
&&
1472 vif
->type
!= NL80211_IFTYPE_AP_VLAN
)
1475 key
= ath_key_config(common
, vif
, sta
, &ps_key
);
1478 an
->key_idx
[0] = key
;
1484 static void ath9k_del_ps_key(struct ath_softc
*sc
,
1485 struct ieee80211_vif
*vif
,
1486 struct ieee80211_sta
*sta
)
1488 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1489 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1490 struct ieee80211_key_conf ps_key
= { .hw_key_idx
= an
->ps_key
};
1495 ath_key_delete(common
, &ps_key
);
1500 static int ath9k_sta_remove(struct ieee80211_hw
*hw
,
1501 struct ieee80211_vif
*vif
,
1502 struct ieee80211_sta
*sta
)
1504 struct ath_softc
*sc
= hw
->priv
;
1506 ath9k_del_ps_key(sc
, vif
, sta
);
1507 ath_node_detach(sc
, sta
);
1512 static int ath9k_sta_state(struct ieee80211_hw
*hw
,
1513 struct ieee80211_vif
*vif
,
1514 struct ieee80211_sta
*sta
,
1515 enum ieee80211_sta_state old_state
,
1516 enum ieee80211_sta_state new_state
)
1518 struct ath_softc
*sc
= hw
->priv
;
1519 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1522 if (old_state
== IEEE80211_STA_AUTH
&&
1523 new_state
== IEEE80211_STA_ASSOC
) {
1524 ret
= ath9k_sta_add(hw
, vif
, sta
);
1525 ath_dbg(common
, CONFIG
,
1526 "Add station: %pM\n", sta
->addr
);
1527 } else if (old_state
== IEEE80211_STA_ASSOC
&&
1528 new_state
== IEEE80211_STA_AUTH
) {
1529 ret
= ath9k_sta_remove(hw
, vif
, sta
);
1530 ath_dbg(common
, CONFIG
,
1531 "Remove station: %pM\n", sta
->addr
);
1534 if (ath9k_is_chanctx_enabled()) {
1535 if (vif
->type
== NL80211_IFTYPE_STATION
) {
1536 if (old_state
== IEEE80211_STA_ASSOC
&&
1537 new_state
== IEEE80211_STA_AUTHORIZED
)
1538 ath_chanctx_event(sc
, vif
,
1539 ATH_CHANCTX_EVENT_AUTHORIZED
);
1546 static void ath9k_sta_set_tx_filter(struct ath_hw
*ah
,
1547 struct ath_node
*an
,
1552 for (i
= 0; i
< ARRAY_SIZE(an
->key_idx
); i
++) {
1553 if (!an
->key_idx
[i
])
1555 ath9k_hw_set_tx_filter(ah
, an
->key_idx
[i
], set
);
1559 static void ath9k_sta_notify(struct ieee80211_hw
*hw
,
1560 struct ieee80211_vif
*vif
,
1561 enum sta_notify_cmd cmd
,
1562 struct ieee80211_sta
*sta
)
1564 struct ath_softc
*sc
= hw
->priv
;
1565 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1568 case STA_NOTIFY_SLEEP
:
1569 an
->sleeping
= true;
1570 ath_tx_aggr_sleep(sta
, sc
, an
);
1571 ath9k_sta_set_tx_filter(sc
->sc_ah
, an
, true);
1573 case STA_NOTIFY_AWAKE
:
1574 ath9k_sta_set_tx_filter(sc
->sc_ah
, an
, false);
1575 an
->sleeping
= false;
1576 ath_tx_aggr_wakeup(sc
, an
);
1581 static int ath9k_conf_tx(struct ieee80211_hw
*hw
,
1582 struct ieee80211_vif
*vif
, u16 queue
,
1583 const struct ieee80211_tx_queue_params
*params
)
1585 struct ath_softc
*sc
= hw
->priv
;
1586 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1587 struct ath_txq
*txq
;
1588 struct ath9k_tx_queue_info qi
;
1591 if (queue
>= IEEE80211_NUM_ACS
)
1594 txq
= sc
->tx
.txq_map
[queue
];
1596 ath9k_ps_wakeup(sc
);
1597 mutex_lock(&sc
->mutex
);
1599 memset(&qi
, 0, sizeof(struct ath9k_tx_queue_info
));
1601 qi
.tqi_aifs
= params
->aifs
;
1602 qi
.tqi_cwmin
= params
->cw_min
;
1603 qi
.tqi_cwmax
= params
->cw_max
;
1604 qi
.tqi_burstTime
= params
->txop
* 32;
1606 ath_dbg(common
, CONFIG
,
1607 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1608 queue
, txq
->axq_qnum
, params
->aifs
, params
->cw_min
,
1609 params
->cw_max
, params
->txop
);
1611 ath_update_max_aggr_framelen(sc
, queue
, qi
.tqi_burstTime
);
1612 ret
= ath_txq_update(sc
, txq
->axq_qnum
, &qi
);
1614 ath_err(common
, "TXQ Update failed\n");
1616 mutex_unlock(&sc
->mutex
);
1617 ath9k_ps_restore(sc
);
1622 static int ath9k_set_key(struct ieee80211_hw
*hw
,
1623 enum set_key_cmd cmd
,
1624 struct ieee80211_vif
*vif
,
1625 struct ieee80211_sta
*sta
,
1626 struct ieee80211_key_conf
*key
)
1628 struct ath_softc
*sc
= hw
->priv
;
1629 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1630 struct ath_node
*an
= NULL
;
1633 if (ath9k_modparam_nohwcrypt
)
1636 if ((vif
->type
== NL80211_IFTYPE_ADHOC
||
1637 vif
->type
== NL80211_IFTYPE_MESH_POINT
) &&
1638 (key
->cipher
== WLAN_CIPHER_SUITE_TKIP
||
1639 key
->cipher
== WLAN_CIPHER_SUITE_CCMP
) &&
1640 !(key
->flags
& IEEE80211_KEY_FLAG_PAIRWISE
)) {
1642 * For now, disable hw crypto for the RSN IBSS group keys. This
1643 * could be optimized in the future to use a modified key cache
1644 * design to support per-STA RX GTK, but until that gets
1645 * implemented, use of software crypto for group addressed
1646 * frames is a acceptable to allow RSN IBSS to be used.
1651 mutex_lock(&sc
->mutex
);
1652 ath9k_ps_wakeup(sc
);
1653 ath_dbg(common
, CONFIG
, "Set HW Key %d\n", cmd
);
1655 an
= (struct ath_node
*)sta
->drv_priv
;
1660 ath9k_del_ps_key(sc
, vif
, sta
);
1662 key
->hw_key_idx
= 0;
1663 ret
= ath_key_config(common
, vif
, sta
, key
);
1665 key
->hw_key_idx
= ret
;
1666 /* push IV and Michael MIC generation to stack */
1667 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
1668 if (key
->cipher
== WLAN_CIPHER_SUITE_TKIP
)
1669 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_MMIC
;
1670 if (sc
->sc_ah
->sw_mgmt_crypto_tx
&&
1671 key
->cipher
== WLAN_CIPHER_SUITE_CCMP
)
1672 key
->flags
|= IEEE80211_KEY_FLAG_SW_MGMT_TX
;
1675 if (an
&& key
->hw_key_idx
) {
1676 for (i
= 0; i
< ARRAY_SIZE(an
->key_idx
); i
++) {
1679 an
->key_idx
[i
] = key
->hw_key_idx
;
1682 WARN_ON(i
== ARRAY_SIZE(an
->key_idx
));
1686 ath_key_delete(common
, key
);
1688 for (i
= 0; i
< ARRAY_SIZE(an
->key_idx
); i
++) {
1689 if (an
->key_idx
[i
] != key
->hw_key_idx
)
1695 key
->hw_key_idx
= 0;
1701 ath9k_ps_restore(sc
);
1702 mutex_unlock(&sc
->mutex
);
1707 static void ath9k_bss_info_changed(struct ieee80211_hw
*hw
,
1708 struct ieee80211_vif
*vif
,
1709 struct ieee80211_bss_conf
*bss_conf
,
1713 (BSS_CHANGED_ASSOC | \
1714 BSS_CHANGED_IBSS | \
1715 BSS_CHANGED_BEACON_ENABLED)
1717 struct ath_softc
*sc
= hw
->priv
;
1718 struct ath_hw
*ah
= sc
->sc_ah
;
1719 struct ath_common
*common
= ath9k_hw_common(ah
);
1720 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1723 ath9k_ps_wakeup(sc
);
1724 mutex_lock(&sc
->mutex
);
1726 if (changed
& BSS_CHANGED_ASSOC
) {
1727 ath_dbg(common
, CONFIG
, "BSSID %pM Changed ASSOC %d\n",
1728 bss_conf
->bssid
, bss_conf
->assoc
);
1730 memcpy(avp
->bssid
, bss_conf
->bssid
, ETH_ALEN
);
1731 avp
->aid
= bss_conf
->aid
;
1732 avp
->assoc
= bss_conf
->assoc
;
1734 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1737 if (changed
& BSS_CHANGED_IBSS
) {
1738 memcpy(common
->curbssid
, bss_conf
->bssid
, ETH_ALEN
);
1739 common
->curaid
= bss_conf
->aid
;
1740 ath9k_hw_write_associd(sc
->sc_ah
);
1743 if ((changed
& BSS_CHANGED_BEACON_ENABLED
) ||
1744 (changed
& BSS_CHANGED_BEACON_INT
) ||
1745 (changed
& BSS_CHANGED_BEACON_INFO
)) {
1746 ath9k_beacon_config(sc
, vif
, changed
);
1747 if (changed
& BSS_CHANGED_BEACON_ENABLED
)
1748 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1751 if ((avp
->chanctx
== sc
->cur_chan
) &&
1752 (changed
& BSS_CHANGED_ERP_SLOT
)) {
1753 if (bss_conf
->use_short_slot
)
1757 if (vif
->type
== NL80211_IFTYPE_AP
) {
1759 * Defer update, so that connected stations can adjust
1760 * their settings at the same time.
1761 * See beacon.c for more details
1763 sc
->beacon
.slottime
= slottime
;
1764 sc
->beacon
.updateslot
= UPDATE
;
1766 ah
->slottime
= slottime
;
1767 ath9k_hw_init_global_settings(ah
);
1771 if (changed
& BSS_CHANGED_P2P_PS
)
1772 ath9k_p2p_bss_info_changed(sc
, vif
);
1774 if (changed
& CHECK_ANI
)
1777 mutex_unlock(&sc
->mutex
);
1778 ath9k_ps_restore(sc
);
1783 static u64
ath9k_get_tsf(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
)
1785 struct ath_softc
*sc
= hw
->priv
;
1788 mutex_lock(&sc
->mutex
);
1789 ath9k_ps_wakeup(sc
);
1790 tsf
= ath9k_hw_gettsf64(sc
->sc_ah
);
1791 ath9k_ps_restore(sc
);
1792 mutex_unlock(&sc
->mutex
);
1797 static void ath9k_set_tsf(struct ieee80211_hw
*hw
,
1798 struct ieee80211_vif
*vif
,
1801 struct ath_softc
*sc
= hw
->priv
;
1803 mutex_lock(&sc
->mutex
);
1804 ath9k_ps_wakeup(sc
);
1805 ath9k_hw_settsf64(sc
->sc_ah
, tsf
);
1806 ath9k_ps_restore(sc
);
1807 mutex_unlock(&sc
->mutex
);
1810 static void ath9k_reset_tsf(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
)
1812 struct ath_softc
*sc
= hw
->priv
;
1814 mutex_lock(&sc
->mutex
);
1816 ath9k_ps_wakeup(sc
);
1817 ath9k_hw_reset_tsf(sc
->sc_ah
);
1818 ath9k_ps_restore(sc
);
1820 mutex_unlock(&sc
->mutex
);
1823 static int ath9k_ampdu_action(struct ieee80211_hw
*hw
,
1824 struct ieee80211_vif
*vif
,
1825 enum ieee80211_ampdu_mlme_action action
,
1826 struct ieee80211_sta
*sta
,
1827 u16 tid
, u16
*ssn
, u8 buf_size
)
1829 struct ath_softc
*sc
= hw
->priv
;
1830 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1834 mutex_lock(&sc
->mutex
);
1837 case IEEE80211_AMPDU_RX_START
:
1839 case IEEE80211_AMPDU_RX_STOP
:
1841 case IEEE80211_AMPDU_TX_START
:
1842 if (ath9k_is_chanctx_enabled()) {
1843 if (test_bit(ATH_OP_SCANNING
, &common
->op_flags
)) {
1848 ath9k_ps_wakeup(sc
);
1849 ret
= ath_tx_aggr_start(sc
, sta
, tid
, ssn
);
1851 ieee80211_start_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
1852 ath9k_ps_restore(sc
);
1854 case IEEE80211_AMPDU_TX_STOP_FLUSH
:
1855 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT
:
1857 case IEEE80211_AMPDU_TX_STOP_CONT
:
1858 ath9k_ps_wakeup(sc
);
1859 ath_tx_aggr_stop(sc
, sta
, tid
);
1861 ieee80211_stop_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
1862 ath9k_ps_restore(sc
);
1864 case IEEE80211_AMPDU_TX_OPERATIONAL
:
1865 ath9k_ps_wakeup(sc
);
1866 ath_tx_aggr_resume(sc
, sta
, tid
);
1867 ath9k_ps_restore(sc
);
1870 ath_err(ath9k_hw_common(sc
->sc_ah
), "Unknown AMPDU action\n");
1873 mutex_unlock(&sc
->mutex
);
1878 static int ath9k_get_survey(struct ieee80211_hw
*hw
, int idx
,
1879 struct survey_info
*survey
)
1881 struct ath_softc
*sc
= hw
->priv
;
1882 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1883 struct ieee80211_supported_band
*sband
;
1884 struct ieee80211_channel
*chan
;
1887 if (config_enabled(CONFIG_ATH9K_TX99
))
1890 spin_lock_bh(&common
->cc_lock
);
1892 ath_update_survey_stats(sc
);
1894 sband
= hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
];
1895 if (sband
&& idx
>= sband
->n_channels
) {
1896 idx
-= sband
->n_channels
;
1901 sband
= hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
];
1903 if (!sband
|| idx
>= sband
->n_channels
) {
1904 spin_unlock_bh(&common
->cc_lock
);
1908 chan
= &sband
->channels
[idx
];
1909 pos
= chan
->hw_value
;
1910 memcpy(survey
, &sc
->survey
[pos
], sizeof(*survey
));
1911 survey
->channel
= chan
;
1912 spin_unlock_bh(&common
->cc_lock
);
1917 static void ath9k_enable_dynack(struct ath_softc
*sc
)
1919 #ifdef CONFIG_ATH9K_DYNACK
1921 struct ath_hw
*ah
= sc
->sc_ah
;
1923 ath_dynack_reset(ah
);
1925 ah
->dynack
.enabled
= true;
1926 rfilt
= ath_calcrxfilter(sc
);
1927 ath9k_hw_setrxfilter(ah
, rfilt
);
1931 static void ath9k_set_coverage_class(struct ieee80211_hw
*hw
,
1934 struct ath_softc
*sc
= hw
->priv
;
1935 struct ath_hw
*ah
= sc
->sc_ah
;
1937 if (config_enabled(CONFIG_ATH9K_TX99
))
1940 mutex_lock(&sc
->mutex
);
1942 if (coverage_class
>= 0) {
1943 ah
->coverage_class
= coverage_class
;
1944 if (ah
->dynack
.enabled
) {
1947 ah
->dynack
.enabled
= false;
1948 rfilt
= ath_calcrxfilter(sc
);
1949 ath9k_hw_setrxfilter(ah
, rfilt
);
1951 ath9k_ps_wakeup(sc
);
1952 ath9k_hw_init_global_settings(ah
);
1953 ath9k_ps_restore(sc
);
1954 } else if (!ah
->dynack
.enabled
) {
1955 ath9k_enable_dynack(sc
);
1958 mutex_unlock(&sc
->mutex
);
1961 static bool ath9k_has_tx_pending(struct ath_softc
*sc
,
1966 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
1967 if (!ATH_TXQ_SETUP(sc
, i
))
1970 npend
= ath9k_has_pending_frames(sc
, &sc
->tx
.txq
[i
],
1979 static void ath9k_flush(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
1980 u32 queues
, bool drop
)
1982 struct ath_softc
*sc
= hw
->priv
;
1983 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1985 if (ath9k_is_chanctx_enabled()) {
1986 if (!test_bit(ATH_OP_MULTI_CHANNEL
, &common
->op_flags
))
1990 * If MCC is active, extend the flush timeout
1991 * and wait for the HW/SW queues to become
1992 * empty. This needs to be done outside the
1993 * sc->mutex lock to allow the channel scheduler
1994 * to switch channel contexts.
1996 * The vif queues have been stopped in mac80211,
1997 * so there won't be any incoming frames.
1999 __ath9k_flush(hw
, queues
, drop
, true, true);
2003 mutex_lock(&sc
->mutex
);
2004 __ath9k_flush(hw
, queues
, drop
, true, false);
2005 mutex_unlock(&sc
->mutex
);
2008 void __ath9k_flush(struct ieee80211_hw
*hw
, u32 queues
, bool drop
,
2009 bool sw_pending
, bool timeout_override
)
2011 struct ath_softc
*sc
= hw
->priv
;
2012 struct ath_hw
*ah
= sc
->sc_ah
;
2013 struct ath_common
*common
= ath9k_hw_common(ah
);
2017 cancel_delayed_work_sync(&sc
->tx_complete_work
);
2019 if (ah
->ah_flags
& AH_UNPLUGGED
) {
2020 ath_dbg(common
, ANY
, "Device has been unplugged!\n");
2024 if (test_bit(ATH_OP_INVALID
, &common
->op_flags
)) {
2025 ath_dbg(common
, ANY
, "Device not present\n");
2029 spin_lock_bh(&sc
->chan_lock
);
2030 if (timeout_override
)
2033 timeout
= sc
->cur_chan
->flush_timeout
;
2034 spin_unlock_bh(&sc
->chan_lock
);
2036 ath_dbg(common
, CHAN_CTX
,
2037 "Flush timeout: %d\n", jiffies_to_msecs(timeout
));
2039 if (wait_event_timeout(sc
->tx_wait
, !ath9k_has_tx_pending(sc
, sw_pending
),
2044 ath9k_ps_wakeup(sc
);
2045 spin_lock_bh(&sc
->sc_pcu_lock
);
2046 drain_txq
= ath_drain_all_txq(sc
);
2047 spin_unlock_bh(&sc
->sc_pcu_lock
);
2050 ath_reset(sc
, NULL
);
2052 ath9k_ps_restore(sc
);
2055 ieee80211_queue_delayed_work(hw
, &sc
->tx_complete_work
, 0);
2058 static bool ath9k_tx_frames_pending(struct ieee80211_hw
*hw
)
2060 struct ath_softc
*sc
= hw
->priv
;
2062 return ath9k_has_tx_pending(sc
, true);
2065 static int ath9k_tx_last_beacon(struct ieee80211_hw
*hw
)
2067 struct ath_softc
*sc
= hw
->priv
;
2068 struct ath_hw
*ah
= sc
->sc_ah
;
2069 struct ieee80211_vif
*vif
;
2070 struct ath_vif
*avp
;
2072 struct ath_tx_status ts
;
2073 bool edma
= !!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
);
2076 vif
= sc
->beacon
.bslot
[0];
2080 if (!vif
->bss_conf
.enable_beacon
)
2083 avp
= (void *)vif
->drv_priv
;
2085 if (!sc
->beacon
.tx_processed
&& !edma
) {
2086 tasklet_disable(&sc
->bcon_tasklet
);
2089 if (!bf
|| !bf
->bf_mpdu
)
2092 status
= ath9k_hw_txprocdesc(ah
, bf
->bf_desc
, &ts
);
2093 if (status
== -EINPROGRESS
)
2096 sc
->beacon
.tx_processed
= true;
2097 sc
->beacon
.tx_last
= !(ts
.ts_status
& ATH9K_TXERR_MASK
);
2100 tasklet_enable(&sc
->bcon_tasklet
);
2103 return sc
->beacon
.tx_last
;
2106 static int ath9k_get_stats(struct ieee80211_hw
*hw
,
2107 struct ieee80211_low_level_stats
*stats
)
2109 struct ath_softc
*sc
= hw
->priv
;
2110 struct ath_hw
*ah
= sc
->sc_ah
;
2111 struct ath9k_mib_stats
*mib_stats
= &ah
->ah_mibStats
;
2113 stats
->dot11ACKFailureCount
= mib_stats
->ackrcv_bad
;
2114 stats
->dot11RTSFailureCount
= mib_stats
->rts_bad
;
2115 stats
->dot11FCSErrorCount
= mib_stats
->fcs_bad
;
2116 stats
->dot11RTSSuccessCount
= mib_stats
->rts_good
;
2120 static u32
fill_chainmask(u32 cap
, u32
new)
2125 for (i
= 0; cap
&& new; i
++, cap
>>= 1) {
2126 if (!(cap
& BIT(0)))
2138 static bool validate_antenna_mask(struct ath_hw
*ah
, u32 val
)
2140 if (AR_SREV_9300_20_OR_LATER(ah
))
2143 switch (val
& 0x7) {
2149 return (ah
->caps
.rx_chainmask
== 1);
2155 static int ath9k_set_antenna(struct ieee80211_hw
*hw
, u32 tx_ant
, u32 rx_ant
)
2157 struct ath_softc
*sc
= hw
->priv
;
2158 struct ath_hw
*ah
= sc
->sc_ah
;
2160 if (ah
->caps
.rx_chainmask
!= 1)
2163 if (!validate_antenna_mask(ah
, rx_ant
) || !tx_ant
)
2166 sc
->ant_rx
= rx_ant
;
2167 sc
->ant_tx
= tx_ant
;
2169 if (ah
->caps
.rx_chainmask
== 1)
2172 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2173 if (AR_SREV_9100(ah
))
2174 ah
->rxchainmask
= 0x7;
2176 ah
->rxchainmask
= fill_chainmask(ah
->caps
.rx_chainmask
, rx_ant
);
2178 ah
->txchainmask
= fill_chainmask(ah
->caps
.tx_chainmask
, tx_ant
);
2179 ath9k_cmn_reload_chainmask(ah
);
2184 static int ath9k_get_antenna(struct ieee80211_hw
*hw
, u32
*tx_ant
, u32
*rx_ant
)
2186 struct ath_softc
*sc
= hw
->priv
;
2188 *tx_ant
= sc
->ant_tx
;
2189 *rx_ant
= sc
->ant_rx
;
2193 static void ath9k_sw_scan_start(struct ieee80211_hw
*hw
,
2194 struct ieee80211_vif
*vif
,
2197 struct ath_softc
*sc
= hw
->priv
;
2198 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2199 set_bit(ATH_OP_SCANNING
, &common
->op_flags
);
2202 static void ath9k_sw_scan_complete(struct ieee80211_hw
*hw
,
2203 struct ieee80211_vif
*vif
)
2205 struct ath_softc
*sc
= hw
->priv
;
2206 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2207 clear_bit(ATH_OP_SCANNING
, &common
->op_flags
);
2210 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2212 static void ath9k_cancel_pending_offchannel(struct ath_softc
*sc
)
2214 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2216 if (sc
->offchannel
.roc_vif
) {
2217 ath_dbg(common
, CHAN_CTX
,
2218 "%s: Aborting RoC\n", __func__
);
2220 del_timer_sync(&sc
->offchannel
.timer
);
2221 if (sc
->offchannel
.state
>= ATH_OFFCHANNEL_ROC_START
)
2222 ath_roc_complete(sc
, true);
2225 if (test_bit(ATH_OP_SCANNING
, &common
->op_flags
)) {
2226 ath_dbg(common
, CHAN_CTX
,
2227 "%s: Aborting HW scan\n", __func__
);
2229 del_timer_sync(&sc
->offchannel
.timer
);
2230 ath_scan_complete(sc
, true);
2234 static int ath9k_hw_scan(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
2235 struct ieee80211_scan_request
*hw_req
)
2237 struct cfg80211_scan_request
*req
= &hw_req
->req
;
2238 struct ath_softc
*sc
= hw
->priv
;
2239 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2242 mutex_lock(&sc
->mutex
);
2244 if (WARN_ON(sc
->offchannel
.scan_req
)) {
2249 ath9k_ps_wakeup(sc
);
2250 set_bit(ATH_OP_SCANNING
, &common
->op_flags
);
2251 sc
->offchannel
.scan_vif
= vif
;
2252 sc
->offchannel
.scan_req
= req
;
2253 sc
->offchannel
.scan_idx
= 0;
2255 ath_dbg(common
, CHAN_CTX
, "HW scan request received on vif: %pM\n",
2258 if (sc
->offchannel
.state
== ATH_OFFCHANNEL_IDLE
) {
2259 ath_dbg(common
, CHAN_CTX
, "Starting HW scan\n");
2260 ath_offchannel_next(sc
);
2264 mutex_unlock(&sc
->mutex
);
2269 static void ath9k_cancel_hw_scan(struct ieee80211_hw
*hw
,
2270 struct ieee80211_vif
*vif
)
2272 struct ath_softc
*sc
= hw
->priv
;
2273 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2275 ath_dbg(common
, CHAN_CTX
, "Cancel HW scan on vif: %pM\n", vif
->addr
);
2277 mutex_lock(&sc
->mutex
);
2278 del_timer_sync(&sc
->offchannel
.timer
);
2279 ath_scan_complete(sc
, true);
2280 mutex_unlock(&sc
->mutex
);
2283 static int ath9k_remain_on_channel(struct ieee80211_hw
*hw
,
2284 struct ieee80211_vif
*vif
,
2285 struct ieee80211_channel
*chan
, int duration
,
2286 enum ieee80211_roc_type type
)
2288 struct ath_softc
*sc
= hw
->priv
;
2289 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2292 mutex_lock(&sc
->mutex
);
2294 if (WARN_ON(sc
->offchannel
.roc_vif
)) {
2299 ath9k_ps_wakeup(sc
);
2300 sc
->offchannel
.roc_vif
= vif
;
2301 sc
->offchannel
.roc_chan
= chan
;
2302 sc
->offchannel
.roc_duration
= duration
;
2304 ath_dbg(common
, CHAN_CTX
,
2305 "RoC request on vif: %pM, type: %d duration: %d\n",
2306 vif
->addr
, type
, duration
);
2308 if (sc
->offchannel
.state
== ATH_OFFCHANNEL_IDLE
) {
2309 ath_dbg(common
, CHAN_CTX
, "Starting RoC period\n");
2310 ath_offchannel_next(sc
);
2314 mutex_unlock(&sc
->mutex
);
2319 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw
*hw
)
2321 struct ath_softc
*sc
= hw
->priv
;
2322 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2324 mutex_lock(&sc
->mutex
);
2326 ath_dbg(common
, CHAN_CTX
, "Cancel RoC\n");
2327 del_timer_sync(&sc
->offchannel
.timer
);
2329 if (sc
->offchannel
.roc_vif
) {
2330 if (sc
->offchannel
.state
>= ATH_OFFCHANNEL_ROC_START
)
2331 ath_roc_complete(sc
, true);
2334 mutex_unlock(&sc
->mutex
);
2339 static int ath9k_add_chanctx(struct ieee80211_hw
*hw
,
2340 struct ieee80211_chanctx_conf
*conf
)
2342 struct ath_softc
*sc
= hw
->priv
;
2343 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2344 struct ath_chanctx
*ctx
, **ptr
;
2347 mutex_lock(&sc
->mutex
);
2349 ath_for_each_chanctx(sc
, ctx
) {
2353 ptr
= (void *) conf
->drv_priv
;
2355 ctx
->assigned
= true;
2356 pos
= ctx
- &sc
->chanctx
[0];
2357 ctx
->hw_queue_base
= pos
* IEEE80211_NUM_ACS
;
2359 ath_dbg(common
, CHAN_CTX
,
2360 "Add channel context: %d MHz\n",
2361 conf
->def
.chan
->center_freq
);
2363 ath_chanctx_set_channel(sc
, ctx
, &conf
->def
);
2365 mutex_unlock(&sc
->mutex
);
2369 mutex_unlock(&sc
->mutex
);
2374 static void ath9k_remove_chanctx(struct ieee80211_hw
*hw
,
2375 struct ieee80211_chanctx_conf
*conf
)
2377 struct ath_softc
*sc
= hw
->priv
;
2378 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2379 struct ath_chanctx
*ctx
= ath_chanctx_get(conf
);
2381 mutex_lock(&sc
->mutex
);
2383 ath_dbg(common
, CHAN_CTX
,
2384 "Remove channel context: %d MHz\n",
2385 conf
->def
.chan
->center_freq
);
2387 ctx
->assigned
= false;
2388 ctx
->hw_queue_base
= 0;
2389 ath_chanctx_event(sc
, NULL
, ATH_CHANCTX_EVENT_UNASSIGN
);
2391 mutex_unlock(&sc
->mutex
);
2394 static void ath9k_change_chanctx(struct ieee80211_hw
*hw
,
2395 struct ieee80211_chanctx_conf
*conf
,
2398 struct ath_softc
*sc
= hw
->priv
;
2399 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2400 struct ath_chanctx
*ctx
= ath_chanctx_get(conf
);
2402 mutex_lock(&sc
->mutex
);
2403 ath_dbg(common
, CHAN_CTX
,
2404 "Change channel context: %d MHz\n",
2405 conf
->def
.chan
->center_freq
);
2406 ath_chanctx_set_channel(sc
, ctx
, &conf
->def
);
2407 mutex_unlock(&sc
->mutex
);
2410 static int ath9k_assign_vif_chanctx(struct ieee80211_hw
*hw
,
2411 struct ieee80211_vif
*vif
,
2412 struct ieee80211_chanctx_conf
*conf
)
2414 struct ath_softc
*sc
= hw
->priv
;
2415 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2416 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
2417 struct ath_chanctx
*ctx
= ath_chanctx_get(conf
);
2420 ath9k_cancel_pending_offchannel(sc
);
2422 mutex_lock(&sc
->mutex
);
2424 ath_dbg(common
, CHAN_CTX
,
2425 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2426 vif
->addr
, vif
->type
, vif
->p2p
,
2427 conf
->def
.chan
->center_freq
);
2430 ctx
->nvifs_assigned
++;
2431 list_add_tail(&avp
->list
, &ctx
->vifs
);
2432 ath9k_calculate_summary_state(sc
, ctx
);
2433 for (i
= 0; i
< IEEE80211_NUM_ACS
; i
++)
2434 vif
->hw_queue
[i
] = ctx
->hw_queue_base
+ i
;
2436 mutex_unlock(&sc
->mutex
);
2441 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw
*hw
,
2442 struct ieee80211_vif
*vif
,
2443 struct ieee80211_chanctx_conf
*conf
)
2445 struct ath_softc
*sc
= hw
->priv
;
2446 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2447 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
2448 struct ath_chanctx
*ctx
= ath_chanctx_get(conf
);
2451 ath9k_cancel_pending_offchannel(sc
);
2453 mutex_lock(&sc
->mutex
);
2455 ath_dbg(common
, CHAN_CTX
,
2456 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2457 vif
->addr
, vif
->type
, vif
->p2p
,
2458 conf
->def
.chan
->center_freq
);
2460 avp
->chanctx
= NULL
;
2461 ctx
->nvifs_assigned
--;
2462 list_del(&avp
->list
);
2463 ath9k_calculate_summary_state(sc
, ctx
);
2464 for (ac
= 0; ac
< IEEE80211_NUM_ACS
; ac
++)
2465 vif
->hw_queue
[ac
] = IEEE80211_INVAL_HW_QUEUE
;
2467 mutex_unlock(&sc
->mutex
);
2470 static void ath9k_mgd_prepare_tx(struct ieee80211_hw
*hw
,
2471 struct ieee80211_vif
*vif
)
2473 struct ath_softc
*sc
= hw
->priv
;
2474 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2475 struct ath_vif
*avp
= (struct ath_vif
*) vif
->drv_priv
;
2476 struct ath_beacon_config
*cur_conf
;
2477 struct ath_chanctx
*go_ctx
;
2478 unsigned long timeout
;
2479 bool changed
= false;
2482 if (!test_bit(ATH_OP_MULTI_CHANNEL
, &common
->op_flags
))
2488 mutex_lock(&sc
->mutex
);
2490 spin_lock_bh(&sc
->chan_lock
);
2491 if (sc
->next_chan
|| (sc
->cur_chan
!= avp
->chanctx
))
2493 spin_unlock_bh(&sc
->chan_lock
);
2498 ath9k_cancel_pending_offchannel(sc
);
2500 go_ctx
= ath_is_go_chanctx_present(sc
);
2504 * Wait till the GO interface gets a chance
2505 * to send out an NoA.
2507 spin_lock_bh(&sc
->chan_lock
);
2508 sc
->sched
.mgd_prepare_tx
= true;
2509 cur_conf
= &go_ctx
->beacon
;
2510 beacon_int
= TU_TO_USEC(cur_conf
->beacon_interval
);
2511 spin_unlock_bh(&sc
->chan_lock
);
2513 timeout
= usecs_to_jiffies(beacon_int
* 2);
2514 init_completion(&sc
->go_beacon
);
2516 mutex_unlock(&sc
->mutex
);
2518 if (wait_for_completion_timeout(&sc
->go_beacon
,
2520 ath_dbg(common
, CHAN_CTX
,
2521 "Failed to send new NoA\n");
2523 spin_lock_bh(&sc
->chan_lock
);
2524 sc
->sched
.mgd_prepare_tx
= false;
2525 spin_unlock_bh(&sc
->chan_lock
);
2528 mutex_lock(&sc
->mutex
);
2531 ath_dbg(common
, CHAN_CTX
,
2532 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2533 __func__
, vif
->addr
);
2535 spin_lock_bh(&sc
->chan_lock
);
2536 sc
->next_chan
= avp
->chanctx
;
2537 sc
->sched
.state
= ATH_CHANCTX_STATE_FORCE_ACTIVE
;
2538 spin_unlock_bh(&sc
->chan_lock
);
2540 ath_chanctx_set_next(sc
, true);
2542 mutex_unlock(&sc
->mutex
);
2545 void ath9k_fill_chanctx_ops(void)
2547 if (!ath9k_is_chanctx_enabled())
2550 ath9k_ops
.hw_scan
= ath9k_hw_scan
;
2551 ath9k_ops
.cancel_hw_scan
= ath9k_cancel_hw_scan
;
2552 ath9k_ops
.remain_on_channel
= ath9k_remain_on_channel
;
2553 ath9k_ops
.cancel_remain_on_channel
= ath9k_cancel_remain_on_channel
;
2554 ath9k_ops
.add_chanctx
= ath9k_add_chanctx
;
2555 ath9k_ops
.remove_chanctx
= ath9k_remove_chanctx
;
2556 ath9k_ops
.change_chanctx
= ath9k_change_chanctx
;
2557 ath9k_ops
.assign_vif_chanctx
= ath9k_assign_vif_chanctx
;
2558 ath9k_ops
.unassign_vif_chanctx
= ath9k_unassign_vif_chanctx
;
2559 ath9k_ops
.mgd_prepare_tx
= ath9k_mgd_prepare_tx
;
2564 static int ath9k_get_txpower(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
2567 struct ath_softc
*sc
= hw
->priv
;
2568 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
2570 mutex_lock(&sc
->mutex
);
2572 *dbm
= avp
->chanctx
->cur_txpower
;
2574 *dbm
= sc
->cur_chan
->cur_txpower
;
2575 mutex_unlock(&sc
->mutex
);
2582 struct ieee80211_ops ath9k_ops
= {
2584 .start
= ath9k_start
,
2586 .add_interface
= ath9k_add_interface
,
2587 .change_interface
= ath9k_change_interface
,
2588 .remove_interface
= ath9k_remove_interface
,
2589 .config
= ath9k_config
,
2590 .configure_filter
= ath9k_configure_filter
,
2591 .sta_state
= ath9k_sta_state
,
2592 .sta_notify
= ath9k_sta_notify
,
2593 .conf_tx
= ath9k_conf_tx
,
2594 .bss_info_changed
= ath9k_bss_info_changed
,
2595 .set_key
= ath9k_set_key
,
2596 .get_tsf
= ath9k_get_tsf
,
2597 .set_tsf
= ath9k_set_tsf
,
2598 .reset_tsf
= ath9k_reset_tsf
,
2599 .ampdu_action
= ath9k_ampdu_action
,
2600 .get_survey
= ath9k_get_survey
,
2601 .rfkill_poll
= ath9k_rfkill_poll_state
,
2602 .set_coverage_class
= ath9k_set_coverage_class
,
2603 .flush
= ath9k_flush
,
2604 .tx_frames_pending
= ath9k_tx_frames_pending
,
2605 .tx_last_beacon
= ath9k_tx_last_beacon
,
2606 .release_buffered_frames
= ath9k_release_buffered_frames
,
2607 .get_stats
= ath9k_get_stats
,
2608 .set_antenna
= ath9k_set_antenna
,
2609 .get_antenna
= ath9k_get_antenna
,
2611 #ifdef CONFIG_ATH9K_WOW
2612 .suspend
= ath9k_suspend
,
2613 .resume
= ath9k_resume
,
2614 .set_wakeup
= ath9k_set_wakeup
,
2617 #ifdef CONFIG_ATH9K_DEBUGFS
2618 .get_et_sset_count
= ath9k_get_et_sset_count
,
2619 .get_et_stats
= ath9k_get_et_stats
,
2620 .get_et_strings
= ath9k_get_et_strings
,
2623 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2624 .sta_add_debugfs
= ath9k_sta_add_debugfs
,
2626 .sw_scan_start
= ath9k_sw_scan_start
,
2627 .sw_scan_complete
= ath9k_sw_scan_complete
,
2628 .get_txpower
= ath9k_get_txpower
,