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Merge branch 'master' of git://git.infradead.org/users/linville/wireless
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static u8 parse_mpdudensity(u8 mpdudensity)
23 {
24 /*
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
27 * 1 for 1/4 us
28 * 2 for 1/2 us
29 * 3 for 1 us
30 * 4 for 2 us
31 * 5 for 4 us
32 * 6 for 8 us
33 * 7 for 16 us
34 */
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41 /* Our lower layer calculations limit our precision to
42 1 microsecond */
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59 bool pending = false;
60
61 spin_lock_bh(&txq->axq_lock);
62
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
64 pending = true;
65
66 spin_unlock_bh(&txq->axq_lock);
67 return pending;
68 }
69
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72 unsigned long flags;
73 bool ret;
74
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79 return ret;
80 }
81
82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85 unsigned long flags;
86 enum ath9k_power_mode power_mode;
87
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
90 goto unlock;
91
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95 /*
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
99 */
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
105 }
106
107 unlock:
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
109 }
110
111 void ath9k_ps_restore(struct ath_softc *sc)
112 {
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 enum ath9k_power_mode mode;
115 unsigned long flags;
116
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 if (--sc->ps_usecount != 0)
119 goto unlock;
120
121 if (sc->ps_idle)
122 mode = ATH9K_PM_FULL_SLEEP;
123 else if (sc->ps_enabled &&
124 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
125 PS_WAIT_FOR_CAB |
126 PS_WAIT_FOR_PSPOLL_DATA |
127 PS_WAIT_FOR_TX_ACK)))
128 mode = ATH9K_PM_NETWORK_SLEEP;
129 else
130 goto unlock;
131
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 spin_unlock(&common->cc_lock);
135
136 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
137
138 unlock:
139 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
140 }
141
142 void ath_start_ani(struct ath_common *common)
143 {
144 struct ath_hw *ah = common->ah;
145 unsigned long timestamp = jiffies_to_msecs(jiffies);
146 struct ath_softc *sc = (struct ath_softc *) common->priv;
147
148 if (!(sc->sc_flags & SC_OP_ANI_RUN))
149 return;
150
151 if (sc->sc_flags & SC_OP_OFFCHANNEL)
152 return;
153
154 common->ani.longcal_timer = timestamp;
155 common->ani.shortcal_timer = timestamp;
156 common->ani.checkani_timer = timestamp;
157
158 mod_timer(&common->ani.timer,
159 jiffies +
160 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
161 }
162
163 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
164 {
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath9k_channel *chan = &ah->channels[channel];
167 struct survey_info *survey = &sc->survey[channel];
168
169 if (chan->noisefloor) {
170 survey->filled |= SURVEY_INFO_NOISE_DBM;
171 survey->noise = ath9k_hw_getchan_noise(ah, chan);
172 }
173 }
174
175 /*
176 * Updates the survey statistics and returns the busy time since last
177 * update in %, if the measurement duration was long enough for the
178 * result to be useful, -1 otherwise.
179 */
180 static int ath_update_survey_stats(struct ath_softc *sc)
181 {
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
188 int ret = 0;
189
190 if (!ah->curchan)
191 return -1;
192
193 if (ah->power_mode == ATH9K_PM_AWAKE)
194 ath_hw_cycle_counters_update(common);
195
196 if (cc->cycles > 0) {
197 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
198 SURVEY_INFO_CHANNEL_TIME_BUSY |
199 SURVEY_INFO_CHANNEL_TIME_RX |
200 SURVEY_INFO_CHANNEL_TIME_TX;
201 survey->channel_time += cc->cycles / div;
202 survey->channel_time_busy += cc->rx_busy / div;
203 survey->channel_time_rx += cc->rx_frame / div;
204 survey->channel_time_tx += cc->tx_frame / div;
205 }
206
207 if (cc->cycles < div)
208 return -1;
209
210 if (cc->cycles > 0)
211 ret = cc->rx_busy * 100 / cc->cycles;
212
213 memset(cc, 0, sizeof(*cc));
214
215 ath_update_survey_nf(sc, pos);
216
217 return ret;
218 }
219
220 static void __ath_cancel_work(struct ath_softc *sc)
221 {
222 cancel_work_sync(&sc->paprd_work);
223 cancel_work_sync(&sc->hw_check_work);
224 cancel_delayed_work_sync(&sc->tx_complete_work);
225 cancel_delayed_work_sync(&sc->hw_pll_work);
226 }
227
228 static void ath_cancel_work(struct ath_softc *sc)
229 {
230 __ath_cancel_work(sc);
231 cancel_work_sync(&sc->hw_reset_work);
232 }
233
234 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
235 {
236 struct ath_hw *ah = sc->sc_ah;
237 struct ath_common *common = ath9k_hw_common(ah);
238 bool ret;
239
240 ieee80211_stop_queues(sc->hw);
241
242 sc->hw_busy_count = 0;
243 del_timer_sync(&common->ani.timer);
244
245 ath9k_debug_samp_bb_mac(sc);
246 ath9k_hw_disable_interrupts(ah);
247
248 ret = ath_drain_all_txq(sc, retry_tx);
249
250 if (!ath_stoprecv(sc))
251 ret = false;
252
253 if (!flush) {
254 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
255 ath_rx_tasklet(sc, 1, true);
256 ath_rx_tasklet(sc, 1, false);
257 } else {
258 ath_flushrecv(sc);
259 }
260
261 return ret;
262 }
263
264 static bool ath_complete_reset(struct ath_softc *sc, bool start)
265 {
266 struct ath_hw *ah = sc->sc_ah;
267 struct ath_common *common = ath9k_hw_common(ah);
268
269 if (ath_startrecv(sc) != 0) {
270 ath_err(common, "Unable to restart recv logic\n");
271 return false;
272 }
273
274 ath9k_cmn_update_txpow(ah, sc->curtxpow,
275 sc->config.txpowlimit, &sc->curtxpow);
276 ath9k_hw_set_interrupts(ah, ah->imask);
277 ath9k_hw_enable_interrupts(ah);
278
279 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
280 if (sc->sc_flags & SC_OP_BEACONS)
281 ath_set_beacon(sc);
282
283 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
284 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
285 if (!common->disable_ani)
286 ath_start_ani(common);
287 }
288
289 if (ath9k_hw_ops(ah)->antdiv_comb_conf_get && sc->ant_rx != 3) {
290 struct ath_hw_antcomb_conf div_ant_conf;
291 u8 lna_conf;
292
293 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
294
295 if (sc->ant_rx == 1)
296 lna_conf = ATH_ANT_DIV_COMB_LNA1;
297 else
298 lna_conf = ATH_ANT_DIV_COMB_LNA2;
299 div_ant_conf.main_lna_conf = lna_conf;
300 div_ant_conf.alt_lna_conf = lna_conf;
301
302 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
303 }
304
305 ieee80211_wake_queues(sc->hw);
306
307 return true;
308 }
309
310 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
311 bool retry_tx)
312 {
313 struct ath_hw *ah = sc->sc_ah;
314 struct ath_common *common = ath9k_hw_common(ah);
315 struct ath9k_hw_cal_data *caldata = NULL;
316 bool fastcc = true;
317 bool flush = false;
318 int r;
319
320 __ath_cancel_work(sc);
321
322 spin_lock_bh(&sc->sc_pcu_lock);
323
324 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
325 fastcc = false;
326 caldata = &sc->caldata;
327 }
328
329 if (!hchan) {
330 fastcc = false;
331 flush = true;
332 hchan = ah->curchan;
333 }
334
335 if (fastcc && !ath9k_hw_check_alive(ah))
336 fastcc = false;
337
338 if (!ath_prepare_reset(sc, retry_tx, flush))
339 fastcc = false;
340
341 ath_dbg(common, ATH_DBG_CONFIG,
342 "Reset to %u MHz, HT40: %d fastcc: %d\n",
343 hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
344 CHANNEL_HT40PLUS)),
345 fastcc);
346
347 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
348 if (r) {
349 ath_err(common,
350 "Unable to reset channel, reset status %d\n", r);
351 goto out;
352 }
353
354 if (!ath_complete_reset(sc, true))
355 r = -EIO;
356
357 out:
358 spin_unlock_bh(&sc->sc_pcu_lock);
359 return r;
360 }
361
362
363 /*
364 * Set/change channels. If the channel is really being changed, it's done
365 * by reseting the chip. To accomplish this we must first cleanup any pending
366 * DMA, then restart stuff.
367 */
368 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
369 struct ath9k_channel *hchan)
370 {
371 int r;
372
373 if (sc->sc_flags & SC_OP_INVALID)
374 return -EIO;
375
376 ath9k_ps_wakeup(sc);
377
378 r = ath_reset_internal(sc, hchan, false);
379
380 ath9k_ps_restore(sc);
381
382 return r;
383 }
384
385 static void ath_paprd_activate(struct ath_softc *sc)
386 {
387 struct ath_hw *ah = sc->sc_ah;
388 struct ath9k_hw_cal_data *caldata = ah->caldata;
389 int chain;
390
391 if (!caldata || !caldata->paprd_done)
392 return;
393
394 ath9k_ps_wakeup(sc);
395 ar9003_paprd_enable(ah, false);
396 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
397 if (!(ah->txchainmask & BIT(chain)))
398 continue;
399
400 ar9003_paprd_populate_single_table(ah, caldata, chain);
401 }
402
403 ar9003_paprd_enable(ah, true);
404 ath9k_ps_restore(sc);
405 }
406
407 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
408 {
409 struct ieee80211_hw *hw = sc->hw;
410 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
411 struct ath_hw *ah = sc->sc_ah;
412 struct ath_common *common = ath9k_hw_common(ah);
413 struct ath_tx_control txctl;
414 int time_left;
415
416 memset(&txctl, 0, sizeof(txctl));
417 txctl.txq = sc->tx.txq_map[WME_AC_BE];
418
419 memset(tx_info, 0, sizeof(*tx_info));
420 tx_info->band = hw->conf.channel->band;
421 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
422 tx_info->control.rates[0].idx = 0;
423 tx_info->control.rates[0].count = 1;
424 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
425 tx_info->control.rates[1].idx = -1;
426
427 init_completion(&sc->paprd_complete);
428 txctl.paprd = BIT(chain);
429
430 if (ath_tx_start(hw, skb, &txctl) != 0) {
431 ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
432 dev_kfree_skb_any(skb);
433 return false;
434 }
435
436 time_left = wait_for_completion_timeout(&sc->paprd_complete,
437 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
438
439 if (!time_left)
440 ath_dbg(common, ATH_DBG_CALIBRATE,
441 "Timeout waiting for paprd training on TX chain %d\n",
442 chain);
443
444 return !!time_left;
445 }
446
447 void ath_paprd_calibrate(struct work_struct *work)
448 {
449 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
450 struct ieee80211_hw *hw = sc->hw;
451 struct ath_hw *ah = sc->sc_ah;
452 struct ieee80211_hdr *hdr;
453 struct sk_buff *skb = NULL;
454 struct ath9k_hw_cal_data *caldata = ah->caldata;
455 struct ath_common *common = ath9k_hw_common(ah);
456 int ftype;
457 int chain_ok = 0;
458 int chain;
459 int len = 1800;
460
461 if (!caldata)
462 return;
463
464 ath9k_ps_wakeup(sc);
465
466 if (ar9003_paprd_init_table(ah) < 0)
467 goto fail_paprd;
468
469 skb = alloc_skb(len, GFP_KERNEL);
470 if (!skb)
471 goto fail_paprd;
472
473 skb_put(skb, len);
474 memset(skb->data, 0, len);
475 hdr = (struct ieee80211_hdr *)skb->data;
476 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
477 hdr->frame_control = cpu_to_le16(ftype);
478 hdr->duration_id = cpu_to_le16(10);
479 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
480 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
481 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
482
483 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
484 if (!(ah->txchainmask & BIT(chain)))
485 continue;
486
487 chain_ok = 0;
488
489 ath_dbg(common, ATH_DBG_CALIBRATE,
490 "Sending PAPRD frame for thermal measurement "
491 "on chain %d\n", chain);
492 if (!ath_paprd_send_frame(sc, skb, chain))
493 goto fail_paprd;
494
495 ar9003_paprd_setup_gain_table(ah, chain);
496
497 ath_dbg(common, ATH_DBG_CALIBRATE,
498 "Sending PAPRD training frame on chain %d\n", chain);
499 if (!ath_paprd_send_frame(sc, skb, chain))
500 goto fail_paprd;
501
502 if (!ar9003_paprd_is_done(ah)) {
503 ath_dbg(common, ATH_DBG_CALIBRATE,
504 "PAPRD not yet done on chain %d\n", chain);
505 break;
506 }
507
508 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
509 ath_dbg(common, ATH_DBG_CALIBRATE,
510 "PAPRD create curve failed on chain %d\n",
511 chain);
512 break;
513 }
514
515 chain_ok = 1;
516 }
517 kfree_skb(skb);
518
519 if (chain_ok) {
520 caldata->paprd_done = true;
521 ath_paprd_activate(sc);
522 }
523
524 fail_paprd:
525 ath9k_ps_restore(sc);
526 }
527
528 /*
529 * This routine performs the periodic noise floor calibration function
530 * that is used to adjust and optimize the chip performance. This
531 * takes environmental changes (location, temperature) into account.
532 * When the task is complete, it reschedules itself depending on the
533 * appropriate interval that was calculated.
534 */
535 void ath_ani_calibrate(unsigned long data)
536 {
537 struct ath_softc *sc = (struct ath_softc *)data;
538 struct ath_hw *ah = sc->sc_ah;
539 struct ath_common *common = ath9k_hw_common(ah);
540 bool longcal = false;
541 bool shortcal = false;
542 bool aniflag = false;
543 unsigned int timestamp = jiffies_to_msecs(jiffies);
544 u32 cal_interval, short_cal_interval, long_cal_interval;
545 unsigned long flags;
546
547 if (ah->caldata && ah->caldata->nfcal_interference)
548 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
549 else
550 long_cal_interval = ATH_LONG_CALINTERVAL;
551
552 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
553 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
554
555 /* Only calibrate if awake */
556 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
557 goto set_timer;
558
559 ath9k_ps_wakeup(sc);
560
561 /* Long calibration runs independently of short calibration. */
562 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
563 longcal = true;
564 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
565 common->ani.longcal_timer = timestamp;
566 }
567
568 /* Short calibration applies only while caldone is false */
569 if (!common->ani.caldone) {
570 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
571 shortcal = true;
572 ath_dbg(common, ATH_DBG_ANI,
573 "shortcal @%lu\n", jiffies);
574 common->ani.shortcal_timer = timestamp;
575 common->ani.resetcal_timer = timestamp;
576 }
577 } else {
578 if ((timestamp - common->ani.resetcal_timer) >=
579 ATH_RESTART_CALINTERVAL) {
580 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
581 if (common->ani.caldone)
582 common->ani.resetcal_timer = timestamp;
583 }
584 }
585
586 /* Verify whether we must check ANI */
587 if ((timestamp - common->ani.checkani_timer) >=
588 ah->config.ani_poll_interval) {
589 aniflag = true;
590 common->ani.checkani_timer = timestamp;
591 }
592
593 /* Call ANI routine if necessary */
594 if (aniflag) {
595 spin_lock_irqsave(&common->cc_lock, flags);
596 ath9k_hw_ani_monitor(ah, ah->curchan);
597 ath_update_survey_stats(sc);
598 spin_unlock_irqrestore(&common->cc_lock, flags);
599 }
600
601 /* Perform calibration if necessary */
602 if (longcal || shortcal) {
603 common->ani.caldone =
604 ath9k_hw_calibrate(ah, ah->curchan,
605 ah->rxchainmask, longcal);
606 }
607
608 ath9k_ps_restore(sc);
609
610 set_timer:
611 /*
612 * Set timer interval based on previous results.
613 * The interval must be the shortest necessary to satisfy ANI,
614 * short calibration and long calibration.
615 */
616 ath9k_debug_samp_bb_mac(sc);
617 cal_interval = ATH_LONG_CALINTERVAL;
618 if (sc->sc_ah->config.enable_ani)
619 cal_interval = min(cal_interval,
620 (u32)ah->config.ani_poll_interval);
621 if (!common->ani.caldone)
622 cal_interval = min(cal_interval, (u32)short_cal_interval);
623
624 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
625 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
626 if (!ah->caldata->paprd_done)
627 ieee80211_queue_work(sc->hw, &sc->paprd_work);
628 else if (!ah->paprd_table_write_done)
629 ath_paprd_activate(sc);
630 }
631 }
632
633 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
634 {
635 struct ath_node *an;
636 an = (struct ath_node *)sta->drv_priv;
637
638 #ifdef CONFIG_ATH9K_DEBUGFS
639 spin_lock(&sc->nodes_lock);
640 list_add(&an->list, &sc->nodes);
641 spin_unlock(&sc->nodes_lock);
642 an->sta = sta;
643 #endif
644 if (sc->sc_flags & SC_OP_TXAGGR) {
645 ath_tx_node_init(sc, an);
646 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
647 sta->ht_cap.ampdu_factor);
648 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
649 }
650 }
651
652 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
653 {
654 struct ath_node *an = (struct ath_node *)sta->drv_priv;
655
656 #ifdef CONFIG_ATH9K_DEBUGFS
657 spin_lock(&sc->nodes_lock);
658 list_del(&an->list);
659 spin_unlock(&sc->nodes_lock);
660 an->sta = NULL;
661 #endif
662
663 if (sc->sc_flags & SC_OP_TXAGGR)
664 ath_tx_node_cleanup(sc, an);
665 }
666
667
668 void ath9k_tasklet(unsigned long data)
669 {
670 struct ath_softc *sc = (struct ath_softc *)data;
671 struct ath_hw *ah = sc->sc_ah;
672 struct ath_common *common = ath9k_hw_common(ah);
673
674 u32 status = sc->intrstatus;
675 u32 rxmask;
676
677 ath9k_ps_wakeup(sc);
678 spin_lock(&sc->sc_pcu_lock);
679
680 if ((status & ATH9K_INT_FATAL) ||
681 (status & ATH9K_INT_BB_WATCHDOG)) {
682 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
683 goto out;
684 }
685
686 /*
687 * Only run the baseband hang check if beacons stop working in AP or
688 * IBSS mode, because it has a high false positive rate. For station
689 * mode it should not be necessary, since the upper layers will detect
690 * this through a beacon miss automatically and the following channel
691 * change will trigger a hardware reset anyway
692 */
693 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
694 !ath9k_hw_check_alive(ah))
695 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
696
697 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
698 /*
699 * TSF sync does not look correct; remain awake to sync with
700 * the next Beacon.
701 */
702 ath_dbg(common, ATH_DBG_PS,
703 "TSFOOR - Sync with next Beacon\n");
704 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
705 }
706
707 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
708 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
709 ATH9K_INT_RXORN);
710 else
711 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
712
713 if (status & rxmask) {
714 /* Check for high priority Rx first */
715 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
716 (status & ATH9K_INT_RXHP))
717 ath_rx_tasklet(sc, 0, true);
718
719 ath_rx_tasklet(sc, 0, false);
720 }
721
722 if (status & ATH9K_INT_TX) {
723 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
724 ath_tx_edma_tasklet(sc);
725 else
726 ath_tx_tasklet(sc);
727 }
728
729 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
730 if (status & ATH9K_INT_GENTIMER)
731 ath_gen_timer_isr(sc->sc_ah);
732
733 out:
734 /* re-enable hardware interrupt */
735 ath9k_hw_enable_interrupts(ah);
736
737 spin_unlock(&sc->sc_pcu_lock);
738 ath9k_ps_restore(sc);
739 }
740
741 irqreturn_t ath_isr(int irq, void *dev)
742 {
743 #define SCHED_INTR ( \
744 ATH9K_INT_FATAL | \
745 ATH9K_INT_BB_WATCHDOG | \
746 ATH9K_INT_RXORN | \
747 ATH9K_INT_RXEOL | \
748 ATH9K_INT_RX | \
749 ATH9K_INT_RXLP | \
750 ATH9K_INT_RXHP | \
751 ATH9K_INT_TX | \
752 ATH9K_INT_BMISS | \
753 ATH9K_INT_CST | \
754 ATH9K_INT_TSFOOR | \
755 ATH9K_INT_GENTIMER)
756
757 struct ath_softc *sc = dev;
758 struct ath_hw *ah = sc->sc_ah;
759 struct ath_common *common = ath9k_hw_common(ah);
760 enum ath9k_int status;
761 bool sched = false;
762
763 /*
764 * The hardware is not ready/present, don't
765 * touch anything. Note this can happen early
766 * on if the IRQ is shared.
767 */
768 if (sc->sc_flags & SC_OP_INVALID)
769 return IRQ_NONE;
770
771
772 /* shared irq, not for us */
773
774 if (!ath9k_hw_intrpend(ah))
775 return IRQ_NONE;
776
777 /*
778 * Figure out the reason(s) for the interrupt. Note
779 * that the hal returns a pseudo-ISR that may include
780 * bits we haven't explicitly enabled so we mask the
781 * value to insure we only process bits we requested.
782 */
783 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
784 status &= ah->imask; /* discard unasked-for bits */
785
786 /*
787 * If there are no status bits set, then this interrupt was not
788 * for me (should have been caught above).
789 */
790 if (!status)
791 return IRQ_NONE;
792
793 /* Cache the status */
794 sc->intrstatus = status;
795
796 if (status & SCHED_INTR)
797 sched = true;
798
799 /*
800 * If a FATAL or RXORN interrupt is received, we have to reset the
801 * chip immediately.
802 */
803 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
804 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
805 goto chip_reset;
806
807 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
808 (status & ATH9K_INT_BB_WATCHDOG)) {
809
810 spin_lock(&common->cc_lock);
811 ath_hw_cycle_counters_update(common);
812 ar9003_hw_bb_watchdog_dbg_info(ah);
813 spin_unlock(&common->cc_lock);
814
815 goto chip_reset;
816 }
817
818 if (status & ATH9K_INT_SWBA)
819 tasklet_schedule(&sc->bcon_tasklet);
820
821 if (status & ATH9K_INT_TXURN)
822 ath9k_hw_updatetxtriglevel(ah, true);
823
824 if (status & ATH9K_INT_RXEOL) {
825 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
826 ath9k_hw_set_interrupts(ah, ah->imask);
827 }
828
829 if (status & ATH9K_INT_MIB) {
830 /*
831 * Disable interrupts until we service the MIB
832 * interrupt; otherwise it will continue to
833 * fire.
834 */
835 ath9k_hw_disable_interrupts(ah);
836 /*
837 * Let the hal handle the event. We assume
838 * it will clear whatever condition caused
839 * the interrupt.
840 */
841 spin_lock(&common->cc_lock);
842 ath9k_hw_proc_mib_event(ah);
843 spin_unlock(&common->cc_lock);
844 ath9k_hw_enable_interrupts(ah);
845 }
846
847 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
848 if (status & ATH9K_INT_TIM_TIMER) {
849 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
850 goto chip_reset;
851 /* Clear RxAbort bit so that we can
852 * receive frames */
853 ath9k_setpower(sc, ATH9K_PM_AWAKE);
854 ath9k_hw_setrxabort(sc->sc_ah, 0);
855 sc->ps_flags |= PS_WAIT_FOR_BEACON;
856 }
857
858 chip_reset:
859
860 ath_debug_stat_interrupt(sc, status);
861
862 if (sched) {
863 /* turn off every interrupt */
864 ath9k_hw_disable_interrupts(ah);
865 tasklet_schedule(&sc->intr_tq);
866 }
867
868 return IRQ_HANDLED;
869
870 #undef SCHED_INTR
871 }
872
873 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
874 {
875 struct ath_hw *ah = sc->sc_ah;
876 struct ath_common *common = ath9k_hw_common(ah);
877 struct ieee80211_channel *channel = hw->conf.channel;
878 int r;
879
880 ath9k_ps_wakeup(sc);
881 spin_lock_bh(&sc->sc_pcu_lock);
882 atomic_set(&ah->intr_ref_cnt, -1);
883
884 ath9k_hw_configpcipowersave(ah, false);
885
886 if (!ah->curchan)
887 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
888
889 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
890 if (r) {
891 ath_err(common,
892 "Unable to reset channel (%u MHz), reset status %d\n",
893 channel->center_freq, r);
894 }
895
896 ath_complete_reset(sc, true);
897
898 /* Enable LED */
899 ath9k_hw_cfg_output(ah, ah->led_pin,
900 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
901 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
902
903 spin_unlock_bh(&sc->sc_pcu_lock);
904
905 ath9k_ps_restore(sc);
906 }
907
908 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
909 {
910 struct ath_hw *ah = sc->sc_ah;
911 struct ieee80211_channel *channel = hw->conf.channel;
912 int r;
913
914 ath9k_ps_wakeup(sc);
915
916 ath_cancel_work(sc);
917
918 spin_lock_bh(&sc->sc_pcu_lock);
919
920 /*
921 * Keep the LED on when the radio is disabled
922 * during idle unassociated state.
923 */
924 if (!sc->ps_idle) {
925 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
926 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
927 }
928
929 ath_prepare_reset(sc, false, true);
930
931 if (!ah->curchan)
932 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
933
934 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
935 if (r) {
936 ath_err(ath9k_hw_common(sc->sc_ah),
937 "Unable to reset channel (%u MHz), reset status %d\n",
938 channel->center_freq, r);
939 }
940
941 ath9k_hw_phy_disable(ah);
942
943 ath9k_hw_configpcipowersave(ah, true);
944
945 spin_unlock_bh(&sc->sc_pcu_lock);
946 ath9k_ps_restore(sc);
947 }
948
949 static int ath_reset(struct ath_softc *sc, bool retry_tx)
950 {
951 int r;
952
953 ath9k_ps_wakeup(sc);
954
955 r = ath_reset_internal(sc, NULL, retry_tx);
956
957 if (retry_tx) {
958 int i;
959 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
960 if (ATH_TXQ_SETUP(sc, i)) {
961 spin_lock_bh(&sc->tx.txq[i].axq_lock);
962 ath_txq_schedule(sc, &sc->tx.txq[i]);
963 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
964 }
965 }
966 }
967
968 ath9k_ps_restore(sc);
969
970 return r;
971 }
972
973 void ath_reset_work(struct work_struct *work)
974 {
975 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
976
977 ath_reset(sc, true);
978 }
979
980 void ath_hw_check(struct work_struct *work)
981 {
982 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
983 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
984 unsigned long flags;
985 int busy;
986
987 ath9k_ps_wakeup(sc);
988 if (ath9k_hw_check_alive(sc->sc_ah))
989 goto out;
990
991 spin_lock_irqsave(&common->cc_lock, flags);
992 busy = ath_update_survey_stats(sc);
993 spin_unlock_irqrestore(&common->cc_lock, flags);
994
995 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
996 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
997 if (busy >= 99) {
998 if (++sc->hw_busy_count >= 3)
999 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
1000
1001 } else if (busy >= 0)
1002 sc->hw_busy_count = 0;
1003
1004 out:
1005 ath9k_ps_restore(sc);
1006 }
1007
1008 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
1009 {
1010 static int count;
1011 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1012
1013 if (pll_sqsum >= 0x40000) {
1014 count++;
1015 if (count == 3) {
1016 /* Rx is hung for more than 500ms. Reset it */
1017 ath_dbg(common, ATH_DBG_RESET,
1018 "Possible RX hang, resetting");
1019 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
1020 count = 0;
1021 }
1022 } else
1023 count = 0;
1024 }
1025
1026 void ath_hw_pll_work(struct work_struct *work)
1027 {
1028 struct ath_softc *sc = container_of(work, struct ath_softc,
1029 hw_pll_work.work);
1030 u32 pll_sqsum;
1031
1032 if (AR_SREV_9485(sc->sc_ah)) {
1033
1034 ath9k_ps_wakeup(sc);
1035 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
1036 ath9k_ps_restore(sc);
1037
1038 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
1039
1040 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
1041 }
1042 }
1043
1044 /**********************/
1045 /* mac80211 callbacks */
1046 /**********************/
1047
1048 static int ath9k_start(struct ieee80211_hw *hw)
1049 {
1050 struct ath_softc *sc = hw->priv;
1051 struct ath_hw *ah = sc->sc_ah;
1052 struct ath_common *common = ath9k_hw_common(ah);
1053 struct ieee80211_channel *curchan = hw->conf.channel;
1054 struct ath9k_channel *init_channel;
1055 int r;
1056
1057 ath_dbg(common, ATH_DBG_CONFIG,
1058 "Starting driver with initial channel: %d MHz\n",
1059 curchan->center_freq);
1060
1061 ath9k_ps_wakeup(sc);
1062
1063 mutex_lock(&sc->mutex);
1064
1065 /* setup initial channel */
1066 sc->chan_idx = curchan->hw_value;
1067
1068 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1069
1070 /* Reset SERDES registers */
1071 ath9k_hw_configpcipowersave(ah, false);
1072
1073 /*
1074 * The basic interface to setting the hardware in a good
1075 * state is ``reset''. On return the hardware is known to
1076 * be powered up and with interrupts disabled. This must
1077 * be followed by initialization of the appropriate bits
1078 * and then setup of the interrupt mask.
1079 */
1080 spin_lock_bh(&sc->sc_pcu_lock);
1081 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1082 if (r) {
1083 ath_err(common,
1084 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1085 r, curchan->center_freq);
1086 spin_unlock_bh(&sc->sc_pcu_lock);
1087 goto mutex_unlock;
1088 }
1089
1090 /* Setup our intr mask. */
1091 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1092 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1093 ATH9K_INT_GLOBAL;
1094
1095 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1096 ah->imask |= ATH9K_INT_RXHP |
1097 ATH9K_INT_RXLP |
1098 ATH9K_INT_BB_WATCHDOG;
1099 else
1100 ah->imask |= ATH9K_INT_RX;
1101
1102 ah->imask |= ATH9K_INT_GTT;
1103
1104 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1105 ah->imask |= ATH9K_INT_CST;
1106
1107 sc->sc_flags &= ~SC_OP_INVALID;
1108 sc->sc_ah->is_monitoring = false;
1109
1110 /* Disable BMISS interrupt when we're not associated */
1111 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1112
1113 if (!ath_complete_reset(sc, false)) {
1114 r = -EIO;
1115 spin_unlock_bh(&sc->sc_pcu_lock);
1116 goto mutex_unlock;
1117 }
1118
1119 spin_unlock_bh(&sc->sc_pcu_lock);
1120
1121 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1122 !ah->btcoex_hw.enabled) {
1123 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1124 AR_STOMP_LOW_WLAN_WGHT);
1125 ath9k_hw_btcoex_enable(ah);
1126
1127 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1128 ath9k_btcoex_timer_resume(sc);
1129 }
1130
1131 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1132 common->bus_ops->extn_synch_en(common);
1133
1134 mutex_unlock:
1135 mutex_unlock(&sc->mutex);
1136
1137 ath9k_ps_restore(sc);
1138
1139 return r;
1140 }
1141
1142 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1143 {
1144 struct ath_softc *sc = hw->priv;
1145 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1146 struct ath_tx_control txctl;
1147 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1148
1149 if (sc->ps_enabled) {
1150 /*
1151 * mac80211 does not set PM field for normal data frames, so we
1152 * need to update that based on the current PS mode.
1153 */
1154 if (ieee80211_is_data(hdr->frame_control) &&
1155 !ieee80211_is_nullfunc(hdr->frame_control) &&
1156 !ieee80211_has_pm(hdr->frame_control)) {
1157 ath_dbg(common, ATH_DBG_PS,
1158 "Add PM=1 for a TX frame while in PS mode\n");
1159 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1160 }
1161 }
1162
1163 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1164 /*
1165 * We are using PS-Poll and mac80211 can request TX while in
1166 * power save mode. Need to wake up hardware for the TX to be
1167 * completed and if needed, also for RX of buffered frames.
1168 */
1169 ath9k_ps_wakeup(sc);
1170 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1171 ath9k_hw_setrxabort(sc->sc_ah, 0);
1172 if (ieee80211_is_pspoll(hdr->frame_control)) {
1173 ath_dbg(common, ATH_DBG_PS,
1174 "Sending PS-Poll to pick a buffered frame\n");
1175 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1176 } else {
1177 ath_dbg(common, ATH_DBG_PS,
1178 "Wake up to complete TX\n");
1179 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1180 }
1181 /*
1182 * The actual restore operation will happen only after
1183 * the sc_flags bit is cleared. We are just dropping
1184 * the ps_usecount here.
1185 */
1186 ath9k_ps_restore(sc);
1187 }
1188
1189 memset(&txctl, 0, sizeof(struct ath_tx_control));
1190 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1191
1192 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1193
1194 if (ath_tx_start(hw, skb, &txctl) != 0) {
1195 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1196 goto exit;
1197 }
1198
1199 return;
1200 exit:
1201 dev_kfree_skb_any(skb);
1202 }
1203
1204 static void ath9k_stop(struct ieee80211_hw *hw)
1205 {
1206 struct ath_softc *sc = hw->priv;
1207 struct ath_hw *ah = sc->sc_ah;
1208 struct ath_common *common = ath9k_hw_common(ah);
1209
1210 mutex_lock(&sc->mutex);
1211
1212 ath_cancel_work(sc);
1213
1214 if (sc->sc_flags & SC_OP_INVALID) {
1215 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1216 mutex_unlock(&sc->mutex);
1217 return;
1218 }
1219
1220 /* Ensure HW is awake when we try to shut it down. */
1221 ath9k_ps_wakeup(sc);
1222
1223 if (ah->btcoex_hw.enabled) {
1224 ath9k_hw_btcoex_disable(ah);
1225 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1226 ath9k_btcoex_timer_pause(sc);
1227 }
1228
1229 spin_lock_bh(&sc->sc_pcu_lock);
1230
1231 /* prevent tasklets to enable interrupts once we disable them */
1232 ah->imask &= ~ATH9K_INT_GLOBAL;
1233
1234 /* make sure h/w will not generate any interrupt
1235 * before setting the invalid flag. */
1236 ath9k_hw_disable_interrupts(ah);
1237
1238 if (!(sc->sc_flags & SC_OP_INVALID)) {
1239 ath_drain_all_txq(sc, false);
1240 ath_stoprecv(sc);
1241 ath9k_hw_phy_disable(ah);
1242 } else
1243 sc->rx.rxlink = NULL;
1244
1245 if (sc->rx.frag) {
1246 dev_kfree_skb_any(sc->rx.frag);
1247 sc->rx.frag = NULL;
1248 }
1249
1250 /* disable HAL and put h/w to sleep */
1251 ath9k_hw_disable(ah);
1252
1253 spin_unlock_bh(&sc->sc_pcu_lock);
1254
1255 /* we can now sync irq and kill any running tasklets, since we already
1256 * disabled interrupts and not holding a spin lock */
1257 synchronize_irq(sc->irq);
1258 tasklet_kill(&sc->intr_tq);
1259 tasklet_kill(&sc->bcon_tasklet);
1260
1261 ath9k_ps_restore(sc);
1262
1263 sc->ps_idle = true;
1264 ath_radio_disable(sc, hw);
1265
1266 sc->sc_flags |= SC_OP_INVALID;
1267
1268 mutex_unlock(&sc->mutex);
1269
1270 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1271 }
1272
1273 bool ath9k_uses_beacons(int type)
1274 {
1275 switch (type) {
1276 case NL80211_IFTYPE_AP:
1277 case NL80211_IFTYPE_ADHOC:
1278 case NL80211_IFTYPE_MESH_POINT:
1279 return true;
1280 default:
1281 return false;
1282 }
1283 }
1284
1285 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1286 struct ieee80211_vif *vif)
1287 {
1288 struct ath_vif *avp = (void *)vif->drv_priv;
1289
1290 ath9k_set_beaconing_status(sc, false);
1291 ath_beacon_return(sc, avp);
1292 ath9k_set_beaconing_status(sc, true);
1293 sc->sc_flags &= ~SC_OP_BEACONS;
1294 }
1295
1296 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1297 {
1298 struct ath9k_vif_iter_data *iter_data = data;
1299 int i;
1300
1301 if (iter_data->hw_macaddr)
1302 for (i = 0; i < ETH_ALEN; i++)
1303 iter_data->mask[i] &=
1304 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1305
1306 switch (vif->type) {
1307 case NL80211_IFTYPE_AP:
1308 iter_data->naps++;
1309 break;
1310 case NL80211_IFTYPE_STATION:
1311 iter_data->nstations++;
1312 break;
1313 case NL80211_IFTYPE_ADHOC:
1314 iter_data->nadhocs++;
1315 break;
1316 case NL80211_IFTYPE_MESH_POINT:
1317 iter_data->nmeshes++;
1318 break;
1319 case NL80211_IFTYPE_WDS:
1320 iter_data->nwds++;
1321 break;
1322 default:
1323 iter_data->nothers++;
1324 break;
1325 }
1326 }
1327
1328 /* Called with sc->mutex held. */
1329 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1330 struct ieee80211_vif *vif,
1331 struct ath9k_vif_iter_data *iter_data)
1332 {
1333 struct ath_softc *sc = hw->priv;
1334 struct ath_hw *ah = sc->sc_ah;
1335 struct ath_common *common = ath9k_hw_common(ah);
1336
1337 /*
1338 * Use the hardware MAC address as reference, the hardware uses it
1339 * together with the BSSID mask when matching addresses.
1340 */
1341 memset(iter_data, 0, sizeof(*iter_data));
1342 iter_data->hw_macaddr = common->macaddr;
1343 memset(&iter_data->mask, 0xff, ETH_ALEN);
1344
1345 if (vif)
1346 ath9k_vif_iter(iter_data, vif->addr, vif);
1347
1348 /* Get list of all active MAC addresses */
1349 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1350 iter_data);
1351 }
1352
1353 /* Called with sc->mutex held. */
1354 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1355 struct ieee80211_vif *vif)
1356 {
1357 struct ath_softc *sc = hw->priv;
1358 struct ath_hw *ah = sc->sc_ah;
1359 struct ath_common *common = ath9k_hw_common(ah);
1360 struct ath9k_vif_iter_data iter_data;
1361
1362 ath9k_calculate_iter_data(hw, vif, &iter_data);
1363
1364 /* Set BSSID mask. */
1365 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1366 ath_hw_setbssidmask(common);
1367
1368 /* Set op-mode & TSF */
1369 if (iter_data.naps > 0) {
1370 ath9k_hw_set_tsfadjust(ah, 1);
1371 sc->sc_flags |= SC_OP_TSF_RESET;
1372 ah->opmode = NL80211_IFTYPE_AP;
1373 } else {
1374 ath9k_hw_set_tsfadjust(ah, 0);
1375 sc->sc_flags &= ~SC_OP_TSF_RESET;
1376
1377 if (iter_data.nmeshes)
1378 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1379 else if (iter_data.nwds)
1380 ah->opmode = NL80211_IFTYPE_AP;
1381 else if (iter_data.nadhocs)
1382 ah->opmode = NL80211_IFTYPE_ADHOC;
1383 else
1384 ah->opmode = NL80211_IFTYPE_STATION;
1385 }
1386
1387 /*
1388 * Enable MIB interrupts when there are hardware phy counters.
1389 */
1390 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1391 if (ah->config.enable_ani)
1392 ah->imask |= ATH9K_INT_MIB;
1393 ah->imask |= ATH9K_INT_TSFOOR;
1394 } else {
1395 ah->imask &= ~ATH9K_INT_MIB;
1396 ah->imask &= ~ATH9K_INT_TSFOOR;
1397 }
1398
1399 ath9k_hw_set_interrupts(ah, ah->imask);
1400
1401 /* Set up ANI */
1402 if (iter_data.naps > 0) {
1403 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1404
1405 if (!common->disable_ani) {
1406 sc->sc_flags |= SC_OP_ANI_RUN;
1407 ath_start_ani(common);
1408 }
1409
1410 } else {
1411 sc->sc_flags &= ~SC_OP_ANI_RUN;
1412 del_timer_sync(&common->ani.timer);
1413 }
1414 }
1415
1416 /* Called with sc->mutex held, vif counts set up properly. */
1417 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1418 struct ieee80211_vif *vif)
1419 {
1420 struct ath_softc *sc = hw->priv;
1421
1422 ath9k_calculate_summary_state(hw, vif);
1423
1424 if (ath9k_uses_beacons(vif->type)) {
1425 int error;
1426 /* This may fail because upper levels do not have beacons
1427 * properly configured yet. That's OK, we assume it
1428 * will be properly configured and then we will be notified
1429 * in the info_changed method and set up beacons properly
1430 * there.
1431 */
1432 ath9k_set_beaconing_status(sc, false);
1433 error = ath_beacon_alloc(sc, vif);
1434 if (!error)
1435 ath_beacon_config(sc, vif);
1436 ath9k_set_beaconing_status(sc, true);
1437 }
1438 }
1439
1440
1441 static int ath9k_add_interface(struct ieee80211_hw *hw,
1442 struct ieee80211_vif *vif)
1443 {
1444 struct ath_softc *sc = hw->priv;
1445 struct ath_hw *ah = sc->sc_ah;
1446 struct ath_common *common = ath9k_hw_common(ah);
1447 int ret = 0;
1448
1449 ath9k_ps_wakeup(sc);
1450 mutex_lock(&sc->mutex);
1451
1452 switch (vif->type) {
1453 case NL80211_IFTYPE_STATION:
1454 case NL80211_IFTYPE_WDS:
1455 case NL80211_IFTYPE_ADHOC:
1456 case NL80211_IFTYPE_AP:
1457 case NL80211_IFTYPE_MESH_POINT:
1458 break;
1459 default:
1460 ath_err(common, "Interface type %d not yet supported\n",
1461 vif->type);
1462 ret = -EOPNOTSUPP;
1463 goto out;
1464 }
1465
1466 if (ath9k_uses_beacons(vif->type)) {
1467 if (sc->nbcnvifs >= ATH_BCBUF) {
1468 ath_err(common, "Not enough beacon buffers when adding"
1469 " new interface of type: %i\n",
1470 vif->type);
1471 ret = -ENOBUFS;
1472 goto out;
1473 }
1474 }
1475
1476 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1477 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1478 sc->nvifs > 0)) {
1479 ath_err(common, "Cannot create ADHOC interface when other"
1480 " interfaces already exist.\n");
1481 ret = -EINVAL;
1482 goto out;
1483 }
1484
1485 ath_dbg(common, ATH_DBG_CONFIG,
1486 "Attach a VIF of type: %d\n", vif->type);
1487
1488 sc->nvifs++;
1489
1490 ath9k_do_vif_add_setup(hw, vif);
1491 out:
1492 mutex_unlock(&sc->mutex);
1493 ath9k_ps_restore(sc);
1494 return ret;
1495 }
1496
1497 static int ath9k_change_interface(struct ieee80211_hw *hw,
1498 struct ieee80211_vif *vif,
1499 enum nl80211_iftype new_type,
1500 bool p2p)
1501 {
1502 struct ath_softc *sc = hw->priv;
1503 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1504 int ret = 0;
1505
1506 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1507 mutex_lock(&sc->mutex);
1508 ath9k_ps_wakeup(sc);
1509
1510 /* See if new interface type is valid. */
1511 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1512 (sc->nvifs > 1)) {
1513 ath_err(common, "When using ADHOC, it must be the only"
1514 " interface.\n");
1515 ret = -EINVAL;
1516 goto out;
1517 }
1518
1519 if (ath9k_uses_beacons(new_type) &&
1520 !ath9k_uses_beacons(vif->type)) {
1521 if (sc->nbcnvifs >= ATH_BCBUF) {
1522 ath_err(common, "No beacon slot available\n");
1523 ret = -ENOBUFS;
1524 goto out;
1525 }
1526 }
1527
1528 /* Clean up old vif stuff */
1529 if (ath9k_uses_beacons(vif->type))
1530 ath9k_reclaim_beacon(sc, vif);
1531
1532 /* Add new settings */
1533 vif->type = new_type;
1534 vif->p2p = p2p;
1535
1536 ath9k_do_vif_add_setup(hw, vif);
1537 out:
1538 ath9k_ps_restore(sc);
1539 mutex_unlock(&sc->mutex);
1540 return ret;
1541 }
1542
1543 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1544 struct ieee80211_vif *vif)
1545 {
1546 struct ath_softc *sc = hw->priv;
1547 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1548
1549 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1550
1551 ath9k_ps_wakeup(sc);
1552 mutex_lock(&sc->mutex);
1553
1554 sc->nvifs--;
1555
1556 /* Reclaim beacon resources */
1557 if (ath9k_uses_beacons(vif->type))
1558 ath9k_reclaim_beacon(sc, vif);
1559
1560 ath9k_calculate_summary_state(hw, NULL);
1561
1562 mutex_unlock(&sc->mutex);
1563 ath9k_ps_restore(sc);
1564 }
1565
1566 static void ath9k_enable_ps(struct ath_softc *sc)
1567 {
1568 struct ath_hw *ah = sc->sc_ah;
1569
1570 sc->ps_enabled = true;
1571 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1572 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1573 ah->imask |= ATH9K_INT_TIM_TIMER;
1574 ath9k_hw_set_interrupts(ah, ah->imask);
1575 }
1576 ath9k_hw_setrxabort(ah, 1);
1577 }
1578 }
1579
1580 static void ath9k_disable_ps(struct ath_softc *sc)
1581 {
1582 struct ath_hw *ah = sc->sc_ah;
1583
1584 sc->ps_enabled = false;
1585 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1586 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1587 ath9k_hw_setrxabort(ah, 0);
1588 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1589 PS_WAIT_FOR_CAB |
1590 PS_WAIT_FOR_PSPOLL_DATA |
1591 PS_WAIT_FOR_TX_ACK);
1592 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1593 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1594 ath9k_hw_set_interrupts(ah, ah->imask);
1595 }
1596 }
1597
1598 }
1599
1600 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1601 {
1602 struct ath_softc *sc = hw->priv;
1603 struct ath_hw *ah = sc->sc_ah;
1604 struct ath_common *common = ath9k_hw_common(ah);
1605 struct ieee80211_conf *conf = &hw->conf;
1606 bool disable_radio = false;
1607
1608 mutex_lock(&sc->mutex);
1609
1610 /*
1611 * Leave this as the first check because we need to turn on the
1612 * radio if it was disabled before prior to processing the rest
1613 * of the changes. Likewise we must only disable the radio towards
1614 * the end.
1615 */
1616 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1617 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1618 if (!sc->ps_idle) {
1619 ath_radio_enable(sc, hw);
1620 ath_dbg(common, ATH_DBG_CONFIG,
1621 "not-idle: enabling radio\n");
1622 } else {
1623 disable_radio = true;
1624 }
1625 }
1626
1627 /*
1628 * We just prepare to enable PS. We have to wait until our AP has
1629 * ACK'd our null data frame to disable RX otherwise we'll ignore
1630 * those ACKs and end up retransmitting the same null data frames.
1631 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1632 */
1633 if (changed & IEEE80211_CONF_CHANGE_PS) {
1634 unsigned long flags;
1635 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1636 if (conf->flags & IEEE80211_CONF_PS)
1637 ath9k_enable_ps(sc);
1638 else
1639 ath9k_disable_ps(sc);
1640 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1641 }
1642
1643 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1644 if (conf->flags & IEEE80211_CONF_MONITOR) {
1645 ath_dbg(common, ATH_DBG_CONFIG,
1646 "Monitor mode is enabled\n");
1647 sc->sc_ah->is_monitoring = true;
1648 } else {
1649 ath_dbg(common, ATH_DBG_CONFIG,
1650 "Monitor mode is disabled\n");
1651 sc->sc_ah->is_monitoring = false;
1652 }
1653 }
1654
1655 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1656 struct ieee80211_channel *curchan = hw->conf.channel;
1657 struct ath9k_channel old_chan;
1658 int pos = curchan->hw_value;
1659 int old_pos = -1;
1660 unsigned long flags;
1661
1662 if (ah->curchan)
1663 old_pos = ah->curchan - &ah->channels[0];
1664
1665 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1666 sc->sc_flags |= SC_OP_OFFCHANNEL;
1667 else
1668 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1669
1670 ath_dbg(common, ATH_DBG_CONFIG,
1671 "Set channel: %d MHz type: %d\n",
1672 curchan->center_freq, conf->channel_type);
1673
1674 /* update survey stats for the old channel before switching */
1675 spin_lock_irqsave(&common->cc_lock, flags);
1676 ath_update_survey_stats(sc);
1677 spin_unlock_irqrestore(&common->cc_lock, flags);
1678
1679 /*
1680 * Preserve the current channel values, before updating
1681 * the same channel
1682 */
1683 if (old_pos == pos) {
1684 memcpy(&old_chan, &sc->sc_ah->channels[pos],
1685 sizeof(struct ath9k_channel));
1686 ah->curchan = &old_chan;
1687 }
1688
1689 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1690 curchan, conf->channel_type);
1691
1692 /*
1693 * If the operating channel changes, change the survey in-use flags
1694 * along with it.
1695 * Reset the survey data for the new channel, unless we're switching
1696 * back to the operating channel from an off-channel operation.
1697 */
1698 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1699 sc->cur_survey != &sc->survey[pos]) {
1700
1701 if (sc->cur_survey)
1702 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1703
1704 sc->cur_survey = &sc->survey[pos];
1705
1706 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1707 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1708 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1709 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1710 }
1711
1712 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1713 ath_err(common, "Unable to set channel\n");
1714 mutex_unlock(&sc->mutex);
1715 return -EINVAL;
1716 }
1717
1718 /*
1719 * The most recent snapshot of channel->noisefloor for the old
1720 * channel is only available after the hardware reset. Copy it to
1721 * the survey stats now.
1722 */
1723 if (old_pos >= 0)
1724 ath_update_survey_nf(sc, old_pos);
1725 }
1726
1727 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1728 ath_dbg(common, ATH_DBG_CONFIG,
1729 "Set power: %d\n", conf->power_level);
1730 sc->config.txpowlimit = 2 * conf->power_level;
1731 ath9k_ps_wakeup(sc);
1732 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1733 sc->config.txpowlimit, &sc->curtxpow);
1734 ath9k_ps_restore(sc);
1735 }
1736
1737 if (disable_radio) {
1738 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1739 ath_radio_disable(sc, hw);
1740 }
1741
1742 mutex_unlock(&sc->mutex);
1743
1744 return 0;
1745 }
1746
1747 #define SUPPORTED_FILTERS \
1748 (FIF_PROMISC_IN_BSS | \
1749 FIF_ALLMULTI | \
1750 FIF_CONTROL | \
1751 FIF_PSPOLL | \
1752 FIF_OTHER_BSS | \
1753 FIF_BCN_PRBRESP_PROMISC | \
1754 FIF_PROBE_REQ | \
1755 FIF_FCSFAIL)
1756
1757 /* FIXME: sc->sc_full_reset ? */
1758 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1759 unsigned int changed_flags,
1760 unsigned int *total_flags,
1761 u64 multicast)
1762 {
1763 struct ath_softc *sc = hw->priv;
1764 u32 rfilt;
1765
1766 changed_flags &= SUPPORTED_FILTERS;
1767 *total_flags &= SUPPORTED_FILTERS;
1768
1769 sc->rx.rxfilter = *total_flags;
1770 ath9k_ps_wakeup(sc);
1771 rfilt = ath_calcrxfilter(sc);
1772 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1773 ath9k_ps_restore(sc);
1774
1775 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1776 "Set HW RX filter: 0x%x\n", rfilt);
1777 }
1778
1779 static int ath9k_sta_add(struct ieee80211_hw *hw,
1780 struct ieee80211_vif *vif,
1781 struct ieee80211_sta *sta)
1782 {
1783 struct ath_softc *sc = hw->priv;
1784 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1785 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1786 struct ieee80211_key_conf ps_key = { };
1787
1788 ath_node_attach(sc, sta);
1789
1790 if (vif->type != NL80211_IFTYPE_AP &&
1791 vif->type != NL80211_IFTYPE_AP_VLAN)
1792 return 0;
1793
1794 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1795
1796 return 0;
1797 }
1798
1799 static void ath9k_del_ps_key(struct ath_softc *sc,
1800 struct ieee80211_vif *vif,
1801 struct ieee80211_sta *sta)
1802 {
1803 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1804 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1805 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1806
1807 if (!an->ps_key)
1808 return;
1809
1810 ath_key_delete(common, &ps_key);
1811 }
1812
1813 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1814 struct ieee80211_vif *vif,
1815 struct ieee80211_sta *sta)
1816 {
1817 struct ath_softc *sc = hw->priv;
1818
1819 ath9k_del_ps_key(sc, vif, sta);
1820 ath_node_detach(sc, sta);
1821
1822 return 0;
1823 }
1824
1825 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1826 struct ieee80211_vif *vif,
1827 enum sta_notify_cmd cmd,
1828 struct ieee80211_sta *sta)
1829 {
1830 struct ath_softc *sc = hw->priv;
1831 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1832
1833 switch (cmd) {
1834 case STA_NOTIFY_SLEEP:
1835 an->sleeping = true;
1836 if (ath_tx_aggr_sleep(sc, an))
1837 ieee80211_sta_set_tim(sta);
1838 break;
1839 case STA_NOTIFY_AWAKE:
1840 an->sleeping = false;
1841 ath_tx_aggr_wakeup(sc, an);
1842 break;
1843 }
1844 }
1845
1846 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1847 const struct ieee80211_tx_queue_params *params)
1848 {
1849 struct ath_softc *sc = hw->priv;
1850 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1851 struct ath_txq *txq;
1852 struct ath9k_tx_queue_info qi;
1853 int ret = 0;
1854
1855 if (queue >= WME_NUM_AC)
1856 return 0;
1857
1858 txq = sc->tx.txq_map[queue];
1859
1860 ath9k_ps_wakeup(sc);
1861 mutex_lock(&sc->mutex);
1862
1863 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1864
1865 qi.tqi_aifs = params->aifs;
1866 qi.tqi_cwmin = params->cw_min;
1867 qi.tqi_cwmax = params->cw_max;
1868 qi.tqi_burstTime = params->txop;
1869
1870 ath_dbg(common, ATH_DBG_CONFIG,
1871 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1872 queue, txq->axq_qnum, params->aifs, params->cw_min,
1873 params->cw_max, params->txop);
1874
1875 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1876 if (ret)
1877 ath_err(common, "TXQ Update failed\n");
1878
1879 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1880 if (queue == WME_AC_BE && !ret)
1881 ath_beaconq_config(sc);
1882
1883 mutex_unlock(&sc->mutex);
1884 ath9k_ps_restore(sc);
1885
1886 return ret;
1887 }
1888
1889 static int ath9k_set_key(struct ieee80211_hw *hw,
1890 enum set_key_cmd cmd,
1891 struct ieee80211_vif *vif,
1892 struct ieee80211_sta *sta,
1893 struct ieee80211_key_conf *key)
1894 {
1895 struct ath_softc *sc = hw->priv;
1896 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1897 int ret = 0;
1898
1899 if (ath9k_modparam_nohwcrypt)
1900 return -ENOSPC;
1901
1902 if (vif->type == NL80211_IFTYPE_ADHOC &&
1903 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1904 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1905 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1906 /*
1907 * For now, disable hw crypto for the RSN IBSS group keys. This
1908 * could be optimized in the future to use a modified key cache
1909 * design to support per-STA RX GTK, but until that gets
1910 * implemented, use of software crypto for group addressed
1911 * frames is a acceptable to allow RSN IBSS to be used.
1912 */
1913 return -EOPNOTSUPP;
1914 }
1915
1916 mutex_lock(&sc->mutex);
1917 ath9k_ps_wakeup(sc);
1918 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1919
1920 switch (cmd) {
1921 case SET_KEY:
1922 if (sta)
1923 ath9k_del_ps_key(sc, vif, sta);
1924
1925 ret = ath_key_config(common, vif, sta, key);
1926 if (ret >= 0) {
1927 key->hw_key_idx = ret;
1928 /* push IV and Michael MIC generation to stack */
1929 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1930 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1931 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1932 if (sc->sc_ah->sw_mgmt_crypto &&
1933 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1934 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1935 ret = 0;
1936 }
1937 break;
1938 case DISABLE_KEY:
1939 ath_key_delete(common, key);
1940 break;
1941 default:
1942 ret = -EINVAL;
1943 }
1944
1945 ath9k_ps_restore(sc);
1946 mutex_unlock(&sc->mutex);
1947
1948 return ret;
1949 }
1950 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1951 {
1952 struct ath_softc *sc = data;
1953 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1954 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1955 struct ath_vif *avp = (void *)vif->drv_priv;
1956
1957 /*
1958 * Skip iteration if primary station vif's bss info
1959 * was not changed
1960 */
1961 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1962 return;
1963
1964 if (bss_conf->assoc) {
1965 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1966 avp->primary_sta_vif = true;
1967 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1968 common->curaid = bss_conf->aid;
1969 ath9k_hw_write_associd(sc->sc_ah);
1970 ath_dbg(common, ATH_DBG_CONFIG,
1971 "Bss Info ASSOC %d, bssid: %pM\n",
1972 bss_conf->aid, common->curbssid);
1973 ath_beacon_config(sc, vif);
1974 /*
1975 * Request a re-configuration of Beacon related timers
1976 * on the receipt of the first Beacon frame (i.e.,
1977 * after time sync with the AP).
1978 */
1979 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1980 /* Reset rssi stats */
1981 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1982 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1983
1984 if (!common->disable_ani) {
1985 sc->sc_flags |= SC_OP_ANI_RUN;
1986 ath_start_ani(common);
1987 }
1988
1989 }
1990 }
1991
1992 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1993 {
1994 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1995 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1996 struct ath_vif *avp = (void *)vif->drv_priv;
1997
1998 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1999 return;
2000
2001 /* Reconfigure bss info */
2002 if (avp->primary_sta_vif && !bss_conf->assoc) {
2003 ath_dbg(common, ATH_DBG_CONFIG,
2004 "Bss Info DISASSOC %d, bssid %pM\n",
2005 common->curaid, common->curbssid);
2006 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2007 avp->primary_sta_vif = false;
2008 memset(common->curbssid, 0, ETH_ALEN);
2009 common->curaid = 0;
2010 }
2011
2012 ieee80211_iterate_active_interfaces_atomic(
2013 sc->hw, ath9k_bss_iter, sc);
2014
2015 /*
2016 * None of station vifs are associated.
2017 * Clear bssid & aid
2018 */
2019 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2020 ath9k_hw_write_associd(sc->sc_ah);
2021 /* Stop ANI */
2022 sc->sc_flags &= ~SC_OP_ANI_RUN;
2023 del_timer_sync(&common->ani.timer);
2024 memset(&sc->caldata, 0, sizeof(sc->caldata));
2025 }
2026 }
2027
2028 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2029 struct ieee80211_vif *vif,
2030 struct ieee80211_bss_conf *bss_conf,
2031 u32 changed)
2032 {
2033 struct ath_softc *sc = hw->priv;
2034 struct ath_hw *ah = sc->sc_ah;
2035 struct ath_common *common = ath9k_hw_common(ah);
2036 struct ath_vif *avp = (void *)vif->drv_priv;
2037 int slottime;
2038 int error;
2039
2040 ath9k_ps_wakeup(sc);
2041 mutex_lock(&sc->mutex);
2042
2043 if (changed & BSS_CHANGED_BSSID) {
2044 ath9k_config_bss(sc, vif);
2045
2046 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2047 common->curbssid, common->curaid);
2048 }
2049
2050 if (changed & BSS_CHANGED_IBSS) {
2051 /* There can be only one vif available */
2052 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2053 common->curaid = bss_conf->aid;
2054 ath9k_hw_write_associd(sc->sc_ah);
2055
2056 if (bss_conf->ibss_joined) {
2057 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2058
2059 if (!common->disable_ani) {
2060 sc->sc_flags |= SC_OP_ANI_RUN;
2061 ath_start_ani(common);
2062 }
2063
2064 } else {
2065 sc->sc_flags &= ~SC_OP_ANI_RUN;
2066 del_timer_sync(&common->ani.timer);
2067 }
2068 }
2069
2070 /* Enable transmission of beacons (AP, IBSS, MESH) */
2071 if ((changed & BSS_CHANGED_BEACON) ||
2072 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2073 ath9k_set_beaconing_status(sc, false);
2074 error = ath_beacon_alloc(sc, vif);
2075 if (!error)
2076 ath_beacon_config(sc, vif);
2077 ath9k_set_beaconing_status(sc, true);
2078 }
2079
2080 if (changed & BSS_CHANGED_ERP_SLOT) {
2081 if (bss_conf->use_short_slot)
2082 slottime = 9;
2083 else
2084 slottime = 20;
2085 if (vif->type == NL80211_IFTYPE_AP) {
2086 /*
2087 * Defer update, so that connected stations can adjust
2088 * their settings at the same time.
2089 * See beacon.c for more details
2090 */
2091 sc->beacon.slottime = slottime;
2092 sc->beacon.updateslot = UPDATE;
2093 } else {
2094 ah->slottime = slottime;
2095 ath9k_hw_init_global_settings(ah);
2096 }
2097 }
2098
2099 /* Disable transmission of beacons */
2100 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2101 !bss_conf->enable_beacon) {
2102 ath9k_set_beaconing_status(sc, false);
2103 avp->is_bslot_active = false;
2104 ath9k_set_beaconing_status(sc, true);
2105 }
2106
2107 if (changed & BSS_CHANGED_BEACON_INT) {
2108 /*
2109 * In case of AP mode, the HW TSF has to be reset
2110 * when the beacon interval changes.
2111 */
2112 if (vif->type == NL80211_IFTYPE_AP) {
2113 sc->sc_flags |= SC_OP_TSF_RESET;
2114 ath9k_set_beaconing_status(sc, false);
2115 error = ath_beacon_alloc(sc, vif);
2116 if (!error)
2117 ath_beacon_config(sc, vif);
2118 ath9k_set_beaconing_status(sc, true);
2119 } else
2120 ath_beacon_config(sc, vif);
2121 }
2122
2123 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2124 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2125 bss_conf->use_short_preamble);
2126 if (bss_conf->use_short_preamble)
2127 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2128 else
2129 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2130 }
2131
2132 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2133 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2134 bss_conf->use_cts_prot);
2135 if (bss_conf->use_cts_prot &&
2136 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2137 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2138 else
2139 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2140 }
2141
2142 mutex_unlock(&sc->mutex);
2143 ath9k_ps_restore(sc);
2144 }
2145
2146 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2147 {
2148 struct ath_softc *sc = hw->priv;
2149 u64 tsf;
2150
2151 mutex_lock(&sc->mutex);
2152 ath9k_ps_wakeup(sc);
2153 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2154 ath9k_ps_restore(sc);
2155 mutex_unlock(&sc->mutex);
2156
2157 return tsf;
2158 }
2159
2160 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2161 {
2162 struct ath_softc *sc = hw->priv;
2163
2164 mutex_lock(&sc->mutex);
2165 ath9k_ps_wakeup(sc);
2166 ath9k_hw_settsf64(sc->sc_ah, tsf);
2167 ath9k_ps_restore(sc);
2168 mutex_unlock(&sc->mutex);
2169 }
2170
2171 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2172 {
2173 struct ath_softc *sc = hw->priv;
2174
2175 mutex_lock(&sc->mutex);
2176
2177 ath9k_ps_wakeup(sc);
2178 ath9k_hw_reset_tsf(sc->sc_ah);
2179 ath9k_ps_restore(sc);
2180
2181 mutex_unlock(&sc->mutex);
2182 }
2183
2184 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2185 struct ieee80211_vif *vif,
2186 enum ieee80211_ampdu_mlme_action action,
2187 struct ieee80211_sta *sta,
2188 u16 tid, u16 *ssn, u8 buf_size)
2189 {
2190 struct ath_softc *sc = hw->priv;
2191 int ret = 0;
2192
2193 local_bh_disable();
2194
2195 switch (action) {
2196 case IEEE80211_AMPDU_RX_START:
2197 if (!(sc->sc_flags & SC_OP_RXAGGR))
2198 ret = -ENOTSUPP;
2199 break;
2200 case IEEE80211_AMPDU_RX_STOP:
2201 break;
2202 case IEEE80211_AMPDU_TX_START:
2203 if (!(sc->sc_flags & SC_OP_TXAGGR))
2204 return -EOPNOTSUPP;
2205
2206 ath9k_ps_wakeup(sc);
2207 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2208 if (!ret)
2209 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2210 ath9k_ps_restore(sc);
2211 break;
2212 case IEEE80211_AMPDU_TX_STOP:
2213 ath9k_ps_wakeup(sc);
2214 ath_tx_aggr_stop(sc, sta, tid);
2215 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2216 ath9k_ps_restore(sc);
2217 break;
2218 case IEEE80211_AMPDU_TX_OPERATIONAL:
2219 ath9k_ps_wakeup(sc);
2220 ath_tx_aggr_resume(sc, sta, tid);
2221 ath9k_ps_restore(sc);
2222 break;
2223 default:
2224 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2225 }
2226
2227 local_bh_enable();
2228
2229 return ret;
2230 }
2231
2232 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2233 struct survey_info *survey)
2234 {
2235 struct ath_softc *sc = hw->priv;
2236 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2237 struct ieee80211_supported_band *sband;
2238 struct ieee80211_channel *chan;
2239 unsigned long flags;
2240 int pos;
2241
2242 spin_lock_irqsave(&common->cc_lock, flags);
2243 if (idx == 0)
2244 ath_update_survey_stats(sc);
2245
2246 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2247 if (sband && idx >= sband->n_channels) {
2248 idx -= sband->n_channels;
2249 sband = NULL;
2250 }
2251
2252 if (!sband)
2253 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2254
2255 if (!sband || idx >= sband->n_channels) {
2256 spin_unlock_irqrestore(&common->cc_lock, flags);
2257 return -ENOENT;
2258 }
2259
2260 chan = &sband->channels[idx];
2261 pos = chan->hw_value;
2262 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2263 survey->channel = chan;
2264 spin_unlock_irqrestore(&common->cc_lock, flags);
2265
2266 return 0;
2267 }
2268
2269 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2270 {
2271 struct ath_softc *sc = hw->priv;
2272 struct ath_hw *ah = sc->sc_ah;
2273
2274 mutex_lock(&sc->mutex);
2275 ah->coverage_class = coverage_class;
2276
2277 ath9k_ps_wakeup(sc);
2278 ath9k_hw_init_global_settings(ah);
2279 ath9k_ps_restore(sc);
2280
2281 mutex_unlock(&sc->mutex);
2282 }
2283
2284 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2285 {
2286 struct ath_softc *sc = hw->priv;
2287 struct ath_hw *ah = sc->sc_ah;
2288 struct ath_common *common = ath9k_hw_common(ah);
2289 int timeout = 200; /* ms */
2290 int i, j;
2291 bool drain_txq;
2292
2293 mutex_lock(&sc->mutex);
2294 cancel_delayed_work_sync(&sc->tx_complete_work);
2295
2296 if (ah->ah_flags & AH_UNPLUGGED) {
2297 ath_dbg(common, ATH_DBG_ANY, "Device has been unplugged!\n");
2298 mutex_unlock(&sc->mutex);
2299 return;
2300 }
2301
2302 if (sc->sc_flags & SC_OP_INVALID) {
2303 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2304 mutex_unlock(&sc->mutex);
2305 return;
2306 }
2307
2308 if (drop)
2309 timeout = 1;
2310
2311 for (j = 0; j < timeout; j++) {
2312 bool npend = false;
2313
2314 if (j)
2315 usleep_range(1000, 2000);
2316
2317 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2318 if (!ATH_TXQ_SETUP(sc, i))
2319 continue;
2320
2321 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2322
2323 if (npend)
2324 break;
2325 }
2326
2327 if (!npend)
2328 goto out;
2329 }
2330
2331 ath9k_ps_wakeup(sc);
2332 spin_lock_bh(&sc->sc_pcu_lock);
2333 drain_txq = ath_drain_all_txq(sc, false);
2334 spin_unlock_bh(&sc->sc_pcu_lock);
2335
2336 if (!drain_txq)
2337 ath_reset(sc, false);
2338
2339 ath9k_ps_restore(sc);
2340 ieee80211_wake_queues(hw);
2341
2342 out:
2343 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2344 mutex_unlock(&sc->mutex);
2345 }
2346
2347 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2348 {
2349 struct ath_softc *sc = hw->priv;
2350 int i;
2351
2352 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2353 if (!ATH_TXQ_SETUP(sc, i))
2354 continue;
2355
2356 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2357 return true;
2358 }
2359 return false;
2360 }
2361
2362 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2363 {
2364 struct ath_softc *sc = hw->priv;
2365 struct ath_hw *ah = sc->sc_ah;
2366 struct ieee80211_vif *vif;
2367 struct ath_vif *avp;
2368 struct ath_buf *bf;
2369 struct ath_tx_status ts;
2370 int status;
2371
2372 vif = sc->beacon.bslot[0];
2373 if (!vif)
2374 return 0;
2375
2376 avp = (void *)vif->drv_priv;
2377 if (!avp->is_bslot_active)
2378 return 0;
2379
2380 if (!sc->beacon.tx_processed) {
2381 tasklet_disable(&sc->bcon_tasklet);
2382
2383 bf = avp->av_bcbuf;
2384 if (!bf || !bf->bf_mpdu)
2385 goto skip;
2386
2387 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2388 if (status == -EINPROGRESS)
2389 goto skip;
2390
2391 sc->beacon.tx_processed = true;
2392 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2393
2394 skip:
2395 tasklet_enable(&sc->bcon_tasklet);
2396 }
2397
2398 return sc->beacon.tx_last;
2399 }
2400
2401 static int ath9k_get_stats(struct ieee80211_hw *hw,
2402 struct ieee80211_low_level_stats *stats)
2403 {
2404 struct ath_softc *sc = hw->priv;
2405 struct ath_hw *ah = sc->sc_ah;
2406 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2407
2408 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2409 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2410 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2411 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2412 return 0;
2413 }
2414
2415 static u32 fill_chainmask(u32 cap, u32 new)
2416 {
2417 u32 filled = 0;
2418 int i;
2419
2420 for (i = 0; cap && new; i++, cap >>= 1) {
2421 if (!(cap & BIT(0)))
2422 continue;
2423
2424 if (new & BIT(0))
2425 filled |= BIT(i);
2426
2427 new >>= 1;
2428 }
2429
2430 return filled;
2431 }
2432
2433 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2434 {
2435 struct ath_softc *sc = hw->priv;
2436 struct ath_hw *ah = sc->sc_ah;
2437
2438 if (!rx_ant || !tx_ant)
2439 return -EINVAL;
2440
2441 sc->ant_rx = rx_ant;
2442 sc->ant_tx = tx_ant;
2443
2444 if (ah->caps.rx_chainmask == 1)
2445 return 0;
2446
2447 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2448 if (AR_SREV_9100(ah))
2449 ah->rxchainmask = 0x7;
2450 else
2451 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2452
2453 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2454 ath9k_reload_chainmask_settings(sc);
2455
2456 return 0;
2457 }
2458
2459 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2460 {
2461 struct ath_softc *sc = hw->priv;
2462
2463 *tx_ant = sc->ant_tx;
2464 *rx_ant = sc->ant_rx;
2465 return 0;
2466 }
2467
2468 struct ieee80211_ops ath9k_ops = {
2469 .tx = ath9k_tx,
2470 .start = ath9k_start,
2471 .stop = ath9k_stop,
2472 .add_interface = ath9k_add_interface,
2473 .change_interface = ath9k_change_interface,
2474 .remove_interface = ath9k_remove_interface,
2475 .config = ath9k_config,
2476 .configure_filter = ath9k_configure_filter,
2477 .sta_add = ath9k_sta_add,
2478 .sta_remove = ath9k_sta_remove,
2479 .sta_notify = ath9k_sta_notify,
2480 .conf_tx = ath9k_conf_tx,
2481 .bss_info_changed = ath9k_bss_info_changed,
2482 .set_key = ath9k_set_key,
2483 .get_tsf = ath9k_get_tsf,
2484 .set_tsf = ath9k_set_tsf,
2485 .reset_tsf = ath9k_reset_tsf,
2486 .ampdu_action = ath9k_ampdu_action,
2487 .get_survey = ath9k_get_survey,
2488 .rfkill_poll = ath9k_rfkill_poll_state,
2489 .set_coverage_class = ath9k_set_coverage_class,
2490 .flush = ath9k_flush,
2491 .tx_frames_pending = ath9k_tx_frames_pending,
2492 .tx_last_beacon = ath9k_tx_last_beacon,
2493 .get_stats = ath9k_get_stats,
2494 .set_antenna = ath9k_set_antenna,
2495 .get_antenna = ath9k_get_antenna,
2496 };
Linux kernel - Deliverables
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