2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/dma-mapping.h>
18 #include <linux/relay.h>
20 #include "ar9003_mac.h"
22 #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
24 static inline bool ath9k_check_auto_sleep(struct ath_softc
*sc
)
26 return sc
->ps_enabled
&&
27 (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
);
31 * Setup and link descriptors.
33 * 11N: we can no longer afford to self link the last descriptor.
34 * MAC acknowledges BA status as long as it copies frames to host
35 * buffer (or rx fifo). This can incorrectly acknowledge packets
36 * to a sender if last desc is self-linked.
38 static void ath_rx_buf_link(struct ath_softc
*sc
, struct ath_buf
*bf
)
40 struct ath_hw
*ah
= sc
->sc_ah
;
41 struct ath_common
*common
= ath9k_hw_common(ah
);
48 ds
->ds_link
= 0; /* link to null */
49 ds
->ds_data
= bf
->bf_buf_addr
;
51 /* virtual addr of the beginning of the buffer. */
54 ds
->ds_vdata
= skb
->data
;
57 * setup rx descriptors. The rx_bufsize here tells the hardware
58 * how much data it can DMA to us and that we are prepared
61 ath9k_hw_setuprxdesc(ah
, ds
,
65 if (sc
->rx
.rxlink
== NULL
)
66 ath9k_hw_putrxbuf(ah
, bf
->bf_daddr
);
68 *sc
->rx
.rxlink
= bf
->bf_daddr
;
70 sc
->rx
.rxlink
= &ds
->ds_link
;
73 static void ath_setdefantenna(struct ath_softc
*sc
, u32 antenna
)
75 /* XXX block beacon interrupts */
76 ath9k_hw_setantenna(sc
->sc_ah
, antenna
);
77 sc
->rx
.defant
= antenna
;
78 sc
->rx
.rxotherant
= 0;
81 static void ath_opmode_init(struct ath_softc
*sc
)
83 struct ath_hw
*ah
= sc
->sc_ah
;
84 struct ath_common
*common
= ath9k_hw_common(ah
);
88 /* configure rx filter */
89 rfilt
= ath_calcrxfilter(sc
);
90 ath9k_hw_setrxfilter(ah
, rfilt
);
92 /* configure bssid mask */
93 ath_hw_setbssidmask(common
);
95 /* configure operational mode */
96 ath9k_hw_setopmode(ah
);
98 /* calculate and install multicast filter */
99 mfilt
[0] = mfilt
[1] = ~0;
100 ath9k_hw_setmcastfilter(ah
, mfilt
[0], mfilt
[1]);
103 static bool ath_rx_edma_buf_link(struct ath_softc
*sc
,
104 enum ath9k_rx_qtype qtype
)
106 struct ath_hw
*ah
= sc
->sc_ah
;
107 struct ath_rx_edma
*rx_edma
;
111 rx_edma
= &sc
->rx
.rx_edma
[qtype
];
112 if (skb_queue_len(&rx_edma
->rx_fifo
) >= rx_edma
->rx_fifo_hwsize
)
115 bf
= list_first_entry(&sc
->rx
.rxbuf
, struct ath_buf
, list
);
116 list_del_init(&bf
->list
);
121 memset(skb
->data
, 0, ah
->caps
.rx_status_len
);
122 dma_sync_single_for_device(sc
->dev
, bf
->bf_buf_addr
,
123 ah
->caps
.rx_status_len
, DMA_TO_DEVICE
);
125 SKB_CB_ATHBUF(skb
) = bf
;
126 ath9k_hw_addrxbuf_edma(ah
, bf
->bf_buf_addr
, qtype
);
127 skb_queue_tail(&rx_edma
->rx_fifo
, skb
);
132 static void ath_rx_addbuffer_edma(struct ath_softc
*sc
,
133 enum ath9k_rx_qtype qtype
, int size
)
135 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
136 struct ath_buf
*bf
, *tbf
;
138 if (list_empty(&sc
->rx
.rxbuf
)) {
139 ath_dbg(common
, QUEUE
, "No free rx buf available\n");
143 list_for_each_entry_safe(bf
, tbf
, &sc
->rx
.rxbuf
, list
)
144 if (!ath_rx_edma_buf_link(sc
, qtype
))
149 static void ath_rx_remove_buffer(struct ath_softc
*sc
,
150 enum ath9k_rx_qtype qtype
)
153 struct ath_rx_edma
*rx_edma
;
156 rx_edma
= &sc
->rx
.rx_edma
[qtype
];
158 while ((skb
= skb_dequeue(&rx_edma
->rx_fifo
)) != NULL
) {
159 bf
= SKB_CB_ATHBUF(skb
);
161 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
165 static void ath_rx_edma_cleanup(struct ath_softc
*sc
)
167 struct ath_hw
*ah
= sc
->sc_ah
;
168 struct ath_common
*common
= ath9k_hw_common(ah
);
171 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_LP
);
172 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_HP
);
174 list_for_each_entry(bf
, &sc
->rx
.rxbuf
, list
) {
176 dma_unmap_single(sc
->dev
, bf
->bf_buf_addr
,
179 dev_kfree_skb_any(bf
->bf_mpdu
);
186 static void ath_rx_edma_init_queue(struct ath_rx_edma
*rx_edma
, int size
)
188 skb_queue_head_init(&rx_edma
->rx_fifo
);
189 rx_edma
->rx_fifo_hwsize
= size
;
192 static int ath_rx_edma_init(struct ath_softc
*sc
, int nbufs
)
194 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
195 struct ath_hw
*ah
= sc
->sc_ah
;
201 ath9k_hw_set_rx_bufsize(ah
, common
->rx_bufsize
-
202 ah
->caps
.rx_status_len
);
204 ath_rx_edma_init_queue(&sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_LP
],
205 ah
->caps
.rx_lp_qdepth
);
206 ath_rx_edma_init_queue(&sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_HP
],
207 ah
->caps
.rx_hp_qdepth
);
209 size
= sizeof(struct ath_buf
) * nbufs
;
210 bf
= devm_kzalloc(sc
->dev
, size
, GFP_KERNEL
);
214 INIT_LIST_HEAD(&sc
->rx
.rxbuf
);
216 for (i
= 0; i
< nbufs
; i
++, bf
++) {
217 skb
= ath_rxbuf_alloc(common
, common
->rx_bufsize
, GFP_KERNEL
);
223 memset(skb
->data
, 0, common
->rx_bufsize
);
226 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, skb
->data
,
229 if (unlikely(dma_mapping_error(sc
->dev
,
231 dev_kfree_skb_any(skb
);
235 "dma_mapping_error() on RX init\n");
240 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
246 ath_rx_edma_cleanup(sc
);
250 static void ath_edma_start_recv(struct ath_softc
*sc
)
252 ath9k_hw_rxena(sc
->sc_ah
);
254 ath_rx_addbuffer_edma(sc
, ATH9K_RX_QUEUE_HP
,
255 sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_HP
].rx_fifo_hwsize
);
257 ath_rx_addbuffer_edma(sc
, ATH9K_RX_QUEUE_LP
,
258 sc
->rx
.rx_edma
[ATH9K_RX_QUEUE_LP
].rx_fifo_hwsize
);
262 ath9k_hw_startpcureceive(sc
->sc_ah
, !!(sc
->hw
->conf
.flags
& IEEE80211_CONF_OFFCHANNEL
));
265 static void ath_edma_stop_recv(struct ath_softc
*sc
)
267 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_HP
);
268 ath_rx_remove_buffer(sc
, ATH9K_RX_QUEUE_LP
);
271 int ath_rx_init(struct ath_softc
*sc
, int nbufs
)
273 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
278 spin_lock_init(&sc
->sc_pcu_lock
);
280 common
->rx_bufsize
= IEEE80211_MAX_MPDU_LEN
/ 2 +
281 sc
->sc_ah
->caps
.rx_status_len
;
283 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
284 return ath_rx_edma_init(sc
, nbufs
);
286 ath_dbg(common
, CONFIG
, "cachelsz %u rxbufsize %u\n",
287 common
->cachelsz
, common
->rx_bufsize
);
289 /* Initialize rx descriptors */
291 error
= ath_descdma_setup(sc
, &sc
->rx
.rxdma
, &sc
->rx
.rxbuf
,
295 "failed to allocate rx descriptors: %d\n",
300 list_for_each_entry(bf
, &sc
->rx
.rxbuf
, list
) {
301 skb
= ath_rxbuf_alloc(common
, common
->rx_bufsize
,
309 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, skb
->data
,
312 if (unlikely(dma_mapping_error(sc
->dev
,
314 dev_kfree_skb_any(skb
);
318 "dma_mapping_error() on RX init\n");
323 sc
->rx
.rxlink
= NULL
;
333 void ath_rx_cleanup(struct ath_softc
*sc
)
335 struct ath_hw
*ah
= sc
->sc_ah
;
336 struct ath_common
*common
= ath9k_hw_common(ah
);
340 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
341 ath_rx_edma_cleanup(sc
);
344 list_for_each_entry(bf
, &sc
->rx
.rxbuf
, list
) {
347 dma_unmap_single(sc
->dev
, bf
->bf_buf_addr
,
359 * Calculate the receive filter according to the
360 * operating mode and state:
362 * o always accept unicast, broadcast, and multicast traffic
363 * o maintain current state of phy error reception (the hal
364 * may enable phy error frames for noise immunity work)
365 * o probe request frames are accepted only when operating in
366 * hostap, adhoc, or monitor modes
367 * o enable promiscuous mode according to the interface state
369 * - when operating in adhoc mode so the 802.11 layer creates
370 * node table entries for peers,
371 * - when operating in station mode for collecting rssi data when
372 * the station is otherwise quiet, or
373 * - when operating as a repeater so we see repeater-sta beacons
377 u32
ath_calcrxfilter(struct ath_softc
*sc
)
381 rfilt
= ATH9K_RX_FILTER_UCAST
| ATH9K_RX_FILTER_BCAST
382 | ATH9K_RX_FILTER_MCAST
;
384 if (sc
->rx
.rxfilter
& FIF_PROBE_REQ
)
385 rfilt
|= ATH9K_RX_FILTER_PROBEREQ
;
388 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
389 * mode interface or when in monitor mode. AP mode does not need this
390 * since it receives all in-BSS frames anyway.
392 if (sc
->sc_ah
->is_monitoring
)
393 rfilt
|= ATH9K_RX_FILTER_PROM
;
395 if (sc
->rx
.rxfilter
& FIF_CONTROL
)
396 rfilt
|= ATH9K_RX_FILTER_CONTROL
;
398 if ((sc
->sc_ah
->opmode
== NL80211_IFTYPE_STATION
) &&
400 !(sc
->rx
.rxfilter
& FIF_BCN_PRBRESP_PROMISC
))
401 rfilt
|= ATH9K_RX_FILTER_MYBEACON
;
403 rfilt
|= ATH9K_RX_FILTER_BEACON
;
405 if ((sc
->sc_ah
->opmode
== NL80211_IFTYPE_AP
) ||
406 (sc
->rx
.rxfilter
& FIF_PSPOLL
))
407 rfilt
|= ATH9K_RX_FILTER_PSPOLL
;
409 if (conf_is_ht(&sc
->hw
->conf
))
410 rfilt
|= ATH9K_RX_FILTER_COMP_BAR
;
412 if (sc
->nvifs
> 1 || (sc
->rx
.rxfilter
& FIF_OTHER_BSS
)) {
413 /* This is needed for older chips */
414 if (sc
->sc_ah
->hw_version
.macVersion
<= AR_SREV_VERSION_9160
)
415 rfilt
|= ATH9K_RX_FILTER_PROM
;
416 rfilt
|= ATH9K_RX_FILTER_MCAST_BCAST_ALL
;
419 if (AR_SREV_9550(sc
->sc_ah
))
420 rfilt
|= ATH9K_RX_FILTER_4ADDRESS
;
426 int ath_startrecv(struct ath_softc
*sc
)
428 struct ath_hw
*ah
= sc
->sc_ah
;
429 struct ath_buf
*bf
, *tbf
;
431 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
432 ath_edma_start_recv(sc
);
436 if (list_empty(&sc
->rx
.rxbuf
))
439 sc
->rx
.rxlink
= NULL
;
440 list_for_each_entry_safe(bf
, tbf
, &sc
->rx
.rxbuf
, list
) {
441 ath_rx_buf_link(sc
, bf
);
444 /* We could have deleted elements so the list may be empty now */
445 if (list_empty(&sc
->rx
.rxbuf
))
448 bf
= list_first_entry(&sc
->rx
.rxbuf
, struct ath_buf
, list
);
449 ath9k_hw_putrxbuf(ah
, bf
->bf_daddr
);
454 ath9k_hw_startpcureceive(ah
, !!(sc
->hw
->conf
.flags
& IEEE80211_CONF_OFFCHANNEL
));
459 static void ath_flushrecv(struct ath_softc
*sc
)
461 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
462 ath_rx_tasklet(sc
, 1, true);
463 ath_rx_tasklet(sc
, 1, false);
466 bool ath_stoprecv(struct ath_softc
*sc
)
468 struct ath_hw
*ah
= sc
->sc_ah
;
469 bool stopped
, reset
= false;
471 ath9k_hw_abortpcurecv(ah
);
472 ath9k_hw_setrxfilter(ah
, 0);
473 stopped
= ath9k_hw_stopdmarecv(ah
, &reset
);
477 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
478 ath_edma_stop_recv(sc
);
480 sc
->rx
.rxlink
= NULL
;
482 if (!(ah
->ah_flags
& AH_UNPLUGGED
) &&
483 unlikely(!stopped
)) {
484 ath_err(ath9k_hw_common(sc
->sc_ah
),
485 "Could not stop RX, we could be "
486 "confusing the DMA engine when we start RX up\n");
487 ATH_DBG_WARN_ON_ONCE(!stopped
);
489 return stopped
&& !reset
;
492 static bool ath_beacon_dtim_pending_cab(struct sk_buff
*skb
)
494 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
495 struct ieee80211_mgmt
*mgmt
;
496 u8
*pos
, *end
, id
, elen
;
497 struct ieee80211_tim_ie
*tim
;
499 mgmt
= (struct ieee80211_mgmt
*)skb
->data
;
500 pos
= mgmt
->u
.beacon
.variable
;
501 end
= skb
->data
+ skb
->len
;
503 while (pos
+ 2 < end
) {
506 if (pos
+ elen
> end
)
509 if (id
== WLAN_EID_TIM
) {
510 if (elen
< sizeof(*tim
))
512 tim
= (struct ieee80211_tim_ie
*) pos
;
513 if (tim
->dtim_count
!= 0)
515 return tim
->bitmap_ctrl
& 0x01;
524 static void ath_rx_ps_beacon(struct ath_softc
*sc
, struct sk_buff
*skb
)
526 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
528 if (skb
->len
< 24 + 8 + 2 + 2)
531 sc
->ps_flags
&= ~PS_WAIT_FOR_BEACON
;
533 if (sc
->ps_flags
& PS_BEACON_SYNC
) {
534 sc
->ps_flags
&= ~PS_BEACON_SYNC
;
536 "Reconfigure Beacon timers based on timestamp from the AP\n");
537 ath9k_set_beacon(sc
);
540 if (ath_beacon_dtim_pending_cab(skb
)) {
542 * Remain awake waiting for buffered broadcast/multicast
543 * frames. If the last broadcast/multicast frame is not
544 * received properly, the next beacon frame will work as
545 * a backup trigger for returning into NETWORK SLEEP state,
546 * so we are waiting for it as well.
549 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
550 sc
->ps_flags
|= PS_WAIT_FOR_CAB
| PS_WAIT_FOR_BEACON
;
554 if (sc
->ps_flags
& PS_WAIT_FOR_CAB
) {
556 * This can happen if a broadcast frame is dropped or the AP
557 * fails to send a frame indicating that all CAB frames have
560 sc
->ps_flags
&= ~PS_WAIT_FOR_CAB
;
561 ath_dbg(common
, PS
, "PS wait for CAB frames timed out\n");
565 static void ath_rx_ps(struct ath_softc
*sc
, struct sk_buff
*skb
, bool mybeacon
)
567 struct ieee80211_hdr
*hdr
;
568 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
570 hdr
= (struct ieee80211_hdr
*)skb
->data
;
572 /* Process Beacon and CAB receive in PS state */
573 if (((sc
->ps_flags
& PS_WAIT_FOR_BEACON
) || ath9k_check_auto_sleep(sc
))
575 ath_rx_ps_beacon(sc
, skb
);
576 } else if ((sc
->ps_flags
& PS_WAIT_FOR_CAB
) &&
577 (ieee80211_is_data(hdr
->frame_control
) ||
578 ieee80211_is_action(hdr
->frame_control
)) &&
579 is_multicast_ether_addr(hdr
->addr1
) &&
580 !ieee80211_has_moredata(hdr
->frame_control
)) {
582 * No more broadcast/multicast frames to be received at this
585 sc
->ps_flags
&= ~(PS_WAIT_FOR_CAB
| PS_WAIT_FOR_BEACON
);
587 "All PS CAB frames received, back to sleep\n");
588 } else if ((sc
->ps_flags
& PS_WAIT_FOR_PSPOLL_DATA
) &&
589 !is_multicast_ether_addr(hdr
->addr1
) &&
590 !ieee80211_has_morefrags(hdr
->frame_control
)) {
591 sc
->ps_flags
&= ~PS_WAIT_FOR_PSPOLL_DATA
;
593 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
594 sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
596 PS_WAIT_FOR_PSPOLL_DATA
|
597 PS_WAIT_FOR_TX_ACK
));
601 static bool ath_edma_get_buffers(struct ath_softc
*sc
,
602 enum ath9k_rx_qtype qtype
,
603 struct ath_rx_status
*rs
,
604 struct ath_buf
**dest
)
606 struct ath_rx_edma
*rx_edma
= &sc
->rx
.rx_edma
[qtype
];
607 struct ath_hw
*ah
= sc
->sc_ah
;
608 struct ath_common
*common
= ath9k_hw_common(ah
);
613 skb
= skb_peek(&rx_edma
->rx_fifo
);
617 bf
= SKB_CB_ATHBUF(skb
);
620 dma_sync_single_for_cpu(sc
->dev
, bf
->bf_buf_addr
,
621 common
->rx_bufsize
, DMA_FROM_DEVICE
);
623 ret
= ath9k_hw_process_rxdesc_edma(ah
, rs
, skb
->data
);
624 if (ret
== -EINPROGRESS
) {
625 /*let device gain the buffer again*/
626 dma_sync_single_for_device(sc
->dev
, bf
->bf_buf_addr
,
627 common
->rx_bufsize
, DMA_FROM_DEVICE
);
631 __skb_unlink(skb
, &rx_edma
->rx_fifo
);
632 if (ret
== -EINVAL
) {
633 /* corrupt descriptor, skip this one and the following one */
634 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
635 ath_rx_edma_buf_link(sc
, qtype
);
637 skb
= skb_peek(&rx_edma
->rx_fifo
);
639 bf
= SKB_CB_ATHBUF(skb
);
642 __skb_unlink(skb
, &rx_edma
->rx_fifo
);
643 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
644 ath_rx_edma_buf_link(sc
, qtype
);
654 static struct ath_buf
*ath_edma_get_next_rx_buf(struct ath_softc
*sc
,
655 struct ath_rx_status
*rs
,
656 enum ath9k_rx_qtype qtype
)
658 struct ath_buf
*bf
= NULL
;
660 while (ath_edma_get_buffers(sc
, qtype
, rs
, &bf
)) {
669 static struct ath_buf
*ath_get_next_rx_buf(struct ath_softc
*sc
,
670 struct ath_rx_status
*rs
)
672 struct ath_hw
*ah
= sc
->sc_ah
;
673 struct ath_common
*common
= ath9k_hw_common(ah
);
678 if (list_empty(&sc
->rx
.rxbuf
)) {
679 sc
->rx
.rxlink
= NULL
;
683 bf
= list_first_entry(&sc
->rx
.rxbuf
, struct ath_buf
, list
);
687 * Must provide the virtual address of the current
688 * descriptor, the physical address, and the virtual
689 * address of the next descriptor in the h/w chain.
690 * This allows the HAL to look ahead to see if the
691 * hardware is done with a descriptor by checking the
692 * done bit in the following descriptor and the address
693 * of the current descriptor the DMA engine is working
694 * on. All this is necessary because of our use of
695 * a self-linked list to avoid rx overruns.
697 ret
= ath9k_hw_rxprocdesc(ah
, ds
, rs
);
698 if (ret
== -EINPROGRESS
) {
699 struct ath_rx_status trs
;
701 struct ath_desc
*tds
;
703 memset(&trs
, 0, sizeof(trs
));
704 if (list_is_last(&bf
->list
, &sc
->rx
.rxbuf
)) {
705 sc
->rx
.rxlink
= NULL
;
709 tbf
= list_entry(bf
->list
.next
, struct ath_buf
, list
);
712 * On some hardware the descriptor status words could
713 * get corrupted, including the done bit. Because of
714 * this, check if the next descriptor's done bit is
717 * If the next descriptor's done bit is set, the current
718 * descriptor has been corrupted. Force s/w to discard
719 * this descriptor and continue...
723 ret
= ath9k_hw_rxprocdesc(ah
, tds
, &trs
);
724 if (ret
== -EINPROGRESS
)
733 * Synchronize the DMA transfer with CPU before
734 * 1. accessing the frame
735 * 2. requeueing the same buffer to h/w
737 dma_sync_single_for_cpu(sc
->dev
, bf
->bf_buf_addr
,
744 /* Assumes you've already done the endian to CPU conversion */
745 static bool ath9k_rx_accept(struct ath_common
*common
,
746 struct ieee80211_hdr
*hdr
,
747 struct ieee80211_rx_status
*rxs
,
748 struct ath_rx_status
*rx_stats
,
751 struct ath_softc
*sc
= (struct ath_softc
*) common
->priv
;
752 bool is_mc
, is_valid_tkip
, strip_mic
, mic_error
;
753 struct ath_hw
*ah
= common
->ah
;
755 u8 rx_status_len
= ah
->caps
.rx_status_len
;
757 fc
= hdr
->frame_control
;
759 is_mc
= !!is_multicast_ether_addr(hdr
->addr1
);
760 is_valid_tkip
= rx_stats
->rs_keyix
!= ATH9K_RXKEYIX_INVALID
&&
761 test_bit(rx_stats
->rs_keyix
, common
->tkip_keymap
);
762 strip_mic
= is_valid_tkip
&& ieee80211_is_data(fc
) &&
763 ieee80211_has_protected(fc
) &&
764 !(rx_stats
->rs_status
&
765 (ATH9K_RXERR_DECRYPT
| ATH9K_RXERR_CRC
| ATH9K_RXERR_MIC
|
766 ATH9K_RXERR_KEYMISS
));
769 * Key miss events are only relevant for pairwise keys where the
770 * descriptor does contain a valid key index. This has been observed
771 * mostly with CCMP encryption.
773 if (rx_stats
->rs_keyix
== ATH9K_RXKEYIX_INVALID
||
774 !test_bit(rx_stats
->rs_keyix
, common
->ccmp_keymap
))
775 rx_stats
->rs_status
&= ~ATH9K_RXERR_KEYMISS
;
777 if (!rx_stats
->rs_datalen
) {
778 RX_STAT_INC(rx_len_err
);
783 * rs_status follows rs_datalen so if rs_datalen is too large
784 * we can take a hint that hardware corrupted it, so ignore
787 if (rx_stats
->rs_datalen
> (common
->rx_bufsize
- rx_status_len
)) {
788 RX_STAT_INC(rx_len_err
);
792 /* Only use error bits from the last fragment */
793 if (rx_stats
->rs_more
)
796 mic_error
= is_valid_tkip
&& !ieee80211_is_ctl(fc
) &&
797 !ieee80211_has_morefrags(fc
) &&
798 !(le16_to_cpu(hdr
->seq_ctrl
) & IEEE80211_SCTL_FRAG
) &&
799 (rx_stats
->rs_status
& ATH9K_RXERR_MIC
);
802 * The rx_stats->rs_status will not be set until the end of the
803 * chained descriptors so it can be ignored if rs_more is set. The
804 * rs_more will be false at the last element of the chained
807 if (rx_stats
->rs_status
!= 0) {
810 if (rx_stats
->rs_status
& ATH9K_RXERR_CRC
) {
811 rxs
->flag
|= RX_FLAG_FAILED_FCS_CRC
;
814 if (rx_stats
->rs_status
& ATH9K_RXERR_PHY
)
817 if ((rx_stats
->rs_status
& ATH9K_RXERR_DECRYPT
) ||
818 (!is_mc
&& (rx_stats
->rs_status
& ATH9K_RXERR_KEYMISS
))) {
819 *decrypt_error
= true;
824 * Reject error frames with the exception of
825 * decryption and MIC failures. For monitor mode,
826 * we also ignore the CRC error.
828 status_mask
= ATH9K_RXERR_DECRYPT
| ATH9K_RXERR_MIC
|
831 if (ah
->is_monitoring
&& (sc
->rx
.rxfilter
& FIF_FCSFAIL
))
832 status_mask
|= ATH9K_RXERR_CRC
;
834 if (rx_stats
->rs_status
& ~status_mask
)
839 * For unicast frames the MIC error bit can have false positives,
840 * so all MIC error reports need to be validated in software.
841 * False negatives are not common, so skip software verification
842 * if the hardware considers the MIC valid.
845 rxs
->flag
|= RX_FLAG_MMIC_STRIPPED
;
846 else if (is_mc
&& mic_error
)
847 rxs
->flag
|= RX_FLAG_MMIC_ERROR
;
852 static int ath9k_process_rate(struct ath_common
*common
,
853 struct ieee80211_hw
*hw
,
854 struct ath_rx_status
*rx_stats
,
855 struct ieee80211_rx_status
*rxs
)
857 struct ieee80211_supported_band
*sband
;
858 enum ieee80211_band band
;
860 struct ath_softc __maybe_unused
*sc
= common
->priv
;
862 band
= hw
->conf
.channel
->band
;
863 sband
= hw
->wiphy
->bands
[band
];
865 if (rx_stats
->rs_rate
& 0x80) {
867 rxs
->flag
|= RX_FLAG_HT
;
868 if (rx_stats
->rs_flags
& ATH9K_RX_2040
)
869 rxs
->flag
|= RX_FLAG_40MHZ
;
870 if (rx_stats
->rs_flags
& ATH9K_RX_GI
)
871 rxs
->flag
|= RX_FLAG_SHORT_GI
;
872 rxs
->rate_idx
= rx_stats
->rs_rate
& 0x7f;
876 for (i
= 0; i
< sband
->n_bitrates
; i
++) {
877 if (sband
->bitrates
[i
].hw_value
== rx_stats
->rs_rate
) {
881 if (sband
->bitrates
[i
].hw_value_short
== rx_stats
->rs_rate
) {
882 rxs
->flag
|= RX_FLAG_SHORTPRE
;
889 * No valid hardware bitrate found -- we should not get here
890 * because hardware has already validated this frame as OK.
893 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
895 RX_STAT_INC(rx_rate_err
);
899 static void ath9k_process_rssi(struct ath_common
*common
,
900 struct ieee80211_hw
*hw
,
901 struct ieee80211_hdr
*hdr
,
902 struct ath_rx_status
*rx_stats
)
904 struct ath_softc
*sc
= hw
->priv
;
905 struct ath_hw
*ah
= common
->ah
;
907 int rssi
= rx_stats
->rs_rssi
;
909 if (!rx_stats
->is_mybeacon
||
910 ((ah
->opmode
!= NL80211_IFTYPE_STATION
) &&
911 (ah
->opmode
!= NL80211_IFTYPE_ADHOC
)))
914 if (rx_stats
->rs_rssi
!= ATH9K_RSSI_BAD
&& !rx_stats
->rs_moreaggr
)
915 ATH_RSSI_LPF(sc
->last_rssi
, rx_stats
->rs_rssi
);
917 last_rssi
= sc
->last_rssi
;
918 if (likely(last_rssi
!= ATH_RSSI_DUMMY_MARKER
))
919 rssi
= ATH_EP_RND(last_rssi
, ATH_RSSI_EP_MULTIPLIER
);
923 /* Update Beacon RSSI, this is used by ANI. */
924 ah
->stats
.avgbrssi
= rssi
;
928 * For Decrypt or Demic errors, we only mark packet status here and always push
929 * up the frame up to let mac80211 handle the actual error case, be it no
930 * decryption key or real decryption error. This let us keep statistics there.
932 static int ath9k_rx_skb_preprocess(struct ath_common
*common
,
933 struct ieee80211_hw
*hw
,
934 struct ieee80211_hdr
*hdr
,
935 struct ath_rx_status
*rx_stats
,
936 struct ieee80211_rx_status
*rx_status
,
939 struct ath_hw
*ah
= common
->ah
;
942 * everything but the rate is checked here, the rate check is done
943 * separately to avoid doing two lookups for a rate for each frame.
945 if (!ath9k_rx_accept(common
, hdr
, rx_status
, rx_stats
, decrypt_error
))
948 /* Only use status info from the last fragment */
949 if (rx_stats
->rs_more
)
952 ath9k_process_rssi(common
, hw
, hdr
, rx_stats
);
954 if (ath9k_process_rate(common
, hw
, rx_stats
, rx_status
))
957 rx_status
->band
= hw
->conf
.channel
->band
;
958 rx_status
->freq
= hw
->conf
.channel
->center_freq
;
959 rx_status
->signal
= ah
->noise
+ rx_stats
->rs_rssi
;
960 rx_status
->antenna
= rx_stats
->rs_antenna
;
961 rx_status
->flag
|= RX_FLAG_MACTIME_END
;
962 if (rx_stats
->rs_moreaggr
)
963 rx_status
->flag
|= RX_FLAG_NO_SIGNAL_VAL
;
968 static void ath9k_rx_skb_postprocess(struct ath_common
*common
,
970 struct ath_rx_status
*rx_stats
,
971 struct ieee80211_rx_status
*rxs
,
974 struct ath_hw
*ah
= common
->ah
;
975 struct ieee80211_hdr
*hdr
;
976 int hdrlen
, padpos
, padsize
;
980 /* see if any padding is done by the hw and remove it */
981 hdr
= (struct ieee80211_hdr
*) skb
->data
;
982 hdrlen
= ieee80211_get_hdrlen_from_skb(skb
);
983 fc
= hdr
->frame_control
;
984 padpos
= ath9k_cmn_padpos(hdr
->frame_control
);
986 /* The MAC header is padded to have 32-bit boundary if the
987 * packet payload is non-zero. The general calculation for
988 * padsize would take into account odd header lengths:
989 * padsize = (4 - padpos % 4) % 4; However, since only
990 * even-length headers are used, padding can only be 0 or 2
991 * bytes and we can optimize this a bit. In addition, we must
992 * not try to remove padding from short control frames that do
993 * not have payload. */
994 padsize
= padpos
& 3;
995 if (padsize
&& skb
->len
>=padpos
+padsize
+FCS_LEN
) {
996 memmove(skb
->data
+ padsize
, skb
->data
, padpos
);
997 skb_pull(skb
, padsize
);
1000 keyix
= rx_stats
->rs_keyix
;
1002 if (!(keyix
== ATH9K_RXKEYIX_INVALID
) && !decrypt_error
&&
1003 ieee80211_has_protected(fc
)) {
1004 rxs
->flag
|= RX_FLAG_DECRYPTED
;
1005 } else if (ieee80211_has_protected(fc
)
1006 && !decrypt_error
&& skb
->len
>= hdrlen
+ 4) {
1007 keyix
= skb
->data
[hdrlen
+ 3] >> 6;
1009 if (test_bit(keyix
, common
->keymap
))
1010 rxs
->flag
|= RX_FLAG_DECRYPTED
;
1012 if (ah
->sw_mgmt_crypto
&&
1013 (rxs
->flag
& RX_FLAG_DECRYPTED
) &&
1014 ieee80211_is_mgmt(fc
))
1015 /* Use software decrypt for management frames. */
1016 rxs
->flag
&= ~RX_FLAG_DECRYPTED
;
1019 #ifdef CONFIG_ATH9K_DEBUGFS
1020 static s8
fix_rssi_inv_only(u8 rssi_val
)
1022 if (rssi_val
== 128)
1024 return (s8
) rssi_val
;
1028 /* returns 1 if this was a spectral frame, even if not handled. */
1029 static int ath_process_fft(struct ath_softc
*sc
, struct ieee80211_hdr
*hdr
,
1030 struct ath_rx_status
*rs
, u64 tsf
)
1032 #ifdef CONFIG_ATH9K_DEBUGFS
1033 struct ath_hw
*ah
= sc
->sc_ah
;
1034 u8 bins
[SPECTRAL_HT20_NUM_BINS
];
1035 u8
*vdata
= (u8
*)hdr
;
1036 struct fft_sample_ht20 fft_sample
;
1037 struct ath_radar_info
*radar_info
;
1038 struct ath_ht20_mag_info
*mag_info
;
1039 int len
= rs
->rs_datalen
;
1042 /* AR9280 and before report via ATH9K_PHYERR_RADAR, AR93xx and newer
1043 * via ATH9K_PHYERR_SPECTRAL. Haven't seen ATH9K_PHYERR_FALSE_RADAR_EXT
1044 * yet, but this is supposed to be possible as well.
1046 if (rs
->rs_phyerr
!= ATH9K_PHYERR_RADAR
&&
1047 rs
->rs_phyerr
!= ATH9K_PHYERR_FALSE_RADAR_EXT
&&
1048 rs
->rs_phyerr
!= ATH9K_PHYERR_SPECTRAL
)
1051 /* check if spectral scan bit is set. This does not have to be checked
1052 * if received through a SPECTRAL phy error, but shouldn't hurt.
1054 radar_info
= ((struct ath_radar_info
*)&vdata
[len
]) - 1;
1055 if (!(radar_info
->pulse_bw_info
& SPECTRAL_SCAN_BITMASK
))
1058 /* Variation in the data length is possible and will be fixed later.
1059 * Note that we only support HT20 for now.
1061 * TODO: add HT20_40 support as well.
1063 if ((len
> SPECTRAL_HT20_TOTAL_DATA_LEN
+ 2) ||
1064 (len
< SPECTRAL_HT20_TOTAL_DATA_LEN
- 1))
1067 fft_sample
.tlv
.type
= ATH_FFT_SAMPLE_HT20
;
1068 fft_sample
.tlv
.length
= sizeof(fft_sample
) - sizeof(fft_sample
.tlv
);
1069 fft_sample
.tlv
.length
= __cpu_to_be16(fft_sample
.tlv
.length
);
1071 fft_sample
.freq
= __cpu_to_be16(ah
->curchan
->chan
->center_freq
);
1072 fft_sample
.rssi
= fix_rssi_inv_only(rs
->rs_rssi_ctl0
);
1073 fft_sample
.noise
= ah
->noise
;
1075 switch (len
- SPECTRAL_HT20_TOTAL_DATA_LEN
) {
1077 /* length correct, nothing to do. */
1078 memcpy(bins
, vdata
, SPECTRAL_HT20_NUM_BINS
);
1081 /* first byte missing, duplicate it. */
1082 memcpy(&bins
[1], vdata
, SPECTRAL_HT20_NUM_BINS
- 1);
1086 /* MAC added 2 extra bytes at bin 30 and 32, remove them. */
1087 memcpy(bins
, vdata
, 30);
1088 bins
[30] = vdata
[31];
1089 memcpy(&bins
[31], &vdata
[33], SPECTRAL_HT20_NUM_BINS
- 31);
1092 /* MAC added 2 extra bytes AND first byte is missing. */
1094 memcpy(&bins
[0], vdata
, 30);
1095 bins
[31] = vdata
[31];
1096 memcpy(&bins
[32], &vdata
[33], SPECTRAL_HT20_NUM_BINS
- 32);
1102 /* DC value (value in the middle) is the blind spot of the spectral
1103 * sample and invalid, interpolate it.
1105 dc_pos
= SPECTRAL_HT20_NUM_BINS
/ 2;
1106 bins
[dc_pos
] = (bins
[dc_pos
+ 1] + bins
[dc_pos
- 1]) / 2;
1108 /* mag data is at the end of the frame, in front of radar_info */
1109 mag_info
= ((struct ath_ht20_mag_info
*)radar_info
) - 1;
1111 /* copy raw bins without scaling them */
1112 memcpy(fft_sample
.data
, bins
, SPECTRAL_HT20_NUM_BINS
);
1113 fft_sample
.max_exp
= mag_info
->max_exp
& 0xf;
1115 fft_sample
.max_magnitude
= spectral_max_magnitude(mag_info
->all_bins
);
1116 fft_sample
.max_magnitude
= __cpu_to_be16(fft_sample
.max_magnitude
);
1117 fft_sample
.max_index
= spectral_max_index(mag_info
->all_bins
);
1118 fft_sample
.bitmap_weight
= spectral_bitmap_weight(mag_info
->all_bins
);
1119 fft_sample
.tsf
= __cpu_to_be64(tsf
);
1121 ath_debug_send_fft_sample(sc
, &fft_sample
.tlv
);
1128 static void ath9k_apply_ampdu_details(struct ath_softc
*sc
,
1129 struct ath_rx_status
*rs
, struct ieee80211_rx_status
*rxs
)
1131 if (rs
->rs_isaggr
) {
1132 rxs
->flag
|= RX_FLAG_AMPDU_DETAILS
| RX_FLAG_AMPDU_LAST_KNOWN
;
1134 rxs
->ampdu_reference
= sc
->rx
.ampdu_ref
;
1136 if (!rs
->rs_moreaggr
) {
1137 rxs
->flag
|= RX_FLAG_AMPDU_IS_LAST
;
1141 if (rs
->rs_flags
& ATH9K_RX_DELIM_CRC_PRE
)
1142 rxs
->flag
|= RX_FLAG_AMPDU_DELIM_CRC_ERROR
;
1146 int ath_rx_tasklet(struct ath_softc
*sc
, int flush
, bool hp
)
1149 struct sk_buff
*skb
= NULL
, *requeue_skb
, *hdr_skb
;
1150 struct ieee80211_rx_status
*rxs
;
1151 struct ath_hw
*ah
= sc
->sc_ah
;
1152 struct ath_common
*common
= ath9k_hw_common(ah
);
1153 struct ieee80211_hw
*hw
= sc
->hw
;
1154 struct ieee80211_hdr
*hdr
;
1156 struct ath_rx_status rs
;
1157 enum ath9k_rx_qtype qtype
;
1158 bool edma
= !!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
);
1160 u8 rx_status_len
= ah
->caps
.rx_status_len
;
1163 unsigned long flags
;
1166 dma_type
= DMA_BIDIRECTIONAL
;
1168 dma_type
= DMA_FROM_DEVICE
;
1170 qtype
= hp
? ATH9K_RX_QUEUE_HP
: ATH9K_RX_QUEUE_LP
;
1172 tsf
= ath9k_hw_gettsf64(ah
);
1173 tsf_lower
= tsf
& 0xffffffff;
1176 bool decrypt_error
= false;
1178 memset(&rs
, 0, sizeof(rs
));
1180 bf
= ath_edma_get_next_rx_buf(sc
, &rs
, qtype
);
1182 bf
= ath_get_next_rx_buf(sc
, &rs
);
1192 * Take frame header from the first fragment and RX status from
1196 hdr_skb
= sc
->rx
.frag
;
1200 hdr
= (struct ieee80211_hdr
*) (hdr_skb
->data
+ rx_status_len
);
1201 rxs
= IEEE80211_SKB_RXCB(hdr_skb
);
1202 if (ieee80211_is_beacon(hdr
->frame_control
)) {
1203 RX_STAT_INC(rx_beacons
);
1204 if (!is_zero_ether_addr(common
->curbssid
) &&
1205 ether_addr_equal(hdr
->addr3
, common
->curbssid
))
1206 rs
.is_mybeacon
= true;
1208 rs
.is_mybeacon
= false;
1211 rs
.is_mybeacon
= false;
1213 if (ieee80211_is_data_present(hdr
->frame_control
) &&
1214 !ieee80211_is_qos_nullfunc(hdr
->frame_control
))
1217 ath_debug_stat_rx(sc
, &rs
);
1219 memset(rxs
, 0, sizeof(struct ieee80211_rx_status
));
1221 rxs
->mactime
= (tsf
& ~0xffffffffULL
) | rs
.rs_tstamp
;
1222 if (rs
.rs_tstamp
> tsf_lower
&&
1223 unlikely(rs
.rs_tstamp
- tsf_lower
> 0x10000000))
1224 rxs
->mactime
-= 0x100000000ULL
;
1226 if (rs
.rs_tstamp
< tsf_lower
&&
1227 unlikely(tsf_lower
- rs
.rs_tstamp
> 0x10000000))
1228 rxs
->mactime
+= 0x100000000ULL
;
1230 if (rs
.rs_status
& ATH9K_RXERR_PHY
) {
1231 if (ath_process_fft(sc
, hdr
, &rs
, rxs
->mactime
)) {
1232 RX_STAT_INC(rx_spectral
);
1233 goto requeue_drop_frag
;
1237 retval
= ath9k_rx_skb_preprocess(common
, hw
, hdr
, &rs
,
1238 rxs
, &decrypt_error
);
1240 goto requeue_drop_frag
;
1242 if (rs
.is_mybeacon
) {
1243 sc
->hw_busy_count
= 0;
1244 ath_start_rx_poll(sc
, 3);
1246 /* Ensure we always have an skb to requeue once we are done
1247 * processing the current buffer's skb */
1248 requeue_skb
= ath_rxbuf_alloc(common
, common
->rx_bufsize
, GFP_ATOMIC
);
1250 /* If there is no memory we ignore the current RX'd frame,
1251 * tell hardware it can give us a new frame using the old
1252 * skb and put it at the tail of the sc->rx.rxbuf list for
1255 RX_STAT_INC(rx_oom_err
);
1256 goto requeue_drop_frag
;
1259 /* Unmap the frame */
1260 dma_unmap_single(sc
->dev
, bf
->bf_buf_addr
,
1264 skb_put(skb
, rs
.rs_datalen
+ ah
->caps
.rx_status_len
);
1265 if (ah
->caps
.rx_status_len
)
1266 skb_pull(skb
, ah
->caps
.rx_status_len
);
1269 ath9k_rx_skb_postprocess(common
, hdr_skb
, &rs
,
1270 rxs
, decrypt_error
);
1272 /* We will now give hardware our shiny new allocated skb */
1273 bf
->bf_mpdu
= requeue_skb
;
1274 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, requeue_skb
->data
,
1277 if (unlikely(dma_mapping_error(sc
->dev
,
1278 bf
->bf_buf_addr
))) {
1279 dev_kfree_skb_any(requeue_skb
);
1281 bf
->bf_buf_addr
= 0;
1282 ath_err(common
, "dma_mapping_error() on RX\n");
1283 ieee80211_rx(hw
, skb
);
1288 RX_STAT_INC(rx_frags
);
1290 * rs_more indicates chained descriptors which can be
1291 * used to link buffers together for a sort of
1292 * scatter-gather operation.
1295 /* too many fragments - cannot handle frame */
1296 dev_kfree_skb_any(sc
->rx
.frag
);
1297 dev_kfree_skb_any(skb
);
1298 RX_STAT_INC(rx_too_many_frags_err
);
1306 int space
= skb
->len
- skb_tailroom(hdr_skb
);
1308 if (pskb_expand_head(hdr_skb
, 0, space
, GFP_ATOMIC
) < 0) {
1310 RX_STAT_INC(rx_oom_err
);
1311 goto requeue_drop_frag
;
1316 skb_copy_from_linear_data(skb
, skb_put(hdr_skb
, skb
->len
),
1318 dev_kfree_skb_any(skb
);
1323 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_ANT_DIV_COMB
) {
1326 * change the default rx antenna if rx diversity
1327 * chooses the other antenna 3 times in a row.
1329 if (sc
->rx
.defant
!= rs
.rs_antenna
) {
1330 if (++sc
->rx
.rxotherant
>= 3)
1331 ath_setdefantenna(sc
, rs
.rs_antenna
);
1333 sc
->rx
.rxotherant
= 0;
1338 if (rxs
->flag
& RX_FLAG_MMIC_STRIPPED
)
1339 skb_trim(skb
, skb
->len
- 8);
1341 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1342 if ((sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
1344 PS_WAIT_FOR_PSPOLL_DATA
)) ||
1345 ath9k_check_auto_sleep(sc
))
1346 ath_rx_ps(sc
, skb
, rs
.is_mybeacon
);
1347 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1349 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_ANT_DIV_COMB
) && sc
->ant_rx
== 3)
1350 ath_ant_comb_scan(sc
, &rs
);
1352 ath9k_apply_ampdu_details(sc
, &rs
, rxs
);
1354 ieee80211_rx(hw
, skb
);
1358 dev_kfree_skb_any(sc
->rx
.frag
);
1362 list_add_tail(&bf
->list
, &sc
->rx
.rxbuf
);
1367 ath_rx_edma_buf_link(sc
, qtype
);
1369 ath_rx_buf_link(sc
, bf
);
1374 if (!(ah
->imask
& ATH9K_INT_RXEOL
)) {
1375 ah
->imask
|= (ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
1376 ath9k_hw_set_interrupts(ah
);