2 * Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
15 * 3. Neither the names of the above-listed copyright holders nor the names
16 * of any contributors may be used to endorse or promote products derived
17 * from this software without specific prior written permission.
19 * Alternatively, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") version 2 as published by the Free
21 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGES.
39 * Defintions for the Atheros Wireless LAN controller driver.
41 #ifndef _DEV_ATH_ATHVAR_H
42 #define _DEV_ATH_ATHVAR_H
44 #include <linux/interrupt.h>
45 #include <linux/list.h>
46 #include <linux/wireless.h>
47 #include <linux/if_ether.h>
52 #define ATH_RXBUF 40 /* number of RX buffers */
53 #define ATH_TXBUF 200 /* number of TX buffers */
54 #define ATH_BCBUF 1 /* number of beacon buffers */
57 struct list_head list
;
58 unsigned int flags
; /* tx descriptor flags */
59 struct ath5k_desc
*desc
; /* virtual addr of desc */
60 dma_addr_t daddr
; /* physical addr of desc */
61 struct sk_buff
*skb
; /* skbuff for buf */
62 dma_addr_t skbaddr
;/* physical addr of skb data */
66 * Data transmit queue state. One of these exists for each
67 * hardware transmit queue. Packets sent to us from above
68 * are assigned to queues based on their priority. Not all
69 * devices support a complete set of hardware transmit queues.
70 * For those devices the array sc_ac2q will map multiple
71 * priorities to fewer hardware queues (typically all to one
75 unsigned int qnum
; /* hardware q number */
76 u32
*link
; /* link ptr in last TX desc */
77 struct list_head q
; /* transmit queue */
78 spinlock_t lock
; /* lock on q and link */
83 #define ATH_CHAN_MAX (26+26+26+200+200)
85 #define ATH_CHAN_MAX (14+14+14+252+20)
88 /* Software Carrier, keeps track of the driver state
89 * associated with an instance of a device */
91 struct pci_dev
*pdev
; /* for dma mapping */
92 void __iomem
*iobase
; /* address of the device */
93 struct mutex lock
; /* dev-level lock */
94 /* FIXME: how many does it really need? */
95 struct ieee80211_tx_queue_stats tx_stats
[16];
96 struct ieee80211_low_level_stats ll_stats
;
97 struct ieee80211_hw
*hw
; /* IEEE 802.11 common */
98 struct ieee80211_supported_band sbands
[IEEE80211_NUM_BANDS
];
99 struct ieee80211_channel channels
[ATH_CHAN_MAX
];
100 struct ieee80211_rate rates
[AR5K_MAX_RATES
* IEEE80211_NUM_BANDS
];
101 enum ieee80211_if_types opmode
;
102 struct ath5k_hw
*ah
; /* Atheros HW */
104 struct ieee80211_supported_band
*curband
;
111 #ifdef CONFIG_ATH5K_DEBUG
112 struct ath5k_dbg_info debug
; /* debug info */
113 #endif /* CONFIG_ATH5K_DEBUG */
115 struct ath5k_buf
*bufptr
; /* allocated buffer ptr */
116 struct ath5k_desc
*desc
; /* TX/RX descriptors */
117 dma_addr_t desc_daddr
; /* DMA (physical) address */
118 size_t desc_len
; /* size of TX/RX descriptors */
119 u16 cachelsz
; /* cache line size */
121 DECLARE_BITMAP(status
, 6);
122 #define ATH_STAT_INVALID 0 /* disable hardware accesses */
123 #define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
124 #define ATH_STAT_PROMISC 2
125 #define ATH_STAT_LEDBLINKING 3 /* LED blink operation active */
126 #define ATH_STAT_LEDENDBLINK 4 /* finish LED blink operation */
127 #define ATH_STAT_LEDSOFT 5 /* enable LED gpio status */
129 unsigned int filter_flags
; /* HW flags, AR5K_RX_FILTER_* */
130 unsigned int curmode
; /* current phy mode */
131 struct ieee80211_channel
*curchan
; /* current h/w channel */
133 struct ieee80211_vif
*vif
;
136 u8 rxflags
; /* radiotap rx flags */
137 u8 txflags
; /* radiotap tx flags */
138 u16 ledon
; /* softled on time */
139 u16 ledoff
; /* softled off time */
140 } hwmap
[32]; /* h/w rate ix mappings */
142 enum ath5k_int imask
; /* interrupt mask copy */
144 DECLARE_BITMAP(keymap
, AR5K_KEYCACHE_SIZE
); /* key use bit map */
146 u8 bssidmask
[ETH_ALEN
];
148 unsigned int led_pin
, /* GPIO pin for driving LED */
149 led_on
, /* pin setting for LED on */
150 led_off
; /* off time for current blink */
151 struct timer_list led_tim
; /* led off timer */
152 u8 led_rxrate
; /* current rx rate for LED */
153 u8 led_txrate
; /* current tx rate for LED */
155 struct tasklet_struct restq
; /* reset tasklet */
157 unsigned int rxbufsize
; /* rx size based on mtu */
158 struct list_head rxbuf
; /* receive buffer */
159 spinlock_t rxbuflock
;
160 u32
*rxlink
; /* link ptr in last RX desc */
161 struct tasklet_struct rxtq
; /* rx intr tasklet */
163 struct list_head txbuf
; /* transmit buffer */
164 spinlock_t txbuflock
;
165 unsigned int txbuf_len
; /* buf count in txbuf list */
166 struct ath5k_txq txqs
[2]; /* beacon and tx */
168 struct ath5k_txq
*txq
; /* beacon and tx*/
169 struct tasklet_struct txtq
; /* tx intr tasklet */
171 struct ath5k_buf
*bbuf
; /* beacon buffer */
172 unsigned int bhalq
, /* SW q for outgoing beacons */
173 bmisscount
, /* missed beacon transmits */
174 bintval
, /* beacon interval in TU */
176 unsigned int nexttbtt
; /* next beacon time in TU */
178 struct timer_list calib_tim
; /* calibration timer */
179 int power_level
; /* Requested tx power in dbm */
182 #define ath5k_hw_hasbssidmask(_ah) \
183 (ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0)
184 #define ath5k_hw_hasveol(_ah) \
185 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)