ath9k: convert to struct device
[deliverable/linux.git] / drivers / net / wireless / ath9k / beacon.c
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include "core.h"
18
19 /*
20 * This function will modify certain transmit queue properties depending on
21 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
22 * settings and channel width min/max
23 */
24 static int ath_beaconq_config(struct ath_softc *sc)
25 {
26 struct ath_hal *ah = sc->sc_ah;
27 struct ath9k_tx_queue_info qi;
28
29 ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
30 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
31 /* Always burst out beacon and CAB traffic. */
32 qi.tqi_aifs = 1;
33 qi.tqi_cwmin = 0;
34 qi.tqi_cwmax = 0;
35 } else {
36 /* Adhoc mode; important thing is to use 2x cwmin. */
37 qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs;
38 qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin;
39 qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax;
40 }
41
42 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
43 DPRINTF(sc, ATH_DBG_FATAL,
44 "unable to update h/w beacon queue parameters\n");
45 return 0;
46 } else {
47 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); /* push to h/w */
48 return 1;
49 }
50 }
51
52 static void ath_bstuck_process(struct ath_softc *sc)
53 {
54 DPRINTF(sc, ATH_DBG_BEACON,
55 "stuck beacon; resetting (bmiss count %u)\n",
56 sc->beacon.bmisscnt);
57 ath_reset(sc, false);
58 }
59
60 /*
61 * Associates the beacon frame buffer with a transmit descriptor. Will set
62 * up all required antenna switch parameters, rate codes, and channel flags.
63 * Beacons are always sent out at the lowest rate, and are not retried.
64 */
65 static void ath_beacon_setup(struct ath_softc *sc,
66 struct ath_vap *avp, struct ath_buf *bf)
67 {
68 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
69 struct ath_hal *ah = sc->sc_ah;
70 struct ath_desc *ds;
71 struct ath9k_11n_rate_series series[4];
72 struct ath_rate_table *rt;
73 int flags, antenna;
74 u8 rix, rate;
75 int ctsrate = 0;
76 int ctsduration = 0;
77
78 DPRINTF(sc, ATH_DBG_BEACON, "m %p len %u\n", skb, skb->len);
79
80 /* setup descriptors */
81 ds = bf->bf_desc;
82
83 flags = ATH9K_TXDESC_NOACK;
84
85 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
86 (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
87 ds->ds_link = bf->bf_daddr; /* self-linked */
88 flags |= ATH9K_TXDESC_VEOL;
89 /* Let hardware handle antenna switching. */
90 antenna = 0;
91 } else {
92 ds->ds_link = 0;
93 /*
94 * Switch antenna every beacon.
95 * Should only switch every beacon period, not for every
96 * SWBA's
97 * XXX assumes two antenna
98 */
99 antenna = ((sc->beacon.ast_be_xmit / sc->sc_nbcnvaps) & 1 ? 2 : 1);
100 }
101
102 ds->ds_data = bf->bf_buf_addr;
103
104 /*
105 * Calculate rate code.
106 * XXX everything at min xmit rate
107 */
108 rix = 0;
109 rt = sc->cur_rate_table;
110 rate = rt->info[rix].ratecode;
111 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
112 rate |= rt->info[rix].short_preamble;
113
114 ath9k_hw_set11n_txdesc(ah, ds,
115 skb->len + FCS_LEN, /* frame length */
116 ATH9K_PKT_TYPE_BEACON, /* Atheros packet type */
117 MAX_RATE_POWER, /* FIXME */
118 ATH9K_TXKEYIX_INVALID, /* no encryption */
119 ATH9K_KEY_TYPE_CLEAR, /* no encryption */
120 flags /* no ack,
121 veol for beacons */
122 );
123
124 /* NB: beacon's BufLen must be a multiple of 4 bytes */
125 ath9k_hw_filltxdesc(ah, ds,
126 roundup(skb->len, 4), /* buffer length */
127 true, /* first segment */
128 true, /* last segment */
129 ds /* first descriptor */
130 );
131
132 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
133 series[0].Tries = 1;
134 series[0].Rate = rate;
135 series[0].ChSel = sc->sc_tx_chainmask;
136 series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
137 ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,
138 ctsrate, ctsduration, series, 4, 0);
139 }
140
141 /* Generate beacon frame and queue cab data for a vap */
142 static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
143 {
144 struct ath_buf *bf;
145 struct ath_vap *avp;
146 struct sk_buff *skb;
147 struct ath_txq *cabq;
148 struct ieee80211_vif *vif;
149 struct ieee80211_tx_info *info;
150 int cabq_depth;
151
152 vif = sc->sc_vaps[if_id];
153 ASSERT(vif);
154
155 avp = (void *)vif->drv_priv;
156 cabq = sc->beacon.cabq;
157
158 if (avp->av_bcbuf == NULL) {
159 DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
160 avp, avp->av_bcbuf);
161 return NULL;
162 }
163
164 bf = avp->av_bcbuf;
165 skb = (struct sk_buff *)bf->bf_mpdu;
166 if (skb) {
167 pci_unmap_single(to_pci_dev(sc->dev), bf->bf_dmacontext,
168 skb->len,
169 PCI_DMA_TODEVICE);
170 dev_kfree_skb_any(skb);
171 }
172
173 skb = ieee80211_beacon_get(sc->hw, vif);
174 bf->bf_mpdu = skb;
175 if (skb == NULL)
176 return NULL;
177
178 info = IEEE80211_SKB_CB(skb);
179 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
180 /*
181 * TODO: make sure the seq# gets assigned properly (vs. other
182 * TX frames)
183 */
184 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
185 sc->tx.seq_no += 0x10;
186 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
187 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
188 }
189
190 bf->bf_buf_addr = bf->bf_dmacontext =
191 pci_map_single(to_pci_dev(sc->dev), skb->data,
192 skb->len,
193 PCI_DMA_TODEVICE);
194 if (unlikely(pci_dma_mapping_error(to_pci_dev(sc->dev),
195 bf->bf_buf_addr))) {
196 dev_kfree_skb_any(skb);
197 bf->bf_mpdu = NULL;
198 DPRINTF(sc, ATH_DBG_CONFIG,
199 "pci_dma_mapping_error() on beaconing\n");
200 return NULL;
201 }
202
203 skb = ieee80211_get_buffered_bc(sc->hw, vif);
204
205 /*
206 * if the CABQ traffic from previous DTIM is pending and the current
207 * beacon is also a DTIM.
208 * 1) if there is only one vap let the cab traffic continue.
209 * 2) if there are more than one vap and we are using staggered
210 * beacons, then drain the cabq by dropping all the frames in
211 * the cabq so that the current vaps cab traffic can be scheduled.
212 */
213 spin_lock_bh(&cabq->axq_lock);
214 cabq_depth = cabq->axq_depth;
215 spin_unlock_bh(&cabq->axq_lock);
216
217 if (skb && cabq_depth) {
218 /*
219 * Unlock the cabq lock as ath_tx_draintxq acquires
220 * the lock again which is a common function and that
221 * acquires txq lock inside.
222 */
223 if (sc->sc_nvaps > 1) {
224 ath_tx_draintxq(sc, cabq, false);
225 DPRINTF(sc, ATH_DBG_BEACON,
226 "flush previous cabq traffic\n");
227 }
228 }
229
230 /* Construct tx descriptor. */
231 ath_beacon_setup(sc, avp, bf);
232
233 /*
234 * Enable the CAB queue before the beacon queue to
235 * insure cab frames are triggered by this beacon.
236 */
237 while (skb) {
238 ath_tx_cabq(sc, skb);
239 skb = ieee80211_get_buffered_bc(sc->hw, vif);
240 }
241
242 return bf;
243 }
244
245 /*
246 * Startup beacon transmission for adhoc mode when they are sent entirely
247 * by the hardware using the self-linked descriptor + veol trick.
248 */
249 static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id)
250 {
251 struct ieee80211_vif *vif;
252 struct ath_hal *ah = sc->sc_ah;
253 struct ath_buf *bf;
254 struct ath_vap *avp;
255 struct sk_buff *skb;
256
257 vif = sc->sc_vaps[if_id];
258 ASSERT(vif);
259
260 avp = (void *)vif->drv_priv;
261
262 if (avp->av_bcbuf == NULL) {
263 DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
264 avp, avp != NULL ? avp->av_bcbuf : NULL);
265 return;
266 }
267 bf = avp->av_bcbuf;
268 skb = (struct sk_buff *) bf->bf_mpdu;
269
270 /* Construct tx descriptor. */
271 ath_beacon_setup(sc, avp, bf);
272
273 /* NB: caller is known to have already stopped tx dma */
274 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
275 ath9k_hw_txstart(ah, sc->beacon.beaconq);
276 DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
277 sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc);
278 }
279
280 int ath_beaconq_setup(struct ath_hal *ah)
281 {
282 struct ath9k_tx_queue_info qi;
283
284 memset(&qi, 0, sizeof(qi));
285 qi.tqi_aifs = 1;
286 qi.tqi_cwmin = 0;
287 qi.tqi_cwmax = 0;
288 /* NB: don't enable any interrupts */
289 return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
290 }
291
292 int ath_beacon_alloc(struct ath_softc *sc, int if_id)
293 {
294 struct ieee80211_vif *vif;
295 struct ath_vap *avp;
296 struct ieee80211_hdr *hdr;
297 struct ath_buf *bf;
298 struct sk_buff *skb;
299 __le64 tstamp;
300
301 vif = sc->sc_vaps[if_id];
302 ASSERT(vif);
303
304 avp = (void *)vif->drv_priv;
305
306 /* Allocate a beacon descriptor if we haven't done so. */
307 if (!avp->av_bcbuf) {
308 /* Allocate beacon state for hostap/ibss. We know
309 * a buffer is available. */
310 avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf,
311 struct ath_buf, list);
312 list_del(&avp->av_bcbuf->list);
313
314 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP ||
315 !(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
316 int slot;
317 /*
318 * Assign the vap to a beacon xmit slot. As
319 * above, this cannot fail to find one.
320 */
321 avp->av_bslot = 0;
322 for (slot = 0; slot < ATH_BCBUF; slot++)
323 if (sc->beacon.bslot[slot] == ATH_IF_ID_ANY) {
324 /*
325 * XXX hack, space out slots to better
326 * deal with misses
327 */
328 if (slot+1 < ATH_BCBUF &&
329 sc->beacon.bslot[slot+1] ==
330 ATH_IF_ID_ANY) {
331 avp->av_bslot = slot+1;
332 break;
333 }
334 avp->av_bslot = slot;
335 /* NB: keep looking for a double slot */
336 }
337 BUG_ON(sc->beacon.bslot[avp->av_bslot] != ATH_IF_ID_ANY);
338 sc->beacon.bslot[avp->av_bslot] = if_id;
339 sc->sc_nbcnvaps++;
340 }
341 }
342
343 /* release the previous beacon frame , if it already exists. */
344 bf = avp->av_bcbuf;
345 if (bf->bf_mpdu != NULL) {
346 skb = (struct sk_buff *)bf->bf_mpdu;
347 pci_unmap_single(to_pci_dev(sc->dev), bf->bf_dmacontext,
348 skb->len,
349 PCI_DMA_TODEVICE);
350 dev_kfree_skb_any(skb);
351 bf->bf_mpdu = NULL;
352 }
353
354 /*
355 * NB: the beacon data buffer must be 32-bit aligned.
356 * FIXME: Fill avp->av_btxctl.txpower and
357 * avp->av_btxctl.shortPreamble
358 */
359 skb = ieee80211_beacon_get(sc->hw, vif);
360 if (skb == NULL) {
361 DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");
362 return -ENOMEM;
363 }
364
365 tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
366 sc->beacon.bc_tstamp = le64_to_cpu(tstamp);
367
368 /*
369 * Calculate a TSF adjustment factor required for
370 * staggered beacons. Note that we assume the format
371 * of the beacon frame leaves the tstamp field immediately
372 * following the header.
373 */
374 if (avp->av_bslot > 0) {
375 u64 tsfadjust;
376 __le64 val;
377 int intval;
378
379 intval = sc->hw->conf.beacon_int ?
380 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
381
382 /*
383 * The beacon interval is in TU's; the TSF in usecs.
384 * We figure out how many TU's to add to align the
385 * timestamp then convert to TSF units and handle
386 * byte swapping before writing it in the frame.
387 * The hardware will then add this each time a beacon
388 * frame is sent. Note that we align vap's 1..N
389 * and leave vap 0 untouched. This means vap 0
390 * has a timestamp in one beacon interval while the
391 * others get a timestamp aligned to the next interval.
392 */
393 tsfadjust = (intval * (ATH_BCBUF - avp->av_bslot)) / ATH_BCBUF;
394 val = cpu_to_le64(tsfadjust << 10); /* TU->TSF */
395
396 DPRINTF(sc, ATH_DBG_BEACON,
397 "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
398 avp->av_bslot, intval, (unsigned long long)tsfadjust);
399
400 hdr = (struct ieee80211_hdr *)skb->data;
401 memcpy(&hdr[1], &val, sizeof(val));
402 }
403
404 bf->bf_mpdu = skb;
405 bf->bf_buf_addr = bf->bf_dmacontext =
406 pci_map_single(to_pci_dev(sc->dev), skb->data,
407 skb->len,
408 PCI_DMA_TODEVICE);
409 if (unlikely(pci_dma_mapping_error(to_pci_dev(sc->dev),
410 bf->bf_buf_addr))) {
411 dev_kfree_skb_any(skb);
412 bf->bf_mpdu = NULL;
413 DPRINTF(sc, ATH_DBG_CONFIG,
414 "pci_dma_mapping_error() on beacon alloc\n");
415 return -ENOMEM;
416 }
417
418 return 0;
419 }
420
421 void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp)
422 {
423 if (avp->av_bcbuf != NULL) {
424 struct ath_buf *bf;
425
426 if (avp->av_bslot != -1) {
427 sc->beacon.bslot[avp->av_bslot] = ATH_IF_ID_ANY;
428 sc->sc_nbcnvaps--;
429 }
430
431 bf = avp->av_bcbuf;
432 if (bf->bf_mpdu != NULL) {
433 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
434 pci_unmap_single(to_pci_dev(sc->dev),
435 bf->bf_dmacontext,
436 skb->len,
437 PCI_DMA_TODEVICE);
438 dev_kfree_skb_any(skb);
439 bf->bf_mpdu = NULL;
440 }
441 list_add_tail(&bf->list, &sc->beacon.bbuf);
442
443 avp->av_bcbuf = NULL;
444 }
445 }
446
447 void ath9k_beacon_tasklet(unsigned long data)
448 {
449 struct ath_softc *sc = (struct ath_softc *)data;
450 struct ath_hal *ah = sc->sc_ah;
451 struct ath_buf *bf = NULL;
452 int slot, if_id;
453 u32 bfaddr;
454 u32 rx_clear = 0, rx_frame = 0, tx_frame = 0;
455 u32 show_cycles = 0;
456 u32 bc = 0; /* beacon count */
457 u64 tsf;
458 u32 tsftu;
459 u16 intval;
460
461 if (sc->sc_flags & SC_OP_NO_RESET) {
462 show_cycles = ath9k_hw_GetMibCycleCountsPct(ah,
463 &rx_clear, &rx_frame, &tx_frame);
464 }
465
466 /*
467 * Check if the previous beacon has gone out. If
468 * not don't try to post another, skip this period
469 * and wait for the next. Missed beacons indicate
470 * a problem and should not occur. If we miss too
471 * many consecutive beacons reset the device.
472 *
473 * FIXME: Clean up this mess !!
474 */
475 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) {
476 sc->beacon.bmisscnt++;
477 /* XXX: doth needs the chanchange IE countdown decremented.
478 * We should consider adding a mac80211 call to indicate
479 * a beacon miss so appropriate action could be taken
480 * (in that layer).
481 */
482 if (sc->beacon.bmisscnt < BSTUCK_THRESH) {
483 if (sc->sc_flags & SC_OP_NO_RESET) {
484 DPRINTF(sc, ATH_DBG_BEACON,
485 "missed %u consecutive beacons\n",
486 sc->beacon.bmisscnt);
487 if (show_cycles) {
488 /*
489 * Display cycle counter stats from HW
490 * to aide in debug of stickiness.
491 */
492 DPRINTF(sc, ATH_DBG_BEACON,
493 "busy times: rx_clear=%d, "
494 "rx_frame=%d, tx_frame=%d\n",
495 rx_clear, rx_frame,
496 tx_frame);
497 } else {
498 DPRINTF(sc, ATH_DBG_BEACON,
499 "unable to obtain "
500 "busy times\n");
501 }
502 } else {
503 DPRINTF(sc, ATH_DBG_BEACON,
504 "missed %u consecutive beacons\n",
505 sc->beacon.bmisscnt);
506 }
507 } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
508 if (sc->sc_flags & SC_OP_NO_RESET) {
509 if (sc->beacon.bmisscnt == BSTUCK_THRESH) {
510 DPRINTF(sc, ATH_DBG_BEACON,
511 "beacon is officially "
512 "stuck\n");
513 }
514 } else {
515 DPRINTF(sc, ATH_DBG_BEACON,
516 "beacon is officially stuck\n");
517 ath_bstuck_process(sc);
518 }
519 }
520 return;
521 }
522
523 if (sc->beacon.bmisscnt != 0) {
524 if (sc->sc_flags & SC_OP_NO_RESET) {
525 DPRINTF(sc, ATH_DBG_BEACON,
526 "resume beacon xmit after %u misses\n",
527 sc->beacon.bmisscnt);
528 } else {
529 DPRINTF(sc, ATH_DBG_BEACON,
530 "resume beacon xmit after %u misses\n",
531 sc->beacon.bmisscnt);
532 }
533 sc->beacon.bmisscnt = 0;
534 }
535
536 /*
537 * Generate beacon frames. we are sending frames
538 * staggered so calculate the slot for this frame based
539 * on the tsf to safeguard against missing an swba.
540 */
541
542 intval = sc->hw->conf.beacon_int ?
543 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
544
545 tsf = ath9k_hw_gettsf64(ah);
546 tsftu = TSF_TO_TU(tsf>>32, tsf);
547 slot = ((tsftu % intval) * ATH_BCBUF) / intval;
548 if_id = sc->beacon.bslot[(slot + 1) % ATH_BCBUF];
549
550 DPRINTF(sc, ATH_DBG_BEACON,
551 "slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
552 slot, (unsigned long long)tsf, tsftu,
553 intval, if_id);
554
555 bfaddr = 0;
556 if (if_id != ATH_IF_ID_ANY) {
557 bf = ath_beacon_generate(sc, if_id);
558 if (bf != NULL) {
559 bfaddr = bf->bf_daddr;
560 bc = 1;
561 }
562 }
563 /*
564 * Handle slot time change when a non-ERP station joins/leaves
565 * an 11g network. The 802.11 layer notifies us via callback,
566 * we mark updateslot, then wait one beacon before effecting
567 * the change. This gives associated stations at least one
568 * beacon interval to note the state change.
569 *
570 * NB: The slot time change state machine is clocked according
571 * to whether we are bursting or staggering beacons. We
572 * recognize the request to update and record the current
573 * slot then don't transition until that slot is reached
574 * again. If we miss a beacon for that slot then we'll be
575 * slow to transition but we'll be sure at least one beacon
576 * interval has passed. When bursting slot is always left
577 * set to ATH_BCBUF so this check is a noop.
578 */
579 /* XXX locking */
580 if (sc->beacon.updateslot == UPDATE) {
581 sc->beacon.updateslot = COMMIT; /* commit next beacon */
582 sc->beacon.slotupdate = slot;
583 } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
584 ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime);
585 sc->beacon.updateslot = OK;
586 }
587 if (bfaddr != 0) {
588 /*
589 * Stop any current dma and put the new frame(s) on the queue.
590 * This should never fail since we check above that no frames
591 * are still pending on the queue.
592 */
593 if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
594 DPRINTF(sc, ATH_DBG_FATAL,
595 "beacon queue %u did not stop?\n", sc->beacon.beaconq);
596 /* NB: the HAL still stops DMA, so proceed */
597 }
598
599 /* NB: cabq traffic should already be queued and primed */
600 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
601 ath9k_hw_txstart(ah, sc->beacon.beaconq);
602
603 sc->beacon.ast_be_xmit += bc; /* XXX per-vap? */
604 }
605 }
606
607 /*
608 * Configure the beacon and sleep timers.
609 *
610 * When operating as an AP this resets the TSF and sets
611 * up the hardware to notify us when we need to issue beacons.
612 *
613 * When operating in station mode this sets up the beacon
614 * timers according to the timestamp of the last received
615 * beacon and the current TSF, configures PCF and DTIM
616 * handling, programs the sleep registers so the hardware
617 * will wakeup in time to receive beacons, and configures
618 * the beacon miss handling so we'll receive a BMISS
619 * interrupt when we stop seeing beacons from the AP
620 * we've associated with.
621 */
622 void ath_beacon_config(struct ath_softc *sc, int if_id)
623 {
624 struct ieee80211_vif *vif;
625 struct ath_hal *ah = sc->sc_ah;
626 struct ath_beacon_config conf;
627 struct ath_vap *avp;
628 enum nl80211_iftype opmode;
629 u32 nexttbtt, intval;
630
631 if (if_id != ATH_IF_ID_ANY) {
632 vif = sc->sc_vaps[if_id];
633 ASSERT(vif);
634 avp = (void *)vif->drv_priv;
635 opmode = avp->av_opmode;
636 } else {
637 opmode = sc->sc_ah->ah_opmode;
638 }
639
640 memset(&conf, 0, sizeof(struct ath_beacon_config));
641
642 conf.beacon_interval = sc->hw->conf.beacon_int ?
643 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
644 conf.listen_interval = 1;
645 conf.dtim_period = conf.beacon_interval;
646 conf.dtim_count = 1;
647 conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
648
649 /* extract tstamp from last beacon and convert to TU */
650 nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp);
651
652 /* XXX conditionalize multi-bss support? */
653 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
654 /*
655 * For multi-bss ap support beacons are either staggered
656 * evenly over N slots or burst together. For the former
657 * arrange for the SWBA to be delivered for each slot.
658 * Slots that are not occupied will generate nothing.
659 */
660 /* NB: the beacon interval is kept internally in TU's */
661 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
662 intval /= ATH_BCBUF; /* for staggered beacons */
663 } else {
664 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
665 }
666
667 if (nexttbtt == 0) /* e.g. for ap mode */
668 nexttbtt = intval;
669 else if (intval) /* NB: can be 0 for monitor mode */
670 nexttbtt = roundup(nexttbtt, intval);
671
672 DPRINTF(sc, ATH_DBG_BEACON, "nexttbtt %u intval %u (%u)\n",
673 nexttbtt, intval, conf.beacon_interval);
674
675 /* Check for NL80211_IFTYPE_AP and sc_nostabeacons for WDS client */
676 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION) {
677 struct ath9k_beacon_state bs;
678 u64 tsf;
679 u32 tsftu;
680 int dtimperiod, dtimcount, sleepduration;
681 int cfpperiod, cfpcount;
682
683 /*
684 * Setup dtim and cfp parameters according to
685 * last beacon we received (which may be none).
686 */
687 dtimperiod = conf.dtim_period;
688 if (dtimperiod <= 0) /* NB: 0 if not known */
689 dtimperiod = 1;
690 dtimcount = conf.dtim_count;
691 if (dtimcount >= dtimperiod) /* NB: sanity check */
692 dtimcount = 0;
693 cfpperiod = 1; /* NB: no PCF support yet */
694 cfpcount = 0;
695
696 sleepduration = conf.listen_interval * intval;
697 if (sleepduration <= 0)
698 sleepduration = intval;
699
700 #define FUDGE 2
701 /*
702 * Pull nexttbtt forward to reflect the current
703 * TSF and calculate dtim+cfp state for the result.
704 */
705 tsf = ath9k_hw_gettsf64(ah);
706 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
707 do {
708 nexttbtt += intval;
709 if (--dtimcount < 0) {
710 dtimcount = dtimperiod - 1;
711 if (--cfpcount < 0)
712 cfpcount = cfpperiod - 1;
713 }
714 } while (nexttbtt < tsftu);
715 #undef FUDGE
716 memset(&bs, 0, sizeof(bs));
717 bs.bs_intval = intval;
718 bs.bs_nexttbtt = nexttbtt;
719 bs.bs_dtimperiod = dtimperiod*intval;
720 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
721 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
722 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
723 bs.bs_cfpmaxduration = 0;
724
725 /*
726 * Calculate the number of consecutive beacons to miss
727 * before taking a BMISS interrupt. The configuration
728 * is specified in TU so we only need calculate based
729 * on the beacon interval. Note that we clamp the
730 * result to at most 15 beacons.
731 */
732 if (sleepduration > intval) {
733 bs.bs_bmissthreshold = conf.listen_interval *
734 ATH_DEFAULT_BMISS_LIMIT / 2;
735 } else {
736 bs.bs_bmissthreshold =
737 DIV_ROUND_UP(conf.bmiss_timeout, intval);
738 if (bs.bs_bmissthreshold > 15)
739 bs.bs_bmissthreshold = 15;
740 else if (bs.bs_bmissthreshold <= 0)
741 bs.bs_bmissthreshold = 1;
742 }
743
744 /*
745 * Calculate sleep duration. The configuration is
746 * given in ms. We insure a multiple of the beacon
747 * period is used. Also, if the sleep duration is
748 * greater than the DTIM period then it makes senses
749 * to make it a multiple of that.
750 *
751 * XXX fixed at 100ms
752 */
753
754 bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100),
755 sleepduration);
756 if (bs.bs_sleepduration > bs.bs_dtimperiod)
757 bs.bs_sleepduration = bs.bs_dtimperiod;
758
759 DPRINTF(sc, ATH_DBG_BEACON,
760 "tsf %llu "
761 "tsf:tu %u "
762 "intval %u "
763 "nexttbtt %u "
764 "dtim %u "
765 "nextdtim %u "
766 "bmiss %u "
767 "sleep %u "
768 "cfp:period %u "
769 "maxdur %u "
770 "next %u "
771 "timoffset %u\n",
772 (unsigned long long)tsf, tsftu,
773 bs.bs_intval,
774 bs.bs_nexttbtt,
775 bs.bs_dtimperiod,
776 bs.bs_nextdtim,
777 bs.bs_bmissthreshold,
778 bs.bs_sleepduration,
779 bs.bs_cfpperiod,
780 bs.bs_cfpmaxduration,
781 bs.bs_cfpnext,
782 bs.bs_timoffset
783 );
784
785 ath9k_hw_set_interrupts(ah, 0);
786 ath9k_hw_set_sta_beacon_timers(ah, &bs);
787 sc->sc_imask |= ATH9K_INT_BMISS;
788 ath9k_hw_set_interrupts(ah, sc->sc_imask);
789 } else {
790 u64 tsf;
791 u32 tsftu;
792 ath9k_hw_set_interrupts(ah, 0);
793 if (nexttbtt == intval)
794 intval |= ATH9K_BEACON_RESET_TSF;
795 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC) {
796 /*
797 * Pull nexttbtt forward to reflect the current
798 * TSF
799 */
800 #define FUDGE 2
801 if (!(intval & ATH9K_BEACON_RESET_TSF)) {
802 tsf = ath9k_hw_gettsf64(ah);
803 tsftu = TSF_TO_TU((u32)(tsf>>32),
804 (u32)tsf) + FUDGE;
805 do {
806 nexttbtt += intval;
807 } while (nexttbtt < tsftu);
808 }
809 #undef FUDGE
810 DPRINTF(sc, ATH_DBG_BEACON,
811 "IBSS nexttbtt %u intval %u (%u)\n",
812 nexttbtt,
813 intval & ~ATH9K_BEACON_RESET_TSF,
814 conf.beacon_interval);
815
816 /*
817 * In IBSS mode enable the beacon timers but only
818 * enable SWBA interrupts if we need to manually
819 * prepare beacon frames. Otherwise we use a
820 * self-linked tx descriptor and let the hardware
821 * deal with things.
822 */
823 intval |= ATH9K_BEACON_ENA;
824 if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
825 sc->sc_imask |= ATH9K_INT_SWBA;
826 ath_beaconq_config(sc);
827 } else if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
828 /*
829 * In AP mode we enable the beacon timers and
830 * SWBA interrupts to prepare beacon frames.
831 */
832 intval |= ATH9K_BEACON_ENA;
833 sc->sc_imask |= ATH9K_INT_SWBA; /* beacon prepare */
834 ath_beaconq_config(sc);
835 }
836 ath9k_hw_beaconinit(ah, nexttbtt, intval);
837 sc->beacon.bmisscnt = 0;
838 ath9k_hw_set_interrupts(ah, sc->sc_imask);
839 /*
840 * When using a self-linked beacon descriptor in
841 * ibss mode load it once here.
842 */
843 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
844 (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
845 ath_beacon_start_adhoc(sc, 0);
846 }
847 }
848
849 void ath_beacon_sync(struct ath_softc *sc, int if_id)
850 {
851 /*
852 * Resync beacon timers using the tsf of the
853 * beacon frame we just received.
854 */
855 ath_beacon_config(sc, if_id);
856 sc->sc_flags |= SC_OP_BEACONS;
857 }
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