drivers/net/wireless/b43/phy_common.h

   1 #ifndef LINUX_B43_PHY_COMMON_H_
   2 #define LINUX_B43_PHY_COMMON_H_
   3
   4 #include <linux/types.h>
   5 #include <linux/nl80211.h>
   6
   7 struct b43_wldev;
   8
   9 /* Complex number using 2 32-bit signed integers */
  10 struct b43_c32 { s32 i, q; };
  11
  12 #define CORDIC_CONVERT(value)   (((value) >= 0) ? \
  13                                  ((((value) >> 15) + 1) >> 1) : \
  14                                  -((((-(value)) >> 15) + 1) >> 1))
  15
  16 /* PHY register routing bits */
  17 #define B43_PHYROUTE                    0x0C00 /* PHY register routing bits mask */
  18 #define  B43_PHYROUTE_BASE              0x0000 /* Base registers */
  19 #define  B43_PHYROUTE_OFDM_GPHY         0x0400 /* OFDM register routing for G-PHYs */
  20 #define  B43_PHYROUTE_EXT_GPHY          0x0800 /* Extended G-PHY registers */
  21 #define  B43_PHYROUTE_N_BMODE           0x0C00 /* N-PHY BMODE registers */
  22
  23 /* CCK (B-PHY) registers. */
  24 #define B43_PHY_CCK(reg)                ((reg) | B43_PHYROUTE_BASE)
  25 /* N-PHY registers. */
  26 #define B43_PHY_N(reg)                  ((reg) | B43_PHYROUTE_BASE)
  27 /* N-PHY BMODE registers. */
  28 #define B43_PHY_N_BMODE(reg)            ((reg) | B43_PHYROUTE_N_BMODE)
  29 /* OFDM (A-PHY) registers. */
  30 #define B43_PHY_OFDM(reg)               ((reg) | B43_PHYROUTE_OFDM_GPHY)
  31 /* Extended G-PHY registers. */
  32 #define B43_PHY_EXTG(reg)               ((reg) | B43_PHYROUTE_EXT_GPHY)
  33
  34
  35 /* Masks for the PHY versioning registers. */
  36 #define B43_PHYVER_ANALOG               0xF000
  37 #define B43_PHYVER_ANALOG_SHIFT         12
  38 #define B43_PHYVER_TYPE                 0x0F00
  39 #define B43_PHYVER_TYPE_SHIFT           8
  40 #define B43_PHYVER_VERSION              0x00FF
  41
  42 /* PHY writes need to be flushed if we reach limit */
  43 #define B43_MAX_WRITES_IN_ROW           24
  44
  45 /**
  46  * enum b43_interference_mitigation - Interference Mitigation mode
  47  *
  48  * @B43_INTERFMODE_NONE:        Disabled
  49  * @B43_INTERFMODE_NONWLAN:     Non-WLAN Interference Mitigation
  50  * @B43_INTERFMODE_MANUALWLAN:  WLAN Interference Mitigation
  51  * @B43_INTERFMODE_AUTOWLAN:    Automatic WLAN Interference Mitigation
  52  */
  53 enum b43_interference_mitigation {
  54         B43_INTERFMODE_NONE,
  55         B43_INTERFMODE_NONWLAN,
  56         B43_INTERFMODE_MANUALWLAN,
  57         B43_INTERFMODE_AUTOWLAN,
  58 };
  59
  60 /* Antenna identifiers */
  61 enum {
  62         B43_ANTENNA0 = 0,       /* Antenna 0 */
  63         B43_ANTENNA1 = 1,       /* Antenna 1 */
  64         B43_ANTENNA_AUTO0 = 2,  /* Automatic, starting with antenna 0 */
  65         B43_ANTENNA_AUTO1 = 3,  /* Automatic, starting with antenna 1 */
  66         B43_ANTENNA2 = 4,
  67         B43_ANTENNA3 = 8,
  68
  69         B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
  70         B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
  71 };
  72
  73 /**
  74  * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
  75  *
  76  * @B43_TXPWR_RES_NEED_ADJUST:  Values changed. Hardware adjustment is needed.
  77  * @B43_TXPWR_RES_DONE:         No more work to do. Everything is done.
  78  */
  79 enum b43_txpwr_result {
  80         B43_TXPWR_RES_NEED_ADJUST,
  81         B43_TXPWR_RES_DONE,
  82 };
  83
  84 /**
  85  * struct b43_phy_operations - Function pointers for PHY ops.
  86  *
  87  * @allocate:           Allocate and initialise the PHY data structures.
  88  *                      Must not be NULL.
  89  * @free:               Destroy and free the PHY data structures.
  90  *                      Must not be NULL.
  91  *
  92  * @prepare_structs:    Prepare the PHY data structures.
  93  *                      The data structures allocated in @allocate are
  94  *                      initialized here.
  95  *                      Must not be NULL.
  96  * @prepare_hardware:   Prepare the PHY. This is called before b43_chip_init to
  97  *                      do some early early PHY hardware init.
  98  *                      Can be NULL, if not required.
  99  * @init:               Initialize the PHY.
 100  *                      Must not be NULL.
 101  * @exit:               Shutdown the PHY.
 102  *                      Can be NULL, if not required.
 103  *
 104  * @phy_read:           Read from a PHY register.
 105  *                      Must not be NULL.
 106  * @phy_write:          Write to a PHY register.
 107  *                      Must not be NULL.
 108  * @phy_maskset:        Maskset a PHY register, taking shortcuts.
 109  *                      If it is NULL, a generic algorithm is used.
 110  * @radio_read:         Read from a Radio register.
 111  *                      Must not be NULL.
 112  * @radio_write:        Write to a Radio register.
 113  *                      Must not be NULL.
 114  *
 115  * @supports_hwpctl:    Returns a boolean whether Hardware Power Control
 116  *                      is supported or not.
 117  *                      If NULL, hwpctl is assumed to be never supported.
 118  * @software_rfkill:    Turn the radio ON or OFF.
 119  *                      Possible state values are
 120  *                      RFKILL_STATE_SOFT_BLOCKED or
 121  *                      RFKILL_STATE_UNBLOCKED
 122  *                      Must not be NULL.
 123  * @switch_analog:      Turn the Analog on/off.
 124  *                      Must not be NULL.
 125  * @switch_channel:     Switch the radio to another channel.
 126  *                      Must not be NULL.
 127  * @get_default_chan:   Just returns the default channel number.
 128  *                      Must not be NULL.
 129  * @set_rx_antenna:     Set the antenna used for RX.
 130  *                      Can be NULL, if not supported.
 131  * @interf_mitigation:  Switch the Interference Mitigation mode.
 132  *                      Can be NULL, if not supported.
 133  *
 134  * @recalc_txpower:     Recalculate the transmission power parameters.
 135  *                      This callback has to recalculate the TX power settings,
 136  *                      but does not need to write them to the hardware, yet.
 137  *                      Returns enum b43_txpwr_result to indicate whether the hardware
 138  *                      needs to be adjusted.
 139  *                      If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
 140  *                      will be called later.
 141  *                      If the parameter "ignore_tssi" is true, the TSSI values should
 142  *                      be ignored and a recalculation of the power settings should be
 143  *                      done even if the TSSI values did not change.
 144  *                      This function may sleep, but should not.
 145  *                      Must not be NULL.
 146  * @adjust_txpower:     Write the previously calculated TX power settings
 147  *                      (from @recalc_txpower) to the hardware.
 148  *                      This function may sleep.
 149  *                      Can be NULL, if (and ONLY if) @recalc_txpower _always_
 150  *                      returns B43_TXPWR_RES_DONE.
 151  *
 152  * @pwork_15sec:        Periodic work. Called every 15 seconds.
 153  *                      Can be NULL, if not required.
 154  * @pwork_60sec:        Periodic work. Called every 60 seconds.
 155  *                      Can be NULL, if not required.
 156  */
 157 struct b43_phy_operations {
 158         /* Initialisation */
 159         int (*allocate)(struct b43_wldev *dev);
 160         void (*free)(struct b43_wldev *dev);
 161         void (*prepare_structs)(struct b43_wldev *dev);
 162         int (*prepare_hardware)(struct b43_wldev *dev);
 163         int (*init)(struct b43_wldev *dev);
 164         void (*exit)(struct b43_wldev *dev);
 165
 166         /* Register access */
 167         u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
 168         void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
 169         void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
 170         u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
 171         void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
 172
 173         /* Radio */
 174         bool (*supports_hwpctl)(struct b43_wldev *dev);
 175         void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
 176         void (*switch_analog)(struct b43_wldev *dev, bool on);
 177         int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
 178         unsigned int (*get_default_chan)(struct b43_wldev *dev);
 179         void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
 180         int (*interf_mitigation)(struct b43_wldev *dev,
 181                                  enum b43_interference_mitigation new_mode);
 182
 183         /* Transmission power adjustment */
 184         enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
 185                                                 bool ignore_tssi);
 186         void (*adjust_txpower)(struct b43_wldev *dev);
 187
 188         /* Misc */
 189         void (*pwork_15sec)(struct b43_wldev *dev);
 190         void (*pwork_60sec)(struct b43_wldev *dev);
 191 };
 192
 193 struct b43_phy_a;
 194 struct b43_phy_g;
 195 struct b43_phy_n;
 196 struct b43_phy_lp;
 197 struct b43_phy_ht;
 198 struct b43_phy_lcn;
 199
 200 struct b43_phy {
 201         /* Hardware operation callbacks. */
 202         const struct b43_phy_operations *ops;
 203
 204         /* Most hardware context information is stored in the standard-
 205          * specific data structures pointed to by the pointers below.
 206          * Only one of them is valid (the currently enabled PHY). */
 207 #ifdef CONFIG_B43_DEBUG
 208         /* No union for debug build to force NULL derefs in buggy code. */
 209         struct {
 210 #else
 211         union {
 212 #endif
 213                 /* A-PHY specific information */
 214                 struct b43_phy_a *a;
 215                 /* G-PHY specific information */
 216                 struct b43_phy_g *g;
 217                 /* N-PHY specific information */
 218                 struct b43_phy_n *n;
 219                 /* LP-PHY specific information */
 220                 struct b43_phy_lp *lp;
 221                 /* HT-PHY specific information */
 222                 struct b43_phy_ht *ht;
 223                 /* LCN-PHY specific information */
 224                 struct b43_phy_lcn *lcn;
 225                 /* AC-PHY specific information */
 226                 struct b43_phy_ac *ac;
 227         };
 228
 229         /* Band support flags. */
 230         bool supports_2ghz;
 231         bool supports_5ghz;
 232
 233         /* Is GMODE (2 GHz mode) bit enabled? */
 234         bool gmode;
 235
 236         /* After power reset full init has to be performed */
 237         bool do_full_init;
 238
 239         /* Analog Type */
 240         u8 analog;
 241         /* B43_PHYTYPE_ */
 242         u8 type;
 243         /* PHY revision number. */
 244         u8 rev;
 245
 246         /* Count writes since last read */
 247         u8 writes_counter;
 248
 249         /* Radio versioning */
 250         u16 radio_manuf;        /* Radio manufacturer */
 251         u16 radio_ver;          /* Radio version */
 252         u8 radio_rev;           /* Radio revision */
 253
 254         /* Software state of the radio */
 255         bool radio_on;
 256
 257         /* Desired TX power level (in dBm).
 258          * This is set by the user and adjusted in b43_phy_xmitpower(). */
 259         int desired_txpower;
 260
 261         /* Hardware Power Control enabled? */
 262         bool hardware_power_control;
 263
 264         /* The time (in absolute jiffies) when the next TX power output
 265          * check is needed. */
 266         unsigned long next_txpwr_check_time;
 267
 268         /* Current channel */
 269         struct cfg80211_chan_def *chandef;
 270         unsigned int channel;
 271
 272         /* PHY TX errors counter. */
 273         atomic_t txerr_cnt;
 274
 275 #ifdef CONFIG_B43_DEBUG
 276         /* PHY registers locked (w.r.t. firmware) */
 277         bool phy_locked;
 278         /* Radio registers locked (w.r.t. firmware) */
 279         bool radio_locked;
 280 #endif /* B43_DEBUG */
 281 };
 282
 283
 284 /**
 285  * b43_phy_allocate - Allocate PHY structs
 286  * Allocate the PHY data structures, based on the current dev->phy.type
 287  */
 288 int b43_phy_allocate(struct b43_wldev *dev);
 289
 290 /**
 291  * b43_phy_free - Free PHY structs
 292  */
 293 void b43_phy_free(struct b43_wldev *dev);
 294
 295 /**
 296  * b43_phy_init - Initialise the PHY
 297  */
 298 int b43_phy_init(struct b43_wldev *dev);
 299
 300 /**
 301  * b43_phy_exit - Cleanup PHY
 302  */
 303 void b43_phy_exit(struct b43_wldev *dev);
 304
 305 /**
 306  * b43_has_hardware_pctl - Hardware Power Control supported?
 307  * Returns a boolean, whether hardware power control is supported.
 308  */
 309 bool b43_has_hardware_pctl(struct b43_wldev *dev);
 310
 311 /**
 312  * b43_phy_read - 16bit PHY register read access
 313  */
 314 u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
 315
 316 /**
 317  * b43_phy_write - 16bit PHY register write access
 318  */
 319 void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
 320
 321 /**
 322  * b43_phy_copy - copy contents of 16bit PHY register to another
 323  */
 324 void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
 325
 326 /**
 327  * b43_phy_mask - Mask a PHY register with a mask
 328  */
 329 void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
 330
 331 /**
 332  * b43_phy_set - OR a PHY register with a bitmap
 333  */
 334 void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
 335
 336 /**
 337  * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
 338  */
 339 void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
 340
 341 /**
 342  * b43_radio_read - 16bit Radio register read access
 343  */
 344 u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
 345 #define b43_radio_read16        b43_radio_read /* DEPRECATED */
 346
 347 /**
 348  * b43_radio_write - 16bit Radio register write access
 349  */
 350 void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
 351 #define b43_radio_write16       b43_radio_write /* DEPRECATED */
 352
 353 /**
 354  * b43_radio_mask - Mask a 16bit radio register with a mask
 355  */
 356 void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
 357
 358 /**
 359  * b43_radio_set - OR a 16bit radio register with a bitmap
 360  */
 361 void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
 362
 363 /**
 364  * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
 365  */
 366 void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
 367
 368 /**
 369  * b43_radio_wait_value - Waits for a given value in masked register read
 370  */
 371 bool b43_radio_wait_value(struct b43_wldev *dev, u16 offset, u16 mask,
 372                           u16 value, int delay, int timeout);
 373
 374 /**
 375  * b43_radio_lock - Lock firmware radio register access
 376  */
 377 void b43_radio_lock(struct b43_wldev *dev);
 378
 379 /**
 380  * b43_radio_unlock - Unlock firmware radio register access
 381  */
 382 void b43_radio_unlock(struct b43_wldev *dev);
 383
 384 /**
 385  * b43_phy_lock - Lock firmware PHY register access
 386  */
 387 void b43_phy_lock(struct b43_wldev *dev);
 388
 389 /**
 390  * b43_phy_unlock - Unlock firmware PHY register access
 391  */
 392 void b43_phy_unlock(struct b43_wldev *dev);
 393
 394 void b43_phy_put_into_reset(struct b43_wldev *dev);
 395 void b43_phy_take_out_of_reset(struct b43_wldev *dev);
 396
 397 /**
 398  * b43_switch_channel - Switch to another channel
 399  */
 400 int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
 401
 402 /**
 403  * b43_software_rfkill - Turn the radio ON or OFF in software.
 404  */
 405 void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
 406
 407 /**
 408  * b43_phy_txpower_check - Check TX power output.
 409  *
 410  * Compare the current TX power output to the desired power emission
 411  * and schedule an adjustment in case it mismatches.
 412  *
 413  * @flags:      OR'ed enum b43_phy_txpower_check_flags flags.
 414  *              See the docs below.
 415  */
 416 void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
 417 /**
 418  * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
 419  *
 420  * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
 421  *                         the check now.
 422  * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
 423  *                         TSSI did not change.
 424  */
 425 enum b43_phy_txpower_check_flags {
 426         B43_TXPWR_IGNORE_TIME           = (1 << 0),
 427         B43_TXPWR_IGNORE_TSSI           = (1 << 1),
 428 };
 429
 430 struct work_struct;
 431 void b43_phy_txpower_adjust_work(struct work_struct *work);
 432
 433 /**
 434  * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
 435  *
 436  * @shm_offset:         The SHM address to read the values from.
 437  *
 438  * Returns the average of the 4 TSSI values, or a negative error code.
 439  */
 440 int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
 441
 442 /**
 443  * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
 444  *
 445  * It does the switching based on the PHY0 core register.
 446  * Do _not_ call this directly. Only use it as a switch_analog callback
 447  * for struct b43_phy_operations.
 448  */
 449 void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
 450
 451 bool b43_is_40mhz(struct b43_wldev *dev);
 452
 453 void b43_phy_force_clock(struct b43_wldev *dev, bool force);
 454
 455 struct b43_c32 b43_cordic(int theta);
 456
 457 #endif /* LINUX_B43_PHY_COMMON_H_ */