3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
44 #include <asm/unaligned.h>
46 #include "b43legacy.h"
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
64 static int modparam_pio
;
65 module_param_named(pio
, modparam_pio
, int, 0444);
66 MODULE_PARM_DESC(pio
, "enable(1) / disable(0) PIO mode");
67 #elif defined(CONFIG_B43LEGACY_DMA)
68 # define modparam_pio 0
69 #elif defined(CONFIG_B43LEGACY_PIO)
70 # define modparam_pio 1
73 static int modparam_bad_frames_preempt
;
74 module_param_named(bad_frames_preempt
, modparam_bad_frames_preempt
, int, 0444);
75 MODULE_PARM_DESC(bad_frames_preempt
, "enable(1) / disable(0) Bad Frames"
78 static char modparam_fwpostfix
[16];
79 module_param_string(fwpostfix
, modparam_fwpostfix
, 16, 0444);
80 MODULE_PARM_DESC(fwpostfix
, "Postfix for the firmware files to load.");
82 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
83 static const struct ssb_device_id b43legacy_ssb_tbl
[] = {
84 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 2),
85 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 4),
88 MODULE_DEVICE_TABLE(ssb
, b43legacy_ssb_tbl
);
91 /* Channel and ratetables are shared for all devices.
92 * They can't be const, because ieee80211 puts some precalculated
93 * data in there. This data is the same for all devices, so we don't
94 * get concurrency issues */
95 #define RATETAB_ENT(_rateid, _flags) \
97 .rate = B43legacy_RATE_TO_100KBPS(_rateid), \
102 static struct ieee80211_rate __b43legacy_ratetable
[] = {
103 RATETAB_ENT(B43legacy_CCK_RATE_1MB
, IEEE80211_RATE_CCK
),
104 RATETAB_ENT(B43legacy_CCK_RATE_2MB
, IEEE80211_RATE_CCK_2
),
105 RATETAB_ENT(B43legacy_CCK_RATE_5MB
, IEEE80211_RATE_CCK_2
),
106 RATETAB_ENT(B43legacy_CCK_RATE_11MB
, IEEE80211_RATE_CCK_2
),
107 RATETAB_ENT(B43legacy_OFDM_RATE_6MB
, IEEE80211_RATE_OFDM
),
108 RATETAB_ENT(B43legacy_OFDM_RATE_9MB
, IEEE80211_RATE_OFDM
),
109 RATETAB_ENT(B43legacy_OFDM_RATE_12MB
, IEEE80211_RATE_OFDM
),
110 RATETAB_ENT(B43legacy_OFDM_RATE_18MB
, IEEE80211_RATE_OFDM
),
111 RATETAB_ENT(B43legacy_OFDM_RATE_24MB
, IEEE80211_RATE_OFDM
),
112 RATETAB_ENT(B43legacy_OFDM_RATE_36MB
, IEEE80211_RATE_OFDM
),
113 RATETAB_ENT(B43legacy_OFDM_RATE_48MB
, IEEE80211_RATE_OFDM
),
114 RATETAB_ENT(B43legacy_OFDM_RATE_54MB
, IEEE80211_RATE_OFDM
),
116 #define b43legacy_a_ratetable (__b43legacy_ratetable + 4)
117 #define b43legacy_a_ratetable_size 8
118 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
119 #define b43legacy_b_ratetable_size 4
120 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
121 #define b43legacy_g_ratetable_size 12
123 #define CHANTAB_ENT(_chanid, _freq) \
128 .flag = IEEE80211_CHAN_W_SCAN | \
129 IEEE80211_CHAN_W_ACTIVE_SCAN | \
130 IEEE80211_CHAN_W_IBSS, \
131 .power_level = 0x0A, \
132 .antenna_max = 0xFF, \
134 static struct ieee80211_channel b43legacy_bg_chantable
[] = {
135 CHANTAB_ENT(1, 2412),
136 CHANTAB_ENT(2, 2417),
137 CHANTAB_ENT(3, 2422),
138 CHANTAB_ENT(4, 2427),
139 CHANTAB_ENT(5, 2432),
140 CHANTAB_ENT(6, 2437),
141 CHANTAB_ENT(7, 2442),
142 CHANTAB_ENT(8, 2447),
143 CHANTAB_ENT(9, 2452),
144 CHANTAB_ENT(10, 2457),
145 CHANTAB_ENT(11, 2462),
146 CHANTAB_ENT(12, 2467),
147 CHANTAB_ENT(13, 2472),
148 CHANTAB_ENT(14, 2484),
150 #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable)
152 static void b43legacy_wireless_core_exit(struct b43legacy_wldev
*dev
);
153 static int b43legacy_wireless_core_init(struct b43legacy_wldev
*dev
);
154 static void b43legacy_wireless_core_stop(struct b43legacy_wldev
*dev
);
155 static int b43legacy_wireless_core_start(struct b43legacy_wldev
*dev
);
158 static int b43legacy_ratelimit(struct b43legacy_wl
*wl
)
160 if (!wl
|| !wl
->current_dev
)
162 if (b43legacy_status(wl
->current_dev
) < B43legacy_STAT_STARTED
)
164 /* We are up and running.
165 * Ratelimit the messages to avoid DoS over the net. */
166 return net_ratelimit();
169 void b43legacyinfo(struct b43legacy_wl
*wl
, const char *fmt
, ...)
173 if (!b43legacy_ratelimit(wl
))
176 printk(KERN_INFO
"b43legacy-%s: ",
177 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
182 void b43legacyerr(struct b43legacy_wl
*wl
, const char *fmt
, ...)
186 if (!b43legacy_ratelimit(wl
))
189 printk(KERN_ERR
"b43legacy-%s ERROR: ",
190 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
195 void b43legacywarn(struct b43legacy_wl
*wl
, const char *fmt
, ...)
199 if (!b43legacy_ratelimit(wl
))
202 printk(KERN_WARNING
"b43legacy-%s warning: ",
203 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
209 void b43legacydbg(struct b43legacy_wl
*wl
, const char *fmt
, ...)
214 printk(KERN_DEBUG
"b43legacy-%s debug: ",
215 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
221 static void b43legacy_ram_write(struct b43legacy_wldev
*dev
, u16 offset
,
226 B43legacy_WARN_ON(offset
% 4 != 0);
228 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
229 if (status
& B43legacy_SBF_XFER_REG_BYTESWAP
)
232 b43legacy_write32(dev
, B43legacy_MMIO_RAM_CONTROL
, offset
);
234 b43legacy_write32(dev
, B43legacy_MMIO_RAM_DATA
, val
);
238 void b43legacy_shm_control_word(struct b43legacy_wldev
*dev
,
239 u16 routing
, u16 offset
)
243 /* "offset" is the WORD offset. */
248 b43legacy_write32(dev
, B43legacy_MMIO_SHM_CONTROL
, control
);
251 u32
b43legacy_shm_read32(struct b43legacy_wldev
*dev
,
252 u16 routing
, u16 offset
)
256 if (routing
== B43legacy_SHM_SHARED
) {
257 B43legacy_WARN_ON((offset
& 0x0001) != 0);
258 if (offset
& 0x0003) {
259 /* Unaligned access */
260 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
261 ret
= b43legacy_read16(dev
,
262 B43legacy_MMIO_SHM_DATA_UNALIGNED
);
264 b43legacy_shm_control_word(dev
, routing
,
266 ret
|= b43legacy_read16(dev
, B43legacy_MMIO_SHM_DATA
);
272 b43legacy_shm_control_word(dev
, routing
, offset
);
273 ret
= b43legacy_read32(dev
, B43legacy_MMIO_SHM_DATA
);
278 u16
b43legacy_shm_read16(struct b43legacy_wldev
*dev
,
279 u16 routing
, u16 offset
)
283 if (routing
== B43legacy_SHM_SHARED
) {
284 B43legacy_WARN_ON((offset
& 0x0001) != 0);
285 if (offset
& 0x0003) {
286 /* Unaligned access */
287 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
288 ret
= b43legacy_read16(dev
,
289 B43legacy_MMIO_SHM_DATA_UNALIGNED
);
295 b43legacy_shm_control_word(dev
, routing
, offset
);
296 ret
= b43legacy_read16(dev
, B43legacy_MMIO_SHM_DATA
);
301 void b43legacy_shm_write32(struct b43legacy_wldev
*dev
,
302 u16 routing
, u16 offset
,
305 if (routing
== B43legacy_SHM_SHARED
) {
306 B43legacy_WARN_ON((offset
& 0x0001) != 0);
307 if (offset
& 0x0003) {
308 /* Unaligned access */
309 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
311 b43legacy_write16(dev
,
312 B43legacy_MMIO_SHM_DATA_UNALIGNED
,
313 (value
>> 16) & 0xffff);
315 b43legacy_shm_control_word(dev
, routing
,
318 b43legacy_write16(dev
, B43legacy_MMIO_SHM_DATA
,
324 b43legacy_shm_control_word(dev
, routing
, offset
);
326 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
, value
);
329 void b43legacy_shm_write16(struct b43legacy_wldev
*dev
, u16 routing
, u16 offset
,
332 if (routing
== B43legacy_SHM_SHARED
) {
333 B43legacy_WARN_ON((offset
& 0x0001) != 0);
334 if (offset
& 0x0003) {
335 /* Unaligned access */
336 b43legacy_shm_control_word(dev
, routing
, offset
>> 2);
338 b43legacy_write16(dev
,
339 B43legacy_MMIO_SHM_DATA_UNALIGNED
,
345 b43legacy_shm_control_word(dev
, routing
, offset
);
347 b43legacy_write16(dev
, B43legacy_MMIO_SHM_DATA
, value
);
351 u32
b43legacy_hf_read(struct b43legacy_wldev
*dev
)
355 ret
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
356 B43legacy_SHM_SH_HOSTFHI
);
358 ret
|= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
359 B43legacy_SHM_SH_HOSTFLO
);
364 /* Write HostFlags */
365 void b43legacy_hf_write(struct b43legacy_wldev
*dev
, u32 value
)
367 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
368 B43legacy_SHM_SH_HOSTFLO
,
369 (value
& 0x0000FFFF));
370 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
371 B43legacy_SHM_SH_HOSTFHI
,
372 ((value
& 0xFFFF0000) >> 16));
375 void b43legacy_tsf_read(struct b43legacy_wldev
*dev
, u64
*tsf
)
377 /* We need to be careful. As we read the TSF from multiple
378 * registers, we should take care of register overflows.
379 * In theory, the whole tsf read process should be atomic.
380 * We try to be atomic here, by restaring the read process,
381 * if any of the high registers changed (overflew).
383 if (dev
->dev
->id
.revision
>= 3) {
389 high
= b43legacy_read32(dev
,
390 B43legacy_MMIO_REV3PLUS_TSF_HIGH
);
391 low
= b43legacy_read32(dev
,
392 B43legacy_MMIO_REV3PLUS_TSF_LOW
);
393 high2
= b43legacy_read32(dev
,
394 B43legacy_MMIO_REV3PLUS_TSF_HIGH
);
395 } while (unlikely(high
!= high2
));
411 v3
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_3
);
412 v2
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_2
);
413 v1
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_1
);
414 v0
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_0
);
416 test3
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_3
);
417 test2
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_2
);
418 test1
= b43legacy_read16(dev
, B43legacy_MMIO_TSF_1
);
419 } while (v3
!= test3
|| v2
!= test2
|| v1
!= test1
);
433 static void b43legacy_time_lock(struct b43legacy_wldev
*dev
)
437 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
438 status
|= B43legacy_SBF_TIME_UPDATE
;
439 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, status
);
443 static void b43legacy_time_unlock(struct b43legacy_wldev
*dev
)
447 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
448 status
&= ~B43legacy_SBF_TIME_UPDATE
;
449 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, status
);
452 static void b43legacy_tsf_write_locked(struct b43legacy_wldev
*dev
, u64 tsf
)
454 /* Be careful with the in-progress timer.
455 * First zero out the low register, so we have a full
456 * register-overflow duration to complete the operation.
458 if (dev
->dev
->id
.revision
>= 3) {
459 u32 lo
= (tsf
& 0x00000000FFFFFFFFULL
);
460 u32 hi
= (tsf
& 0xFFFFFFFF00000000ULL
) >> 32;
462 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_LOW
, 0);
464 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_HIGH
,
467 b43legacy_write32(dev
, B43legacy_MMIO_REV3PLUS_TSF_LOW
,
470 u16 v0
= (tsf
& 0x000000000000FFFFULL
);
471 u16 v1
= (tsf
& 0x00000000FFFF0000ULL
) >> 16;
472 u16 v2
= (tsf
& 0x0000FFFF00000000ULL
) >> 32;
473 u16 v3
= (tsf
& 0xFFFF000000000000ULL
) >> 48;
475 b43legacy_write16(dev
, B43legacy_MMIO_TSF_0
, 0);
477 b43legacy_write16(dev
, B43legacy_MMIO_TSF_3
, v3
);
479 b43legacy_write16(dev
, B43legacy_MMIO_TSF_2
, v2
);
481 b43legacy_write16(dev
, B43legacy_MMIO_TSF_1
, v1
);
483 b43legacy_write16(dev
, B43legacy_MMIO_TSF_0
, v0
);
487 void b43legacy_tsf_write(struct b43legacy_wldev
*dev
, u64 tsf
)
489 b43legacy_time_lock(dev
);
490 b43legacy_tsf_write_locked(dev
, tsf
);
491 b43legacy_time_unlock(dev
);
495 void b43legacy_macfilter_set(struct b43legacy_wldev
*dev
,
496 u16 offset
, const u8
*mac
)
498 static const u8 zero_addr
[ETH_ALEN
] = { 0 };
505 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_CONTROL
, offset
);
509 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
512 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
515 b43legacy_write16(dev
, B43legacy_MMIO_MACFILTER_DATA
, data
);
518 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev
*dev
)
520 static const u8 zero_addr
[ETH_ALEN
] = { 0 };
521 const u8
*mac
= dev
->wl
->mac_addr
;
522 const u8
*bssid
= dev
->wl
->bssid
;
523 u8 mac_bssid
[ETH_ALEN
* 2];
532 b43legacy_macfilter_set(dev
, B43legacy_MACFILTER_BSSID
, bssid
);
534 memcpy(mac_bssid
, mac
, ETH_ALEN
);
535 memcpy(mac_bssid
+ ETH_ALEN
, bssid
, ETH_ALEN
);
537 /* Write our MAC address and BSSID to template ram */
538 for (i
= 0; i
< ARRAY_SIZE(mac_bssid
); i
+= sizeof(u32
)) {
539 tmp
= (u32
)(mac_bssid
[i
+ 0]);
540 tmp
|= (u32
)(mac_bssid
[i
+ 1]) << 8;
541 tmp
|= (u32
)(mac_bssid
[i
+ 2]) << 16;
542 tmp
|= (u32
)(mac_bssid
[i
+ 3]) << 24;
543 b43legacy_ram_write(dev
, 0x20 + i
, tmp
);
544 b43legacy_ram_write(dev
, 0x78 + i
, tmp
);
545 b43legacy_ram_write(dev
, 0x478 + i
, tmp
);
549 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev
*dev
)
551 b43legacy_write_mac_bssid_templates(dev
);
552 b43legacy_macfilter_set(dev
, B43legacy_MACFILTER_SELF
,
556 static void b43legacy_set_slot_time(struct b43legacy_wldev
*dev
,
559 /* slot_time is in usec. */
560 if (dev
->phy
.type
!= B43legacy_PHYTYPE_G
)
562 b43legacy_write16(dev
, 0x684, 510 + slot_time
);
563 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0010,
567 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev
*dev
)
569 b43legacy_set_slot_time(dev
, 9);
573 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev
*dev
)
575 b43legacy_set_slot_time(dev
, 20);
579 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
580 * Returns the _previously_ enabled IRQ mask.
582 static inline u32
b43legacy_interrupt_enable(struct b43legacy_wldev
*dev
,
587 old_mask
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
588 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
, old_mask
|
594 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
595 * Returns the _previously_ enabled IRQ mask.
597 static inline u32
b43legacy_interrupt_disable(struct b43legacy_wldev
*dev
,
602 old_mask
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
603 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
, old_mask
& ~mask
);
608 /* Synchronize IRQ top- and bottom-half.
609 * IRQs must be masked before calling this.
610 * This must not be called with the irq_lock held.
612 static void b43legacy_synchronize_irq(struct b43legacy_wldev
*dev
)
614 synchronize_irq(dev
->dev
->irq
);
615 tasklet_kill(&dev
->isr_tasklet
);
618 /* DummyTransmission function, as documented on
619 * http://bcm-specs.sipsolutions.net/DummyTransmission
621 void b43legacy_dummy_transmission(struct b43legacy_wldev
*dev
)
623 struct b43legacy_phy
*phy
= &dev
->phy
;
625 unsigned int max_loop
;
636 case B43legacy_PHYTYPE_B
:
637 case B43legacy_PHYTYPE_G
:
639 buffer
[0] = 0x000B846E;
646 for (i
= 0; i
< 5; i
++)
647 b43legacy_ram_write(dev
, i
* 4, buffer
[i
]);
649 /* dummy read follows */
650 b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
652 b43legacy_write16(dev
, 0x0568, 0x0000);
653 b43legacy_write16(dev
, 0x07C0, 0x0000);
654 b43legacy_write16(dev
, 0x050C, 0x0000);
655 b43legacy_write16(dev
, 0x0508, 0x0000);
656 b43legacy_write16(dev
, 0x050A, 0x0000);
657 b43legacy_write16(dev
, 0x054C, 0x0000);
658 b43legacy_write16(dev
, 0x056A, 0x0014);
659 b43legacy_write16(dev
, 0x0568, 0x0826);
660 b43legacy_write16(dev
, 0x0500, 0x0000);
661 b43legacy_write16(dev
, 0x0502, 0x0030);
663 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
664 b43legacy_radio_write16(dev
, 0x0051, 0x0017);
665 for (i
= 0x00; i
< max_loop
; i
++) {
666 value
= b43legacy_read16(dev
, 0x050E);
671 for (i
= 0x00; i
< 0x0A; i
++) {
672 value
= b43legacy_read16(dev
, 0x050E);
677 for (i
= 0x00; i
< 0x0A; i
++) {
678 value
= b43legacy_read16(dev
, 0x0690);
679 if (!(value
& 0x0100))
683 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
684 b43legacy_radio_write16(dev
, 0x0051, 0x0037);
687 /* Turn the Analog ON/OFF */
688 static void b43legacy_switch_analog(struct b43legacy_wldev
*dev
, int on
)
690 b43legacy_write16(dev
, B43legacy_MMIO_PHY0
, on
? 0 : 0xF4);
693 void b43legacy_wireless_core_reset(struct b43legacy_wldev
*dev
, u32 flags
)
698 flags
|= B43legacy_TMSLOW_PHYCLKEN
;
699 flags
|= B43legacy_TMSLOW_PHYRESET
;
700 ssb_device_enable(dev
->dev
, flags
);
701 msleep(2); /* Wait for the PLL to turn on. */
703 /* Now take the PHY out of Reset again */
704 tmslow
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
705 tmslow
|= SSB_TMSLOW_FGC
;
706 tmslow
&= ~B43legacy_TMSLOW_PHYRESET
;
707 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
708 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
710 tmslow
&= ~SSB_TMSLOW_FGC
;
711 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
712 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
716 b43legacy_switch_analog(dev
, 1);
718 macctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
719 macctl
&= ~B43legacy_MACCTL_GMODE
;
720 if (flags
& B43legacy_TMSLOW_GMODE
) {
721 macctl
|= B43legacy_MACCTL_GMODE
;
725 macctl
|= B43legacy_MACCTL_IHR_ENABLED
;
726 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, macctl
);
729 static void handle_irq_transmit_status(struct b43legacy_wldev
*dev
)
734 struct b43legacy_txstatus stat
;
737 v0
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_0
);
738 if (!(v0
& 0x00000001))
740 v1
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_1
);
742 stat
.cookie
= (v0
>> 16);
743 stat
.seq
= (v1
& 0x0000FFFF);
744 stat
.phy_stat
= ((v1
& 0x00FF0000) >> 16);
745 tmp
= (v0
& 0x0000FFFF);
746 stat
.frame_count
= ((tmp
& 0xF000) >> 12);
747 stat
.rts_count
= ((tmp
& 0x0F00) >> 8);
748 stat
.supp_reason
= ((tmp
& 0x001C) >> 2);
749 stat
.pm_indicated
= !!(tmp
& 0x0080);
750 stat
.intermediate
= !!(tmp
& 0x0040);
751 stat
.for_ampdu
= !!(tmp
& 0x0020);
752 stat
.acked
= !!(tmp
& 0x0002);
754 b43legacy_handle_txstatus(dev
, &stat
);
758 static void drain_txstatus_queue(struct b43legacy_wldev
*dev
)
762 if (dev
->dev
->id
.revision
< 5)
764 /* Read all entries from the microcode TXstatus FIFO
765 * and throw them away.
768 dummy
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_0
);
769 if (!(dummy
& 0x00000001))
771 dummy
= b43legacy_read32(dev
, B43legacy_MMIO_XMITSTAT_1
);
775 static u32
b43legacy_jssi_read(struct b43legacy_wldev
*dev
)
779 val
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
, 0x40A);
781 val
|= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
, 0x408);
786 static void b43legacy_jssi_write(struct b43legacy_wldev
*dev
, u32 jssi
)
788 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x408,
789 (jssi
& 0x0000FFFF));
790 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x40A,
791 (jssi
& 0xFFFF0000) >> 16);
794 static void b43legacy_generate_noise_sample(struct b43legacy_wldev
*dev
)
796 b43legacy_jssi_write(dev
, 0x7F7F7F7F);
797 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
,
798 b43legacy_read32(dev
,
799 B43legacy_MMIO_STATUS2_BITFIELD
)
801 B43legacy_WARN_ON(dev
->noisecalc
.channel_at_start
!=
805 static void b43legacy_calculate_link_quality(struct b43legacy_wldev
*dev
)
807 /* Top half of Link Quality calculation. */
809 if (dev
->noisecalc
.calculation_running
)
811 dev
->noisecalc
.channel_at_start
= dev
->phy
.channel
;
812 dev
->noisecalc
.calculation_running
= 1;
813 dev
->noisecalc
.nr_samples
= 0;
815 b43legacy_generate_noise_sample(dev
);
818 static void handle_irq_noise(struct b43legacy_wldev
*dev
)
820 struct b43legacy_phy
*phy
= &dev
->phy
;
827 /* Bottom half of Link Quality calculation. */
829 B43legacy_WARN_ON(!dev
->noisecalc
.calculation_running
);
830 if (dev
->noisecalc
.channel_at_start
!= phy
->channel
)
831 goto drop_calculation
;
832 *((__le32
*)noise
) = cpu_to_le32(b43legacy_jssi_read(dev
));
833 if (noise
[0] == 0x7F || noise
[1] == 0x7F ||
834 noise
[2] == 0x7F || noise
[3] == 0x7F)
837 /* Get the noise samples. */
838 B43legacy_WARN_ON(dev
->noisecalc
.nr_samples
>= 8);
839 i
= dev
->noisecalc
.nr_samples
;
840 noise
[0] = limit_value(noise
[0], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
841 noise
[1] = limit_value(noise
[1], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
842 noise
[2] = limit_value(noise
[2], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
843 noise
[3] = limit_value(noise
[3], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
844 dev
->noisecalc
.samples
[i
][0] = phy
->nrssi_lt
[noise
[0]];
845 dev
->noisecalc
.samples
[i
][1] = phy
->nrssi_lt
[noise
[1]];
846 dev
->noisecalc
.samples
[i
][2] = phy
->nrssi_lt
[noise
[2]];
847 dev
->noisecalc
.samples
[i
][3] = phy
->nrssi_lt
[noise
[3]];
848 dev
->noisecalc
.nr_samples
++;
849 if (dev
->noisecalc
.nr_samples
== 8) {
850 /* Calculate the Link Quality by the noise samples. */
852 for (i
= 0; i
< 8; i
++) {
853 for (j
= 0; j
< 4; j
++)
854 average
+= dev
->noisecalc
.samples
[i
][j
];
860 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
862 tmp
= (tmp
/ 128) & 0x1F;
872 dev
->stats
.link_noise
= average
;
874 dev
->noisecalc
.calculation_running
= 0;
878 b43legacy_generate_noise_sample(dev
);
881 static void handle_irq_tbtt_indication(struct b43legacy_wldev
*dev
)
883 if (b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_AP
)) {
886 if (1/*FIXME: the last PSpoll frame was sent successfully */)
887 b43legacy_power_saving_ctl_bits(dev
, -1, -1);
889 dev
->reg124_set_0x4
= 0;
890 if (b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_IBSS
))
891 dev
->reg124_set_0x4
= 1;
894 static void handle_irq_atim_end(struct b43legacy_wldev
*dev
)
896 if (!dev
->reg124_set_0x4
) /*FIXME rename this variable*/
898 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
,
899 b43legacy_read32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
)
903 static void handle_irq_pmq(struct b43legacy_wldev
*dev
)
910 tmp
= b43legacy_read32(dev
, B43legacy_MMIO_PS_STATUS
);
911 if (!(tmp
& 0x00000008))
914 /* 16bit write is odd, but correct. */
915 b43legacy_write16(dev
, B43legacy_MMIO_PS_STATUS
, 0x0002);
918 static void b43legacy_write_template_common(struct b43legacy_wldev
*dev
,
919 const u8
*data
, u16 size
,
921 u16 shm_size_offset
, u8 rate
)
925 struct b43legacy_plcp_hdr4 plcp
;
928 b43legacy_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
);
929 b43legacy_ram_write(dev
, ram_offset
, le32_to_cpu(plcp
.data
));
930 ram_offset
+= sizeof(u32
);
931 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
932 * So leave the first two bytes of the next write blank.
934 tmp
= (u32
)(data
[0]) << 16;
935 tmp
|= (u32
)(data
[1]) << 24;
936 b43legacy_ram_write(dev
, ram_offset
, tmp
);
937 ram_offset
+= sizeof(u32
);
938 for (i
= 2; i
< size
; i
+= sizeof(u32
)) {
939 tmp
= (u32
)(data
[i
+ 0]);
941 tmp
|= (u32
)(data
[i
+ 1]) << 8;
943 tmp
|= (u32
)(data
[i
+ 2]) << 16;
945 tmp
|= (u32
)(data
[i
+ 3]) << 24;
946 b43legacy_ram_write(dev
, ram_offset
+ i
- 2, tmp
);
948 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_size_offset
,
949 size
+ sizeof(struct b43legacy_plcp_hdr6
));
952 static void b43legacy_write_beacon_template(struct b43legacy_wldev
*dev
,
954 u16 shm_size_offset
, u8 rate
)
959 B43legacy_WARN_ON(!dev
->cached_beacon
);
960 len
= min((size_t)dev
->cached_beacon
->len
,
961 0x200 - sizeof(struct b43legacy_plcp_hdr6
));
962 data
= (const u8
*)(dev
->cached_beacon
->data
);
963 b43legacy_write_template_common(dev
, data
,
965 shm_size_offset
, rate
);
968 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev
*dev
,
969 u16 shm_offset
, u16 size
,
972 struct b43legacy_plcp_hdr4 plcp
;
977 b43legacy_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
);
978 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
981 B43legacy_RATE_TO_100KBPS(rate
));
982 /* Write PLCP in two parts and timing for packet transfer */
983 tmp
= le32_to_cpu(plcp
.data
);
984 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
,
986 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
+ 2,
988 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, shm_offset
+ 6,
992 /* Instead of using custom probe response template, this function
993 * just patches custom beacon template by:
994 * 1) Changing packet type
995 * 2) Patching duration field
998 static u8
*b43legacy_generate_probe_resp(struct b43legacy_wldev
*dev
,
999 u16
*dest_size
, u8 rate
)
1008 struct ieee80211_hdr
*hdr
;
1010 B43legacy_WARN_ON(!dev
->cached_beacon
);
1011 src_size
= dev
->cached_beacon
->len
;
1012 src_data
= (const u8
*)dev
->cached_beacon
->data
;
1014 if (unlikely(src_size
< 0x24)) {
1015 b43legacydbg(dev
->wl
, "b43legacy_generate_probe_resp: "
1016 "invalid beacon\n");
1020 dest_data
= kmalloc(src_size
, GFP_ATOMIC
);
1021 if (unlikely(!dest_data
))
1024 /* 0x24 is offset of first variable-len Information-Element
1027 memcpy(dest_data
, src_data
, 0x24);
1030 for (; src_pos
< src_size
- 2; src_pos
+= elem_size
) {
1031 elem_size
= src_data
[src_pos
+ 1] + 2;
1032 if (src_data
[src_pos
] != 0x05) { /* TIM */
1033 memcpy(dest_data
+ dest_pos
, src_data
+ src_pos
,
1035 dest_pos
+= elem_size
;
1038 *dest_size
= dest_pos
;
1039 hdr
= (struct ieee80211_hdr
*)dest_data
;
1041 /* Set the frame control. */
1042 hdr
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_MGMT
|
1043 IEEE80211_STYPE_PROBE_RESP
);
1044 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
1047 B43legacy_RATE_TO_100KBPS(rate
));
1048 hdr
->duration_id
= dur
;
1053 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev
*dev
,
1055 u16 shm_size_offset
, u8 rate
)
1057 u8
*probe_resp_data
;
1060 B43legacy_WARN_ON(!dev
->cached_beacon
);
1061 size
= dev
->cached_beacon
->len
;
1062 probe_resp_data
= b43legacy_generate_probe_resp(dev
, &size
, rate
);
1063 if (unlikely(!probe_resp_data
))
1066 /* Looks like PLCP headers plus packet timings are stored for
1067 * all possible basic rates
1069 b43legacy_write_probe_resp_plcp(dev
, 0x31A, size
,
1070 B43legacy_CCK_RATE_1MB
);
1071 b43legacy_write_probe_resp_plcp(dev
, 0x32C, size
,
1072 B43legacy_CCK_RATE_2MB
);
1073 b43legacy_write_probe_resp_plcp(dev
, 0x33E, size
,
1074 B43legacy_CCK_RATE_5MB
);
1075 b43legacy_write_probe_resp_plcp(dev
, 0x350, size
,
1076 B43legacy_CCK_RATE_11MB
);
1078 size
= min((size_t)size
,
1079 0x200 - sizeof(struct b43legacy_plcp_hdr6
));
1080 b43legacy_write_template_common(dev
, probe_resp_data
,
1082 shm_size_offset
, rate
);
1083 kfree(probe_resp_data
);
1086 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev
*dev
,
1087 struct sk_buff
*beacon
)
1089 if (dev
->cached_beacon
)
1090 kfree_skb(dev
->cached_beacon
);
1091 dev
->cached_beacon
= beacon
;
1096 static void b43legacy_update_templates(struct b43legacy_wldev
*dev
)
1100 B43legacy_WARN_ON(!dev
->cached_beacon
);
1102 b43legacy_write_beacon_template(dev
, 0x68, 0x18,
1103 B43legacy_CCK_RATE_1MB
);
1104 b43legacy_write_beacon_template(dev
, 0x468, 0x1A,
1105 B43legacy_CCK_RATE_1MB
);
1106 b43legacy_write_probe_resp_template(dev
, 0x268, 0x4A,
1107 B43legacy_CCK_RATE_11MB
);
1109 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
);
1111 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
, status
);
1114 static void b43legacy_refresh_templates(struct b43legacy_wldev
*dev
,
1115 struct sk_buff
*beacon
)
1119 err
= b43legacy_refresh_cached_beacon(dev
, beacon
);
1122 b43legacy_update_templates(dev
);
1125 static void b43legacy_set_ssid(struct b43legacy_wldev
*dev
,
1126 const u8
*ssid
, u8 ssid_len
)
1132 len
= min((u16
)ssid_len
, (u16
)0x100);
1133 for (i
= 0; i
< len
; i
+= sizeof(u32
)) {
1134 tmp
= (u32
)(ssid
[i
+ 0]);
1136 tmp
|= (u32
)(ssid
[i
+ 1]) << 8;
1138 tmp
|= (u32
)(ssid
[i
+ 2]) << 16;
1140 tmp
|= (u32
)(ssid
[i
+ 3]) << 24;
1141 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
,
1144 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1148 static void b43legacy_set_beacon_int(struct b43legacy_wldev
*dev
,
1151 b43legacy_time_lock(dev
);
1152 if (dev
->dev
->id
.revision
>= 3)
1153 b43legacy_write32(dev
, 0x188, (beacon_int
<< 16));
1155 b43legacy_write16(dev
, 0x606, (beacon_int
>> 6));
1156 b43legacy_write16(dev
, 0x610, beacon_int
);
1158 b43legacy_time_unlock(dev
);
1161 static void handle_irq_beacon(struct b43legacy_wldev
*dev
)
1165 if (!b43legacy_is_mode(dev
->wl
, IEEE80211_IF_TYPE_AP
))
1168 dev
->irq_savedstate
&= ~B43legacy_IRQ_BEACON
;
1169 status
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
);
1171 if (!dev
->cached_beacon
|| ((status
& 0x1) && (status
& 0x2))) {
1172 /* ACK beacon IRQ. */
1173 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1174 B43legacy_IRQ_BEACON
);
1175 dev
->irq_savedstate
|= B43legacy_IRQ_BEACON
;
1176 if (dev
->cached_beacon
)
1177 kfree_skb(dev
->cached_beacon
);
1178 dev
->cached_beacon
= NULL
;
1181 if (!(status
& 0x1)) {
1182 b43legacy_write_beacon_template(dev
, 0x68, 0x18,
1183 B43legacy_CCK_RATE_1MB
);
1185 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
,
1188 if (!(status
& 0x2)) {
1189 b43legacy_write_beacon_template(dev
, 0x468, 0x1A,
1190 B43legacy_CCK_RATE_1MB
);
1192 b43legacy_write32(dev
, B43legacy_MMIO_STATUS2_BITFIELD
,
1197 static void handle_irq_ucode_debug(struct b43legacy_wldev
*dev
)
1201 /* Interrupt handler bottom-half */
1202 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev
*dev
)
1205 u32 dma_reason
[ARRAY_SIZE(dev
->dma_reason
)];
1206 u32 merged_dma_reason
= 0;
1208 unsigned long flags
;
1210 spin_lock_irqsave(&dev
->wl
->irq_lock
, flags
);
1212 B43legacy_WARN_ON(b43legacy_status(dev
) <
1213 B43legacy_STAT_INITIALIZED
);
1215 reason
= dev
->irq_reason
;
1216 for (i
= 0; i
< ARRAY_SIZE(dma_reason
); i
++) {
1217 dma_reason
[i
] = dev
->dma_reason
[i
];
1218 merged_dma_reason
|= dma_reason
[i
];
1221 if (unlikely(reason
& B43legacy_IRQ_MAC_TXERR
))
1222 b43legacyerr(dev
->wl
, "MAC transmission error\n");
1224 if (unlikely(reason
& B43legacy_IRQ_PHY_TXERR
)) {
1225 b43legacyerr(dev
->wl
, "PHY transmission error\n");
1227 if (unlikely(atomic_dec_and_test(&dev
->phy
.txerr_cnt
))) {
1228 b43legacyerr(dev
->wl
, "Too many PHY TX errors, "
1229 "restarting the controller\n");
1230 b43legacy_controller_restart(dev
, "PHY TX errors");
1234 if (unlikely(merged_dma_reason
& (B43legacy_DMAIRQ_FATALMASK
|
1235 B43legacy_DMAIRQ_NONFATALMASK
))) {
1236 if (merged_dma_reason
& B43legacy_DMAIRQ_FATALMASK
) {
1237 b43legacyerr(dev
->wl
, "Fatal DMA error: "
1238 "0x%08X, 0x%08X, 0x%08X, "
1239 "0x%08X, 0x%08X, 0x%08X\n",
1240 dma_reason
[0], dma_reason
[1],
1241 dma_reason
[2], dma_reason
[3],
1242 dma_reason
[4], dma_reason
[5]);
1243 b43legacy_controller_restart(dev
, "DMA error");
1245 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1248 if (merged_dma_reason
& B43legacy_DMAIRQ_NONFATALMASK
)
1249 b43legacyerr(dev
->wl
, "DMA error: "
1250 "0x%08X, 0x%08X, 0x%08X, "
1251 "0x%08X, 0x%08X, 0x%08X\n",
1252 dma_reason
[0], dma_reason
[1],
1253 dma_reason
[2], dma_reason
[3],
1254 dma_reason
[4], dma_reason
[5]);
1257 if (unlikely(reason
& B43legacy_IRQ_UCODE_DEBUG
))
1258 handle_irq_ucode_debug(dev
);
1259 if (reason
& B43legacy_IRQ_TBTT_INDI
)
1260 handle_irq_tbtt_indication(dev
);
1261 if (reason
& B43legacy_IRQ_ATIM_END
)
1262 handle_irq_atim_end(dev
);
1263 if (reason
& B43legacy_IRQ_BEACON
)
1264 handle_irq_beacon(dev
);
1265 if (reason
& B43legacy_IRQ_PMQ
)
1266 handle_irq_pmq(dev
);
1267 if (reason
& B43legacy_IRQ_TXFIFO_FLUSH_OK
)
1269 if (reason
& B43legacy_IRQ_NOISESAMPLE_OK
)
1270 handle_irq_noise(dev
);
1272 /* Check the DMA reason registers for received data. */
1273 if (dma_reason
[0] & B43legacy_DMAIRQ_RX_DONE
) {
1274 if (b43legacy_using_pio(dev
))
1275 b43legacy_pio_rx(dev
->pio
.queue0
);
1277 b43legacy_dma_rx(dev
->dma
.rx_ring0
);
1279 B43legacy_WARN_ON(dma_reason
[1] & B43legacy_DMAIRQ_RX_DONE
);
1280 B43legacy_WARN_ON(dma_reason
[2] & B43legacy_DMAIRQ_RX_DONE
);
1281 if (dma_reason
[3] & B43legacy_DMAIRQ_RX_DONE
) {
1282 if (b43legacy_using_pio(dev
))
1283 b43legacy_pio_rx(dev
->pio
.queue3
);
1285 b43legacy_dma_rx(dev
->dma
.rx_ring3
);
1287 B43legacy_WARN_ON(dma_reason
[4] & B43legacy_DMAIRQ_RX_DONE
);
1288 B43legacy_WARN_ON(dma_reason
[5] & B43legacy_DMAIRQ_RX_DONE
);
1290 if (reason
& B43legacy_IRQ_TX_OK
)
1291 handle_irq_transmit_status(dev
);
1293 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
1295 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1298 static void pio_irq_workaround(struct b43legacy_wldev
*dev
,
1299 u16 base
, int queueidx
)
1303 rxctl
= b43legacy_read16(dev
, base
+ B43legacy_PIO_RXCTL
);
1304 if (rxctl
& B43legacy_PIO_RXCTL_DATAAVAILABLE
)
1305 dev
->dma_reason
[queueidx
] |= B43legacy_DMAIRQ_RX_DONE
;
1307 dev
->dma_reason
[queueidx
] &= ~B43legacy_DMAIRQ_RX_DONE
;
1310 static void b43legacy_interrupt_ack(struct b43legacy_wldev
*dev
, u32 reason
)
1312 if (b43legacy_using_pio(dev
) &&
1313 (dev
->dev
->id
.revision
< 3) &&
1314 (!(reason
& B43legacy_IRQ_PIO_WORKAROUND
))) {
1315 /* Apply a PIO specific workaround to the dma_reasons */
1316 pio_irq_workaround(dev
, B43legacy_MMIO_PIO1_BASE
, 0);
1317 pio_irq_workaround(dev
, B43legacy_MMIO_PIO2_BASE
, 1);
1318 pio_irq_workaround(dev
, B43legacy_MMIO_PIO3_BASE
, 2);
1319 pio_irq_workaround(dev
, B43legacy_MMIO_PIO4_BASE
, 3);
1322 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
, reason
);
1324 b43legacy_write32(dev
, B43legacy_MMIO_DMA0_REASON
,
1325 dev
->dma_reason
[0]);
1326 b43legacy_write32(dev
, B43legacy_MMIO_DMA1_REASON
,
1327 dev
->dma_reason
[1]);
1328 b43legacy_write32(dev
, B43legacy_MMIO_DMA2_REASON
,
1329 dev
->dma_reason
[2]);
1330 b43legacy_write32(dev
, B43legacy_MMIO_DMA3_REASON
,
1331 dev
->dma_reason
[3]);
1332 b43legacy_write32(dev
, B43legacy_MMIO_DMA4_REASON
,
1333 dev
->dma_reason
[4]);
1334 b43legacy_write32(dev
, B43legacy_MMIO_DMA5_REASON
,
1335 dev
->dma_reason
[5]);
1338 /* Interrupt handler top-half */
1339 static irqreturn_t
b43legacy_interrupt_handler(int irq
, void *dev_id
)
1341 irqreturn_t ret
= IRQ_NONE
;
1342 struct b43legacy_wldev
*dev
= dev_id
;
1348 spin_lock(&dev
->wl
->irq_lock
);
1350 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
)
1352 reason
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1353 if (reason
== 0xffffffff) /* shared IRQ */
1356 reason
&= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
);
1360 dev
->dma_reason
[0] = b43legacy_read32(dev
,
1361 B43legacy_MMIO_DMA0_REASON
)
1363 dev
->dma_reason
[1] = b43legacy_read32(dev
,
1364 B43legacy_MMIO_DMA1_REASON
)
1366 dev
->dma_reason
[2] = b43legacy_read32(dev
,
1367 B43legacy_MMIO_DMA2_REASON
)
1369 dev
->dma_reason
[3] = b43legacy_read32(dev
,
1370 B43legacy_MMIO_DMA3_REASON
)
1372 dev
->dma_reason
[4] = b43legacy_read32(dev
,
1373 B43legacy_MMIO_DMA4_REASON
)
1375 dev
->dma_reason
[5] = b43legacy_read32(dev
,
1376 B43legacy_MMIO_DMA5_REASON
)
1379 b43legacy_interrupt_ack(dev
, reason
);
1380 /* disable all IRQs. They are enabled again in the bottom half. */
1381 dev
->irq_savedstate
= b43legacy_interrupt_disable(dev
,
1383 /* save the reason code and call our bottom half. */
1384 dev
->irq_reason
= reason
;
1385 tasklet_schedule(&dev
->isr_tasklet
);
1388 spin_unlock(&dev
->wl
->irq_lock
);
1393 static void b43legacy_release_firmware(struct b43legacy_wldev
*dev
)
1395 release_firmware(dev
->fw
.ucode
);
1396 dev
->fw
.ucode
= NULL
;
1397 release_firmware(dev
->fw
.pcm
);
1399 release_firmware(dev
->fw
.initvals
);
1400 dev
->fw
.initvals
= NULL
;
1401 release_firmware(dev
->fw
.initvals_band
);
1402 dev
->fw
.initvals_band
= NULL
;
1405 static void b43legacy_print_fw_helptext(struct b43legacy_wl
*wl
)
1407 b43legacyerr(wl
, "You must go to http://linuxwireless.org/en/users/"
1408 "Drivers/b43#devicefirmware "
1409 "and download the correct firmware (version 3).\n");
1412 static int do_request_fw(struct b43legacy_wldev
*dev
,
1414 const struct firmware
**fw
)
1416 char path
[sizeof(modparam_fwpostfix
) + 32];
1417 struct b43legacy_fw_header
*hdr
;
1424 snprintf(path
, ARRAY_SIZE(path
),
1425 "b43legacy%s/%s.fw",
1426 modparam_fwpostfix
, name
);
1427 err
= request_firmware(fw
, path
, dev
->dev
->dev
);
1429 b43legacyerr(dev
->wl
, "Firmware file \"%s\" not found "
1430 "or load failed.\n", path
);
1433 if ((*fw
)->size
< sizeof(struct b43legacy_fw_header
))
1435 hdr
= (struct b43legacy_fw_header
*)((*fw
)->data
);
1436 switch (hdr
->type
) {
1437 case B43legacy_FW_TYPE_UCODE
:
1438 case B43legacy_FW_TYPE_PCM
:
1439 size
= be32_to_cpu(hdr
->size
);
1440 if (size
!= (*fw
)->size
- sizeof(struct b43legacy_fw_header
))
1443 case B43legacy_FW_TYPE_IV
:
1454 b43legacyerr(dev
->wl
, "Firmware file \"%s\" format error.\n", path
);
1458 static int b43legacy_request_firmware(struct b43legacy_wldev
*dev
)
1460 struct b43legacy_firmware
*fw
= &dev
->fw
;
1461 const u8 rev
= dev
->dev
->id
.revision
;
1462 const char *filename
;
1466 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
1469 filename
= "ucode2";
1471 filename
= "ucode4";
1473 filename
= "ucode5";
1474 err
= do_request_fw(dev
, filename
, &fw
->ucode
);
1483 err
= do_request_fw(dev
, filename
, &fw
->pcm
);
1487 if (!fw
->initvals
) {
1488 switch (dev
->phy
.type
) {
1489 case B43legacy_PHYTYPE_G
:
1490 if ((rev
>= 5) && (rev
<= 10))
1491 filename
= "b0g0initvals5";
1492 else if (rev
== 2 || rev
== 4)
1493 filename
= "b0g0initvals2";
1495 goto err_no_initvals
;
1498 goto err_no_initvals
;
1500 err
= do_request_fw(dev
, filename
, &fw
->initvals
);
1504 if (!fw
->initvals_band
) {
1505 switch (dev
->phy
.type
) {
1506 case B43legacy_PHYTYPE_G
:
1507 if ((rev
>= 5) && (rev
<= 10))
1508 filename
= "b0g0bsinitvals5";
1511 else if (rev
== 2 || rev
== 4)
1514 goto err_no_initvals
;
1517 goto err_no_initvals
;
1519 err
= do_request_fw(dev
, filename
, &fw
->initvals_band
);
1527 b43legacy_print_fw_helptext(dev
->wl
);
1532 b43legacyerr(dev
->wl
, "No Initial Values firmware file for PHY %u, "
1533 "core rev %u\n", dev
->phy
.type
, rev
);
1537 b43legacy_release_firmware(dev
);
1541 static int b43legacy_upload_microcode(struct b43legacy_wldev
*dev
)
1543 const size_t hdr_len
= sizeof(struct b43legacy_fw_header
);
1554 /* Upload Microcode. */
1555 data
= (__be32
*) (dev
->fw
.ucode
->data
+ hdr_len
);
1556 len
= (dev
->fw
.ucode
->size
- hdr_len
) / sizeof(__be32
);
1557 b43legacy_shm_control_word(dev
,
1558 B43legacy_SHM_UCODE
|
1559 B43legacy_SHM_AUTOINC_W
,
1561 for (i
= 0; i
< len
; i
++) {
1562 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
,
1563 be32_to_cpu(data
[i
]));
1568 /* Upload PCM data. */
1569 data
= (__be32
*) (dev
->fw
.pcm
->data
+ hdr_len
);
1570 len
= (dev
->fw
.pcm
->size
- hdr_len
) / sizeof(__be32
);
1571 b43legacy_shm_control_word(dev
, B43legacy_SHM_HW
, 0x01EA);
1572 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
, 0x00004000);
1573 /* No need for autoinc bit in SHM_HW */
1574 b43legacy_shm_control_word(dev
, B43legacy_SHM_HW
, 0x01EB);
1575 for (i
= 0; i
< len
; i
++) {
1576 b43legacy_write32(dev
, B43legacy_MMIO_SHM_DATA
,
1577 be32_to_cpu(data
[i
]));
1582 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1584 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, 0x00020402);
1586 /* Wait for the microcode to load and respond */
1589 tmp
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1590 if (tmp
== B43legacy_IRQ_MAC_SUSPENDED
)
1593 if (i
>= B43legacy_IRQWAIT_MAX_RETRIES
) {
1594 b43legacyerr(dev
->wl
, "Microcode not responding\n");
1595 b43legacy_print_fw_helptext(dev
->wl
);
1601 /* dummy read follows */
1602 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1604 /* Get and check the revisions. */
1605 fwrev
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1606 B43legacy_SHM_SH_UCODEREV
);
1607 fwpatch
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1608 B43legacy_SHM_SH_UCODEPATCH
);
1609 fwdate
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1610 B43legacy_SHM_SH_UCODEDATE
);
1611 fwtime
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1612 B43legacy_SHM_SH_UCODETIME
);
1614 if (fwrev
> 0x128) {
1615 b43legacyerr(dev
->wl
, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1616 " Only firmware from binary drivers version 3.x"
1617 " is supported. You must change your firmware"
1619 b43legacy_print_fw_helptext(dev
->wl
);
1620 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, 0);
1624 b43legacydbg(dev
->wl
, "Loading firmware version 0x%X, patch level %u "
1625 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev
, fwpatch
,
1626 (fwdate
>> 12) & 0xF, (fwdate
>> 8) & 0xF, fwdate
& 0xFF,
1627 (fwtime
>> 11) & 0x1F, (fwtime
>> 5) & 0x3F, fwtime
& 0x1F);
1629 dev
->fw
.rev
= fwrev
;
1630 dev
->fw
.patch
= fwpatch
;
1636 static int b43legacy_write_initvals(struct b43legacy_wldev
*dev
,
1637 const struct b43legacy_iv
*ivals
,
1641 const struct b43legacy_iv
*iv
;
1646 BUILD_BUG_ON(sizeof(struct b43legacy_iv
) != 6);
1648 for (i
= 0; i
< count
; i
++) {
1649 if (array_size
< sizeof(iv
->offset_size
))
1651 array_size
-= sizeof(iv
->offset_size
);
1652 offset
= be16_to_cpu(iv
->offset_size
);
1653 bit32
= !!(offset
& B43legacy_IV_32BIT
);
1654 offset
&= B43legacy_IV_OFFSET_MASK
;
1655 if (offset
>= 0x1000)
1660 if (array_size
< sizeof(iv
->data
.d32
))
1662 array_size
-= sizeof(iv
->data
.d32
);
1664 value
= be32_to_cpu(get_unaligned(&iv
->data
.d32
));
1665 b43legacy_write32(dev
, offset
, value
);
1667 iv
= (const struct b43legacy_iv
*)((const uint8_t *)iv
+
1673 if (array_size
< sizeof(iv
->data
.d16
))
1675 array_size
-= sizeof(iv
->data
.d16
);
1677 value
= be16_to_cpu(iv
->data
.d16
);
1678 b43legacy_write16(dev
, offset
, value
);
1680 iv
= (const struct b43legacy_iv
*)((const uint8_t *)iv
+
1691 b43legacyerr(dev
->wl
, "Initial Values Firmware file-format error.\n");
1692 b43legacy_print_fw_helptext(dev
->wl
);
1697 static int b43legacy_upload_initvals(struct b43legacy_wldev
*dev
)
1699 const size_t hdr_len
= sizeof(struct b43legacy_fw_header
);
1700 const struct b43legacy_fw_header
*hdr
;
1701 struct b43legacy_firmware
*fw
= &dev
->fw
;
1702 const struct b43legacy_iv
*ivals
;
1706 hdr
= (const struct b43legacy_fw_header
*)(fw
->initvals
->data
);
1707 ivals
= (const struct b43legacy_iv
*)(fw
->initvals
->data
+ hdr_len
);
1708 count
= be32_to_cpu(hdr
->size
);
1709 err
= b43legacy_write_initvals(dev
, ivals
, count
,
1710 fw
->initvals
->size
- hdr_len
);
1713 if (fw
->initvals_band
) {
1714 hdr
= (const struct b43legacy_fw_header
*)
1715 (fw
->initvals_band
->data
);
1716 ivals
= (const struct b43legacy_iv
*)(fw
->initvals_band
->data
1718 count
= be32_to_cpu(hdr
->size
);
1719 err
= b43legacy_write_initvals(dev
, ivals
, count
,
1720 fw
->initvals_band
->size
- hdr_len
);
1729 /* Initialize the GPIOs
1730 * http://bcm-specs.sipsolutions.net/GPIO
1732 static int b43legacy_gpio_init(struct b43legacy_wldev
*dev
)
1734 struct ssb_bus
*bus
= dev
->dev
->bus
;
1735 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1739 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
,
1740 b43legacy_read32(dev
,
1741 B43legacy_MMIO_STATUS_BITFIELD
)
1744 b43legacy_write16(dev
, B43legacy_MMIO_GPIO_MASK
,
1745 b43legacy_read16(dev
,
1746 B43legacy_MMIO_GPIO_MASK
)
1751 if (dev
->dev
->bus
->chip_id
== 0x4301) {
1755 if (dev
->dev
->bus
->sprom
.boardflags_lo
& B43legacy_BFL_PACTRL
) {
1756 b43legacy_write16(dev
, B43legacy_MMIO_GPIO_MASK
,
1757 b43legacy_read16(dev
,
1758 B43legacy_MMIO_GPIO_MASK
)
1763 if (dev
->dev
->id
.revision
>= 2)
1764 mask
|= 0x0010; /* FIXME: This is redundant. */
1766 #ifdef CONFIG_SSB_DRIVER_PCICORE
1767 pcidev
= bus
->pcicore
.dev
;
1769 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1772 ssb_write32(gpiodev
, B43legacy_GPIO_CONTROL
,
1773 (ssb_read32(gpiodev
, B43legacy_GPIO_CONTROL
)
1779 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1780 static void b43legacy_gpio_cleanup(struct b43legacy_wldev
*dev
)
1782 struct ssb_bus
*bus
= dev
->dev
->bus
;
1783 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1785 #ifdef CONFIG_SSB_DRIVER_PCICORE
1786 pcidev
= bus
->pcicore
.dev
;
1788 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1791 ssb_write32(gpiodev
, B43legacy_GPIO_CONTROL
, 0);
1794 /* http://bcm-specs.sipsolutions.net/EnableMac */
1795 void b43legacy_mac_enable(struct b43legacy_wldev
*dev
)
1797 dev
->mac_suspended
--;
1798 B43legacy_WARN_ON(dev
->mac_suspended
< 0);
1799 B43legacy_WARN_ON(irqs_disabled());
1800 if (dev
->mac_suspended
== 0) {
1801 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
,
1802 b43legacy_read32(dev
,
1803 B43legacy_MMIO_STATUS_BITFIELD
)
1804 | B43legacy_SBF_MAC_ENABLED
);
1805 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
,
1806 B43legacy_IRQ_MAC_SUSPENDED
);
1807 /* the next two are dummy reads */
1808 b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
1809 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1810 b43legacy_power_saving_ctl_bits(dev
, -1, -1);
1812 /* Re-enable IRQs. */
1813 spin_lock_irq(&dev
->wl
->irq_lock
);
1814 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
1815 spin_unlock_irq(&dev
->wl
->irq_lock
);
1819 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1820 void b43legacy_mac_suspend(struct b43legacy_wldev
*dev
)
1826 B43legacy_WARN_ON(irqs_disabled());
1827 B43legacy_WARN_ON(dev
->mac_suspended
< 0);
1829 if (dev
->mac_suspended
== 0) {
1830 /* Mask IRQs before suspending MAC. Otherwise
1831 * the MAC stays busy and won't suspend. */
1832 spin_lock_irq(&dev
->wl
->irq_lock
);
1833 tmp
= b43legacy_interrupt_disable(dev
, B43legacy_IRQ_ALL
);
1834 spin_unlock_irq(&dev
->wl
->irq_lock
);
1835 b43legacy_synchronize_irq(dev
);
1836 dev
->irq_savedstate
= tmp
;
1838 b43legacy_power_saving_ctl_bits(dev
, -1, 1);
1839 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
,
1840 b43legacy_read32(dev
,
1841 B43legacy_MMIO_STATUS_BITFIELD
)
1842 & ~B43legacy_SBF_MAC_ENABLED
);
1843 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
1844 for (i
= 40; i
; i
--) {
1845 tmp
= b43legacy_read32(dev
,
1846 B43legacy_MMIO_GEN_IRQ_REASON
);
1847 if (tmp
& B43legacy_IRQ_MAC_SUSPENDED
)
1851 b43legacyerr(dev
->wl
, "MAC suspend failed\n");
1854 dev
->mac_suspended
++;
1857 static void b43legacy_adjust_opmode(struct b43legacy_wldev
*dev
)
1859 struct b43legacy_wl
*wl
= dev
->wl
;
1863 ctl
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
1864 /* Reset status to STA infrastructure mode. */
1865 ctl
&= ~B43legacy_MACCTL_AP
;
1866 ctl
&= ~B43legacy_MACCTL_KEEP_CTL
;
1867 ctl
&= ~B43legacy_MACCTL_KEEP_BADPLCP
;
1868 ctl
&= ~B43legacy_MACCTL_KEEP_BAD
;
1869 ctl
&= ~B43legacy_MACCTL_PROMISC
;
1870 ctl
&= ~B43legacy_MACCTL_BEACPROMISC
;
1871 ctl
|= B43legacy_MACCTL_INFRA
;
1873 if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
))
1874 ctl
|= B43legacy_MACCTL_AP
;
1875 else if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_IBSS
))
1876 ctl
&= ~B43legacy_MACCTL_INFRA
;
1878 if (wl
->filter_flags
& FIF_CONTROL
)
1879 ctl
|= B43legacy_MACCTL_KEEP_CTL
;
1880 if (wl
->filter_flags
& FIF_FCSFAIL
)
1881 ctl
|= B43legacy_MACCTL_KEEP_BAD
;
1882 if (wl
->filter_flags
& FIF_PLCPFAIL
)
1883 ctl
|= B43legacy_MACCTL_KEEP_BADPLCP
;
1884 if (wl
->filter_flags
& FIF_PROMISC_IN_BSS
)
1885 ctl
|= B43legacy_MACCTL_PROMISC
;
1886 if (wl
->filter_flags
& FIF_BCN_PRBRESP_PROMISC
)
1887 ctl
|= B43legacy_MACCTL_BEACPROMISC
;
1889 /* Workaround: On old hardware the HW-MAC-address-filter
1890 * doesn't work properly, so always run promisc in filter
1891 * it in software. */
1892 if (dev
->dev
->id
.revision
<= 4)
1893 ctl
|= B43legacy_MACCTL_PROMISC
;
1895 b43legacy_write32(dev
, B43legacy_MMIO_MACCTL
, ctl
);
1898 if ((ctl
& B43legacy_MACCTL_INFRA
) &&
1899 !(ctl
& B43legacy_MACCTL_AP
)) {
1900 if (dev
->dev
->bus
->chip_id
== 0x4306 &&
1901 dev
->dev
->bus
->chip_rev
== 3)
1906 b43legacy_write16(dev
, 0x612, cfp_pretbtt
);
1909 static void b43legacy_rate_memory_write(struct b43legacy_wldev
*dev
,
1917 offset
+= (b43legacy_plcp_get_ratecode_ofdm(rate
) & 0x000F) * 2;
1920 offset
+= (b43legacy_plcp_get_ratecode_cck(rate
) & 0x000F) * 2;
1922 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, offset
+ 0x20,
1923 b43legacy_shm_read16(dev
,
1924 B43legacy_SHM_SHARED
, offset
));
1927 static void b43legacy_rate_memory_init(struct b43legacy_wldev
*dev
)
1929 switch (dev
->phy
.type
) {
1930 case B43legacy_PHYTYPE_G
:
1931 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_6MB
, 1);
1932 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_12MB
, 1);
1933 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_18MB
, 1);
1934 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_24MB
, 1);
1935 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_36MB
, 1);
1936 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_48MB
, 1);
1937 b43legacy_rate_memory_write(dev
, B43legacy_OFDM_RATE_54MB
, 1);
1939 case B43legacy_PHYTYPE_B
:
1940 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_1MB
, 0);
1941 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_2MB
, 0);
1942 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_5MB
, 0);
1943 b43legacy_rate_memory_write(dev
, B43legacy_CCK_RATE_11MB
, 0);
1946 B43legacy_BUG_ON(1);
1950 /* Set the TX-Antenna for management frames sent by firmware. */
1951 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev
*dev
,
1958 case B43legacy_ANTENNA0
:
1959 ant
|= B43legacy_TX4_PHY_ANT0
;
1961 case B43legacy_ANTENNA1
:
1962 ant
|= B43legacy_TX4_PHY_ANT1
;
1964 case B43legacy_ANTENNA_AUTO
:
1965 ant
|= B43legacy_TX4_PHY_ANTLAST
;
1968 B43legacy_BUG_ON(1);
1971 /* FIXME We also need to set the other flags of the PHY control
1972 * field somewhere. */
1975 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1976 B43legacy_SHM_SH_BEACPHYCTL
);
1977 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
1978 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1979 B43legacy_SHM_SH_BEACPHYCTL
, tmp
);
1981 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1982 B43legacy_SHM_SH_ACKCTSPHYCTL
);
1983 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
1984 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1985 B43legacy_SHM_SH_ACKCTSPHYCTL
, tmp
);
1986 /* For Probe Resposes */
1987 tmp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
1988 B43legacy_SHM_SH_PRPHYCTL
);
1989 tmp
= (tmp
& ~B43legacy_TX4_PHY_ANT
) | ant
;
1990 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
1991 B43legacy_SHM_SH_PRPHYCTL
, tmp
);
1994 /* This is the opposite of b43legacy_chip_init() */
1995 static void b43legacy_chip_exit(struct b43legacy_wldev
*dev
)
1997 b43legacy_radio_turn_off(dev
, 1);
1998 b43legacy_gpio_cleanup(dev
);
1999 /* firmware is released later */
2002 /* Initialize the chip
2003 * http://bcm-specs.sipsolutions.net/ChipInit
2005 static int b43legacy_chip_init(struct b43legacy_wldev
*dev
)
2007 struct b43legacy_phy
*phy
= &dev
->phy
;
2013 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
,
2014 B43legacy_SBF_CORE_READY
2015 | B43legacy_SBF_400
);
2017 err
= b43legacy_request_firmware(dev
);
2020 err
= b43legacy_upload_microcode(dev
);
2022 goto out
; /* firmware is released later */
2024 err
= b43legacy_gpio_init(dev
);
2026 goto out
; /* firmware is released later */
2028 err
= b43legacy_upload_initvals(dev
);
2030 goto err_gpio_clean
;
2031 b43legacy_radio_turn_on(dev
);
2033 b43legacy_write16(dev
, 0x03E6, 0x0000);
2034 err
= b43legacy_phy_init(dev
);
2038 /* Select initial Interference Mitigation. */
2039 tmp
= phy
->interfmode
;
2040 phy
->interfmode
= B43legacy_INTERFMODE_NONE
;
2041 b43legacy_radio_set_interference_mitigation(dev
, tmp
);
2043 b43legacy_phy_set_antenna_diversity(dev
);
2044 b43legacy_mgmtframe_txantenna(dev
, B43legacy_ANTENNA_DEFAULT
);
2046 if (phy
->type
== B43legacy_PHYTYPE_B
) {
2047 value16
= b43legacy_read16(dev
, 0x005E);
2049 b43legacy_write16(dev
, 0x005E, value16
);
2051 b43legacy_write32(dev
, 0x0100, 0x01000000);
2052 if (dev
->dev
->id
.revision
< 5)
2053 b43legacy_write32(dev
, 0x010C, 0x01000000);
2055 value32
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
2056 value32
&= ~B43legacy_SBF_MODE_NOTADHOC
;
2057 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, value32
);
2058 value32
= b43legacy_read32(dev
, B43legacy_MMIO_STATUS_BITFIELD
);
2059 value32
|= B43legacy_SBF_MODE_NOTADHOC
;
2060 b43legacy_write32(dev
, B43legacy_MMIO_STATUS_BITFIELD
, value32
);
2062 if (b43legacy_using_pio(dev
)) {
2063 b43legacy_write32(dev
, 0x0210, 0x00000100);
2064 b43legacy_write32(dev
, 0x0230, 0x00000100);
2065 b43legacy_write32(dev
, 0x0250, 0x00000100);
2066 b43legacy_write32(dev
, 0x0270, 0x00000100);
2067 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0034,
2071 /* Probe Response Timeout value */
2072 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2073 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0074, 0x0000);
2075 /* Initially set the wireless operation mode. */
2076 b43legacy_adjust_opmode(dev
);
2078 if (dev
->dev
->id
.revision
< 3) {
2079 b43legacy_write16(dev
, 0x060E, 0x0000);
2080 b43legacy_write16(dev
, 0x0610, 0x8000);
2081 b43legacy_write16(dev
, 0x0604, 0x0000);
2082 b43legacy_write16(dev
, 0x0606, 0x0200);
2084 b43legacy_write32(dev
, 0x0188, 0x80000000);
2085 b43legacy_write32(dev
, 0x018C, 0x02000000);
2087 b43legacy_write32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
, 0x00004000);
2088 b43legacy_write32(dev
, B43legacy_MMIO_DMA0_IRQ_MASK
, 0x0001DC00);
2089 b43legacy_write32(dev
, B43legacy_MMIO_DMA1_IRQ_MASK
, 0x0000DC00);
2090 b43legacy_write32(dev
, B43legacy_MMIO_DMA2_IRQ_MASK
, 0x0000DC00);
2091 b43legacy_write32(dev
, B43legacy_MMIO_DMA3_IRQ_MASK
, 0x0001DC00);
2092 b43legacy_write32(dev
, B43legacy_MMIO_DMA4_IRQ_MASK
, 0x0000DC00);
2093 b43legacy_write32(dev
, B43legacy_MMIO_DMA5_IRQ_MASK
, 0x0000DC00);
2095 value32
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
2096 value32
|= 0x00100000;
2097 ssb_write32(dev
->dev
, SSB_TMSLOW
, value32
);
2099 b43legacy_write16(dev
, B43legacy_MMIO_POWERUP_DELAY
,
2100 dev
->dev
->bus
->chipco
.fast_pwrup_delay
);
2102 /* PHY TX errors counter. */
2103 atomic_set(&phy
->txerr_cnt
, B43legacy_PHY_TX_BADNESS_LIMIT
);
2105 B43legacy_WARN_ON(err
!= 0);
2106 b43legacydbg(dev
->wl
, "Chip initialized\n");
2111 b43legacy_radio_turn_off(dev
, 1);
2113 b43legacy_gpio_cleanup(dev
);
2117 static void b43legacy_periodic_every120sec(struct b43legacy_wldev
*dev
)
2119 struct b43legacy_phy
*phy
= &dev
->phy
;
2121 if (phy
->type
!= B43legacy_PHYTYPE_G
|| phy
->rev
< 2)
2124 b43legacy_mac_suspend(dev
);
2125 b43legacy_phy_lo_g_measure(dev
);
2126 b43legacy_mac_enable(dev
);
2129 static void b43legacy_periodic_every60sec(struct b43legacy_wldev
*dev
)
2131 b43legacy_phy_lo_mark_all_unused(dev
);
2132 if (dev
->dev
->bus
->sprom
.boardflags_lo
& B43legacy_BFL_RSSI
) {
2133 b43legacy_mac_suspend(dev
);
2134 b43legacy_calc_nrssi_slope(dev
);
2135 b43legacy_mac_enable(dev
);
2139 static void b43legacy_periodic_every30sec(struct b43legacy_wldev
*dev
)
2141 /* Update device statistics. */
2142 b43legacy_calculate_link_quality(dev
);
2145 static void b43legacy_periodic_every15sec(struct b43legacy_wldev
*dev
)
2147 b43legacy_phy_xmitpower(dev
); /* FIXME: unless scanning? */
2149 atomic_set(&dev
->phy
.txerr_cnt
, B43legacy_PHY_TX_BADNESS_LIMIT
);
2153 static void do_periodic_work(struct b43legacy_wldev
*dev
)
2157 state
= dev
->periodic_state
;
2159 b43legacy_periodic_every120sec(dev
);
2161 b43legacy_periodic_every60sec(dev
);
2163 b43legacy_periodic_every30sec(dev
);
2164 b43legacy_periodic_every15sec(dev
);
2167 /* Periodic work locking policy:
2168 * The whole periodic work handler is protected by
2169 * wl->mutex. If another lock is needed somewhere in the
2170 * pwork callchain, it's aquired in-place, where it's needed.
2172 static void b43legacy_periodic_work_handler(struct work_struct
*work
)
2174 struct b43legacy_wldev
*dev
= container_of(work
, struct b43legacy_wldev
,
2175 periodic_work
.work
);
2176 struct b43legacy_wl
*wl
= dev
->wl
;
2177 unsigned long delay
;
2179 mutex_lock(&wl
->mutex
);
2181 if (unlikely(b43legacy_status(dev
) != B43legacy_STAT_STARTED
))
2183 if (b43legacy_debug(dev
, B43legacy_DBG_PWORK_STOP
))
2186 do_periodic_work(dev
);
2188 dev
->periodic_state
++;
2190 if (b43legacy_debug(dev
, B43legacy_DBG_PWORK_FAST
))
2191 delay
= msecs_to_jiffies(50);
2193 delay
= round_jiffies_relative(HZ
* 15);
2194 queue_delayed_work(wl
->hw
->workqueue
, &dev
->periodic_work
, delay
);
2196 mutex_unlock(&wl
->mutex
);
2199 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev
*dev
)
2201 struct delayed_work
*work
= &dev
->periodic_work
;
2203 dev
->periodic_state
= 0;
2204 INIT_DELAYED_WORK(work
, b43legacy_periodic_work_handler
);
2205 queue_delayed_work(dev
->wl
->hw
->workqueue
, work
, 0);
2208 /* Validate access to the chip (SHM) */
2209 static int b43legacy_validate_chipaccess(struct b43legacy_wldev
*dev
)
2214 shm_backup
= b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0);
2215 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, 0xAA5555AA);
2216 if (b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0) !=
2219 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, 0x55AAAA55);
2220 if (b43legacy_shm_read32(dev
, B43legacy_SHM_SHARED
, 0) !=
2223 b43legacy_shm_write32(dev
, B43legacy_SHM_SHARED
, 0, shm_backup
);
2225 value
= b43legacy_read32(dev
, B43legacy_MMIO_MACCTL
);
2226 if ((value
| B43legacy_MACCTL_GMODE
) !=
2227 (B43legacy_MACCTL_GMODE
| B43legacy_MACCTL_IHR_ENABLED
))
2230 value
= b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_REASON
);
2236 b43legacyerr(dev
->wl
, "Failed to validate the chipaccess\n");
2240 static void b43legacy_security_init(struct b43legacy_wldev
*dev
)
2242 dev
->max_nr_keys
= (dev
->dev
->id
.revision
>= 5) ? 58 : 20;
2243 B43legacy_WARN_ON(dev
->max_nr_keys
> ARRAY_SIZE(dev
->key
));
2244 dev
->ktp
= b43legacy_shm_read16(dev
, B43legacy_SHM_SHARED
,
2246 /* KTP is a word address, but we address SHM bytewise.
2247 * So multiply by two.
2250 if (dev
->dev
->id
.revision
>= 5)
2251 /* Number of RCMTA address slots */
2252 b43legacy_write16(dev
, B43legacy_MMIO_RCMTA_COUNT
,
2253 dev
->max_nr_keys
- 8);
2256 static int b43legacy_rng_read(struct hwrng
*rng
, u32
*data
)
2258 struct b43legacy_wl
*wl
= (struct b43legacy_wl
*)rng
->priv
;
2259 unsigned long flags
;
2261 /* Don't take wl->mutex here, as it could deadlock with
2262 * hwrng internal locking. It's not needed to take
2263 * wl->mutex here, anyway. */
2265 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2266 *data
= b43legacy_read16(wl
->current_dev
, B43legacy_MMIO_RNG
);
2267 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2269 return (sizeof(u16
));
2272 static void b43legacy_rng_exit(struct b43legacy_wl
*wl
)
2274 if (wl
->rng_initialized
)
2275 hwrng_unregister(&wl
->rng
);
2278 static int b43legacy_rng_init(struct b43legacy_wl
*wl
)
2282 snprintf(wl
->rng_name
, ARRAY_SIZE(wl
->rng_name
),
2283 "%s_%s", KBUILD_MODNAME
, wiphy_name(wl
->hw
->wiphy
));
2284 wl
->rng
.name
= wl
->rng_name
;
2285 wl
->rng
.data_read
= b43legacy_rng_read
;
2286 wl
->rng
.priv
= (unsigned long)wl
;
2287 wl
->rng_initialized
= 1;
2288 err
= hwrng_register(&wl
->rng
);
2290 wl
->rng_initialized
= 0;
2291 b43legacyerr(wl
, "Failed to register the random "
2292 "number generator (%d)\n", err
);
2298 static int b43legacy_op_tx(struct ieee80211_hw
*hw
,
2299 struct sk_buff
*skb
,
2300 struct ieee80211_tx_control
*ctl
)
2302 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2303 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2305 unsigned long flags
;
2309 if (unlikely(b43legacy_status(dev
) < B43legacy_STAT_STARTED
))
2311 /* DMA-TX is done without a global lock. */
2312 if (b43legacy_using_pio(dev
)) {
2313 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2314 err
= b43legacy_pio_tx(dev
, skb
, ctl
);
2315 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2317 err
= b43legacy_dma_tx(dev
, skb
, ctl
);
2320 return NETDEV_TX_BUSY
;
2321 return NETDEV_TX_OK
;
2324 static int b43legacy_op_conf_tx(struct ieee80211_hw
*hw
,
2326 const struct ieee80211_tx_queue_params
*params
)
2331 static int b43legacy_op_get_tx_stats(struct ieee80211_hw
*hw
,
2332 struct ieee80211_tx_queue_stats
*stats
)
2334 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2335 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2336 unsigned long flags
;
2341 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2342 if (likely(b43legacy_status(dev
) >= B43legacy_STAT_STARTED
)) {
2343 if (b43legacy_using_pio(dev
))
2344 b43legacy_pio_get_tx_stats(dev
, stats
);
2346 b43legacy_dma_get_tx_stats(dev
, stats
);
2349 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2354 static int b43legacy_op_get_stats(struct ieee80211_hw
*hw
,
2355 struct ieee80211_low_level_stats
*stats
)
2357 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2358 unsigned long flags
;
2360 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2361 memcpy(stats
, &wl
->ieee_stats
, sizeof(*stats
));
2362 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2367 static const char *phymode_to_string(unsigned int phymode
)
2370 case B43legacy_PHYMODE_B
:
2372 case B43legacy_PHYMODE_G
:
2375 B43legacy_BUG_ON(1);
2380 static int find_wldev_for_phymode(struct b43legacy_wl
*wl
,
2381 unsigned int phymode
,
2382 struct b43legacy_wldev
**dev
,
2385 struct b43legacy_wldev
*d
;
2387 list_for_each_entry(d
, &wl
->devlist
, list
) {
2388 if (d
->phy
.possible_phymodes
& phymode
) {
2389 /* Ok, this device supports the PHY-mode.
2390 * Set the gmode bit. */
2401 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev
*dev
)
2403 struct ssb_device
*sdev
= dev
->dev
;
2406 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2407 tmslow
&= ~B43legacy_TMSLOW_GMODE
;
2408 tmslow
|= B43legacy_TMSLOW_PHYRESET
;
2409 tmslow
|= SSB_TMSLOW_FGC
;
2410 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2413 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2414 tmslow
&= ~SSB_TMSLOW_FGC
;
2415 tmslow
|= B43legacy_TMSLOW_PHYRESET
;
2416 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2420 /* Expects wl->mutex locked */
2421 static int b43legacy_switch_phymode(struct b43legacy_wl
*wl
,
2422 unsigned int new_mode
)
2424 struct b43legacy_wldev
*up_dev
;
2425 struct b43legacy_wldev
*down_dev
;
2430 err
= find_wldev_for_phymode(wl
, new_mode
, &up_dev
, &gmode
);
2432 b43legacyerr(wl
, "Could not find a device for %s-PHY mode\n",
2433 phymode_to_string(new_mode
));
2436 if ((up_dev
== wl
->current_dev
) &&
2437 (!!wl
->current_dev
->phy
.gmode
== !!gmode
))
2438 /* This device is already running. */
2440 b43legacydbg(wl
, "Reconfiguring PHYmode to %s-PHY\n",
2441 phymode_to_string(new_mode
));
2442 down_dev
= wl
->current_dev
;
2444 prev_status
= b43legacy_status(down_dev
);
2445 /* Shutdown the currently running core. */
2446 if (prev_status
>= B43legacy_STAT_STARTED
)
2447 b43legacy_wireless_core_stop(down_dev
);
2448 if (prev_status
>= B43legacy_STAT_INITIALIZED
)
2449 b43legacy_wireless_core_exit(down_dev
);
2451 if (down_dev
!= up_dev
)
2452 /* We switch to a different core, so we put PHY into
2453 * RESET on the old core. */
2454 b43legacy_put_phy_into_reset(down_dev
);
2456 /* Now start the new core. */
2457 up_dev
->phy
.gmode
= gmode
;
2458 if (prev_status
>= B43legacy_STAT_INITIALIZED
) {
2459 err
= b43legacy_wireless_core_init(up_dev
);
2461 b43legacyerr(wl
, "Fatal: Could not initialize device"
2462 " for newly selected %s-PHY mode\n",
2463 phymode_to_string(new_mode
));
2467 if (prev_status
>= B43legacy_STAT_STARTED
) {
2468 err
= b43legacy_wireless_core_start(up_dev
);
2470 b43legacyerr(wl
, "Fatal: Coult not start device for "
2471 "newly selected %s-PHY mode\n",
2472 phymode_to_string(new_mode
));
2473 b43legacy_wireless_core_exit(up_dev
);
2477 B43legacy_WARN_ON(b43legacy_status(up_dev
) != prev_status
);
2479 b43legacy_shm_write32(up_dev
, B43legacy_SHM_SHARED
, 0x003E, 0);
2481 wl
->current_dev
= up_dev
;
2485 /* Whoops, failed to init the new core. No core is operating now. */
2486 wl
->current_dev
= NULL
;
2490 static int b43legacy_antenna_from_ieee80211(u8 antenna
)
2493 case 0: /* default/diversity */
2494 return B43legacy_ANTENNA_DEFAULT
;
2495 case 1: /* Antenna 0 */
2496 return B43legacy_ANTENNA0
;
2497 case 2: /* Antenna 1 */
2498 return B43legacy_ANTENNA1
;
2500 return B43legacy_ANTENNA_DEFAULT
;
2504 static int b43legacy_op_dev_config(struct ieee80211_hw
*hw
,
2505 struct ieee80211_conf
*conf
)
2507 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2508 struct b43legacy_wldev
*dev
;
2509 struct b43legacy_phy
*phy
;
2510 unsigned long flags
;
2511 unsigned int new_phymode
= 0xFFFF;
2517 antenna_tx
= b43legacy_antenna_from_ieee80211(conf
->antenna_sel_tx
);
2518 antenna_rx
= b43legacy_antenna_from_ieee80211(conf
->antenna_sel_rx
);
2520 mutex_lock(&wl
->mutex
);
2522 /* Switch the PHY mode (if necessary). */
2523 switch (conf
->phymode
) {
2524 case MODE_IEEE80211B
:
2525 new_phymode
= B43legacy_PHYMODE_B
;
2527 case MODE_IEEE80211G
:
2528 new_phymode
= B43legacy_PHYMODE_G
;
2531 B43legacy_WARN_ON(1);
2533 err
= b43legacy_switch_phymode(wl
, new_phymode
);
2535 goto out_unlock_mutex
;
2536 dev
= wl
->current_dev
;
2539 /* Disable IRQs while reconfiguring the device.
2540 * This makes it possible to drop the spinlock throughout
2541 * the reconfiguration process. */
2542 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2543 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
) {
2544 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2545 goto out_unlock_mutex
;
2547 savedirqs
= b43legacy_interrupt_disable(dev
, B43legacy_IRQ_ALL
);
2548 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2549 b43legacy_synchronize_irq(dev
);
2551 /* Switch to the requested channel.
2552 * The firmware takes care of races with the TX handler. */
2553 if (conf
->channel_val
!= phy
->channel
)
2554 b43legacy_radio_selectchannel(dev
, conf
->channel_val
, 0);
2556 /* Enable/Disable ShortSlot timing. */
2557 if ((!!(conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
))
2558 != dev
->short_slot
) {
2559 B43legacy_WARN_ON(phy
->type
!= B43legacy_PHYTYPE_G
);
2560 if (conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
)
2561 b43legacy_short_slot_timing_enable(dev
);
2563 b43legacy_short_slot_timing_disable(dev
);
2566 dev
->wl
->radiotap_enabled
= !!(conf
->flags
& IEEE80211_CONF_RADIOTAP
);
2568 /* Adjust the desired TX power level. */
2569 if (conf
->power_level
!= 0) {
2570 if (conf
->power_level
!= phy
->power_level
) {
2571 phy
->power_level
= conf
->power_level
;
2572 b43legacy_phy_xmitpower(dev
);
2576 /* Antennas for RX and management frame TX. */
2577 b43legacy_mgmtframe_txantenna(dev
, antenna_tx
);
2579 /* Update templates for AP mode. */
2580 if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
))
2581 b43legacy_set_beacon_int(dev
, conf
->beacon_int
);
2584 if (!!conf
->radio_enabled
!= phy
->radio_on
) {
2585 if (conf
->radio_enabled
) {
2586 b43legacy_radio_turn_on(dev
);
2587 b43legacyinfo(dev
->wl
, "Radio turned on by software\n");
2588 if (!dev
->radio_hw_enable
)
2589 b43legacyinfo(dev
->wl
, "The hardware RF-kill"
2590 " button still turns the radio"
2591 " physically off. Press the"
2592 " button to turn it on.\n");
2594 b43legacy_radio_turn_off(dev
, 0);
2595 b43legacyinfo(dev
->wl
, "Radio turned off by"
2600 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2601 b43legacy_interrupt_enable(dev
, savedirqs
);
2603 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2605 mutex_unlock(&wl
->mutex
);
2610 static void b43legacy_op_configure_filter(struct ieee80211_hw
*hw
,
2611 unsigned int changed
,
2612 unsigned int *fflags
,
2614 struct dev_addr_list
*mc_list
)
2616 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2617 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2618 unsigned long flags
;
2625 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2626 *fflags
&= FIF_PROMISC_IN_BSS
|
2632 FIF_BCN_PRBRESP_PROMISC
;
2634 changed
&= FIF_PROMISC_IN_BSS
|
2640 FIF_BCN_PRBRESP_PROMISC
;
2642 wl
->filter_flags
= *fflags
;
2644 if (changed
&& b43legacy_status(dev
) >= B43legacy_STAT_INITIALIZED
)
2645 b43legacy_adjust_opmode(dev
);
2646 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2649 static int b43legacy_op_config_interface(struct ieee80211_hw
*hw
,
2650 struct ieee80211_vif
*vif
,
2651 struct ieee80211_if_conf
*conf
)
2653 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
2654 struct b43legacy_wldev
*dev
= wl
->current_dev
;
2655 unsigned long flags
;
2659 mutex_lock(&wl
->mutex
);
2660 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2661 B43legacy_WARN_ON(wl
->vif
!= vif
);
2663 memcpy(wl
->bssid
, conf
->bssid
, ETH_ALEN
);
2665 memset(wl
->bssid
, 0, ETH_ALEN
);
2666 if (b43legacy_status(dev
) >= B43legacy_STAT_INITIALIZED
) {
2667 if (b43legacy_is_mode(wl
, IEEE80211_IF_TYPE_AP
)) {
2668 B43legacy_WARN_ON(conf
->type
!= IEEE80211_IF_TYPE_AP
);
2669 b43legacy_set_ssid(dev
, conf
->ssid
, conf
->ssid_len
);
2671 b43legacy_refresh_templates(dev
, conf
->beacon
);
2673 b43legacy_write_mac_bssid_templates(dev
);
2675 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2676 mutex_unlock(&wl
->mutex
);
2681 /* Locking: wl->mutex */
2682 static void b43legacy_wireless_core_stop(struct b43legacy_wldev
*dev
)
2684 struct b43legacy_wl
*wl
= dev
->wl
;
2685 unsigned long flags
;
2687 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
)
2690 /* Disable and sync interrupts. We must do this before than
2691 * setting the status to INITIALIZED, as the interrupt handler
2692 * won't care about IRQs then. */
2693 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2694 dev
->irq_savedstate
= b43legacy_interrupt_disable(dev
,
2696 b43legacy_read32(dev
, B43legacy_MMIO_GEN_IRQ_MASK
); /* flush */
2697 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2698 b43legacy_synchronize_irq(dev
);
2700 b43legacy_set_status(dev
, B43legacy_STAT_INITIALIZED
);
2702 mutex_unlock(&wl
->mutex
);
2703 /* Must unlock as it would otherwise deadlock. No races here.
2704 * Cancel the possibly running self-rearming periodic work. */
2705 cancel_delayed_work_sync(&dev
->periodic_work
);
2706 mutex_lock(&wl
->mutex
);
2708 ieee80211_stop_queues(wl
->hw
); /* FIXME this could cause a deadlock */
2710 b43legacy_mac_suspend(dev
);
2711 free_irq(dev
->dev
->irq
, dev
);
2712 b43legacydbg(wl
, "Wireless interface stopped\n");
2715 /* Locking: wl->mutex */
2716 static int b43legacy_wireless_core_start(struct b43legacy_wldev
*dev
)
2720 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_INITIALIZED
);
2722 drain_txstatus_queue(dev
);
2723 err
= request_irq(dev
->dev
->irq
, b43legacy_interrupt_handler
,
2724 IRQF_SHARED
, KBUILD_MODNAME
, dev
);
2726 b43legacyerr(dev
->wl
, "Cannot request IRQ-%d\n",
2730 /* We are ready to run. */
2731 b43legacy_set_status(dev
, B43legacy_STAT_STARTED
);
2733 /* Start data flow (TX/RX) */
2734 b43legacy_mac_enable(dev
);
2735 b43legacy_interrupt_enable(dev
, dev
->irq_savedstate
);
2736 ieee80211_start_queues(dev
->wl
->hw
);
2738 /* Start maintenance work */
2739 b43legacy_periodic_tasks_setup(dev
);
2741 b43legacydbg(dev
->wl
, "Wireless interface started\n");
2746 /* Get PHY and RADIO versioning numbers */
2747 static int b43legacy_phy_versioning(struct b43legacy_wldev
*dev
)
2749 struct b43legacy_phy
*phy
= &dev
->phy
;
2757 int unsupported
= 0;
2759 /* Get PHY versioning */
2760 tmp
= b43legacy_read16(dev
, B43legacy_MMIO_PHY_VER
);
2761 analog_type
= (tmp
& B43legacy_PHYVER_ANALOG
)
2762 >> B43legacy_PHYVER_ANALOG_SHIFT
;
2763 phy_type
= (tmp
& B43legacy_PHYVER_TYPE
) >> B43legacy_PHYVER_TYPE_SHIFT
;
2764 phy_rev
= (tmp
& B43legacy_PHYVER_VERSION
);
2766 case B43legacy_PHYTYPE_B
:
2767 if (phy_rev
!= 2 && phy_rev
!= 4
2768 && phy_rev
!= 6 && phy_rev
!= 7)
2771 case B43legacy_PHYTYPE_G
:
2779 b43legacyerr(dev
->wl
, "FOUND UNSUPPORTED PHY "
2780 "(Analog %u, Type %u, Revision %u)\n",
2781 analog_type
, phy_type
, phy_rev
);
2784 b43legacydbg(dev
->wl
, "Found PHY: Analog %u, Type %u, Revision %u\n",
2785 analog_type
, phy_type
, phy_rev
);
2788 /* Get RADIO versioning */
2789 if (dev
->dev
->bus
->chip_id
== 0x4317) {
2790 if (dev
->dev
->bus
->chip_rev
== 0)
2792 else if (dev
->dev
->bus
->chip_rev
== 1)
2797 b43legacy_write16(dev
, B43legacy_MMIO_RADIO_CONTROL
,
2798 B43legacy_RADIOCTL_ID
);
2799 tmp
= b43legacy_read16(dev
, B43legacy_MMIO_RADIO_DATA_HIGH
);
2801 b43legacy_write16(dev
, B43legacy_MMIO_RADIO_CONTROL
,
2802 B43legacy_RADIOCTL_ID
);
2803 tmp
|= b43legacy_read16(dev
, B43legacy_MMIO_RADIO_DATA_LOW
);
2805 radio_manuf
= (tmp
& 0x00000FFF);
2806 radio_ver
= (tmp
& 0x0FFFF000) >> 12;
2807 radio_rev
= (tmp
& 0xF0000000) >> 28;
2809 case B43legacy_PHYTYPE_B
:
2810 if ((radio_ver
& 0xFFF0) != 0x2050)
2813 case B43legacy_PHYTYPE_G
:
2814 if (radio_ver
!= 0x2050)
2818 B43legacy_BUG_ON(1);
2821 b43legacyerr(dev
->wl
, "FOUND UNSUPPORTED RADIO "
2822 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2823 radio_manuf
, radio_ver
, radio_rev
);
2826 b43legacydbg(dev
->wl
, "Found Radio: Manuf 0x%X, Version 0x%X,"
2827 " Revision %u\n", radio_manuf
, radio_ver
, radio_rev
);
2830 phy
->radio_manuf
= radio_manuf
;
2831 phy
->radio_ver
= radio_ver
;
2832 phy
->radio_rev
= radio_rev
;
2834 phy
->analog
= analog_type
;
2835 phy
->type
= phy_type
;
2841 static void setup_struct_phy_for_init(struct b43legacy_wldev
*dev
,
2842 struct b43legacy_phy
*phy
)
2844 struct b43legacy_lopair
*lo
;
2847 memset(phy
->minlowsig
, 0xFF, sizeof(phy
->minlowsig
));
2848 memset(phy
->minlowsigpos
, 0, sizeof(phy
->minlowsigpos
));
2850 /* Assume the radio is enabled. If it's not enabled, the state will
2851 * immediately get fixed on the first periodic work run. */
2852 dev
->radio_hw_enable
= 1;
2854 phy
->savedpctlreg
= 0xFFFF;
2855 phy
->aci_enable
= 0;
2856 phy
->aci_wlan_automatic
= 0;
2857 phy
->aci_hw_rssi
= 0;
2859 lo
= phy
->_lo_pairs
;
2861 memset(lo
, 0, sizeof(struct b43legacy_lopair
) *
2862 B43legacy_LO_COUNT
);
2863 phy
->max_lb_gain
= 0;
2864 phy
->trsw_rx_gain
= 0;
2866 /* Set default attenuation values. */
2867 phy
->bbatt
= b43legacy_default_baseband_attenuation(dev
);
2868 phy
->rfatt
= b43legacy_default_radio_attenuation(dev
);
2869 phy
->txctl1
= b43legacy_default_txctl1(dev
);
2870 phy
->txpwr_offset
= 0;
2873 phy
->nrssislope
= 0;
2874 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi
); i
++)
2875 phy
->nrssi
[i
] = -1000;
2876 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi_lt
); i
++)
2877 phy
->nrssi_lt
[i
] = i
;
2879 phy
->lofcal
= 0xFFFF;
2880 phy
->initval
= 0xFFFF;
2882 phy
->interfmode
= B43legacy_INTERFMODE_NONE
;
2883 phy
->channel
= 0xFF;
2886 static void setup_struct_wldev_for_init(struct b43legacy_wldev
*dev
)
2889 dev
->reg124_set_0x4
= 0;
2892 memset(&dev
->stats
, 0, sizeof(dev
->stats
));
2894 setup_struct_phy_for_init(dev
, &dev
->phy
);
2896 /* IRQ related flags */
2897 dev
->irq_reason
= 0;
2898 memset(dev
->dma_reason
, 0, sizeof(dev
->dma_reason
));
2899 dev
->irq_savedstate
= B43legacy_IRQ_MASKTEMPLATE
;
2901 dev
->mac_suspended
= 1;
2903 /* Noise calculation context */
2904 memset(&dev
->noisecalc
, 0, sizeof(dev
->noisecalc
));
2907 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev
*dev
)
2909 #ifdef CONFIG_SSB_DRIVER_PCICORE
2910 struct ssb_bus
*bus
= dev
->dev
->bus
;
2913 if (bus
->pcicore
.dev
&&
2914 bus
->pcicore
.dev
->id
.coreid
== SSB_DEV_PCI
&&
2915 bus
->pcicore
.dev
->id
.revision
<= 5) {
2916 /* IMCFGLO timeouts workaround. */
2917 tmp
= ssb_read32(dev
->dev
, SSB_IMCFGLO
);
2918 tmp
&= ~SSB_IMCFGLO_REQTO
;
2919 tmp
&= ~SSB_IMCFGLO_SERTO
;
2920 switch (bus
->bustype
) {
2921 case SSB_BUSTYPE_PCI
:
2922 case SSB_BUSTYPE_PCMCIA
:
2925 case SSB_BUSTYPE_SSB
:
2929 ssb_write32(dev
->dev
, SSB_IMCFGLO
, tmp
);
2931 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2934 /* Write the short and long frame retry limit values. */
2935 static void b43legacy_set_retry_limits(struct b43legacy_wldev
*dev
,
2936 unsigned int short_retry
,
2937 unsigned int long_retry
)
2939 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2940 * the chip-internal counter. */
2941 short_retry
= min(short_retry
, (unsigned int)0xF);
2942 long_retry
= min(long_retry
, (unsigned int)0xF);
2944 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
, 0x0006, short_retry
);
2945 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
, 0x0007, long_retry
);
2948 /* Shutdown a wireless core */
2949 /* Locking: wl->mutex */
2950 static void b43legacy_wireless_core_exit(struct b43legacy_wldev
*dev
)
2952 struct b43legacy_wl
*wl
= dev
->wl
;
2953 struct b43legacy_phy
*phy
= &dev
->phy
;
2955 B43legacy_WARN_ON(b43legacy_status(dev
) > B43legacy_STAT_INITIALIZED
);
2956 if (b43legacy_status(dev
) != B43legacy_STAT_INITIALIZED
)
2958 b43legacy_set_status(dev
, B43legacy_STAT_UNINIT
);
2960 mutex_unlock(&wl
->mutex
);
2961 /* Must unlock as it would otherwise deadlock. No races here.
2962 * Cancel possibly pending workqueues. */
2963 cancel_work_sync(&dev
->restart_work
);
2964 mutex_lock(&wl
->mutex
);
2966 b43legacy_leds_exit(dev
);
2967 b43legacy_rng_exit(dev
->wl
);
2968 b43legacy_pio_free(dev
);
2969 b43legacy_dma_free(dev
);
2970 b43legacy_chip_exit(dev
);
2971 b43legacy_radio_turn_off(dev
, 1);
2972 b43legacy_switch_analog(dev
, 0);
2973 if (phy
->dyn_tssi_tbl
)
2974 kfree(phy
->tssi2dbm
);
2975 kfree(phy
->lo_control
);
2976 phy
->lo_control
= NULL
;
2977 ssb_device_disable(dev
->dev
, 0);
2978 ssb_bus_may_powerdown(dev
->dev
->bus
);
2981 static void prepare_phy_data_for_init(struct b43legacy_wldev
*dev
)
2983 struct b43legacy_phy
*phy
= &dev
->phy
;
2986 /* Set default attenuation values. */
2987 phy
->bbatt
= b43legacy_default_baseband_attenuation(dev
);
2988 phy
->rfatt
= b43legacy_default_radio_attenuation(dev
);
2989 phy
->txctl1
= b43legacy_default_txctl1(dev
);
2990 phy
->txctl2
= 0xFFFF;
2991 phy
->txpwr_offset
= 0;
2994 phy
->nrssislope
= 0;
2995 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi
); i
++)
2996 phy
->nrssi
[i
] = -1000;
2997 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi_lt
); i
++)
2998 phy
->nrssi_lt
[i
] = i
;
3000 phy
->lofcal
= 0xFFFF;
3001 phy
->initval
= 0xFFFF;
3003 phy
->aci_enable
= 0;
3004 phy
->aci_wlan_automatic
= 0;
3005 phy
->aci_hw_rssi
= 0;
3007 phy
->antenna_diversity
= 0xFFFF;
3008 memset(phy
->minlowsig
, 0xFF, sizeof(phy
->minlowsig
));
3009 memset(phy
->minlowsigpos
, 0, sizeof(phy
->minlowsigpos
));
3012 phy
->calibrated
= 0;
3015 memset(phy
->_lo_pairs
, 0,
3016 sizeof(struct b43legacy_lopair
) * B43legacy_LO_COUNT
);
3017 memset(phy
->loopback_gain
, 0, sizeof(phy
->loopback_gain
));
3020 /* Initialize a wireless core */
3021 static int b43legacy_wireless_core_init(struct b43legacy_wldev
*dev
)
3023 struct b43legacy_wl
*wl
= dev
->wl
;
3024 struct ssb_bus
*bus
= dev
->dev
->bus
;
3025 struct b43legacy_phy
*phy
= &dev
->phy
;
3026 struct ssb_sprom
*sprom
= &dev
->dev
->bus
->sprom
;
3031 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_UNINIT
);
3033 err
= ssb_bus_powerup(bus
, 0);
3036 if (!ssb_device_is_enabled(dev
->dev
)) {
3037 tmp
= phy
->gmode
? B43legacy_TMSLOW_GMODE
: 0;
3038 b43legacy_wireless_core_reset(dev
, tmp
);
3041 if ((phy
->type
== B43legacy_PHYTYPE_B
) ||
3042 (phy
->type
== B43legacy_PHYTYPE_G
)) {
3043 phy
->_lo_pairs
= kzalloc(sizeof(struct b43legacy_lopair
)
3044 * B43legacy_LO_COUNT
,
3046 if (!phy
->_lo_pairs
)
3049 setup_struct_wldev_for_init(dev
);
3051 err
= b43legacy_phy_init_tssi2dbm_table(dev
);
3053 goto err_kfree_lo_control
;
3055 /* Enable IRQ routing to this device. */
3056 ssb_pcicore_dev_irqvecs_enable(&bus
->pcicore
, dev
->dev
);
3058 b43legacy_imcfglo_timeouts_workaround(dev
);
3059 prepare_phy_data_for_init(dev
);
3060 b43legacy_phy_calibrate(dev
);
3061 err
= b43legacy_chip_init(dev
);
3063 goto err_kfree_tssitbl
;
3064 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3065 B43legacy_SHM_SH_WLCOREREV
,
3066 dev
->dev
->id
.revision
);
3067 hf
= b43legacy_hf_read(dev
);
3068 if (phy
->type
== B43legacy_PHYTYPE_G
) {
3069 hf
|= B43legacy_HF_SYMW
;
3071 hf
|= B43legacy_HF_GDCW
;
3072 if (sprom
->boardflags_lo
& B43legacy_BFL_PACTRL
)
3073 hf
|= B43legacy_HF_OFDMPABOOST
;
3074 } else if (phy
->type
== B43legacy_PHYTYPE_B
) {
3075 hf
|= B43legacy_HF_SYMW
;
3076 if (phy
->rev
>= 2 && phy
->radio_ver
== 0x2050)
3077 hf
&= ~B43legacy_HF_GDCW
;
3079 b43legacy_hf_write(dev
, hf
);
3081 b43legacy_set_retry_limits(dev
,
3082 B43legacy_DEFAULT_SHORT_RETRY_LIMIT
,
3083 B43legacy_DEFAULT_LONG_RETRY_LIMIT
);
3085 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3087 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3090 /* Disable sending probe responses from firmware.
3091 * Setting the MaxTime to one usec will always trigger
3092 * a timeout, so we never send any probe resp.
3093 * A timeout of zero is infinite. */
3094 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
,
3095 B43legacy_SHM_SH_PRMAXTIME
, 1);
3097 b43legacy_rate_memory_init(dev
);
3099 /* Minimum Contention Window */
3100 if (phy
->type
== B43legacy_PHYTYPE_B
)
3101 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3104 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3106 /* Maximum Contention Window */
3107 b43legacy_shm_write16(dev
, B43legacy_SHM_WIRELESS
,
3111 if (b43legacy_using_pio(dev
))
3112 err
= b43legacy_pio_init(dev
);
3114 err
= b43legacy_dma_init(dev
);
3116 b43legacy_qos_init(dev
);
3118 } while (err
== -EAGAIN
);
3122 b43legacy_write16(dev
, 0x0612, 0x0050);
3123 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0416, 0x0050);
3124 b43legacy_shm_write16(dev
, B43legacy_SHM_SHARED
, 0x0414, 0x01F4);
3126 ssb_bus_powerup(bus
, 1); /* Enable dynamic PCTL */
3127 memset(wl
->bssid
, 0, ETH_ALEN
);
3128 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3129 b43legacy_upload_card_macaddress(dev
);
3130 b43legacy_security_init(dev
);
3131 b43legacy_rng_init(wl
);
3133 b43legacy_set_status(dev
, B43legacy_STAT_INITIALIZED
);
3135 b43legacy_leds_init(dev
);
3140 b43legacy_chip_exit(dev
);
3142 if (phy
->dyn_tssi_tbl
)
3143 kfree(phy
->tssi2dbm
);
3144 err_kfree_lo_control
:
3145 kfree(phy
->lo_control
);
3146 phy
->lo_control
= NULL
;
3147 ssb_bus_may_powerdown(bus
);
3148 B43legacy_WARN_ON(b43legacy_status(dev
) != B43legacy_STAT_UNINIT
);
3152 static int b43legacy_op_add_interface(struct ieee80211_hw
*hw
,
3153 struct ieee80211_if_init_conf
*conf
)
3155 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3156 struct b43legacy_wldev
*dev
;
3157 unsigned long flags
;
3158 int err
= -EOPNOTSUPP
;
3160 /* TODO: allow WDS/AP devices to coexist */
3162 if (conf
->type
!= IEEE80211_IF_TYPE_AP
&&
3163 conf
->type
!= IEEE80211_IF_TYPE_STA
&&
3164 conf
->type
!= IEEE80211_IF_TYPE_WDS
&&
3165 conf
->type
!= IEEE80211_IF_TYPE_IBSS
)
3168 mutex_lock(&wl
->mutex
);
3170 goto out_mutex_unlock
;
3172 b43legacydbg(wl
, "Adding Interface type %d\n", conf
->type
);
3174 dev
= wl
->current_dev
;
3176 wl
->vif
= conf
->vif
;
3177 wl
->if_type
= conf
->type
;
3178 memcpy(wl
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
3180 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3181 b43legacy_adjust_opmode(dev
);
3182 b43legacy_upload_card_macaddress(dev
);
3183 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3187 mutex_unlock(&wl
->mutex
);
3192 static void b43legacy_op_remove_interface(struct ieee80211_hw
*hw
,
3193 struct ieee80211_if_init_conf
*conf
)
3195 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3196 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3197 unsigned long flags
;
3199 b43legacydbg(wl
, "Removing Interface type %d\n", conf
->type
);
3201 mutex_lock(&wl
->mutex
);
3203 B43legacy_WARN_ON(!wl
->operating
);
3204 B43legacy_WARN_ON(wl
->vif
!= conf
->vif
);
3209 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3210 b43legacy_adjust_opmode(dev
);
3211 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3212 b43legacy_upload_card_macaddress(dev
);
3213 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3215 mutex_unlock(&wl
->mutex
);
3218 static int b43legacy_op_start(struct ieee80211_hw
*hw
)
3220 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3221 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3224 bool do_rfkill_exit
= 0;
3226 /* First register RFkill.
3227 * LEDs that are registered later depend on it. */
3228 b43legacy_rfkill_init(dev
);
3230 mutex_lock(&wl
->mutex
);
3232 if (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
) {
3233 err
= b43legacy_wireless_core_init(dev
);
3236 goto out_mutex_unlock
;
3241 if (b43legacy_status(dev
) < B43legacy_STAT_STARTED
) {
3242 err
= b43legacy_wireless_core_start(dev
);
3245 b43legacy_wireless_core_exit(dev
);
3247 goto out_mutex_unlock
;
3252 mutex_unlock(&wl
->mutex
);
3255 b43legacy_rfkill_exit(dev
);
3260 static void b43legacy_op_stop(struct ieee80211_hw
*hw
)
3262 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3263 struct b43legacy_wldev
*dev
= wl
->current_dev
;
3265 b43legacy_rfkill_exit(dev
);
3267 mutex_lock(&wl
->mutex
);
3268 if (b43legacy_status(dev
) >= B43legacy_STAT_STARTED
)
3269 b43legacy_wireless_core_stop(dev
);
3270 b43legacy_wireless_core_exit(dev
);
3271 mutex_unlock(&wl
->mutex
);
3274 static int b43legacy_op_set_retry_limit(struct ieee80211_hw
*hw
,
3275 u32 short_retry_limit
,
3276 u32 long_retry_limit
)
3278 struct b43legacy_wl
*wl
= hw_to_b43legacy_wl(hw
);
3279 struct b43legacy_wldev
*dev
;
3282 mutex_lock(&wl
->mutex
);
3283 dev
= wl
->current_dev
;
3284 if (unlikely(!dev
||
3285 (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
))) {
3289 b43legacy_set_retry_limits(dev
, short_retry_limit
, long_retry_limit
);
3291 mutex_unlock(&wl
->mutex
);
3296 static const struct ieee80211_ops b43legacy_hw_ops
= {
3297 .tx
= b43legacy_op_tx
,
3298 .conf_tx
= b43legacy_op_conf_tx
,
3299 .add_interface
= b43legacy_op_add_interface
,
3300 .remove_interface
= b43legacy_op_remove_interface
,
3301 .config
= b43legacy_op_dev_config
,
3302 .config_interface
= b43legacy_op_config_interface
,
3303 .configure_filter
= b43legacy_op_configure_filter
,
3304 .get_stats
= b43legacy_op_get_stats
,
3305 .get_tx_stats
= b43legacy_op_get_tx_stats
,
3306 .start
= b43legacy_op_start
,
3307 .stop
= b43legacy_op_stop
,
3308 .set_retry_limit
= b43legacy_op_set_retry_limit
,
3311 /* Hard-reset the chip. Do not call this directly.
3312 * Use b43legacy_controller_restart()
3314 static void b43legacy_chip_reset(struct work_struct
*work
)
3316 struct b43legacy_wldev
*dev
=
3317 container_of(work
, struct b43legacy_wldev
, restart_work
);
3318 struct b43legacy_wl
*wl
= dev
->wl
;
3322 mutex_lock(&wl
->mutex
);
3324 prev_status
= b43legacy_status(dev
);
3325 /* Bring the device down... */
3326 if (prev_status
>= B43legacy_STAT_STARTED
)
3327 b43legacy_wireless_core_stop(dev
);
3328 if (prev_status
>= B43legacy_STAT_INITIALIZED
)
3329 b43legacy_wireless_core_exit(dev
);
3331 /* ...and up again. */
3332 if (prev_status
>= B43legacy_STAT_INITIALIZED
) {
3333 err
= b43legacy_wireless_core_init(dev
);
3337 if (prev_status
>= B43legacy_STAT_STARTED
) {
3338 err
= b43legacy_wireless_core_start(dev
);
3340 b43legacy_wireless_core_exit(dev
);
3345 mutex_unlock(&wl
->mutex
);
3347 b43legacyerr(wl
, "Controller restart FAILED\n");
3349 b43legacyinfo(wl
, "Controller restarted\n");
3352 static int b43legacy_setup_modes(struct b43legacy_wldev
*dev
,
3356 struct ieee80211_hw
*hw
= dev
->wl
->hw
;
3357 struct ieee80211_hw_mode
*mode
;
3358 struct b43legacy_phy
*phy
= &dev
->phy
;
3362 phy
->possible_phymodes
= 0;
3365 B43legacy_WARN_ON(cnt
>= B43legacy_MAX_PHYHWMODES
);
3366 mode
= &phy
->hwmodes
[cnt
];
3368 mode
->mode
= MODE_IEEE80211B
;
3369 mode
->num_channels
= b43legacy_bg_chantable_size
;
3370 mode
->channels
= b43legacy_bg_chantable
;
3371 mode
->num_rates
= b43legacy_b_ratetable_size
;
3372 mode
->rates
= b43legacy_b_ratetable
;
3373 err
= ieee80211_register_hwmode(hw
, mode
);
3377 phy
->possible_phymodes
|= B43legacy_PHYMODE_B
;
3382 B43legacy_WARN_ON(cnt
>= B43legacy_MAX_PHYHWMODES
);
3383 mode
= &phy
->hwmodes
[cnt
];
3385 mode
->mode
= MODE_IEEE80211G
;
3386 mode
->num_channels
= b43legacy_bg_chantable_size
;
3387 mode
->channels
= b43legacy_bg_chantable
;
3388 mode
->num_rates
= b43legacy_g_ratetable_size
;
3389 mode
->rates
= b43legacy_g_ratetable
;
3390 err
= ieee80211_register_hwmode(hw
, mode
);
3394 phy
->possible_phymodes
|= B43legacy_PHYMODE_G
;
3404 static void b43legacy_wireless_core_detach(struct b43legacy_wldev
*dev
)
3406 /* We release firmware that late to not be required to re-request
3407 * is all the time when we reinit the core. */
3408 b43legacy_release_firmware(dev
);
3411 static int b43legacy_wireless_core_attach(struct b43legacy_wldev
*dev
)
3413 struct b43legacy_wl
*wl
= dev
->wl
;
3414 struct ssb_bus
*bus
= dev
->dev
->bus
;
3415 struct pci_dev
*pdev
= bus
->host_pci
;
3421 /* Do NOT do any device initialization here.
3422 * Do it in wireless_core_init() instead.
3423 * This function is for gathering basic information about the HW, only.
3424 * Also some structs may be set up here. But most likely you want to
3425 * have that in core_init(), too.
3428 err
= ssb_bus_powerup(bus
, 0);
3430 b43legacyerr(wl
, "Bus powerup failed\n");
3433 /* Get the PHY type. */
3434 if (dev
->dev
->id
.revision
>= 5) {
3437 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
3438 have_gphy
= !!(tmshigh
& B43legacy_TMSHIGH_GPHY
);
3441 } else if (dev
->dev
->id
.revision
== 4)
3446 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3447 tmp
= dev
->phy
.gmode
? B43legacy_TMSLOW_GMODE
: 0;
3448 b43legacy_wireless_core_reset(dev
, tmp
);
3450 err
= b43legacy_phy_versioning(dev
);
3453 /* Check if this device supports multiband. */
3455 (pdev
->device
!= 0x4312 &&
3456 pdev
->device
!= 0x4319 &&
3457 pdev
->device
!= 0x4324)) {
3458 /* No multiband support. */
3461 switch (dev
->phy
.type
) {
3462 case B43legacy_PHYTYPE_B
:
3465 case B43legacy_PHYTYPE_G
:
3469 B43legacy_BUG_ON(1);
3472 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3473 tmp
= dev
->phy
.gmode
? B43legacy_TMSLOW_GMODE
: 0;
3474 b43legacy_wireless_core_reset(dev
, tmp
);
3476 err
= b43legacy_validate_chipaccess(dev
);
3479 err
= b43legacy_setup_modes(dev
, have_bphy
, have_gphy
);
3483 /* Now set some default "current_dev" */
3484 if (!wl
->current_dev
)
3485 wl
->current_dev
= dev
;
3486 INIT_WORK(&dev
->restart_work
, b43legacy_chip_reset
);
3488 b43legacy_radio_turn_off(dev
, 1);
3489 b43legacy_switch_analog(dev
, 0);
3490 ssb_device_disable(dev
->dev
, 0);
3491 ssb_bus_may_powerdown(bus
);
3497 ssb_bus_may_powerdown(bus
);
3501 static void b43legacy_one_core_detach(struct ssb_device
*dev
)
3503 struct b43legacy_wldev
*wldev
;
3504 struct b43legacy_wl
*wl
;
3506 wldev
= ssb_get_drvdata(dev
);
3508 cancel_work_sync(&wldev
->restart_work
);
3509 b43legacy_debugfs_remove_device(wldev
);
3510 b43legacy_wireless_core_detach(wldev
);
3511 list_del(&wldev
->list
);
3513 ssb_set_drvdata(dev
, NULL
);
3517 static int b43legacy_one_core_attach(struct ssb_device
*dev
,
3518 struct b43legacy_wl
*wl
)
3520 struct b43legacy_wldev
*wldev
;
3521 struct pci_dev
*pdev
;
3524 if (!list_empty(&wl
->devlist
)) {
3525 /* We are not the first core on this chip. */
3526 pdev
= dev
->bus
->host_pci
;
3527 /* Only special chips support more than one wireless
3528 * core, although some of the other chips have more than
3529 * one wireless core as well. Check for this and
3533 ((pdev
->device
!= 0x4321) &&
3534 (pdev
->device
!= 0x4313) &&
3535 (pdev
->device
!= 0x431A))) {
3536 b43legacydbg(wl
, "Ignoring unconnected 802.11 core\n");
3541 wldev
= kzalloc(sizeof(*wldev
), GFP_KERNEL
);
3547 b43legacy_set_status(wldev
, B43legacy_STAT_UNINIT
);
3548 wldev
->bad_frames_preempt
= modparam_bad_frames_preempt
;
3549 tasklet_init(&wldev
->isr_tasklet
,
3550 (void (*)(unsigned long))b43legacy_interrupt_tasklet
,
3551 (unsigned long)wldev
);
3553 wldev
->__using_pio
= 1;
3554 INIT_LIST_HEAD(&wldev
->list
);
3556 err
= b43legacy_wireless_core_attach(wldev
);
3558 goto err_kfree_wldev
;
3560 list_add(&wldev
->list
, &wl
->devlist
);
3562 ssb_set_drvdata(dev
, wldev
);
3563 b43legacy_debugfs_add_device(wldev
);
3572 static void b43legacy_sprom_fixup(struct ssb_bus
*bus
)
3574 /* boardflags workarounds */
3575 if (bus
->boardinfo
.vendor
== PCI_VENDOR_ID_APPLE
&&
3576 bus
->boardinfo
.type
== 0x4E &&
3577 bus
->boardinfo
.rev
> 0x40)
3578 bus
->sprom
.boardflags_lo
|= B43legacy_BFL_PACTRL
;
3581 static void b43legacy_wireless_exit(struct ssb_device
*dev
,
3582 struct b43legacy_wl
*wl
)
3584 struct ieee80211_hw
*hw
= wl
->hw
;
3586 ssb_set_devtypedata(dev
, NULL
);
3587 ieee80211_free_hw(hw
);
3590 static int b43legacy_wireless_init(struct ssb_device
*dev
)
3592 struct ssb_sprom
*sprom
= &dev
->bus
->sprom
;
3593 struct ieee80211_hw
*hw
;
3594 struct b43legacy_wl
*wl
;
3597 b43legacy_sprom_fixup(dev
->bus
);
3599 hw
= ieee80211_alloc_hw(sizeof(*wl
), &b43legacy_hw_ops
);
3601 b43legacyerr(NULL
, "Could not allocate ieee80211 device\n");
3606 hw
->flags
= IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE
|
3607 IEEE80211_HW_RX_INCLUDES_FCS
;
3608 hw
->max_signal
= 100;
3609 hw
->max_rssi
= -110;
3610 hw
->max_noise
= -110;
3611 hw
->queues
= 1; /* FIXME: hardware has more queues */
3612 SET_IEEE80211_DEV(hw
, dev
->dev
);
3613 if (is_valid_ether_addr(sprom
->et1mac
))
3614 SET_IEEE80211_PERM_ADDR(hw
, sprom
->et1mac
);
3616 SET_IEEE80211_PERM_ADDR(hw
, sprom
->il0mac
);
3618 /* Get and initialize struct b43legacy_wl */
3619 wl
= hw_to_b43legacy_wl(hw
);
3620 memset(wl
, 0, sizeof(*wl
));
3622 spin_lock_init(&wl
->irq_lock
);
3623 spin_lock_init(&wl
->leds_lock
);
3624 mutex_init(&wl
->mutex
);
3625 INIT_LIST_HEAD(&wl
->devlist
);
3627 ssb_set_devtypedata(dev
, wl
);
3628 b43legacyinfo(wl
, "Broadcom %04X WLAN found\n", dev
->bus
->chip_id
);
3634 static int b43legacy_probe(struct ssb_device
*dev
,
3635 const struct ssb_device_id
*id
)
3637 struct b43legacy_wl
*wl
;
3641 wl
= ssb_get_devtypedata(dev
);
3643 /* Probing the first core - setup common struct b43legacy_wl */
3645 err
= b43legacy_wireless_init(dev
);
3648 wl
= ssb_get_devtypedata(dev
);
3649 B43legacy_WARN_ON(!wl
);
3651 err
= b43legacy_one_core_attach(dev
, wl
);
3653 goto err_wireless_exit
;
3656 err
= ieee80211_register_hw(wl
->hw
);
3658 goto err_one_core_detach
;
3664 err_one_core_detach
:
3665 b43legacy_one_core_detach(dev
);
3668 b43legacy_wireless_exit(dev
, wl
);
3672 static void b43legacy_remove(struct ssb_device
*dev
)
3674 struct b43legacy_wl
*wl
= ssb_get_devtypedata(dev
);
3675 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3677 B43legacy_WARN_ON(!wl
);
3678 if (wl
->current_dev
== wldev
)
3679 ieee80211_unregister_hw(wl
->hw
);
3681 b43legacy_one_core_detach(dev
);
3683 if (list_empty(&wl
->devlist
))
3684 /* Last core on the chip unregistered.
3685 * We can destroy common struct b43legacy_wl.
3687 b43legacy_wireless_exit(dev
, wl
);
3690 /* Perform a hardware reset. This can be called from any context. */
3691 void b43legacy_controller_restart(struct b43legacy_wldev
*dev
,
3694 /* Must avoid requeueing, if we are in shutdown. */
3695 if (b43legacy_status(dev
) < B43legacy_STAT_INITIALIZED
)
3697 b43legacyinfo(dev
->wl
, "Controller RESET (%s) ...\n", reason
);
3698 queue_work(dev
->wl
->hw
->workqueue
, &dev
->restart_work
);
3703 static int b43legacy_suspend(struct ssb_device
*dev
, pm_message_t state
)
3705 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3706 struct b43legacy_wl
*wl
= wldev
->wl
;
3708 b43legacydbg(wl
, "Suspending...\n");
3710 mutex_lock(&wl
->mutex
);
3711 wldev
->suspend_init_status
= b43legacy_status(wldev
);
3712 if (wldev
->suspend_init_status
>= B43legacy_STAT_STARTED
)
3713 b43legacy_wireless_core_stop(wldev
);
3714 if (wldev
->suspend_init_status
>= B43legacy_STAT_INITIALIZED
)
3715 b43legacy_wireless_core_exit(wldev
);
3716 mutex_unlock(&wl
->mutex
);
3718 b43legacydbg(wl
, "Device suspended.\n");
3723 static int b43legacy_resume(struct ssb_device
*dev
)
3725 struct b43legacy_wldev
*wldev
= ssb_get_drvdata(dev
);
3726 struct b43legacy_wl
*wl
= wldev
->wl
;
3729 b43legacydbg(wl
, "Resuming...\n");
3731 mutex_lock(&wl
->mutex
);
3732 if (wldev
->suspend_init_status
>= B43legacy_STAT_INITIALIZED
) {
3733 err
= b43legacy_wireless_core_init(wldev
);
3735 b43legacyerr(wl
, "Resume failed at core init\n");
3739 if (wldev
->suspend_init_status
>= B43legacy_STAT_STARTED
) {
3740 err
= b43legacy_wireless_core_start(wldev
);
3742 b43legacy_wireless_core_exit(wldev
);
3743 b43legacyerr(wl
, "Resume failed at core start\n");
3747 mutex_unlock(&wl
->mutex
);
3749 b43legacydbg(wl
, "Device resumed.\n");
3754 #else /* CONFIG_PM */
3755 # define b43legacy_suspend NULL
3756 # define b43legacy_resume NULL
3757 #endif /* CONFIG_PM */
3759 static struct ssb_driver b43legacy_ssb_driver
= {
3760 .name
= KBUILD_MODNAME
,
3761 .id_table
= b43legacy_ssb_tbl
,
3762 .probe
= b43legacy_probe
,
3763 .remove
= b43legacy_remove
,
3764 .suspend
= b43legacy_suspend
,
3765 .resume
= b43legacy_resume
,
3768 static int __init
b43legacy_init(void)
3772 b43legacy_debugfs_init();
3774 err
= ssb_driver_register(&b43legacy_ssb_driver
);
3781 b43legacy_debugfs_exit();
3785 static void __exit
b43legacy_exit(void)
3787 ssb_driver_unregister(&b43legacy_ssb_driver
);
3788 b43legacy_debugfs_exit();
3791 module_init(b43legacy_init
)
3792 module_exit(b43legacy_exit
)