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90a3849b41fecdce8f37456b2094e2fb3490d9fe
[deliverable/linux.git] / drivers / net / wireless / brcm80211 / brcmfmac / dhd_sdio.c
1 /*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/kthread.h>
22 #include <linux/printk.h>
23 #include <linux/pci_ids.h>
24 #include <linux/netdevice.h>
25 #include <linux/interrupt.h>
26 #include <linux/sched.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <linux/debugfs.h>
35 #include <linux/vmalloc.h>
36 #include <asm/unaligned.h>
37 #include <defs.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
41 #include <soc.h>
42 #include "sdio_host.h"
43 #include "sdio_chip.h"
44
45 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
46
47 #ifdef DEBUG
48
49 #define BRCMF_TRAP_INFO_SIZE 80
50
51 #define CBUF_LEN (128)
52
53 /* Device console log buffer state */
54 #define CONSOLE_BUFFER_MAX 2024
55
56 struct rte_log_le {
57 __le32 buf; /* Can't be pointer on (64-bit) hosts */
58 __le32 buf_size;
59 __le32 idx;
60 char *_buf_compat; /* Redundant pointer for backward compat. */
61 };
62
63 struct rte_console {
64 /* Virtual UART
65 * When there is no UART (e.g. Quickturn),
66 * the host should write a complete
67 * input line directly into cbuf and then write
68 * the length into vcons_in.
69 * This may also be used when there is a real UART
70 * (at risk of conflicting with
71 * the real UART). vcons_out is currently unused.
72 */
73 uint vcons_in;
74 uint vcons_out;
75
76 /* Output (logging) buffer
77 * Console output is written to a ring buffer log_buf at index log_idx.
78 * The host may read the output when it sees log_idx advance.
79 * Output will be lost if the output wraps around faster than the host
80 * polls.
81 */
82 struct rte_log_le log_le;
83
84 /* Console input line buffer
85 * Characters are read one at a time into cbuf
86 * until <CR> is received, then
87 * the buffer is processed as a command line.
88 * Also used for virtual UART.
89 */
90 uint cbuf_idx;
91 char cbuf[CBUF_LEN];
92 };
93
94 #endif /* DEBUG */
95 #include <chipcommon.h>
96
97 #include "dhd_bus.h"
98 #include "dhd_dbg.h"
99
100 #define TXQLEN 2048 /* bulk tx queue length */
101 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
102 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
103 #define PRIOMASK 7
104
105 #define TXRETRIES 2 /* # of retries for tx frames */
106
107 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
108 one scheduling */
109
110 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
111 one scheduling */
112
113 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
114
115 #define MEMBLOCK 2048 /* Block size used for downloading
116 of dongle image */
117 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
118 biggest possible glom */
119
120 #define BRCMF_FIRSTREAD (1 << 6)
121
122
123 /* SBSDIO_DEVICE_CTL */
124
125 /* 1: device will assert busy signal when receiving CMD53 */
126 #define SBSDIO_DEVCTL_SETBUSY 0x01
127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
130 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
132 * sdio bus power cycle to clear (rev 9) */
133 #define SBSDIO_DEVCTL_PADS_ISO 0x08
134 /* Force SD->SB reset mapping (rev 11) */
135 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
136 /* Determined by CoreControl bit */
137 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
138 /* Force backplane reset */
139 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
140 /* Force no backplane reset */
141 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
142
143 /* direct(mapped) cis space */
144
145 /* MAPPED common CIS address */
146 #define SBSDIO_CIS_BASE_COMMON 0x1000
147 /* maximum bytes in one CIS */
148 #define SBSDIO_CIS_SIZE_LIMIT 0x200
149 /* cis offset addr is < 17 bits */
150 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
151
152 /* manfid tuple length, include tuple, link bytes */
153 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
154
155 /* intstatus */
156 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
157 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
158 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
159 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
160 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
161 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
162 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
163 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
164 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
165 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
166 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
167 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
168 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
169 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
170 #define I_PC (1 << 10) /* descriptor error */
171 #define I_PD (1 << 11) /* data error */
172 #define I_DE (1 << 12) /* Descriptor protocol Error */
173 #define I_RU (1 << 13) /* Receive descriptor Underflow */
174 #define I_RO (1 << 14) /* Receive fifo Overflow */
175 #define I_XU (1 << 15) /* Transmit fifo Underflow */
176 #define I_RI (1 << 16) /* Receive Interrupt */
177 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
178 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
179 #define I_XI (1 << 24) /* Transmit Interrupt */
180 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
181 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
182 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
183 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
184 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
185 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
186 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
187 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
188 #define I_DMA (I_RI | I_XI | I_ERRORS)
189
190 /* corecontrol */
191 #define CC_CISRDY (1 << 0) /* CIS Ready */
192 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
193 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
194 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
195 #define CC_XMTDATAAVAIL_MODE (1 << 4)
196 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
197
198 /* SDA_FRAMECTRL */
199 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
200 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
201 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
202 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
203
204 /* HW frame tag */
205 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
206
207 /* Total length of frame header for dongle protocol */
208 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
209 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
210
211 /*
212 * Software allocation of To SB Mailbox resources
213 */
214
215 /* tosbmailbox bits corresponding to intstatus bits */
216 #define SMB_NAK (1 << 0) /* Frame NAK */
217 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
218 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
219 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
220
221 /* tosbmailboxdata */
222 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
223
224 /*
225 * Software allocation of To Host Mailbox resources
226 */
227
228 /* intstatus bits */
229 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
230 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
231 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
232 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
233
234 /* tohostmailboxdata */
235 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
236 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
237 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
238 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
239
240 #define HMB_DATA_FCDATA_MASK 0xff000000
241 #define HMB_DATA_FCDATA_SHIFT 24
242
243 #define HMB_DATA_VERSION_MASK 0x00ff0000
244 #define HMB_DATA_VERSION_SHIFT 16
245
246 /*
247 * Software-defined protocol header
248 */
249
250 /* Current protocol version */
251 #define SDPCM_PROT_VERSION 4
252
253 /* SW frame header */
254 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
255
256 #define SDPCM_CHANNEL_MASK 0x00000f00
257 #define SDPCM_CHANNEL_SHIFT 8
258 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
259
260 #define SDPCM_NEXTLEN_OFFSET 2
261
262 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
263 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
264 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
265 #define SDPCM_DOFFSET_MASK 0xff000000
266 #define SDPCM_DOFFSET_SHIFT 24
267 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
268 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
269 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
270 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
271
272 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
273
274 /* logical channel numbers */
275 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
276 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
277 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
278 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
279 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
280
281 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
282
283 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
284
285 /*
286 * Shared structure between dongle and the host.
287 * The structure contains pointers to trap or assert information.
288 */
289 #define SDPCM_SHARED_VERSION 0x0003
290 #define SDPCM_SHARED_VERSION_MASK 0x00FF
291 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
292 #define SDPCM_SHARED_ASSERT 0x0200
293 #define SDPCM_SHARED_TRAP 0x0400
294
295 /* Space for header read, limit for data packets */
296 #define MAX_HDR_READ (1 << 6)
297 #define MAX_RX_DATASZ 2048
298
299 /* Maximum milliseconds to wait for F2 to come up */
300 #define BRCMF_WAIT_F2RDY 3000
301
302 /* Bump up limit on waiting for HT to account for first startup;
303 * if the image is doing a CRC calculation before programming the PMU
304 * for HT availability, it could take a couple hundred ms more, so
305 * max out at a 1 second (1000000us).
306 */
307 #undef PMU_MAX_TRANSITION_DLY
308 #define PMU_MAX_TRANSITION_DLY 1000000
309
310 /* Value for ChipClockCSR during initial setup */
311 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
312 SBSDIO_ALP_AVAIL_REQ)
313
314 /* Flags for SDH calls */
315 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
316
317 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
318 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
319 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME);
320 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME);
321
322 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
323 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
324 * when idle
325 */
326 #define BRCMF_IDLE_INTERVAL 1
327
328 /*
329 * Conversion of 802.1D priority to precedence level
330 */
331 static uint prio2prec(u32 prio)
332 {
333 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
334 (prio^2) : prio;
335 }
336
337 /* core registers */
338 struct sdpcmd_regs {
339 u32 corecontrol; /* 0x00, rev8 */
340 u32 corestatus; /* rev8 */
341 u32 PAD[1];
342 u32 biststatus; /* rev8 */
343
344 /* PCMCIA access */
345 u16 pcmciamesportaladdr; /* 0x010, rev8 */
346 u16 PAD[1];
347 u16 pcmciamesportalmask; /* rev8 */
348 u16 PAD[1];
349 u16 pcmciawrframebc; /* rev8 */
350 u16 PAD[1];
351 u16 pcmciaunderflowtimer; /* rev8 */
352 u16 PAD[1];
353
354 /* interrupt */
355 u32 intstatus; /* 0x020, rev8 */
356 u32 hostintmask; /* rev8 */
357 u32 intmask; /* rev8 */
358 u32 sbintstatus; /* rev8 */
359 u32 sbintmask; /* rev8 */
360 u32 funcintmask; /* rev4 */
361 u32 PAD[2];
362 u32 tosbmailbox; /* 0x040, rev8 */
363 u32 tohostmailbox; /* rev8 */
364 u32 tosbmailboxdata; /* rev8 */
365 u32 tohostmailboxdata; /* rev8 */
366
367 /* synchronized access to registers in SDIO clock domain */
368 u32 sdioaccess; /* 0x050, rev8 */
369 u32 PAD[3];
370
371 /* PCMCIA frame control */
372 u8 pcmciaframectrl; /* 0x060, rev8 */
373 u8 PAD[3];
374 u8 pcmciawatermark; /* rev8 */
375 u8 PAD[155];
376
377 /* interrupt batching control */
378 u32 intrcvlazy; /* 0x100, rev8 */
379 u32 PAD[3];
380
381 /* counters */
382 u32 cmd52rd; /* 0x110, rev8 */
383 u32 cmd52wr; /* rev8 */
384 u32 cmd53rd; /* rev8 */
385 u32 cmd53wr; /* rev8 */
386 u32 abort; /* rev8 */
387 u32 datacrcerror; /* rev8 */
388 u32 rdoutofsync; /* rev8 */
389 u32 wroutofsync; /* rev8 */
390 u32 writebusy; /* rev8 */
391 u32 readwait; /* rev8 */
392 u32 readterm; /* rev8 */
393 u32 writeterm; /* rev8 */
394 u32 PAD[40];
395 u32 clockctlstatus; /* rev8 */
396 u32 PAD[7];
397
398 u32 PAD[128]; /* DMA engines */
399
400 /* SDIO/PCMCIA CIS region */
401 char cis[512]; /* 0x400-0x5ff, rev6 */
402
403 /* PCMCIA function control registers */
404 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
405 u16 PAD[55];
406
407 /* PCMCIA backplane access */
408 u16 backplanecsr; /* 0x76E, rev6 */
409 u16 backplaneaddr0; /* rev6 */
410 u16 backplaneaddr1; /* rev6 */
411 u16 backplaneaddr2; /* rev6 */
412 u16 backplaneaddr3; /* rev6 */
413 u16 backplanedata0; /* rev6 */
414 u16 backplanedata1; /* rev6 */
415 u16 backplanedata2; /* rev6 */
416 u16 backplanedata3; /* rev6 */
417 u16 PAD[31];
418
419 /* sprom "size" & "blank" info */
420 u16 spromstatus; /* 0x7BE, rev2 */
421 u32 PAD[464];
422
423 u16 PAD[0x80];
424 };
425
426 #ifdef DEBUG
427 /* Device console log buffer state */
428 struct brcmf_console {
429 uint count; /* Poll interval msec counter */
430 uint log_addr; /* Log struct address (fixed) */
431 struct rte_log_le log_le; /* Log struct (host copy) */
432 uint bufsize; /* Size of log buffer */
433 u8 *buf; /* Log buffer (host copy) */
434 uint last; /* Last buffer read index */
435 };
436
437 struct brcmf_trap_info {
438 __le32 type;
439 __le32 epc;
440 __le32 cpsr;
441 __le32 spsr;
442 __le32 r0; /* a1 */
443 __le32 r1; /* a2 */
444 __le32 r2; /* a3 */
445 __le32 r3; /* a4 */
446 __le32 r4; /* v1 */
447 __le32 r5; /* v2 */
448 __le32 r6; /* v3 */
449 __le32 r7; /* v4 */
450 __le32 r8; /* v5 */
451 __le32 r9; /* sb/v6 */
452 __le32 r10; /* sl/v7 */
453 __le32 r11; /* fp/v8 */
454 __le32 r12; /* ip */
455 __le32 r13; /* sp */
456 __le32 r14; /* lr */
457 __le32 pc; /* r15 */
458 };
459 #endif /* DEBUG */
460
461 struct sdpcm_shared {
462 u32 flags;
463 u32 trap_addr;
464 u32 assert_exp_addr;
465 u32 assert_file_addr;
466 u32 assert_line;
467 u32 console_addr; /* Address of struct rte_console */
468 u32 msgtrace_addr;
469 u8 tag[32];
470 u32 brpt_addr;
471 };
472
473 struct sdpcm_shared_le {
474 __le32 flags;
475 __le32 trap_addr;
476 __le32 assert_exp_addr;
477 __le32 assert_file_addr;
478 __le32 assert_line;
479 __le32 console_addr; /* Address of struct rte_console */
480 __le32 msgtrace_addr;
481 u8 tag[32];
482 __le32 brpt_addr;
483 };
484
485
486 /* misc chip info needed by some of the routines */
487 /* Private data for SDIO bus interaction */
488 struct brcmf_sdio {
489 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
490 struct chip_info *ci; /* Chip info struct */
491 char *vars; /* Variables (from CIS and/or other) */
492 uint varsz; /* Size of variables buffer */
493
494 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
495
496 u32 hostintmask; /* Copy of Host Interrupt Mask */
497 u32 intstatus; /* Intstatus bits (events) pending */
498 bool fcstate; /* State of dongle flow-control */
499
500 uint blocksize; /* Block size of SDIO transfers */
501 uint roundup; /* Max roundup limit */
502
503 struct pktq txq; /* Queue length used for flow-control */
504 u8 flowcontrol; /* per prio flow control bitmask */
505 u8 tx_seq; /* Transmit sequence number (next) */
506 u8 tx_max; /* Maximum transmit sequence allowed */
507
508 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
509 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
510 u16 nextlen; /* Next Read Len from last header */
511 u8 rx_seq; /* Receive sequence number (expected) */
512 bool rxskip; /* Skip receive (awaiting NAK ACK) */
513
514 uint rxbound; /* Rx frames to read before resched */
515 uint txbound; /* Tx frames to send before resched */
516 uint txminmax;
517
518 struct sk_buff *glomd; /* Packet containing glomming descriptor */
519 struct sk_buff_head glom; /* Packet list for glommed superframe */
520 uint glomerr; /* Glom packet read errors */
521
522 u8 *rxbuf; /* Buffer for receiving control packets */
523 uint rxblen; /* Allocated length of rxbuf */
524 u8 *rxctl; /* Aligned pointer into rxbuf */
525 u8 *databuf; /* Buffer for receiving big glom packet */
526 u8 *dataptr; /* Aligned pointer into databuf */
527 uint rxlen; /* Length of valid data in buffer */
528
529 u8 sdpcm_ver; /* Bus protocol reported by dongle */
530
531 bool intr; /* Use interrupts */
532 bool poll; /* Use polling */
533 atomic_t ipend; /* Device interrupt is pending */
534 uint spurious; /* Count of spurious interrupts */
535 uint pollrate; /* Ticks between device polls */
536 uint polltick; /* Tick counter */
537
538 #ifdef DEBUG
539 uint console_interval;
540 struct brcmf_console console; /* Console output polling support */
541 uint console_addr; /* Console address from shared struct */
542 #endif /* DEBUG */
543
544 uint clkstate; /* State of sd and backplane clock(s) */
545 bool activity; /* Activity flag for clock down */
546 s32 idletime; /* Control for activity timeout */
547 s32 idlecount; /* Activity timeout counter */
548 s32 idleclock; /* How to set bus driver when idle */
549 s32 sd_rxchain;
550 bool use_rxchain; /* If brcmf should use PKT chains */
551 bool rxflow_mode; /* Rx flow control mode */
552 bool rxflow; /* Is rx flow control on */
553 bool alp_only; /* Don't use HT clock (ALP only) */
554 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
555 bool usebufpool;
556
557 u8 *ctrl_frame_buf;
558 u32 ctrl_frame_len;
559 bool ctrl_frame_stat;
560
561 spinlock_t txqlock;
562 wait_queue_head_t ctrl_wait;
563 wait_queue_head_t dcmd_resp_wait;
564
565 struct timer_list timer;
566 struct completion watchdog_wait;
567 struct task_struct *watchdog_tsk;
568 bool wd_timer_valid;
569 uint save_ms;
570
571 struct workqueue_struct *brcmf_wq;
572 struct work_struct datawork;
573 struct list_head dpc_tsklst;
574 spinlock_t dpc_tl_lock;
575
576 struct semaphore sdsem;
577
578 const struct firmware *firmware;
579 u32 fw_ptr;
580
581 bool txoff; /* Transmit flow-controlled */
582 struct brcmf_sdio_count sdcnt;
583 };
584
585 /* clkstate */
586 #define CLK_NONE 0
587 #define CLK_SDONLY 1
588 #define CLK_PENDING 2 /* Not used yet */
589 #define CLK_AVAIL 3
590
591 #ifdef DEBUG
592 static int qcount[NUMPRIO];
593 static int tx_packets[NUMPRIO];
594 #endif /* DEBUG */
595
596 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
597
598 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
599
600 /* Retry count for register access failures */
601 static const uint retry_limit = 2;
602
603 /* Limit on rounding up frames */
604 static const uint max_roundup = 512;
605
606 #define ALIGNMENT 4
607
608 static void pkt_align(struct sk_buff *p, int len, int align)
609 {
610 uint datalign;
611 datalign = (unsigned long)(p->data);
612 datalign = roundup(datalign, (align)) - datalign;
613 if (datalign)
614 skb_pull(p, datalign);
615 __skb_trim(p, len);
616 }
617
618 /* To check if there's window offered */
619 static bool data_ok(struct brcmf_sdio *bus)
620 {
621 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
622 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
623 }
624
625 /*
626 * Reads a register in the SDIO hardware block. This block occupies a series of
627 * adresses on the 32 bit backplane bus.
628 */
629 static int
630 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
631 {
632 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
633 int ret;
634
635 *regvar = brcmf_sdio_regrl(bus->sdiodev,
636 bus->ci->c_inf[idx].base + offset, &ret);
637
638 return ret;
639 }
640
641 static int
642 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
643 {
644 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
645 int ret;
646
647 brcmf_sdio_regwl(bus->sdiodev,
648 bus->ci->c_inf[idx].base + reg_offset,
649 regval, &ret);
650
651 return ret;
652 }
653
654 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
655
656 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
657
658 /* Packet free applicable unconditionally for sdio and sdspi.
659 * Conditional if bufpool was present for gspi bus.
660 */
661 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
662 {
663 if (bus->usebufpool)
664 brcmu_pkt_buf_free_skb(pkt);
665 }
666
667 /* Turn backplane clock on or off */
668 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
669 {
670 int err;
671 u8 clkctl, clkreq, devctl;
672 unsigned long timeout;
673
674 brcmf_dbg(TRACE, "Enter\n");
675
676 clkctl = 0;
677
678 if (on) {
679 /* Request HT Avail */
680 clkreq =
681 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
682
683 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
684 clkreq, &err);
685 if (err) {
686 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
687 return -EBADE;
688 }
689
690 /* Check current status */
691 clkctl = brcmf_sdio_regrb(bus->sdiodev,
692 SBSDIO_FUNC1_CHIPCLKCSR, &err);
693 if (err) {
694 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
695 return -EBADE;
696 }
697
698 /* Go to pending and await interrupt if appropriate */
699 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
700 /* Allow only clock-available interrupt */
701 devctl = brcmf_sdio_regrb(bus->sdiodev,
702 SBSDIO_DEVICE_CTL, &err);
703 if (err) {
704 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
705 err);
706 return -EBADE;
707 }
708
709 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
710 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
711 devctl, &err);
712 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
713 bus->clkstate = CLK_PENDING;
714
715 return 0;
716 } else if (bus->clkstate == CLK_PENDING) {
717 /* Cancel CA-only interrupt filter */
718 devctl = brcmf_sdio_regrb(bus->sdiodev,
719 SBSDIO_DEVICE_CTL, &err);
720 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
721 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
722 devctl, &err);
723 }
724
725 /* Otherwise, wait here (polling) for HT Avail */
726 timeout = jiffies +
727 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
728 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
729 clkctl = brcmf_sdio_regrb(bus->sdiodev,
730 SBSDIO_FUNC1_CHIPCLKCSR,
731 &err);
732 if (time_after(jiffies, timeout))
733 break;
734 else
735 usleep_range(5000, 10000);
736 }
737 if (err) {
738 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
739 return -EBADE;
740 }
741 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
742 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
743 PMU_MAX_TRANSITION_DLY, clkctl);
744 return -EBADE;
745 }
746
747 /* Mark clock available */
748 bus->clkstate = CLK_AVAIL;
749 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
750
751 #if defined(DEBUG)
752 if (!bus->alp_only) {
753 if (SBSDIO_ALPONLY(clkctl))
754 brcmf_dbg(ERROR, "HT Clock should be on\n");
755 }
756 #endif /* defined (DEBUG) */
757
758 bus->activity = true;
759 } else {
760 clkreq = 0;
761
762 if (bus->clkstate == CLK_PENDING) {
763 /* Cancel CA-only interrupt filter */
764 devctl = brcmf_sdio_regrb(bus->sdiodev,
765 SBSDIO_DEVICE_CTL, &err);
766 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
767 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
768 devctl, &err);
769 }
770
771 bus->clkstate = CLK_SDONLY;
772 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
773 clkreq, &err);
774 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
775 if (err) {
776 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
777 err);
778 return -EBADE;
779 }
780 }
781 return 0;
782 }
783
784 /* Change idle/active SD state */
785 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
786 {
787 brcmf_dbg(TRACE, "Enter\n");
788
789 if (on)
790 bus->clkstate = CLK_SDONLY;
791 else
792 bus->clkstate = CLK_NONE;
793
794 return 0;
795 }
796
797 /* Transition SD and backplane clock readiness */
798 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
799 {
800 #ifdef DEBUG
801 uint oldstate = bus->clkstate;
802 #endif /* DEBUG */
803
804 brcmf_dbg(TRACE, "Enter\n");
805
806 /* Early exit if we're already there */
807 if (bus->clkstate == target) {
808 if (target == CLK_AVAIL) {
809 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
810 bus->activity = true;
811 }
812 return 0;
813 }
814
815 switch (target) {
816 case CLK_AVAIL:
817 /* Make sure SD clock is available */
818 if (bus->clkstate == CLK_NONE)
819 brcmf_sdbrcm_sdclk(bus, true);
820 /* Now request HT Avail on the backplane */
821 brcmf_sdbrcm_htclk(bus, true, pendok);
822 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
823 bus->activity = true;
824 break;
825
826 case CLK_SDONLY:
827 /* Remove HT request, or bring up SD clock */
828 if (bus->clkstate == CLK_NONE)
829 brcmf_sdbrcm_sdclk(bus, true);
830 else if (bus->clkstate == CLK_AVAIL)
831 brcmf_sdbrcm_htclk(bus, false, false);
832 else
833 brcmf_dbg(ERROR, "request for %d -> %d\n",
834 bus->clkstate, target);
835 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
836 break;
837
838 case CLK_NONE:
839 /* Make sure to remove HT request */
840 if (bus->clkstate == CLK_AVAIL)
841 brcmf_sdbrcm_htclk(bus, false, false);
842 /* Now remove the SD clock */
843 brcmf_sdbrcm_sdclk(bus, false);
844 brcmf_sdbrcm_wd_timer(bus, 0);
845 break;
846 }
847 #ifdef DEBUG
848 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
849 #endif /* DEBUG */
850
851 return 0;
852 }
853
854 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
855 {
856 u32 intstatus = 0;
857 u32 hmb_data;
858 u8 fcbits;
859 int ret;
860
861 brcmf_dbg(TRACE, "Enter\n");
862
863 /* Read mailbox data and ack that we did so */
864 ret = r_sdreg32(bus, &hmb_data,
865 offsetof(struct sdpcmd_regs, tohostmailboxdata));
866
867 if (ret == 0)
868 w_sdreg32(bus, SMB_INT_ACK,
869 offsetof(struct sdpcmd_regs, tosbmailbox));
870 bus->sdcnt.f1regdata += 2;
871
872 /* Dongle recomposed rx frames, accept them again */
873 if (hmb_data & HMB_DATA_NAKHANDLED) {
874 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
875 bus->rx_seq);
876 if (!bus->rxskip)
877 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
878
879 bus->rxskip = false;
880 intstatus |= I_HMB_FRAME_IND;
881 }
882
883 /*
884 * DEVREADY does not occur with gSPI.
885 */
886 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
887 bus->sdpcm_ver =
888 (hmb_data & HMB_DATA_VERSION_MASK) >>
889 HMB_DATA_VERSION_SHIFT;
890 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
891 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
892 "expecting %d\n",
893 bus->sdpcm_ver, SDPCM_PROT_VERSION);
894 else
895 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
896 bus->sdpcm_ver);
897 }
898
899 /*
900 * Flow Control has been moved into the RX headers and this out of band
901 * method isn't used any more.
902 * remaining backward compatible with older dongles.
903 */
904 if (hmb_data & HMB_DATA_FC) {
905 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
906 HMB_DATA_FCDATA_SHIFT;
907
908 if (fcbits & ~bus->flowcontrol)
909 bus->sdcnt.fc_xoff++;
910
911 if (bus->flowcontrol & ~fcbits)
912 bus->sdcnt.fc_xon++;
913
914 bus->sdcnt.fc_rcvd++;
915 bus->flowcontrol = fcbits;
916 }
917
918 /* Shouldn't be any others */
919 if (hmb_data & ~(HMB_DATA_DEVREADY |
920 HMB_DATA_NAKHANDLED |
921 HMB_DATA_FC |
922 HMB_DATA_FWREADY |
923 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
924 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
925 hmb_data);
926
927 return intstatus;
928 }
929
930 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
931 {
932 uint retries = 0;
933 u16 lastrbc;
934 u8 hi, lo;
935 int err;
936
937 brcmf_dbg(ERROR, "%sterminate frame%s\n",
938 abort ? "abort command, " : "",
939 rtx ? ", send NAK" : "");
940
941 if (abort)
942 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
943
944 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
945 SFC_RF_TERM, &err);
946 bus->sdcnt.f1regdata++;
947
948 /* Wait until the packet has been flushed (device/FIFO stable) */
949 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
950 hi = brcmf_sdio_regrb(bus->sdiodev,
951 SBSDIO_FUNC1_RFRAMEBCHI, &err);
952 lo = brcmf_sdio_regrb(bus->sdiodev,
953 SBSDIO_FUNC1_RFRAMEBCLO, &err);
954 bus->sdcnt.f1regdata += 2;
955
956 if ((hi == 0) && (lo == 0))
957 break;
958
959 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
960 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
961 lastrbc, (hi << 8) + lo);
962 }
963 lastrbc = (hi << 8) + lo;
964 }
965
966 if (!retries)
967 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
968 else
969 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
970
971 if (rtx) {
972 bus->sdcnt.rxrtx++;
973 err = w_sdreg32(bus, SMB_NAK,
974 offsetof(struct sdpcmd_regs, tosbmailbox));
975
976 bus->sdcnt.f1regdata++;
977 if (err == 0)
978 bus->rxskip = true;
979 }
980
981 /* Clear partial in any case */
982 bus->nextlen = 0;
983
984 /* If we can't reach the device, signal failure */
985 if (err)
986 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
987 }
988
989 /* copy a buffer into a pkt buffer chain */
990 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
991 {
992 uint n, ret = 0;
993 struct sk_buff *p;
994 u8 *buf;
995
996 buf = bus->dataptr;
997
998 /* copy the data */
999 skb_queue_walk(&bus->glom, p) {
1000 n = min_t(uint, p->len, len);
1001 memcpy(p->data, buf, n);
1002 buf += n;
1003 len -= n;
1004 ret += n;
1005 if (!len)
1006 break;
1007 }
1008
1009 return ret;
1010 }
1011
1012 /* return total length of buffer chain */
1013 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1014 {
1015 struct sk_buff *p;
1016 uint total;
1017
1018 total = 0;
1019 skb_queue_walk(&bus->glom, p)
1020 total += p->len;
1021 return total;
1022 }
1023
1024 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1025 {
1026 struct sk_buff *cur, *next;
1027
1028 skb_queue_walk_safe(&bus->glom, cur, next) {
1029 skb_unlink(cur, &bus->glom);
1030 brcmu_pkt_buf_free_skb(cur);
1031 }
1032 }
1033
1034 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1035 {
1036 u16 dlen, totlen;
1037 u8 *dptr, num = 0;
1038
1039 u16 sublen, check;
1040 struct sk_buff *pfirst, *pnext;
1041
1042 int errcode;
1043 u8 chan, seq, doff, sfdoff;
1044 u8 txmax;
1045
1046 int ifidx = 0;
1047 bool usechain = bus->use_rxchain;
1048
1049 /* If packets, issue read(s) and send up packet chain */
1050 /* Return sequence numbers consumed? */
1051
1052 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1053 bus->glomd, skb_peek(&bus->glom));
1054
1055 /* If there's a descriptor, generate the packet chain */
1056 if (bus->glomd) {
1057 pfirst = pnext = NULL;
1058 dlen = (u16) (bus->glomd->len);
1059 dptr = bus->glomd->data;
1060 if (!dlen || (dlen & 1)) {
1061 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1062 dlen);
1063 dlen = 0;
1064 }
1065
1066 for (totlen = num = 0; dlen; num++) {
1067 /* Get (and move past) next length */
1068 sublen = get_unaligned_le16(dptr);
1069 dlen -= sizeof(u16);
1070 dptr += sizeof(u16);
1071 if ((sublen < SDPCM_HDRLEN) ||
1072 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1073 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1074 num, sublen);
1075 pnext = NULL;
1076 break;
1077 }
1078 if (sublen % BRCMF_SDALIGN) {
1079 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1080 sublen, BRCMF_SDALIGN);
1081 usechain = false;
1082 }
1083 totlen += sublen;
1084
1085 /* For last frame, adjust read len so total
1086 is a block multiple */
1087 if (!dlen) {
1088 sublen +=
1089 (roundup(totlen, bus->blocksize) - totlen);
1090 totlen = roundup(totlen, bus->blocksize);
1091 }
1092
1093 /* Allocate/chain packet for next subframe */
1094 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1095 if (pnext == NULL) {
1096 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1097 num, sublen);
1098 break;
1099 }
1100 skb_queue_tail(&bus->glom, pnext);
1101
1102 /* Adhere to start alignment requirements */
1103 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1104 }
1105
1106 /* If all allocations succeeded, save packet chain
1107 in bus structure */
1108 if (pnext) {
1109 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1110 totlen, num);
1111 if (BRCMF_GLOM_ON() && bus->nextlen &&
1112 totlen != bus->nextlen) {
1113 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1114 bus->nextlen, totlen, rxseq);
1115 }
1116 pfirst = pnext = NULL;
1117 } else {
1118 brcmf_sdbrcm_free_glom(bus);
1119 num = 0;
1120 }
1121
1122 /* Done with descriptor packet */
1123 brcmu_pkt_buf_free_skb(bus->glomd);
1124 bus->glomd = NULL;
1125 bus->nextlen = 0;
1126 }
1127
1128 /* Ok -- either we just generated a packet chain,
1129 or had one from before */
1130 if (!skb_queue_empty(&bus->glom)) {
1131 if (BRCMF_GLOM_ON()) {
1132 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1133 skb_queue_walk(&bus->glom, pnext) {
1134 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1135 pnext, (u8 *) (pnext->data),
1136 pnext->len, pnext->len);
1137 }
1138 }
1139
1140 pfirst = skb_peek(&bus->glom);
1141 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1142
1143 /* Do an SDIO read for the superframe. Configurable iovar to
1144 * read directly into the chained packet, or allocate a large
1145 * packet and and copy into the chain.
1146 */
1147 if (usechain) {
1148 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1149 bus->sdiodev->sbwad,
1150 SDIO_FUNC_2, F2SYNC, &bus->glom);
1151 } else if (bus->dataptr) {
1152 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1153 bus->sdiodev->sbwad,
1154 SDIO_FUNC_2, F2SYNC,
1155 bus->dataptr, dlen);
1156 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1157 if (sublen != dlen) {
1158 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1159 dlen, sublen);
1160 errcode = -1;
1161 }
1162 pnext = NULL;
1163 } else {
1164 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1165 dlen);
1166 errcode = -1;
1167 }
1168 bus->sdcnt.f2rxdata++;
1169
1170 /* On failure, kill the superframe, allow a couple retries */
1171 if (errcode < 0) {
1172 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1173 dlen, errcode);
1174 bus->sdiodev->bus_if->dstats.rx_errors++;
1175
1176 if (bus->glomerr++ < 3) {
1177 brcmf_sdbrcm_rxfail(bus, true, true);
1178 } else {
1179 bus->glomerr = 0;
1180 brcmf_sdbrcm_rxfail(bus, true, false);
1181 bus->sdcnt.rxglomfail++;
1182 brcmf_sdbrcm_free_glom(bus);
1183 }
1184 return 0;
1185 }
1186
1187 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1188 pfirst->data, min_t(int, pfirst->len, 48),
1189 "SUPERFRAME:\n");
1190
1191 /* Validate the superframe header */
1192 dptr = (u8 *) (pfirst->data);
1193 sublen = get_unaligned_le16(dptr);
1194 check = get_unaligned_le16(dptr + sizeof(u16));
1195
1196 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1197 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1198 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1199 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1200 brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1201 bus->nextlen, seq);
1202 bus->nextlen = 0;
1203 }
1204 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1205 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1206
1207 errcode = 0;
1208 if ((u16)~(sublen ^ check)) {
1209 brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1210 sublen, check);
1211 errcode = -1;
1212 } else if (roundup(sublen, bus->blocksize) != dlen) {
1213 brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1214 sublen, roundup(sublen, bus->blocksize),
1215 dlen);
1216 errcode = -1;
1217 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1218 SDPCM_GLOM_CHANNEL) {
1219 brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1220 SDPCM_PACKET_CHANNEL(
1221 &dptr[SDPCM_FRAMETAG_LEN]));
1222 errcode = -1;
1223 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1224 brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1225 errcode = -1;
1226 } else if ((doff < SDPCM_HDRLEN) ||
1227 (doff > (pfirst->len - SDPCM_HDRLEN))) {
1228 brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1229 doff, sublen, pfirst->len, SDPCM_HDRLEN);
1230 errcode = -1;
1231 }
1232
1233 /* Check sequence number of superframe SW header */
1234 if (rxseq != seq) {
1235 brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1236 seq, rxseq);
1237 bus->sdcnt.rx_badseq++;
1238 rxseq = seq;
1239 }
1240
1241 /* Check window for sanity */
1242 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1243 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1244 txmax, bus->tx_seq);
1245 txmax = bus->tx_seq + 2;
1246 }
1247 bus->tx_max = txmax;
1248
1249 /* Remove superframe header, remember offset */
1250 skb_pull(pfirst, doff);
1251 sfdoff = doff;
1252 num = 0;
1253
1254 /* Validate all the subframe headers */
1255 skb_queue_walk(&bus->glom, pnext) {
1256 /* leave when invalid subframe is found */
1257 if (errcode)
1258 break;
1259
1260 dptr = (u8 *) (pnext->data);
1261 dlen = (u16) (pnext->len);
1262 sublen = get_unaligned_le16(dptr);
1263 check = get_unaligned_le16(dptr + sizeof(u16));
1264 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1265 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1266 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1267 dptr, 32, "subframe:\n");
1268
1269 if ((u16)~(sublen ^ check)) {
1270 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1271 num, sublen, check);
1272 errcode = -1;
1273 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1274 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1275 num, sublen, dlen);
1276 errcode = -1;
1277 } else if ((chan != SDPCM_DATA_CHANNEL) &&
1278 (chan != SDPCM_EVENT_CHANNEL)) {
1279 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1280 num, chan);
1281 errcode = -1;
1282 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1283 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1284 num, doff, sublen, SDPCM_HDRLEN);
1285 errcode = -1;
1286 }
1287 /* increase the subframe count */
1288 num++;
1289 }
1290
1291 if (errcode) {
1292 /* Terminate frame on error, request
1293 a couple retries */
1294 if (bus->glomerr++ < 3) {
1295 /* Restore superframe header space */
1296 skb_push(pfirst, sfdoff);
1297 brcmf_sdbrcm_rxfail(bus, true, true);
1298 } else {
1299 bus->glomerr = 0;
1300 brcmf_sdbrcm_rxfail(bus, true, false);
1301 bus->sdcnt.rxglomfail++;
1302 brcmf_sdbrcm_free_glom(bus);
1303 }
1304 bus->nextlen = 0;
1305 return 0;
1306 }
1307
1308 /* Basic SD framing looks ok - process each packet (header) */
1309
1310 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1311 dptr = (u8 *) (pfirst->data);
1312 sublen = get_unaligned_le16(dptr);
1313 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1314 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1315 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1316
1317 brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1318 num, pfirst, pfirst->data,
1319 pfirst->len, sublen, chan, seq);
1320
1321 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1322 chan == SDPCM_EVENT_CHANNEL */
1323
1324 if (rxseq != seq) {
1325 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1326 seq, rxseq);
1327 bus->sdcnt.rx_badseq++;
1328 rxseq = seq;
1329 }
1330 rxseq++;
1331
1332 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1333 dptr, dlen, "Rx Subframe Data:\n");
1334
1335 __skb_trim(pfirst, sublen);
1336 skb_pull(pfirst, doff);
1337
1338 if (pfirst->len == 0) {
1339 skb_unlink(pfirst, &bus->glom);
1340 brcmu_pkt_buf_free_skb(pfirst);
1341 continue;
1342 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1343 &ifidx, pfirst) != 0) {
1344 brcmf_dbg(ERROR, "rx protocol error\n");
1345 bus->sdiodev->bus_if->dstats.rx_errors++;
1346 skb_unlink(pfirst, &bus->glom);
1347 brcmu_pkt_buf_free_skb(pfirst);
1348 continue;
1349 }
1350
1351 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1352 pfirst->data,
1353 min_t(int, pfirst->len, 32),
1354 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1355 bus->glom.qlen, pfirst, pfirst->data,
1356 pfirst->len, pfirst->next,
1357 pfirst->prev);
1358 }
1359 /* sent any remaining packets up */
1360 if (bus->glom.qlen) {
1361 up(&bus->sdsem);
1362 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1363 down(&bus->sdsem);
1364 }
1365
1366 bus->sdcnt.rxglomframes++;
1367 bus->sdcnt.rxglompkts += bus->glom.qlen;
1368 }
1369 return num;
1370 }
1371
1372 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1373 bool *pending)
1374 {
1375 DECLARE_WAITQUEUE(wait, current);
1376 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1377
1378 /* Wait until control frame is available */
1379 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1380 set_current_state(TASK_INTERRUPTIBLE);
1381
1382 while (!(*condition) && (!signal_pending(current) && timeout))
1383 timeout = schedule_timeout(timeout);
1384
1385 if (signal_pending(current))
1386 *pending = true;
1387
1388 set_current_state(TASK_RUNNING);
1389 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1390
1391 return timeout;
1392 }
1393
1394 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1395 {
1396 if (waitqueue_active(&bus->dcmd_resp_wait))
1397 wake_up_interruptible(&bus->dcmd_resp_wait);
1398
1399 return 0;
1400 }
1401 static void
1402 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1403 {
1404 uint rdlen, pad;
1405
1406 int sdret;
1407
1408 brcmf_dbg(TRACE, "Enter\n");
1409
1410 /* Set rxctl for frame (w/optional alignment) */
1411 bus->rxctl = bus->rxbuf;
1412 bus->rxctl += BRCMF_FIRSTREAD;
1413 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1414 if (pad)
1415 bus->rxctl += (BRCMF_SDALIGN - pad);
1416 bus->rxctl -= BRCMF_FIRSTREAD;
1417
1418 /* Copy the already-read portion over */
1419 memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1420 if (len <= BRCMF_FIRSTREAD)
1421 goto gotpkt;
1422
1423 /* Raise rdlen to next SDIO block to avoid tail command */
1424 rdlen = len - BRCMF_FIRSTREAD;
1425 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1426 pad = bus->blocksize - (rdlen % bus->blocksize);
1427 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1428 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1429 rdlen += pad;
1430 } else if (rdlen % BRCMF_SDALIGN) {
1431 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1432 }
1433
1434 /* Satisfy length-alignment requirements */
1435 if (rdlen & (ALIGNMENT - 1))
1436 rdlen = roundup(rdlen, ALIGNMENT);
1437
1438 /* Drop if the read is too big or it exceeds our maximum */
1439 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1440 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1441 rdlen, bus->sdiodev->bus_if->maxctl);
1442 bus->sdiodev->bus_if->dstats.rx_errors++;
1443 brcmf_sdbrcm_rxfail(bus, false, false);
1444 goto done;
1445 }
1446
1447 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1448 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1449 len, len - doff, bus->sdiodev->bus_if->maxctl);
1450 bus->sdiodev->bus_if->dstats.rx_errors++;
1451 bus->sdcnt.rx_toolong++;
1452 brcmf_sdbrcm_rxfail(bus, false, false);
1453 goto done;
1454 }
1455
1456 /* Read remainder of frame body into the rxctl buffer */
1457 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1458 bus->sdiodev->sbwad,
1459 SDIO_FUNC_2,
1460 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
1461 bus->sdcnt.f2rxdata++;
1462
1463 /* Control frame failures need retransmission */
1464 if (sdret < 0) {
1465 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1466 rdlen, sdret);
1467 bus->sdcnt.rxc_errors++;
1468 brcmf_sdbrcm_rxfail(bus, true, true);
1469 goto done;
1470 }
1471
1472 gotpkt:
1473
1474 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1475 bus->rxctl, len, "RxCtrl:\n");
1476
1477 /* Point to valid data and indicate its length */
1478 bus->rxctl += doff;
1479 bus->rxlen = len - doff;
1480
1481 done:
1482 /* Awake any waiters */
1483 brcmf_sdbrcm_dcmd_resp_wake(bus);
1484 }
1485
1486 /* Pad read to blocksize for efficiency */
1487 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1488 {
1489 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1490 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1491 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1492 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1493 *rdlen += *pad;
1494 } else if (*rdlen % BRCMF_SDALIGN) {
1495 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1496 }
1497 }
1498
1499 static void
1500 brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
1501 struct sk_buff **pkt, u8 **rxbuf)
1502 {
1503 int sdret; /* Return code from calls */
1504
1505 *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1506 if (*pkt == NULL)
1507 return;
1508
1509 pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1510 *rxbuf = (u8 *) ((*pkt)->data);
1511 /* Read the entire frame */
1512 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1513 SDIO_FUNC_2, F2SYNC, *pkt);
1514 bus->sdcnt.f2rxdata++;
1515
1516 if (sdret < 0) {
1517 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1518 rdlen, sdret);
1519 brcmu_pkt_buf_free_skb(*pkt);
1520 bus->sdiodev->bus_if->dstats.rx_errors++;
1521 /* Force retry w/normal header read.
1522 * Don't attempt NAK for
1523 * gSPI
1524 */
1525 brcmf_sdbrcm_rxfail(bus, true, true);
1526 *pkt = NULL;
1527 }
1528 }
1529
1530 /* Checks the header */
1531 static int
1532 brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
1533 u8 rxseq, u16 nextlen, u16 *len)
1534 {
1535 u16 check;
1536 bool len_consistent; /* Result of comparing readahead len and
1537 len from hw-hdr */
1538
1539 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1540
1541 /* Extract hardware header fields */
1542 *len = get_unaligned_le16(bus->rxhdr);
1543 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1544
1545 /* All zeros means readahead info was bad */
1546 if (!(*len | check)) {
1547 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1548 goto fail;
1549 }
1550
1551 /* Validate check bytes */
1552 if ((u16)~(*len ^ check)) {
1553 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1554 nextlen, *len, check);
1555 bus->sdcnt.rx_badhdr++;
1556 brcmf_sdbrcm_rxfail(bus, false, false);
1557 goto fail;
1558 }
1559
1560 /* Validate frame length */
1561 if (*len < SDPCM_HDRLEN) {
1562 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1563 *len);
1564 goto fail;
1565 }
1566
1567 /* Check for consistency with readahead info */
1568 len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1569 if (len_consistent) {
1570 /* Mismatch, force retry w/normal
1571 header (may be >4K) */
1572 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1573 nextlen, *len, roundup(*len, 16),
1574 rxseq);
1575 brcmf_sdbrcm_rxfail(bus, true, true);
1576 goto fail;
1577 }
1578
1579 return 0;
1580
1581 fail:
1582 brcmf_sdbrcm_pktfree2(bus, pkt);
1583 return -EINVAL;
1584 }
1585
1586 /* Return true if there may be more frames to read */
1587 static uint
1588 brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
1589 {
1590 u16 len, check; /* Extracted hardware header fields */
1591 u8 chan, seq, doff; /* Extracted software header fields */
1592 u8 fcbits; /* Extracted fcbits from software header */
1593
1594 struct sk_buff *pkt; /* Packet for event or data frames */
1595 u16 pad; /* Number of pad bytes to read */
1596 u16 rdlen; /* Total number of bytes to read */
1597 u8 rxseq; /* Next sequence number to expect */
1598 uint rxleft = 0; /* Remaining number of frames allowed */
1599 int sdret; /* Return code from calls */
1600 u8 txmax; /* Maximum tx sequence offered */
1601 u8 *rxbuf;
1602 int ifidx = 0;
1603 uint rxcount = 0; /* Total frames read */
1604
1605 brcmf_dbg(TRACE, "Enter\n");
1606
1607 /* Not finished unless we encounter no more frames indication */
1608 *finished = false;
1609
1610 for (rxseq = bus->rx_seq, rxleft = maxframes;
1611 !bus->rxskip && rxleft &&
1612 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1613 rxseq++, rxleft--) {
1614
1615 /* Handle glomming separately */
1616 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1617 u8 cnt;
1618 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1619 bus->glomd, skb_peek(&bus->glom));
1620 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1621 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1622 rxseq += cnt - 1;
1623 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1624 continue;
1625 }
1626
1627 /* Try doing single read if we can */
1628 if (bus->nextlen) {
1629 u16 nextlen = bus->nextlen;
1630 bus->nextlen = 0;
1631
1632 rdlen = len = nextlen << 4;
1633 brcmf_pad(bus, &pad, &rdlen);
1634
1635 /*
1636 * After the frame is received we have to
1637 * distinguish whether it is data
1638 * or non-data frame.
1639 */
1640 brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1641 if (pkt == NULL) {
1642 /* Give up on data, request rtx of events */
1643 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1644 len, rdlen, rxseq);
1645 continue;
1646 }
1647
1648 if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1649 &len) < 0)
1650 continue;
1651
1652 /* Extract software header fields */
1653 chan = SDPCM_PACKET_CHANNEL(
1654 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1655 seq = SDPCM_PACKET_SEQUENCE(
1656 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1657 doff = SDPCM_DOFFSET_VALUE(
1658 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1659 txmax = SDPCM_WINDOW_VALUE(
1660 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1661
1662 bus->nextlen =
1663 bus->rxhdr[SDPCM_FRAMETAG_LEN +
1664 SDPCM_NEXTLEN_OFFSET];
1665 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1666 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1667 bus->nextlen, seq);
1668 bus->nextlen = 0;
1669 }
1670
1671 bus->sdcnt.rx_readahead_cnt++;
1672
1673 /* Handle Flow Control */
1674 fcbits = SDPCM_FCMASK_VALUE(
1675 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1676
1677 if (bus->flowcontrol != fcbits) {
1678 if (~bus->flowcontrol & fcbits)
1679 bus->sdcnt.fc_xoff++;
1680
1681 if (bus->flowcontrol & ~fcbits)
1682 bus->sdcnt.fc_xon++;
1683
1684 bus->sdcnt.fc_rcvd++;
1685 bus->flowcontrol = fcbits;
1686 }
1687
1688 /* Check and update sequence number */
1689 if (rxseq != seq) {
1690 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1691 seq, rxseq);
1692 bus->sdcnt.rx_badseq++;
1693 rxseq = seq;
1694 }
1695
1696 /* Check window for sanity */
1697 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1698 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1699 txmax, bus->tx_seq);
1700 txmax = bus->tx_seq + 2;
1701 }
1702 bus->tx_max = txmax;
1703
1704 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1705 rxbuf, len, "Rx Data:\n");
1706 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1707 BRCMF_DATA_ON()) &&
1708 BRCMF_HDRS_ON(),
1709 bus->rxhdr, SDPCM_HDRLEN,
1710 "RxHdr:\n");
1711
1712 if (chan == SDPCM_CONTROL_CHANNEL) {
1713 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1714 seq);
1715 /* Force retry w/normal header read */
1716 bus->nextlen = 0;
1717 brcmf_sdbrcm_rxfail(bus, false, true);
1718 brcmf_sdbrcm_pktfree2(bus, pkt);
1719 continue;
1720 }
1721
1722 /* Validate data offset */
1723 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1724 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1725 doff, len, SDPCM_HDRLEN);
1726 brcmf_sdbrcm_rxfail(bus, false, false);
1727 brcmf_sdbrcm_pktfree2(bus, pkt);
1728 continue;
1729 }
1730
1731 /* All done with this one -- now deliver the packet */
1732 goto deliver;
1733 }
1734
1735 /* Read frame header (hardware and software) */
1736 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1737 SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1738 BRCMF_FIRSTREAD);
1739 bus->sdcnt.f2rxhdrs++;
1740
1741 if (sdret < 0) {
1742 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1743 bus->sdcnt.rx_hdrfail++;
1744 brcmf_sdbrcm_rxfail(bus, true, true);
1745 continue;
1746 }
1747 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1748 bus->rxhdr, SDPCM_HDRLEN, "RxHdr:\n");
1749
1750
1751 /* Extract hardware header fields */
1752 len = get_unaligned_le16(bus->rxhdr);
1753 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1754
1755 /* All zeros means no more frames */
1756 if (!(len | check)) {
1757 *finished = true;
1758 break;
1759 }
1760
1761 /* Validate check bytes */
1762 if ((u16) ~(len ^ check)) {
1763 brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1764 len, check);
1765 bus->sdcnt.rx_badhdr++;
1766 brcmf_sdbrcm_rxfail(bus, false, false);
1767 continue;
1768 }
1769
1770 /* Validate frame length */
1771 if (len < SDPCM_HDRLEN) {
1772 brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1773 continue;
1774 }
1775
1776 /* Extract software header fields */
1777 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1778 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1779 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1780 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1781
1782 /* Validate data offset */
1783 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1784 brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1785 doff, len, SDPCM_HDRLEN, seq);
1786 bus->sdcnt.rx_badhdr++;
1787 brcmf_sdbrcm_rxfail(bus, false, false);
1788 continue;
1789 }
1790
1791 /* Save the readahead length if there is one */
1792 bus->nextlen =
1793 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1794 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1795 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1796 bus->nextlen, seq);
1797 bus->nextlen = 0;
1798 }
1799
1800 /* Handle Flow Control */
1801 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1802
1803 if (bus->flowcontrol != fcbits) {
1804 if (~bus->flowcontrol & fcbits)
1805 bus->sdcnt.fc_xoff++;
1806
1807 if (bus->flowcontrol & ~fcbits)
1808 bus->sdcnt.fc_xon++;
1809
1810 bus->sdcnt.fc_rcvd++;
1811 bus->flowcontrol = fcbits;
1812 }
1813
1814 /* Check and update sequence number */
1815 if (rxseq != seq) {
1816 brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1817 bus->sdcnt.rx_badseq++;
1818 rxseq = seq;
1819 }
1820
1821 /* Check window for sanity */
1822 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1823 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1824 txmax, bus->tx_seq);
1825 txmax = bus->tx_seq + 2;
1826 }
1827 bus->tx_max = txmax;
1828
1829 /* Call a separate function for control frames */
1830 if (chan == SDPCM_CONTROL_CHANNEL) {
1831 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1832 continue;
1833 }
1834
1835 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1836 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1837 SDPCM_GLOM_CHANNEL */
1838
1839 /* Length to read */
1840 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1841
1842 /* May pad read to blocksize for efficiency */
1843 if (bus->roundup && bus->blocksize &&
1844 (rdlen > bus->blocksize)) {
1845 pad = bus->blocksize - (rdlen % bus->blocksize);
1846 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1847 ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1848 rdlen += pad;
1849 } else if (rdlen % BRCMF_SDALIGN) {
1850 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1851 }
1852
1853 /* Satisfy length-alignment requirements */
1854 if (rdlen & (ALIGNMENT - 1))
1855 rdlen = roundup(rdlen, ALIGNMENT);
1856
1857 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1858 /* Too long -- skip this frame */
1859 brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1860 len, rdlen);
1861 bus->sdiodev->bus_if->dstats.rx_errors++;
1862 bus->sdcnt.rx_toolong++;
1863 brcmf_sdbrcm_rxfail(bus, false, false);
1864 continue;
1865 }
1866
1867 pkt = brcmu_pkt_buf_get_skb(rdlen +
1868 BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1869 if (!pkt) {
1870 /* Give up on data, request rtx of events */
1871 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1872 rdlen, chan);
1873 bus->sdiodev->bus_if->dstats.rx_dropped++;
1874 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
1875 continue;
1876 }
1877
1878 /* Leave room for what we already read, and align remainder */
1879 skb_pull(pkt, BRCMF_FIRSTREAD);
1880 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
1881
1882 /* Read the remaining frame data */
1883 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1884 SDIO_FUNC_2, F2SYNC, pkt);
1885 bus->sdcnt.f2rxdata++;
1886
1887 if (sdret < 0) {
1888 brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
1889 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
1890 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
1891 : "test")), sdret);
1892 brcmu_pkt_buf_free_skb(pkt);
1893 bus->sdiodev->bus_if->dstats.rx_errors++;
1894 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
1895 continue;
1896 }
1897
1898 /* Copy the already-read portion */
1899 skb_push(pkt, BRCMF_FIRSTREAD);
1900 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
1901
1902 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1903 pkt->data, len, "Rx Data:\n");
1904
1905 deliver:
1906 /* Save superframe descriptor and allocate packet frame */
1907 if (chan == SDPCM_GLOM_CHANNEL) {
1908 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
1909 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1910 len);
1911 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1912 pkt->data, len,
1913 "Glom Data:\n");
1914 __skb_trim(pkt, len);
1915 skb_pull(pkt, SDPCM_HDRLEN);
1916 bus->glomd = pkt;
1917 } else {
1918 brcmf_dbg(ERROR, "%s: glom superframe w/o "
1919 "descriptor!\n", __func__);
1920 brcmf_sdbrcm_rxfail(bus, false, false);
1921 }
1922 continue;
1923 }
1924
1925 /* Fill in packet len and prio, deliver upward */
1926 __skb_trim(pkt, len);
1927 skb_pull(pkt, doff);
1928
1929 if (pkt->len == 0) {
1930 brcmu_pkt_buf_free_skb(pkt);
1931 continue;
1932 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
1933 pkt) != 0) {
1934 brcmf_dbg(ERROR, "rx protocol error\n");
1935 brcmu_pkt_buf_free_skb(pkt);
1936 bus->sdiodev->bus_if->dstats.rx_errors++;
1937 continue;
1938 }
1939
1940 /* Unlock during rx call */
1941 up(&bus->sdsem);
1942 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
1943 down(&bus->sdsem);
1944 }
1945 rxcount = maxframes - rxleft;
1946 /* Message if we hit the limit */
1947 if (!rxleft)
1948 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
1949 maxframes);
1950 else
1951 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1952 /* Back off rxseq if awaiting rtx, update rx_seq */
1953 if (bus->rxskip)
1954 rxseq--;
1955 bus->rx_seq = rxseq;
1956
1957 return rxcount;
1958 }
1959
1960 static void
1961 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
1962 {
1963 up(&bus->sdsem);
1964 wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2);
1965 down(&bus->sdsem);
1966 return;
1967 }
1968
1969 static void
1970 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1971 {
1972 if (waitqueue_active(&bus->ctrl_wait))
1973 wake_up_interruptible(&bus->ctrl_wait);
1974 return;
1975 }
1976
1977 /* Writes a HW/SW header into the packet and sends it. */
1978 /* Assumes: (a) header space already there, (b) caller holds lock */
1979 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
1980 uint chan, bool free_pkt)
1981 {
1982 int ret;
1983 u8 *frame;
1984 u16 len, pad = 0;
1985 u32 swheader;
1986 struct sk_buff *new;
1987 int i;
1988
1989 brcmf_dbg(TRACE, "Enter\n");
1990
1991 frame = (u8 *) (pkt->data);
1992
1993 /* Add alignment padding, allocate new packet if needed */
1994 pad = ((unsigned long)frame % BRCMF_SDALIGN);
1995 if (pad) {
1996 if (skb_headroom(pkt) < pad) {
1997 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
1998 skb_headroom(pkt), pad);
1999 bus->sdiodev->bus_if->tx_realloc++;
2000 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2001 if (!new) {
2002 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2003 pkt->len + BRCMF_SDALIGN);
2004 ret = -ENOMEM;
2005 goto done;
2006 }
2007
2008 pkt_align(new, pkt->len, BRCMF_SDALIGN);
2009 memcpy(new->data, pkt->data, pkt->len);
2010 if (free_pkt)
2011 brcmu_pkt_buf_free_skb(pkt);
2012 /* free the pkt if canned one is not used */
2013 free_pkt = true;
2014 pkt = new;
2015 frame = (u8 *) (pkt->data);
2016 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2017 pad = 0;
2018 } else {
2019 skb_push(pkt, pad);
2020 frame = (u8 *) (pkt->data);
2021 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2022 memset(frame, 0, pad + SDPCM_HDRLEN);
2023 }
2024 }
2025 /* precondition: pad < BRCMF_SDALIGN */
2026
2027 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2028 len = (u16) (pkt->len);
2029 *(__le16 *) frame = cpu_to_le16(len);
2030 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2031
2032 /* Software tag: channel, sequence number, data offset */
2033 swheader =
2034 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2035 (((pad +
2036 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2037
2038 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2039 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2040
2041 #ifdef DEBUG
2042 tx_packets[pkt->priority]++;
2043 #endif
2044
2045 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
2046 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2047 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
2048 frame, len, "Tx Frame:\n");
2049 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2050 ((BRCMF_CTL_ON() &&
2051 chan == SDPCM_CONTROL_CHANNEL) ||
2052 (BRCMF_DATA_ON() &&
2053 chan != SDPCM_CONTROL_CHANNEL))) &&
2054 BRCMF_HDRS_ON(),
2055 frame, min_t(u16, len, 16), "TxHdr:\n");
2056
2057 /* Raise len to next SDIO block to eliminate tail command */
2058 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2059 u16 pad = bus->blocksize - (len % bus->blocksize);
2060 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2061 len += pad;
2062 } else if (len % BRCMF_SDALIGN) {
2063 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2064 }
2065
2066 /* Some controllers have trouble with odd bytes -- round to even */
2067 if (len & (ALIGNMENT - 1))
2068 len = roundup(len, ALIGNMENT);
2069
2070 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2071 SDIO_FUNC_2, F2SYNC, pkt);
2072 bus->sdcnt.f2txdata++;
2073
2074 if (ret < 0) {
2075 /* On failure, abort the command and terminate the frame */
2076 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2077 ret);
2078 bus->sdcnt.tx_sderrs++;
2079
2080 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2081 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2082 SFC_WF_TERM, NULL);
2083 bus->sdcnt.f1regdata++;
2084
2085 for (i = 0; i < 3; i++) {
2086 u8 hi, lo;
2087 hi = brcmf_sdio_regrb(bus->sdiodev,
2088 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2089 lo = brcmf_sdio_regrb(bus->sdiodev,
2090 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2091 bus->sdcnt.f1regdata += 2;
2092 if ((hi == 0) && (lo == 0))
2093 break;
2094 }
2095
2096 }
2097 if (ret == 0)
2098 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2099
2100 done:
2101 /* restore pkt buffer pointer before calling tx complete routine */
2102 skb_pull(pkt, SDPCM_HDRLEN + pad);
2103 up(&bus->sdsem);
2104 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
2105 down(&bus->sdsem);
2106
2107 if (free_pkt)
2108 brcmu_pkt_buf_free_skb(pkt);
2109
2110 return ret;
2111 }
2112
2113 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2114 {
2115 struct sk_buff *pkt;
2116 u32 intstatus = 0;
2117 int ret = 0, prec_out;
2118 uint cnt = 0;
2119 uint datalen;
2120 u8 tx_prec_map;
2121
2122 brcmf_dbg(TRACE, "Enter\n");
2123
2124 tx_prec_map = ~bus->flowcontrol;
2125
2126 /* Send frames until the limit or some other event */
2127 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2128 spin_lock_bh(&bus->txqlock);
2129 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2130 if (pkt == NULL) {
2131 spin_unlock_bh(&bus->txqlock);
2132 break;
2133 }
2134 spin_unlock_bh(&bus->txqlock);
2135 datalen = pkt->len - SDPCM_HDRLEN;
2136
2137 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2138 if (ret)
2139 bus->sdiodev->bus_if->dstats.tx_errors++;
2140 else
2141 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
2142
2143 /* In poll mode, need to check for other events */
2144 if (!bus->intr && cnt) {
2145 /* Check device status, signal pending interrupt */
2146 ret = r_sdreg32(bus, &intstatus,
2147 offsetof(struct sdpcmd_regs,
2148 intstatus));
2149 bus->sdcnt.f2txdata++;
2150 if (ret != 0)
2151 break;
2152 if (intstatus & bus->hostintmask)
2153 atomic_set(&bus->ipend, 1);
2154 }
2155 }
2156
2157 /* Deflow-control stack if needed */
2158 if (bus->sdiodev->bus_if->drvr_up &&
2159 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2160 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2161 bus->txoff = false;
2162 brcmf_txflowblock(bus->sdiodev->dev, false);
2163 }
2164
2165 return cnt;
2166 }
2167
2168 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2169 {
2170 u32 local_hostintmask;
2171 u8 saveclk;
2172 int err;
2173 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2174 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2175 struct brcmf_sdio *bus = sdiodev->bus;
2176
2177 brcmf_dbg(TRACE, "Enter\n");
2178
2179 if (bus->watchdog_tsk) {
2180 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2181 kthread_stop(bus->watchdog_tsk);
2182 bus->watchdog_tsk = NULL;
2183 }
2184
2185 down(&bus->sdsem);
2186
2187 /* Enable clock for device interrupts */
2188 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2189
2190 /* Disable and clear interrupts at the chip level also */
2191 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2192 local_hostintmask = bus->hostintmask;
2193 bus->hostintmask = 0;
2194
2195 /* Change our idea of bus state */
2196 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2197
2198 /* Force clocks on backplane to be sure F2 interrupt propagates */
2199 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2200 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2201 if (!err) {
2202 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2203 (saveclk | SBSDIO_FORCE_HT), &err);
2204 }
2205 if (err)
2206 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
2207
2208 /* Turn off the bus (F2), free any pending packets */
2209 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2210 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2211 NULL);
2212
2213 /* Clear any pending interrupts now that F2 is disabled */
2214 w_sdreg32(bus, local_hostintmask,
2215 offsetof(struct sdpcmd_regs, intstatus));
2216
2217 /* Turn off the backplane clock (only) */
2218 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2219
2220 /* Clear the data packet queues */
2221 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2222
2223 /* Clear any held glomming stuff */
2224 if (bus->glomd)
2225 brcmu_pkt_buf_free_skb(bus->glomd);
2226 brcmf_sdbrcm_free_glom(bus);
2227
2228 /* Clear rx control and wake any waiters */
2229 bus->rxlen = 0;
2230 brcmf_sdbrcm_dcmd_resp_wake(bus);
2231
2232 /* Reset some F2 state stuff */
2233 bus->rxskip = false;
2234 bus->tx_seq = bus->rx_seq = 0;
2235
2236 up(&bus->sdsem);
2237 }
2238
2239 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2240 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2241 {
2242 unsigned long flags;
2243
2244 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2245 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2246 enable_irq(bus->sdiodev->irq);
2247 bus->sdiodev->irq_en = true;
2248 }
2249 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2250 }
2251 #else
2252 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2253 {
2254 }
2255 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2256
2257 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio *bus)
2258 {
2259 struct list_head *new_hd;
2260 unsigned long flags;
2261
2262 if (in_interrupt())
2263 new_hd = kzalloc(sizeof(struct list_head), GFP_ATOMIC);
2264 else
2265 new_hd = kzalloc(sizeof(struct list_head), GFP_KERNEL);
2266 if (new_hd == NULL)
2267 return;
2268
2269 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2270 list_add_tail(new_hd, &bus->dpc_tsklst);
2271 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2272 }
2273
2274 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2275 {
2276 u32 intstatus, newstatus = 0;
2277 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2278 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2279 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2280 bool rxdone = true; /* Flag for no more read data */
2281 int err = 0;
2282
2283 brcmf_dbg(TRACE, "Enter\n");
2284
2285 /* Start with leftover status bits */
2286 intstatus = bus->intstatus;
2287
2288 down(&bus->sdsem);
2289
2290 /* If waiting for HTAVAIL, check status */
2291 if (bus->clkstate == CLK_PENDING) {
2292 u8 clkctl, devctl = 0;
2293
2294 #ifdef DEBUG
2295 /* Check for inconsistent device control */
2296 devctl = brcmf_sdio_regrb(bus->sdiodev,
2297 SBSDIO_DEVICE_CTL, &err);
2298 if (err) {
2299 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2300 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2301 }
2302 #endif /* DEBUG */
2303
2304 /* Read CSR, if clock on switch to AVAIL, else ignore */
2305 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2306 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2307 if (err) {
2308 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2309 err);
2310 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2311 }
2312
2313 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2314 devctl, clkctl);
2315
2316 if (SBSDIO_HTAV(clkctl)) {
2317 devctl = brcmf_sdio_regrb(bus->sdiodev,
2318 SBSDIO_DEVICE_CTL, &err);
2319 if (err) {
2320 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2321 err);
2322 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2323 }
2324 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2325 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2326 devctl, &err);
2327 if (err) {
2328 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2329 err);
2330 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2331 }
2332 bus->clkstate = CLK_AVAIL;
2333 }
2334 }
2335
2336 /* Make sure backplane clock is on */
2337 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2338
2339 /* Pending interrupt indicates new device status */
2340 if (atomic_read(&bus->ipend) > 0) {
2341 atomic_set(&bus->ipend, 0);
2342 err = r_sdreg32(bus, &newstatus,
2343 offsetof(struct sdpcmd_regs, intstatus));
2344 bus->sdcnt.f1regdata++;
2345 if (err != 0)
2346 newstatus = 0;
2347 newstatus &= bus->hostintmask;
2348 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
2349 if (newstatus) {
2350 err = w_sdreg32(bus, newstatus,
2351 offsetof(struct sdpcmd_regs,
2352 intstatus));
2353 bus->sdcnt.f1regdata++;
2354 }
2355 }
2356
2357 /* Merge new bits with previous */
2358 intstatus |= newstatus;
2359 bus->intstatus = 0;
2360
2361 /* Handle flow-control change: read new state in case our ack
2362 * crossed another change interrupt. If change still set, assume
2363 * FC ON for safety, let next loop through do the debounce.
2364 */
2365 if (intstatus & I_HMB_FC_CHANGE) {
2366 intstatus &= ~I_HMB_FC_CHANGE;
2367 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2368 offsetof(struct sdpcmd_regs, intstatus));
2369
2370 err = r_sdreg32(bus, &newstatus,
2371 offsetof(struct sdpcmd_regs, intstatus));
2372 bus->sdcnt.f1regdata += 2;
2373 bus->fcstate =
2374 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
2375 intstatus |= (newstatus & bus->hostintmask);
2376 }
2377
2378 /* Handle host mailbox indication */
2379 if (intstatus & I_HMB_HOST_INT) {
2380 intstatus &= ~I_HMB_HOST_INT;
2381 intstatus |= brcmf_sdbrcm_hostmail(bus);
2382 }
2383
2384 /* Generally don't ask for these, can get CRC errors... */
2385 if (intstatus & I_WR_OOSYNC) {
2386 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2387 intstatus &= ~I_WR_OOSYNC;
2388 }
2389
2390 if (intstatus & I_RD_OOSYNC) {
2391 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2392 intstatus &= ~I_RD_OOSYNC;
2393 }
2394
2395 if (intstatus & I_SBINT) {
2396 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2397 intstatus &= ~I_SBINT;
2398 }
2399
2400 /* Would be active due to wake-wlan in gSPI */
2401 if (intstatus & I_CHIPACTIVE) {
2402 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2403 intstatus &= ~I_CHIPACTIVE;
2404 }
2405
2406 /* Ignore frame indications if rxskip is set */
2407 if (bus->rxskip)
2408 intstatus &= ~I_HMB_FRAME_IND;
2409
2410 /* On frame indication, read available frames */
2411 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2412 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2413 if (rxdone || bus->rxskip)
2414 intstatus &= ~I_HMB_FRAME_IND;
2415 rxlimit -= min(framecnt, rxlimit);
2416 }
2417
2418 /* Keep still-pending events for next scheduling */
2419 bus->intstatus = intstatus;
2420
2421 brcmf_sdbrcm_clrintr(bus);
2422
2423 if (data_ok(bus) && bus->ctrl_frame_stat &&
2424 (bus->clkstate == CLK_AVAIL)) {
2425 int i;
2426
2427 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2428 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2429 (u32) bus->ctrl_frame_len);
2430
2431 if (err < 0) {
2432 /* On failure, abort the command and
2433 terminate the frame */
2434 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2435 err);
2436 bus->sdcnt.tx_sderrs++;
2437
2438 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2439
2440 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2441 SFC_WF_TERM, &err);
2442 bus->sdcnt.f1regdata++;
2443
2444 for (i = 0; i < 3; i++) {
2445 u8 hi, lo;
2446 hi = brcmf_sdio_regrb(bus->sdiodev,
2447 SBSDIO_FUNC1_WFRAMEBCHI,
2448 &err);
2449 lo = brcmf_sdio_regrb(bus->sdiodev,
2450 SBSDIO_FUNC1_WFRAMEBCLO,
2451 &err);
2452 bus->sdcnt.f1regdata += 2;
2453 if ((hi == 0) && (lo == 0))
2454 break;
2455 }
2456
2457 } else {
2458 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2459 }
2460 bus->ctrl_frame_stat = false;
2461 brcmf_sdbrcm_wait_event_wakeup(bus);
2462 }
2463 /* Send queued frames (limit 1 if rx may still be pending) */
2464 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
2465 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2466 && data_ok(bus)) {
2467 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2468 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2469 txlimit -= framecnt;
2470 }
2471
2472 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2473 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation\n");
2474 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2475 bus->intstatus = 0;
2476 } else if (bus->intstatus || atomic_read(&bus->ipend) > 0 ||
2477 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
2478 && data_ok(bus)) || PKT_AVAILABLE()) {
2479 brcmf_sdbrcm_adddpctsk(bus);
2480 }
2481
2482 /* If we're done for now, turn off clock request. */
2483 if ((bus->clkstate != CLK_PENDING)
2484 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2485 bus->activity = false;
2486 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2487 }
2488
2489 up(&bus->sdsem);
2490 }
2491
2492 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2493 {
2494 int ret = -EBADE;
2495 uint datalen, prec;
2496 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2497 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2498 struct brcmf_sdio *bus = sdiodev->bus;
2499 unsigned long flags;
2500
2501 brcmf_dbg(TRACE, "Enter\n");
2502
2503 datalen = pkt->len;
2504
2505 /* Add space for the header */
2506 skb_push(pkt, SDPCM_HDRLEN);
2507 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2508
2509 prec = prio2prec((pkt->priority & PRIOMASK));
2510
2511 /* Check for existing queue, current flow-control,
2512 pending event, or pending clock */
2513 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2514 bus->sdcnt.fcqueued++;
2515
2516 /* Priority based enq */
2517 spin_lock_bh(&bus->txqlock);
2518 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2519 skb_pull(pkt, SDPCM_HDRLEN);
2520 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2521 brcmu_pkt_buf_free_skb(pkt);
2522 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2523 ret = -ENOSR;
2524 } else {
2525 ret = 0;
2526 }
2527 spin_unlock_bh(&bus->txqlock);
2528
2529 if (pktq_len(&bus->txq) >= TXHI) {
2530 bus->txoff = true;
2531 brcmf_txflowblock(bus->sdiodev->dev, true);
2532 }
2533
2534 #ifdef DEBUG
2535 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2536 qcount[prec] = pktq_plen(&bus->txq, prec);
2537 #endif
2538
2539 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2540 if (list_empty(&bus->dpc_tsklst)) {
2541 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2542
2543 brcmf_sdbrcm_adddpctsk(bus);
2544 queue_work(bus->brcmf_wq, &bus->datawork);
2545 } else {
2546 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2547 }
2548
2549 return ret;
2550 }
2551
2552 static int
2553 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2554 uint size)
2555 {
2556 int bcmerror = 0;
2557 u32 sdaddr;
2558 uint dsize;
2559
2560 /* Determine initial transfer parameters */
2561 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2562 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2563 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2564 else
2565 dsize = size;
2566
2567 /* Set the backplane window to include the start address */
2568 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2569 if (bcmerror) {
2570 brcmf_dbg(ERROR, "window change failed\n");
2571 goto xfer_done;
2572 }
2573
2574 /* Do the transfer(s) */
2575 while (size) {
2576 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2577 write ? "write" : "read", dsize,
2578 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2579 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2580 sdaddr, data, dsize);
2581 if (bcmerror) {
2582 brcmf_dbg(ERROR, "membytes transfer failed\n");
2583 break;
2584 }
2585
2586 /* Adjust for next transfer (if any) */
2587 size -= dsize;
2588 if (size) {
2589 data += dsize;
2590 address += dsize;
2591 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2592 address);
2593 if (bcmerror) {
2594 brcmf_dbg(ERROR, "window change failed\n");
2595 break;
2596 }
2597 sdaddr = 0;
2598 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2599 }
2600 }
2601
2602 xfer_done:
2603 /* Return the window to backplane enumeration space for core access */
2604 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2605 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2606 bus->sdiodev->sbwad);
2607
2608 return bcmerror;
2609 }
2610
2611 #ifdef DEBUG
2612 #define CONSOLE_LINE_MAX 192
2613
2614 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2615 {
2616 struct brcmf_console *c = &bus->console;
2617 u8 line[CONSOLE_LINE_MAX], ch;
2618 u32 n, idx, addr;
2619 int rv;
2620
2621 /* Don't do anything until FWREADY updates console address */
2622 if (bus->console_addr == 0)
2623 return 0;
2624
2625 /* Read console log struct */
2626 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2627 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2628 sizeof(c->log_le));
2629 if (rv < 0)
2630 return rv;
2631
2632 /* Allocate console buffer (one time only) */
2633 if (c->buf == NULL) {
2634 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2635 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2636 if (c->buf == NULL)
2637 return -ENOMEM;
2638 }
2639
2640 idx = le32_to_cpu(c->log_le.idx);
2641
2642 /* Protect against corrupt value */
2643 if (idx > c->bufsize)
2644 return -EBADE;
2645
2646 /* Skip reading the console buffer if the index pointer
2647 has not moved */
2648 if (idx == c->last)
2649 return 0;
2650
2651 /* Read the console buffer */
2652 addr = le32_to_cpu(c->log_le.buf);
2653 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2654 if (rv < 0)
2655 return rv;
2656
2657 while (c->last != idx) {
2658 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2659 if (c->last == idx) {
2660 /* This would output a partial line.
2661 * Instead, back up
2662 * the buffer pointer and output this
2663 * line next time around.
2664 */
2665 if (c->last >= n)
2666 c->last -= n;
2667 else
2668 c->last = c->bufsize - n;
2669 goto break2;
2670 }
2671 ch = c->buf[c->last];
2672 c->last = (c->last + 1) % c->bufsize;
2673 if (ch == '\n')
2674 break;
2675 line[n] = ch;
2676 }
2677
2678 if (n > 0) {
2679 if (line[n - 1] == '\r')
2680 n--;
2681 line[n] = 0;
2682 pr_debug("CONSOLE: %s\n", line);
2683 }
2684 }
2685 break2:
2686
2687 return 0;
2688 }
2689 #endif /* DEBUG */
2690
2691 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2692 {
2693 int i;
2694 int ret;
2695
2696 bus->ctrl_frame_stat = false;
2697 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2698 SDIO_FUNC_2, F2SYNC, frame, len);
2699
2700 if (ret < 0) {
2701 /* On failure, abort the command and terminate the frame */
2702 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2703 ret);
2704 bus->sdcnt.tx_sderrs++;
2705
2706 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2707
2708 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2709 SFC_WF_TERM, NULL);
2710 bus->sdcnt.f1regdata++;
2711
2712 for (i = 0; i < 3; i++) {
2713 u8 hi, lo;
2714 hi = brcmf_sdio_regrb(bus->sdiodev,
2715 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2716 lo = brcmf_sdio_regrb(bus->sdiodev,
2717 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2718 bus->sdcnt.f1regdata += 2;
2719 if (hi == 0 && lo == 0)
2720 break;
2721 }
2722 return ret;
2723 }
2724
2725 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2726
2727 return ret;
2728 }
2729
2730 static int
2731 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2732 {
2733 u8 *frame;
2734 u16 len;
2735 u32 swheader;
2736 uint retries = 0;
2737 u8 doff = 0;
2738 int ret = -1;
2739 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2740 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2741 struct brcmf_sdio *bus = sdiodev->bus;
2742 unsigned long flags;
2743
2744 brcmf_dbg(TRACE, "Enter\n");
2745
2746 /* Back the pointer to make a room for bus header */
2747 frame = msg - SDPCM_HDRLEN;
2748 len = (msglen += SDPCM_HDRLEN);
2749
2750 /* Add alignment padding (optional for ctl frames) */
2751 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2752 if (doff) {
2753 frame -= doff;
2754 len += doff;
2755 msglen += doff;
2756 memset(frame, 0, doff + SDPCM_HDRLEN);
2757 }
2758 /* precondition: doff < BRCMF_SDALIGN */
2759 doff += SDPCM_HDRLEN;
2760
2761 /* Round send length to next SDIO block */
2762 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2763 u16 pad = bus->blocksize - (len % bus->blocksize);
2764 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2765 len += pad;
2766 } else if (len % BRCMF_SDALIGN) {
2767 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2768 }
2769
2770 /* Satisfy length-alignment requirements */
2771 if (len & (ALIGNMENT - 1))
2772 len = roundup(len, ALIGNMENT);
2773
2774 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2775
2776 /* Need to lock here to protect txseq and SDIO tx calls */
2777 down(&bus->sdsem);
2778
2779 /* Make sure backplane clock is on */
2780 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2781
2782 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2783 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2784 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2785
2786 /* Software tag: channel, sequence number, data offset */
2787 swheader =
2788 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2789 SDPCM_CHANNEL_MASK)
2790 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2791 SDPCM_DOFFSET_MASK);
2792 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2793 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2794
2795 if (!data_ok(bus)) {
2796 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2797 bus->tx_max, bus->tx_seq);
2798 bus->ctrl_frame_stat = true;
2799 /* Send from dpc */
2800 bus->ctrl_frame_buf = frame;
2801 bus->ctrl_frame_len = len;
2802
2803 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2804
2805 if (!bus->ctrl_frame_stat) {
2806 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2807 ret = 0;
2808 } else {
2809 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2810 ret = -1;
2811 }
2812 }
2813
2814 if (ret == -1) {
2815 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2816 frame, len, "Tx Frame:\n");
2817 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2818 BRCMF_HDRS_ON(),
2819 frame, min_t(u16, len, 16), "TxHdr:\n");
2820
2821 do {
2822 ret = brcmf_tx_frame(bus, frame, len);
2823 } while (ret < 0 && retries++ < TXRETRIES);
2824 }
2825
2826 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
2827 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2828 list_empty(&bus->dpc_tsklst)) {
2829 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2830
2831 bus->activity = false;
2832 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2833 } else {
2834 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
2835 }
2836
2837 up(&bus->sdsem);
2838
2839 if (ret)
2840 bus->sdcnt.tx_ctlerrs++;
2841 else
2842 bus->sdcnt.tx_ctlpkts++;
2843
2844 return ret ? -EIO : 0;
2845 }
2846
2847 #ifdef DEBUG
2848 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2849 {
2850 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2851 }
2852
2853 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2854 struct sdpcm_shared *sh)
2855 {
2856 u32 addr;
2857 int rv;
2858 u32 shaddr = 0;
2859 struct sdpcm_shared_le sh_le;
2860 __le32 addr_le;
2861
2862 shaddr = bus->ramsize - 4;
2863
2864 /*
2865 * Read last word in socram to determine
2866 * address of sdpcm_shared structure
2867 */
2868 rv = brcmf_sdbrcm_membytes(bus, false, shaddr,
2869 (u8 *)&addr_le, 4);
2870 if (rv < 0)
2871 return rv;
2872
2873 addr = le32_to_cpu(addr_le);
2874
2875 brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
2876
2877 /*
2878 * Check if addr is valid.
2879 * NVRAM length at the end of memory should have been overwritten.
2880 */
2881 if (!brcmf_sdio_valid_shared_address(addr)) {
2882 brcmf_dbg(ERROR, "invalid sdpcm_shared address 0x%08X\n",
2883 addr);
2884 return -EINVAL;
2885 }
2886
2887 /* Read hndrte_shared structure */
2888 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&sh_le,
2889 sizeof(struct sdpcm_shared_le));
2890 if (rv < 0)
2891 return rv;
2892
2893 /* Endianness */
2894 sh->flags = le32_to_cpu(sh_le.flags);
2895 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2896 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2897 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2898 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2899 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2900 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2901
2902 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
2903 brcmf_dbg(ERROR,
2904 "sdpcm_shared version mismatch: dhd %d dongle %d\n",
2905 SDPCM_SHARED_VERSION,
2906 sh->flags & SDPCM_SHARED_VERSION_MASK);
2907 return -EPROTO;
2908 }
2909
2910 return 0;
2911 }
2912
2913 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2914 struct sdpcm_shared *sh, char __user *data,
2915 size_t count)
2916 {
2917 u32 addr, console_ptr, console_size, console_index;
2918 char *conbuf = NULL;
2919 __le32 sh_val;
2920 int rv;
2921 loff_t pos = 0;
2922 int nbytes = 0;
2923
2924 /* obtain console information from device memory */
2925 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2926 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2927 (u8 *)&sh_val, sizeof(u32));
2928 if (rv < 0)
2929 return rv;
2930 console_ptr = le32_to_cpu(sh_val);
2931
2932 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2933 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2934 (u8 *)&sh_val, sizeof(u32));
2935 if (rv < 0)
2936 return rv;
2937 console_size = le32_to_cpu(sh_val);
2938
2939 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2940 rv = brcmf_sdbrcm_membytes(bus, false, addr,
2941 (u8 *)&sh_val, sizeof(u32));
2942 if (rv < 0)
2943 return rv;
2944 console_index = le32_to_cpu(sh_val);
2945
2946 /* allocate buffer for console data */
2947 if (console_size <= CONSOLE_BUFFER_MAX)
2948 conbuf = vzalloc(console_size+1);
2949
2950 if (!conbuf)
2951 return -ENOMEM;
2952
2953 /* obtain the console data from device */
2954 conbuf[console_size] = '\0';
2955 rv = brcmf_sdbrcm_membytes(bus, false, console_ptr, (u8 *)conbuf,
2956 console_size);
2957 if (rv < 0)
2958 goto done;
2959
2960 rv = simple_read_from_buffer(data, count, &pos,
2961 conbuf + console_index,
2962 console_size - console_index);
2963 if (rv < 0)
2964 goto done;
2965
2966 nbytes = rv;
2967 if (console_index > 0) {
2968 pos = 0;
2969 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2970 conbuf, console_index - 1);
2971 if (rv < 0)
2972 goto done;
2973 rv += nbytes;
2974 }
2975 done:
2976 vfree(conbuf);
2977 return rv;
2978 }
2979
2980 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2981 char __user *data, size_t count)
2982 {
2983 int error, res;
2984 char buf[350];
2985 struct brcmf_trap_info tr;
2986 int nbytes;
2987 loff_t pos = 0;
2988
2989 if ((sh->flags & SDPCM_SHARED_TRAP) == 0)
2990 return 0;
2991
2992 error = brcmf_sdbrcm_membytes(bus, false, sh->trap_addr, (u8 *)&tr,
2993 sizeof(struct brcmf_trap_info));
2994 if (error < 0)
2995 return error;
2996
2997 nbytes = brcmf_sdio_dump_console(bus, sh, data, count);
2998 if (nbytes < 0)
2999 return nbytes;
3000
3001 res = scnprintf(buf, sizeof(buf),
3002 "dongle trap info: type 0x%x @ epc 0x%08x\n"
3003 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3004 " lr 0x%08x pc 0x%08x offset 0x%x\n"
3005 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
3006 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
3007 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3008 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3009 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3010 le32_to_cpu(tr.pc), sh->trap_addr,
3011 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3012 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3013 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3014 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3015
3016 error = simple_read_from_buffer(data+nbytes, count, &pos, buf, res);
3017 if (error < 0)
3018 return error;
3019
3020 nbytes += error;
3021 return nbytes;
3022 }
3023
3024 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3025 struct sdpcm_shared *sh, char __user *data,
3026 size_t count)
3027 {
3028 int error = 0;
3029 char buf[200];
3030 char file[80] = "?";
3031 char expr[80] = "<???>";
3032 int res;
3033 loff_t pos = 0;
3034
3035 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3036 brcmf_dbg(INFO, "firmware not built with -assert\n");
3037 return 0;
3038 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3039 brcmf_dbg(INFO, "no assert in dongle\n");
3040 return 0;
3041 }
3042
3043 if (sh->assert_file_addr != 0) {
3044 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_file_addr,
3045 (u8 *)file, 80);
3046 if (error < 0)
3047 return error;
3048 }
3049 if (sh->assert_exp_addr != 0) {
3050 error = brcmf_sdbrcm_membytes(bus, false, sh->assert_exp_addr,
3051 (u8 *)expr, 80);
3052 if (error < 0)
3053 return error;
3054 }
3055
3056 res = scnprintf(buf, sizeof(buf),
3057 "dongle assert: %s:%d: assert(%s)\n",
3058 file, sh->assert_line, expr);
3059 return simple_read_from_buffer(data, count, &pos, buf, res);
3060 }
3061
3062 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3063 {
3064 int error;
3065 struct sdpcm_shared sh;
3066
3067 down(&bus->sdsem);
3068 error = brcmf_sdio_readshared(bus, &sh);
3069 up(&bus->sdsem);
3070
3071 if (error < 0)
3072 return error;
3073
3074 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3075 brcmf_dbg(INFO, "firmware not built with -assert\n");
3076 else if (sh.flags & SDPCM_SHARED_ASSERT)
3077 brcmf_dbg(ERROR, "assertion in dongle\n");
3078
3079 if (sh.flags & SDPCM_SHARED_TRAP)
3080 brcmf_dbg(ERROR, "firmware trap in dongle\n");
3081
3082 return 0;
3083 }
3084
3085 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
3086 size_t count, loff_t *ppos)
3087 {
3088 int error = 0;
3089 struct sdpcm_shared sh;
3090 int nbytes = 0;
3091 loff_t pos = *ppos;
3092
3093 if (pos != 0)
3094 return 0;
3095
3096 down(&bus->sdsem);
3097 error = brcmf_sdio_readshared(bus, &sh);
3098 if (error < 0)
3099 goto done;
3100
3101 error = brcmf_sdio_assert_info(bus, &sh, data, count);
3102 if (error < 0)
3103 goto done;
3104
3105 nbytes = error;
3106 error = brcmf_sdio_trap_info(bus, &sh, data, count);
3107 if (error < 0)
3108 goto done;
3109
3110 error += nbytes;
3111 *ppos += error;
3112 done:
3113 up(&bus->sdsem);
3114 return error;
3115 }
3116
3117 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3118 size_t count, loff_t *ppos)
3119 {
3120 struct brcmf_sdio *bus = f->private_data;
3121 int res;
3122
3123 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
3124 if (res > 0)
3125 *ppos += res;
3126 return (ssize_t)res;
3127 }
3128
3129 static const struct file_operations brcmf_sdio_forensic_ops = {
3130 .owner = THIS_MODULE,
3131 .open = simple_open,
3132 .read = brcmf_sdio_forensic_read
3133 };
3134
3135 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3136 {
3137 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3138 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3139
3140 if (IS_ERR_OR_NULL(dentry))
3141 return;
3142
3143 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3144 &brcmf_sdio_forensic_ops);
3145 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3146 }
3147 #else
3148 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3149 {
3150 return 0;
3151 }
3152
3153 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3154 {
3155 }
3156 #endif /* DEBUG */
3157
3158 static int
3159 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3160 {
3161 int timeleft;
3162 uint rxlen = 0;
3163 bool pending;
3164 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3165 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3166 struct brcmf_sdio *bus = sdiodev->bus;
3167
3168 brcmf_dbg(TRACE, "Enter\n");
3169
3170 /* Wait until control frame is available */
3171 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3172
3173 down(&bus->sdsem);
3174 rxlen = bus->rxlen;
3175 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3176 bus->rxlen = 0;
3177 up(&bus->sdsem);
3178
3179 if (rxlen) {
3180 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3181 rxlen, msglen);
3182 } else if (timeleft == 0) {
3183 brcmf_dbg(ERROR, "resumed on timeout\n");
3184 brcmf_sdbrcm_checkdied(bus);
3185 } else if (pending) {
3186 brcmf_dbg(CTL, "cancelled\n");
3187 return -ERESTARTSYS;
3188 } else {
3189 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3190 brcmf_sdbrcm_checkdied(bus);
3191 }
3192
3193 if (rxlen)
3194 bus->sdcnt.rx_ctlpkts++;
3195 else
3196 bus->sdcnt.rx_ctlerrs++;
3197
3198 return rxlen ? (int)rxlen : -ETIMEDOUT;
3199 }
3200
3201 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3202 {
3203 int bcmerror = 0;
3204 u32 varaddr;
3205 u32 varsizew;
3206 __le32 varsizew_le;
3207 #ifdef DEBUG
3208 char *nvram_ularray;
3209 #endif /* DEBUG */
3210
3211 /* Even if there are no vars are to be written, we still
3212 need to set the ramsize. */
3213 varaddr = (bus->ramsize - 4) - bus->varsz;
3214
3215 if (bus->vars) {
3216 /* Write the vars list */
3217 bcmerror = brcmf_sdbrcm_membytes(bus, true, varaddr,
3218 bus->vars, bus->varsz);
3219 #ifdef DEBUG
3220 /* Verify NVRAM bytes */
3221 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n",
3222 bus->varsz);
3223 nvram_ularray = kmalloc(bus->varsz, GFP_ATOMIC);
3224 if (!nvram_ularray)
3225 return -ENOMEM;
3226
3227 /* Upload image to verify downloaded contents. */
3228 memset(nvram_ularray, 0xaa, bus->varsz);
3229
3230 /* Read the vars list to temp buffer for comparison */
3231 bcmerror = brcmf_sdbrcm_membytes(bus, false, varaddr,
3232 nvram_ularray, bus->varsz);
3233 if (bcmerror) {
3234 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3235 bcmerror, bus->varsz, varaddr);
3236 }
3237 /* Compare the org NVRAM with the one read from RAM */
3238 if (memcmp(bus->vars, nvram_ularray, bus->varsz))
3239 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3240 else
3241 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3242
3243 kfree(nvram_ularray);
3244 #endif /* DEBUG */
3245 }
3246
3247 /* adjust to the user specified RAM */
3248 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3249 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3250 varaddr, bus->varsz);
3251
3252 /*
3253 * Determine the length token:
3254 * Varsize, converted to words, in lower 16-bits, checksum
3255 * in upper 16-bits.
3256 */
3257 if (bcmerror) {
3258 varsizew = 0;
3259 varsizew_le = cpu_to_le32(0);
3260 } else {
3261 varsizew = bus->varsz / 4;
3262 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3263 varsizew_le = cpu_to_le32(varsizew);
3264 }
3265
3266 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3267 bus->varsz, varsizew);
3268
3269 /* Write the length token to the last word */
3270 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3271 (u8 *)&varsizew_le, 4);
3272
3273 return bcmerror;
3274 }
3275
3276 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3277 {
3278 int bcmerror = 0;
3279 struct chip_info *ci = bus->ci;
3280
3281 /* To enter download state, disable ARM and reset SOCRAM.
3282 * To exit download state, simply reset ARM (default is RAM boot).
3283 */
3284 if (enter) {
3285 bus->alp_only = true;
3286
3287 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3288
3289 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3290
3291 /* Clear the top bit of memory */
3292 if (bus->ramsize) {
3293 u32 zeros = 0;
3294 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3295 (u8 *)&zeros, 4);
3296 }
3297 } else {
3298 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3299 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3300 bcmerror = -EBADE;
3301 goto fail;
3302 }
3303
3304 bcmerror = brcmf_sdbrcm_write_vars(bus);
3305 if (bcmerror) {
3306 brcmf_dbg(ERROR, "no vars written to RAM\n");
3307 bcmerror = 0;
3308 }
3309
3310 w_sdreg32(bus, 0xFFFFFFFF,
3311 offsetof(struct sdpcmd_regs, intstatus));
3312
3313 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3314
3315 /* Allow HT Clock now that the ARM is running. */
3316 bus->alp_only = false;
3317
3318 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3319 }
3320 fail:
3321 return bcmerror;
3322 }
3323
3324 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3325 {
3326 if (bus->firmware->size < bus->fw_ptr + len)
3327 len = bus->firmware->size - bus->fw_ptr;
3328
3329 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3330 bus->fw_ptr += len;
3331 return len;
3332 }
3333
3334 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3335 {
3336 int offset = 0;
3337 uint len;
3338 u8 *memblock = NULL, *memptr;
3339 int ret;
3340
3341 brcmf_dbg(INFO, "Enter\n");
3342
3343 ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME,
3344 &bus->sdiodev->func[2]->dev);
3345 if (ret) {
3346 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3347 return ret;
3348 }
3349 bus->fw_ptr = 0;
3350
3351 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3352 if (memblock == NULL) {
3353 ret = -ENOMEM;
3354 goto err;
3355 }
3356 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3357 memptr += (BRCMF_SDALIGN -
3358 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3359
3360 /* Download image */
3361 while ((len =
3362 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3363 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3364 if (ret) {
3365 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3366 ret, MEMBLOCK, offset);
3367 goto err;
3368 }
3369
3370 offset += MEMBLOCK;
3371 }
3372
3373 err:
3374 kfree(memblock);
3375
3376 release_firmware(bus->firmware);
3377 bus->fw_ptr = 0;
3378
3379 return ret;
3380 }
3381
3382 /*
3383 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3384 * and ending in a NUL.
3385 * Removes carriage returns, empty lines, comment lines, and converts
3386 * newlines to NULs.
3387 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3388 * by two NULs.
3389 */
3390
3391 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus)
3392 {
3393 char *varbuf;
3394 char *dp;
3395 bool findNewline;
3396 int column;
3397 int ret = 0;
3398 uint buf_len, n, len;
3399
3400 len = bus->firmware->size;
3401 varbuf = vmalloc(len);
3402 if (!varbuf)
3403 return -ENOMEM;
3404
3405 memcpy(varbuf, bus->firmware->data, len);
3406 dp = varbuf;
3407
3408 findNewline = false;
3409 column = 0;
3410
3411 for (n = 0; n < len; n++) {
3412 if (varbuf[n] == 0)
3413 break;
3414 if (varbuf[n] == '\r')
3415 continue;
3416 if (findNewline && varbuf[n] != '\n')
3417 continue;
3418 findNewline = false;
3419 if (varbuf[n] == '#') {
3420 findNewline = true;
3421 continue;
3422 }
3423 if (varbuf[n] == '\n') {
3424 if (column == 0)
3425 continue;
3426 *dp++ = 0;
3427 column = 0;
3428 continue;
3429 }
3430 *dp++ = varbuf[n];
3431 column++;
3432 }
3433 buf_len = dp - varbuf;
3434 while (dp < varbuf + n)
3435 *dp++ = 0;
3436
3437 kfree(bus->vars);
3438 /* roundup needed for download to device */
3439 bus->varsz = roundup(buf_len + 1, 4);
3440 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3441 if (bus->vars == NULL) {
3442 bus->varsz = 0;
3443 ret = -ENOMEM;
3444 goto err;
3445 }
3446
3447 /* copy the processed variables and add null termination */
3448 memcpy(bus->vars, varbuf, buf_len);
3449 bus->vars[buf_len] = 0;
3450 err:
3451 vfree(varbuf);
3452 return ret;
3453 }
3454
3455 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3456 {
3457 int ret;
3458
3459 if (bus->sdiodev->bus_if->drvr_up)
3460 return -EISCONN;
3461
3462 ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME,
3463 &bus->sdiodev->func[2]->dev);
3464 if (ret) {
3465 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3466 return ret;
3467 }
3468
3469 ret = brcmf_process_nvram_vars(bus);
3470
3471 release_firmware(bus->firmware);
3472
3473 return ret;
3474 }
3475
3476 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3477 {
3478 int bcmerror = -1;
3479
3480 /* Keep arm in reset */
3481 if (brcmf_sdbrcm_download_state(bus, true)) {
3482 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3483 goto err;
3484 }
3485
3486 /* External image takes precedence if specified */
3487 if (brcmf_sdbrcm_download_code_file(bus)) {
3488 brcmf_dbg(ERROR, "dongle image file download failed\n");
3489 goto err;
3490 }
3491
3492 /* External nvram takes precedence if specified */
3493 if (brcmf_sdbrcm_download_nvram(bus))
3494 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3495
3496 /* Take arm out of reset */
3497 if (brcmf_sdbrcm_download_state(bus, false)) {
3498 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3499 goto err;
3500 }
3501
3502 bcmerror = 0;
3503
3504 err:
3505 return bcmerror;
3506 }
3507
3508 static bool
3509 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3510 {
3511 bool ret;
3512
3513 /* Download the firmware */
3514 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3515
3516 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3517
3518 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3519
3520 return ret;
3521 }
3522
3523 static int brcmf_sdbrcm_bus_init(struct device *dev)
3524 {
3525 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3526 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3527 struct brcmf_sdio *bus = sdiodev->bus;
3528 unsigned long timeout;
3529 u8 ready, enable;
3530 int err, ret = 0;
3531 u8 saveclk;
3532
3533 brcmf_dbg(TRACE, "Enter\n");
3534
3535 /* try to download image and nvram to the dongle */
3536 if (bus_if->state == BRCMF_BUS_DOWN) {
3537 if (!(brcmf_sdbrcm_download_firmware(bus)))
3538 return -1;
3539 }
3540
3541 if (!bus->sdiodev->bus_if->drvr)
3542 return 0;
3543
3544 /* Start the watchdog timer */
3545 bus->sdcnt.tickcnt = 0;
3546 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3547
3548 down(&bus->sdsem);
3549
3550 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3551 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3552 if (bus->clkstate != CLK_AVAIL)
3553 goto exit;
3554
3555 /* Force clocks on backplane to be sure F2 interrupt propagates */
3556 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3557 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3558 if (!err) {
3559 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3560 (saveclk | SBSDIO_FORCE_HT), &err);
3561 }
3562 if (err) {
3563 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3564 goto exit;
3565 }
3566
3567 /* Enable function 2 (frame transfers) */
3568 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3569 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3570 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3571
3572 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3573
3574 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3575 ready = 0;
3576 while (enable != ready) {
3577 ready = brcmf_sdio_regrb(bus->sdiodev,
3578 SDIO_CCCR_IORx, NULL);
3579 if (time_after(jiffies, timeout))
3580 break;
3581 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3582 /* prevent busy waiting if it takes too long */
3583 msleep_interruptible(20);
3584 }
3585
3586 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3587
3588 /* If F2 successfully enabled, set core and enable interrupts */
3589 if (ready == enable) {
3590 /* Set up the interrupt mask and enable interrupts */
3591 bus->hostintmask = HOSTINTMASK;
3592 w_sdreg32(bus, bus->hostintmask,
3593 offsetof(struct sdpcmd_regs, hostintmask));
3594
3595 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3596 } else {
3597 /* Disable F2 again */
3598 enable = SDIO_FUNC_ENABLE_1;
3599 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3600 ret = -ENODEV;
3601 }
3602
3603 /* Restore previous clock setting */
3604 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3605
3606 if (ret == 0) {
3607 ret = brcmf_sdio_intr_register(bus->sdiodev);
3608 if (ret != 0)
3609 brcmf_dbg(ERROR, "intr register failed:%d\n", ret);
3610 }
3611
3612 /* If we didn't come up, turn off backplane clock */
3613 if (bus_if->state != BRCMF_BUS_DATA)
3614 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3615
3616 exit:
3617 up(&bus->sdsem);
3618
3619 return ret;
3620 }
3621
3622 void brcmf_sdbrcm_isr(void *arg)
3623 {
3624 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3625
3626 brcmf_dbg(TRACE, "Enter\n");
3627
3628 if (!bus) {
3629 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3630 return;
3631 }
3632
3633 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3634 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3635 return;
3636 }
3637 /* Count the interrupt call */
3638 bus->sdcnt.intrcount++;
3639 atomic_set(&bus->ipend, 1);
3640
3641 /* Disable additional interrupts (is this needed now)? */
3642 if (!bus->intr)
3643 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3644
3645 brcmf_sdbrcm_adddpctsk(bus);
3646 queue_work(bus->brcmf_wq, &bus->datawork);
3647 }
3648
3649 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3650 {
3651 #ifdef DEBUG
3652 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3653 #endif /* DEBUG */
3654 unsigned long flags;
3655
3656 brcmf_dbg(TIMER, "Enter\n");
3657
3658 down(&bus->sdsem);
3659
3660 /* Poll period: check device if appropriate. */
3661 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3662 u32 intstatus = 0;
3663
3664 /* Reset poll tick */
3665 bus->polltick = 0;
3666
3667 /* Check device if no interrupts */
3668 if (!bus->intr ||
3669 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3670
3671 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3672 if (list_empty(&bus->dpc_tsklst)) {
3673 u8 devpend;
3674 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3675 flags);
3676 devpend = brcmf_sdio_regrb(bus->sdiodev,
3677 SDIO_CCCR_INTx,
3678 NULL);
3679 intstatus =
3680 devpend & (INTR_STATUS_FUNC1 |
3681 INTR_STATUS_FUNC2);
3682 } else {
3683 spin_unlock_irqrestore(&bus->dpc_tl_lock,
3684 flags);
3685 }
3686
3687 /* If there is something, make like the ISR and
3688 schedule the DPC */
3689 if (intstatus) {
3690 bus->sdcnt.pollcnt++;
3691 atomic_set(&bus->ipend, 1);
3692
3693 brcmf_sdbrcm_adddpctsk(bus);
3694 queue_work(bus->brcmf_wq, &bus->datawork);
3695 }
3696 }
3697
3698 /* Update interrupt tracking */
3699 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3700 }
3701 #ifdef DEBUG
3702 /* Poll for console output periodically */
3703 if (bus_if->state == BRCMF_BUS_DATA &&
3704 bus->console_interval != 0) {
3705 bus->console.count += BRCMF_WD_POLL_MS;
3706 if (bus->console.count >= bus->console_interval) {
3707 bus->console.count -= bus->console_interval;
3708 /* Make sure backplane clock is on */
3709 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3710 if (brcmf_sdbrcm_readconsole(bus) < 0)
3711 /* stop on error */
3712 bus->console_interval = 0;
3713 }
3714 }
3715 #endif /* DEBUG */
3716
3717 /* On idle timeout clear activity flag and/or turn off clock */
3718 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3719 if (++bus->idlecount >= bus->idletime) {
3720 bus->idlecount = 0;
3721 if (bus->activity) {
3722 bus->activity = false;
3723 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3724 } else {
3725 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3726 }
3727 }
3728 }
3729
3730 up(&bus->sdsem);
3731
3732 return (atomic_read(&bus->ipend) > 0);
3733 }
3734
3735 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3736 {
3737 if (chipid == BCM43241_CHIP_ID)
3738 return true;
3739 if (chipid == BCM4329_CHIP_ID)
3740 return true;
3741 if (chipid == BCM4330_CHIP_ID)
3742 return true;
3743 if (chipid == BCM4334_CHIP_ID)
3744 return true;
3745 return false;
3746 }
3747
3748 static void brcmf_sdio_dataworker(struct work_struct *work)
3749 {
3750 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3751 datawork);
3752 struct list_head *cur_hd, *tmp_hd;
3753 unsigned long flags;
3754
3755 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3756 list_for_each_safe(cur_hd, tmp_hd, &bus->dpc_tsklst) {
3757 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3758
3759 brcmf_sdbrcm_dpc(bus);
3760
3761 spin_lock_irqsave(&bus->dpc_tl_lock, flags);
3762 list_del(cur_hd);
3763 kfree(cur_hd);
3764 }
3765 spin_unlock_irqrestore(&bus->dpc_tl_lock, flags);
3766 }
3767
3768 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3769 {
3770 brcmf_dbg(TRACE, "Enter\n");
3771
3772 kfree(bus->rxbuf);
3773 bus->rxctl = bus->rxbuf = NULL;
3774 bus->rxlen = 0;
3775
3776 kfree(bus->databuf);
3777 bus->databuf = NULL;
3778 }
3779
3780 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3781 {
3782 brcmf_dbg(TRACE, "Enter\n");
3783
3784 if (bus->sdiodev->bus_if->maxctl) {
3785 bus->rxblen =
3786 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3787 ALIGNMENT) + BRCMF_SDALIGN;
3788 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3789 if (!(bus->rxbuf))
3790 goto fail;
3791 }
3792
3793 /* Allocate buffer to receive glomed packet */
3794 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3795 if (!(bus->databuf)) {
3796 /* release rxbuf which was already located as above */
3797 if (!bus->rxblen)
3798 kfree(bus->rxbuf);
3799 goto fail;
3800 }
3801
3802 /* Align the buffer */
3803 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3804 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3805 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3806 else
3807 bus->dataptr = bus->databuf;
3808
3809 return true;
3810
3811 fail:
3812 return false;
3813 }
3814
3815 static bool
3816 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3817 {
3818 u8 clkctl = 0;
3819 int err = 0;
3820 int reg_addr;
3821 u32 reg_val;
3822 u8 idx;
3823
3824 bus->alp_only = true;
3825
3826 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3827 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3828
3829 /*
3830 * Force PLL off until brcmf_sdio_chip_attach()
3831 * programs PLL control regs
3832 */
3833
3834 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3835 BRCMF_INIT_CLKCTL1, &err);
3836 if (!err)
3837 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3838 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3839
3840 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3841 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3842 err, BRCMF_INIT_CLKCTL1, clkctl);
3843 goto fail;
3844 }
3845
3846 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3847 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3848 goto fail;
3849 }
3850
3851 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3852 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3853 goto fail;
3854 }
3855
3856 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3857 SDIO_DRIVE_STRENGTH);
3858
3859 /* Get info on the SOCRAM cores... */
3860 bus->ramsize = bus->ci->ramsize;
3861 if (!(bus->ramsize)) {
3862 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3863 goto fail;
3864 }
3865
3866 /* Set core control so an SDIO reset does a backplane reset */
3867 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3868 reg_addr = bus->ci->c_inf[idx].base +
3869 offsetof(struct sdpcmd_regs, corecontrol);
3870 reg_val = brcmf_sdio_regrl(bus->sdiodev, reg_addr, NULL);
3871 brcmf_sdio_regwl(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN, NULL);
3872
3873 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3874
3875 /* Locate an appropriately-aligned portion of hdrbuf */
3876 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3877 BRCMF_SDALIGN);
3878
3879 /* Set the poll and/or interrupt flags */
3880 bus->intr = true;
3881 bus->poll = false;
3882 if (bus->poll)
3883 bus->pollrate = 1;
3884
3885 return true;
3886
3887 fail:
3888 return false;
3889 }
3890
3891 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3892 {
3893 brcmf_dbg(TRACE, "Enter\n");
3894
3895 /* Disable F2 to clear any intermediate frame state on the dongle */
3896 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3897 SDIO_FUNC_ENABLE_1, NULL);
3898
3899 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3900 bus->rxflow = false;
3901
3902 /* Done with backplane-dependent accesses, can drop clock... */
3903 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3904
3905 /* ...and initialize clock/power states */
3906 bus->clkstate = CLK_SDONLY;
3907 bus->idletime = BRCMF_IDLE_INTERVAL;
3908 bus->idleclock = BRCMF_IDLE_ACTIVE;
3909
3910 /* Query the F2 block size, set roundup accordingly */
3911 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3912 bus->roundup = min(max_roundup, bus->blocksize);
3913
3914 /* bus module does not support packet chaining */
3915 bus->use_rxchain = false;
3916 bus->sd_rxchain = false;
3917
3918 return true;
3919 }
3920
3921 static int
3922 brcmf_sdbrcm_watchdog_thread(void *data)
3923 {
3924 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3925
3926 allow_signal(SIGTERM);
3927 /* Run until signal received */
3928 while (1) {
3929 if (kthread_should_stop())
3930 break;
3931 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3932 brcmf_sdbrcm_bus_watchdog(bus);
3933 /* Count the tick for reference */
3934 bus->sdcnt.tickcnt++;
3935 } else
3936 break;
3937 }
3938 return 0;
3939 }
3940
3941 static void
3942 brcmf_sdbrcm_watchdog(unsigned long data)
3943 {
3944 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3945
3946 if (bus->watchdog_tsk) {
3947 complete(&bus->watchdog_wait);
3948 /* Reschedule the watchdog */
3949 if (bus->wd_timer_valid)
3950 mod_timer(&bus->timer,
3951 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3952 }
3953 }
3954
3955 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3956 {
3957 brcmf_dbg(TRACE, "Enter\n");
3958
3959 if (bus->ci) {
3960 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3961 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3962 brcmf_sdio_chip_detach(&bus->ci);
3963 if (bus->vars && bus->varsz)
3964 kfree(bus->vars);
3965 bus->vars = NULL;
3966 }
3967
3968 brcmf_dbg(TRACE, "Disconnected\n");
3969 }
3970
3971 /* Detach and free everything */
3972 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3973 {
3974 brcmf_dbg(TRACE, "Enter\n");
3975
3976 if (bus) {
3977 /* De-register interrupt handler */
3978 brcmf_sdio_intr_unregister(bus->sdiodev);
3979
3980 cancel_work_sync(&bus->datawork);
3981 destroy_workqueue(bus->brcmf_wq);
3982
3983 if (bus->sdiodev->bus_if->drvr) {
3984 brcmf_detach(bus->sdiodev->dev);
3985 brcmf_sdbrcm_release_dongle(bus);
3986 }
3987
3988 brcmf_sdbrcm_release_malloc(bus);
3989
3990 kfree(bus);
3991 }
3992
3993 brcmf_dbg(TRACE, "Disconnected\n");
3994 }
3995
3996 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3997 {
3998 int ret;
3999 struct brcmf_sdio *bus;
4000 struct brcmf_bus_dcmd *dlst;
4001 u32 dngl_txglom;
4002 u32 dngl_txglomalign;
4003 u8 idx;
4004
4005 brcmf_dbg(TRACE, "Enter\n");
4006
4007 /* We make an assumption about address window mappings:
4008 * regsva == SI_ENUM_BASE*/
4009
4010 /* Allocate private bus interface state */
4011 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4012 if (!bus)
4013 goto fail;
4014
4015 bus->sdiodev = sdiodev;
4016 sdiodev->bus = bus;
4017 skb_queue_head_init(&bus->glom);
4018 bus->txbound = BRCMF_TXBOUND;
4019 bus->rxbound = BRCMF_RXBOUND;
4020 bus->txminmax = BRCMF_TXMINMAX;
4021 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
4022 bus->usebufpool = false; /* Use bufpool if allocated,
4023 else use locally malloced rxbuf */
4024
4025 /* attempt to attach to the dongle */
4026 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
4027 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
4028 goto fail;
4029 }
4030
4031 spin_lock_init(&bus->txqlock);
4032 init_waitqueue_head(&bus->ctrl_wait);
4033 init_waitqueue_head(&bus->dcmd_resp_wait);
4034
4035 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
4036 if (bus->brcmf_wq == NULL) {
4037 brcmf_dbg(ERROR, "insufficient memory to create txworkqueue\n");
4038 goto fail;
4039 }
4040 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4041
4042 /* Set up the watchdog timer */
4043 init_timer(&bus->timer);
4044 bus->timer.data = (unsigned long)bus;
4045 bus->timer.function = brcmf_sdbrcm_watchdog;
4046
4047 /* Initialize thread based operation and lock */
4048 sema_init(&bus->sdsem, 1);
4049
4050 /* Initialize watchdog thread */
4051 init_completion(&bus->watchdog_wait);
4052 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
4053 bus, "brcmf_watchdog");
4054 if (IS_ERR(bus->watchdog_tsk)) {
4055 pr_warn("brcmf_watchdog thread failed to start\n");
4056 bus->watchdog_tsk = NULL;
4057 }
4058 /* Initialize DPC thread */
4059 INIT_LIST_HEAD(&bus->dpc_tsklst);
4060 spin_lock_init(&bus->dpc_tl_lock);
4061
4062 /* Assign bus interface call back */
4063 bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop;
4064 bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init;
4065 bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata;
4066 bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl;
4067 bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl;
4068 /* Attach to the brcmf/OS/network interface */
4069 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
4070 if (ret != 0) {
4071 brcmf_dbg(ERROR, "brcmf_attach failed\n");
4072 goto fail;
4073 }
4074
4075 /* Allocate buffers */
4076 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
4077 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
4078 goto fail;
4079 }
4080
4081 if (!(brcmf_sdbrcm_probe_init(bus))) {
4082 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
4083 goto fail;
4084 }
4085
4086 brcmf_sdio_debugfs_create(bus);
4087 brcmf_dbg(INFO, "completed!!\n");
4088
4089 /* sdio bus core specific dcmd */
4090 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
4091 dlst = kzalloc(sizeof(struct brcmf_bus_dcmd), GFP_KERNEL);
4092 if (dlst) {
4093 if (bus->ci->c_inf[idx].rev < 12) {
4094 /* for sdio core rev < 12, disable txgloming */
4095 dngl_txglom = 0;
4096 dlst->name = "bus:txglom";
4097 dlst->param = (char *)&dngl_txglom;
4098 dlst->param_len = sizeof(u32);
4099 } else {
4100 /* otherwise, set txglomalign */
4101 dngl_txglomalign = bus->sdiodev->bus_if->align;
4102 dlst->name = "bus:txglomalign";
4103 dlst->param = (char *)&dngl_txglomalign;
4104 dlst->param_len = sizeof(u32);
4105 }
4106 list_add(&dlst->list, &bus->sdiodev->bus_if->dcmd_list);
4107 }
4108
4109 /* if firmware path present try to download and bring up bus */
4110 ret = brcmf_bus_start(bus->sdiodev->dev);
4111 if (ret != 0) {
4112 if (ret == -ENOLINK) {
4113 brcmf_dbg(ERROR, "dongle is not responding\n");
4114 goto fail;
4115 }
4116 }
4117
4118 return bus;
4119
4120 fail:
4121 brcmf_sdbrcm_release(bus);
4122 return NULL;
4123 }
4124
4125 void brcmf_sdbrcm_disconnect(void *ptr)
4126 {
4127 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4128
4129 brcmf_dbg(TRACE, "Enter\n");
4130
4131 if (bus)
4132 brcmf_sdbrcm_release(bus);
4133
4134 brcmf_dbg(TRACE, "Disconnected\n");
4135 }
4136
4137 void
4138 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4139 {
4140 /* Totally stop the timer */
4141 if (!wdtick && bus->wd_timer_valid) {
4142 del_timer_sync(&bus->timer);
4143 bus->wd_timer_valid = false;
4144 bus->save_ms = wdtick;
4145 return;
4146 }
4147
4148 /* don't start the wd until fw is loaded */
4149 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4150 return;
4151
4152 if (wdtick) {
4153 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4154 if (bus->wd_timer_valid)
4155 /* Stop timer and restart at new value */
4156 del_timer_sync(&bus->timer);
4157
4158 /* Create timer again when watchdog period is
4159 dynamically changed or in the first instance
4160 */
4161 bus->timer.expires =
4162 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4163 add_timer(&bus->timer);
4164
4165 } else {
4166 /* Re arm the timer, at last watchdog period */
4167 mod_timer(&bus->timer,
4168 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4169 }
4170
4171 bus->wd_timer_valid = true;
4172 bus->save_ms = wdtick;
4173 }
4174 }
Linux kernel - Deliverables
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