2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/types.h>
20 #include <linux/kernel.h>
21 #include <linux/kthread.h>
22 #include <linux/printk.h>
23 #include <linux/pci_ids.h>
24 #include <linux/netdevice.h>
25 #include <linux/interrupt.h>
26 #include <linux/sched.h>
27 #include <linux/mmc/sdio.h>
28 #include <linux/mmc/sdio_func.h>
29 #include <linux/mmc/card.h>
30 #include <linux/semaphore.h>
31 #include <linux/firmware.h>
32 #include <linux/module.h>
33 #include <linux/bcma/bcma.h>
34 #include <linux/debugfs.h>
35 #include <linux/vmalloc.h>
36 #include <asm/unaligned.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
42 #include "sdio_host.h"
43 #include "sdio_chip.h"
45 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
49 #define BRCMF_TRAP_INFO_SIZE 80
51 #define CBUF_LEN (128)
53 /* Device console log buffer state */
54 #define CONSOLE_BUFFER_MAX 2024
57 __le32 buf
; /* Can't be pointer on (64-bit) hosts */
60 char *_buf_compat
; /* Redundant pointer for backward compat. */
65 * When there is no UART (e.g. Quickturn),
66 * the host should write a complete
67 * input line directly into cbuf and then write
68 * the length into vcons_in.
69 * This may also be used when there is a real UART
70 * (at risk of conflicting with
71 * the real UART). vcons_out is currently unused.
76 /* Output (logging) buffer
77 * Console output is written to a ring buffer log_buf at index log_idx.
78 * The host may read the output when it sees log_idx advance.
79 * Output will be lost if the output wraps around faster than the host
82 struct rte_log_le log_le
;
84 /* Console input line buffer
85 * Characters are read one at a time into cbuf
86 * until <CR> is received, then
87 * the buffer is processed as a command line.
88 * Also used for virtual UART.
95 #include <chipcommon.h>
100 #define TXQLEN 2048 /* bulk tx queue length */
101 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
102 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
105 #define TXRETRIES 2 /* # of retries for tx frames */
107 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
110 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
113 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
115 #define MEMBLOCK 2048 /* Block size used for downloading
117 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
118 biggest possible glom */
120 #define BRCMF_FIRSTREAD (1 << 6)
123 /* SBSDIO_DEVICE_CTL */
125 /* 1: device will assert busy signal when receiving CMD53 */
126 #define SBSDIO_DEVCTL_SETBUSY 0x01
127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
130 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
132 * sdio bus power cycle to clear (rev 9) */
133 #define SBSDIO_DEVCTL_PADS_ISO 0x08
134 /* Force SD->SB reset mapping (rev 11) */
135 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
136 /* Determined by CoreControl bit */
137 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
138 /* Force backplane reset */
139 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
140 /* Force no backplane reset */
141 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
143 /* direct(mapped) cis space */
145 /* MAPPED common CIS address */
146 #define SBSDIO_CIS_BASE_COMMON 0x1000
147 /* maximum bytes in one CIS */
148 #define SBSDIO_CIS_SIZE_LIMIT 0x200
149 /* cis offset addr is < 17 bits */
150 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
152 /* manfid tuple length, include tuple, link bytes */
153 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
156 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
157 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
158 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
159 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
160 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
161 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
162 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
163 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
164 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
165 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
166 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
167 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
168 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
169 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
170 #define I_PC (1 << 10) /* descriptor error */
171 #define I_PD (1 << 11) /* data error */
172 #define I_DE (1 << 12) /* Descriptor protocol Error */
173 #define I_RU (1 << 13) /* Receive descriptor Underflow */
174 #define I_RO (1 << 14) /* Receive fifo Overflow */
175 #define I_XU (1 << 15) /* Transmit fifo Underflow */
176 #define I_RI (1 << 16) /* Receive Interrupt */
177 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
178 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
179 #define I_XI (1 << 24) /* Transmit Interrupt */
180 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
181 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
182 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
183 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
184 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
185 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
186 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
187 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
188 #define I_DMA (I_RI | I_XI | I_ERRORS)
191 #define CC_CISRDY (1 << 0) /* CIS Ready */
192 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
193 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
194 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
195 #define CC_XMTDATAAVAIL_MODE (1 << 4)
196 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
199 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
200 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
201 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
202 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
205 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
207 /* Total length of frame header for dongle protocol */
208 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
209 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
212 * Software allocation of To SB Mailbox resources
215 /* tosbmailbox bits corresponding to intstatus bits */
216 #define SMB_NAK (1 << 0) /* Frame NAK */
217 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
218 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
219 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
221 /* tosbmailboxdata */
222 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
225 * Software allocation of To Host Mailbox resources
229 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
230 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
231 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
232 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
234 /* tohostmailboxdata */
235 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
236 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
237 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
238 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
240 #define HMB_DATA_FCDATA_MASK 0xff000000
241 #define HMB_DATA_FCDATA_SHIFT 24
243 #define HMB_DATA_VERSION_MASK 0x00ff0000
244 #define HMB_DATA_VERSION_SHIFT 16
247 * Software-defined protocol header
250 /* Current protocol version */
251 #define SDPCM_PROT_VERSION 4
253 /* SW frame header */
254 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
256 #define SDPCM_CHANNEL_MASK 0x00000f00
257 #define SDPCM_CHANNEL_SHIFT 8
258 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
260 #define SDPCM_NEXTLEN_OFFSET 2
262 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
263 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
264 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
265 #define SDPCM_DOFFSET_MASK 0xff000000
266 #define SDPCM_DOFFSET_SHIFT 24
267 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
268 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
269 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
270 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
272 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
274 /* logical channel numbers */
275 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
276 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
277 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
278 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
279 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
281 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
283 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
286 * Shared structure between dongle and the host.
287 * The structure contains pointers to trap or assert information.
289 #define SDPCM_SHARED_VERSION 0x0003
290 #define SDPCM_SHARED_VERSION_MASK 0x00FF
291 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
292 #define SDPCM_SHARED_ASSERT 0x0200
293 #define SDPCM_SHARED_TRAP 0x0400
295 /* Space for header read, limit for data packets */
296 #define MAX_HDR_READ (1 << 6)
297 #define MAX_RX_DATASZ 2048
299 /* Maximum milliseconds to wait for F2 to come up */
300 #define BRCMF_WAIT_F2RDY 3000
302 /* Bump up limit on waiting for HT to account for first startup;
303 * if the image is doing a CRC calculation before programming the PMU
304 * for HT availability, it could take a couple hundred ms more, so
305 * max out at a 1 second (1000000us).
307 #undef PMU_MAX_TRANSITION_DLY
308 #define PMU_MAX_TRANSITION_DLY 1000000
310 /* Value for ChipClockCSR during initial setup */
311 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
312 SBSDIO_ALP_AVAIL_REQ)
314 /* Flags for SDH calls */
315 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
317 #define BRCMF_SDIO_FW_NAME "brcm/brcmfmac-sdio.bin"
318 #define BRCMF_SDIO_NV_NAME "brcm/brcmfmac-sdio.txt"
319 MODULE_FIRMWARE(BRCMF_SDIO_FW_NAME
);
320 MODULE_FIRMWARE(BRCMF_SDIO_NV_NAME
);
322 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
323 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
326 #define BRCMF_IDLE_INTERVAL 1
329 * Conversion of 802.1D priority to precedence level
331 static uint
prio2prec(u32 prio
)
333 return (prio
== PRIO_8021D_NONE
|| prio
== PRIO_8021D_BE
) ?
339 u32 corecontrol
; /* 0x00, rev8 */
340 u32 corestatus
; /* rev8 */
342 u32 biststatus
; /* rev8 */
345 u16 pcmciamesportaladdr
; /* 0x010, rev8 */
347 u16 pcmciamesportalmask
; /* rev8 */
349 u16 pcmciawrframebc
; /* rev8 */
351 u16 pcmciaunderflowtimer
; /* rev8 */
355 u32 intstatus
; /* 0x020, rev8 */
356 u32 hostintmask
; /* rev8 */
357 u32 intmask
; /* rev8 */
358 u32 sbintstatus
; /* rev8 */
359 u32 sbintmask
; /* rev8 */
360 u32 funcintmask
; /* rev4 */
362 u32 tosbmailbox
; /* 0x040, rev8 */
363 u32 tohostmailbox
; /* rev8 */
364 u32 tosbmailboxdata
; /* rev8 */
365 u32 tohostmailboxdata
; /* rev8 */
367 /* synchronized access to registers in SDIO clock domain */
368 u32 sdioaccess
; /* 0x050, rev8 */
371 /* PCMCIA frame control */
372 u8 pcmciaframectrl
; /* 0x060, rev8 */
374 u8 pcmciawatermark
; /* rev8 */
377 /* interrupt batching control */
378 u32 intrcvlazy
; /* 0x100, rev8 */
382 u32 cmd52rd
; /* 0x110, rev8 */
383 u32 cmd52wr
; /* rev8 */
384 u32 cmd53rd
; /* rev8 */
385 u32 cmd53wr
; /* rev8 */
386 u32 abort
; /* rev8 */
387 u32 datacrcerror
; /* rev8 */
388 u32 rdoutofsync
; /* rev8 */
389 u32 wroutofsync
; /* rev8 */
390 u32 writebusy
; /* rev8 */
391 u32 readwait
; /* rev8 */
392 u32 readterm
; /* rev8 */
393 u32 writeterm
; /* rev8 */
395 u32 clockctlstatus
; /* rev8 */
398 u32 PAD
[128]; /* DMA engines */
400 /* SDIO/PCMCIA CIS region */
401 char cis
[512]; /* 0x400-0x5ff, rev6 */
403 /* PCMCIA function control registers */
404 char pcmciafcr
[256]; /* 0x600-6ff, rev6 */
407 /* PCMCIA backplane access */
408 u16 backplanecsr
; /* 0x76E, rev6 */
409 u16 backplaneaddr0
; /* rev6 */
410 u16 backplaneaddr1
; /* rev6 */
411 u16 backplaneaddr2
; /* rev6 */
412 u16 backplaneaddr3
; /* rev6 */
413 u16 backplanedata0
; /* rev6 */
414 u16 backplanedata1
; /* rev6 */
415 u16 backplanedata2
; /* rev6 */
416 u16 backplanedata3
; /* rev6 */
419 /* sprom "size" & "blank" info */
420 u16 spromstatus
; /* 0x7BE, rev2 */
427 /* Device console log buffer state */
428 struct brcmf_console
{
429 uint count
; /* Poll interval msec counter */
430 uint log_addr
; /* Log struct address (fixed) */
431 struct rte_log_le log_le
; /* Log struct (host copy) */
432 uint bufsize
; /* Size of log buffer */
433 u8
*buf
; /* Log buffer (host copy) */
434 uint last
; /* Last buffer read index */
437 struct brcmf_trap_info
{
451 __le32 r9
; /* sb/v6 */
452 __le32 r10
; /* sl/v7 */
453 __le32 r11
; /* fp/v8 */
461 struct sdpcm_shared
{
465 u32 assert_file_addr
;
467 u32 console_addr
; /* Address of struct rte_console */
473 struct sdpcm_shared_le
{
476 __le32 assert_exp_addr
;
477 __le32 assert_file_addr
;
479 __le32 console_addr
; /* Address of struct rte_console */
480 __le32 msgtrace_addr
;
485 /* SDIO read frame info */
486 struct brcmf_sdio_read
{
495 /* misc chip info needed by some of the routines */
496 /* Private data for SDIO bus interaction */
498 struct brcmf_sdio_dev
*sdiodev
; /* sdio device handler */
499 struct chip_info
*ci
; /* Chip info struct */
500 char *vars
; /* Variables (from CIS and/or other) */
501 uint varsz
; /* Size of variables buffer */
503 u32 ramsize
; /* Size of RAM in SOCRAM (bytes) */
505 u32 hostintmask
; /* Copy of Host Interrupt Mask */
506 atomic_t intstatus
; /* Intstatus bits (events) pending */
507 atomic_t fcstate
; /* State of dongle flow-control */
509 uint blocksize
; /* Block size of SDIO transfers */
510 uint roundup
; /* Max roundup limit */
512 struct pktq txq
; /* Queue length used for flow-control */
513 u8 flowcontrol
; /* per prio flow control bitmask */
514 u8 tx_seq
; /* Transmit sequence number (next) */
515 u8 tx_max
; /* Maximum transmit sequence allowed */
517 u8 hdrbuf
[MAX_HDR_READ
+ BRCMF_SDALIGN
];
518 u8
*rxhdr
; /* Header of current rx frame (in hdrbuf) */
519 u8 rx_seq
; /* Receive sequence number (expected) */
520 struct brcmf_sdio_read cur_read
;
521 /* info of current read frame */
522 bool rxskip
; /* Skip receive (awaiting NAK ACK) */
523 bool rxpending
; /* Data frame pending in dongle */
525 uint rxbound
; /* Rx frames to read before resched */
526 uint txbound
; /* Tx frames to send before resched */
529 struct sk_buff
*glomd
; /* Packet containing glomming descriptor */
530 struct sk_buff_head glom
; /* Packet list for glommed superframe */
531 uint glomerr
; /* Glom packet read errors */
533 u8
*rxbuf
; /* Buffer for receiving control packets */
534 uint rxblen
; /* Allocated length of rxbuf */
535 u8
*rxctl
; /* Aligned pointer into rxbuf */
536 u8
*databuf
; /* Buffer for receiving big glom packet */
537 u8
*dataptr
; /* Aligned pointer into databuf */
538 uint rxlen
; /* Length of valid data in buffer */
540 u8 sdpcm_ver
; /* Bus protocol reported by dongle */
542 bool intr
; /* Use interrupts */
543 bool poll
; /* Use polling */
544 atomic_t ipend
; /* Device interrupt is pending */
545 uint spurious
; /* Count of spurious interrupts */
546 uint pollrate
; /* Ticks between device polls */
547 uint polltick
; /* Tick counter */
550 uint console_interval
;
551 struct brcmf_console console
; /* Console output polling support */
552 uint console_addr
; /* Console address from shared struct */
555 uint clkstate
; /* State of sd and backplane clock(s) */
556 bool activity
; /* Activity flag for clock down */
557 s32 idletime
; /* Control for activity timeout */
558 s32 idlecount
; /* Activity timeout counter */
559 s32 idleclock
; /* How to set bus driver when idle */
561 bool use_rxchain
; /* If brcmf should use PKT chains */
562 bool rxflow_mode
; /* Rx flow control mode */
563 bool rxflow
; /* Is rx flow control on */
564 bool alp_only
; /* Don't use HT clock (ALP only) */
568 bool ctrl_frame_stat
;
571 wait_queue_head_t ctrl_wait
;
572 wait_queue_head_t dcmd_resp_wait
;
574 struct timer_list timer
;
575 struct completion watchdog_wait
;
576 struct task_struct
*watchdog_tsk
;
580 struct workqueue_struct
*brcmf_wq
;
581 struct work_struct datawork
;
582 struct list_head dpc_tsklst
;
583 spinlock_t dpc_tl_lock
;
585 struct semaphore sdsem
;
587 const struct firmware
*firmware
;
590 bool txoff
; /* Transmit flow-controlled */
591 struct brcmf_sdio_count sdcnt
;
597 #define CLK_PENDING 2 /* Not used yet */
601 static int qcount
[NUMPRIO
];
602 static int tx_packets
[NUMPRIO
];
605 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
607 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
609 /* Retry count for register access failures */
610 static const uint retry_limit
= 2;
612 /* Limit on rounding up frames */
613 static const uint max_roundup
= 512;
617 static void pkt_align(struct sk_buff
*p
, int len
, int align
)
620 datalign
= (unsigned long)(p
->data
);
621 datalign
= roundup(datalign
, (align
)) - datalign
;
623 skb_pull(p
, datalign
);
627 /* To check if there's window offered */
628 static bool data_ok(struct brcmf_sdio
*bus
)
630 return (u8
)(bus
->tx_max
- bus
->tx_seq
) != 0 &&
631 ((u8
)(bus
->tx_max
- bus
->tx_seq
) & 0x80) == 0;
635 * Reads a register in the SDIO hardware block. This block occupies a series of
636 * adresses on the 32 bit backplane bus.
639 r_sdreg32(struct brcmf_sdio
*bus
, u32
*regvar
, u32 offset
)
641 u8 idx
= brcmf_sdio_chip_getinfidx(bus
->ci
, BCMA_CORE_SDIO_DEV
);
644 *regvar
= brcmf_sdio_regrl(bus
->sdiodev
,
645 bus
->ci
->c_inf
[idx
].base
+ offset
, &ret
);
651 w_sdreg32(struct brcmf_sdio
*bus
, u32 regval
, u32 reg_offset
)
653 u8 idx
= brcmf_sdio_chip_getinfidx(bus
->ci
, BCMA_CORE_SDIO_DEV
);
656 brcmf_sdio_regwl(bus
->sdiodev
,
657 bus
->ci
->c_inf
[idx
].base
+ reg_offset
,
663 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
665 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
667 /* Turn backplane clock on or off */
668 static int brcmf_sdbrcm_htclk(struct brcmf_sdio
*bus
, bool on
, bool pendok
)
671 u8 clkctl
, clkreq
, devctl
;
672 unsigned long timeout
;
674 brcmf_dbg(TRACE
, "Enter\n");
679 /* Request HT Avail */
681 bus
->alp_only
? SBSDIO_ALP_AVAIL_REQ
: SBSDIO_HT_AVAIL_REQ
;
683 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
686 brcmf_dbg(ERROR
, "HT Avail request error: %d\n", err
);
690 /* Check current status */
691 clkctl
= brcmf_sdio_regrb(bus
->sdiodev
,
692 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
694 brcmf_dbg(ERROR
, "HT Avail read error: %d\n", err
);
698 /* Go to pending and await interrupt if appropriate */
699 if (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
) && pendok
) {
700 /* Allow only clock-available interrupt */
701 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
702 SBSDIO_DEVICE_CTL
, &err
);
704 brcmf_dbg(ERROR
, "Devctl error setting CA: %d\n",
709 devctl
|= SBSDIO_DEVCTL_CA_INT_ONLY
;
710 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
712 brcmf_dbg(INFO
, "CLKCTL: set PENDING\n");
713 bus
->clkstate
= CLK_PENDING
;
716 } else if (bus
->clkstate
== CLK_PENDING
) {
717 /* Cancel CA-only interrupt filter */
718 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
719 SBSDIO_DEVICE_CTL
, &err
);
720 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
721 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
725 /* Otherwise, wait here (polling) for HT Avail */
727 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY
/1000);
728 while (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
)) {
729 clkctl
= brcmf_sdio_regrb(bus
->sdiodev
,
730 SBSDIO_FUNC1_CHIPCLKCSR
,
732 if (time_after(jiffies
, timeout
))
735 usleep_range(5000, 10000);
738 brcmf_dbg(ERROR
, "HT Avail request error: %d\n", err
);
741 if (!SBSDIO_CLKAV(clkctl
, bus
->alp_only
)) {
742 brcmf_dbg(ERROR
, "HT Avail timeout (%d): clkctl 0x%02x\n",
743 PMU_MAX_TRANSITION_DLY
, clkctl
);
747 /* Mark clock available */
748 bus
->clkstate
= CLK_AVAIL
;
749 brcmf_dbg(INFO
, "CLKCTL: turned ON\n");
752 if (!bus
->alp_only
) {
753 if (SBSDIO_ALPONLY(clkctl
))
754 brcmf_dbg(ERROR
, "HT Clock should be on\n");
756 #endif /* defined (DEBUG) */
758 bus
->activity
= true;
762 if (bus
->clkstate
== CLK_PENDING
) {
763 /* Cancel CA-only interrupt filter */
764 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
765 SBSDIO_DEVICE_CTL
, &err
);
766 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
767 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
771 bus
->clkstate
= CLK_SDONLY
;
772 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
774 brcmf_dbg(INFO
, "CLKCTL: turned OFF\n");
776 brcmf_dbg(ERROR
, "Failed access turning clock off: %d\n",
784 /* Change idle/active SD state */
785 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio
*bus
, bool on
)
787 brcmf_dbg(TRACE
, "Enter\n");
790 bus
->clkstate
= CLK_SDONLY
;
792 bus
->clkstate
= CLK_NONE
;
797 /* Transition SD and backplane clock readiness */
798 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio
*bus
, uint target
, bool pendok
)
801 uint oldstate
= bus
->clkstate
;
804 brcmf_dbg(TRACE
, "Enter\n");
806 /* Early exit if we're already there */
807 if (bus
->clkstate
== target
) {
808 if (target
== CLK_AVAIL
) {
809 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
810 bus
->activity
= true;
817 /* Make sure SD clock is available */
818 if (bus
->clkstate
== CLK_NONE
)
819 brcmf_sdbrcm_sdclk(bus
, true);
820 /* Now request HT Avail on the backplane */
821 brcmf_sdbrcm_htclk(bus
, true, pendok
);
822 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
823 bus
->activity
= true;
827 /* Remove HT request, or bring up SD clock */
828 if (bus
->clkstate
== CLK_NONE
)
829 brcmf_sdbrcm_sdclk(bus
, true);
830 else if (bus
->clkstate
== CLK_AVAIL
)
831 brcmf_sdbrcm_htclk(bus
, false, false);
833 brcmf_dbg(ERROR
, "request for %d -> %d\n",
834 bus
->clkstate
, target
);
835 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
839 /* Make sure to remove HT request */
840 if (bus
->clkstate
== CLK_AVAIL
)
841 brcmf_sdbrcm_htclk(bus
, false, false);
842 /* Now remove the SD clock */
843 brcmf_sdbrcm_sdclk(bus
, false);
844 brcmf_sdbrcm_wd_timer(bus
, 0);
848 brcmf_dbg(INFO
, "%d -> %d\n", oldstate
, bus
->clkstate
);
854 static u32
brcmf_sdbrcm_hostmail(struct brcmf_sdio
*bus
)
861 brcmf_dbg(TRACE
, "Enter\n");
863 /* Read mailbox data and ack that we did so */
864 ret
= r_sdreg32(bus
, &hmb_data
,
865 offsetof(struct sdpcmd_regs
, tohostmailboxdata
));
868 w_sdreg32(bus
, SMB_INT_ACK
,
869 offsetof(struct sdpcmd_regs
, tosbmailbox
));
870 bus
->sdcnt
.f1regdata
+= 2;
872 /* Dongle recomposed rx frames, accept them again */
873 if (hmb_data
& HMB_DATA_NAKHANDLED
) {
874 brcmf_dbg(INFO
, "Dongle reports NAK handled, expect rtx of %d\n",
877 brcmf_dbg(ERROR
, "unexpected NAKHANDLED!\n");
880 intstatus
|= I_HMB_FRAME_IND
;
884 * DEVREADY does not occur with gSPI.
886 if (hmb_data
& (HMB_DATA_DEVREADY
| HMB_DATA_FWREADY
)) {
888 (hmb_data
& HMB_DATA_VERSION_MASK
) >>
889 HMB_DATA_VERSION_SHIFT
;
890 if (bus
->sdpcm_ver
!= SDPCM_PROT_VERSION
)
891 brcmf_dbg(ERROR
, "Version mismatch, dongle reports %d, "
893 bus
->sdpcm_ver
, SDPCM_PROT_VERSION
);
895 brcmf_dbg(INFO
, "Dongle ready, protocol version %d\n",
900 * Flow Control has been moved into the RX headers and this out of band
901 * method isn't used any more.
902 * remaining backward compatible with older dongles.
904 if (hmb_data
& HMB_DATA_FC
) {
905 fcbits
= (hmb_data
& HMB_DATA_FCDATA_MASK
) >>
906 HMB_DATA_FCDATA_SHIFT
;
908 if (fcbits
& ~bus
->flowcontrol
)
909 bus
->sdcnt
.fc_xoff
++;
911 if (bus
->flowcontrol
& ~fcbits
)
914 bus
->sdcnt
.fc_rcvd
++;
915 bus
->flowcontrol
= fcbits
;
918 /* Shouldn't be any others */
919 if (hmb_data
& ~(HMB_DATA_DEVREADY
|
920 HMB_DATA_NAKHANDLED
|
923 HMB_DATA_FCDATA_MASK
| HMB_DATA_VERSION_MASK
))
924 brcmf_dbg(ERROR
, "Unknown mailbox data content: 0x%02x\n",
930 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio
*bus
, bool abort
, bool rtx
)
937 brcmf_dbg(ERROR
, "%sterminate frame%s\n",
938 abort
? "abort command, " : "",
939 rtx
? ", send NAK" : "");
942 brcmf_sdcard_abort(bus
->sdiodev
, SDIO_FUNC_2
);
944 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_FRAMECTRL
,
946 bus
->sdcnt
.f1regdata
++;
948 /* Wait until the packet has been flushed (device/FIFO stable) */
949 for (lastrbc
= retries
= 0xffff; retries
> 0; retries
--) {
950 hi
= brcmf_sdio_regrb(bus
->sdiodev
,
951 SBSDIO_FUNC1_RFRAMEBCHI
, &err
);
952 lo
= brcmf_sdio_regrb(bus
->sdiodev
,
953 SBSDIO_FUNC1_RFRAMEBCLO
, &err
);
954 bus
->sdcnt
.f1regdata
+= 2;
956 if ((hi
== 0) && (lo
== 0))
959 if ((hi
> (lastrbc
>> 8)) && (lo
> (lastrbc
& 0x00ff))) {
960 brcmf_dbg(ERROR
, "count growing: last 0x%04x now 0x%04x\n",
961 lastrbc
, (hi
<< 8) + lo
);
963 lastrbc
= (hi
<< 8) + lo
;
967 brcmf_dbg(ERROR
, "count never zeroed: last 0x%04x\n", lastrbc
);
969 brcmf_dbg(INFO
, "flush took %d iterations\n", 0xffff - retries
);
973 err
= w_sdreg32(bus
, SMB_NAK
,
974 offsetof(struct sdpcmd_regs
, tosbmailbox
));
976 bus
->sdcnt
.f1regdata
++;
981 /* Clear partial in any case */
982 bus
->cur_read
.len
= 0;
984 /* If we can't reach the device, signal failure */
986 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
989 /* copy a buffer into a pkt buffer chain */
990 static uint
brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio
*bus
, uint len
)
999 skb_queue_walk(&bus
->glom
, p
) {
1000 n
= min_t(uint
, p
->len
, len
);
1001 memcpy(p
->data
, buf
, n
);
1012 /* return total length of buffer chain */
1013 static uint
brcmf_sdbrcm_glom_len(struct brcmf_sdio
*bus
)
1019 skb_queue_walk(&bus
->glom
, p
)
1024 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio
*bus
)
1026 struct sk_buff
*cur
, *next
;
1028 skb_queue_walk_safe(&bus
->glom
, cur
, next
) {
1029 skb_unlink(cur
, &bus
->glom
);
1030 brcmu_pkt_buf_free_skb(cur
);
1034 static bool brcmf_sdio_hdparser(struct brcmf_sdio
*bus
, u8
*header
,
1035 struct brcmf_sdio_read
*rd
)
1038 u8 rx_seq
, fc
, tx_seq_max
;
1041 * 4 bytes hardware header (frame tag)
1042 * Byte 0~1: Frame length
1043 * Byte 2~3: Checksum, bit-wise inverse of frame length
1045 len
= get_unaligned_le16(header
);
1046 checksum
= get_unaligned_le16(header
+ sizeof(u16
));
1047 /* All zero means no more to read */
1048 if (!(len
| checksum
)) {
1049 bus
->rxpending
= false;
1052 if ((u16
)(~(len
^ checksum
))) {
1053 brcmf_dbg(ERROR
, "HW header checksum error\n");
1054 bus
->sdcnt
.rx_badhdr
++;
1055 brcmf_sdbrcm_rxfail(bus
, false, false);
1058 if (len
< SDPCM_HDRLEN
) {
1059 brcmf_dbg(ERROR
, "HW header length error\n");
1065 * 8 bytes hardware header
1066 * Byte 0: Rx sequence number
1067 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1068 * Byte 2: Length of next data frame
1069 * Byte 3: Data offset
1070 * Byte 4: Flow control bits
1071 * Byte 5: Maximum Sequence number allow for Tx
1072 * Byte 6~7: Reserved
1074 rx_seq
= SDPCM_PACKET_SEQUENCE(&header
[SDPCM_FRAMETAG_LEN
]);
1075 rd
->channel
= SDPCM_PACKET_CHANNEL(&header
[SDPCM_FRAMETAG_LEN
]);
1076 if (len
> MAX_RX_DATASZ
&& rd
->channel
!= SDPCM_CONTROL_CHANNEL
) {
1077 brcmf_dbg(ERROR
, "HW header length too long\n");
1078 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1079 bus
->sdcnt
.rx_toolong
++;
1080 brcmf_sdbrcm_rxfail(bus
, false, false);
1084 rd
->dat_offset
= SDPCM_DOFFSET_VALUE(&header
[SDPCM_FRAMETAG_LEN
]);
1085 if (rd
->dat_offset
< SDPCM_HDRLEN
|| rd
->dat_offset
> rd
->len
) {
1086 brcmf_dbg(ERROR
, "seq %d: bad data offset\n", rx_seq
);
1087 bus
->sdcnt
.rx_badhdr
++;
1088 brcmf_sdbrcm_rxfail(bus
, false, false);
1092 if (rd
->seq_num
!= rx_seq
) {
1093 brcmf_dbg(ERROR
, "seq %d: sequence number error, expect %d\n",
1094 rx_seq
, rd
->seq_num
);
1095 bus
->sdcnt
.rx_badseq
++;
1096 rd
->seq_num
= rx_seq
;
1098 rd
->len_nxtfrm
= header
[SDPCM_FRAMETAG_LEN
+ SDPCM_NEXTLEN_OFFSET
];
1099 if (rd
->len_nxtfrm
<< 4 > MAX_RX_DATASZ
) {
1100 /* only warm for NON glom packet */
1101 if (rd
->channel
!= SDPCM_GLOM_CHANNEL
)
1102 brcmf_dbg(ERROR
, "seq %d: next length error\n", rx_seq
);
1105 fc
= SDPCM_FCMASK_VALUE(&header
[SDPCM_FRAMETAG_LEN
]);
1106 if (bus
->flowcontrol
!= fc
) {
1107 if (~bus
->flowcontrol
& fc
)
1108 bus
->sdcnt
.fc_xoff
++;
1109 if (bus
->flowcontrol
& ~fc
)
1110 bus
->sdcnt
.fc_xon
++;
1111 bus
->sdcnt
.fc_rcvd
++;
1112 bus
->flowcontrol
= fc
;
1114 tx_seq_max
= SDPCM_WINDOW_VALUE(&header
[SDPCM_FRAMETAG_LEN
]);
1115 if ((u8
)(tx_seq_max
- bus
->tx_seq
) > 0x40) {
1116 brcmf_dbg(ERROR
, "seq %d: max tx seq number error\n", rx_seq
);
1117 tx_seq_max
= bus
->tx_seq
+ 2;
1119 bus
->tx_max
= tx_seq_max
;
1124 static u8
brcmf_sdbrcm_rxglom(struct brcmf_sdio
*bus
, u8 rxseq
)
1130 struct sk_buff
*pfirst
, *pnext
;
1133 u8 chan
, seq
, doff
, sfdoff
;
1137 bool usechain
= bus
->use_rxchain
;
1140 /* If packets, issue read(s) and send up packet chain */
1141 /* Return sequence numbers consumed? */
1143 brcmf_dbg(TRACE
, "start: glomd %p glom %p\n",
1144 bus
->glomd
, skb_peek(&bus
->glom
));
1146 /* If there's a descriptor, generate the packet chain */
1148 pfirst
= pnext
= NULL
;
1149 dlen
= (u16
) (bus
->glomd
->len
);
1150 dptr
= bus
->glomd
->data
;
1151 if (!dlen
|| (dlen
& 1)) {
1152 brcmf_dbg(ERROR
, "bad glomd len(%d), ignore descriptor\n",
1157 for (totlen
= num
= 0; dlen
; num
++) {
1158 /* Get (and move past) next length */
1159 sublen
= get_unaligned_le16(dptr
);
1160 dlen
-= sizeof(u16
);
1161 dptr
+= sizeof(u16
);
1162 if ((sublen
< SDPCM_HDRLEN
) ||
1163 ((num
== 0) && (sublen
< (2 * SDPCM_HDRLEN
)))) {
1164 brcmf_dbg(ERROR
, "descriptor len %d bad: %d\n",
1169 if (sublen
% BRCMF_SDALIGN
) {
1170 brcmf_dbg(ERROR
, "sublen %d not multiple of %d\n",
1171 sublen
, BRCMF_SDALIGN
);
1176 /* For last frame, adjust read len so total
1177 is a block multiple */
1180 (roundup(totlen
, bus
->blocksize
) - totlen
);
1181 totlen
= roundup(totlen
, bus
->blocksize
);
1184 /* Allocate/chain packet for next subframe */
1185 pnext
= brcmu_pkt_buf_get_skb(sublen
+ BRCMF_SDALIGN
);
1186 if (pnext
== NULL
) {
1187 brcmf_dbg(ERROR
, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1191 skb_queue_tail(&bus
->glom
, pnext
);
1193 /* Adhere to start alignment requirements */
1194 pkt_align(pnext
, sublen
, BRCMF_SDALIGN
);
1197 /* If all allocations succeeded, save packet chain
1200 brcmf_dbg(GLOM
, "allocated %d-byte packet chain for %d subframes\n",
1202 if (BRCMF_GLOM_ON() && bus
->cur_read
.len
&&
1203 totlen
!= bus
->cur_read
.len
) {
1204 brcmf_dbg(GLOM
, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1205 bus
->cur_read
.len
, totlen
, rxseq
);
1207 pfirst
= pnext
= NULL
;
1209 brcmf_sdbrcm_free_glom(bus
);
1213 /* Done with descriptor packet */
1214 brcmu_pkt_buf_free_skb(bus
->glomd
);
1216 bus
->cur_read
.len
= 0;
1219 /* Ok -- either we just generated a packet chain,
1220 or had one from before */
1221 if (!skb_queue_empty(&bus
->glom
)) {
1222 if (BRCMF_GLOM_ON()) {
1223 brcmf_dbg(GLOM
, "try superframe read, packet chain:\n");
1224 skb_queue_walk(&bus
->glom
, pnext
) {
1225 brcmf_dbg(GLOM
, " %p: %p len 0x%04x (%d)\n",
1226 pnext
, (u8
*) (pnext
->data
),
1227 pnext
->len
, pnext
->len
);
1231 pfirst
= skb_peek(&bus
->glom
);
1232 dlen
= (u16
) brcmf_sdbrcm_glom_len(bus
);
1234 /* Do an SDIO read for the superframe. Configurable iovar to
1235 * read directly into the chained packet, or allocate a large
1236 * packet and and copy into the chain.
1239 errcode
= brcmf_sdcard_recv_chain(bus
->sdiodev
,
1240 bus
->sdiodev
->sbwad
,
1241 SDIO_FUNC_2
, F2SYNC
, &bus
->glom
);
1242 } else if (bus
->dataptr
) {
1243 errcode
= brcmf_sdcard_recv_buf(bus
->sdiodev
,
1244 bus
->sdiodev
->sbwad
,
1245 SDIO_FUNC_2
, F2SYNC
,
1246 bus
->dataptr
, dlen
);
1247 sublen
= (u16
) brcmf_sdbrcm_glom_from_buf(bus
, dlen
);
1248 if (sublen
!= dlen
) {
1249 brcmf_dbg(ERROR
, "FAILED TO COPY, dlen %d sublen %d\n",
1255 brcmf_dbg(ERROR
, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1259 bus
->sdcnt
.f2rxdata
++;
1261 /* On failure, kill the superframe, allow a couple retries */
1263 brcmf_dbg(ERROR
, "glom read of %d bytes failed: %d\n",
1265 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1267 if (bus
->glomerr
++ < 3) {
1268 brcmf_sdbrcm_rxfail(bus
, true, true);
1271 brcmf_sdbrcm_rxfail(bus
, true, false);
1272 bus
->sdcnt
.rxglomfail
++;
1273 brcmf_sdbrcm_free_glom(bus
);
1278 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1279 pfirst
->data
, min_t(int, pfirst
->len
, 48),
1282 /* Validate the superframe header */
1283 dptr
= (u8
*) (pfirst
->data
);
1284 sublen
= get_unaligned_le16(dptr
);
1285 check
= get_unaligned_le16(dptr
+ sizeof(u16
));
1287 chan
= SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]);
1288 seq
= SDPCM_PACKET_SEQUENCE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1289 next_len
= dptr
[SDPCM_FRAMETAG_LEN
+ SDPCM_NEXTLEN_OFFSET
];
1290 if ((next_len
<< 4) > MAX_RX_DATASZ
) {
1291 brcmf_dbg(INFO
, "nextlen too large (%d) seq %d\n",
1295 bus
->cur_read
.len
= next_len
<< 4;
1296 doff
= SDPCM_DOFFSET_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1297 txmax
= SDPCM_WINDOW_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1300 if ((u16
)~(sublen
^ check
)) {
1301 brcmf_dbg(ERROR
, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1304 } else if (roundup(sublen
, bus
->blocksize
) != dlen
) {
1305 brcmf_dbg(ERROR
, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1306 sublen
, roundup(sublen
, bus
->blocksize
),
1309 } else if (SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]) !=
1310 SDPCM_GLOM_CHANNEL
) {
1311 brcmf_dbg(ERROR
, "(superframe): bad channel %d\n",
1312 SDPCM_PACKET_CHANNEL(
1313 &dptr
[SDPCM_FRAMETAG_LEN
]));
1315 } else if (SDPCM_GLOMDESC(&dptr
[SDPCM_FRAMETAG_LEN
])) {
1316 brcmf_dbg(ERROR
, "(superframe): got 2nd descriptor?\n");
1318 } else if ((doff
< SDPCM_HDRLEN
) ||
1319 (doff
> (pfirst
->len
- SDPCM_HDRLEN
))) {
1320 brcmf_dbg(ERROR
, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1321 doff
, sublen
, pfirst
->len
, SDPCM_HDRLEN
);
1325 /* Check sequence number of superframe SW header */
1327 brcmf_dbg(INFO
, "(superframe) rx_seq %d, expected %d\n",
1329 bus
->sdcnt
.rx_badseq
++;
1333 /* Check window for sanity */
1334 if ((u8
) (txmax
- bus
->tx_seq
) > 0x40) {
1335 brcmf_dbg(ERROR
, "unlikely tx max %d with tx_seq %d\n",
1336 txmax
, bus
->tx_seq
);
1337 txmax
= bus
->tx_seq
+ 2;
1339 bus
->tx_max
= txmax
;
1341 /* Remove superframe header, remember offset */
1342 skb_pull(pfirst
, doff
);
1346 /* Validate all the subframe headers */
1347 skb_queue_walk(&bus
->glom
, pnext
) {
1348 /* leave when invalid subframe is found */
1352 dptr
= (u8
*) (pnext
->data
);
1353 dlen
= (u16
) (pnext
->len
);
1354 sublen
= get_unaligned_le16(dptr
);
1355 check
= get_unaligned_le16(dptr
+ sizeof(u16
));
1356 chan
= SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]);
1357 doff
= SDPCM_DOFFSET_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1358 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1359 dptr
, 32, "subframe:\n");
1361 if ((u16
)~(sublen
^ check
)) {
1362 brcmf_dbg(ERROR
, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1363 num
, sublen
, check
);
1365 } else if ((sublen
> dlen
) || (sublen
< SDPCM_HDRLEN
)) {
1366 brcmf_dbg(ERROR
, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1369 } else if ((chan
!= SDPCM_DATA_CHANNEL
) &&
1370 (chan
!= SDPCM_EVENT_CHANNEL
)) {
1371 brcmf_dbg(ERROR
, "(subframe %d): bad channel %d\n",
1374 } else if ((doff
< SDPCM_HDRLEN
) || (doff
> sublen
)) {
1375 brcmf_dbg(ERROR
, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1376 num
, doff
, sublen
, SDPCM_HDRLEN
);
1379 /* increase the subframe count */
1384 /* Terminate frame on error, request
1386 if (bus
->glomerr
++ < 3) {
1387 /* Restore superframe header space */
1388 skb_push(pfirst
, sfdoff
);
1389 brcmf_sdbrcm_rxfail(bus
, true, true);
1392 brcmf_sdbrcm_rxfail(bus
, true, false);
1393 bus
->sdcnt
.rxglomfail
++;
1394 brcmf_sdbrcm_free_glom(bus
);
1396 bus
->cur_read
.len
= 0;
1400 /* Basic SD framing looks ok - process each packet (header) */
1402 skb_queue_walk_safe(&bus
->glom
, pfirst
, pnext
) {
1403 dptr
= (u8
*) (pfirst
->data
);
1404 sublen
= get_unaligned_le16(dptr
);
1405 chan
= SDPCM_PACKET_CHANNEL(&dptr
[SDPCM_FRAMETAG_LEN
]);
1406 seq
= SDPCM_PACKET_SEQUENCE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1407 doff
= SDPCM_DOFFSET_VALUE(&dptr
[SDPCM_FRAMETAG_LEN
]);
1409 brcmf_dbg(GLOM
, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1410 num
, pfirst
, pfirst
->data
,
1411 pfirst
->len
, sublen
, chan
, seq
);
1413 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1414 chan == SDPCM_EVENT_CHANNEL */
1417 brcmf_dbg(GLOM
, "rx_seq %d, expected %d\n",
1419 bus
->sdcnt
.rx_badseq
++;
1424 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1425 dptr
, dlen
, "Rx Subframe Data:\n");
1427 __skb_trim(pfirst
, sublen
);
1428 skb_pull(pfirst
, doff
);
1430 if (pfirst
->len
== 0) {
1431 skb_unlink(pfirst
, &bus
->glom
);
1432 brcmu_pkt_buf_free_skb(pfirst
);
1434 } else if (brcmf_proto_hdrpull(bus
->sdiodev
->dev
,
1435 &ifidx
, pfirst
) != 0) {
1436 brcmf_dbg(ERROR
, "rx protocol error\n");
1437 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1438 skb_unlink(pfirst
, &bus
->glom
);
1439 brcmu_pkt_buf_free_skb(pfirst
);
1443 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1445 min_t(int, pfirst
->len
, 32),
1446 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1447 bus
->glom
.qlen
, pfirst
, pfirst
->data
,
1448 pfirst
->len
, pfirst
->next
,
1451 /* sent any remaining packets up */
1452 if (bus
->glom
.qlen
) {
1454 brcmf_rx_frame(bus
->sdiodev
->dev
, ifidx
, &bus
->glom
);
1458 bus
->sdcnt
.rxglomframes
++;
1459 bus
->sdcnt
.rxglompkts
+= bus
->glom
.qlen
;
1464 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio
*bus
, uint
*condition
,
1467 DECLARE_WAITQUEUE(wait
, current
);
1468 int timeout
= msecs_to_jiffies(DCMD_RESP_TIMEOUT
);
1470 /* Wait until control frame is available */
1471 add_wait_queue(&bus
->dcmd_resp_wait
, &wait
);
1472 set_current_state(TASK_INTERRUPTIBLE
);
1474 while (!(*condition
) && (!signal_pending(current
) && timeout
))
1475 timeout
= schedule_timeout(timeout
);
1477 if (signal_pending(current
))
1480 set_current_state(TASK_RUNNING
);
1481 remove_wait_queue(&bus
->dcmd_resp_wait
, &wait
);
1486 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio
*bus
)
1488 if (waitqueue_active(&bus
->dcmd_resp_wait
))
1489 wake_up_interruptible(&bus
->dcmd_resp_wait
);
1494 brcmf_sdbrcm_read_control(struct brcmf_sdio
*bus
, u8
*hdr
, uint len
, uint doff
)
1500 brcmf_dbg(TRACE
, "Enter\n");
1502 /* Set rxctl for frame (w/optional alignment) */
1503 bus
->rxctl
= bus
->rxbuf
;
1504 bus
->rxctl
+= BRCMF_FIRSTREAD
;
1505 pad
= ((unsigned long)bus
->rxctl
% BRCMF_SDALIGN
);
1507 bus
->rxctl
+= (BRCMF_SDALIGN
- pad
);
1508 bus
->rxctl
-= BRCMF_FIRSTREAD
;
1510 /* Copy the already-read portion over */
1511 memcpy(bus
->rxctl
, hdr
, BRCMF_FIRSTREAD
);
1512 if (len
<= BRCMF_FIRSTREAD
)
1515 /* Raise rdlen to next SDIO block to avoid tail command */
1516 rdlen
= len
- BRCMF_FIRSTREAD
;
1517 if (bus
->roundup
&& bus
->blocksize
&& (rdlen
> bus
->blocksize
)) {
1518 pad
= bus
->blocksize
- (rdlen
% bus
->blocksize
);
1519 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
) &&
1520 ((len
+ pad
) < bus
->sdiodev
->bus_if
->maxctl
))
1522 } else if (rdlen
% BRCMF_SDALIGN
) {
1523 rdlen
+= BRCMF_SDALIGN
- (rdlen
% BRCMF_SDALIGN
);
1526 /* Satisfy length-alignment requirements */
1527 if (rdlen
& (ALIGNMENT
- 1))
1528 rdlen
= roundup(rdlen
, ALIGNMENT
);
1530 /* Drop if the read is too big or it exceeds our maximum */
1531 if ((rdlen
+ BRCMF_FIRSTREAD
) > bus
->sdiodev
->bus_if
->maxctl
) {
1532 brcmf_dbg(ERROR
, "%d-byte control read exceeds %d-byte buffer\n",
1533 rdlen
, bus
->sdiodev
->bus_if
->maxctl
);
1534 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1535 brcmf_sdbrcm_rxfail(bus
, false, false);
1539 if ((len
- doff
) > bus
->sdiodev
->bus_if
->maxctl
) {
1540 brcmf_dbg(ERROR
, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1541 len
, len
- doff
, bus
->sdiodev
->bus_if
->maxctl
);
1542 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1543 bus
->sdcnt
.rx_toolong
++;
1544 brcmf_sdbrcm_rxfail(bus
, false, false);
1548 /* Read remainder of frame body into the rxctl buffer */
1549 sdret
= brcmf_sdcard_recv_buf(bus
->sdiodev
,
1550 bus
->sdiodev
->sbwad
,
1552 F2SYNC
, (bus
->rxctl
+ BRCMF_FIRSTREAD
), rdlen
);
1553 bus
->sdcnt
.f2rxdata
++;
1555 /* Control frame failures need retransmission */
1557 brcmf_dbg(ERROR
, "read %d control bytes failed: %d\n",
1559 bus
->sdcnt
.rxc_errors
++;
1560 brcmf_sdbrcm_rxfail(bus
, true, true);
1566 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1567 bus
->rxctl
, len
, "RxCtrl:\n");
1569 /* Point to valid data and indicate its length */
1571 bus
->rxlen
= len
- doff
;
1574 /* Awake any waiters */
1575 brcmf_sdbrcm_dcmd_resp_wake(bus
);
1578 /* Pad read to blocksize for efficiency */
1579 static void brcmf_pad(struct brcmf_sdio
*bus
, u16
*pad
, u16
*rdlen
)
1581 if (bus
->roundup
&& bus
->blocksize
&& *rdlen
> bus
->blocksize
) {
1582 *pad
= bus
->blocksize
- (*rdlen
% bus
->blocksize
);
1583 if (*pad
<= bus
->roundup
&& *pad
< bus
->blocksize
&&
1584 *rdlen
+ *pad
+ BRCMF_FIRSTREAD
< MAX_RX_DATASZ
)
1586 } else if (*rdlen
% BRCMF_SDALIGN
) {
1587 *rdlen
+= BRCMF_SDALIGN
- (*rdlen
% BRCMF_SDALIGN
);
1591 static uint
brcmf_sdio_readframes(struct brcmf_sdio
*bus
, uint maxframes
)
1593 struct sk_buff
*pkt
; /* Packet for event or data frames */
1594 u16 pad
; /* Number of pad bytes to read */
1595 uint rxleft
= 0; /* Remaining number of frames allowed */
1596 int sdret
; /* Return code from calls */
1598 uint rxcount
= 0; /* Total frames read */
1599 struct brcmf_sdio_read
*rd
= &bus
->cur_read
, rd_new
;
1602 brcmf_dbg(TRACE
, "Enter\n");
1604 /* Not finished unless we encounter no more frames indication */
1605 bus
->rxpending
= true;
1607 for (rd
->seq_num
= bus
->rx_seq
, rxleft
= maxframes
;
1608 !bus
->rxskip
&& rxleft
&&
1609 bus
->sdiodev
->bus_if
->state
!= BRCMF_BUS_DOWN
;
1610 rd
->seq_num
++, rxleft
--) {
1612 /* Handle glomming separately */
1613 if (bus
->glomd
|| !skb_queue_empty(&bus
->glom
)) {
1615 brcmf_dbg(GLOM
, "calling rxglom: glomd %p, glom %p\n",
1616 bus
->glomd
, skb_peek(&bus
->glom
));
1617 cnt
= brcmf_sdbrcm_rxglom(bus
, rd
->seq_num
);
1618 brcmf_dbg(GLOM
, "rxglom returned %d\n", cnt
);
1619 rd
->seq_num
+= cnt
- 1;
1620 rxleft
= (rxleft
> cnt
) ? (rxleft
- cnt
) : 1;
1624 rd
->len_left
= rd
->len
;
1625 /* read header first for unknow frame length */
1627 sdret
= brcmf_sdcard_recv_buf(bus
->sdiodev
,
1628 bus
->sdiodev
->sbwad
,
1629 SDIO_FUNC_2
, F2SYNC
,
1632 bus
->sdcnt
.f2rxhdrs
++;
1634 brcmf_dbg(ERROR
, "RXHEADER FAILED: %d\n",
1636 bus
->sdcnt
.rx_hdrfail
++;
1637 brcmf_sdbrcm_rxfail(bus
, true, true);
1641 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1642 bus
->rxhdr
, SDPCM_HDRLEN
,
1645 if (!brcmf_sdio_hdparser(bus
, bus
->rxhdr
, rd
)) {
1646 if (!bus
->rxpending
)
1652 if (rd
->channel
== SDPCM_CONTROL_CHANNEL
) {
1653 brcmf_sdbrcm_read_control(bus
, bus
->rxhdr
,
1656 /* prepare the descriptor for the next read */
1657 rd
->len
= rd
->len_nxtfrm
<< 4;
1659 /* treat all packet as event if we don't know */
1660 rd
->channel
= SDPCM_EVENT_CHANNEL
;
1663 rd
->len_left
= rd
->len
> BRCMF_FIRSTREAD
?
1664 rd
->len
- BRCMF_FIRSTREAD
: 0;
1665 head_read
= BRCMF_FIRSTREAD
;
1668 brcmf_pad(bus
, &pad
, &rd
->len_left
);
1670 pkt
= brcmu_pkt_buf_get_skb(rd
->len_left
+ head_read
+
1673 /* Give up on data, request rtx of events */
1674 brcmf_dbg(ERROR
, "brcmu_pkt_buf_get_skb failed\n");
1675 bus
->sdiodev
->bus_if
->dstats
.rx_dropped
++;
1676 brcmf_sdbrcm_rxfail(bus
, false,
1677 RETRYCHAN(rd
->channel
));
1680 skb_pull(pkt
, head_read
);
1681 pkt_align(pkt
, rd
->len_left
, BRCMF_SDALIGN
);
1683 sdret
= brcmf_sdcard_recv_pkt(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
1684 SDIO_FUNC_2
, F2SYNC
, pkt
);
1685 bus
->sdcnt
.f2rxdata
++;
1688 brcmf_dbg(ERROR
, "read %d bytes from channel %d failed: %d\n",
1689 rd
->len
, rd
->channel
, sdret
);
1690 brcmu_pkt_buf_free_skb(pkt
);
1691 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1692 brcmf_sdbrcm_rxfail(bus
, true,
1693 RETRYCHAN(rd
->channel
));
1698 skb_push(pkt
, head_read
);
1699 memcpy(pkt
->data
, bus
->rxhdr
, head_read
);
1702 memcpy(bus
->rxhdr
, pkt
->data
, SDPCM_HDRLEN
);
1703 rd_new
.seq_num
= rd
->seq_num
;
1704 if (!brcmf_sdio_hdparser(bus
, bus
->rxhdr
, &rd_new
)) {
1706 brcmu_pkt_buf_free_skb(pkt
);
1708 bus
->sdcnt
.rx_readahead_cnt
++;
1709 if (rd
->len
!= roundup(rd_new
.len
, 16)) {
1710 brcmf_dbg(ERROR
, "frame length mismatch:read %d, should be %d\n",
1712 roundup(rd_new
.len
, 16) >> 4);
1714 brcmf_sdbrcm_rxfail(bus
, true, true);
1715 brcmu_pkt_buf_free_skb(pkt
);
1718 rd
->len_nxtfrm
= rd_new
.len_nxtfrm
;
1719 rd
->channel
= rd_new
.channel
;
1720 rd
->dat_offset
= rd_new
.dat_offset
;
1722 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1725 bus
->rxhdr
, SDPCM_HDRLEN
,
1728 if (rd_new
.channel
== SDPCM_CONTROL_CHANNEL
) {
1729 brcmf_dbg(ERROR
, "readahead on control packet %d?\n",
1731 /* Force retry w/normal header read */
1733 brcmf_sdbrcm_rxfail(bus
, false, true);
1734 brcmu_pkt_buf_free_skb(pkt
);
1739 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1740 pkt
->data
, rd
->len
, "Rx Data:\n");
1742 /* Save superframe descriptor and allocate packet frame */
1743 if (rd
->channel
== SDPCM_GLOM_CHANNEL
) {
1744 if (SDPCM_GLOMDESC(&bus
->rxhdr
[SDPCM_FRAMETAG_LEN
])) {
1745 brcmf_dbg(GLOM
, "glom descriptor, %d bytes:\n",
1747 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1750 __skb_trim(pkt
, rd
->len
);
1751 skb_pull(pkt
, SDPCM_HDRLEN
);
1754 brcmf_dbg(ERROR
, "%s: glom superframe w/o "
1755 "descriptor!\n", __func__
);
1756 brcmf_sdbrcm_rxfail(bus
, false, false);
1758 /* prepare the descriptor for the next read */
1759 rd
->len
= rd
->len_nxtfrm
<< 4;
1761 /* treat all packet as event if we don't know */
1762 rd
->channel
= SDPCM_EVENT_CHANNEL
;
1766 /* Fill in packet len and prio, deliver upward */
1767 __skb_trim(pkt
, rd
->len
);
1768 skb_pull(pkt
, rd
->dat_offset
);
1770 /* prepare the descriptor for the next read */
1771 rd
->len
= rd
->len_nxtfrm
<< 4;
1773 /* treat all packet as event if we don't know */
1774 rd
->channel
= SDPCM_EVENT_CHANNEL
;
1776 if (pkt
->len
== 0) {
1777 brcmu_pkt_buf_free_skb(pkt
);
1779 } else if (brcmf_proto_hdrpull(bus
->sdiodev
->dev
, &ifidx
,
1781 brcmf_dbg(ERROR
, "rx protocol error\n");
1782 brcmu_pkt_buf_free_skb(pkt
);
1783 bus
->sdiodev
->bus_if
->dstats
.rx_errors
++;
1787 /* Unlock during rx call */
1789 brcmf_rx_packet(bus
->sdiodev
->dev
, ifidx
, pkt
);
1793 rxcount
= maxframes
- rxleft
;
1794 /* Message if we hit the limit */
1796 brcmf_dbg(DATA
, "hit rx limit of %d frames\n", maxframes
);
1798 brcmf_dbg(DATA
, "processed %d frames\n", rxcount
);
1799 /* Back off rxseq if awaiting rtx, update rx_seq */
1802 bus
->rx_seq
= rd
->seq_num
;
1808 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio
*bus
, bool *lockvar
)
1811 wait_event_interruptible_timeout(bus
->ctrl_wait
, !*lockvar
, HZ
* 2);
1817 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio
*bus
)
1819 if (waitqueue_active(&bus
->ctrl_wait
))
1820 wake_up_interruptible(&bus
->ctrl_wait
);
1824 /* Writes a HW/SW header into the packet and sends it. */
1825 /* Assumes: (a) header space already there, (b) caller holds lock */
1826 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio
*bus
, struct sk_buff
*pkt
,
1827 uint chan
, bool free_pkt
)
1833 struct sk_buff
*new;
1836 brcmf_dbg(TRACE
, "Enter\n");
1838 frame
= (u8
*) (pkt
->data
);
1840 /* Add alignment padding, allocate new packet if needed */
1841 pad
= ((unsigned long)frame
% BRCMF_SDALIGN
);
1843 if (skb_headroom(pkt
) < pad
) {
1844 brcmf_dbg(INFO
, "insufficient headroom %d for %d pad\n",
1845 skb_headroom(pkt
), pad
);
1846 bus
->sdiodev
->bus_if
->tx_realloc
++;
1847 new = brcmu_pkt_buf_get_skb(pkt
->len
+ BRCMF_SDALIGN
);
1849 brcmf_dbg(ERROR
, "couldn't allocate new %d-byte packet\n",
1850 pkt
->len
+ BRCMF_SDALIGN
);
1855 pkt_align(new, pkt
->len
, BRCMF_SDALIGN
);
1856 memcpy(new->data
, pkt
->data
, pkt
->len
);
1858 brcmu_pkt_buf_free_skb(pkt
);
1859 /* free the pkt if canned one is not used */
1862 frame
= (u8
*) (pkt
->data
);
1863 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
1867 frame
= (u8
*) (pkt
->data
);
1868 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
1869 memset(frame
, 0, pad
+ SDPCM_HDRLEN
);
1872 /* precondition: pad < BRCMF_SDALIGN */
1874 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
1875 len
= (u16
) (pkt
->len
);
1876 *(__le16
*) frame
= cpu_to_le16(len
);
1877 *(((__le16
*) frame
) + 1) = cpu_to_le16(~len
);
1879 /* Software tag: channel, sequence number, data offset */
1881 ((chan
<< SDPCM_CHANNEL_SHIFT
) & SDPCM_CHANNEL_MASK
) | bus
->tx_seq
|
1883 SDPCM_HDRLEN
) << SDPCM_DOFFSET_SHIFT
) & SDPCM_DOFFSET_MASK
);
1885 put_unaligned_le32(swheader
, frame
+ SDPCM_FRAMETAG_LEN
);
1886 put_unaligned_le32(0, frame
+ SDPCM_FRAMETAG_LEN
+ sizeof(swheader
));
1889 tx_packets
[pkt
->priority
]++;
1892 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
1893 ((BRCMF_CTL_ON() && chan
== SDPCM_CONTROL_CHANNEL
) ||
1894 (BRCMF_DATA_ON() && chan
!= SDPCM_CONTROL_CHANNEL
)),
1895 frame
, len
, "Tx Frame:\n");
1896 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1898 chan
== SDPCM_CONTROL_CHANNEL
) ||
1900 chan
!= SDPCM_CONTROL_CHANNEL
))) &&
1902 frame
, min_t(u16
, len
, 16), "TxHdr:\n");
1904 /* Raise len to next SDIO block to eliminate tail command */
1905 if (bus
->roundup
&& bus
->blocksize
&& (len
> bus
->blocksize
)) {
1906 u16 pad
= bus
->blocksize
- (len
% bus
->blocksize
);
1907 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
))
1909 } else if (len
% BRCMF_SDALIGN
) {
1910 len
+= BRCMF_SDALIGN
- (len
% BRCMF_SDALIGN
);
1913 /* Some controllers have trouble with odd bytes -- round to even */
1914 if (len
& (ALIGNMENT
- 1))
1915 len
= roundup(len
, ALIGNMENT
);
1917 ret
= brcmf_sdcard_send_pkt(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
1918 SDIO_FUNC_2
, F2SYNC
, pkt
);
1919 bus
->sdcnt
.f2txdata
++;
1922 /* On failure, abort the command and terminate the frame */
1923 brcmf_dbg(INFO
, "sdio error %d, abort command and terminate frame\n",
1925 bus
->sdcnt
.tx_sderrs
++;
1927 brcmf_sdcard_abort(bus
->sdiodev
, SDIO_FUNC_2
);
1928 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_FRAMECTRL
,
1930 bus
->sdcnt
.f1regdata
++;
1932 for (i
= 0; i
< 3; i
++) {
1934 hi
= brcmf_sdio_regrb(bus
->sdiodev
,
1935 SBSDIO_FUNC1_WFRAMEBCHI
, NULL
);
1936 lo
= brcmf_sdio_regrb(bus
->sdiodev
,
1937 SBSDIO_FUNC1_WFRAMEBCLO
, NULL
);
1938 bus
->sdcnt
.f1regdata
+= 2;
1939 if ((hi
== 0) && (lo
== 0))
1945 bus
->tx_seq
= (bus
->tx_seq
+ 1) % SDPCM_SEQUENCE_WRAP
;
1948 /* restore pkt buffer pointer before calling tx complete routine */
1949 skb_pull(pkt
, SDPCM_HDRLEN
+ pad
);
1951 brcmf_txcomplete(bus
->sdiodev
->dev
, pkt
, ret
!= 0);
1955 brcmu_pkt_buf_free_skb(pkt
);
1960 static uint
brcmf_sdbrcm_sendfromq(struct brcmf_sdio
*bus
, uint maxframes
)
1962 struct sk_buff
*pkt
;
1964 int ret
= 0, prec_out
;
1969 brcmf_dbg(TRACE
, "Enter\n");
1971 tx_prec_map
= ~bus
->flowcontrol
;
1973 /* Send frames until the limit or some other event */
1974 for (cnt
= 0; (cnt
< maxframes
) && data_ok(bus
); cnt
++) {
1975 spin_lock_bh(&bus
->txqlock
);
1976 pkt
= brcmu_pktq_mdeq(&bus
->txq
, tx_prec_map
, &prec_out
);
1978 spin_unlock_bh(&bus
->txqlock
);
1981 spin_unlock_bh(&bus
->txqlock
);
1982 datalen
= pkt
->len
- SDPCM_HDRLEN
;
1984 ret
= brcmf_sdbrcm_txpkt(bus
, pkt
, SDPCM_DATA_CHANNEL
, true);
1986 bus
->sdiodev
->bus_if
->dstats
.tx_errors
++;
1988 bus
->sdiodev
->bus_if
->dstats
.tx_bytes
+= datalen
;
1990 /* In poll mode, need to check for other events */
1991 if (!bus
->intr
&& cnt
) {
1992 /* Check device status, signal pending interrupt */
1993 ret
= r_sdreg32(bus
, &intstatus
,
1994 offsetof(struct sdpcmd_regs
,
1996 bus
->sdcnt
.f2txdata
++;
1999 if (intstatus
& bus
->hostintmask
)
2000 atomic_set(&bus
->ipend
, 1);
2004 /* Deflow-control stack if needed */
2005 if (bus
->sdiodev
->bus_if
->drvr_up
&&
2006 (bus
->sdiodev
->bus_if
->state
== BRCMF_BUS_DATA
) &&
2007 bus
->txoff
&& (pktq_len(&bus
->txq
) < TXLOW
)) {
2009 brcmf_txflowblock(bus
->sdiodev
->dev
, false);
2015 static void brcmf_sdbrcm_bus_stop(struct device
*dev
)
2017 u32 local_hostintmask
;
2020 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2021 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2022 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2024 brcmf_dbg(TRACE
, "Enter\n");
2026 if (bus
->watchdog_tsk
) {
2027 send_sig(SIGTERM
, bus
->watchdog_tsk
, 1);
2028 kthread_stop(bus
->watchdog_tsk
);
2029 bus
->watchdog_tsk
= NULL
;
2034 /* Enable clock for device interrupts */
2035 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
2037 /* Disable and clear interrupts at the chip level also */
2038 w_sdreg32(bus
, 0, offsetof(struct sdpcmd_regs
, hostintmask
));
2039 local_hostintmask
= bus
->hostintmask
;
2040 bus
->hostintmask
= 0;
2042 /* Change our idea of bus state */
2043 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2045 /* Force clocks on backplane to be sure F2 interrupt propagates */
2046 saveclk
= brcmf_sdio_regrb(bus
->sdiodev
,
2047 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
2049 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
2050 (saveclk
| SBSDIO_FORCE_HT
), &err
);
2053 brcmf_dbg(ERROR
, "Failed to force clock for F2: err %d\n", err
);
2055 /* Turn off the bus (F2), free any pending packets */
2056 brcmf_dbg(INTR
, "disable SDIO interrupts\n");
2057 brcmf_sdio_regwb(bus
->sdiodev
, SDIO_CCCR_IOEx
, SDIO_FUNC_ENABLE_1
,
2060 /* Clear any pending interrupts now that F2 is disabled */
2061 w_sdreg32(bus
, local_hostintmask
,
2062 offsetof(struct sdpcmd_regs
, intstatus
));
2064 /* Turn off the backplane clock (only) */
2065 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
2067 /* Clear the data packet queues */
2068 brcmu_pktq_flush(&bus
->txq
, true, NULL
, NULL
);
2070 /* Clear any held glomming stuff */
2072 brcmu_pkt_buf_free_skb(bus
->glomd
);
2073 brcmf_sdbrcm_free_glom(bus
);
2075 /* Clear rx control and wake any waiters */
2077 brcmf_sdbrcm_dcmd_resp_wake(bus
);
2079 /* Reset some F2 state stuff */
2080 bus
->rxskip
= false;
2081 bus
->tx_seq
= bus
->rx_seq
= 0;
2086 #ifdef CONFIG_BRCMFMAC_SDIO_OOB
2087 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio
*bus
)
2089 unsigned long flags
;
2091 spin_lock_irqsave(&bus
->sdiodev
->irq_en_lock
, flags
);
2092 if (!bus
->sdiodev
->irq_en
&& !atomic_read(&bus
->ipend
)) {
2093 enable_irq(bus
->sdiodev
->irq
);
2094 bus
->sdiodev
->irq_en
= true;
2096 spin_unlock_irqrestore(&bus
->sdiodev
->irq_en_lock
, flags
);
2099 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio
*bus
)
2102 #endif /* CONFIG_BRCMFMAC_SDIO_OOB */
2104 static inline void brcmf_sdbrcm_adddpctsk(struct brcmf_sdio
*bus
)
2106 struct list_head
*new_hd
;
2107 unsigned long flags
;
2110 new_hd
= kzalloc(sizeof(struct list_head
), GFP_ATOMIC
);
2112 new_hd
= kzalloc(sizeof(struct list_head
), GFP_KERNEL
);
2116 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
2117 list_add_tail(new_hd
, &bus
->dpc_tsklst
);
2118 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
2121 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio
*bus
)
2128 idx
= brcmf_sdio_chip_getinfidx(bus
->ci
, BCMA_CORE_SDIO_DEV
);
2129 addr
= bus
->ci
->c_inf
[idx
].base
+
2130 offsetof(struct sdpcmd_regs
, intstatus
);
2132 ret
= brcmf_sdio_regrw_helper(bus
->sdiodev
, addr
, &val
, false);
2133 bus
->sdcnt
.f1regdata
++;
2137 val
&= bus
->hostintmask
;
2138 atomic_set(&bus
->fcstate
, !!(val
& I_HMB_FC_STATE
));
2140 /* Clear interrupts */
2142 ret
= brcmf_sdio_regrw_helper(bus
->sdiodev
, addr
, &val
, true);
2143 bus
->sdcnt
.f1regdata
++;
2147 atomic_set(&bus
->intstatus
, 0);
2149 for_each_set_bit(n
, &val
, 32)
2150 set_bit(n
, (unsigned long *)&bus
->intstatus
.counter
);
2156 static void brcmf_sdbrcm_dpc(struct brcmf_sdio
*bus
)
2159 unsigned long intstatus
;
2160 uint rxlimit
= bus
->rxbound
; /* Rx frames to read before resched */
2161 uint txlimit
= bus
->txbound
; /* Tx frames to send before resched */
2162 uint framecnt
= 0; /* Temporary counter of tx/rx frames */
2165 brcmf_dbg(TRACE
, "Enter\n");
2169 /* If waiting for HTAVAIL, check status */
2170 if (bus
->clkstate
== CLK_PENDING
) {
2171 u8 clkctl
, devctl
= 0;
2174 /* Check for inconsistent device control */
2175 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
2176 SBSDIO_DEVICE_CTL
, &err
);
2178 brcmf_dbg(ERROR
, "error reading DEVCTL: %d\n", err
);
2179 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2183 /* Read CSR, if clock on switch to AVAIL, else ignore */
2184 clkctl
= brcmf_sdio_regrb(bus
->sdiodev
,
2185 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
2187 brcmf_dbg(ERROR
, "error reading CSR: %d\n",
2189 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2192 brcmf_dbg(INFO
, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2195 if (SBSDIO_HTAV(clkctl
)) {
2196 devctl
= brcmf_sdio_regrb(bus
->sdiodev
,
2197 SBSDIO_DEVICE_CTL
, &err
);
2199 brcmf_dbg(ERROR
, "error reading DEVCTL: %d\n",
2201 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2203 devctl
&= ~SBSDIO_DEVCTL_CA_INT_ONLY
;
2204 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_DEVICE_CTL
,
2207 brcmf_dbg(ERROR
, "error writing DEVCTL: %d\n",
2209 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2211 bus
->clkstate
= CLK_AVAIL
;
2215 /* Make sure backplane clock is on */
2216 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, true);
2218 /* Pending interrupt indicates new device status */
2219 if (atomic_read(&bus
->ipend
) > 0) {
2220 atomic_set(&bus
->ipend
, 0);
2221 sdio_claim_host(bus
->sdiodev
->func
[1]);
2222 err
= brcmf_sdio_intr_rstatus(bus
);
2223 sdio_release_host(bus
->sdiodev
->func
[1]);
2226 /* Start with leftover status bits */
2227 intstatus
= atomic_xchg(&bus
->intstatus
, 0);
2229 /* Handle flow-control change: read new state in case our ack
2230 * crossed another change interrupt. If change still set, assume
2231 * FC ON for safety, let next loop through do the debounce.
2233 if (intstatus
& I_HMB_FC_CHANGE
) {
2234 intstatus
&= ~I_HMB_FC_CHANGE
;
2235 err
= w_sdreg32(bus
, I_HMB_FC_CHANGE
,
2236 offsetof(struct sdpcmd_regs
, intstatus
));
2238 err
= r_sdreg32(bus
, &newstatus
,
2239 offsetof(struct sdpcmd_regs
, intstatus
));
2240 bus
->sdcnt
.f1regdata
+= 2;
2241 atomic_set(&bus
->fcstate
,
2242 !!(newstatus
& (I_HMB_FC_STATE
| I_HMB_FC_CHANGE
)));
2243 intstatus
|= (newstatus
& bus
->hostintmask
);
2246 /* Handle host mailbox indication */
2247 if (intstatus
& I_HMB_HOST_INT
) {
2248 intstatus
&= ~I_HMB_HOST_INT
;
2249 intstatus
|= brcmf_sdbrcm_hostmail(bus
);
2252 /* Generally don't ask for these, can get CRC errors... */
2253 if (intstatus
& I_WR_OOSYNC
) {
2254 brcmf_dbg(ERROR
, "Dongle reports WR_OOSYNC\n");
2255 intstatus
&= ~I_WR_OOSYNC
;
2258 if (intstatus
& I_RD_OOSYNC
) {
2259 brcmf_dbg(ERROR
, "Dongle reports RD_OOSYNC\n");
2260 intstatus
&= ~I_RD_OOSYNC
;
2263 if (intstatus
& I_SBINT
) {
2264 brcmf_dbg(ERROR
, "Dongle reports SBINT\n");
2265 intstatus
&= ~I_SBINT
;
2268 /* Would be active due to wake-wlan in gSPI */
2269 if (intstatus
& I_CHIPACTIVE
) {
2270 brcmf_dbg(INFO
, "Dongle reports CHIPACTIVE\n");
2271 intstatus
&= ~I_CHIPACTIVE
;
2274 /* Ignore frame indications if rxskip is set */
2276 intstatus
&= ~I_HMB_FRAME_IND
;
2278 /* On frame indication, read available frames */
2279 if (PKT_AVAILABLE() && bus
->clkstate
== CLK_AVAIL
) {
2280 framecnt
= brcmf_sdio_readframes(bus
, rxlimit
);
2281 if (!bus
->rxpending
)
2282 intstatus
&= ~I_HMB_FRAME_IND
;
2283 rxlimit
-= min(framecnt
, rxlimit
);
2286 /* Keep still-pending events for next scheduling */
2288 for_each_set_bit(n
, &intstatus
, 32)
2289 set_bit(n
, (unsigned long *)&bus
->intstatus
.counter
);
2292 brcmf_sdbrcm_clrintr(bus
);
2294 if (data_ok(bus
) && bus
->ctrl_frame_stat
&&
2295 (bus
->clkstate
== CLK_AVAIL
)) {
2298 err
= brcmf_sdcard_send_buf(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
2299 SDIO_FUNC_2
, F2SYNC
, bus
->ctrl_frame_buf
,
2300 (u32
) bus
->ctrl_frame_len
);
2303 /* On failure, abort the command and
2304 terminate the frame */
2305 brcmf_dbg(INFO
, "sdio error %d, abort command and terminate frame\n",
2307 bus
->sdcnt
.tx_sderrs
++;
2309 brcmf_sdcard_abort(bus
->sdiodev
, SDIO_FUNC_2
);
2311 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_FRAMECTRL
,
2313 bus
->sdcnt
.f1regdata
++;
2315 for (i
= 0; i
< 3; i
++) {
2317 hi
= brcmf_sdio_regrb(bus
->sdiodev
,
2318 SBSDIO_FUNC1_WFRAMEBCHI
,
2320 lo
= brcmf_sdio_regrb(bus
->sdiodev
,
2321 SBSDIO_FUNC1_WFRAMEBCLO
,
2323 bus
->sdcnt
.f1regdata
+= 2;
2324 if ((hi
== 0) && (lo
== 0))
2329 bus
->tx_seq
= (bus
->tx_seq
+ 1) % SDPCM_SEQUENCE_WRAP
;
2331 bus
->ctrl_frame_stat
= false;
2332 brcmf_sdbrcm_wait_event_wakeup(bus
);
2334 /* Send queued frames (limit 1 if rx may still be pending) */
2335 else if ((bus
->clkstate
== CLK_AVAIL
) && !atomic_read(&bus
->fcstate
) &&
2336 brcmu_pktq_mlen(&bus
->txq
, ~bus
->flowcontrol
) && txlimit
2338 framecnt
= bus
->rxpending
? min(txlimit
, bus
->txminmax
) :
2340 framecnt
= brcmf_sdbrcm_sendfromq(bus
, framecnt
);
2341 txlimit
-= framecnt
;
2344 if ((bus
->sdiodev
->bus_if
->state
== BRCMF_BUS_DOWN
) || (err
!= 0)) {
2345 brcmf_dbg(ERROR
, "failed backplane access over SDIO, halting operation\n");
2346 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
2347 atomic_set(&bus
->intstatus
, 0);
2348 } else if (atomic_read(&bus
->intstatus
) ||
2349 atomic_read(&bus
->ipend
) > 0 ||
2350 (!atomic_read(&bus
->fcstate
) &&
2351 brcmu_pktq_mlen(&bus
->txq
, ~bus
->flowcontrol
) &&
2352 data_ok(bus
)) || PKT_AVAILABLE()) {
2353 brcmf_sdbrcm_adddpctsk(bus
);
2356 /* If we're done for now, turn off clock request. */
2357 if ((bus
->clkstate
!= CLK_PENDING
)
2358 && bus
->idletime
== BRCMF_IDLE_IMMEDIATE
) {
2359 bus
->activity
= false;
2360 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
2366 static int brcmf_sdbrcm_bus_txdata(struct device
*dev
, struct sk_buff
*pkt
)
2370 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2371 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2372 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2373 unsigned long flags
;
2375 brcmf_dbg(TRACE
, "Enter\n");
2379 /* Add space for the header */
2380 skb_push(pkt
, SDPCM_HDRLEN
);
2381 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2383 prec
= prio2prec((pkt
->priority
& PRIOMASK
));
2385 /* Check for existing queue, current flow-control,
2386 pending event, or pending clock */
2387 brcmf_dbg(TRACE
, "deferring pktq len %d\n", pktq_len(&bus
->txq
));
2388 bus
->sdcnt
.fcqueued
++;
2390 /* Priority based enq */
2391 spin_lock_bh(&bus
->txqlock
);
2392 if (!brcmf_c_prec_enq(bus
->sdiodev
->dev
, &bus
->txq
, pkt
, prec
)) {
2393 skb_pull(pkt
, SDPCM_HDRLEN
);
2394 brcmf_txcomplete(bus
->sdiodev
->dev
, pkt
, false);
2395 brcmu_pkt_buf_free_skb(pkt
);
2396 brcmf_dbg(ERROR
, "out of bus->txq !!!\n");
2401 spin_unlock_bh(&bus
->txqlock
);
2403 if (pktq_len(&bus
->txq
) >= TXHI
) {
2405 brcmf_txflowblock(bus
->sdiodev
->dev
, true);
2409 if (pktq_plen(&bus
->txq
, prec
) > qcount
[prec
])
2410 qcount
[prec
] = pktq_plen(&bus
->txq
, prec
);
2413 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
2414 if (list_empty(&bus
->dpc_tsklst
)) {
2415 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
2417 brcmf_sdbrcm_adddpctsk(bus
);
2418 queue_work(bus
->brcmf_wq
, &bus
->datawork
);
2420 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
2427 brcmf_sdbrcm_membytes(struct brcmf_sdio
*bus
, bool write
, u32 address
, u8
*data
,
2434 /* Determine initial transfer parameters */
2435 sdaddr
= address
& SBSDIO_SB_OFT_ADDR_MASK
;
2436 if ((sdaddr
+ size
) & SBSDIO_SBWINDOW_MASK
)
2437 dsize
= (SBSDIO_SB_OFT_ADDR_LIMIT
- sdaddr
);
2441 sdio_claim_host(bus
->sdiodev
->func
[1]);
2443 /* Set the backplane window to include the start address */
2444 bcmerror
= brcmf_sdcard_set_sbaddr_window(bus
->sdiodev
, address
);
2446 brcmf_dbg(ERROR
, "window change failed\n");
2450 /* Do the transfer(s) */
2452 brcmf_dbg(INFO
, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2453 write
? "write" : "read", dsize
,
2454 sdaddr
, address
& SBSDIO_SBWINDOW_MASK
);
2455 bcmerror
= brcmf_sdcard_rwdata(bus
->sdiodev
, write
,
2456 sdaddr
, data
, dsize
);
2458 brcmf_dbg(ERROR
, "membytes transfer failed\n");
2462 /* Adjust for next transfer (if any) */
2467 bcmerror
= brcmf_sdcard_set_sbaddr_window(bus
->sdiodev
,
2470 brcmf_dbg(ERROR
, "window change failed\n");
2474 dsize
= min_t(uint
, SBSDIO_SB_OFT_ADDR_LIMIT
, size
);
2479 /* Return the window to backplane enumeration space for core access */
2480 if (brcmf_sdcard_set_sbaddr_window(bus
->sdiodev
, bus
->sdiodev
->sbwad
))
2481 brcmf_dbg(ERROR
, "FAILED to set window back to 0x%x\n",
2482 bus
->sdiodev
->sbwad
);
2484 sdio_release_host(bus
->sdiodev
->func
[1]);
2490 #define CONSOLE_LINE_MAX 192
2492 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio
*bus
)
2494 struct brcmf_console
*c
= &bus
->console
;
2495 u8 line
[CONSOLE_LINE_MAX
], ch
;
2499 /* Don't do anything until FWREADY updates console address */
2500 if (bus
->console_addr
== 0)
2503 /* Read console log struct */
2504 addr
= bus
->console_addr
+ offsetof(struct rte_console
, log_le
);
2505 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
, (u8
*)&c
->log_le
,
2510 /* Allocate console buffer (one time only) */
2511 if (c
->buf
== NULL
) {
2512 c
->bufsize
= le32_to_cpu(c
->log_le
.buf_size
);
2513 c
->buf
= kmalloc(c
->bufsize
, GFP_ATOMIC
);
2518 idx
= le32_to_cpu(c
->log_le
.idx
);
2520 /* Protect against corrupt value */
2521 if (idx
> c
->bufsize
)
2524 /* Skip reading the console buffer if the index pointer
2529 /* Read the console buffer */
2530 addr
= le32_to_cpu(c
->log_le
.buf
);
2531 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
, c
->buf
, c
->bufsize
);
2535 while (c
->last
!= idx
) {
2536 for (n
= 0; n
< CONSOLE_LINE_MAX
- 2; n
++) {
2537 if (c
->last
== idx
) {
2538 /* This would output a partial line.
2540 * the buffer pointer and output this
2541 * line next time around.
2546 c
->last
= c
->bufsize
- n
;
2549 ch
= c
->buf
[c
->last
];
2550 c
->last
= (c
->last
+ 1) % c
->bufsize
;
2557 if (line
[n
- 1] == '\r')
2560 pr_debug("CONSOLE: %s\n", line
);
2569 static int brcmf_tx_frame(struct brcmf_sdio
*bus
, u8
*frame
, u16 len
)
2574 bus
->ctrl_frame_stat
= false;
2575 ret
= brcmf_sdcard_send_buf(bus
->sdiodev
, bus
->sdiodev
->sbwad
,
2576 SDIO_FUNC_2
, F2SYNC
, frame
, len
);
2579 /* On failure, abort the command and terminate the frame */
2580 brcmf_dbg(INFO
, "sdio error %d, abort command and terminate frame\n",
2582 bus
->sdcnt
.tx_sderrs
++;
2584 brcmf_sdcard_abort(bus
->sdiodev
, SDIO_FUNC_2
);
2586 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_FRAMECTRL
,
2588 bus
->sdcnt
.f1regdata
++;
2590 for (i
= 0; i
< 3; i
++) {
2592 hi
= brcmf_sdio_regrb(bus
->sdiodev
,
2593 SBSDIO_FUNC1_WFRAMEBCHI
, NULL
);
2594 lo
= brcmf_sdio_regrb(bus
->sdiodev
,
2595 SBSDIO_FUNC1_WFRAMEBCLO
, NULL
);
2596 bus
->sdcnt
.f1regdata
+= 2;
2597 if (hi
== 0 && lo
== 0)
2603 bus
->tx_seq
= (bus
->tx_seq
+ 1) % SDPCM_SEQUENCE_WRAP
;
2609 brcmf_sdbrcm_bus_txctl(struct device
*dev
, unsigned char *msg
, uint msglen
)
2617 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
2618 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
2619 struct brcmf_sdio
*bus
= sdiodev
->bus
;
2620 unsigned long flags
;
2622 brcmf_dbg(TRACE
, "Enter\n");
2624 /* Back the pointer to make a room for bus header */
2625 frame
= msg
- SDPCM_HDRLEN
;
2626 len
= (msglen
+= SDPCM_HDRLEN
);
2628 /* Add alignment padding (optional for ctl frames) */
2629 doff
= ((unsigned long)frame
% BRCMF_SDALIGN
);
2634 memset(frame
, 0, doff
+ SDPCM_HDRLEN
);
2636 /* precondition: doff < BRCMF_SDALIGN */
2637 doff
+= SDPCM_HDRLEN
;
2639 /* Round send length to next SDIO block */
2640 if (bus
->roundup
&& bus
->blocksize
&& (len
> bus
->blocksize
)) {
2641 u16 pad
= bus
->blocksize
- (len
% bus
->blocksize
);
2642 if ((pad
<= bus
->roundup
) && (pad
< bus
->blocksize
))
2644 } else if (len
% BRCMF_SDALIGN
) {
2645 len
+= BRCMF_SDALIGN
- (len
% BRCMF_SDALIGN
);
2648 /* Satisfy length-alignment requirements */
2649 if (len
& (ALIGNMENT
- 1))
2650 len
= roundup(len
, ALIGNMENT
);
2652 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2654 /* Need to lock here to protect txseq and SDIO tx calls */
2657 /* Make sure backplane clock is on */
2658 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
2660 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2661 *(__le16
*) frame
= cpu_to_le16((u16
) msglen
);
2662 *(((__le16
*) frame
) + 1) = cpu_to_le16(~msglen
);
2664 /* Software tag: channel, sequence number, data offset */
2666 ((SDPCM_CONTROL_CHANNEL
<< SDPCM_CHANNEL_SHIFT
) &
2668 | bus
->tx_seq
| ((doff
<< SDPCM_DOFFSET_SHIFT
) &
2669 SDPCM_DOFFSET_MASK
);
2670 put_unaligned_le32(swheader
, frame
+ SDPCM_FRAMETAG_LEN
);
2671 put_unaligned_le32(0, frame
+ SDPCM_FRAMETAG_LEN
+ sizeof(swheader
));
2673 if (!data_ok(bus
)) {
2674 brcmf_dbg(INFO
, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2675 bus
->tx_max
, bus
->tx_seq
);
2676 bus
->ctrl_frame_stat
= true;
2678 bus
->ctrl_frame_buf
= frame
;
2679 bus
->ctrl_frame_len
= len
;
2681 brcmf_sdbrcm_wait_for_event(bus
, &bus
->ctrl_frame_stat
);
2683 if (!bus
->ctrl_frame_stat
) {
2684 brcmf_dbg(INFO
, "ctrl_frame_stat == false\n");
2687 brcmf_dbg(INFO
, "ctrl_frame_stat == true\n");
2693 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2694 frame
, len
, "Tx Frame:\n");
2695 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2697 frame
, min_t(u16
, len
, 16), "TxHdr:\n");
2700 ret
= brcmf_tx_frame(bus
, frame
, len
);
2701 } while (ret
< 0 && retries
++ < TXRETRIES
);
2704 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
2705 if ((bus
->idletime
== BRCMF_IDLE_IMMEDIATE
) &&
2706 list_empty(&bus
->dpc_tsklst
)) {
2707 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
2709 bus
->activity
= false;
2710 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, true);
2712 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
2718 bus
->sdcnt
.tx_ctlerrs
++;
2720 bus
->sdcnt
.tx_ctlpkts
++;
2722 return ret
? -EIO
: 0;
2726 static inline bool brcmf_sdio_valid_shared_address(u32 addr
)
2728 return !(addr
== 0 || ((~addr
>> 16) & 0xffff) == (addr
& 0xffff));
2731 static int brcmf_sdio_readshared(struct brcmf_sdio
*bus
,
2732 struct sdpcm_shared
*sh
)
2737 struct sdpcm_shared_le sh_le
;
2740 shaddr
= bus
->ramsize
- 4;
2743 * Read last word in socram to determine
2744 * address of sdpcm_shared structure
2746 rv
= brcmf_sdbrcm_membytes(bus
, false, shaddr
,
2751 addr
= le32_to_cpu(addr_le
);
2753 brcmf_dbg(INFO
, "sdpcm_shared address 0x%08X\n", addr
);
2756 * Check if addr is valid.
2757 * NVRAM length at the end of memory should have been overwritten.
2759 if (!brcmf_sdio_valid_shared_address(addr
)) {
2760 brcmf_dbg(ERROR
, "invalid sdpcm_shared address 0x%08X\n",
2765 /* Read hndrte_shared structure */
2766 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
, (u8
*)&sh_le
,
2767 sizeof(struct sdpcm_shared_le
));
2772 sh
->flags
= le32_to_cpu(sh_le
.flags
);
2773 sh
->trap_addr
= le32_to_cpu(sh_le
.trap_addr
);
2774 sh
->assert_exp_addr
= le32_to_cpu(sh_le
.assert_exp_addr
);
2775 sh
->assert_file_addr
= le32_to_cpu(sh_le
.assert_file_addr
);
2776 sh
->assert_line
= le32_to_cpu(sh_le
.assert_line
);
2777 sh
->console_addr
= le32_to_cpu(sh_le
.console_addr
);
2778 sh
->msgtrace_addr
= le32_to_cpu(sh_le
.msgtrace_addr
);
2780 if ((sh
->flags
& SDPCM_SHARED_VERSION_MASK
) != SDPCM_SHARED_VERSION
) {
2782 "sdpcm_shared version mismatch: dhd %d dongle %d\n",
2783 SDPCM_SHARED_VERSION
,
2784 sh
->flags
& SDPCM_SHARED_VERSION_MASK
);
2791 static int brcmf_sdio_dump_console(struct brcmf_sdio
*bus
,
2792 struct sdpcm_shared
*sh
, char __user
*data
,
2795 u32 addr
, console_ptr
, console_size
, console_index
;
2796 char *conbuf
= NULL
;
2802 /* obtain console information from device memory */
2803 addr
= sh
->console_addr
+ offsetof(struct rte_console
, log_le
);
2804 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
,
2805 (u8
*)&sh_val
, sizeof(u32
));
2808 console_ptr
= le32_to_cpu(sh_val
);
2810 addr
= sh
->console_addr
+ offsetof(struct rte_console
, log_le
.buf_size
);
2811 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
,
2812 (u8
*)&sh_val
, sizeof(u32
));
2815 console_size
= le32_to_cpu(sh_val
);
2817 addr
= sh
->console_addr
+ offsetof(struct rte_console
, log_le
.idx
);
2818 rv
= brcmf_sdbrcm_membytes(bus
, false, addr
,
2819 (u8
*)&sh_val
, sizeof(u32
));
2822 console_index
= le32_to_cpu(sh_val
);
2824 /* allocate buffer for console data */
2825 if (console_size
<= CONSOLE_BUFFER_MAX
)
2826 conbuf
= vzalloc(console_size
+1);
2831 /* obtain the console data from device */
2832 conbuf
[console_size
] = '\0';
2833 rv
= brcmf_sdbrcm_membytes(bus
, false, console_ptr
, (u8
*)conbuf
,
2838 rv
= simple_read_from_buffer(data
, count
, &pos
,
2839 conbuf
+ console_index
,
2840 console_size
- console_index
);
2845 if (console_index
> 0) {
2847 rv
= simple_read_from_buffer(data
+nbytes
, count
, &pos
,
2848 conbuf
, console_index
- 1);
2858 static int brcmf_sdio_trap_info(struct brcmf_sdio
*bus
, struct sdpcm_shared
*sh
,
2859 char __user
*data
, size_t count
)
2863 struct brcmf_trap_info tr
;
2867 if ((sh
->flags
& SDPCM_SHARED_TRAP
) == 0)
2870 error
= brcmf_sdbrcm_membytes(bus
, false, sh
->trap_addr
, (u8
*)&tr
,
2871 sizeof(struct brcmf_trap_info
));
2875 nbytes
= brcmf_sdio_dump_console(bus
, sh
, data
, count
);
2879 res
= scnprintf(buf
, sizeof(buf
),
2880 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2881 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2882 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2883 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2884 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
2885 le32_to_cpu(tr
.type
), le32_to_cpu(tr
.epc
),
2886 le32_to_cpu(tr
.cpsr
), le32_to_cpu(tr
.spsr
),
2887 le32_to_cpu(tr
.r13
), le32_to_cpu(tr
.r14
),
2888 le32_to_cpu(tr
.pc
), sh
->trap_addr
,
2889 le32_to_cpu(tr
.r0
), le32_to_cpu(tr
.r1
),
2890 le32_to_cpu(tr
.r2
), le32_to_cpu(tr
.r3
),
2891 le32_to_cpu(tr
.r4
), le32_to_cpu(tr
.r5
),
2892 le32_to_cpu(tr
.r6
), le32_to_cpu(tr
.r7
));
2894 error
= simple_read_from_buffer(data
+nbytes
, count
, &pos
, buf
, res
);
2902 static int brcmf_sdio_assert_info(struct brcmf_sdio
*bus
,
2903 struct sdpcm_shared
*sh
, char __user
*data
,
2908 char file
[80] = "?";
2909 char expr
[80] = "<???>";
2913 if ((sh
->flags
& SDPCM_SHARED_ASSERT_BUILT
) == 0) {
2914 brcmf_dbg(INFO
, "firmware not built with -assert\n");
2916 } else if ((sh
->flags
& SDPCM_SHARED_ASSERT
) == 0) {
2917 brcmf_dbg(INFO
, "no assert in dongle\n");
2921 if (sh
->assert_file_addr
!= 0) {
2922 error
= brcmf_sdbrcm_membytes(bus
, false, sh
->assert_file_addr
,
2927 if (sh
->assert_exp_addr
!= 0) {
2928 error
= brcmf_sdbrcm_membytes(bus
, false, sh
->assert_exp_addr
,
2934 res
= scnprintf(buf
, sizeof(buf
),
2935 "dongle assert: %s:%d: assert(%s)\n",
2936 file
, sh
->assert_line
, expr
);
2937 return simple_read_from_buffer(data
, count
, &pos
, buf
, res
);
2940 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio
*bus
)
2943 struct sdpcm_shared sh
;
2946 error
= brcmf_sdio_readshared(bus
, &sh
);
2952 if ((sh
.flags
& SDPCM_SHARED_ASSERT_BUILT
) == 0)
2953 brcmf_dbg(INFO
, "firmware not built with -assert\n");
2954 else if (sh
.flags
& SDPCM_SHARED_ASSERT
)
2955 brcmf_dbg(ERROR
, "assertion in dongle\n");
2957 if (sh
.flags
& SDPCM_SHARED_TRAP
)
2958 brcmf_dbg(ERROR
, "firmware trap in dongle\n");
2963 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio
*bus
, char __user
*data
,
2964 size_t count
, loff_t
*ppos
)
2967 struct sdpcm_shared sh
;
2975 error
= brcmf_sdio_readshared(bus
, &sh
);
2979 error
= brcmf_sdio_assert_info(bus
, &sh
, data
, count
);
2984 error
= brcmf_sdio_trap_info(bus
, &sh
, data
, count
);
2995 static ssize_t
brcmf_sdio_forensic_read(struct file
*f
, char __user
*data
,
2996 size_t count
, loff_t
*ppos
)
2998 struct brcmf_sdio
*bus
= f
->private_data
;
3001 res
= brcmf_sdbrcm_died_dump(bus
, data
, count
, ppos
);
3004 return (ssize_t
)res
;
3007 static const struct file_operations brcmf_sdio_forensic_ops
= {
3008 .owner
= THIS_MODULE
,
3009 .open
= simple_open
,
3010 .read
= brcmf_sdio_forensic_read
3013 static void brcmf_sdio_debugfs_create(struct brcmf_sdio
*bus
)
3015 struct brcmf_pub
*drvr
= bus
->sdiodev
->bus_if
->drvr
;
3016 struct dentry
*dentry
= brcmf_debugfs_get_devdir(drvr
);
3018 if (IS_ERR_OR_NULL(dentry
))
3021 debugfs_create_file("forensics", S_IRUGO
, dentry
, bus
,
3022 &brcmf_sdio_forensic_ops
);
3023 brcmf_debugfs_create_sdio_count(drvr
, &bus
->sdcnt
);
3026 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio
*bus
)
3031 static void brcmf_sdio_debugfs_create(struct brcmf_sdio
*bus
)
3037 brcmf_sdbrcm_bus_rxctl(struct device
*dev
, unsigned char *msg
, uint msglen
)
3042 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
3043 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
3044 struct brcmf_sdio
*bus
= sdiodev
->bus
;
3046 brcmf_dbg(TRACE
, "Enter\n");
3048 /* Wait until control frame is available */
3049 timeleft
= brcmf_sdbrcm_dcmd_resp_wait(bus
, &bus
->rxlen
, &pending
);
3053 memcpy(msg
, bus
->rxctl
, min(msglen
, rxlen
));
3058 brcmf_dbg(CTL
, "resumed on rxctl frame, got %d expected %d\n",
3060 } else if (timeleft
== 0) {
3061 brcmf_dbg(ERROR
, "resumed on timeout\n");
3062 brcmf_sdbrcm_checkdied(bus
);
3063 } else if (pending
) {
3064 brcmf_dbg(CTL
, "cancelled\n");
3065 return -ERESTARTSYS
;
3067 brcmf_dbg(CTL
, "resumed for unknown reason?\n");
3068 brcmf_sdbrcm_checkdied(bus
);
3072 bus
->sdcnt
.rx_ctlpkts
++;
3074 bus
->sdcnt
.rx_ctlerrs
++;
3076 return rxlen
? (int)rxlen
: -ETIMEDOUT
;
3079 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio
*bus
)
3086 char *nvram_ularray
;
3089 /* Even if there are no vars are to be written, we still
3090 need to set the ramsize. */
3091 varaddr
= (bus
->ramsize
- 4) - bus
->varsz
;
3094 /* Write the vars list */
3095 bcmerror
= brcmf_sdbrcm_membytes(bus
, true, varaddr
,
3096 bus
->vars
, bus
->varsz
);
3098 /* Verify NVRAM bytes */
3099 brcmf_dbg(INFO
, "Compare NVRAM dl & ul; varsize=%d\n",
3101 nvram_ularray
= kmalloc(bus
->varsz
, GFP_ATOMIC
);
3105 /* Upload image to verify downloaded contents. */
3106 memset(nvram_ularray
, 0xaa, bus
->varsz
);
3108 /* Read the vars list to temp buffer for comparison */
3109 bcmerror
= brcmf_sdbrcm_membytes(bus
, false, varaddr
,
3110 nvram_ularray
, bus
->varsz
);
3112 brcmf_dbg(ERROR
, "error %d on reading %d nvram bytes at 0x%08x\n",
3113 bcmerror
, bus
->varsz
, varaddr
);
3115 /* Compare the org NVRAM with the one read from RAM */
3116 if (memcmp(bus
->vars
, nvram_ularray
, bus
->varsz
))
3117 brcmf_dbg(ERROR
, "Downloaded NVRAM image is corrupted\n");
3119 brcmf_dbg(ERROR
, "Download/Upload/Compare of NVRAM ok\n");
3121 kfree(nvram_ularray
);
3125 /* adjust to the user specified RAM */
3126 brcmf_dbg(INFO
, "Physical memory size: %d\n", bus
->ramsize
);
3127 brcmf_dbg(INFO
, "Vars are at %d, orig varsize is %d\n",
3128 varaddr
, bus
->varsz
);
3131 * Determine the length token:
3132 * Varsize, converted to words, in lower 16-bits, checksum
3137 varsizew_le
= cpu_to_le32(0);
3139 varsizew
= bus
->varsz
/ 4;
3140 varsizew
= (~varsizew
<< 16) | (varsizew
& 0x0000FFFF);
3141 varsizew_le
= cpu_to_le32(varsizew
);
3144 brcmf_dbg(INFO
, "New varsize is %d, length token=0x%08x\n",
3145 bus
->varsz
, varsizew
);
3147 /* Write the length token to the last word */
3148 bcmerror
= brcmf_sdbrcm_membytes(bus
, true, (bus
->ramsize
- 4),
3149 (u8
*)&varsizew_le
, 4);
3154 static int brcmf_sdbrcm_download_state(struct brcmf_sdio
*bus
, bool enter
)
3157 struct chip_info
*ci
= bus
->ci
;
3159 /* To enter download state, disable ARM and reset SOCRAM.
3160 * To exit download state, simply reset ARM (default is RAM boot).
3163 bus
->alp_only
= true;
3165 ci
->coredisable(bus
->sdiodev
, ci
, BCMA_CORE_ARM_CM3
);
3167 ci
->resetcore(bus
->sdiodev
, ci
, BCMA_CORE_INTERNAL_MEM
);
3169 /* Clear the top bit of memory */
3172 brcmf_sdbrcm_membytes(bus
, true, bus
->ramsize
- 4,
3176 if (!ci
->iscoreup(bus
->sdiodev
, ci
, BCMA_CORE_INTERNAL_MEM
)) {
3177 brcmf_dbg(ERROR
, "SOCRAM core is down after reset?\n");
3182 bcmerror
= brcmf_sdbrcm_write_vars(bus
);
3184 brcmf_dbg(ERROR
, "no vars written to RAM\n");
3188 w_sdreg32(bus
, 0xFFFFFFFF,
3189 offsetof(struct sdpcmd_regs
, intstatus
));
3191 ci
->resetcore(bus
->sdiodev
, ci
, BCMA_CORE_ARM_CM3
);
3193 /* Allow HT Clock now that the ARM is running. */
3194 bus
->alp_only
= false;
3196 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_LOAD
;
3202 static int brcmf_sdbrcm_get_image(char *buf
, int len
, struct brcmf_sdio
*bus
)
3204 if (bus
->firmware
->size
< bus
->fw_ptr
+ len
)
3205 len
= bus
->firmware
->size
- bus
->fw_ptr
;
3207 memcpy(buf
, &bus
->firmware
->data
[bus
->fw_ptr
], len
);
3212 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio
*bus
)
3216 u8
*memblock
= NULL
, *memptr
;
3219 brcmf_dbg(INFO
, "Enter\n");
3221 ret
= request_firmware(&bus
->firmware
, BRCMF_SDIO_FW_NAME
,
3222 &bus
->sdiodev
->func
[2]->dev
);
3224 brcmf_dbg(ERROR
, "Fail to request firmware %d\n", ret
);
3229 memptr
= memblock
= kmalloc(MEMBLOCK
+ BRCMF_SDALIGN
, GFP_ATOMIC
);
3230 if (memblock
== NULL
) {
3234 if ((u32
)(unsigned long)memblock
% BRCMF_SDALIGN
)
3235 memptr
+= (BRCMF_SDALIGN
-
3236 ((u32
)(unsigned long)memblock
% BRCMF_SDALIGN
));
3238 /* Download image */
3240 brcmf_sdbrcm_get_image((char *)memptr
, MEMBLOCK
, bus
))) {
3241 ret
= brcmf_sdbrcm_membytes(bus
, true, offset
, memptr
, len
);
3243 brcmf_dbg(ERROR
, "error %d on writing %d membytes at 0x%08x\n",
3244 ret
, MEMBLOCK
, offset
);
3254 release_firmware(bus
->firmware
);
3261 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3262 * and ending in a NUL.
3263 * Removes carriage returns, empty lines, comment lines, and converts
3265 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3269 static int brcmf_process_nvram_vars(struct brcmf_sdio
*bus
)
3276 uint buf_len
, n
, len
;
3278 len
= bus
->firmware
->size
;
3279 varbuf
= vmalloc(len
);
3283 memcpy(varbuf
, bus
->firmware
->data
, len
);
3286 findNewline
= false;
3289 for (n
= 0; n
< len
; n
++) {
3292 if (varbuf
[n
] == '\r')
3294 if (findNewline
&& varbuf
[n
] != '\n')
3296 findNewline
= false;
3297 if (varbuf
[n
] == '#') {
3301 if (varbuf
[n
] == '\n') {
3311 buf_len
= dp
- varbuf
;
3312 while (dp
< varbuf
+ n
)
3316 /* roundup needed for download to device */
3317 bus
->varsz
= roundup(buf_len
+ 1, 4);
3318 bus
->vars
= kmalloc(bus
->varsz
, GFP_KERNEL
);
3319 if (bus
->vars
== NULL
) {
3325 /* copy the processed variables and add null termination */
3326 memcpy(bus
->vars
, varbuf
, buf_len
);
3327 bus
->vars
[buf_len
] = 0;
3333 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio
*bus
)
3337 if (bus
->sdiodev
->bus_if
->drvr_up
)
3340 ret
= request_firmware(&bus
->firmware
, BRCMF_SDIO_NV_NAME
,
3341 &bus
->sdiodev
->func
[2]->dev
);
3343 brcmf_dbg(ERROR
, "Fail to request nvram %d\n", ret
);
3347 ret
= brcmf_process_nvram_vars(bus
);
3349 release_firmware(bus
->firmware
);
3354 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio
*bus
)
3358 /* Keep arm in reset */
3359 if (brcmf_sdbrcm_download_state(bus
, true)) {
3360 brcmf_dbg(ERROR
, "error placing ARM core in reset\n");
3364 /* External image takes precedence if specified */
3365 if (brcmf_sdbrcm_download_code_file(bus
)) {
3366 brcmf_dbg(ERROR
, "dongle image file download failed\n");
3370 /* External nvram takes precedence if specified */
3371 if (brcmf_sdbrcm_download_nvram(bus
))
3372 brcmf_dbg(ERROR
, "dongle nvram file download failed\n");
3374 /* Take arm out of reset */
3375 if (brcmf_sdbrcm_download_state(bus
, false)) {
3376 brcmf_dbg(ERROR
, "error getting out of ARM core reset\n");
3387 brcmf_sdbrcm_download_firmware(struct brcmf_sdio
*bus
)
3391 /* Download the firmware */
3392 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3394 ret
= _brcmf_sdbrcm_download_firmware(bus
) == 0;
3396 brcmf_sdbrcm_clkctl(bus
, CLK_SDONLY
, false);
3401 static int brcmf_sdbrcm_bus_init(struct device
*dev
)
3403 struct brcmf_bus
*bus_if
= dev_get_drvdata(dev
);
3404 struct brcmf_sdio_dev
*sdiodev
= bus_if
->bus_priv
.sdio
;
3405 struct brcmf_sdio
*bus
= sdiodev
->bus
;
3406 unsigned long timeout
;
3411 brcmf_dbg(TRACE
, "Enter\n");
3413 /* try to download image and nvram to the dongle */
3414 if (bus_if
->state
== BRCMF_BUS_DOWN
) {
3415 if (!(brcmf_sdbrcm_download_firmware(bus
)))
3419 if (!bus
->sdiodev
->bus_if
->drvr
)
3422 /* Start the watchdog timer */
3423 bus
->sdcnt
.tickcnt
= 0;
3424 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
3428 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3429 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3430 if (bus
->clkstate
!= CLK_AVAIL
)
3433 /* Force clocks on backplane to be sure F2 interrupt propagates */
3434 saveclk
= brcmf_sdio_regrb(bus
->sdiodev
,
3435 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
3437 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
3438 (saveclk
| SBSDIO_FORCE_HT
), &err
);
3441 brcmf_dbg(ERROR
, "Failed to force clock for F2: err %d\n", err
);
3445 /* Enable function 2 (frame transfers) */
3446 w_sdreg32(bus
, SDPCM_PROT_VERSION
<< SMB_DATA_VERSION_SHIFT
,
3447 offsetof(struct sdpcmd_regs
, tosbmailboxdata
));
3448 enable
= (SDIO_FUNC_ENABLE_1
| SDIO_FUNC_ENABLE_2
);
3450 brcmf_sdio_regwb(bus
->sdiodev
, SDIO_CCCR_IOEx
, enable
, NULL
);
3452 timeout
= jiffies
+ msecs_to_jiffies(BRCMF_WAIT_F2RDY
);
3454 while (enable
!= ready
) {
3455 ready
= brcmf_sdio_regrb(bus
->sdiodev
,
3456 SDIO_CCCR_IORx
, NULL
);
3457 if (time_after(jiffies
, timeout
))
3459 else if (time_after(jiffies
, timeout
- BRCMF_WAIT_F2RDY
+ 50))
3460 /* prevent busy waiting if it takes too long */
3461 msleep_interruptible(20);
3464 brcmf_dbg(INFO
, "enable 0x%02x, ready 0x%02x\n", enable
, ready
);
3466 /* If F2 successfully enabled, set core and enable interrupts */
3467 if (ready
== enable
) {
3468 /* Set up the interrupt mask and enable interrupts */
3469 bus
->hostintmask
= HOSTINTMASK
;
3470 w_sdreg32(bus
, bus
->hostintmask
,
3471 offsetof(struct sdpcmd_regs
, hostintmask
));
3473 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_WATERMARK
, 8, &err
);
3475 /* Disable F2 again */
3476 enable
= SDIO_FUNC_ENABLE_1
;
3477 brcmf_sdio_regwb(bus
->sdiodev
, SDIO_CCCR_IOEx
, enable
, NULL
);
3481 /* Restore previous clock setting */
3482 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
, saveclk
, &err
);
3485 ret
= brcmf_sdio_intr_register(bus
->sdiodev
);
3487 brcmf_dbg(ERROR
, "intr register failed:%d\n", ret
);
3490 /* If we didn't come up, turn off backplane clock */
3491 if (bus_if
->state
!= BRCMF_BUS_DATA
)
3492 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
3500 void brcmf_sdbrcm_isr(void *arg
)
3502 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*) arg
;
3504 brcmf_dbg(TRACE
, "Enter\n");
3507 brcmf_dbg(ERROR
, "bus is null pointer, exiting\n");
3511 if (bus
->sdiodev
->bus_if
->state
== BRCMF_BUS_DOWN
) {
3512 brcmf_dbg(ERROR
, "bus is down. we have nothing to do\n");
3515 /* Count the interrupt call */
3516 bus
->sdcnt
.intrcount
++;
3518 atomic_set(&bus
->ipend
, 1);
3520 if (brcmf_sdio_intr_rstatus(bus
)) {
3521 brcmf_dbg(ERROR
, "failed backplane access\n");
3522 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
3525 /* Disable additional interrupts (is this needed now)? */
3527 brcmf_dbg(ERROR
, "isr w/o interrupt configured!\n");
3529 brcmf_sdbrcm_adddpctsk(bus
);
3530 queue_work(bus
->brcmf_wq
, &bus
->datawork
);
3533 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio
*bus
)
3536 struct brcmf_bus
*bus_if
= dev_get_drvdata(bus
->sdiodev
->dev
);
3538 unsigned long flags
;
3540 brcmf_dbg(TIMER
, "Enter\n");
3544 /* Poll period: check device if appropriate. */
3545 if (bus
->poll
&& (++bus
->polltick
>= bus
->pollrate
)) {
3548 /* Reset poll tick */
3551 /* Check device if no interrupts */
3553 (bus
->sdcnt
.intrcount
== bus
->sdcnt
.lastintrs
)) {
3555 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
3556 if (list_empty(&bus
->dpc_tsklst
)) {
3558 spin_unlock_irqrestore(&bus
->dpc_tl_lock
,
3560 devpend
= brcmf_sdio_regrb(bus
->sdiodev
,
3564 devpend
& (INTR_STATUS_FUNC1
|
3567 spin_unlock_irqrestore(&bus
->dpc_tl_lock
,
3571 /* If there is something, make like the ISR and
3574 bus
->sdcnt
.pollcnt
++;
3575 atomic_set(&bus
->ipend
, 1);
3577 brcmf_sdbrcm_adddpctsk(bus
);
3578 queue_work(bus
->brcmf_wq
, &bus
->datawork
);
3582 /* Update interrupt tracking */
3583 bus
->sdcnt
.lastintrs
= bus
->sdcnt
.intrcount
;
3586 /* Poll for console output periodically */
3587 if (bus_if
->state
== BRCMF_BUS_DATA
&&
3588 bus
->console_interval
!= 0) {
3589 bus
->console
.count
+= BRCMF_WD_POLL_MS
;
3590 if (bus
->console
.count
>= bus
->console_interval
) {
3591 bus
->console
.count
-= bus
->console_interval
;
3592 /* Make sure backplane clock is on */
3593 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3594 if (brcmf_sdbrcm_readconsole(bus
) < 0)
3596 bus
->console_interval
= 0;
3601 /* On idle timeout clear activity flag and/or turn off clock */
3602 if ((bus
->idletime
> 0) && (bus
->clkstate
== CLK_AVAIL
)) {
3603 if (++bus
->idlecount
>= bus
->idletime
) {
3605 if (bus
->activity
) {
3606 bus
->activity
= false;
3607 brcmf_sdbrcm_wd_timer(bus
, BRCMF_WD_POLL_MS
);
3609 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
3616 return (atomic_read(&bus
->ipend
) > 0);
3619 static bool brcmf_sdbrcm_chipmatch(u16 chipid
)
3621 if (chipid
== BCM43241_CHIP_ID
)
3623 if (chipid
== BCM4329_CHIP_ID
)
3625 if (chipid
== BCM4330_CHIP_ID
)
3627 if (chipid
== BCM4334_CHIP_ID
)
3632 static void brcmf_sdio_dataworker(struct work_struct
*work
)
3634 struct brcmf_sdio
*bus
= container_of(work
, struct brcmf_sdio
,
3636 struct list_head
*cur_hd
, *tmp_hd
;
3637 unsigned long flags
;
3639 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
3640 list_for_each_safe(cur_hd
, tmp_hd
, &bus
->dpc_tsklst
) {
3641 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
3643 brcmf_sdbrcm_dpc(bus
);
3645 spin_lock_irqsave(&bus
->dpc_tl_lock
, flags
);
3649 spin_unlock_irqrestore(&bus
->dpc_tl_lock
, flags
);
3652 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio
*bus
)
3654 brcmf_dbg(TRACE
, "Enter\n");
3657 bus
->rxctl
= bus
->rxbuf
= NULL
;
3660 kfree(bus
->databuf
);
3661 bus
->databuf
= NULL
;
3664 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio
*bus
)
3666 brcmf_dbg(TRACE
, "Enter\n");
3668 if (bus
->sdiodev
->bus_if
->maxctl
) {
3670 roundup((bus
->sdiodev
->bus_if
->maxctl
+ SDPCM_HDRLEN
),
3671 ALIGNMENT
) + BRCMF_SDALIGN
;
3672 bus
->rxbuf
= kmalloc(bus
->rxblen
, GFP_ATOMIC
);
3677 /* Allocate buffer to receive glomed packet */
3678 bus
->databuf
= kmalloc(MAX_DATA_BUF
, GFP_ATOMIC
);
3679 if (!(bus
->databuf
)) {
3680 /* release rxbuf which was already located as above */
3686 /* Align the buffer */
3687 if ((unsigned long)bus
->databuf
% BRCMF_SDALIGN
)
3688 bus
->dataptr
= bus
->databuf
+ (BRCMF_SDALIGN
-
3689 ((unsigned long)bus
->databuf
% BRCMF_SDALIGN
));
3691 bus
->dataptr
= bus
->databuf
;
3700 brcmf_sdbrcm_probe_attach(struct brcmf_sdio
*bus
, u32 regsva
)
3708 bus
->alp_only
= true;
3710 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3711 brcmf_sdio_regrl(bus
->sdiodev
, SI_ENUM_BASE
, NULL
));
3714 * Force PLL off until brcmf_sdio_chip_attach()
3715 * programs PLL control regs
3718 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
,
3719 BRCMF_INIT_CLKCTL1
, &err
);
3721 clkctl
= brcmf_sdio_regrb(bus
->sdiodev
,
3722 SBSDIO_FUNC1_CHIPCLKCSR
, &err
);
3724 if (err
|| ((clkctl
& ~SBSDIO_AVBITS
) != BRCMF_INIT_CLKCTL1
)) {
3725 brcmf_dbg(ERROR
, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3726 err
, BRCMF_INIT_CLKCTL1
, clkctl
);
3730 if (brcmf_sdio_chip_attach(bus
->sdiodev
, &bus
->ci
, regsva
)) {
3731 brcmf_dbg(ERROR
, "brcmf_sdio_chip_attach failed!\n");
3735 if (!brcmf_sdbrcm_chipmatch((u16
) bus
->ci
->chip
)) {
3736 brcmf_dbg(ERROR
, "unsupported chip: 0x%04x\n", bus
->ci
->chip
);
3740 brcmf_sdio_chip_drivestrengthinit(bus
->sdiodev
, bus
->ci
,
3741 SDIO_DRIVE_STRENGTH
);
3743 /* Get info on the SOCRAM cores... */
3744 bus
->ramsize
= bus
->ci
->ramsize
;
3745 if (!(bus
->ramsize
)) {
3746 brcmf_dbg(ERROR
, "failed to find SOCRAM memory!\n");
3750 /* Set core control so an SDIO reset does a backplane reset */
3751 idx
= brcmf_sdio_chip_getinfidx(bus
->ci
, BCMA_CORE_SDIO_DEV
);
3752 reg_addr
= bus
->ci
->c_inf
[idx
].base
+
3753 offsetof(struct sdpcmd_regs
, corecontrol
);
3754 reg_val
= brcmf_sdio_regrl(bus
->sdiodev
, reg_addr
, NULL
);
3755 brcmf_sdio_regwl(bus
->sdiodev
, reg_addr
, reg_val
| CC_BPRESEN
, NULL
);
3757 brcmu_pktq_init(&bus
->txq
, (PRIOMASK
+ 1), TXQLEN
);
3759 /* Locate an appropriately-aligned portion of hdrbuf */
3760 bus
->rxhdr
= (u8
*) roundup((unsigned long)&bus
->hdrbuf
[0],
3763 /* Set the poll and/or interrupt flags */
3775 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio
*bus
)
3777 brcmf_dbg(TRACE
, "Enter\n");
3779 /* Disable F2 to clear any intermediate frame state on the dongle */
3780 brcmf_sdio_regwb(bus
->sdiodev
, SDIO_CCCR_IOEx
,
3781 SDIO_FUNC_ENABLE_1
, NULL
);
3783 bus
->sdiodev
->bus_if
->state
= BRCMF_BUS_DOWN
;
3784 bus
->rxflow
= false;
3786 /* Done with backplane-dependent accesses, can drop clock... */
3787 brcmf_sdio_regwb(bus
->sdiodev
, SBSDIO_FUNC1_CHIPCLKCSR
, 0, NULL
);
3789 /* ...and initialize clock/power states */
3790 bus
->clkstate
= CLK_SDONLY
;
3791 bus
->idletime
= BRCMF_IDLE_INTERVAL
;
3792 bus
->idleclock
= BRCMF_IDLE_ACTIVE
;
3794 /* Query the F2 block size, set roundup accordingly */
3795 bus
->blocksize
= bus
->sdiodev
->func
[2]->cur_blksize
;
3796 bus
->roundup
= min(max_roundup
, bus
->blocksize
);
3798 /* bus module does not support packet chaining */
3799 bus
->use_rxchain
= false;
3800 bus
->sd_rxchain
= false;
3806 brcmf_sdbrcm_watchdog_thread(void *data
)
3808 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*)data
;
3810 allow_signal(SIGTERM
);
3811 /* Run until signal received */
3813 if (kthread_should_stop())
3815 if (!wait_for_completion_interruptible(&bus
->watchdog_wait
)) {
3816 brcmf_sdbrcm_bus_watchdog(bus
);
3817 /* Count the tick for reference */
3818 bus
->sdcnt
.tickcnt
++;
3826 brcmf_sdbrcm_watchdog(unsigned long data
)
3828 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*)data
;
3830 if (bus
->watchdog_tsk
) {
3831 complete(&bus
->watchdog_wait
);
3832 /* Reschedule the watchdog */
3833 if (bus
->wd_timer_valid
)
3834 mod_timer(&bus
->timer
,
3835 jiffies
+ BRCMF_WD_POLL_MS
* HZ
/ 1000);
3839 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio
*bus
)
3841 brcmf_dbg(TRACE
, "Enter\n");
3844 brcmf_sdbrcm_clkctl(bus
, CLK_AVAIL
, false);
3845 brcmf_sdbrcm_clkctl(bus
, CLK_NONE
, false);
3846 brcmf_sdio_chip_detach(&bus
->ci
);
3847 if (bus
->vars
&& bus
->varsz
)
3852 brcmf_dbg(TRACE
, "Disconnected\n");
3855 /* Detach and free everything */
3856 static void brcmf_sdbrcm_release(struct brcmf_sdio
*bus
)
3858 brcmf_dbg(TRACE
, "Enter\n");
3861 /* De-register interrupt handler */
3862 brcmf_sdio_intr_unregister(bus
->sdiodev
);
3864 cancel_work_sync(&bus
->datawork
);
3865 destroy_workqueue(bus
->brcmf_wq
);
3867 if (bus
->sdiodev
->bus_if
->drvr
) {
3868 brcmf_detach(bus
->sdiodev
->dev
);
3869 brcmf_sdbrcm_release_dongle(bus
);
3872 brcmf_sdbrcm_release_malloc(bus
);
3877 brcmf_dbg(TRACE
, "Disconnected\n");
3880 void *brcmf_sdbrcm_probe(u32 regsva
, struct brcmf_sdio_dev
*sdiodev
)
3883 struct brcmf_sdio
*bus
;
3884 struct brcmf_bus_dcmd
*dlst
;
3886 u32 dngl_txglomalign
;
3889 brcmf_dbg(TRACE
, "Enter\n");
3891 /* We make an assumption about address window mappings:
3892 * regsva == SI_ENUM_BASE*/
3894 /* Allocate private bus interface state */
3895 bus
= kzalloc(sizeof(struct brcmf_sdio
), GFP_ATOMIC
);
3899 bus
->sdiodev
= sdiodev
;
3901 skb_queue_head_init(&bus
->glom
);
3902 bus
->txbound
= BRCMF_TXBOUND
;
3903 bus
->rxbound
= BRCMF_RXBOUND
;
3904 bus
->txminmax
= BRCMF_TXMINMAX
;
3905 bus
->tx_seq
= SDPCM_SEQUENCE_WRAP
- 1;
3907 /* attempt to attach to the dongle */
3908 if (!(brcmf_sdbrcm_probe_attach(bus
, regsva
))) {
3909 brcmf_dbg(ERROR
, "brcmf_sdbrcm_probe_attach failed\n");
3913 spin_lock_init(&bus
->txqlock
);
3914 init_waitqueue_head(&bus
->ctrl_wait
);
3915 init_waitqueue_head(&bus
->dcmd_resp_wait
);
3917 bus
->brcmf_wq
= create_singlethread_workqueue("brcmf_wq");
3918 if (bus
->brcmf_wq
== NULL
) {
3919 brcmf_dbg(ERROR
, "insufficient memory to create txworkqueue\n");
3922 INIT_WORK(&bus
->datawork
, brcmf_sdio_dataworker
);
3924 /* Set up the watchdog timer */
3925 init_timer(&bus
->timer
);
3926 bus
->timer
.data
= (unsigned long)bus
;
3927 bus
->timer
.function
= brcmf_sdbrcm_watchdog
;
3929 /* Initialize thread based operation and lock */
3930 sema_init(&bus
->sdsem
, 1);
3932 /* Initialize watchdog thread */
3933 init_completion(&bus
->watchdog_wait
);
3934 bus
->watchdog_tsk
= kthread_run(brcmf_sdbrcm_watchdog_thread
,
3935 bus
, "brcmf_watchdog");
3936 if (IS_ERR(bus
->watchdog_tsk
)) {
3937 pr_warn("brcmf_watchdog thread failed to start\n");
3938 bus
->watchdog_tsk
= NULL
;
3940 /* Initialize DPC thread */
3941 INIT_LIST_HEAD(&bus
->dpc_tsklst
);
3942 spin_lock_init(&bus
->dpc_tl_lock
);
3944 /* Assign bus interface call back */
3945 bus
->sdiodev
->bus_if
->brcmf_bus_stop
= brcmf_sdbrcm_bus_stop
;
3946 bus
->sdiodev
->bus_if
->brcmf_bus_init
= brcmf_sdbrcm_bus_init
;
3947 bus
->sdiodev
->bus_if
->brcmf_bus_txdata
= brcmf_sdbrcm_bus_txdata
;
3948 bus
->sdiodev
->bus_if
->brcmf_bus_txctl
= brcmf_sdbrcm_bus_txctl
;
3949 bus
->sdiodev
->bus_if
->brcmf_bus_rxctl
= brcmf_sdbrcm_bus_rxctl
;
3950 /* Attach to the brcmf/OS/network interface */
3951 ret
= brcmf_attach(SDPCM_RESERVE
, bus
->sdiodev
->dev
);
3953 brcmf_dbg(ERROR
, "brcmf_attach failed\n");
3957 /* Allocate buffers */
3958 if (!(brcmf_sdbrcm_probe_malloc(bus
))) {
3959 brcmf_dbg(ERROR
, "brcmf_sdbrcm_probe_malloc failed\n");
3963 if (!(brcmf_sdbrcm_probe_init(bus
))) {
3964 brcmf_dbg(ERROR
, "brcmf_sdbrcm_probe_init failed\n");
3968 brcmf_sdio_debugfs_create(bus
);
3969 brcmf_dbg(INFO
, "completed!!\n");
3971 /* sdio bus core specific dcmd */
3972 idx
= brcmf_sdio_chip_getinfidx(bus
->ci
, BCMA_CORE_SDIO_DEV
);
3973 dlst
= kzalloc(sizeof(struct brcmf_bus_dcmd
), GFP_KERNEL
);
3975 if (bus
->ci
->c_inf
[idx
].rev
< 12) {
3976 /* for sdio core rev < 12, disable txgloming */
3978 dlst
->name
= "bus:txglom";
3979 dlst
->param
= (char *)&dngl_txglom
;
3980 dlst
->param_len
= sizeof(u32
);
3982 /* otherwise, set txglomalign */
3983 dngl_txglomalign
= bus
->sdiodev
->bus_if
->align
;
3984 dlst
->name
= "bus:txglomalign";
3985 dlst
->param
= (char *)&dngl_txglomalign
;
3986 dlst
->param_len
= sizeof(u32
);
3988 list_add(&dlst
->list
, &bus
->sdiodev
->bus_if
->dcmd_list
);
3991 /* if firmware path present try to download and bring up bus */
3992 ret
= brcmf_bus_start(bus
->sdiodev
->dev
);
3994 if (ret
== -ENOLINK
) {
3995 brcmf_dbg(ERROR
, "dongle is not responding\n");
4003 brcmf_sdbrcm_release(bus
);
4007 void brcmf_sdbrcm_disconnect(void *ptr
)
4009 struct brcmf_sdio
*bus
= (struct brcmf_sdio
*)ptr
;
4011 brcmf_dbg(TRACE
, "Enter\n");
4014 brcmf_sdbrcm_release(bus
);
4016 brcmf_dbg(TRACE
, "Disconnected\n");
4020 brcmf_sdbrcm_wd_timer(struct brcmf_sdio
*bus
, uint wdtick
)
4022 /* Totally stop the timer */
4023 if (!wdtick
&& bus
->wd_timer_valid
) {
4024 del_timer_sync(&bus
->timer
);
4025 bus
->wd_timer_valid
= false;
4026 bus
->save_ms
= wdtick
;
4030 /* don't start the wd until fw is loaded */
4031 if (bus
->sdiodev
->bus_if
->state
== BRCMF_BUS_DOWN
)
4035 if (bus
->save_ms
!= BRCMF_WD_POLL_MS
) {
4036 if (bus
->wd_timer_valid
)
4037 /* Stop timer and restart at new value */
4038 del_timer_sync(&bus
->timer
);
4040 /* Create timer again when watchdog period is
4041 dynamically changed or in the first instance
4043 bus
->timer
.expires
=
4044 jiffies
+ BRCMF_WD_POLL_MS
* HZ
/ 1000;
4045 add_timer(&bus
->timer
);
4048 /* Re arm the timer, at last watchdog period */
4049 mod_timer(&bus
->timer
,
4050 jiffies
+ BRCMF_WD_POLL_MS
* HZ
/ 1000);
4053 bus
->wd_timer_valid
= true;
4054 bus
->save_ms
= wdtick
;