iwlegacy: merge common header files
[deliverable/linux.git] / drivers / net / wireless / iwlegacy / common.c
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/types.h>
35 #include <linux/lockdep.h>
36 #include <linux/init.h>
37 #include <linux/pci.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/skbuff.h>
41 #include <net/mac80211.h>
42
43 #include "iwl-eeprom.h"
44 #include "iwl-debug.h"
45 #include "common.h"
46 #include "iwl-power.h"
47
48 const char *il_get_cmd_string(u8 cmd)
49 {
50 switch (cmd) {
51 IL_CMD(N_ALIVE);
52 IL_CMD(N_ERROR);
53 IL_CMD(C_RXON);
54 IL_CMD(C_RXON_ASSOC);
55 IL_CMD(C_QOS_PARAM);
56 IL_CMD(C_RXON_TIMING);
57 IL_CMD(C_ADD_STA);
58 IL_CMD(C_REM_STA);
59 IL_CMD(C_WEPKEY);
60 IL_CMD(N_3945_RX);
61 IL_CMD(C_TX);
62 IL_CMD(C_RATE_SCALE);
63 IL_CMD(C_LEDS);
64 IL_CMD(C_TX_LINK_QUALITY_CMD);
65 IL_CMD(C_CHANNEL_SWITCH);
66 IL_CMD(N_CHANNEL_SWITCH);
67 IL_CMD(C_SPECTRUM_MEASUREMENT);
68 IL_CMD(N_SPECTRUM_MEASUREMENT);
69 IL_CMD(C_POWER_TBL);
70 IL_CMD(N_PM_SLEEP);
71 IL_CMD(N_PM_DEBUG_STATS);
72 IL_CMD(C_SCAN);
73 IL_CMD(C_SCAN_ABORT);
74 IL_CMD(N_SCAN_START);
75 IL_CMD(N_SCAN_RESULTS);
76 IL_CMD(N_SCAN_COMPLETE);
77 IL_CMD(N_BEACON);
78 IL_CMD(C_TX_BEACON);
79 IL_CMD(C_TX_PWR_TBL);
80 IL_CMD(C_BT_CONFIG);
81 IL_CMD(C_STATS);
82 IL_CMD(N_STATS);
83 IL_CMD(N_CARD_STATE);
84 IL_CMD(N_MISSED_BEACONS);
85 IL_CMD(C_CT_KILL_CONFIG);
86 IL_CMD(C_SENSITIVITY);
87 IL_CMD(C_PHY_CALIBRATION);
88 IL_CMD(N_RX_PHY);
89 IL_CMD(N_RX_MPDU);
90 IL_CMD(N_RX);
91 IL_CMD(N_COMPRESSED_BA);
92 default:
93 return "UNKNOWN";
94
95 }
96 }
97 EXPORT_SYMBOL(il_get_cmd_string);
98
99 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
100
101 static void il_generic_cmd_callback(struct il_priv *il,
102 struct il_device_cmd *cmd,
103 struct il_rx_pkt *pkt)
104 {
105 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
106 IL_ERR("Bad return from %s (0x%08X)\n",
107 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
108 return;
109 }
110
111 #ifdef CONFIG_IWLEGACY_DEBUG
112 switch (cmd->hdr.cmd) {
113 case C_TX_LINK_QUALITY_CMD:
114 case C_SENSITIVITY:
115 D_HC_DUMP("back from %s (0x%08X)\n",
116 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
117 break;
118 default:
119 D_HC("back from %s (0x%08X)\n",
120 il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
121 }
122 #endif
123 }
124
125 static int
126 il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
127 {
128 int ret;
129
130 BUG_ON(!(cmd->flags & CMD_ASYNC));
131
132 /* An asynchronous command can not expect an SKB to be set. */
133 BUG_ON(cmd->flags & CMD_WANT_SKB);
134
135 /* Assign a generic callback if one is not provided */
136 if (!cmd->callback)
137 cmd->callback = il_generic_cmd_callback;
138
139 if (test_bit(S_EXIT_PENDING, &il->status))
140 return -EBUSY;
141
142 ret = il_enqueue_hcmd(il, cmd);
143 if (ret < 0) {
144 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
145 il_get_cmd_string(cmd->id), ret);
146 return ret;
147 }
148 return 0;
149 }
150
151 int il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
152 {
153 int cmd_idx;
154 int ret;
155
156 lockdep_assert_held(&il->mutex);
157
158 BUG_ON(cmd->flags & CMD_ASYNC);
159
160 /* A synchronous command can not have a callback set. */
161 BUG_ON(cmd->callback);
162
163 D_INFO("Attempting to send sync command %s\n",
164 il_get_cmd_string(cmd->id));
165
166 set_bit(S_HCMD_ACTIVE, &il->status);
167 D_INFO("Setting HCMD_ACTIVE for command %s\n",
168 il_get_cmd_string(cmd->id));
169
170 cmd_idx = il_enqueue_hcmd(il, cmd);
171 if (cmd_idx < 0) {
172 ret = cmd_idx;
173 IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
174 il_get_cmd_string(cmd->id), ret);
175 goto out;
176 }
177
178 ret = wait_event_timeout(il->wait_command_queue,
179 !test_bit(S_HCMD_ACTIVE, &il->status),
180 HOST_COMPLETE_TIMEOUT);
181 if (!ret) {
182 if (test_bit(S_HCMD_ACTIVE, &il->status)) {
183 IL_ERR(
184 "Error sending %s: time out after %dms.\n",
185 il_get_cmd_string(cmd->id),
186 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
187
188 clear_bit(S_HCMD_ACTIVE, &il->status);
189 D_INFO(
190 "Clearing HCMD_ACTIVE for command %s\n",
191 il_get_cmd_string(cmd->id));
192 ret = -ETIMEDOUT;
193 goto cancel;
194 }
195 }
196
197 if (test_bit(S_RF_KILL_HW, &il->status)) {
198 IL_ERR("Command %s aborted: RF KILL Switch\n",
199 il_get_cmd_string(cmd->id));
200 ret = -ECANCELED;
201 goto fail;
202 }
203 if (test_bit(S_FW_ERROR, &il->status)) {
204 IL_ERR("Command %s failed: FW Error\n",
205 il_get_cmd_string(cmd->id));
206 ret = -EIO;
207 goto fail;
208 }
209 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
210 IL_ERR("Error: Response NULL in '%s'\n",
211 il_get_cmd_string(cmd->id));
212 ret = -EIO;
213 goto cancel;
214 }
215
216 ret = 0;
217 goto out;
218
219 cancel:
220 if (cmd->flags & CMD_WANT_SKB) {
221 /*
222 * Cancel the CMD_WANT_SKB flag for the cmd in the
223 * TX cmd queue. Otherwise in case the cmd comes
224 * in later, it will possibly set an invalid
225 * address (cmd->meta.source).
226 */
227 il->txq[il->cmd_queue].meta[cmd_idx].flags &=
228 ~CMD_WANT_SKB;
229 }
230 fail:
231 if (cmd->reply_page) {
232 il_free_pages(il, cmd->reply_page);
233 cmd->reply_page = 0;
234 }
235 out:
236 return ret;
237 }
238 EXPORT_SYMBOL(il_send_cmd_sync);
239
240 int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
241 {
242 if (cmd->flags & CMD_ASYNC)
243 return il_send_cmd_async(il, cmd);
244
245 return il_send_cmd_sync(il, cmd);
246 }
247 EXPORT_SYMBOL(il_send_cmd);
248
249 int
250 il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
251 {
252 struct il_host_cmd cmd = {
253 .id = id,
254 .len = len,
255 .data = data,
256 };
257
258 return il_send_cmd_sync(il, &cmd);
259 }
260 EXPORT_SYMBOL(il_send_cmd_pdu);
261
262 int il_send_cmd_pdu_async(struct il_priv *il,
263 u8 id, u16 len, const void *data,
264 void (*callback)(struct il_priv *il,
265 struct il_device_cmd *cmd,
266 struct il_rx_pkt *pkt))
267 {
268 struct il_host_cmd cmd = {
269 .id = id,
270 .len = len,
271 .data = data,
272 };
273
274 cmd.flags |= CMD_ASYNC;
275 cmd.callback = callback;
276
277 return il_send_cmd_async(il, &cmd);
278 }
279 EXPORT_SYMBOL(il_send_cmd_pdu_async);
280
281 /* default: IL_LED_BLINK(0) using blinking idx table */
282 static int led_mode;
283 module_param(led_mode, int, S_IRUGO);
284 MODULE_PARM_DESC(led_mode, "0=system default, "
285 "1=On(RF On)/Off(RF Off), 2=blinking");
286
287 /* Throughput OFF time(ms) ON time (ms)
288 * >300 25 25
289 * >200 to 300 40 40
290 * >100 to 200 55 55
291 * >70 to 100 65 65
292 * >50 to 70 75 75
293 * >20 to 50 85 85
294 * >10 to 20 95 95
295 * >5 to 10 110 110
296 * >1 to 5 130 130
297 * >0 to 1 167 167
298 * <=0 SOLID ON
299 */
300 static const struct ieee80211_tpt_blink il_blink[] = {
301 { .throughput = 0, .blink_time = 334 },
302 { .throughput = 1 * 1024 - 1, .blink_time = 260 },
303 { .throughput = 5 * 1024 - 1, .blink_time = 220 },
304 { .throughput = 10 * 1024 - 1, .blink_time = 190 },
305 { .throughput = 20 * 1024 - 1, .blink_time = 170 },
306 { .throughput = 50 * 1024 - 1, .blink_time = 150 },
307 { .throughput = 70 * 1024 - 1, .blink_time = 130 },
308 { .throughput = 100 * 1024 - 1, .blink_time = 110 },
309 { .throughput = 200 * 1024 - 1, .blink_time = 80 },
310 { .throughput = 300 * 1024 - 1, .blink_time = 50 },
311 };
312
313 /*
314 * Adjust led blink rate to compensate on a MAC Clock difference on every HW
315 * Led blink rate analysis showed an average deviation of 0% on 3945,
316 * 5% on 4965 HW.
317 * Need to compensate on the led on/off time per HW according to the deviation
318 * to achieve the desired led frequency
319 * The calculation is: (100-averageDeviation)/100 * blinkTime
320 * For code efficiency the calculation will be:
321 * compensation = (100 - averageDeviation) * 64 / 100
322 * NewBlinkTime = (compensation * BlinkTime) / 64
323 */
324 static inline u8 il_blink_compensation(struct il_priv *il,
325 u8 time, u16 compensation)
326 {
327 if (!compensation) {
328 IL_ERR("undefined blink compensation: "
329 "use pre-defined blinking time\n");
330 return time;
331 }
332
333 return (u8)((time * compensation) >> 6);
334 }
335
336 /* Set led pattern command */
337 static int il_led_cmd(struct il_priv *il,
338 unsigned long on,
339 unsigned long off)
340 {
341 struct il_led_cmd led_cmd = {
342 .id = IL_LED_LINK,
343 .interval = IL_DEF_LED_INTRVL
344 };
345 int ret;
346
347 if (!test_bit(S_READY, &il->status))
348 return -EBUSY;
349
350 if (il->blink_on == on && il->blink_off == off)
351 return 0;
352
353 if (off == 0) {
354 /* led is SOLID_ON */
355 on = IL_LED_SOLID;
356 }
357
358 D_LED("Led blink time compensation=%u\n",
359 il->cfg->base_params->led_compensation);
360 led_cmd.on = il_blink_compensation(il, on,
361 il->cfg->base_params->led_compensation);
362 led_cmd.off = il_blink_compensation(il, off,
363 il->cfg->base_params->led_compensation);
364
365 ret = il->cfg->ops->led->cmd(il, &led_cmd);
366 if (!ret) {
367 il->blink_on = on;
368 il->blink_off = off;
369 }
370 return ret;
371 }
372
373 static void il_led_brightness_set(struct led_classdev *led_cdev,
374 enum led_brightness brightness)
375 {
376 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
377 unsigned long on = 0;
378
379 if (brightness > 0)
380 on = IL_LED_SOLID;
381
382 il_led_cmd(il, on, 0);
383 }
384
385 static int il_led_blink_set(struct led_classdev *led_cdev,
386 unsigned long *delay_on,
387 unsigned long *delay_off)
388 {
389 struct il_priv *il = container_of(led_cdev, struct il_priv, led);
390
391 return il_led_cmd(il, *delay_on, *delay_off);
392 }
393
394 void il_leds_init(struct il_priv *il)
395 {
396 int mode = led_mode;
397 int ret;
398
399 if (mode == IL_LED_DEFAULT)
400 mode = il->cfg->led_mode;
401
402 il->led.name = kasprintf(GFP_KERNEL, "%s-led",
403 wiphy_name(il->hw->wiphy));
404 il->led.brightness_set = il_led_brightness_set;
405 il->led.blink_set = il_led_blink_set;
406 il->led.max_brightness = 1;
407
408 switch (mode) {
409 case IL_LED_DEFAULT:
410 WARN_ON(1);
411 break;
412 case IL_LED_BLINK:
413 il->led.default_trigger =
414 ieee80211_create_tpt_led_trigger(il->hw,
415 IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
416 il_blink, ARRAY_SIZE(il_blink));
417 break;
418 case IL_LED_RF_STATE:
419 il->led.default_trigger =
420 ieee80211_get_radio_led_name(il->hw);
421 break;
422 }
423
424 ret = led_classdev_register(&il->pci_dev->dev, &il->led);
425 if (ret) {
426 kfree(il->led.name);
427 return;
428 }
429
430 il->led_registered = true;
431 }
432 EXPORT_SYMBOL(il_leds_init);
433
434 void il_leds_exit(struct il_priv *il)
435 {
436 if (!il->led_registered)
437 return;
438
439 led_classdev_unregister(&il->led);
440 kfree(il->led.name);
441 }
442 EXPORT_SYMBOL(il_leds_exit);
443
444 /************************** EEPROM BANDS ****************************
445 *
446 * The il_eeprom_band definitions below provide the mapping from the
447 * EEPROM contents to the specific channel number supported for each
448 * band.
449 *
450 * For example, il_priv->eeprom.band_3_channels[4] from the band_3
451 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
452 * The specific geography and calibration information for that channel
453 * is contained in the eeprom map itself.
454 *
455 * During init, we copy the eeprom information and channel map
456 * information into il->channel_info_24/52 and il->channel_map_24/52
457 *
458 * channel_map_24/52 provides the idx in the channel_info array for a
459 * given channel. We have to have two separate maps as there is channel
460 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
461 * band_2
462 *
463 * A value of 0xff stored in the channel_map indicates that the channel
464 * is not supported by the hardware at all.
465 *
466 * A value of 0xfe in the channel_map indicates that the channel is not
467 * valid for Tx with the current hardware. This means that
468 * while the system can tune and receive on a given channel, it may not
469 * be able to associate or transmit any frames on that
470 * channel. There is no corresponding channel information for that
471 * entry.
472 *
473 *********************************************************************/
474
475 /* 2.4 GHz */
476 const u8 il_eeprom_band_1[14] = {
477 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
478 };
479
480 /* 5.2 GHz bands */
481 static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
482 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
483 };
484
485 static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
486 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
487 };
488
489 static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
490 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
491 };
492
493 static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
494 145, 149, 153, 157, 161, 165
495 };
496
497 static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
498 1, 2, 3, 4, 5, 6, 7
499 };
500
501 static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
502 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
503 };
504
505 /******************************************************************************
506 *
507 * EEPROM related functions
508 *
509 ******************************************************************************/
510
511 static int il_eeprom_verify_signature(struct il_priv *il)
512 {
513 u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
514 int ret = 0;
515
516 D_EEPROM("EEPROM signature=0x%08x\n", gp);
517 switch (gp) {
518 case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
519 case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
520 break;
521 default:
522 IL_ERR("bad EEPROM signature,"
523 "EEPROM_GP=0x%08x\n", gp);
524 ret = -ENOENT;
525 break;
526 }
527 return ret;
528 }
529
530 const u8
531 *il_eeprom_query_addr(const struct il_priv *il, size_t offset)
532 {
533 BUG_ON(offset >= il->cfg->base_params->eeprom_size);
534 return &il->eeprom[offset];
535 }
536 EXPORT_SYMBOL(il_eeprom_query_addr);
537
538 u16 il_eeprom_query16(const struct il_priv *il, size_t offset)
539 {
540 if (!il->eeprom)
541 return 0;
542 return (u16)il->eeprom[offset] | ((u16)il->eeprom[offset + 1] << 8);
543 }
544 EXPORT_SYMBOL(il_eeprom_query16);
545
546 /**
547 * il_eeprom_init - read EEPROM contents
548 *
549 * Load the EEPROM contents from adapter into il->eeprom
550 *
551 * NOTE: This routine uses the non-debug IO access functions.
552 */
553 int il_eeprom_init(struct il_priv *il)
554 {
555 __le16 *e;
556 u32 gp = _il_rd(il, CSR_EEPROM_GP);
557 int sz;
558 int ret;
559 u16 addr;
560
561 /* allocate eeprom */
562 sz = il->cfg->base_params->eeprom_size;
563 D_EEPROM("NVM size = %d\n", sz);
564 il->eeprom = kzalloc(sz, GFP_KERNEL);
565 if (!il->eeprom) {
566 ret = -ENOMEM;
567 goto alloc_err;
568 }
569 e = (__le16 *)il->eeprom;
570
571 il->cfg->ops->lib->apm_ops.init(il);
572
573 ret = il_eeprom_verify_signature(il);
574 if (ret < 0) {
575 IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
576 ret = -ENOENT;
577 goto err;
578 }
579
580 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
581 ret = il->cfg->ops->lib->eeprom_ops.acquire_semaphore(il);
582 if (ret < 0) {
583 IL_ERR("Failed to acquire EEPROM semaphore.\n");
584 ret = -ENOENT;
585 goto err;
586 }
587
588 /* eeprom is an array of 16bit values */
589 for (addr = 0; addr < sz; addr += sizeof(u16)) {
590 u32 r;
591
592 _il_wr(il, CSR_EEPROM_REG,
593 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
594
595 ret = _il_poll_bit(il, CSR_EEPROM_REG,
596 CSR_EEPROM_REG_READ_VALID_MSK,
597 CSR_EEPROM_REG_READ_VALID_MSK,
598 IL_EEPROM_ACCESS_TIMEOUT);
599 if (ret < 0) {
600 IL_ERR("Time out reading EEPROM[%d]\n",
601 addr);
602 goto done;
603 }
604 r = _il_rd(il, CSR_EEPROM_REG);
605 e[addr / 2] = cpu_to_le16(r >> 16);
606 }
607
608 D_EEPROM("NVM Type: %s, version: 0x%x\n",
609 "EEPROM",
610 il_eeprom_query16(il, EEPROM_VERSION));
611
612 ret = 0;
613 done:
614 il->cfg->ops->lib->eeprom_ops.release_semaphore(il);
615
616 err:
617 if (ret)
618 il_eeprom_free(il);
619 /* Reset chip to save power until we load uCode during "up". */
620 il_apm_stop(il);
621 alloc_err:
622 return ret;
623 }
624 EXPORT_SYMBOL(il_eeprom_init);
625
626 void il_eeprom_free(struct il_priv *il)
627 {
628 kfree(il->eeprom);
629 il->eeprom = NULL;
630 }
631 EXPORT_SYMBOL(il_eeprom_free);
632
633 static void il_init_band_reference(const struct il_priv *il,
634 int eep_band, int *eeprom_ch_count,
635 const struct il_eeprom_channel **eeprom_ch_info,
636 const u8 **eeprom_ch_idx)
637 {
638 u32 offset = il->cfg->ops->lib->
639 eeprom_ops.regulatory_bands[eep_band - 1];
640 switch (eep_band) {
641 case 1: /* 2.4GHz band */
642 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
643 *eeprom_ch_info = (struct il_eeprom_channel *)
644 il_eeprom_query_addr(il, offset);
645 *eeprom_ch_idx = il_eeprom_band_1;
646 break;
647 case 2: /* 4.9GHz band */
648 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
649 *eeprom_ch_info = (struct il_eeprom_channel *)
650 il_eeprom_query_addr(il, offset);
651 *eeprom_ch_idx = il_eeprom_band_2;
652 break;
653 case 3: /* 5.2GHz band */
654 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
655 *eeprom_ch_info = (struct il_eeprom_channel *)
656 il_eeprom_query_addr(il, offset);
657 *eeprom_ch_idx = il_eeprom_band_3;
658 break;
659 case 4: /* 5.5GHz band */
660 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
661 *eeprom_ch_info = (struct il_eeprom_channel *)
662 il_eeprom_query_addr(il, offset);
663 *eeprom_ch_idx = il_eeprom_band_4;
664 break;
665 case 5: /* 5.7GHz band */
666 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
667 *eeprom_ch_info = (struct il_eeprom_channel *)
668 il_eeprom_query_addr(il, offset);
669 *eeprom_ch_idx = il_eeprom_band_5;
670 break;
671 case 6: /* 2.4GHz ht40 channels */
672 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
673 *eeprom_ch_info = (struct il_eeprom_channel *)
674 il_eeprom_query_addr(il, offset);
675 *eeprom_ch_idx = il_eeprom_band_6;
676 break;
677 case 7: /* 5 GHz ht40 channels */
678 *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
679 *eeprom_ch_info = (struct il_eeprom_channel *)
680 il_eeprom_query_addr(il, offset);
681 *eeprom_ch_idx = il_eeprom_band_7;
682 break;
683 default:
684 BUG();
685 }
686 }
687
688 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
689 ? # x " " : "")
690 /**
691 * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
692 *
693 * Does not set up a command, or touch hardware.
694 */
695 static int il_mod_ht40_chan_info(struct il_priv *il,
696 enum ieee80211_band band, u16 channel,
697 const struct il_eeprom_channel *eeprom_ch,
698 u8 clear_ht40_extension_channel)
699 {
700 struct il_channel_info *ch_info;
701
702 ch_info = (struct il_channel_info *)
703 il_get_channel_info(il, band, channel);
704
705 if (!il_is_channel_valid(ch_info))
706 return -1;
707
708 D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
709 " Ad-Hoc %ssupported\n",
710 ch_info->channel,
711 il_is_channel_a_band(ch_info) ?
712 "5.2" : "2.4",
713 CHECK_AND_PRINT(IBSS),
714 CHECK_AND_PRINT(ACTIVE),
715 CHECK_AND_PRINT(RADAR),
716 CHECK_AND_PRINT(WIDE),
717 CHECK_AND_PRINT(DFS),
718 eeprom_ch->flags,
719 eeprom_ch->max_power_avg,
720 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
721 && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
722 "" : "not ");
723
724 ch_info->ht40_eeprom = *eeprom_ch;
725 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
726 ch_info->ht40_flags = eeprom_ch->flags;
727 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
728 ch_info->ht40_extension_channel &=
729 ~clear_ht40_extension_channel;
730
731 return 0;
732 }
733
734 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
735 ? # x " " : "")
736
737 /**
738 * il_init_channel_map - Set up driver's info for all possible channels
739 */
740 int il_init_channel_map(struct il_priv *il)
741 {
742 int eeprom_ch_count = 0;
743 const u8 *eeprom_ch_idx = NULL;
744 const struct il_eeprom_channel *eeprom_ch_info = NULL;
745 int band, ch;
746 struct il_channel_info *ch_info;
747
748 if (il->channel_count) {
749 D_EEPROM("Channel map already initialized.\n");
750 return 0;
751 }
752
753 D_EEPROM("Initializing regulatory info from EEPROM\n");
754
755 il->channel_count =
756 ARRAY_SIZE(il_eeprom_band_1) +
757 ARRAY_SIZE(il_eeprom_band_2) +
758 ARRAY_SIZE(il_eeprom_band_3) +
759 ARRAY_SIZE(il_eeprom_band_4) +
760 ARRAY_SIZE(il_eeprom_band_5);
761
762 D_EEPROM("Parsing data for %d channels.\n",
763 il->channel_count);
764
765 il->channel_info = kzalloc(sizeof(struct il_channel_info) *
766 il->channel_count, GFP_KERNEL);
767 if (!il->channel_info) {
768 IL_ERR("Could not allocate channel_info\n");
769 il->channel_count = 0;
770 return -ENOMEM;
771 }
772
773 ch_info = il->channel_info;
774
775 /* Loop through the 5 EEPROM bands adding them in order to the
776 * channel map we maintain (that contains additional information than
777 * what just in the EEPROM) */
778 for (band = 1; band <= 5; band++) {
779
780 il_init_band_reference(il, band, &eeprom_ch_count,
781 &eeprom_ch_info, &eeprom_ch_idx);
782
783 /* Loop through each band adding each of the channels */
784 for (ch = 0; ch < eeprom_ch_count; ch++) {
785 ch_info->channel = eeprom_ch_idx[ch];
786 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
787 IEEE80211_BAND_5GHZ;
788
789 /* permanently store EEPROM's channel regulatory flags
790 * and max power in channel info database. */
791 ch_info->eeprom = eeprom_ch_info[ch];
792
793 /* Copy the run-time flags so they are there even on
794 * invalid channels */
795 ch_info->flags = eeprom_ch_info[ch].flags;
796 /* First write that ht40 is not enabled, and then enable
797 * one by one */
798 ch_info->ht40_extension_channel =
799 IEEE80211_CHAN_NO_HT40;
800
801 if (!(il_is_channel_valid(ch_info))) {
802 D_EEPROM(
803 "Ch. %d Flags %x [%sGHz] - "
804 "No traffic\n",
805 ch_info->channel,
806 ch_info->flags,
807 il_is_channel_a_band(ch_info) ?
808 "5.2" : "2.4");
809 ch_info++;
810 continue;
811 }
812
813 /* Initialize regulatory-based run-time data */
814 ch_info->max_power_avg = ch_info->curr_txpow =
815 eeprom_ch_info[ch].max_power_avg;
816 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
817 ch_info->min_power = 0;
818
819 D_EEPROM("Ch. %d [%sGHz] "
820 "%s%s%s%s%s%s(0x%02x %ddBm):"
821 " Ad-Hoc %ssupported\n",
822 ch_info->channel,
823 il_is_channel_a_band(ch_info) ?
824 "5.2" : "2.4",
825 CHECK_AND_PRINT_I(VALID),
826 CHECK_AND_PRINT_I(IBSS),
827 CHECK_AND_PRINT_I(ACTIVE),
828 CHECK_AND_PRINT_I(RADAR),
829 CHECK_AND_PRINT_I(WIDE),
830 CHECK_AND_PRINT_I(DFS),
831 eeprom_ch_info[ch].flags,
832 eeprom_ch_info[ch].max_power_avg,
833 ((eeprom_ch_info[ch].
834 flags & EEPROM_CHANNEL_IBSS)
835 && !(eeprom_ch_info[ch].
836 flags & EEPROM_CHANNEL_RADAR))
837 ? "" : "not ");
838
839 ch_info++;
840 }
841 }
842
843 /* Check if we do have HT40 channels */
844 if (il->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
845 EEPROM_REGULATORY_BAND_NO_HT40 &&
846 il->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
847 EEPROM_REGULATORY_BAND_NO_HT40)
848 return 0;
849
850 /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
851 for (band = 6; band <= 7; band++) {
852 enum ieee80211_band ieeeband;
853
854 il_init_band_reference(il, band, &eeprom_ch_count,
855 &eeprom_ch_info, &eeprom_ch_idx);
856
857 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
858 ieeeband =
859 (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
860
861 /* Loop through each band adding each of the channels */
862 for (ch = 0; ch < eeprom_ch_count; ch++) {
863 /* Set up driver's info for lower half */
864 il_mod_ht40_chan_info(il, ieeeband,
865 eeprom_ch_idx[ch],
866 &eeprom_ch_info[ch],
867 IEEE80211_CHAN_NO_HT40PLUS);
868
869 /* Set up driver's info for upper half */
870 il_mod_ht40_chan_info(il, ieeeband,
871 eeprom_ch_idx[ch] + 4,
872 &eeprom_ch_info[ch],
873 IEEE80211_CHAN_NO_HT40MINUS);
874 }
875 }
876
877 return 0;
878 }
879 EXPORT_SYMBOL(il_init_channel_map);
880
881 /*
882 * il_free_channel_map - undo allocations in il_init_channel_map
883 */
884 void il_free_channel_map(struct il_priv *il)
885 {
886 kfree(il->channel_info);
887 il->channel_count = 0;
888 }
889 EXPORT_SYMBOL(il_free_channel_map);
890
891 /**
892 * il_get_channel_info - Find driver's ilate channel info
893 *
894 * Based on band and channel number.
895 */
896 const struct
897 il_channel_info *il_get_channel_info(const struct il_priv *il,
898 enum ieee80211_band band, u16 channel)
899 {
900 int i;
901
902 switch (band) {
903 case IEEE80211_BAND_5GHZ:
904 for (i = 14; i < il->channel_count; i++) {
905 if (il->channel_info[i].channel == channel)
906 return &il->channel_info[i];
907 }
908 break;
909 case IEEE80211_BAND_2GHZ:
910 if (channel >= 1 && channel <= 14)
911 return &il->channel_info[channel - 1];
912 break;
913 default:
914 BUG();
915 }
916
917 return NULL;
918 }
919 EXPORT_SYMBOL(il_get_channel_info);
920
921 /*
922 * Setting power level allows the card to go to sleep when not busy.
923 *
924 * We calculate a sleep command based on the required latency, which
925 * we get from mac80211. In order to handle thermal throttling, we can
926 * also use pre-defined power levels.
927 */
928
929 /*
930 * This defines the old power levels. They are still used by default
931 * (level 1) and for thermal throttle (levels 3 through 5)
932 */
933
934 struct il_power_vec_entry {
935 struct il_powertable_cmd cmd;
936 u8 no_dtim; /* number of skip dtim */
937 };
938
939 static void il_power_sleep_cam_cmd(struct il_priv *il,
940 struct il_powertable_cmd *cmd)
941 {
942 memset(cmd, 0, sizeof(*cmd));
943
944 if (il->power_data.pci_pm)
945 cmd->flags |= IL_POWER_PCI_PM_MSK;
946
947 D_POWER("Sleep command for CAM\n");
948 }
949
950 static int
951 il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
952 {
953 D_POWER("Sending power/sleep command\n");
954 D_POWER("Flags value = 0x%08X\n", cmd->flags);
955 D_POWER("Tx timeout = %u\n",
956 le32_to_cpu(cmd->tx_data_timeout));
957 D_POWER("Rx timeout = %u\n",
958 le32_to_cpu(cmd->rx_data_timeout));
959 D_POWER(
960 "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
961 le32_to_cpu(cmd->sleep_interval[0]),
962 le32_to_cpu(cmd->sleep_interval[1]),
963 le32_to_cpu(cmd->sleep_interval[2]),
964 le32_to_cpu(cmd->sleep_interval[3]),
965 le32_to_cpu(cmd->sleep_interval[4]));
966
967 return il_send_cmd_pdu(il, C_POWER_TBL,
968 sizeof(struct il_powertable_cmd), cmd);
969 }
970
971 int
972 il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd,
973 bool force)
974 {
975 int ret;
976 bool update_chains;
977
978 lockdep_assert_held(&il->mutex);
979
980 /* Don't update the RX chain when chain noise calibration is running */
981 update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
982 il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
983
984 if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
985 return 0;
986
987 if (!il_is_ready_rf(il))
988 return -EIO;
989
990 /* scan complete use sleep_power_next, need to be updated */
991 memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
992 if (test_bit(S_SCANNING, &il->status) && !force) {
993 D_INFO("Defer power set mode while scanning\n");
994 return 0;
995 }
996
997 if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
998 set_bit(S_POWER_PMI, &il->status);
999
1000 ret = il_set_power(il, cmd);
1001 if (!ret) {
1002 if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
1003 clear_bit(S_POWER_PMI, &il->status);
1004
1005 if (il->cfg->ops->lib->update_chain_flags && update_chains)
1006 il->cfg->ops->lib->update_chain_flags(il);
1007 else if (il->cfg->ops->lib->update_chain_flags)
1008 D_POWER(
1009 "Cannot update the power, chain noise "
1010 "calibration running: %d\n",
1011 il->chain_noise_data.state);
1012
1013 memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
1014 } else
1015 IL_ERR("set power fail, ret = %d", ret);
1016
1017 return ret;
1018 }
1019
1020 int il_power_update_mode(struct il_priv *il, bool force)
1021 {
1022 struct il_powertable_cmd cmd;
1023
1024 il_power_sleep_cam_cmd(il, &cmd);
1025 return il_power_set_mode(il, &cmd, force);
1026 }
1027 EXPORT_SYMBOL(il_power_update_mode);
1028
1029 /* initialize to default */
1030 void il_power_initialize(struct il_priv *il)
1031 {
1032 u16 lctl = il_pcie_link_ctl(il);
1033
1034 il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
1035
1036 il->power_data.debug_sleep_level_override = -1;
1037
1038 memset(&il->power_data.sleep_cmd, 0,
1039 sizeof(il->power_data.sleep_cmd));
1040 }
1041 EXPORT_SYMBOL(il_power_initialize);
1042
1043 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
1044 * sending probe req. This should be set long enough to hear probe responses
1045 * from more than one AP. */
1046 #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
1047 #define IL_ACTIVE_DWELL_TIME_52 (20)
1048
1049 #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
1050 #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
1051
1052 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
1053 * Must be set longer than active dwell time.
1054 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
1055 #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
1056 #define IL_PASSIVE_DWELL_TIME_52 (10)
1057 #define IL_PASSIVE_DWELL_BASE (100)
1058 #define IL_CHANNEL_TUNE_TIME 5
1059
1060 static int il_send_scan_abort(struct il_priv *il)
1061 {
1062 int ret;
1063 struct il_rx_pkt *pkt;
1064 struct il_host_cmd cmd = {
1065 .id = C_SCAN_ABORT,
1066 .flags = CMD_WANT_SKB,
1067 };
1068
1069 /* Exit instantly with error when device is not ready
1070 * to receive scan abort command or it does not perform
1071 * hardware scan currently */
1072 if (!test_bit(S_READY, &il->status) ||
1073 !test_bit(S_GEO_CONFIGURED, &il->status) ||
1074 !test_bit(S_SCAN_HW, &il->status) ||
1075 test_bit(S_FW_ERROR, &il->status) ||
1076 test_bit(S_EXIT_PENDING, &il->status))
1077 return -EIO;
1078
1079 ret = il_send_cmd_sync(il, &cmd);
1080 if (ret)
1081 return ret;
1082
1083 pkt = (struct il_rx_pkt *)cmd.reply_page;
1084 if (pkt->u.status != CAN_ABORT_STATUS) {
1085 /* The scan abort will return 1 for success or
1086 * 2 for "failure". A failure condition can be
1087 * due to simply not being in an active scan which
1088 * can occur if we send the scan abort before we
1089 * the microcode has notified us that a scan is
1090 * completed. */
1091 D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
1092 ret = -EIO;
1093 }
1094
1095 il_free_pages(il, cmd.reply_page);
1096 return ret;
1097 }
1098
1099 static void il_complete_scan(struct il_priv *il, bool aborted)
1100 {
1101 /* check if scan was requested from mac80211 */
1102 if (il->scan_request) {
1103 D_SCAN("Complete scan in mac80211\n");
1104 ieee80211_scan_completed(il->hw, aborted);
1105 }
1106
1107 il->scan_vif = NULL;
1108 il->scan_request = NULL;
1109 }
1110
1111 void il_force_scan_end(struct il_priv *il)
1112 {
1113 lockdep_assert_held(&il->mutex);
1114
1115 if (!test_bit(S_SCANNING, &il->status)) {
1116 D_SCAN("Forcing scan end while not scanning\n");
1117 return;
1118 }
1119
1120 D_SCAN("Forcing scan end\n");
1121 clear_bit(S_SCANNING, &il->status);
1122 clear_bit(S_SCAN_HW, &il->status);
1123 clear_bit(S_SCAN_ABORTING, &il->status);
1124 il_complete_scan(il, true);
1125 }
1126
1127 static void il_do_scan_abort(struct il_priv *il)
1128 {
1129 int ret;
1130
1131 lockdep_assert_held(&il->mutex);
1132
1133 if (!test_bit(S_SCANNING, &il->status)) {
1134 D_SCAN("Not performing scan to abort\n");
1135 return;
1136 }
1137
1138 if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
1139 D_SCAN("Scan abort in progress\n");
1140 return;
1141 }
1142
1143 ret = il_send_scan_abort(il);
1144 if (ret) {
1145 D_SCAN("Send scan abort failed %d\n", ret);
1146 il_force_scan_end(il);
1147 } else
1148 D_SCAN("Successfully send scan abort\n");
1149 }
1150
1151 /**
1152 * il_scan_cancel - Cancel any currently executing HW scan
1153 */
1154 int il_scan_cancel(struct il_priv *il)
1155 {
1156 D_SCAN("Queuing abort scan\n");
1157 queue_work(il->workqueue, &il->abort_scan);
1158 return 0;
1159 }
1160 EXPORT_SYMBOL(il_scan_cancel);
1161
1162 /**
1163 * il_scan_cancel_timeout - Cancel any currently executing HW scan
1164 * @ms: amount of time to wait (in milliseconds) for scan to abort
1165 *
1166 */
1167 int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
1168 {
1169 unsigned long timeout = jiffies + msecs_to_jiffies(ms);
1170
1171 lockdep_assert_held(&il->mutex);
1172
1173 D_SCAN("Scan cancel timeout\n");
1174
1175 il_do_scan_abort(il);
1176
1177 while (time_before_eq(jiffies, timeout)) {
1178 if (!test_bit(S_SCAN_HW, &il->status))
1179 break;
1180 msleep(20);
1181 }
1182
1183 return test_bit(S_SCAN_HW, &il->status);
1184 }
1185 EXPORT_SYMBOL(il_scan_cancel_timeout);
1186
1187 /* Service response to C_SCAN (0x80) */
1188 static void il_hdl_scan(struct il_priv *il,
1189 struct il_rx_buf *rxb)
1190 {
1191 #ifdef CONFIG_IWLEGACY_DEBUG
1192 struct il_rx_pkt *pkt = rxb_addr(rxb);
1193 struct il_scanreq_notification *notif =
1194 (struct il_scanreq_notification *)pkt->u.raw;
1195
1196 D_SCAN("Scan request status = 0x%x\n", notif->status);
1197 #endif
1198 }
1199
1200 /* Service N_SCAN_START (0x82) */
1201 static void il_hdl_scan_start(struct il_priv *il,
1202 struct il_rx_buf *rxb)
1203 {
1204 struct il_rx_pkt *pkt = rxb_addr(rxb);
1205 struct il_scanstart_notification *notif =
1206 (struct il_scanstart_notification *)pkt->u.raw;
1207 il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
1208 D_SCAN("Scan start: "
1209 "%d [802.11%s] "
1210 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
1211 notif->channel,
1212 notif->band ? "bg" : "a",
1213 le32_to_cpu(notif->tsf_high),
1214 le32_to_cpu(notif->tsf_low),
1215 notif->status, notif->beacon_timer);
1216 }
1217
1218 /* Service N_SCAN_RESULTS (0x83) */
1219 static void il_hdl_scan_results(struct il_priv *il,
1220 struct il_rx_buf *rxb)
1221 {
1222 #ifdef CONFIG_IWLEGACY_DEBUG
1223 struct il_rx_pkt *pkt = rxb_addr(rxb);
1224 struct il_scanresults_notification *notif =
1225 (struct il_scanresults_notification *)pkt->u.raw;
1226
1227 D_SCAN("Scan ch.res: "
1228 "%d [802.11%s] "
1229 "(TSF: 0x%08X:%08X) - %d "
1230 "elapsed=%lu usec\n",
1231 notif->channel,
1232 notif->band ? "bg" : "a",
1233 le32_to_cpu(notif->tsf_high),
1234 le32_to_cpu(notif->tsf_low),
1235 le32_to_cpu(notif->stats[0]),
1236 le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
1237 #endif
1238 }
1239
1240 /* Service N_SCAN_COMPLETE (0x84) */
1241 static void il_hdl_scan_complete(struct il_priv *il,
1242 struct il_rx_buf *rxb)
1243 {
1244
1245 #ifdef CONFIG_IWLEGACY_DEBUG
1246 struct il_rx_pkt *pkt = rxb_addr(rxb);
1247 struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
1248 #endif
1249
1250 D_SCAN(
1251 "Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
1252 scan_notif->scanned_channels,
1253 scan_notif->tsf_low,
1254 scan_notif->tsf_high, scan_notif->status);
1255
1256 /* The HW is no longer scanning */
1257 clear_bit(S_SCAN_HW, &il->status);
1258
1259 D_SCAN("Scan on %sGHz took %dms\n",
1260 (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
1261 jiffies_to_msecs(jiffies - il->scan_start));
1262
1263 queue_work(il->workqueue, &il->scan_completed);
1264 }
1265
1266 void il_setup_rx_scan_handlers(struct il_priv *il)
1267 {
1268 /* scan handlers */
1269 il->handlers[C_SCAN] = il_hdl_scan;
1270 il->handlers[N_SCAN_START] =
1271 il_hdl_scan_start;
1272 il->handlers[N_SCAN_RESULTS] =
1273 il_hdl_scan_results;
1274 il->handlers[N_SCAN_COMPLETE] =
1275 il_hdl_scan_complete;
1276 }
1277 EXPORT_SYMBOL(il_setup_rx_scan_handlers);
1278
1279 inline u16 il_get_active_dwell_time(struct il_priv *il,
1280 enum ieee80211_band band,
1281 u8 n_probes)
1282 {
1283 if (band == IEEE80211_BAND_5GHZ)
1284 return IL_ACTIVE_DWELL_TIME_52 +
1285 IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
1286 else
1287 return IL_ACTIVE_DWELL_TIME_24 +
1288 IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
1289 }
1290 EXPORT_SYMBOL(il_get_active_dwell_time);
1291
1292 u16 il_get_passive_dwell_time(struct il_priv *il,
1293 enum ieee80211_band band,
1294 struct ieee80211_vif *vif)
1295 {
1296 struct il_rxon_context *ctx = &il->ctx;
1297 u16 value;
1298
1299 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
1300 IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_24 :
1301 IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_52;
1302
1303 if (il_is_any_associated(il)) {
1304 /*
1305 * If we're associated, we clamp the maximum passive
1306 * dwell time to be 98% of the smallest beacon interval
1307 * (minus 2 * channel tune time)
1308 */
1309 value = ctx->vif ? ctx->vif->bss_conf.beacon_int : 0;
1310 if (value > IL_PASSIVE_DWELL_BASE || !value)
1311 value = IL_PASSIVE_DWELL_BASE;
1312 value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
1313 passive = min(value, passive);
1314 }
1315
1316 return passive;
1317 }
1318 EXPORT_SYMBOL(il_get_passive_dwell_time);
1319
1320 void il_init_scan_params(struct il_priv *il)
1321 {
1322 u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
1323 if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
1324 il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
1325 if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
1326 il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
1327 }
1328 EXPORT_SYMBOL(il_init_scan_params);
1329
1330 static int il_scan_initiate(struct il_priv *il,
1331 struct ieee80211_vif *vif)
1332 {
1333 int ret;
1334
1335 lockdep_assert_held(&il->mutex);
1336
1337 if (WARN_ON(!il->cfg->ops->utils->request_scan))
1338 return -EOPNOTSUPP;
1339
1340 cancel_delayed_work(&il->scan_check);
1341
1342 if (!il_is_ready_rf(il)) {
1343 IL_WARN("Request scan called when driver not ready.\n");
1344 return -EIO;
1345 }
1346
1347 if (test_bit(S_SCAN_HW, &il->status)) {
1348 D_SCAN(
1349 "Multiple concurrent scan requests in parallel.\n");
1350 return -EBUSY;
1351 }
1352
1353 if (test_bit(S_SCAN_ABORTING, &il->status)) {
1354 D_SCAN("Scan request while abort pending.\n");
1355 return -EBUSY;
1356 }
1357
1358 D_SCAN("Starting scan...\n");
1359
1360 set_bit(S_SCANNING, &il->status);
1361 il->scan_start = jiffies;
1362
1363 ret = il->cfg->ops->utils->request_scan(il, vif);
1364 if (ret) {
1365 clear_bit(S_SCANNING, &il->status);
1366 return ret;
1367 }
1368
1369 queue_delayed_work(il->workqueue, &il->scan_check,
1370 IL_SCAN_CHECK_WATCHDOG);
1371
1372 return 0;
1373 }
1374
1375 int il_mac_hw_scan(struct ieee80211_hw *hw,
1376 struct ieee80211_vif *vif,
1377 struct cfg80211_scan_request *req)
1378 {
1379 struct il_priv *il = hw->priv;
1380 int ret;
1381
1382 D_MAC80211("enter\n");
1383
1384 if (req->n_channels == 0)
1385 return -EINVAL;
1386
1387 mutex_lock(&il->mutex);
1388
1389 if (test_bit(S_SCANNING, &il->status)) {
1390 D_SCAN("Scan already in progress.\n");
1391 ret = -EAGAIN;
1392 goto out_unlock;
1393 }
1394
1395 /* mac80211 will only ask for one band at a time */
1396 il->scan_request = req;
1397 il->scan_vif = vif;
1398 il->scan_band = req->channels[0]->band;
1399
1400 ret = il_scan_initiate(il, vif);
1401
1402 D_MAC80211("leave\n");
1403
1404 out_unlock:
1405 mutex_unlock(&il->mutex);
1406
1407 return ret;
1408 }
1409 EXPORT_SYMBOL(il_mac_hw_scan);
1410
1411 static void il_bg_scan_check(struct work_struct *data)
1412 {
1413 struct il_priv *il =
1414 container_of(data, struct il_priv, scan_check.work);
1415
1416 D_SCAN("Scan check work\n");
1417
1418 /* Since we are here firmware does not finish scan and
1419 * most likely is in bad shape, so we don't bother to
1420 * send abort command, just force scan complete to mac80211 */
1421 mutex_lock(&il->mutex);
1422 il_force_scan_end(il);
1423 mutex_unlock(&il->mutex);
1424 }
1425
1426 /**
1427 * il_fill_probe_req - fill in all required fields and IE for probe request
1428 */
1429
1430 u16
1431 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1432 const u8 *ta, const u8 *ies, int ie_len, int left)
1433 {
1434 int len = 0;
1435 u8 *pos = NULL;
1436
1437 /* Make sure there is enough space for the probe request,
1438 * two mandatory IEs and the data */
1439 left -= 24;
1440 if (left < 0)
1441 return 0;
1442
1443 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1444 memcpy(frame->da, il_bcast_addr, ETH_ALEN);
1445 memcpy(frame->sa, ta, ETH_ALEN);
1446 memcpy(frame->bssid, il_bcast_addr, ETH_ALEN);
1447 frame->seq_ctrl = 0;
1448
1449 len += 24;
1450
1451 /* ...next IE... */
1452 pos = &frame->u.probe_req.variable[0];
1453
1454 /* fill in our indirect SSID IE */
1455 left -= 2;
1456 if (left < 0)
1457 return 0;
1458 *pos++ = WLAN_EID_SSID;
1459 *pos++ = 0;
1460
1461 len += 2;
1462
1463 if (WARN_ON(left < ie_len))
1464 return len;
1465
1466 if (ies && ie_len) {
1467 memcpy(pos, ies, ie_len);
1468 len += ie_len;
1469 }
1470
1471 return (u16)len;
1472 }
1473 EXPORT_SYMBOL(il_fill_probe_req);
1474
1475 static void il_bg_abort_scan(struct work_struct *work)
1476 {
1477 struct il_priv *il = container_of(work, struct il_priv, abort_scan);
1478
1479 D_SCAN("Abort scan work\n");
1480
1481 /* We keep scan_check work queued in case when firmware will not
1482 * report back scan completed notification */
1483 mutex_lock(&il->mutex);
1484 il_scan_cancel_timeout(il, 200);
1485 mutex_unlock(&il->mutex);
1486 }
1487
1488 static void il_bg_scan_completed(struct work_struct *work)
1489 {
1490 struct il_priv *il =
1491 container_of(work, struct il_priv, scan_completed);
1492 bool aborted;
1493
1494 D_SCAN("Completed scan.\n");
1495
1496 cancel_delayed_work(&il->scan_check);
1497
1498 mutex_lock(&il->mutex);
1499
1500 aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
1501 if (aborted)
1502 D_SCAN("Aborted scan completed.\n");
1503
1504 if (!test_and_clear_bit(S_SCANNING, &il->status)) {
1505 D_SCAN("Scan already completed.\n");
1506 goto out_settings;
1507 }
1508
1509 il_complete_scan(il, aborted);
1510
1511 out_settings:
1512 /* Can we still talk to firmware ? */
1513 if (!il_is_ready_rf(il))
1514 goto out;
1515
1516 /*
1517 * We do not commit power settings while scan is pending,
1518 * do it now if the settings changed.
1519 */
1520 il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
1521 il_set_tx_power(il, il->tx_power_next, false);
1522
1523 il->cfg->ops->utils->post_scan(il);
1524
1525 out:
1526 mutex_unlock(&il->mutex);
1527 }
1528
1529 void il_setup_scan_deferred_work(struct il_priv *il)
1530 {
1531 INIT_WORK(&il->scan_completed, il_bg_scan_completed);
1532 INIT_WORK(&il->abort_scan, il_bg_abort_scan);
1533 INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
1534 }
1535 EXPORT_SYMBOL(il_setup_scan_deferred_work);
1536
1537 void il_cancel_scan_deferred_work(struct il_priv *il)
1538 {
1539 cancel_work_sync(&il->abort_scan);
1540 cancel_work_sync(&il->scan_completed);
1541
1542 if (cancel_delayed_work_sync(&il->scan_check)) {
1543 mutex_lock(&il->mutex);
1544 il_force_scan_end(il);
1545 mutex_unlock(&il->mutex);
1546 }
1547 }
1548 EXPORT_SYMBOL(il_cancel_scan_deferred_work);
1549
1550 /* il->sta_lock must be held */
1551 static void il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
1552 {
1553
1554 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
1555 IL_ERR(
1556 "ACTIVATE a non DRIVER active station id %u addr %pM\n",
1557 sta_id, il->stations[sta_id].sta.sta.addr);
1558
1559 if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
1560 D_ASSOC(
1561 "STA id %u addr %pM already present"
1562 " in uCode (according to driver)\n",
1563 sta_id, il->stations[sta_id].sta.sta.addr);
1564 } else {
1565 il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
1566 D_ASSOC("Added STA id %u addr %pM to uCode\n",
1567 sta_id, il->stations[sta_id].sta.sta.addr);
1568 }
1569 }
1570
1571 static int il_process_add_sta_resp(struct il_priv *il,
1572 struct il_addsta_cmd *addsta,
1573 struct il_rx_pkt *pkt,
1574 bool sync)
1575 {
1576 u8 sta_id = addsta->sta.sta_id;
1577 unsigned long flags;
1578 int ret = -EIO;
1579
1580 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1581 IL_ERR("Bad return from C_ADD_STA (0x%08X)\n",
1582 pkt->hdr.flags);
1583 return ret;
1584 }
1585
1586 D_INFO("Processing response for adding station %u\n",
1587 sta_id);
1588
1589 spin_lock_irqsave(&il->sta_lock, flags);
1590
1591 switch (pkt->u.add_sta.status) {
1592 case ADD_STA_SUCCESS_MSK:
1593 D_INFO("C_ADD_STA PASSED\n");
1594 il_sta_ucode_activate(il, sta_id);
1595 ret = 0;
1596 break;
1597 case ADD_STA_NO_ROOM_IN_TBL:
1598 IL_ERR("Adding station %d failed, no room in table.\n",
1599 sta_id);
1600 break;
1601 case ADD_STA_NO_BLOCK_ACK_RESOURCE:
1602 IL_ERR(
1603 "Adding station %d failed, no block ack resource.\n",
1604 sta_id);
1605 break;
1606 case ADD_STA_MODIFY_NON_EXIST_STA:
1607 IL_ERR("Attempting to modify non-existing station %d\n",
1608 sta_id);
1609 break;
1610 default:
1611 D_ASSOC("Received C_ADD_STA:(0x%08X)\n",
1612 pkt->u.add_sta.status);
1613 break;
1614 }
1615
1616 D_INFO("%s station id %u addr %pM\n",
1617 il->stations[sta_id].sta.mode ==
1618 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
1619 sta_id, il->stations[sta_id].sta.sta.addr);
1620
1621 /*
1622 * XXX: The MAC address in the command buffer is often changed from
1623 * the original sent to the device. That is, the MAC address
1624 * written to the command buffer often is not the same MAC address
1625 * read from the command buffer when the command returns. This
1626 * issue has not yet been resolved and this debugging is left to
1627 * observe the problem.
1628 */
1629 D_INFO("%s station according to cmd buffer %pM\n",
1630 il->stations[sta_id].sta.mode ==
1631 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
1632 addsta->sta.addr);
1633 spin_unlock_irqrestore(&il->sta_lock, flags);
1634
1635 return ret;
1636 }
1637
1638 static void il_add_sta_callback(struct il_priv *il,
1639 struct il_device_cmd *cmd,
1640 struct il_rx_pkt *pkt)
1641 {
1642 struct il_addsta_cmd *addsta =
1643 (struct il_addsta_cmd *)cmd->cmd.payload;
1644
1645 il_process_add_sta_resp(il, addsta, pkt, false);
1646
1647 }
1648
1649 int il_send_add_sta(struct il_priv *il,
1650 struct il_addsta_cmd *sta, u8 flags)
1651 {
1652 struct il_rx_pkt *pkt = NULL;
1653 int ret = 0;
1654 u8 data[sizeof(*sta)];
1655 struct il_host_cmd cmd = {
1656 .id = C_ADD_STA,
1657 .flags = flags,
1658 .data = data,
1659 };
1660 u8 sta_id __maybe_unused = sta->sta.sta_id;
1661
1662 D_INFO("Adding sta %u (%pM) %ssynchronously\n",
1663 sta_id, sta->sta.addr, flags & CMD_ASYNC ? "a" : "");
1664
1665 if (flags & CMD_ASYNC)
1666 cmd.callback = il_add_sta_callback;
1667 else {
1668 cmd.flags |= CMD_WANT_SKB;
1669 might_sleep();
1670 }
1671
1672 cmd.len = il->cfg->ops->utils->build_addsta_hcmd(sta, data);
1673 ret = il_send_cmd(il, &cmd);
1674
1675 if (ret || (flags & CMD_ASYNC))
1676 return ret;
1677
1678 if (ret == 0) {
1679 pkt = (struct il_rx_pkt *)cmd.reply_page;
1680 ret = il_process_add_sta_resp(il, sta, pkt, true);
1681 }
1682 il_free_pages(il, cmd.reply_page);
1683
1684 return ret;
1685 }
1686 EXPORT_SYMBOL(il_send_add_sta);
1687
1688 static void il_set_ht_add_station(struct il_priv *il, u8 idx,
1689 struct ieee80211_sta *sta,
1690 struct il_rxon_context *ctx)
1691 {
1692 struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
1693 __le32 sta_flags;
1694 u8 mimo_ps_mode;
1695
1696 if (!sta || !sta_ht_inf->ht_supported)
1697 goto done;
1698
1699 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
1700 D_ASSOC("spatial multiplexing power save mode: %s\n",
1701 (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ?
1702 "static" :
1703 (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ?
1704 "dynamic" : "disabled");
1705
1706 sta_flags = il->stations[idx].sta.station_flags;
1707
1708 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
1709
1710 switch (mimo_ps_mode) {
1711 case WLAN_HT_CAP_SM_PS_STATIC:
1712 sta_flags |= STA_FLG_MIMO_DIS_MSK;
1713 break;
1714 case WLAN_HT_CAP_SM_PS_DYNAMIC:
1715 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
1716 break;
1717 case WLAN_HT_CAP_SM_PS_DISABLED:
1718 break;
1719 default:
1720 IL_WARN("Invalid MIMO PS mode %d\n", mimo_ps_mode);
1721 break;
1722 }
1723
1724 sta_flags |= cpu_to_le32(
1725 (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
1726
1727 sta_flags |= cpu_to_le32(
1728 (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
1729
1730 if (il_is_ht40_tx_allowed(il, ctx, &sta->ht_cap))
1731 sta_flags |= STA_FLG_HT40_EN_MSK;
1732 else
1733 sta_flags &= ~STA_FLG_HT40_EN_MSK;
1734
1735 il->stations[idx].sta.station_flags = sta_flags;
1736 done:
1737 return;
1738 }
1739
1740 /**
1741 * il_prep_station - Prepare station information for addition
1742 *
1743 * should be called with sta_lock held
1744 */
1745 u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx,
1746 const u8 *addr, bool is_ap, struct ieee80211_sta *sta)
1747 {
1748 struct il_station_entry *station;
1749 int i;
1750 u8 sta_id = IL_INVALID_STATION;
1751 u16 rate;
1752
1753 if (is_ap)
1754 sta_id = ctx->ap_sta_id;
1755 else if (is_broadcast_ether_addr(addr))
1756 sta_id = ctx->bcast_sta_id;
1757 else
1758 for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
1759 if (!compare_ether_addr(il->stations[i].sta.sta.addr,
1760 addr)) {
1761 sta_id = i;
1762 break;
1763 }
1764
1765 if (!il->stations[i].used &&
1766 sta_id == IL_INVALID_STATION)
1767 sta_id = i;
1768 }
1769
1770 /*
1771 * These two conditions have the same outcome, but keep them
1772 * separate
1773 */
1774 if (unlikely(sta_id == IL_INVALID_STATION))
1775 return sta_id;
1776
1777 /*
1778 * uCode is not able to deal with multiple requests to add a
1779 * station. Keep track if one is in progress so that we do not send
1780 * another.
1781 */
1782 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1783 D_INFO(
1784 "STA %d already in process of being added.\n",
1785 sta_id);
1786 return sta_id;
1787 }
1788
1789 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
1790 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
1791 !compare_ether_addr(il->stations[sta_id].sta.sta.addr, addr)) {
1792 D_ASSOC(
1793 "STA %d (%pM) already added, not adding again.\n",
1794 sta_id, addr);
1795 return sta_id;
1796 }
1797
1798 station = &il->stations[sta_id];
1799 station->used = IL_STA_DRIVER_ACTIVE;
1800 D_ASSOC("Add STA to driver ID %d: %pM\n",
1801 sta_id, addr);
1802 il->num_stations++;
1803
1804 /* Set up the C_ADD_STA command to send to device */
1805 memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
1806 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
1807 station->sta.mode = 0;
1808 station->sta.sta.sta_id = sta_id;
1809 station->sta.station_flags = ctx->station_flags;
1810 station->ctxid = ctx->ctxid;
1811
1812 if (sta) {
1813 struct il_station_priv_common *sta_priv;
1814
1815 sta_priv = (void *)sta->drv_priv;
1816 sta_priv->ctx = ctx;
1817 }
1818
1819 /*
1820 * OK to call unconditionally, since local stations (IBSS BSSID
1821 * STA and broadcast STA) pass in a NULL sta, and mac80211
1822 * doesn't allow HT IBSS.
1823 */
1824 il_set_ht_add_station(il, sta_id, sta, ctx);
1825
1826 /* 3945 only */
1827 rate = (il->band == IEEE80211_BAND_5GHZ) ?
1828 RATE_6M_PLCP : RATE_1M_PLCP;
1829 /* Turn on both antennas for the station... */
1830 station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
1831
1832 return sta_id;
1833
1834 }
1835 EXPORT_SYMBOL_GPL(il_prep_station);
1836
1837 #define STA_WAIT_TIMEOUT (HZ/2)
1838
1839 /**
1840 * il_add_station_common -
1841 */
1842 int
1843 il_add_station_common(struct il_priv *il,
1844 struct il_rxon_context *ctx,
1845 const u8 *addr, bool is_ap,
1846 struct ieee80211_sta *sta, u8 *sta_id_r)
1847 {
1848 unsigned long flags_spin;
1849 int ret = 0;
1850 u8 sta_id;
1851 struct il_addsta_cmd sta_cmd;
1852
1853 *sta_id_r = 0;
1854 spin_lock_irqsave(&il->sta_lock, flags_spin);
1855 sta_id = il_prep_station(il, ctx, addr, is_ap, sta);
1856 if (sta_id == IL_INVALID_STATION) {
1857 IL_ERR("Unable to prepare station %pM for addition\n",
1858 addr);
1859 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1860 return -EINVAL;
1861 }
1862
1863 /*
1864 * uCode is not able to deal with multiple requests to add a
1865 * station. Keep track if one is in progress so that we do not send
1866 * another.
1867 */
1868 if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1869 D_INFO(
1870 "STA %d already in process of being added.\n",
1871 sta_id);
1872 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1873 return -EEXIST;
1874 }
1875
1876 if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
1877 (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
1878 D_ASSOC(
1879 "STA %d (%pM) already added, not adding again.\n",
1880 sta_id, addr);
1881 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1882 return -EEXIST;
1883 }
1884
1885 il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
1886 memcpy(&sta_cmd, &il->stations[sta_id].sta,
1887 sizeof(struct il_addsta_cmd));
1888 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1889
1890 /* Add station to device's station table */
1891 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
1892 if (ret) {
1893 spin_lock_irqsave(&il->sta_lock, flags_spin);
1894 IL_ERR("Adding station %pM failed.\n",
1895 il->stations[sta_id].sta.sta.addr);
1896 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
1897 il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
1898 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1899 }
1900 *sta_id_r = sta_id;
1901 return ret;
1902 }
1903 EXPORT_SYMBOL(il_add_station_common);
1904
1905 /**
1906 * il_sta_ucode_deactivate - deactivate ucode status for a station
1907 *
1908 * il->sta_lock must be held
1909 */
1910 static void il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
1911 {
1912 /* Ucode must be active and driver must be non active */
1913 if ((il->stations[sta_id].used &
1914 (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
1915 IL_STA_UCODE_ACTIVE)
1916 IL_ERR("removed non active STA %u\n", sta_id);
1917
1918 il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
1919
1920 memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
1921 D_ASSOC("Removed STA %u\n", sta_id);
1922 }
1923
1924 static int il_send_remove_station(struct il_priv *il,
1925 const u8 *addr, int sta_id,
1926 bool temporary)
1927 {
1928 struct il_rx_pkt *pkt;
1929 int ret;
1930
1931 unsigned long flags_spin;
1932 struct il_rem_sta_cmd rm_sta_cmd;
1933
1934 struct il_host_cmd cmd = {
1935 .id = C_REM_STA,
1936 .len = sizeof(struct il_rem_sta_cmd),
1937 .flags = CMD_SYNC,
1938 .data = &rm_sta_cmd,
1939 };
1940
1941 memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
1942 rm_sta_cmd.num_sta = 1;
1943 memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
1944
1945 cmd.flags |= CMD_WANT_SKB;
1946
1947 ret = il_send_cmd(il, &cmd);
1948
1949 if (ret)
1950 return ret;
1951
1952 pkt = (struct il_rx_pkt *)cmd.reply_page;
1953 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1954 IL_ERR("Bad return from C_REM_STA (0x%08X)\n",
1955 pkt->hdr.flags);
1956 ret = -EIO;
1957 }
1958
1959 if (!ret) {
1960 switch (pkt->u.rem_sta.status) {
1961 case REM_STA_SUCCESS_MSK:
1962 if (!temporary) {
1963 spin_lock_irqsave(&il->sta_lock, flags_spin);
1964 il_sta_ucode_deactivate(il, sta_id);
1965 spin_unlock_irqrestore(&il->sta_lock,
1966 flags_spin);
1967 }
1968 D_ASSOC("C_REM_STA PASSED\n");
1969 break;
1970 default:
1971 ret = -EIO;
1972 IL_ERR("C_REM_STA failed\n");
1973 break;
1974 }
1975 }
1976 il_free_pages(il, cmd.reply_page);
1977
1978 return ret;
1979 }
1980
1981 /**
1982 * il_remove_station - Remove driver's knowledge of station.
1983 */
1984 int il_remove_station(struct il_priv *il, const u8 sta_id,
1985 const u8 *addr)
1986 {
1987 unsigned long flags;
1988
1989 if (!il_is_ready(il)) {
1990 D_INFO(
1991 "Unable to remove station %pM, device not ready.\n",
1992 addr);
1993 /*
1994 * It is typical for stations to be removed when we are
1995 * going down. Return success since device will be down
1996 * soon anyway
1997 */
1998 return 0;
1999 }
2000
2001 D_ASSOC("Removing STA from driver:%d %pM\n",
2002 sta_id, addr);
2003
2004 if (WARN_ON(sta_id == IL_INVALID_STATION))
2005 return -EINVAL;
2006
2007 spin_lock_irqsave(&il->sta_lock, flags);
2008
2009 if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2010 D_INFO("Removing %pM but non DRIVER active\n",
2011 addr);
2012 goto out_err;
2013 }
2014
2015 if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
2016 D_INFO("Removing %pM but non UCODE active\n",
2017 addr);
2018 goto out_err;
2019 }
2020
2021 if (il->stations[sta_id].used & IL_STA_LOCAL) {
2022 kfree(il->stations[sta_id].lq);
2023 il->stations[sta_id].lq = NULL;
2024 }
2025
2026 il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2027
2028 il->num_stations--;
2029
2030 BUG_ON(il->num_stations < 0);
2031
2032 spin_unlock_irqrestore(&il->sta_lock, flags);
2033
2034 return il_send_remove_station(il, addr, sta_id, false);
2035 out_err:
2036 spin_unlock_irqrestore(&il->sta_lock, flags);
2037 return -EINVAL;
2038 }
2039 EXPORT_SYMBOL_GPL(il_remove_station);
2040
2041 /**
2042 * il_clear_ucode_stations - clear ucode station table bits
2043 *
2044 * This function clears all the bits in the driver indicating
2045 * which stations are active in the ucode. Call when something
2046 * other than explicit station management would cause this in
2047 * the ucode, e.g. unassociated RXON.
2048 */
2049 void il_clear_ucode_stations(struct il_priv *il,
2050 struct il_rxon_context *ctx)
2051 {
2052 int i;
2053 unsigned long flags_spin;
2054 bool cleared = false;
2055
2056 D_INFO("Clearing ucode stations in driver\n");
2057
2058 spin_lock_irqsave(&il->sta_lock, flags_spin);
2059 for (i = 0; i < il->hw_params.max_stations; i++) {
2060 if (ctx && ctx->ctxid != il->stations[i].ctxid)
2061 continue;
2062
2063 if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
2064 D_INFO(
2065 "Clearing ucode active for station %d\n", i);
2066 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2067 cleared = true;
2068 }
2069 }
2070 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2071
2072 if (!cleared)
2073 D_INFO(
2074 "No active stations found to be cleared\n");
2075 }
2076 EXPORT_SYMBOL(il_clear_ucode_stations);
2077
2078 /**
2079 * il_restore_stations() - Restore driver known stations to device
2080 *
2081 * All stations considered active by driver, but not present in ucode, is
2082 * restored.
2083 *
2084 * Function sleeps.
2085 */
2086 void
2087 il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx)
2088 {
2089 struct il_addsta_cmd sta_cmd;
2090 struct il_link_quality_cmd lq;
2091 unsigned long flags_spin;
2092 int i;
2093 bool found = false;
2094 int ret;
2095 bool send_lq;
2096
2097 if (!il_is_ready(il)) {
2098 D_INFO(
2099 "Not ready yet, not restoring any stations.\n");
2100 return;
2101 }
2102
2103 D_ASSOC("Restoring all known stations ... start.\n");
2104 spin_lock_irqsave(&il->sta_lock, flags_spin);
2105 for (i = 0; i < il->hw_params.max_stations; i++) {
2106 if (ctx->ctxid != il->stations[i].ctxid)
2107 continue;
2108 if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
2109 !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
2110 D_ASSOC("Restoring sta %pM\n",
2111 il->stations[i].sta.sta.addr);
2112 il->stations[i].sta.mode = 0;
2113 il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
2114 found = true;
2115 }
2116 }
2117
2118 for (i = 0; i < il->hw_params.max_stations; i++) {
2119 if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
2120 memcpy(&sta_cmd, &il->stations[i].sta,
2121 sizeof(struct il_addsta_cmd));
2122 send_lq = false;
2123 if (il->stations[i].lq) {
2124 memcpy(&lq, il->stations[i].lq,
2125 sizeof(struct il_link_quality_cmd));
2126 send_lq = true;
2127 }
2128 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2129 ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2130 if (ret) {
2131 spin_lock_irqsave(&il->sta_lock, flags_spin);
2132 IL_ERR("Adding station %pM failed.\n",
2133 il->stations[i].sta.sta.addr);
2134 il->stations[i].used &=
2135 ~IL_STA_DRIVER_ACTIVE;
2136 il->stations[i].used &=
2137 ~IL_STA_UCODE_INPROGRESS;
2138 spin_unlock_irqrestore(&il->sta_lock,
2139 flags_spin);
2140 }
2141 /*
2142 * Rate scaling has already been initialized, send
2143 * current LQ command
2144 */
2145 if (send_lq)
2146 il_send_lq_cmd(il, ctx, &lq,
2147 CMD_SYNC, true);
2148 spin_lock_irqsave(&il->sta_lock, flags_spin);
2149 il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
2150 }
2151 }
2152
2153 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2154 if (!found)
2155 D_INFO("Restoring all known stations"
2156 " .... no stations to be restored.\n");
2157 else
2158 D_INFO("Restoring all known stations"
2159 " .... complete.\n");
2160 }
2161 EXPORT_SYMBOL(il_restore_stations);
2162
2163 int il_get_free_ucode_key_idx(struct il_priv *il)
2164 {
2165 int i;
2166
2167 for (i = 0; i < il->sta_key_max_num; i++)
2168 if (!test_and_set_bit(i, &il->ucode_key_table))
2169 return i;
2170
2171 return WEP_INVALID_OFFSET;
2172 }
2173 EXPORT_SYMBOL(il_get_free_ucode_key_idx);
2174
2175 void il_dealloc_bcast_stations(struct il_priv *il)
2176 {
2177 unsigned long flags;
2178 int i;
2179
2180 spin_lock_irqsave(&il->sta_lock, flags);
2181 for (i = 0; i < il->hw_params.max_stations; i++) {
2182 if (!(il->stations[i].used & IL_STA_BCAST))
2183 continue;
2184
2185 il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2186 il->num_stations--;
2187 BUG_ON(il->num_stations < 0);
2188 kfree(il->stations[i].lq);
2189 il->stations[i].lq = NULL;
2190 }
2191 spin_unlock_irqrestore(&il->sta_lock, flags);
2192 }
2193 EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
2194
2195 #ifdef CONFIG_IWLEGACY_DEBUG
2196 static void il_dump_lq_cmd(struct il_priv *il,
2197 struct il_link_quality_cmd *lq)
2198 {
2199 int i;
2200 D_RATE("lq station id 0x%x\n", lq->sta_id);
2201 D_RATE("lq ant 0x%X 0x%X\n",
2202 lq->general_params.single_stream_ant_msk,
2203 lq->general_params.dual_stream_ant_msk);
2204
2205 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
2206 D_RATE("lq idx %d 0x%X\n",
2207 i, lq->rs_table[i].rate_n_flags);
2208 }
2209 #else
2210 static inline void il_dump_lq_cmd(struct il_priv *il,
2211 struct il_link_quality_cmd *lq)
2212 {
2213 }
2214 #endif
2215
2216 /**
2217 * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
2218 *
2219 * It sometimes happens when a HT rate has been in use and we
2220 * loose connectivity with AP then mac80211 will first tell us that the
2221 * current channel is not HT anymore before removing the station. In such a
2222 * scenario the RXON flags will be updated to indicate we are not
2223 * communicating HT anymore, but the LQ command may still contain HT rates.
2224 * Test for this to prevent driver from sending LQ command between the time
2225 * RXON flags are updated and when LQ command is updated.
2226 */
2227 static bool il_is_lq_table_valid(struct il_priv *il,
2228 struct il_rxon_context *ctx,
2229 struct il_link_quality_cmd *lq)
2230 {
2231 int i;
2232
2233 if (ctx->ht.enabled)
2234 return true;
2235
2236 D_INFO("Channel %u is not an HT channel\n",
2237 ctx->active.channel);
2238 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
2239 if (le32_to_cpu(lq->rs_table[i].rate_n_flags) &
2240 RATE_MCS_HT_MSK) {
2241 D_INFO(
2242 "idx %d of LQ expects HT channel\n",
2243 i);
2244 return false;
2245 }
2246 }
2247 return true;
2248 }
2249
2250 /**
2251 * il_send_lq_cmd() - Send link quality command
2252 * @init: This command is sent as part of station initialization right
2253 * after station has been added.
2254 *
2255 * The link quality command is sent as the last step of station creation.
2256 * This is the special case in which init is set and we call a callback in
2257 * this case to clear the state indicating that station creation is in
2258 * progress.
2259 */
2260 int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx,
2261 struct il_link_quality_cmd *lq, u8 flags, bool init)
2262 {
2263 int ret = 0;
2264 unsigned long flags_spin;
2265
2266 struct il_host_cmd cmd = {
2267 .id = C_TX_LINK_QUALITY_CMD,
2268 .len = sizeof(struct il_link_quality_cmd),
2269 .flags = flags,
2270 .data = lq,
2271 };
2272
2273 if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
2274 return -EINVAL;
2275
2276
2277 spin_lock_irqsave(&il->sta_lock, flags_spin);
2278 if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2279 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2280 return -EINVAL;
2281 }
2282 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2283
2284 il_dump_lq_cmd(il, lq);
2285 BUG_ON(init && (cmd.flags & CMD_ASYNC));
2286
2287 if (il_is_lq_table_valid(il, ctx, lq))
2288 ret = il_send_cmd(il, &cmd);
2289 else
2290 ret = -EINVAL;
2291
2292 if (cmd.flags & CMD_ASYNC)
2293 return ret;
2294
2295 if (init) {
2296 D_INFO("init LQ command complete,"
2297 " clearing sta addition status for sta %d\n",
2298 lq->sta_id);
2299 spin_lock_irqsave(&il->sta_lock, flags_spin);
2300 il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2301 spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2302 }
2303 return ret;
2304 }
2305 EXPORT_SYMBOL(il_send_lq_cmd);
2306
2307 int il_mac_sta_remove(struct ieee80211_hw *hw,
2308 struct ieee80211_vif *vif,
2309 struct ieee80211_sta *sta)
2310 {
2311 struct il_priv *il = hw->priv;
2312 struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
2313 int ret;
2314
2315 D_INFO("received request to remove station %pM\n",
2316 sta->addr);
2317 mutex_lock(&il->mutex);
2318 D_INFO("proceeding to remove station %pM\n",
2319 sta->addr);
2320 ret = il_remove_station(il, sta_common->sta_id, sta->addr);
2321 if (ret)
2322 IL_ERR("Error removing station %pM\n",
2323 sta->addr);
2324 mutex_unlock(&il->mutex);
2325 return ret;
2326 }
2327 EXPORT_SYMBOL(il_mac_sta_remove);
2328
2329 /************************** RX-FUNCTIONS ****************************/
2330 /*
2331 * Rx theory of operation
2332 *
2333 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
2334 * each of which point to Receive Buffers to be filled by the NIC. These get
2335 * used not only for Rx frames, but for any command response or notification
2336 * from the NIC. The driver and NIC manage the Rx buffers by means
2337 * of idxes into the circular buffer.
2338 *
2339 * Rx Queue Indexes
2340 * The host/firmware share two idx registers for managing the Rx buffers.
2341 *
2342 * The READ idx maps to the first position that the firmware may be writing
2343 * to -- the driver can read up to (but not including) this position and get
2344 * good data.
2345 * The READ idx is managed by the firmware once the card is enabled.
2346 *
2347 * The WRITE idx maps to the last position the driver has read from -- the
2348 * position preceding WRITE is the last slot the firmware can place a packet.
2349 *
2350 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
2351 * WRITE = READ.
2352 *
2353 * During initialization, the host sets up the READ queue position to the first
2354 * IDX position, and WRITE to the last (READ - 1 wrapped)
2355 *
2356 * When the firmware places a packet in a buffer, it will advance the READ idx
2357 * and fire the RX interrupt. The driver can then query the READ idx and
2358 * process as many packets as possible, moving the WRITE idx forward as it
2359 * resets the Rx queue buffers with new memory.
2360 *
2361 * The management in the driver is as follows:
2362 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
2363 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
2364 * to replenish the iwl->rxq->rx_free.
2365 * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
2366 * iwl->rxq is replenished and the READ IDX is updated (updating the
2367 * 'processed' and 'read' driver idxes as well)
2368 * + A received packet is processed and handed to the kernel network stack,
2369 * detached from the iwl->rxq. The driver 'processed' idx is updated.
2370 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
2371 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
2372 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
2373 * were enough free buffers and RX_STALLED is set it is cleared.
2374 *
2375 *
2376 * Driver sequence:
2377 *
2378 * il_rx_queue_alloc() Allocates rx_free
2379 * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
2380 * il_rx_queue_restock
2381 * il_rx_queue_restock() Moves available buffers from rx_free into Rx
2382 * queue, updates firmware pointers, and updates
2383 * the WRITE idx. If insufficient rx_free buffers
2384 * are available, schedules il_rx_replenish
2385 *
2386 * -- enable interrupts --
2387 * ISR - il_rx() Detach il_rx_bufs from pool up to the
2388 * READ IDX, detaching the SKB from the pool.
2389 * Moves the packet buffer from queue to rx_used.
2390 * Calls il_rx_queue_restock to refill any empty
2391 * slots.
2392 * ...
2393 *
2394 */
2395
2396 /**
2397 * il_rx_queue_space - Return number of free slots available in queue.
2398 */
2399 int il_rx_queue_space(const struct il_rx_queue *q)
2400 {
2401 int s = q->read - q->write;
2402 if (s <= 0)
2403 s += RX_QUEUE_SIZE;
2404 /* keep some buffer to not confuse full and empty queue */
2405 s -= 2;
2406 if (s < 0)
2407 s = 0;
2408 return s;
2409 }
2410 EXPORT_SYMBOL(il_rx_queue_space);
2411
2412 /**
2413 * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
2414 */
2415 void
2416 il_rx_queue_update_write_ptr(struct il_priv *il,
2417 struct il_rx_queue *q)
2418 {
2419 unsigned long flags;
2420 u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
2421 u32 reg;
2422
2423 spin_lock_irqsave(&q->lock, flags);
2424
2425 if (q->need_update == 0)
2426 goto exit_unlock;
2427
2428 /* If power-saving is in use, make sure device is awake */
2429 if (test_bit(S_POWER_PMI, &il->status)) {
2430 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2431
2432 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2433 D_INFO(
2434 "Rx queue requesting wakeup,"
2435 " GP1 = 0x%x\n", reg);
2436 il_set_bit(il, CSR_GP_CNTRL,
2437 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2438 goto exit_unlock;
2439 }
2440
2441 q->write_actual = (q->write & ~0x7);
2442 il_wr(il, rx_wrt_ptr_reg,
2443 q->write_actual);
2444
2445 /* Else device is assumed to be awake */
2446 } else {
2447 /* Device expects a multiple of 8 */
2448 q->write_actual = (q->write & ~0x7);
2449 il_wr(il, rx_wrt_ptr_reg,
2450 q->write_actual);
2451 }
2452
2453 q->need_update = 0;
2454
2455 exit_unlock:
2456 spin_unlock_irqrestore(&q->lock, flags);
2457 }
2458 EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
2459
2460 int il_rx_queue_alloc(struct il_priv *il)
2461 {
2462 struct il_rx_queue *rxq = &il->rxq;
2463 struct device *dev = &il->pci_dev->dev;
2464 int i;
2465
2466 spin_lock_init(&rxq->lock);
2467 INIT_LIST_HEAD(&rxq->rx_free);
2468 INIT_LIST_HEAD(&rxq->rx_used);
2469
2470 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
2471 rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
2472 GFP_KERNEL);
2473 if (!rxq->bd)
2474 goto err_bd;
2475
2476 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
2477 &rxq->rb_stts_dma, GFP_KERNEL);
2478 if (!rxq->rb_stts)
2479 goto err_rb;
2480
2481 /* Fill the rx_used queue with _all_ of the Rx buffers */
2482 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
2483 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
2484
2485 /* Set us so that we have processed and used all buffers, but have
2486 * not restocked the Rx queue with fresh buffers */
2487 rxq->read = rxq->write = 0;
2488 rxq->write_actual = 0;
2489 rxq->free_count = 0;
2490 rxq->need_update = 0;
2491 return 0;
2492
2493 err_rb:
2494 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
2495 rxq->bd_dma);
2496 err_bd:
2497 return -ENOMEM;
2498 }
2499 EXPORT_SYMBOL(il_rx_queue_alloc);
2500
2501
2502 void il_hdl_spectrum_measurement(struct il_priv *il,
2503 struct il_rx_buf *rxb)
2504 {
2505 struct il_rx_pkt *pkt = rxb_addr(rxb);
2506 struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
2507
2508 if (!report->state) {
2509 D_11H(
2510 "Spectrum Measure Notification: Start\n");
2511 return;
2512 }
2513
2514 memcpy(&il->measure_report, report, sizeof(*report));
2515 il->measurement_status |= MEASUREMENT_READY;
2516 }
2517 EXPORT_SYMBOL(il_hdl_spectrum_measurement);
2518
2519 /*
2520 * returns non-zero if packet should be dropped
2521 */
2522 int il_set_decrypted_flag(struct il_priv *il,
2523 struct ieee80211_hdr *hdr,
2524 u32 decrypt_res,
2525 struct ieee80211_rx_status *stats)
2526 {
2527 u16 fc = le16_to_cpu(hdr->frame_control);
2528
2529 /*
2530 * All contexts have the same setting here due to it being
2531 * a module parameter, so OK to check any context.
2532 */
2533 if (il->ctx.active.filter_flags &
2534 RXON_FILTER_DIS_DECRYPT_MSK)
2535 return 0;
2536
2537 if (!(fc & IEEE80211_FCTL_PROTECTED))
2538 return 0;
2539
2540 D_RX("decrypt_res:0x%x\n", decrypt_res);
2541 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2542 case RX_RES_STATUS_SEC_TYPE_TKIP:
2543 /* The uCode has got a bad phase 1 Key, pushes the packet.
2544 * Decryption will be done in SW. */
2545 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2546 RX_RES_STATUS_BAD_KEY_TTAK)
2547 break;
2548
2549 case RX_RES_STATUS_SEC_TYPE_WEP:
2550 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2551 RX_RES_STATUS_BAD_ICV_MIC) {
2552 /* bad ICV, the packet is destroyed since the
2553 * decryption is inplace, drop it */
2554 D_RX("Packet destroyed\n");
2555 return -1;
2556 }
2557 case RX_RES_STATUS_SEC_TYPE_CCMP:
2558 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2559 RX_RES_STATUS_DECRYPT_OK) {
2560 D_RX("hw decrypt successfully!!!\n");
2561 stats->flag |= RX_FLAG_DECRYPTED;
2562 }
2563 break;
2564
2565 default:
2566 break;
2567 }
2568 return 0;
2569 }
2570 EXPORT_SYMBOL(il_set_decrypted_flag);
2571
2572 /**
2573 * il_txq_update_write_ptr - Send new write idx to hardware
2574 */
2575 void
2576 il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
2577 {
2578 u32 reg = 0;
2579 int txq_id = txq->q.id;
2580
2581 if (txq->need_update == 0)
2582 return;
2583
2584 /* if we're trying to save power */
2585 if (test_bit(S_POWER_PMI, &il->status)) {
2586 /* wake up nic if it's powered down ...
2587 * uCode will wake up, and interrupt us again, so next
2588 * time we'll skip this part. */
2589 reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2590
2591 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2592 D_INFO(
2593 "Tx queue %d requesting wakeup,"
2594 " GP1 = 0x%x\n", txq_id, reg);
2595 il_set_bit(il, CSR_GP_CNTRL,
2596 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2597 return;
2598 }
2599
2600 il_wr(il, HBUS_TARG_WRPTR,
2601 txq->q.write_ptr | (txq_id << 8));
2602
2603 /*
2604 * else not in power-save mode,
2605 * uCode will never sleep when we're
2606 * trying to tx (during RFKILL, we're not trying to tx).
2607 */
2608 } else
2609 _il_wr(il, HBUS_TARG_WRPTR,
2610 txq->q.write_ptr | (txq_id << 8));
2611 txq->need_update = 0;
2612 }
2613 EXPORT_SYMBOL(il_txq_update_write_ptr);
2614
2615 /**
2616 * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
2617 */
2618 void il_tx_queue_unmap(struct il_priv *il, int txq_id)
2619 {
2620 struct il_tx_queue *txq = &il->txq[txq_id];
2621 struct il_queue *q = &txq->q;
2622
2623 if (q->n_bd == 0)
2624 return;
2625
2626 while (q->write_ptr != q->read_ptr) {
2627 il->cfg->ops->lib->txq_free_tfd(il, txq);
2628 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2629 }
2630 }
2631 EXPORT_SYMBOL(il_tx_queue_unmap);
2632
2633 /**
2634 * il_tx_queue_free - Deallocate DMA queue.
2635 * @txq: Transmit queue to deallocate.
2636 *
2637 * Empty queue by removing and destroying all BD's.
2638 * Free all buffers.
2639 * 0-fill, but do not free "txq" descriptor structure.
2640 */
2641 void il_tx_queue_free(struct il_priv *il, int txq_id)
2642 {
2643 struct il_tx_queue *txq = &il->txq[txq_id];
2644 struct device *dev = &il->pci_dev->dev;
2645 int i;
2646
2647 il_tx_queue_unmap(il, txq_id);
2648
2649 /* De-alloc array of command/tx buffers */
2650 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
2651 kfree(txq->cmd[i]);
2652
2653 /* De-alloc circular buffer of TFDs */
2654 if (txq->q.n_bd)
2655 dma_free_coherent(dev, il->hw_params.tfd_size *
2656 txq->q.n_bd, txq->tfds, txq->q.dma_addr);
2657
2658 /* De-alloc array of per-TFD driver data */
2659 kfree(txq->txb);
2660 txq->txb = NULL;
2661
2662 /* deallocate arrays */
2663 kfree(txq->cmd);
2664 kfree(txq->meta);
2665 txq->cmd = NULL;
2666 txq->meta = NULL;
2667
2668 /* 0-fill queue descriptor structure */
2669 memset(txq, 0, sizeof(*txq));
2670 }
2671 EXPORT_SYMBOL(il_tx_queue_free);
2672
2673 /**
2674 * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
2675 */
2676 void il_cmd_queue_unmap(struct il_priv *il)
2677 {
2678 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2679 struct il_queue *q = &txq->q;
2680 int i;
2681
2682 if (q->n_bd == 0)
2683 return;
2684
2685 while (q->read_ptr != q->write_ptr) {
2686 i = il_get_cmd_idx(q, q->read_ptr, 0);
2687
2688 if (txq->meta[i].flags & CMD_MAPPED) {
2689 pci_unmap_single(il->pci_dev,
2690 dma_unmap_addr(&txq->meta[i], mapping),
2691 dma_unmap_len(&txq->meta[i], len),
2692 PCI_DMA_BIDIRECTIONAL);
2693 txq->meta[i].flags = 0;
2694 }
2695
2696 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2697 }
2698
2699 i = q->n_win;
2700 if (txq->meta[i].flags & CMD_MAPPED) {
2701 pci_unmap_single(il->pci_dev,
2702 dma_unmap_addr(&txq->meta[i], mapping),
2703 dma_unmap_len(&txq->meta[i], len),
2704 PCI_DMA_BIDIRECTIONAL);
2705 txq->meta[i].flags = 0;
2706 }
2707 }
2708 EXPORT_SYMBOL(il_cmd_queue_unmap);
2709
2710 /**
2711 * il_cmd_queue_free - Deallocate DMA queue.
2712 * @txq: Transmit queue to deallocate.
2713 *
2714 * Empty queue by removing and destroying all BD's.
2715 * Free all buffers.
2716 * 0-fill, but do not free "txq" descriptor structure.
2717 */
2718 void il_cmd_queue_free(struct il_priv *il)
2719 {
2720 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2721 struct device *dev = &il->pci_dev->dev;
2722 int i;
2723
2724 il_cmd_queue_unmap(il);
2725
2726 /* De-alloc array of command/tx buffers */
2727 for (i = 0; i <= TFD_CMD_SLOTS; i++)
2728 kfree(txq->cmd[i]);
2729
2730 /* De-alloc circular buffer of TFDs */
2731 if (txq->q.n_bd)
2732 dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2733 txq->tfds, txq->q.dma_addr);
2734
2735 /* deallocate arrays */
2736 kfree(txq->cmd);
2737 kfree(txq->meta);
2738 txq->cmd = NULL;
2739 txq->meta = NULL;
2740
2741 /* 0-fill queue descriptor structure */
2742 memset(txq, 0, sizeof(*txq));
2743 }
2744 EXPORT_SYMBOL(il_cmd_queue_free);
2745
2746 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
2747 * DMA services
2748 *
2749 * Theory of operation
2750 *
2751 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
2752 * of buffer descriptors, each of which points to one or more data buffers for
2753 * the device to read from or fill. Driver and device exchange status of each
2754 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
2755 * entries in each circular buffer, to protect against confusing empty and full
2756 * queue states.
2757 *
2758 * The device reads or writes the data in the queues via the device's several
2759 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
2760 *
2761 * For Tx queue, there are low mark and high mark limits. If, after queuing
2762 * the packet for Tx, free space become < low mark, Tx queue stopped. When
2763 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
2764 * Tx queue resumed.
2765 *
2766 * See more detailed info in 4965.h.
2767 ***************************************************/
2768
2769 int il_queue_space(const struct il_queue *q)
2770 {
2771 int s = q->read_ptr - q->write_ptr;
2772
2773 if (q->read_ptr > q->write_ptr)
2774 s -= q->n_bd;
2775
2776 if (s <= 0)
2777 s += q->n_win;
2778 /* keep some reserve to not confuse empty and full situations */
2779 s -= 2;
2780 if (s < 0)
2781 s = 0;
2782 return s;
2783 }
2784 EXPORT_SYMBOL(il_queue_space);
2785
2786
2787 /**
2788 * il_queue_init - Initialize queue's high/low-water and read/write idxes
2789 */
2790 static int il_queue_init(struct il_priv *il, struct il_queue *q,
2791 int count, int slots_num, u32 id)
2792 {
2793 q->n_bd = count;
2794 q->n_win = slots_num;
2795 q->id = id;
2796
2797 /* count must be power-of-two size, otherwise il_queue_inc_wrap
2798 * and il_queue_dec_wrap are broken. */
2799 BUG_ON(!is_power_of_2(count));
2800
2801 /* slots_num must be power-of-two size, otherwise
2802 * il_get_cmd_idx is broken. */
2803 BUG_ON(!is_power_of_2(slots_num));
2804
2805 q->low_mark = q->n_win / 4;
2806 if (q->low_mark < 4)
2807 q->low_mark = 4;
2808
2809 q->high_mark = q->n_win / 8;
2810 if (q->high_mark < 2)
2811 q->high_mark = 2;
2812
2813 q->write_ptr = q->read_ptr = 0;
2814
2815 return 0;
2816 }
2817
2818 /**
2819 * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
2820 */
2821 static int il_tx_queue_alloc(struct il_priv *il,
2822 struct il_tx_queue *txq, u32 id)
2823 {
2824 struct device *dev = &il->pci_dev->dev;
2825 size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
2826
2827 /* Driver ilate data, only for Tx (not command) queues,
2828 * not shared with device. */
2829 if (id != il->cmd_queue) {
2830 txq->txb = kzalloc(sizeof(txq->txb[0]) *
2831 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
2832 if (!txq->txb) {
2833 IL_ERR("kmalloc for auxiliary BD "
2834 "structures failed\n");
2835 goto error;
2836 }
2837 } else {
2838 txq->txb = NULL;
2839 }
2840
2841 /* Circular buffer of transmit frame descriptors (TFDs),
2842 * shared with device */
2843 txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr,
2844 GFP_KERNEL);
2845 if (!txq->tfds) {
2846 IL_ERR("pci_alloc_consistent(%zd) failed\n", tfd_sz);
2847 goto error;
2848 }
2849 txq->q.id = id;
2850
2851 return 0;
2852
2853 error:
2854 kfree(txq->txb);
2855 txq->txb = NULL;
2856
2857 return -ENOMEM;
2858 }
2859
2860 /**
2861 * il_tx_queue_init - Allocate and initialize one tx/cmd queue
2862 */
2863 int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq,
2864 int slots_num, u32 txq_id)
2865 {
2866 int i, len;
2867 int ret;
2868 int actual_slots = slots_num;
2869
2870 /*
2871 * Alloc buffer array for commands (Tx or other types of commands).
2872 * For the command queue (#4/#9), allocate command space + one big
2873 * command for scan, since scan command is very huge; the system will
2874 * not have two scans at the same time, so only one is needed.
2875 * For normal Tx queues (all other queues), no super-size command
2876 * space is needed.
2877 */
2878 if (txq_id == il->cmd_queue)
2879 actual_slots++;
2880
2881 txq->meta = kzalloc(sizeof(struct il_cmd_meta) * actual_slots,
2882 GFP_KERNEL);
2883 txq->cmd = kzalloc(sizeof(struct il_device_cmd *) * actual_slots,
2884 GFP_KERNEL);
2885
2886 if (!txq->meta || !txq->cmd)
2887 goto out_free_arrays;
2888
2889 len = sizeof(struct il_device_cmd);
2890 for (i = 0; i < actual_slots; i++) {
2891 /* only happens for cmd queue */
2892 if (i == slots_num)
2893 len = IL_MAX_CMD_SIZE;
2894
2895 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
2896 if (!txq->cmd[i])
2897 goto err;
2898 }
2899
2900 /* Alloc driver data array and TFD circular buffer */
2901 ret = il_tx_queue_alloc(il, txq, txq_id);
2902 if (ret)
2903 goto err;
2904
2905 txq->need_update = 0;
2906
2907 /*
2908 * For the default queues 0-3, set up the swq_id
2909 * already -- all others need to get one later
2910 * (if they need one at all).
2911 */
2912 if (txq_id < 4)
2913 il_set_swq_id(txq, txq_id, txq_id);
2914
2915 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
2916 * il_queue_inc_wrap and il_queue_dec_wrap are broken. */
2917 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
2918
2919 /* Initialize queue's high/low-water marks, and head/tail idxes */
2920 il_queue_init(il, &txq->q,
2921 TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
2922
2923 /* Tell device where to find queue */
2924 il->cfg->ops->lib->txq_init(il, txq);
2925
2926 return 0;
2927 err:
2928 for (i = 0; i < actual_slots; i++)
2929 kfree(txq->cmd[i]);
2930 out_free_arrays:
2931 kfree(txq->meta);
2932 kfree(txq->cmd);
2933
2934 return -ENOMEM;
2935 }
2936 EXPORT_SYMBOL(il_tx_queue_init);
2937
2938 void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq,
2939 int slots_num, u32 txq_id)
2940 {
2941 int actual_slots = slots_num;
2942
2943 if (txq_id == il->cmd_queue)
2944 actual_slots++;
2945
2946 memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
2947
2948 txq->need_update = 0;
2949
2950 /* Initialize queue's high/low-water marks, and head/tail idxes */
2951 il_queue_init(il, &txq->q,
2952 TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
2953
2954 /* Tell device where to find queue */
2955 il->cfg->ops->lib->txq_init(il, txq);
2956 }
2957 EXPORT_SYMBOL(il_tx_queue_reset);
2958
2959 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
2960
2961 /**
2962 * il_enqueue_hcmd - enqueue a uCode command
2963 * @il: device ilate data point
2964 * @cmd: a point to the ucode command structure
2965 *
2966 * The function returns < 0 values to indicate the operation is
2967 * failed. On success, it turns the idx (> 0) of command in the
2968 * command queue.
2969 */
2970 int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
2971 {
2972 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2973 struct il_queue *q = &txq->q;
2974 struct il_device_cmd *out_cmd;
2975 struct il_cmd_meta *out_meta;
2976 dma_addr_t phys_addr;
2977 unsigned long flags;
2978 int len;
2979 u32 idx;
2980 u16 fix_size;
2981
2982 cmd->len = il->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
2983 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
2984
2985 /* If any of the command structures end up being larger than
2986 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
2987 * we will need to increase the size of the TFD entries
2988 * Also, check to see if command buffer should not exceed the size
2989 * of device_cmd and max_cmd_size. */
2990 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
2991 !(cmd->flags & CMD_SIZE_HUGE));
2992 BUG_ON(fix_size > IL_MAX_CMD_SIZE);
2993
2994 if (il_is_rfkill(il) || il_is_ctkill(il)) {
2995 IL_WARN("Not sending command - %s KILL\n",
2996 il_is_rfkill(il) ? "RF" : "CT");
2997 return -EIO;
2998 }
2999
3000 spin_lock_irqsave(&il->hcmd_lock, flags);
3001
3002 if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
3003 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3004
3005 IL_ERR("Restarting adapter due to command queue full\n");
3006 queue_work(il->workqueue, &il->restart);
3007 return -ENOSPC;
3008 }
3009
3010 idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
3011 out_cmd = txq->cmd[idx];
3012 out_meta = &txq->meta[idx];
3013
3014 if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
3015 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3016 return -ENOSPC;
3017 }
3018
3019 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
3020 out_meta->flags = cmd->flags | CMD_MAPPED;
3021 if (cmd->flags & CMD_WANT_SKB)
3022 out_meta->source = cmd;
3023 if (cmd->flags & CMD_ASYNC)
3024 out_meta->callback = cmd->callback;
3025
3026 out_cmd->hdr.cmd = cmd->id;
3027 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
3028
3029 /* At this point, the out_cmd now has all of the incoming cmd
3030 * information */
3031
3032 out_cmd->hdr.flags = 0;
3033 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) |
3034 IDX_TO_SEQ(q->write_ptr));
3035 if (cmd->flags & CMD_SIZE_HUGE)
3036 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
3037 len = sizeof(struct il_device_cmd);
3038 if (idx == TFD_CMD_SLOTS)
3039 len = IL_MAX_CMD_SIZE;
3040
3041 #ifdef CONFIG_IWLEGACY_DEBUG
3042 switch (out_cmd->hdr.cmd) {
3043 case C_TX_LINK_QUALITY_CMD:
3044 case C_SENSITIVITY:
3045 D_HC_DUMP(
3046 "Sending command %s (#%x), seq: 0x%04X, "
3047 "%d bytes at %d[%d]:%d\n",
3048 il_get_cmd_string(out_cmd->hdr.cmd),
3049 out_cmd->hdr.cmd,
3050 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
3051 q->write_ptr, idx, il->cmd_queue);
3052 break;
3053 default:
3054 D_HC("Sending command %s (#%x), seq: 0x%04X, "
3055 "%d bytes at %d[%d]:%d\n",
3056 il_get_cmd_string(out_cmd->hdr.cmd),
3057 out_cmd->hdr.cmd,
3058 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
3059 q->write_ptr, idx, il->cmd_queue);
3060 }
3061 #endif
3062 txq->need_update = 1;
3063
3064 if (il->cfg->ops->lib->txq_update_byte_cnt_tbl)
3065 /* Set up entry in queue's byte count circular buffer */
3066 il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 0);
3067
3068 phys_addr = pci_map_single(il->pci_dev, &out_cmd->hdr,
3069 fix_size, PCI_DMA_BIDIRECTIONAL);
3070 dma_unmap_addr_set(out_meta, mapping, phys_addr);
3071 dma_unmap_len_set(out_meta, len, fix_size);
3072
3073 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
3074 phys_addr, fix_size, 1,
3075 U32_PAD(cmd->len));
3076
3077 /* Increment and update queue's write idx */
3078 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
3079 il_txq_update_write_ptr(il, txq);
3080
3081 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3082 return idx;
3083 }
3084
3085 /**
3086 * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
3087 *
3088 * When FW advances 'R' idx, all entries between old and new 'R' idx
3089 * need to be reclaimed. As result, some free space forms. If there is
3090 * enough free space (> low mark), wake the stack that feeds us.
3091 */
3092 static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id,
3093 int idx, int cmd_idx)
3094 {
3095 struct il_tx_queue *txq = &il->txq[txq_id];
3096 struct il_queue *q = &txq->q;
3097 int nfreed = 0;
3098
3099 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
3100 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
3101 "is out of range [0-%d] %d %d.\n", txq_id,
3102 idx, q->n_bd, q->write_ptr, q->read_ptr);
3103 return;
3104 }
3105
3106 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
3107 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3108
3109 if (nfreed++ > 0) {
3110 IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
3111 q->write_ptr, q->read_ptr);
3112 queue_work(il->workqueue, &il->restart);
3113 }
3114
3115 }
3116 }
3117
3118 /**
3119 * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3120 * @rxb: Rx buffer to reclaim
3121 *
3122 * If an Rx buffer has an async callback associated with it the callback
3123 * will be executed. The attached skb (if present) will only be freed
3124 * if the callback returns 1
3125 */
3126 void
3127 il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
3128 {
3129 struct il_rx_pkt *pkt = rxb_addr(rxb);
3130 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3131 int txq_id = SEQ_TO_QUEUE(sequence);
3132 int idx = SEQ_TO_IDX(sequence);
3133 int cmd_idx;
3134 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3135 struct il_device_cmd *cmd;
3136 struct il_cmd_meta *meta;
3137 struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3138 unsigned long flags;
3139
3140 /* If a Tx command is being handled and it isn't in the actual
3141 * command queue then there a command routing bug has been introduced
3142 * in the queue management code. */
3143 if (WARN(txq_id != il->cmd_queue,
3144 "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
3145 txq_id, il->cmd_queue, sequence,
3146 il->txq[il->cmd_queue].q.read_ptr,
3147 il->txq[il->cmd_queue].q.write_ptr)) {
3148 il_print_hex_error(il, pkt, 32);
3149 return;
3150 }
3151
3152 cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
3153 cmd = txq->cmd[cmd_idx];
3154 meta = &txq->meta[cmd_idx];
3155
3156 txq->time_stamp = jiffies;
3157
3158 pci_unmap_single(il->pci_dev,
3159 dma_unmap_addr(meta, mapping),
3160 dma_unmap_len(meta, len),
3161 PCI_DMA_BIDIRECTIONAL);
3162
3163 /* Input error checking is done when commands are added to queue. */
3164 if (meta->flags & CMD_WANT_SKB) {
3165 meta->source->reply_page = (unsigned long)rxb_addr(rxb);
3166 rxb->page = NULL;
3167 } else if (meta->callback)
3168 meta->callback(il, cmd, pkt);
3169
3170 spin_lock_irqsave(&il->hcmd_lock, flags);
3171
3172 il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
3173
3174 if (!(meta->flags & CMD_ASYNC)) {
3175 clear_bit(S_HCMD_ACTIVE, &il->status);
3176 D_INFO("Clearing HCMD_ACTIVE for command %s\n",
3177 il_get_cmd_string(cmd->hdr.cmd));
3178 wake_up(&il->wait_command_queue);
3179 }
3180
3181 /* Mark as unmapped */
3182 meta->flags = 0;
3183
3184 spin_unlock_irqrestore(&il->hcmd_lock, flags);
3185 }
3186 EXPORT_SYMBOL(il_tx_cmd_complete);
3187
3188 MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
3189 MODULE_VERSION(IWLWIFI_VERSION);
3190 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
3191 MODULE_LICENSE("GPL");
3192
3193 /*
3194 * set bt_coex_active to true, uCode will do kill/defer
3195 * every time the priority line is asserted (BT is sending signals on the
3196 * priority line in the PCIx).
3197 * set bt_coex_active to false, uCode will ignore the BT activity and
3198 * perform the normal operation
3199 *
3200 * User might experience transmit issue on some platform due to WiFi/BT
3201 * co-exist problem. The possible behaviors are:
3202 * Able to scan and finding all the available AP
3203 * Not able to associate with any AP
3204 * On those platforms, WiFi communication can be restored by set
3205 * "bt_coex_active" module parameter to "false"
3206 *
3207 * default: bt_coex_active = true (BT_COEX_ENABLE)
3208 */
3209 static bool bt_coex_active = true;
3210 module_param(bt_coex_active, bool, S_IRUGO);
3211 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
3212
3213 u32 il_debug_level;
3214 EXPORT_SYMBOL(il_debug_level);
3215
3216 const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3217 EXPORT_SYMBOL(il_bcast_addr);
3218
3219
3220 /* This function both allocates and initializes hw and il. */
3221 struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg)
3222 {
3223 struct il_priv *il;
3224 /* mac80211 allocates memory for this device instance, including
3225 * space for this driver's ilate structure */
3226 struct ieee80211_hw *hw;
3227
3228 hw = ieee80211_alloc_hw(sizeof(struct il_priv),
3229 cfg->ops->ieee80211_ops);
3230 if (hw == NULL) {
3231 pr_err("%s: Can not allocate network device\n",
3232 cfg->name);
3233 goto out;
3234 }
3235
3236 il = hw->priv;
3237 il->hw = hw;
3238
3239 out:
3240 return hw;
3241 }
3242 EXPORT_SYMBOL(il_alloc_all);
3243
3244 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
3245 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
3246 static void il_init_ht_hw_capab(const struct il_priv *il,
3247 struct ieee80211_sta_ht_cap *ht_info,
3248 enum ieee80211_band band)
3249 {
3250 u16 max_bit_rate = 0;
3251 u8 rx_chains_num = il->hw_params.rx_chains_num;
3252 u8 tx_chains_num = il->hw_params.tx_chains_num;
3253
3254 ht_info->cap = 0;
3255 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
3256
3257 ht_info->ht_supported = true;
3258
3259 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
3260 max_bit_rate = MAX_BIT_RATE_20_MHZ;
3261 if (il->hw_params.ht40_channel & BIT(band)) {
3262 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
3263 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
3264 ht_info->mcs.rx_mask[4] = 0x01;
3265 max_bit_rate = MAX_BIT_RATE_40_MHZ;
3266 }
3267
3268 if (il->cfg->mod_params->amsdu_size_8K)
3269 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
3270
3271 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3272 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3273
3274 ht_info->mcs.rx_mask[0] = 0xFF;
3275 if (rx_chains_num >= 2)
3276 ht_info->mcs.rx_mask[1] = 0xFF;
3277 if (rx_chains_num >= 3)
3278 ht_info->mcs.rx_mask[2] = 0xFF;
3279
3280 /* Highest supported Rx data rate */
3281 max_bit_rate *= rx_chains_num;
3282 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
3283 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
3284
3285 /* Tx MCS capabilities */
3286 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3287 if (tx_chains_num != rx_chains_num) {
3288 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
3289 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
3290 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
3291 }
3292 }
3293
3294 /**
3295 * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
3296 */
3297 int il_init_geos(struct il_priv *il)
3298 {
3299 struct il_channel_info *ch;
3300 struct ieee80211_supported_band *sband;
3301 struct ieee80211_channel *channels;
3302 struct ieee80211_channel *geo_ch;
3303 struct ieee80211_rate *rates;
3304 int i = 0;
3305 s8 max_tx_power = 0;
3306
3307 if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
3308 il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
3309 D_INFO("Geography modes already initialized.\n");
3310 set_bit(S_GEO_CONFIGURED, &il->status);
3311 return 0;
3312 }
3313
3314 channels = kzalloc(sizeof(struct ieee80211_channel) *
3315 il->channel_count, GFP_KERNEL);
3316 if (!channels)
3317 return -ENOMEM;
3318
3319 rates = kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
3320 GFP_KERNEL);
3321 if (!rates) {
3322 kfree(channels);
3323 return -ENOMEM;
3324 }
3325
3326 /* 5.2GHz channels start after the 2.4GHz channels */
3327 sband = &il->bands[IEEE80211_BAND_5GHZ];
3328 sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
3329 /* just OFDM */
3330 sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
3331 sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
3332
3333 if (il->cfg->sku & IL_SKU_N)
3334 il_init_ht_hw_capab(il, &sband->ht_cap,
3335 IEEE80211_BAND_5GHZ);
3336
3337 sband = &il->bands[IEEE80211_BAND_2GHZ];
3338 sband->channels = channels;
3339 /* OFDM & CCK */
3340 sband->bitrates = rates;
3341 sband->n_bitrates = RATE_COUNT_LEGACY;
3342
3343 if (il->cfg->sku & IL_SKU_N)
3344 il_init_ht_hw_capab(il, &sband->ht_cap,
3345 IEEE80211_BAND_2GHZ);
3346
3347 il->ieee_channels = channels;
3348 il->ieee_rates = rates;
3349
3350 for (i = 0; i < il->channel_count; i++) {
3351 ch = &il->channel_info[i];
3352
3353 if (!il_is_channel_valid(ch))
3354 continue;
3355
3356 sband = &il->bands[ch->band];
3357
3358 geo_ch = &sband->channels[sband->n_channels++];
3359
3360 geo_ch->center_freq =
3361 ieee80211_channel_to_frequency(ch->channel, ch->band);
3362 geo_ch->max_power = ch->max_power_avg;
3363 geo_ch->max_antenna_gain = 0xff;
3364 geo_ch->hw_value = ch->channel;
3365
3366 if (il_is_channel_valid(ch)) {
3367 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
3368 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
3369
3370 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
3371 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
3372
3373 if (ch->flags & EEPROM_CHANNEL_RADAR)
3374 geo_ch->flags |= IEEE80211_CHAN_RADAR;
3375
3376 geo_ch->flags |= ch->ht40_extension_channel;
3377
3378 if (ch->max_power_avg > max_tx_power)
3379 max_tx_power = ch->max_power_avg;
3380 } else {
3381 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
3382 }
3383
3384 D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
3385 ch->channel, geo_ch->center_freq,
3386 il_is_channel_a_band(ch) ? "5.2" : "2.4",
3387 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
3388 "restricted" : "valid",
3389 geo_ch->flags);
3390 }
3391
3392 il->tx_power_device_lmt = max_tx_power;
3393 il->tx_power_user_lmt = max_tx_power;
3394 il->tx_power_next = max_tx_power;
3395
3396 if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
3397 (il->cfg->sku & IL_SKU_A)) {
3398 IL_INFO("Incorrectly detected BG card as ABG. "
3399 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
3400 il->pci_dev->device,
3401 il->pci_dev->subsystem_device);
3402 il->cfg->sku &= ~IL_SKU_A;
3403 }
3404
3405 IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
3406 il->bands[IEEE80211_BAND_2GHZ].n_channels,
3407 il->bands[IEEE80211_BAND_5GHZ].n_channels);
3408
3409 set_bit(S_GEO_CONFIGURED, &il->status);
3410
3411 return 0;
3412 }
3413 EXPORT_SYMBOL(il_init_geos);
3414
3415 /*
3416 * il_free_geos - undo allocations in il_init_geos
3417 */
3418 void il_free_geos(struct il_priv *il)
3419 {
3420 kfree(il->ieee_channels);
3421 kfree(il->ieee_rates);
3422 clear_bit(S_GEO_CONFIGURED, &il->status);
3423 }
3424 EXPORT_SYMBOL(il_free_geos);
3425
3426 static bool il_is_channel_extension(struct il_priv *il,
3427 enum ieee80211_band band,
3428 u16 channel, u8 extension_chan_offset)
3429 {
3430 const struct il_channel_info *ch_info;
3431
3432 ch_info = il_get_channel_info(il, band, channel);
3433 if (!il_is_channel_valid(ch_info))
3434 return false;
3435
3436 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
3437 return !(ch_info->ht40_extension_channel &
3438 IEEE80211_CHAN_NO_HT40PLUS);
3439 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
3440 return !(ch_info->ht40_extension_channel &
3441 IEEE80211_CHAN_NO_HT40MINUS);
3442
3443 return false;
3444 }
3445
3446 bool il_is_ht40_tx_allowed(struct il_priv *il,
3447 struct il_rxon_context *ctx,
3448 struct ieee80211_sta_ht_cap *ht_cap)
3449 {
3450 if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
3451 return false;
3452
3453 /*
3454 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
3455 * the bit will not set if it is pure 40MHz case
3456 */
3457 if (ht_cap && !ht_cap->ht_supported)
3458 return false;
3459
3460 #ifdef CONFIG_IWLEGACY_DEBUGFS
3461 if (il->disable_ht40)
3462 return false;
3463 #endif
3464
3465 return il_is_channel_extension(il, il->band,
3466 le16_to_cpu(ctx->staging.channel),
3467 ctx->ht.extension_chan_offset);
3468 }
3469 EXPORT_SYMBOL(il_is_ht40_tx_allowed);
3470
3471 static u16 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
3472 {
3473 u16 new_val;
3474 u16 beacon_factor;
3475
3476 /*
3477 * If mac80211 hasn't given us a beacon interval, program
3478 * the default into the device.
3479 */
3480 if (!beacon_val)
3481 return DEFAULT_BEACON_INTERVAL;
3482
3483 /*
3484 * If the beacon interval we obtained from the peer
3485 * is too large, we'll have to wake up more often
3486 * (and in IBSS case, we'll beacon too much)
3487 *
3488 * For example, if max_beacon_val is 4096, and the
3489 * requested beacon interval is 7000, we'll have to
3490 * use 3500 to be able to wake up on the beacons.
3491 *
3492 * This could badly influence beacon detection stats.
3493 */
3494
3495 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
3496 new_val = beacon_val / beacon_factor;
3497
3498 if (!new_val)
3499 new_val = max_beacon_val;
3500
3501 return new_val;
3502 }
3503
3504 int
3505 il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
3506 {
3507 u64 tsf;
3508 s32 interval_tm, rem;
3509 struct ieee80211_conf *conf = NULL;
3510 u16 beacon_int;
3511 struct ieee80211_vif *vif = ctx->vif;
3512
3513 conf = &il->hw->conf;
3514
3515 lockdep_assert_held(&il->mutex);
3516
3517 memset(&ctx->timing, 0, sizeof(struct il_rxon_time_cmd));
3518
3519 ctx->timing.timestamp = cpu_to_le64(il->timestamp);
3520 ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
3521
3522 beacon_int = vif ? vif->bss_conf.beacon_int : 0;
3523
3524 /*
3525 * TODO: For IBSS we need to get atim_win from mac80211,
3526 * for now just always use 0
3527 */
3528 ctx->timing.atim_win = 0;
3529
3530 beacon_int = il_adjust_beacon_interval(beacon_int,
3531 il->hw_params.max_beacon_itrvl * TIME_UNIT);
3532 ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
3533
3534 tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
3535 interval_tm = beacon_int * TIME_UNIT;
3536 rem = do_div(tsf, interval_tm);
3537 ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
3538
3539 ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
3540
3541 D_ASSOC(
3542 "beacon interval %d beacon timer %d beacon tim %d\n",
3543 le16_to_cpu(ctx->timing.beacon_interval),
3544 le32_to_cpu(ctx->timing.beacon_init_val),
3545 le16_to_cpu(ctx->timing.atim_win));
3546
3547 return il_send_cmd_pdu(il, ctx->rxon_timing_cmd,
3548 sizeof(ctx->timing), &ctx->timing);
3549 }
3550 EXPORT_SYMBOL(il_send_rxon_timing);
3551
3552 void
3553 il_set_rxon_hwcrypto(struct il_priv *il,
3554 struct il_rxon_context *ctx,
3555 int hw_decrypt)
3556 {
3557 struct il_rxon_cmd *rxon = &ctx->staging;
3558
3559 if (hw_decrypt)
3560 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
3561 else
3562 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
3563
3564 }
3565 EXPORT_SYMBOL(il_set_rxon_hwcrypto);
3566
3567 /* validate RXON structure is valid */
3568 int
3569 il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx)
3570 {
3571 struct il_rxon_cmd *rxon = &ctx->staging;
3572 bool error = false;
3573
3574 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
3575 if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
3576 IL_WARN("check 2.4G: wrong narrow\n");
3577 error = true;
3578 }
3579 if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
3580 IL_WARN("check 2.4G: wrong radar\n");
3581 error = true;
3582 }
3583 } else {
3584 if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
3585 IL_WARN("check 5.2G: not short slot!\n");
3586 error = true;
3587 }
3588 if (rxon->flags & RXON_FLG_CCK_MSK) {
3589 IL_WARN("check 5.2G: CCK!\n");
3590 error = true;
3591 }
3592 }
3593 if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
3594 IL_WARN("mac/bssid mcast!\n");
3595 error = true;
3596 }
3597
3598 /* make sure basic rates 6Mbps and 1Mbps are supported */
3599 if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
3600 (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
3601 IL_WARN("neither 1 nor 6 are basic\n");
3602 error = true;
3603 }
3604
3605 if (le16_to_cpu(rxon->assoc_id) > 2007) {
3606 IL_WARN("aid > 2007\n");
3607 error = true;
3608 }
3609
3610 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
3611 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
3612 IL_WARN("CCK and short slot\n");
3613 error = true;
3614 }
3615
3616 if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
3617 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
3618 IL_WARN("CCK and auto detect");
3619 error = true;
3620 }
3621
3622 if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
3623 RXON_FLG_TGG_PROTECT_MSK)) ==
3624 RXON_FLG_TGG_PROTECT_MSK) {
3625 IL_WARN("TGg but no auto-detect\n");
3626 error = true;
3627 }
3628
3629 if (error)
3630 IL_WARN("Tuning to channel %d\n",
3631 le16_to_cpu(rxon->channel));
3632
3633 if (error) {
3634 IL_ERR("Invalid RXON\n");
3635 return -EINVAL;
3636 }
3637 return 0;
3638 }
3639 EXPORT_SYMBOL(il_check_rxon_cmd);
3640
3641 /**
3642 * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
3643 * @il: staging_rxon is compared to active_rxon
3644 *
3645 * If the RXON structure is changing enough to require a new tune,
3646 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
3647 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
3648 */
3649 int il_full_rxon_required(struct il_priv *il,
3650 struct il_rxon_context *ctx)
3651 {
3652 const struct il_rxon_cmd *staging = &ctx->staging;
3653 const struct il_rxon_cmd *active = &ctx->active;
3654
3655 #define CHK(cond) \
3656 if ((cond)) { \
3657 D_INFO("need full RXON - " #cond "\n"); \
3658 return 1; \
3659 }
3660
3661 #define CHK_NEQ(c1, c2) \
3662 if ((c1) != (c2)) { \
3663 D_INFO("need full RXON - " \
3664 #c1 " != " #c2 " - %d != %d\n", \
3665 (c1), (c2)); \
3666 return 1; \
3667 }
3668
3669 /* These items are only settable from the full RXON command */
3670 CHK(!il_is_associated_ctx(ctx));
3671 CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
3672 CHK(compare_ether_addr(staging->node_addr, active->node_addr));
3673 CHK(compare_ether_addr(staging->wlap_bssid_addr,
3674 active->wlap_bssid_addr));
3675 CHK_NEQ(staging->dev_type, active->dev_type);
3676 CHK_NEQ(staging->channel, active->channel);
3677 CHK_NEQ(staging->air_propagation, active->air_propagation);
3678 CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
3679 active->ofdm_ht_single_stream_basic_rates);
3680 CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
3681 active->ofdm_ht_dual_stream_basic_rates);
3682 CHK_NEQ(staging->assoc_id, active->assoc_id);
3683
3684 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
3685 * be updated with the RXON_ASSOC command -- however only some
3686 * flag transitions are allowed using RXON_ASSOC */
3687
3688 /* Check if we are not switching bands */
3689 CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
3690 active->flags & RXON_FLG_BAND_24G_MSK);
3691
3692 /* Check if we are switching association toggle */
3693 CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
3694 active->filter_flags & RXON_FILTER_ASSOC_MSK);
3695
3696 #undef CHK
3697 #undef CHK_NEQ
3698
3699 return 0;
3700 }
3701 EXPORT_SYMBOL(il_full_rxon_required);
3702
3703 u8 il_get_lowest_plcp(struct il_priv *il,
3704 struct il_rxon_context *ctx)
3705 {
3706 /*
3707 * Assign the lowest rate -- should really get this from
3708 * the beacon skb from mac80211.
3709 */
3710 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
3711 return RATE_1M_PLCP;
3712 else
3713 return RATE_6M_PLCP;
3714 }
3715 EXPORT_SYMBOL(il_get_lowest_plcp);
3716
3717 static void _il_set_rxon_ht(struct il_priv *il,
3718 struct il_ht_config *ht_conf,
3719 struct il_rxon_context *ctx)
3720 {
3721 struct il_rxon_cmd *rxon = &ctx->staging;
3722
3723 if (!ctx->ht.enabled) {
3724 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
3725 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
3726 RXON_FLG_HT40_PROT_MSK |
3727 RXON_FLG_HT_PROT_MSK);
3728 return;
3729 }
3730
3731 rxon->flags |= cpu_to_le32(ctx->ht.protection <<
3732 RXON_FLG_HT_OPERATING_MODE_POS);
3733
3734 /* Set up channel bandwidth:
3735 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
3736 /* clear the HT channel mode before set the mode */
3737 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
3738 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3739 if (il_is_ht40_tx_allowed(il, ctx, NULL)) {
3740 /* pure ht40 */
3741 if (ctx->ht.protection ==
3742 IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
3743 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
3744 /* Note: control channel is opposite of extension channel */
3745 switch (ctx->ht.extension_chan_offset) {
3746 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3747 rxon->flags &=
3748 ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3749 break;
3750 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3751 rxon->flags |=
3752 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3753 break;
3754 }
3755 } else {
3756 /* Note: control channel is opposite of extension channel */
3757 switch (ctx->ht.extension_chan_offset) {
3758 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3759 rxon->flags &=
3760 ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3761 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3762 break;
3763 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3764 rxon->flags |=
3765 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3766 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3767 break;
3768 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
3769 default:
3770 /* channel location only valid if in Mixed mode */
3771 IL_ERR(
3772 "invalid extension channel offset\n");
3773 break;
3774 }
3775 }
3776 } else {
3777 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
3778 }
3779
3780 if (il->cfg->ops->hcmd->set_rxon_chain)
3781 il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
3782
3783 D_ASSOC("rxon flags 0x%X operation mode :0x%X "
3784 "extension channel offset 0x%x\n",
3785 le32_to_cpu(rxon->flags), ctx->ht.protection,
3786 ctx->ht.extension_chan_offset);
3787 }
3788
3789 void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
3790 {
3791 _il_set_rxon_ht(il, ht_conf, &il->ctx);
3792 }
3793 EXPORT_SYMBOL(il_set_rxon_ht);
3794
3795 /* Return valid, unused, channel for a passive scan to reset the RF */
3796 u8 il_get_single_channel_number(struct il_priv *il,
3797 enum ieee80211_band band)
3798 {
3799 const struct il_channel_info *ch_info;
3800 int i;
3801 u8 channel = 0;
3802 u8 min, max;
3803
3804 if (band == IEEE80211_BAND_5GHZ) {
3805 min = 14;
3806 max = il->channel_count;
3807 } else {
3808 min = 0;
3809 max = 14;
3810 }
3811
3812 for (i = min; i < max; i++) {
3813 channel = il->channel_info[i].channel;
3814 if (channel == le16_to_cpu(il->ctx.staging.channel))
3815 continue;
3816
3817 ch_info = il_get_channel_info(il, band, channel);
3818 if (il_is_channel_valid(ch_info))
3819 break;
3820 }
3821
3822 return channel;
3823 }
3824 EXPORT_SYMBOL(il_get_single_channel_number);
3825
3826 /**
3827 * il_set_rxon_channel - Set the band and channel values in staging RXON
3828 * @ch: requested channel as a pointer to struct ieee80211_channel
3829
3830 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
3831 * in the staging RXON flag structure based on the ch->band
3832 */
3833 int
3834 il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
3835 struct il_rxon_context *ctx)
3836 {
3837 enum ieee80211_band band = ch->band;
3838 u16 channel = ch->hw_value;
3839
3840 if (le16_to_cpu(ctx->staging.channel) == channel && il->band == band)
3841 return 0;
3842
3843 ctx->staging.channel = cpu_to_le16(channel);
3844 if (band == IEEE80211_BAND_5GHZ)
3845 ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
3846 else
3847 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
3848
3849 il->band = band;
3850
3851 D_INFO("Staging channel set to %d [%d]\n", channel, band);
3852
3853 return 0;
3854 }
3855 EXPORT_SYMBOL(il_set_rxon_channel);
3856
3857 void il_set_flags_for_band(struct il_priv *il,
3858 struct il_rxon_context *ctx,
3859 enum ieee80211_band band,
3860 struct ieee80211_vif *vif)
3861 {
3862 if (band == IEEE80211_BAND_5GHZ) {
3863 ctx->staging.flags &=
3864 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
3865 | RXON_FLG_CCK_MSK);
3866 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3867 } else {
3868 /* Copied from il_post_associate() */
3869 if (vif && vif->bss_conf.use_short_slot)
3870 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3871 else
3872 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3873
3874 ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
3875 ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
3876 ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
3877 }
3878 }
3879 EXPORT_SYMBOL(il_set_flags_for_band);
3880
3881 /*
3882 * initialize rxon structure with default values from eeprom
3883 */
3884 void il_connection_init_rx_config(struct il_priv *il,
3885 struct il_rxon_context *ctx)
3886 {
3887 const struct il_channel_info *ch_info;
3888
3889 memset(&ctx->staging, 0, sizeof(ctx->staging));
3890
3891 if (!ctx->vif) {
3892 ctx->staging.dev_type = ctx->unused_devtype;
3893 } else
3894 switch (ctx->vif->type) {
3895
3896 case NL80211_IFTYPE_STATION:
3897 ctx->staging.dev_type = ctx->station_devtype;
3898 ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
3899 break;
3900
3901 case NL80211_IFTYPE_ADHOC:
3902 ctx->staging.dev_type = ctx->ibss_devtype;
3903 ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
3904 ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
3905 RXON_FILTER_ACCEPT_GRP_MSK;
3906 break;
3907
3908 default:
3909 IL_ERR("Unsupported interface type %d\n",
3910 ctx->vif->type);
3911 break;
3912 }
3913
3914 #if 0
3915 /* TODO: Figure out when short_preamble would be set and cache from
3916 * that */
3917 if (!hw_to_local(il->hw)->short_preamble)
3918 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3919 else
3920 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3921 #endif
3922
3923 ch_info = il_get_channel_info(il, il->band,
3924 le16_to_cpu(ctx->active.channel));
3925
3926 if (!ch_info)
3927 ch_info = &il->channel_info[0];
3928
3929 ctx->staging.channel = cpu_to_le16(ch_info->channel);
3930 il->band = ch_info->band;
3931
3932 il_set_flags_for_band(il, ctx, il->band, ctx->vif);
3933
3934 ctx->staging.ofdm_basic_rates =
3935 (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
3936 ctx->staging.cck_basic_rates =
3937 (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
3938
3939 /* clear both MIX and PURE40 mode flag */
3940 ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
3941 RXON_FLG_CHANNEL_MODE_PURE_40);
3942 if (ctx->vif)
3943 memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
3944
3945 ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
3946 ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
3947 }
3948 EXPORT_SYMBOL(il_connection_init_rx_config);
3949
3950 void il_set_rate(struct il_priv *il)
3951 {
3952 const struct ieee80211_supported_band *hw = NULL;
3953 struct ieee80211_rate *rate;
3954 int i;
3955
3956 hw = il_get_hw_mode(il, il->band);
3957 if (!hw) {
3958 IL_ERR("Failed to set rate: unable to get hw mode\n");
3959 return;
3960 }
3961
3962 il->active_rate = 0;
3963
3964 for (i = 0; i < hw->n_bitrates; i++) {
3965 rate = &(hw->bitrates[i]);
3966 if (rate->hw_value < RATE_COUNT_LEGACY)
3967 il->active_rate |= (1 << rate->hw_value);
3968 }
3969
3970 D_RATE("Set active_rate = %0x\n", il->active_rate);
3971
3972 il->ctx.staging.cck_basic_rates =
3973 (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
3974
3975 il->ctx.staging.ofdm_basic_rates =
3976 (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
3977 }
3978 EXPORT_SYMBOL(il_set_rate);
3979
3980 void il_chswitch_done(struct il_priv *il, bool is_success)
3981 {
3982 struct il_rxon_context *ctx = &il->ctx;
3983
3984 if (test_bit(S_EXIT_PENDING, &il->status))
3985 return;
3986
3987 if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
3988 ieee80211_chswitch_done(ctx->vif, is_success);
3989 }
3990 EXPORT_SYMBOL(il_chswitch_done);
3991
3992 void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
3993 {
3994 struct il_rx_pkt *pkt = rxb_addr(rxb);
3995 struct il_csa_notification *csa = &(pkt->u.csa_notif);
3996
3997 struct il_rxon_context *ctx = &il->ctx;
3998 struct il_rxon_cmd *rxon = (void *)&ctx->active;
3999
4000 if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
4001 return;
4002
4003 if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
4004 rxon->channel = csa->channel;
4005 ctx->staging.channel = csa->channel;
4006 D_11H("CSA notif: channel %d\n",
4007 le16_to_cpu(csa->channel));
4008 il_chswitch_done(il, true);
4009 } else {
4010 IL_ERR("CSA notif (fail) : channel %d\n",
4011 le16_to_cpu(csa->channel));
4012 il_chswitch_done(il, false);
4013 }
4014 }
4015 EXPORT_SYMBOL(il_hdl_csa);
4016
4017 #ifdef CONFIG_IWLEGACY_DEBUG
4018 void il_print_rx_config_cmd(struct il_priv *il,
4019 struct il_rxon_context *ctx)
4020 {
4021 struct il_rxon_cmd *rxon = &ctx->staging;
4022
4023 D_RADIO("RX CONFIG:\n");
4024 il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4025 D_RADIO("u16 channel: 0x%x\n",
4026 le16_to_cpu(rxon->channel));
4027 D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4028 D_RADIO("u32 filter_flags: 0x%08x\n",
4029 le32_to_cpu(rxon->filter_flags));
4030 D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4031 D_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4032 rxon->ofdm_basic_rates);
4033 D_RADIO("u8 cck_basic_rates: 0x%02x\n",
4034 rxon->cck_basic_rates);
4035 D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
4036 D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
4037 D_RADIO("u16 assoc_id: 0x%x\n",
4038 le16_to_cpu(rxon->assoc_id));
4039 }
4040 EXPORT_SYMBOL(il_print_rx_config_cmd);
4041 #endif
4042 /**
4043 * il_irq_handle_error - called for HW or SW error interrupt from card
4044 */
4045 void il_irq_handle_error(struct il_priv *il)
4046 {
4047 /* Set the FW error flag -- cleared on il_down */
4048 set_bit(S_FW_ERROR, &il->status);
4049
4050 /* Cancel currently queued command. */
4051 clear_bit(S_HCMD_ACTIVE, &il->status);
4052
4053 IL_ERR("Loaded firmware version: %s\n",
4054 il->hw->wiphy->fw_version);
4055
4056 il->cfg->ops->lib->dump_nic_error_log(il);
4057 if (il->cfg->ops->lib->dump_fh)
4058 il->cfg->ops->lib->dump_fh(il, NULL, false);
4059 #ifdef CONFIG_IWLEGACY_DEBUG
4060 if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
4061 il_print_rx_config_cmd(il,
4062 &il->ctx);
4063 #endif
4064
4065 wake_up(&il->wait_command_queue);
4066
4067 /* Keep the restart process from trying to send host
4068 * commands by clearing the INIT status bit */
4069 clear_bit(S_READY, &il->status);
4070
4071 if (!test_bit(S_EXIT_PENDING, &il->status)) {
4072 IL_DBG(IL_DL_FW_ERRORS,
4073 "Restarting adapter due to uCode error.\n");
4074
4075 if (il->cfg->mod_params->restart_fw)
4076 queue_work(il->workqueue, &il->restart);
4077 }
4078 }
4079 EXPORT_SYMBOL(il_irq_handle_error);
4080
4081 static int il_apm_stop_master(struct il_priv *il)
4082 {
4083 int ret = 0;
4084
4085 /* stop device's busmaster DMA activity */
4086 il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
4087
4088 ret = _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
4089 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
4090 if (ret)
4091 IL_WARN("Master Disable Timed Out, 100 usec\n");
4092
4093 D_INFO("stop master\n");
4094
4095 return ret;
4096 }
4097
4098 void il_apm_stop(struct il_priv *il)
4099 {
4100 D_INFO("Stop card, put in low power state\n");
4101
4102 /* Stop device's DMA activity */
4103 il_apm_stop_master(il);
4104
4105 /* Reset the entire device */
4106 il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
4107
4108 udelay(10);
4109
4110 /*
4111 * Clear "initialization complete" bit to move adapter from
4112 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
4113 */
4114 il_clear_bit(il, CSR_GP_CNTRL,
4115 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4116 }
4117 EXPORT_SYMBOL(il_apm_stop);
4118
4119
4120 /*
4121 * Start up NIC's basic functionality after it has been reset
4122 * (e.g. after platform boot, or shutdown via il_apm_stop())
4123 * NOTE: This does not load uCode nor start the embedded processor
4124 */
4125 int il_apm_init(struct il_priv *il)
4126 {
4127 int ret = 0;
4128 u16 lctl;
4129
4130 D_INFO("Init card's basic functions\n");
4131
4132 /*
4133 * Use "set_bit" below rather than "write", to preserve any hardware
4134 * bits already set by default after reset.
4135 */
4136
4137 /* Disable L0S exit timer (platform NMI Work/Around) */
4138 il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4139 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
4140
4141 /*
4142 * Disable L0s without affecting L1;
4143 * don't wait for ICH L0s (ICH bug W/A)
4144 */
4145 il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4146 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
4147
4148 /* Set FH wait threshold to maximum (HW error during stress W/A) */
4149 il_set_bit(il, CSR_DBG_HPET_MEM_REG,
4150 CSR_DBG_HPET_MEM_REG_VAL);
4151
4152 /*
4153 * Enable HAP INTA (interrupt from management bus) to
4154 * wake device's PCI Express link L1a -> L0s
4155 * NOTE: This is no-op for 3945 (non-existent bit)
4156 */
4157 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
4158 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
4159
4160 /*
4161 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
4162 * Check if BIOS (or OS) enabled L1-ASPM on this device.
4163 * If so (likely), disable L0S, so device moves directly L0->L1;
4164 * costs negligible amount of power savings.
4165 * If not (unlikely), enable L0S, so there is at least some
4166 * power savings, even without L1.
4167 */
4168 if (il->cfg->base_params->set_l0s) {
4169 lctl = il_pcie_link_ctl(il);
4170 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
4171 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
4172 /* L1-ASPM enabled; disable(!) L0S */
4173 il_set_bit(il, CSR_GIO_REG,
4174 CSR_GIO_REG_VAL_L0S_ENABLED);
4175 D_POWER("L1 Enabled; Disabling L0S\n");
4176 } else {
4177 /* L1-ASPM disabled; enable(!) L0S */
4178 il_clear_bit(il, CSR_GIO_REG,
4179 CSR_GIO_REG_VAL_L0S_ENABLED);
4180 D_POWER("L1 Disabled; Enabling L0S\n");
4181 }
4182 }
4183
4184 /* Configure analog phase-lock-loop before activating to D0A */
4185 if (il->cfg->base_params->pll_cfg_val)
4186 il_set_bit(il, CSR_ANA_PLL_CFG,
4187 il->cfg->base_params->pll_cfg_val);
4188
4189 /*
4190 * Set "initialization complete" bit to move adapter from
4191 * D0U* --> D0A* (powered-up active) state.
4192 */
4193 il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4194
4195 /*
4196 * Wait for clock stabilization; once stabilized, access to
4197 * device-internal resources is supported, e.g. il_wr_prph()
4198 * and accesses to uCode SRAM.
4199 */
4200 ret = _il_poll_bit(il, CSR_GP_CNTRL,
4201 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
4202 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
4203 if (ret < 0) {
4204 D_INFO("Failed to init the card\n");
4205 goto out;
4206 }
4207
4208 /*
4209 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
4210 * BSM (Boostrap State Machine) is only in 3945 and 4965.
4211 *
4212 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
4213 * do not disable clocks. This preserves any hardware bits already
4214 * set by default in "CLK_CTRL_REG" after reset.
4215 */
4216 if (il->cfg->base_params->use_bsm)
4217 il_wr_prph(il, APMG_CLK_EN_REG,
4218 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
4219 else
4220 il_wr_prph(il, APMG_CLK_EN_REG,
4221 APMG_CLK_VAL_DMA_CLK_RQT);
4222 udelay(20);
4223
4224 /* Disable L1-Active */
4225 il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
4226 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
4227
4228 out:
4229 return ret;
4230 }
4231 EXPORT_SYMBOL(il_apm_init);
4232
4233
4234 int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
4235 {
4236 int ret;
4237 s8 prev_tx_power;
4238 bool defer;
4239 struct il_rxon_context *ctx = &il->ctx;
4240
4241 lockdep_assert_held(&il->mutex);
4242
4243 if (il->tx_power_user_lmt == tx_power && !force)
4244 return 0;
4245
4246 if (!il->cfg->ops->lib->send_tx_power)
4247 return -EOPNOTSUPP;
4248
4249 /* 0 dBm mean 1 milliwatt */
4250 if (tx_power < 0) {
4251 IL_WARN(
4252 "Requested user TXPOWER %d below 1 mW.\n",
4253 tx_power);
4254 return -EINVAL;
4255 }
4256
4257 if (tx_power > il->tx_power_device_lmt) {
4258 IL_WARN(
4259 "Requested user TXPOWER %d above upper limit %d.\n",
4260 tx_power, il->tx_power_device_lmt);
4261 return -EINVAL;
4262 }
4263
4264 if (!il_is_ready_rf(il))
4265 return -EIO;
4266
4267 /* scan complete and commit_rxon use tx_power_next value,
4268 * it always need to be updated for newest request */
4269 il->tx_power_next = tx_power;
4270
4271 /* do not set tx power when scanning or channel changing */
4272 defer = test_bit(S_SCANNING, &il->status) ||
4273 memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
4274 if (defer && !force) {
4275 D_INFO("Deferring tx power set\n");
4276 return 0;
4277 }
4278
4279 prev_tx_power = il->tx_power_user_lmt;
4280 il->tx_power_user_lmt = tx_power;
4281
4282 ret = il->cfg->ops->lib->send_tx_power(il);
4283
4284 /* if fail to set tx_power, restore the orig. tx power */
4285 if (ret) {
4286 il->tx_power_user_lmt = prev_tx_power;
4287 il->tx_power_next = prev_tx_power;
4288 }
4289 return ret;
4290 }
4291 EXPORT_SYMBOL(il_set_tx_power);
4292
4293 void il_send_bt_config(struct il_priv *il)
4294 {
4295 struct il_bt_cmd bt_cmd = {
4296 .lead_time = BT_LEAD_TIME_DEF,
4297 .max_kill = BT_MAX_KILL_DEF,
4298 .kill_ack_mask = 0,
4299 .kill_cts_mask = 0,
4300 };
4301
4302 if (!bt_coex_active)
4303 bt_cmd.flags = BT_COEX_DISABLE;
4304 else
4305 bt_cmd.flags = BT_COEX_ENABLE;
4306
4307 D_INFO("BT coex %s\n",
4308 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
4309
4310 if (il_send_cmd_pdu(il, C_BT_CONFIG,
4311 sizeof(struct il_bt_cmd), &bt_cmd))
4312 IL_ERR("failed to send BT Coex Config\n");
4313 }
4314 EXPORT_SYMBOL(il_send_bt_config);
4315
4316 int il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
4317 {
4318 struct il_stats_cmd stats_cmd = {
4319 .configuration_flags =
4320 clear ? IL_STATS_CONF_CLEAR_STATS : 0,
4321 };
4322
4323 if (flags & CMD_ASYNC)
4324 return il_send_cmd_pdu_async(il, C_STATS,
4325 sizeof(struct il_stats_cmd),
4326 &stats_cmd, NULL);
4327 else
4328 return il_send_cmd_pdu(il, C_STATS,
4329 sizeof(struct il_stats_cmd),
4330 &stats_cmd);
4331 }
4332 EXPORT_SYMBOL(il_send_stats_request);
4333
4334 void il_hdl_pm_sleep(struct il_priv *il,
4335 struct il_rx_buf *rxb)
4336 {
4337 #ifdef CONFIG_IWLEGACY_DEBUG
4338 struct il_rx_pkt *pkt = rxb_addr(rxb);
4339 struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
4340 D_RX("sleep mode: %d, src: %d\n",
4341 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
4342 #endif
4343 }
4344 EXPORT_SYMBOL(il_hdl_pm_sleep);
4345
4346 void il_hdl_pm_debug_stats(struct il_priv *il,
4347 struct il_rx_buf *rxb)
4348 {
4349 struct il_rx_pkt *pkt = rxb_addr(rxb);
4350 u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
4351 D_RADIO("Dumping %d bytes of unhandled "
4352 "notification for %s:\n", len,
4353 il_get_cmd_string(pkt->hdr.cmd));
4354 il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
4355 }
4356 EXPORT_SYMBOL(il_hdl_pm_debug_stats);
4357
4358 void il_hdl_error(struct il_priv *il,
4359 struct il_rx_buf *rxb)
4360 {
4361 struct il_rx_pkt *pkt = rxb_addr(rxb);
4362
4363 IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
4364 "seq 0x%04X ser 0x%08X\n",
4365 le32_to_cpu(pkt->u.err_resp.error_type),
4366 il_get_cmd_string(pkt->u.err_resp.cmd_id),
4367 pkt->u.err_resp.cmd_id,
4368 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
4369 le32_to_cpu(pkt->u.err_resp.error_info));
4370 }
4371 EXPORT_SYMBOL(il_hdl_error);
4372
4373 void il_clear_isr_stats(struct il_priv *il)
4374 {
4375 memset(&il->isr_stats, 0, sizeof(il->isr_stats));
4376 }
4377
4378 int il_mac_conf_tx(struct ieee80211_hw *hw,
4379 struct ieee80211_vif *vif, u16 queue,
4380 const struct ieee80211_tx_queue_params *params)
4381 {
4382 struct il_priv *il = hw->priv;
4383 unsigned long flags;
4384 int q;
4385
4386 D_MAC80211("enter\n");
4387
4388 if (!il_is_ready_rf(il)) {
4389 D_MAC80211("leave - RF not ready\n");
4390 return -EIO;
4391 }
4392
4393 if (queue >= AC_NUM) {
4394 D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
4395 return 0;
4396 }
4397
4398 q = AC_NUM - 1 - queue;
4399
4400 spin_lock_irqsave(&il->lock, flags);
4401
4402 il->ctx.qos_data.def_qos_parm.ac[q].cw_min =
4403 cpu_to_le16(params->cw_min);
4404 il->ctx.qos_data.def_qos_parm.ac[q].cw_max =
4405 cpu_to_le16(params->cw_max);
4406 il->ctx.qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4407 il->ctx.qos_data.def_qos_parm.ac[q].edca_txop =
4408 cpu_to_le16((params->txop * 32));
4409
4410 il->ctx.qos_data.def_qos_parm.ac[q].reserved1 = 0;
4411
4412 spin_unlock_irqrestore(&il->lock, flags);
4413
4414 D_MAC80211("leave\n");
4415 return 0;
4416 }
4417 EXPORT_SYMBOL(il_mac_conf_tx);
4418
4419 int il_mac_tx_last_beacon(struct ieee80211_hw *hw)
4420 {
4421 struct il_priv *il = hw->priv;
4422
4423 return il->ibss_manager == IL_IBSS_MANAGER;
4424 }
4425 EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
4426
4427 static int
4428 il_set_mode(struct il_priv *il, struct il_rxon_context *ctx)
4429 {
4430 il_connection_init_rx_config(il, ctx);
4431
4432 if (il->cfg->ops->hcmd->set_rxon_chain)
4433 il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
4434
4435 return il_commit_rxon(il, ctx);
4436 }
4437
4438 static int il_setup_interface(struct il_priv *il,
4439 struct il_rxon_context *ctx)
4440 {
4441 struct ieee80211_vif *vif = ctx->vif;
4442 int err;
4443
4444 lockdep_assert_held(&il->mutex);
4445
4446 /*
4447 * This variable will be correct only when there's just
4448 * a single context, but all code using it is for hardware
4449 * that supports only one context.
4450 */
4451 il->iw_mode = vif->type;
4452
4453 ctx->is_active = true;
4454
4455 err = il_set_mode(il, ctx);
4456 if (err) {
4457 if (!ctx->always_active)
4458 ctx->is_active = false;
4459 return err;
4460 }
4461
4462 return 0;
4463 }
4464
4465 int
4466 il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
4467 {
4468 struct il_priv *il = hw->priv;
4469 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
4470 int err;
4471 u32 modes;
4472
4473 D_MAC80211("enter: type %d, addr %pM\n",
4474 vif->type, vif->addr);
4475
4476 mutex_lock(&il->mutex);
4477
4478 if (!il_is_ready_rf(il)) {
4479 IL_WARN("Try to add interface when device not ready\n");
4480 err = -EINVAL;
4481 goto out;
4482 }
4483
4484
4485 /* check if busy context is exclusive */
4486 if (il->ctx.vif &&
4487 (il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type))) {
4488 err = -EINVAL;
4489 goto out;
4490 }
4491
4492 modes = il->ctx.interface_modes | il->ctx.exclusive_interface_modes;
4493 if (!(modes & BIT(vif->type))) {
4494 err = -EOPNOTSUPP;
4495 goto out;
4496 }
4497
4498 vif_priv->ctx = &il->ctx;
4499 il->ctx.vif = vif;
4500
4501 err = il_setup_interface(il, &il->ctx);
4502 if (err) {
4503 il->ctx.vif = NULL;
4504 il->iw_mode = NL80211_IFTYPE_STATION;
4505 }
4506
4507 out:
4508 mutex_unlock(&il->mutex);
4509
4510 D_MAC80211("leave\n");
4511 return err;
4512 }
4513 EXPORT_SYMBOL(il_mac_add_interface);
4514
4515 static void il_teardown_interface(struct il_priv *il,
4516 struct ieee80211_vif *vif,
4517 bool mode_change)
4518 {
4519 struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
4520
4521 lockdep_assert_held(&il->mutex);
4522
4523 if (il->scan_vif == vif) {
4524 il_scan_cancel_timeout(il, 200);
4525 il_force_scan_end(il);
4526 }
4527
4528 if (!mode_change) {
4529 il_set_mode(il, ctx);
4530 if (!ctx->always_active)
4531 ctx->is_active = false;
4532 }
4533 }
4534
4535 void il_mac_remove_interface(struct ieee80211_hw *hw,
4536 struct ieee80211_vif *vif)
4537 {
4538 struct il_priv *il = hw->priv;
4539 struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
4540
4541 D_MAC80211("enter\n");
4542
4543 mutex_lock(&il->mutex);
4544
4545 WARN_ON(ctx->vif != vif);
4546 ctx->vif = NULL;
4547
4548 il_teardown_interface(il, vif, false);
4549
4550 memset(il->bssid, 0, ETH_ALEN);
4551 mutex_unlock(&il->mutex);
4552
4553 D_MAC80211("leave\n");
4554
4555 }
4556 EXPORT_SYMBOL(il_mac_remove_interface);
4557
4558 int il_alloc_txq_mem(struct il_priv *il)
4559 {
4560 if (!il->txq)
4561 il->txq = kzalloc(
4562 sizeof(struct il_tx_queue) *
4563 il->cfg->base_params->num_of_queues,
4564 GFP_KERNEL);
4565 if (!il->txq) {
4566 IL_ERR("Not enough memory for txq\n");
4567 return -ENOMEM;
4568 }
4569 return 0;
4570 }
4571 EXPORT_SYMBOL(il_alloc_txq_mem);
4572
4573 void il_txq_mem(struct il_priv *il)
4574 {
4575 kfree(il->txq);
4576 il->txq = NULL;
4577 }
4578 EXPORT_SYMBOL(il_txq_mem);
4579
4580 #ifdef CONFIG_IWLEGACY_DEBUGFS
4581
4582 #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES)
4583
4584 void il_reset_traffic_log(struct il_priv *il)
4585 {
4586 il->tx_traffic_idx = 0;
4587 il->rx_traffic_idx = 0;
4588 if (il->tx_traffic)
4589 memset(il->tx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
4590 if (il->rx_traffic)
4591 memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
4592 }
4593
4594 int il_alloc_traffic_mem(struct il_priv *il)
4595 {
4596 u32 traffic_size = IL_TRAFFIC_DUMP_SIZE;
4597
4598 if (il_debug_level & IL_DL_TX) {
4599 if (!il->tx_traffic) {
4600 il->tx_traffic =
4601 kzalloc(traffic_size, GFP_KERNEL);
4602 if (!il->tx_traffic)
4603 return -ENOMEM;
4604 }
4605 }
4606 if (il_debug_level & IL_DL_RX) {
4607 if (!il->rx_traffic) {
4608 il->rx_traffic =
4609 kzalloc(traffic_size, GFP_KERNEL);
4610 if (!il->rx_traffic)
4611 return -ENOMEM;
4612 }
4613 }
4614 il_reset_traffic_log(il);
4615 return 0;
4616 }
4617 EXPORT_SYMBOL(il_alloc_traffic_mem);
4618
4619 void il_free_traffic_mem(struct il_priv *il)
4620 {
4621 kfree(il->tx_traffic);
4622 il->tx_traffic = NULL;
4623
4624 kfree(il->rx_traffic);
4625 il->rx_traffic = NULL;
4626 }
4627 EXPORT_SYMBOL(il_free_traffic_mem);
4628
4629 void il_dbg_log_tx_data_frame(struct il_priv *il,
4630 u16 length, struct ieee80211_hdr *header)
4631 {
4632 __le16 fc;
4633 u16 len;
4634
4635 if (likely(!(il_debug_level & IL_DL_TX)))
4636 return;
4637
4638 if (!il->tx_traffic)
4639 return;
4640
4641 fc = header->frame_control;
4642 if (ieee80211_is_data(fc)) {
4643 len = (length > IL_TRAFFIC_ENTRY_SIZE)
4644 ? IL_TRAFFIC_ENTRY_SIZE : length;
4645 memcpy((il->tx_traffic +
4646 (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
4647 header, len);
4648 il->tx_traffic_idx =
4649 (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
4650 }
4651 }
4652 EXPORT_SYMBOL(il_dbg_log_tx_data_frame);
4653
4654 void il_dbg_log_rx_data_frame(struct il_priv *il,
4655 u16 length, struct ieee80211_hdr *header)
4656 {
4657 __le16 fc;
4658 u16 len;
4659
4660 if (likely(!(il_debug_level & IL_DL_RX)))
4661 return;
4662
4663 if (!il->rx_traffic)
4664 return;
4665
4666 fc = header->frame_control;
4667 if (ieee80211_is_data(fc)) {
4668 len = (length > IL_TRAFFIC_ENTRY_SIZE)
4669 ? IL_TRAFFIC_ENTRY_SIZE : length;
4670 memcpy((il->rx_traffic +
4671 (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
4672 header, len);
4673 il->rx_traffic_idx =
4674 (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
4675 }
4676 }
4677 EXPORT_SYMBOL(il_dbg_log_rx_data_frame);
4678
4679 const char *il_get_mgmt_string(int cmd)
4680 {
4681 switch (cmd) {
4682 IL_CMD(MANAGEMENT_ASSOC_REQ);
4683 IL_CMD(MANAGEMENT_ASSOC_RESP);
4684 IL_CMD(MANAGEMENT_REASSOC_REQ);
4685 IL_CMD(MANAGEMENT_REASSOC_RESP);
4686 IL_CMD(MANAGEMENT_PROBE_REQ);
4687 IL_CMD(MANAGEMENT_PROBE_RESP);
4688 IL_CMD(MANAGEMENT_BEACON);
4689 IL_CMD(MANAGEMENT_ATIM);
4690 IL_CMD(MANAGEMENT_DISASSOC);
4691 IL_CMD(MANAGEMENT_AUTH);
4692 IL_CMD(MANAGEMENT_DEAUTH);
4693 IL_CMD(MANAGEMENT_ACTION);
4694 default:
4695 return "UNKNOWN";
4696
4697 }
4698 }
4699
4700 const char *il_get_ctrl_string(int cmd)
4701 {
4702 switch (cmd) {
4703 IL_CMD(CONTROL_BACK_REQ);
4704 IL_CMD(CONTROL_BACK);
4705 IL_CMD(CONTROL_PSPOLL);
4706 IL_CMD(CONTROL_RTS);
4707 IL_CMD(CONTROL_CTS);
4708 IL_CMD(CONTROL_ACK);
4709 IL_CMD(CONTROL_CFEND);
4710 IL_CMD(CONTROL_CFENDACK);
4711 default:
4712 return "UNKNOWN";
4713
4714 }
4715 }
4716
4717 void il_clear_traffic_stats(struct il_priv *il)
4718 {
4719 memset(&il->tx_stats, 0, sizeof(struct traffic_stats));
4720 memset(&il->rx_stats, 0, sizeof(struct traffic_stats));
4721 }
4722
4723 /*
4724 * if CONFIG_IWLEGACY_DEBUGFS defined,
4725 * il_update_stats function will
4726 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass
4727 * Use debugFs to display the rx/rx_stats
4728 * if CONFIG_IWLEGACY_DEBUGFS not being defined, then no MGMT and CTRL
4729 * information will be recorded, but DATA pkt still will be recorded
4730 * for the reason of il_led.c need to control the led blinking based on
4731 * number of tx and rx data.
4732 *
4733 */
4734 void
4735 il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
4736 {
4737 struct traffic_stats *stats;
4738
4739 if (is_tx)
4740 stats = &il->tx_stats;
4741 else
4742 stats = &il->rx_stats;
4743
4744 if (ieee80211_is_mgmt(fc)) {
4745 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
4746 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
4747 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
4748 break;
4749 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
4750 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
4751 break;
4752 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
4753 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
4754 break;
4755 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
4756 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
4757 break;
4758 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
4759 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
4760 break;
4761 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
4762 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
4763 break;
4764 case cpu_to_le16(IEEE80211_STYPE_BEACON):
4765 stats->mgmt[MANAGEMENT_BEACON]++;
4766 break;
4767 case cpu_to_le16(IEEE80211_STYPE_ATIM):
4768 stats->mgmt[MANAGEMENT_ATIM]++;
4769 break;
4770 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
4771 stats->mgmt[MANAGEMENT_DISASSOC]++;
4772 break;
4773 case cpu_to_le16(IEEE80211_STYPE_AUTH):
4774 stats->mgmt[MANAGEMENT_AUTH]++;
4775 break;
4776 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
4777 stats->mgmt[MANAGEMENT_DEAUTH]++;
4778 break;
4779 case cpu_to_le16(IEEE80211_STYPE_ACTION):
4780 stats->mgmt[MANAGEMENT_ACTION]++;
4781 break;
4782 }
4783 } else if (ieee80211_is_ctl(fc)) {
4784 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
4785 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
4786 stats->ctrl[CONTROL_BACK_REQ]++;
4787 break;
4788 case cpu_to_le16(IEEE80211_STYPE_BACK):
4789 stats->ctrl[CONTROL_BACK]++;
4790 break;
4791 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
4792 stats->ctrl[CONTROL_PSPOLL]++;
4793 break;
4794 case cpu_to_le16(IEEE80211_STYPE_RTS):
4795 stats->ctrl[CONTROL_RTS]++;
4796 break;
4797 case cpu_to_le16(IEEE80211_STYPE_CTS):
4798 stats->ctrl[CONTROL_CTS]++;
4799 break;
4800 case cpu_to_le16(IEEE80211_STYPE_ACK):
4801 stats->ctrl[CONTROL_ACK]++;
4802 break;
4803 case cpu_to_le16(IEEE80211_STYPE_CFEND):
4804 stats->ctrl[CONTROL_CFEND]++;
4805 break;
4806 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
4807 stats->ctrl[CONTROL_CFENDACK]++;
4808 break;
4809 }
4810 } else {
4811 /* data */
4812 stats->data_cnt++;
4813 stats->data_bytes += len;
4814 }
4815 }
4816 EXPORT_SYMBOL(il_update_stats);
4817 #endif
4818
4819 int il_force_reset(struct il_priv *il, bool external)
4820 {
4821 struct il_force_reset *force_reset;
4822
4823 if (test_bit(S_EXIT_PENDING, &il->status))
4824 return -EINVAL;
4825
4826 force_reset = &il->force_reset;
4827 force_reset->reset_request_count++;
4828 if (!external) {
4829 if (force_reset->last_force_reset_jiffies &&
4830 time_after(force_reset->last_force_reset_jiffies +
4831 force_reset->reset_duration, jiffies)) {
4832 D_INFO("force reset rejected\n");
4833 force_reset->reset_reject_count++;
4834 return -EAGAIN;
4835 }
4836 }
4837 force_reset->reset_success_count++;
4838 force_reset->last_force_reset_jiffies = jiffies;
4839
4840 /*
4841 * if the request is from external(ex: debugfs),
4842 * then always perform the request in regardless the module
4843 * parameter setting
4844 * if the request is from internal (uCode error or driver
4845 * detect failure), then fw_restart module parameter
4846 * need to be check before performing firmware reload
4847 */
4848
4849 if (!external && !il->cfg->mod_params->restart_fw) {
4850 D_INFO("Cancel firmware reload based on "
4851 "module parameter setting\n");
4852 return 0;
4853 }
4854
4855 IL_ERR("On demand firmware reload\n");
4856
4857 /* Set the FW error flag -- cleared on il_down */
4858 set_bit(S_FW_ERROR, &il->status);
4859 wake_up(&il->wait_command_queue);
4860 /*
4861 * Keep the restart process from trying to send host
4862 * commands by clearing the INIT status bit
4863 */
4864 clear_bit(S_READY, &il->status);
4865 queue_work(il->workqueue, &il->restart);
4866
4867 return 0;
4868 }
4869
4870 int
4871 il_mac_change_interface(struct ieee80211_hw *hw,
4872 struct ieee80211_vif *vif,
4873 enum nl80211_iftype newtype, bool newp2p)
4874 {
4875 struct il_priv *il = hw->priv;
4876 struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
4877 u32 modes;
4878 int err;
4879
4880 newtype = ieee80211_iftype_p2p(newtype, newp2p);
4881
4882 mutex_lock(&il->mutex);
4883
4884 if (!ctx->vif || !il_is_ready_rf(il)) {
4885 /*
4886 * Huh? But wait ... this can maybe happen when
4887 * we're in the middle of a firmware restart!
4888 */
4889 err = -EBUSY;
4890 goto out;
4891 }
4892
4893 modes = ctx->interface_modes | ctx->exclusive_interface_modes;
4894 if (!(modes & BIT(newtype))) {
4895 err = -EOPNOTSUPP;
4896 goto out;
4897 }
4898
4899 if ((il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type)) ||
4900 (il->ctx.exclusive_interface_modes & BIT(newtype))) {
4901 err = -EINVAL;
4902 goto out;
4903 }
4904
4905 /* success */
4906 il_teardown_interface(il, vif, true);
4907 vif->type = newtype;
4908 vif->p2p = newp2p;
4909 err = il_setup_interface(il, ctx);
4910 WARN_ON(err);
4911 /*
4912 * We've switched internally, but submitting to the
4913 * device may have failed for some reason. Mask this
4914 * error, because otherwise mac80211 will not switch
4915 * (and set the interface type back) and we'll be
4916 * out of sync with it.
4917 */
4918 err = 0;
4919
4920 out:
4921 mutex_unlock(&il->mutex);
4922 return err;
4923 }
4924 EXPORT_SYMBOL(il_mac_change_interface);
4925
4926 /*
4927 * On every watchdog tick we check (latest) time stamp. If it does not
4928 * change during timeout period and queue is not empty we reset firmware.
4929 */
4930 static int il_check_stuck_queue(struct il_priv *il, int cnt)
4931 {
4932 struct il_tx_queue *txq = &il->txq[cnt];
4933 struct il_queue *q = &txq->q;
4934 unsigned long timeout;
4935 int ret;
4936
4937 if (q->read_ptr == q->write_ptr) {
4938 txq->time_stamp = jiffies;
4939 return 0;
4940 }
4941
4942 timeout = txq->time_stamp +
4943 msecs_to_jiffies(il->cfg->base_params->wd_timeout);
4944
4945 if (time_after(jiffies, timeout)) {
4946 IL_ERR("Queue %d stuck for %u ms.\n",
4947 q->id, il->cfg->base_params->wd_timeout);
4948 ret = il_force_reset(il, false);
4949 return (ret == -EAGAIN) ? 0 : 1;
4950 }
4951
4952 return 0;
4953 }
4954
4955 /*
4956 * Making watchdog tick be a quarter of timeout assure we will
4957 * discover the queue hung between timeout and 1.25*timeout
4958 */
4959 #define IL_WD_TICK(timeout) ((timeout) / 4)
4960
4961 /*
4962 * Watchdog timer callback, we check each tx queue for stuck, if if hung
4963 * we reset the firmware. If everything is fine just rearm the timer.
4964 */
4965 void il_bg_watchdog(unsigned long data)
4966 {
4967 struct il_priv *il = (struct il_priv *)data;
4968 int cnt;
4969 unsigned long timeout;
4970
4971 if (test_bit(S_EXIT_PENDING, &il->status))
4972 return;
4973
4974 timeout = il->cfg->base_params->wd_timeout;
4975 if (timeout == 0)
4976 return;
4977
4978 /* monitor and check for stuck cmd queue */
4979 if (il_check_stuck_queue(il, il->cmd_queue))
4980 return;
4981
4982 /* monitor and check for other stuck queues */
4983 if (il_is_any_associated(il)) {
4984 for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
4985 /* skip as we already checked the command queue */
4986 if (cnt == il->cmd_queue)
4987 continue;
4988 if (il_check_stuck_queue(il, cnt))
4989 return;
4990 }
4991 }
4992
4993 mod_timer(&il->watchdog, jiffies +
4994 msecs_to_jiffies(IL_WD_TICK(timeout)));
4995 }
4996 EXPORT_SYMBOL(il_bg_watchdog);
4997
4998 void il_setup_watchdog(struct il_priv *il)
4999 {
5000 unsigned int timeout = il->cfg->base_params->wd_timeout;
5001
5002 if (timeout)
5003 mod_timer(&il->watchdog,
5004 jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
5005 else
5006 del_timer(&il->watchdog);
5007 }
5008 EXPORT_SYMBOL(il_setup_watchdog);
5009
5010 /*
5011 * extended beacon time format
5012 * time in usec will be changed into a 32-bit value in extended:internal format
5013 * the extended part is the beacon counts
5014 * the internal part is the time in usec within one beacon interval
5015 */
5016 u32
5017 il_usecs_to_beacons(struct il_priv *il,
5018 u32 usec, u32 beacon_interval)
5019 {
5020 u32 quot;
5021 u32 rem;
5022 u32 interval = beacon_interval * TIME_UNIT;
5023
5024 if (!interval || !usec)
5025 return 0;
5026
5027 quot = (usec / interval) &
5028 (il_beacon_time_mask_high(il,
5029 il->hw_params.beacon_time_tsf_bits) >>
5030 il->hw_params.beacon_time_tsf_bits);
5031 rem = (usec % interval) & il_beacon_time_mask_low(il,
5032 il->hw_params.beacon_time_tsf_bits);
5033
5034 return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
5035 }
5036 EXPORT_SYMBOL(il_usecs_to_beacons);
5037
5038 /* base is usually what we get from ucode with each received frame,
5039 * the same as HW timer counter counting down
5040 */
5041 __le32 il_add_beacon_time(struct il_priv *il, u32 base,
5042 u32 addon, u32 beacon_interval)
5043 {
5044 u32 base_low = base & il_beacon_time_mask_low(il,
5045 il->hw_params.beacon_time_tsf_bits);
5046 u32 addon_low = addon & il_beacon_time_mask_low(il,
5047 il->hw_params.beacon_time_tsf_bits);
5048 u32 interval = beacon_interval * TIME_UNIT;
5049 u32 res = (base & il_beacon_time_mask_high(il,
5050 il->hw_params.beacon_time_tsf_bits)) +
5051 (addon & il_beacon_time_mask_high(il,
5052 il->hw_params.beacon_time_tsf_bits));
5053
5054 if (base_low > addon_low)
5055 res += base_low - addon_low;
5056 else if (base_low < addon_low) {
5057 res += interval + base_low - addon_low;
5058 res += (1 << il->hw_params.beacon_time_tsf_bits);
5059 } else
5060 res += (1 << il->hw_params.beacon_time_tsf_bits);
5061
5062 return cpu_to_le32(res);
5063 }
5064 EXPORT_SYMBOL(il_add_beacon_time);
5065
5066 #ifdef CONFIG_PM
5067
5068 int il_pci_suspend(struct device *device)
5069 {
5070 struct pci_dev *pdev = to_pci_dev(device);
5071 struct il_priv *il = pci_get_drvdata(pdev);
5072
5073 /*
5074 * This function is called when system goes into suspend state
5075 * mac80211 will call il_mac_stop() from the mac80211 suspend function
5076 * first but since il_mac_stop() has no knowledge of who the caller is,
5077 * it will not call apm_ops.stop() to stop the DMA operation.
5078 * Calling apm_ops.stop here to make sure we stop the DMA.
5079 */
5080 il_apm_stop(il);
5081
5082 return 0;
5083 }
5084 EXPORT_SYMBOL(il_pci_suspend);
5085
5086 int il_pci_resume(struct device *device)
5087 {
5088 struct pci_dev *pdev = to_pci_dev(device);
5089 struct il_priv *il = pci_get_drvdata(pdev);
5090 bool hw_rfkill = false;
5091
5092 /*
5093 * We disable the RETRY_TIMEOUT register (0x41) to keep
5094 * PCI Tx retries from interfering with C3 CPU state.
5095 */
5096 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
5097
5098 il_enable_interrupts(il);
5099
5100 if (!(_il_rd(il, CSR_GP_CNTRL) &
5101 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
5102 hw_rfkill = true;
5103
5104 if (hw_rfkill)
5105 set_bit(S_RF_KILL_HW, &il->status);
5106 else
5107 clear_bit(S_RF_KILL_HW, &il->status);
5108
5109 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
5110
5111 return 0;
5112 }
5113 EXPORT_SYMBOL(il_pci_resume);
5114
5115 const struct dev_pm_ops il_pm_ops = {
5116 .suspend = il_pci_suspend,
5117 .resume = il_pci_resume,
5118 .freeze = il_pci_suspend,
5119 .thaw = il_pci_resume,
5120 .poweroff = il_pci_suspend,
5121 .restore = il_pci_resume,
5122 };
5123 EXPORT_SYMBOL(il_pm_ops);
5124
5125 #endif /* CONFIG_PM */
5126
5127 static void
5128 il_update_qos(struct il_priv *il, struct il_rxon_context *ctx)
5129 {
5130 if (test_bit(S_EXIT_PENDING, &il->status))
5131 return;
5132
5133 if (!ctx->is_active)
5134 return;
5135
5136 ctx->qos_data.def_qos_parm.qos_flags = 0;
5137
5138 if (ctx->qos_data.qos_active)
5139 ctx->qos_data.def_qos_parm.qos_flags |=
5140 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
5141
5142 if (ctx->ht.enabled)
5143 ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
5144
5145 D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
5146 ctx->qos_data.qos_active,
5147 ctx->qos_data.def_qos_parm.qos_flags);
5148
5149 il_send_cmd_pdu_async(il, ctx->qos_cmd,
5150 sizeof(struct il_qosparam_cmd),
5151 &ctx->qos_data.def_qos_parm, NULL);
5152 }
5153
5154 /**
5155 * il_mac_config - mac80211 config callback
5156 */
5157 int il_mac_config(struct ieee80211_hw *hw, u32 changed)
5158 {
5159 struct il_priv *il = hw->priv;
5160 const struct il_channel_info *ch_info;
5161 struct ieee80211_conf *conf = &hw->conf;
5162 struct ieee80211_channel *channel = conf->channel;
5163 struct il_ht_config *ht_conf = &il->current_ht_config;
5164 struct il_rxon_context *ctx = &il->ctx;
5165 unsigned long flags = 0;
5166 int ret = 0;
5167 u16 ch;
5168 int scan_active = 0;
5169 bool ht_changed = false;
5170
5171 if (WARN_ON(!il->cfg->ops->legacy))
5172 return -EOPNOTSUPP;
5173
5174 mutex_lock(&il->mutex);
5175
5176 D_MAC80211("enter to channel %d changed 0x%X\n",
5177 channel->hw_value, changed);
5178
5179 if (unlikely(test_bit(S_SCANNING, &il->status))) {
5180 scan_active = 1;
5181 D_MAC80211("scan active\n");
5182 }
5183
5184 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
5185 IEEE80211_CONF_CHANGE_CHANNEL)) {
5186 /* mac80211 uses static for non-HT which is what we want */
5187 il->current_ht_config.smps = conf->smps_mode;
5188
5189 /*
5190 * Recalculate chain counts.
5191 *
5192 * If monitor mode is enabled then mac80211 will
5193 * set up the SM PS mode to OFF if an HT channel is
5194 * configured.
5195 */
5196 if (il->cfg->ops->hcmd->set_rxon_chain)
5197 il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx);
5198 }
5199
5200 /* during scanning mac80211 will delay channel setting until
5201 * scan finish with changed = 0
5202 */
5203 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
5204
5205 if (scan_active)
5206 goto set_ch_out;
5207
5208 ch = channel->hw_value;
5209 ch_info = il_get_channel_info(il, channel->band, ch);
5210 if (!il_is_channel_valid(ch_info)) {
5211 D_MAC80211("leave - invalid channel\n");
5212 ret = -EINVAL;
5213 goto set_ch_out;
5214 }
5215
5216 if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
5217 !il_is_channel_ibss(ch_info)) {
5218 D_MAC80211("leave - not IBSS channel\n");
5219 ret = -EINVAL;
5220 goto set_ch_out;
5221 }
5222
5223 spin_lock_irqsave(&il->lock, flags);
5224
5225 /* Configure HT40 channels */
5226 if (ctx->ht.enabled != conf_is_ht(conf)) {
5227 ctx->ht.enabled = conf_is_ht(conf);
5228 ht_changed = true;
5229 }
5230 if (ctx->ht.enabled) {
5231 if (conf_is_ht40_minus(conf)) {
5232 ctx->ht.extension_chan_offset =
5233 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
5234 ctx->ht.is_40mhz = true;
5235 } else if (conf_is_ht40_plus(conf)) {
5236 ctx->ht.extension_chan_offset =
5237 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
5238 ctx->ht.is_40mhz = true;
5239 } else {
5240 ctx->ht.extension_chan_offset =
5241 IEEE80211_HT_PARAM_CHA_SEC_NONE;
5242 ctx->ht.is_40mhz = false;
5243 }
5244 } else
5245 ctx->ht.is_40mhz = false;
5246
5247 /*
5248 * Default to no protection. Protection mode will
5249 * later be set from BSS config in il_ht_conf
5250 */
5251 ctx->ht.protection =
5252 IEEE80211_HT_OP_MODE_PROTECTION_NONE;
5253
5254 /* if we are switching from ht to 2.4 clear flags
5255 * from any ht related info since 2.4 does not
5256 * support ht */
5257 if ((le16_to_cpu(ctx->staging.channel) != ch))
5258 ctx->staging.flags = 0;
5259
5260 il_set_rxon_channel(il, channel, ctx);
5261 il_set_rxon_ht(il, ht_conf);
5262
5263 il_set_flags_for_band(il, ctx, channel->band,
5264 ctx->vif);
5265
5266 spin_unlock_irqrestore(&il->lock, flags);
5267
5268 if (il->cfg->ops->legacy->update_bcast_stations)
5269 ret =
5270 il->cfg->ops->legacy->update_bcast_stations(il);
5271
5272 set_ch_out:
5273 /* The list of supported rates and rate mask can be different
5274 * for each band; since the band may have changed, reset
5275 * the rate mask to what mac80211 lists */
5276 il_set_rate(il);
5277 }
5278
5279 if (changed & (IEEE80211_CONF_CHANGE_PS |
5280 IEEE80211_CONF_CHANGE_IDLE)) {
5281 ret = il_power_update_mode(il, false);
5282 if (ret)
5283 D_MAC80211("Error setting sleep level\n");
5284 }
5285
5286 if (changed & IEEE80211_CONF_CHANGE_POWER) {
5287 D_MAC80211("TX Power old=%d new=%d\n",
5288 il->tx_power_user_lmt, conf->power_level);
5289
5290 il_set_tx_power(il, conf->power_level, false);
5291 }
5292
5293 if (!il_is_ready(il)) {
5294 D_MAC80211("leave - not ready\n");
5295 goto out;
5296 }
5297
5298 if (scan_active)
5299 goto out;
5300
5301 if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
5302 il_commit_rxon(il, ctx);
5303 else
5304 D_INFO("Not re-sending same RXON configuration.\n");
5305 if (ht_changed)
5306 il_update_qos(il, ctx);
5307
5308 out:
5309 D_MAC80211("leave\n");
5310 mutex_unlock(&il->mutex);
5311 return ret;
5312 }
5313 EXPORT_SYMBOL(il_mac_config);
5314
5315 void il_mac_reset_tsf(struct ieee80211_hw *hw,
5316 struct ieee80211_vif *vif)
5317 {
5318 struct il_priv *il = hw->priv;
5319 unsigned long flags;
5320 struct il_rxon_context *ctx = &il->ctx;
5321
5322 if (WARN_ON(!il->cfg->ops->legacy))
5323 return;
5324
5325 mutex_lock(&il->mutex);
5326 D_MAC80211("enter\n");
5327
5328 spin_lock_irqsave(&il->lock, flags);
5329 memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
5330 spin_unlock_irqrestore(&il->lock, flags);
5331
5332 spin_lock_irqsave(&il->lock, flags);
5333
5334 /* new association get rid of ibss beacon skb */
5335 if (il->beacon_skb)
5336 dev_kfree_skb(il->beacon_skb);
5337
5338 il->beacon_skb = NULL;
5339
5340 il->timestamp = 0;
5341
5342 spin_unlock_irqrestore(&il->lock, flags);
5343
5344 il_scan_cancel_timeout(il, 100);
5345 if (!il_is_ready_rf(il)) {
5346 D_MAC80211("leave - not ready\n");
5347 mutex_unlock(&il->mutex);
5348 return;
5349 }
5350
5351 /* we are restarting association process
5352 * clear RXON_FILTER_ASSOC_MSK bit
5353 */
5354 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5355 il_commit_rxon(il, ctx);
5356
5357 il_set_rate(il);
5358
5359 mutex_unlock(&il->mutex);
5360
5361 D_MAC80211("leave\n");
5362 }
5363 EXPORT_SYMBOL(il_mac_reset_tsf);
5364
5365 static void il_ht_conf(struct il_priv *il,
5366 struct ieee80211_vif *vif)
5367 {
5368 struct il_ht_config *ht_conf = &il->current_ht_config;
5369 struct ieee80211_sta *sta;
5370 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5371 struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
5372
5373 D_ASSOC("enter:\n");
5374
5375 if (!ctx->ht.enabled)
5376 return;
5377
5378 ctx->ht.protection =
5379 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5380 ctx->ht.non_gf_sta_present =
5381 !!(bss_conf->ht_operation_mode &
5382 IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5383
5384 ht_conf->single_chain_sufficient = false;
5385
5386 switch (vif->type) {
5387 case NL80211_IFTYPE_STATION:
5388 rcu_read_lock();
5389 sta = ieee80211_find_sta(vif, bss_conf->bssid);
5390 if (sta) {
5391 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
5392 int maxstreams;
5393
5394 maxstreams = (ht_cap->mcs.tx_params &
5395 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
5396 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
5397 maxstreams += 1;
5398
5399 if (ht_cap->mcs.rx_mask[1] == 0 &&
5400 ht_cap->mcs.rx_mask[2] == 0)
5401 ht_conf->single_chain_sufficient = true;
5402 if (maxstreams <= 1)
5403 ht_conf->single_chain_sufficient = true;
5404 } else {
5405 /*
5406 * If at all, this can only happen through a race
5407 * when the AP disconnects us while we're still
5408 * setting up the connection, in that case mac80211
5409 * will soon tell us about that.
5410 */
5411 ht_conf->single_chain_sufficient = true;
5412 }
5413 rcu_read_unlock();
5414 break;
5415 case NL80211_IFTYPE_ADHOC:
5416 ht_conf->single_chain_sufficient = true;
5417 break;
5418 default:
5419 break;
5420 }
5421
5422 D_ASSOC("leave\n");
5423 }
5424
5425 static inline void il_set_no_assoc(struct il_priv *il,
5426 struct ieee80211_vif *vif)
5427 {
5428 struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
5429
5430 /*
5431 * inform the ucode that there is no longer an
5432 * association and that no more packets should be
5433 * sent
5434 */
5435 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5436 ctx->staging.assoc_id = 0;
5437 il_commit_rxon(il, ctx);
5438 }
5439
5440 static void il_beacon_update(struct ieee80211_hw *hw,
5441 struct ieee80211_vif *vif)
5442 {
5443 struct il_priv *il = hw->priv;
5444 unsigned long flags;
5445 __le64 timestamp;
5446 struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
5447
5448 if (!skb)
5449 return;
5450
5451 D_MAC80211("enter\n");
5452
5453 lockdep_assert_held(&il->mutex);
5454
5455 if (!il->beacon_ctx) {
5456 IL_ERR("update beacon but no beacon context!\n");
5457 dev_kfree_skb(skb);
5458 return;
5459 }
5460
5461 spin_lock_irqsave(&il->lock, flags);
5462
5463 if (il->beacon_skb)
5464 dev_kfree_skb(il->beacon_skb);
5465
5466 il->beacon_skb = skb;
5467
5468 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
5469 il->timestamp = le64_to_cpu(timestamp);
5470
5471 D_MAC80211("leave\n");
5472 spin_unlock_irqrestore(&il->lock, flags);
5473
5474 if (!il_is_ready_rf(il)) {
5475 D_MAC80211("leave - RF not ready\n");
5476 return;
5477 }
5478
5479 il->cfg->ops->legacy->post_associate(il);
5480 }
5481
5482 void il_mac_bss_info_changed(struct ieee80211_hw *hw,
5483 struct ieee80211_vif *vif,
5484 struct ieee80211_bss_conf *bss_conf,
5485 u32 changes)
5486 {
5487 struct il_priv *il = hw->priv;
5488 struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
5489 int ret;
5490
5491 if (WARN_ON(!il->cfg->ops->legacy))
5492 return;
5493
5494 D_MAC80211("changes = 0x%X\n", changes);
5495
5496 mutex_lock(&il->mutex);
5497
5498 if (!il_is_alive(il)) {
5499 mutex_unlock(&il->mutex);
5500 return;
5501 }
5502
5503 if (changes & BSS_CHANGED_QOS) {
5504 unsigned long flags;
5505
5506 spin_lock_irqsave(&il->lock, flags);
5507 ctx->qos_data.qos_active = bss_conf->qos;
5508 il_update_qos(il, ctx);
5509 spin_unlock_irqrestore(&il->lock, flags);
5510 }
5511
5512 if (changes & BSS_CHANGED_BEACON_ENABLED) {
5513 /*
5514 * the add_interface code must make sure we only ever
5515 * have a single interface that could be beaconing at
5516 * any time.
5517 */
5518 if (vif->bss_conf.enable_beacon)
5519 il->beacon_ctx = ctx;
5520 else
5521 il->beacon_ctx = NULL;
5522 }
5523
5524 if (changes & BSS_CHANGED_BSSID) {
5525 D_MAC80211("BSSID %pM\n", bss_conf->bssid);
5526
5527 /*
5528 * If there is currently a HW scan going on in the
5529 * background then we need to cancel it else the RXON
5530 * below/in post_associate will fail.
5531 */
5532 if (il_scan_cancel_timeout(il, 100)) {
5533 IL_WARN(
5534 "Aborted scan still in progress after 100ms\n");
5535 D_MAC80211(
5536 "leaving - scan abort failed.\n");
5537 mutex_unlock(&il->mutex);
5538 return;
5539 }
5540
5541 /* mac80211 only sets assoc when in STATION mode */
5542 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
5543 memcpy(ctx->staging.bssid_addr,
5544 bss_conf->bssid, ETH_ALEN);
5545
5546 /* currently needed in a few places */
5547 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5548 } else {
5549 ctx->staging.filter_flags &=
5550 ~RXON_FILTER_ASSOC_MSK;
5551 }
5552
5553 }
5554
5555 /*
5556 * This needs to be after setting the BSSID in case
5557 * mac80211 decides to do both changes at once because
5558 * it will invoke post_associate.
5559 */
5560 if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
5561 il_beacon_update(hw, vif);
5562
5563 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
5564 D_MAC80211("ERP_PREAMBLE %d\n",
5565 bss_conf->use_short_preamble);
5566 if (bss_conf->use_short_preamble)
5567 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5568 else
5569 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5570 }
5571
5572 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
5573 D_MAC80211(
5574 "ERP_CTS %d\n", bss_conf->use_cts_prot);
5575 if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
5576 ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
5577 else
5578 ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
5579 if (bss_conf->use_cts_prot)
5580 ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
5581 else
5582 ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
5583 }
5584
5585 if (changes & BSS_CHANGED_BASIC_RATES) {
5586 /* XXX use this information
5587 *
5588 * To do that, remove code from il_set_rate() and put something
5589 * like this here:
5590 *
5591 if (A-band)
5592 ctx->staging.ofdm_basic_rates =
5593 bss_conf->basic_rates;
5594 else
5595 ctx->staging.ofdm_basic_rates =
5596 bss_conf->basic_rates >> 4;
5597 ctx->staging.cck_basic_rates =
5598 bss_conf->basic_rates & 0xF;
5599 */
5600 }
5601
5602 if (changes & BSS_CHANGED_HT) {
5603 il_ht_conf(il, vif);
5604
5605 if (il->cfg->ops->hcmd->set_rxon_chain)
5606 il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
5607 }
5608
5609 if (changes & BSS_CHANGED_ASSOC) {
5610 D_MAC80211("ASSOC %d\n", bss_conf->assoc);
5611 if (bss_conf->assoc) {
5612 il->timestamp = bss_conf->timestamp;
5613
5614 if (!il_is_rfkill(il))
5615 il->cfg->ops->legacy->post_associate(il);
5616 } else
5617 il_set_no_assoc(il, vif);
5618 }
5619
5620 if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) {
5621 D_MAC80211("Changes (%#x) while associated\n",
5622 changes);
5623 ret = il_send_rxon_assoc(il, ctx);
5624 if (!ret) {
5625 /* Sync active_rxon with latest change. */
5626 memcpy((void *)&ctx->active,
5627 &ctx->staging,
5628 sizeof(struct il_rxon_cmd));
5629 }
5630 }
5631
5632 if (changes & BSS_CHANGED_BEACON_ENABLED) {
5633 if (vif->bss_conf.enable_beacon) {
5634 memcpy(ctx->staging.bssid_addr,
5635 bss_conf->bssid, ETH_ALEN);
5636 memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5637 il->cfg->ops->legacy->config_ap(il);
5638 } else
5639 il_set_no_assoc(il, vif);
5640 }
5641
5642 if (changes & BSS_CHANGED_IBSS) {
5643 ret = il->cfg->ops->legacy->manage_ibss_station(il, vif,
5644 bss_conf->ibss_joined);
5645 if (ret)
5646 IL_ERR("failed to %s IBSS station %pM\n",
5647 bss_conf->ibss_joined ? "add" : "remove",
5648 bss_conf->bssid);
5649 }
5650
5651 mutex_unlock(&il->mutex);
5652
5653 D_MAC80211("leave\n");
5654 }
5655 EXPORT_SYMBOL(il_mac_bss_info_changed);
5656
5657 irqreturn_t il_isr(int irq, void *data)
5658 {
5659 struct il_priv *il = data;
5660 u32 inta, inta_mask;
5661 u32 inta_fh;
5662 unsigned long flags;
5663 if (!il)
5664 return IRQ_NONE;
5665
5666 spin_lock_irqsave(&il->lock, flags);
5667
5668 /* Disable (but don't clear!) interrupts here to avoid
5669 * back-to-back ISRs and sporadic interrupts from our NIC.
5670 * If we have something to service, the tasklet will re-enable ints.
5671 * If we *don't* have something, we'll re-enable before leaving here. */
5672 inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
5673 _il_wr(il, CSR_INT_MASK, 0x00000000);
5674
5675 /* Discover which interrupts are active/pending */
5676 inta = _il_rd(il, CSR_INT);
5677 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
5678
5679 /* Ignore interrupt if there's nothing in NIC to service.
5680 * This may be due to IRQ shared with another device,
5681 * or due to sporadic interrupts thrown from our NIC. */
5682 if (!inta && !inta_fh) {
5683 D_ISR(
5684 "Ignore interrupt, inta == 0, inta_fh == 0\n");
5685 goto none;
5686 }
5687
5688 if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
5689 /* Hardware disappeared. It might have already raised
5690 * an interrupt */
5691 IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
5692 goto unplugged;
5693 }
5694
5695 D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5696 inta, inta_mask, inta_fh);
5697
5698 inta &= ~CSR_INT_BIT_SCD;
5699
5700 /* il_irq_tasklet() will service interrupts and re-enable them */
5701 if (likely(inta || inta_fh))
5702 tasklet_schedule(&il->irq_tasklet);
5703
5704 unplugged:
5705 spin_unlock_irqrestore(&il->lock, flags);
5706 return IRQ_HANDLED;
5707
5708 none:
5709 /* re-enable interrupts here since we don't have anything to service. */
5710 /* only Re-enable if disabled by irq */
5711 if (test_bit(S_INT_ENABLED, &il->status))
5712 il_enable_interrupts(il);
5713 spin_unlock_irqrestore(&il->lock, flags);
5714 return IRQ_NONE;
5715 }
5716 EXPORT_SYMBOL(il_isr);
5717
5718 /*
5719 * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
5720 * function.
5721 */
5722 void il_tx_cmd_protection(struct il_priv *il,
5723 struct ieee80211_tx_info *info,
5724 __le16 fc, __le32 *tx_flags)
5725 {
5726 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
5727 *tx_flags |= TX_CMD_FLG_RTS_MSK;
5728 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
5729 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5730
5731 if (!ieee80211_is_mgmt(fc))
5732 return;
5733
5734 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
5735 case cpu_to_le16(IEEE80211_STYPE_AUTH):
5736 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
5737 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
5738 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
5739 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5740 *tx_flags |= TX_CMD_FLG_CTS_MSK;
5741 break;
5742 }
5743 } else if (info->control.rates[0].flags &
5744 IEEE80211_TX_RC_USE_CTS_PROTECT) {
5745 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5746 *tx_flags |= TX_CMD_FLG_CTS_MSK;
5747 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5748 }
5749 }
5750 EXPORT_SYMBOL(il_tx_cmd_protection);
This page took 0.153047 seconds and 5 git commands to generate.