1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
40 #include "iwl-eeprom.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
48 static int iwl4965_send_tx_power(struct iwl_priv
*priv
);
49 static int iwl4965_hw_get_temperature(const struct iwl_priv
*priv
);
51 /* Highest firmware API version supported */
52 #define IWL4965_UCODE_API_MAX 2
54 /* Lowest firmware API version supported */
55 #define IWL4965_UCODE_API_MIN 2
57 #define IWL4965_FW_PRE "iwlwifi-4965-"
58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
62 /* module parameters */
63 static struct iwl_mod_params iwl4965_mod_params
= {
64 .num_of_queues
= IWL49_NUM_QUEUES
,
65 .num_of_ampdu_queues
= IWL49_NUM_AMPDU_QUEUES
,
69 /* the rest are 0 by default */
72 /* check contents of special bootstrap uCode SRAM */
73 static int iwl4965_verify_bsm(struct iwl_priv
*priv
)
75 __le32
*image
= priv
->ucode_boot
.v_addr
;
76 u32 len
= priv
->ucode_boot
.len
;
80 IWL_DEBUG_INFO("Begin verify bsm\n");
82 /* verify BSM SRAM contents */
83 val
= iwl_read_prph(priv
, BSM_WR_DWCOUNT_REG
);
84 for (reg
= BSM_SRAM_LOWER_BOUND
;
85 reg
< BSM_SRAM_LOWER_BOUND
+ len
;
86 reg
+= sizeof(u32
), image
++) {
87 val
= iwl_read_prph(priv
, reg
);
88 if (val
!= le32_to_cpu(*image
)) {
89 IWL_ERROR("BSM uCode verification failed at "
90 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
92 reg
- BSM_SRAM_LOWER_BOUND
, len
,
93 val
, le32_to_cpu(*image
));
98 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
104 * iwl4965_load_bsm - Load bootstrap instructions
108 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
109 * in special SRAM that does not power down during RFKILL. When powering back
110 * up after power-saving sleeps (or during initial uCode load), the BSM loads
111 * the bootstrap program into the on-board processor, and starts it.
113 * The bootstrap program loads (via DMA) instructions and data for a new
114 * program from host DRAM locations indicated by the host driver in the
115 * BSM_DRAM_* registers. Once the new program is loaded, it starts
118 * When initializing the NIC, the host driver points the BSM to the
119 * "initialize" uCode image. This uCode sets up some internal data, then
120 * notifies host via "initialize alive" that it is complete.
122 * The host then replaces the BSM_DRAM_* pointer values to point to the
123 * normal runtime uCode instructions and a backup uCode data cache buffer
124 * (filled initially with starting data values for the on-board processor),
125 * then triggers the "initialize" uCode to load and launch the runtime uCode,
126 * which begins normal operation.
128 * When doing a power-save shutdown, runtime uCode saves data SRAM into
129 * the backup data cache in DRAM before SRAM is powered down.
131 * When powering back up, the BSM loads the bootstrap program. This reloads
132 * the runtime uCode instructions and the backup data cache into SRAM,
133 * and re-launches the runtime uCode from where it left off.
135 static int iwl4965_load_bsm(struct iwl_priv
*priv
)
137 __le32
*image
= priv
->ucode_boot
.v_addr
;
138 u32 len
= priv
->ucode_boot
.len
;
148 IWL_DEBUG_INFO("Begin load bsm\n");
150 priv
->ucode_type
= UCODE_RT
;
152 /* make sure bootstrap program is no larger than BSM's SRAM size */
153 if (len
> IWL_MAX_BSM_SIZE
)
156 /* Tell bootstrap uCode where to find the "Initialize" uCode
157 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
158 * NOTE: iwl_init_alive_start() will replace these values,
159 * after the "initialize" uCode has run, to point to
160 * runtime/protocol instructions and backup data cache.
162 pinst
= priv
->ucode_init
.p_addr
>> 4;
163 pdata
= priv
->ucode_init_data
.p_addr
>> 4;
164 inst_len
= priv
->ucode_init
.len
;
165 data_len
= priv
->ucode_init_data
.len
;
167 ret
= iwl_grab_nic_access(priv
);
171 iwl_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
172 iwl_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
173 iwl_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
, inst_len
);
174 iwl_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
, data_len
);
176 /* Fill BSM memory with bootstrap instructions */
177 for (reg_offset
= BSM_SRAM_LOWER_BOUND
;
178 reg_offset
< BSM_SRAM_LOWER_BOUND
+ len
;
179 reg_offset
+= sizeof(u32
), image
++)
180 _iwl_write_prph(priv
, reg_offset
, le32_to_cpu(*image
));
182 ret
= iwl4965_verify_bsm(priv
);
184 iwl_release_nic_access(priv
);
188 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
189 iwl_write_prph(priv
, BSM_WR_MEM_SRC_REG
, 0x0);
190 iwl_write_prph(priv
, BSM_WR_MEM_DST_REG
, RTC_INST_LOWER_BOUND
);
191 iwl_write_prph(priv
, BSM_WR_DWCOUNT_REG
, len
/ sizeof(u32
));
193 /* Load bootstrap code into instruction SRAM now,
194 * to prepare to load "initialize" uCode */
195 iwl_write_prph(priv
, BSM_WR_CTRL_REG
, BSM_WR_CTRL_REG_BIT_START
);
197 /* Wait for load of bootstrap uCode to finish */
198 for (i
= 0; i
< 100; i
++) {
199 done
= iwl_read_prph(priv
, BSM_WR_CTRL_REG
);
200 if (!(done
& BSM_WR_CTRL_REG_BIT_START
))
205 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i
);
207 IWL_ERROR("BSM write did not complete!\n");
211 /* Enable future boot loads whenever power management unit triggers it
212 * (e.g. when powering back up after power-save shutdown) */
213 iwl_write_prph(priv
, BSM_WR_CTRL_REG
, BSM_WR_CTRL_REG_BIT_START_EN
);
215 iwl_release_nic_access(priv
);
221 * iwl4965_set_ucode_ptrs - Set uCode address location
223 * Tell initialization uCode where to find runtime uCode.
225 * BSM registers initially contain pointers to initialization uCode.
226 * We need to replace them to load runtime uCode inst and data,
227 * and to save runtime data when powering down.
229 static int iwl4965_set_ucode_ptrs(struct iwl_priv
*priv
)
236 /* bits 35:4 for 4965 */
237 pinst
= priv
->ucode_code
.p_addr
>> 4;
238 pdata
= priv
->ucode_data_backup
.p_addr
>> 4;
240 spin_lock_irqsave(&priv
->lock
, flags
);
241 ret
= iwl_grab_nic_access(priv
);
243 spin_unlock_irqrestore(&priv
->lock
, flags
);
247 /* Tell bootstrap uCode where to find image to load */
248 iwl_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
249 iwl_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
250 iwl_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
,
251 priv
->ucode_data
.len
);
253 /* Inst byte count must be last to set up, bit 31 signals uCode
254 * that all new ptr/size info is in place */
255 iwl_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
,
256 priv
->ucode_code
.len
| BSM_DRAM_INST_LOAD
);
257 iwl_release_nic_access(priv
);
259 spin_unlock_irqrestore(&priv
->lock
, flags
);
261 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
267 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
269 * Called after REPLY_ALIVE notification received from "initialize" uCode.
271 * The 4965 "initialize" ALIVE reply contains calibration data for:
272 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
273 * (3945 does not contain this data).
275 * Tell "initialize" uCode to go ahead and load the runtime uCode.
277 static void iwl4965_init_alive_start(struct iwl_priv
*priv
)
279 /* Check alive response for "valid" sign from uCode */
280 if (priv
->card_alive_init
.is_valid
!= UCODE_VALID_OK
) {
281 /* We had an error bringing up the hardware, so take it
282 * all the way back down so we can try again */
283 IWL_DEBUG_INFO("Initialize Alive failed.\n");
287 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
288 * This is a paranoid check, because we would not have gotten the
289 * "initialize" alive if code weren't properly loaded. */
290 if (iwl_verify_ucode(priv
)) {
291 /* Runtime instruction load was bad;
292 * take it all the way back down so we can try again */
293 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
297 /* Calculate temperature */
298 priv
->temperature
= iwl4965_hw_get_temperature(priv
);
300 /* Send pointers to protocol/runtime uCode image ... init code will
301 * load and launch runtime uCode, which will send us another "Alive"
303 IWL_DEBUG_INFO("Initialization Alive received.\n");
304 if (iwl4965_set_ucode_ptrs(priv
)) {
305 /* Runtime instruction load won't happen;
306 * take it all the way back down so we can try again */
307 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
313 queue_work(priv
->workqueue
, &priv
->restart
);
316 static int is_fat_channel(__le32 rxon_flags
)
318 return (rxon_flags
& RXON_FLG_CHANNEL_MODE_PURE_40_MSK
) ||
319 (rxon_flags
& RXON_FLG_CHANNEL_MODE_MIXED_MSK
);
325 static u16
iwl4965_eeprom_calib_version(struct iwl_priv
*priv
)
327 return iwl_eeprom_query16(priv
, EEPROM_4965_CALIB_VERSION_OFFSET
);
331 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
332 * must be called under priv->lock and mac access
334 static void iwl4965_txq_set_sched(struct iwl_priv
*priv
, u32 mask
)
336 iwl_write_prph(priv
, IWL49_SCD_TXFACT
, mask
);
339 static int iwl4965_apm_init(struct iwl_priv
*priv
)
343 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
344 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER
);
346 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
347 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
348 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX
);
350 /* set "initialization complete" bit to move adapter
351 * D0U* --> D0A* state */
352 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
354 /* wait for clock stabilization */
355 ret
= iwl_poll_direct_bit(priv
, CSR_GP_CNTRL
,
356 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
358 IWL_DEBUG_INFO("Failed to init the card\n");
362 ret
= iwl_grab_nic_access(priv
);
367 iwl_write_prph(priv
, APMG_CLK_CTRL_REG
, APMG_CLK_VAL_DMA_CLK_RQT
|
368 APMG_CLK_VAL_BSM_CLK_RQT
);
372 /* disable L1-Active */
373 iwl_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
374 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
376 iwl_release_nic_access(priv
);
382 static void iwl4965_nic_config(struct iwl_priv
*priv
)
389 spin_lock_irqsave(&priv
->lock
, flags
);
391 if ((priv
->rev_id
& 0x80) == 0x80 && (priv
->rev_id
& 0x7f) < 8) {
392 pci_read_config_dword(priv
->pci_dev
, PCI_REG_WUM8
, &val
);
393 /* Enable No Snoop field */
394 pci_write_config_dword(priv
->pci_dev
, PCI_REG_WUM8
,
398 pci_read_config_word(priv
->pci_dev
, PCI_CFG_LINK_CTRL
, &link
);
400 /* L1 is enabled by BIOS */
401 if ((link
& PCI_CFG_LINK_CTRL_VAL_L1_EN
) == PCI_CFG_LINK_CTRL_VAL_L1_EN
)
402 /* disable L0S disabled L1A enabled */
403 iwl_set_bit(priv
, CSR_GIO_REG
, CSR_GIO_REG_VAL_L0S_ENABLED
);
405 /* L0S enabled L1A disabled */
406 iwl_clear_bit(priv
, CSR_GIO_REG
, CSR_GIO_REG_VAL_L0S_ENABLED
);
408 radio_cfg
= iwl_eeprom_query16(priv
, EEPROM_RADIO_CONFIG
);
410 /* write radio config values to register */
411 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg
) == EEPROM_4965_RF_CFG_TYPE_MAX
)
412 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
413 EEPROM_RF_CFG_TYPE_MSK(radio_cfg
) |
414 EEPROM_RF_CFG_STEP_MSK(radio_cfg
) |
415 EEPROM_RF_CFG_DASH_MSK(radio_cfg
));
417 /* set CSR_HW_CONFIG_REG for uCode use */
418 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
419 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI
|
420 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI
);
422 priv
->calib_info
= (struct iwl_eeprom_calib_info
*)
423 iwl_eeprom_query_addr(priv
, EEPROM_4965_CALIB_TXPOWER_OFFSET
);
425 spin_unlock_irqrestore(&priv
->lock
, flags
);
428 static int iwl4965_apm_stop_master(struct iwl_priv
*priv
)
433 spin_lock_irqsave(&priv
->lock
, flags
);
435 /* set stop master bit */
436 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_STOP_MASTER
);
438 ret
= iwl_poll_direct_bit(priv
, CSR_RESET
,
439 CSR_RESET_REG_FLAG_MASTER_DISABLED
, 100);
444 spin_unlock_irqrestore(&priv
->lock
, flags
);
445 IWL_DEBUG_INFO("stop master\n");
450 static void iwl4965_apm_stop(struct iwl_priv
*priv
)
454 iwl4965_apm_stop_master(priv
);
456 spin_lock_irqsave(&priv
->lock
, flags
);
458 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
461 /* clear "init complete" move adapter D0A* --> D0U state */
462 iwl_clear_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
463 spin_unlock_irqrestore(&priv
->lock
, flags
);
466 static int iwl4965_apm_reset(struct iwl_priv
*priv
)
471 iwl4965_apm_stop_master(priv
);
473 spin_lock_irqsave(&priv
->lock
, flags
);
475 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
479 /* FIXME: put here L1A -L0S w/a */
481 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
483 ret
= iwl_poll_direct_bit(priv
, CSR_GP_CNTRL
,
484 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
490 ret
= iwl_grab_nic_access(priv
);
493 /* Enable DMA and BSM Clock */
494 iwl_write_prph(priv
, APMG_CLK_EN_REG
, APMG_CLK_VAL_DMA_CLK_RQT
|
495 APMG_CLK_VAL_BSM_CLK_RQT
);
500 iwl_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
501 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
503 iwl_release_nic_access(priv
);
505 clear_bit(STATUS_HCMD_ACTIVE
, &priv
->status
);
506 wake_up_interruptible(&priv
->wait_command_queue
);
509 spin_unlock_irqrestore(&priv
->lock
, flags
);
514 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
515 * Called after every association, but this runs only once!
516 * ... once chain noise is calibrated the first time, it's good forever. */
517 static void iwl4965_chain_noise_reset(struct iwl_priv
*priv
)
519 struct iwl_chain_noise_data
*data
= &(priv
->chain_noise_data
);
521 if ((data
->state
== IWL_CHAIN_NOISE_ALIVE
) && iwl_is_associated(priv
)) {
522 struct iwl_calib_diff_gain_cmd cmd
;
524 memset(&cmd
, 0, sizeof(cmd
));
525 cmd
.hdr
.op_code
= IWL_PHY_CALIBRATE_DIFF_GAIN_CMD
;
529 if (iwl_send_cmd_pdu(priv
, REPLY_PHY_CALIBRATION_CMD
,
531 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
532 data
->state
= IWL_CHAIN_NOISE_ACCUMULATE
;
533 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
537 static void iwl4965_gain_computation(struct iwl_priv
*priv
,
539 u16 min_average_noise_antenna_i
,
540 u32 min_average_noise
)
543 struct iwl_chain_noise_data
*data
= &priv
->chain_noise_data
;
545 data
->delta_gain_code
[min_average_noise_antenna_i
] = 0;
547 for (i
= 0; i
< NUM_RX_CHAINS
; i
++) {
550 if (!(data
->disconn_array
[i
]) &&
551 (data
->delta_gain_code
[i
] ==
552 CHAIN_NOISE_DELTA_GAIN_INIT_VAL
)) {
553 delta_g
= average_noise
[i
] - min_average_noise
;
554 data
->delta_gain_code
[i
] = (u8
)((delta_g
* 10) / 15);
555 data
->delta_gain_code
[i
] =
556 min(data
->delta_gain_code
[i
],
557 (u8
) CHAIN_NOISE_MAX_DELTA_GAIN_CODE
);
559 data
->delta_gain_code
[i
] =
560 (data
->delta_gain_code
[i
] | (1 << 2));
562 data
->delta_gain_code
[i
] = 0;
565 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
566 data
->delta_gain_code
[0],
567 data
->delta_gain_code
[1],
568 data
->delta_gain_code
[2]);
570 /* Differential gain gets sent to uCode only once */
571 if (!data
->radio_write
) {
572 struct iwl_calib_diff_gain_cmd cmd
;
573 data
->radio_write
= 1;
575 memset(&cmd
, 0, sizeof(cmd
));
576 cmd
.hdr
.op_code
= IWL_PHY_CALIBRATE_DIFF_GAIN_CMD
;
577 cmd
.diff_gain_a
= data
->delta_gain_code
[0];
578 cmd
.diff_gain_b
= data
->delta_gain_code
[1];
579 cmd
.diff_gain_c
= data
->delta_gain_code
[2];
580 ret
= iwl_send_cmd_pdu(priv
, REPLY_PHY_CALIBRATION_CMD
,
583 IWL_DEBUG_CALIB("fail sending cmd "
584 "REPLY_PHY_CALIBRATION_CMD \n");
586 /* TODO we might want recalculate
587 * rx_chain in rxon cmd */
589 /* Mark so we run this algo only once! */
590 data
->state
= IWL_CHAIN_NOISE_CALIBRATED
;
592 data
->chain_noise_a
= 0;
593 data
->chain_noise_b
= 0;
594 data
->chain_noise_c
= 0;
595 data
->chain_signal_a
= 0;
596 data
->chain_signal_b
= 0;
597 data
->chain_signal_c
= 0;
598 data
->beacon_count
= 0;
601 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info
*info
,
604 if (info
->control
.rates
[0].flags
& IEEE80211_TX_RC_USE_RTS_CTS
) {
605 *tx_flags
|= TX_CMD_FLG_RTS_MSK
;
606 *tx_flags
&= ~TX_CMD_FLG_CTS_MSK
;
607 } else if (info
->control
.rates
[0].flags
& IEEE80211_TX_RC_USE_CTS_PROTECT
) {
608 *tx_flags
&= ~TX_CMD_FLG_RTS_MSK
;
609 *tx_flags
|= TX_CMD_FLG_CTS_MSK
;
613 static void iwl4965_bg_txpower_work(struct work_struct
*work
)
615 struct iwl_priv
*priv
= container_of(work
, struct iwl_priv
,
618 /* If a scan happened to start before we got here
619 * then just return; the statistics notification will
620 * kick off another scheduled work to compensate for
621 * any temperature delta we missed here. */
622 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
) ||
623 test_bit(STATUS_SCANNING
, &priv
->status
))
626 mutex_lock(&priv
->mutex
);
628 /* Regardless of if we are associated, we must reconfigure the
629 * TX power since frames can be sent on non-radar channels while
631 iwl4965_send_tx_power(priv
);
633 /* Update last_temperature to keep is_calib_needed from running
634 * when it isn't needed... */
635 priv
->last_temperature
= priv
->temperature
;
637 mutex_unlock(&priv
->mutex
);
641 * Acquire priv->lock before calling this function !
643 static void iwl4965_set_wr_ptrs(struct iwl_priv
*priv
, int txq_id
, u32 index
)
645 iwl_write_direct32(priv
, HBUS_TARG_WRPTR
,
646 (index
& 0xff) | (txq_id
<< 8));
647 iwl_write_prph(priv
, IWL49_SCD_QUEUE_RDPTR(txq_id
), index
);
651 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
652 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
653 * @scd_retry: (1) Indicates queue will be used in aggregation mode
655 * NOTE: Acquire priv->lock before calling this function !
657 static void iwl4965_tx_queue_set_status(struct iwl_priv
*priv
,
658 struct iwl_tx_queue
*txq
,
659 int tx_fifo_id
, int scd_retry
)
661 int txq_id
= txq
->q
.id
;
663 /* Find out whether to activate Tx queue */
664 int active
= test_bit(txq_id
, &priv
->txq_ctx_active_msk
) ? 1 : 0;
666 /* Set up and activate */
667 iwl_write_prph(priv
, IWL49_SCD_QUEUE_STATUS_BITS(txq_id
),
668 (active
<< IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
) |
669 (tx_fifo_id
<< IWL49_SCD_QUEUE_STTS_REG_POS_TXF
) |
670 (scd_retry
<< IWL49_SCD_QUEUE_STTS_REG_POS_WSL
) |
671 (scd_retry
<< IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK
) |
672 IWL49_SCD_QUEUE_STTS_REG_MSK
);
674 txq
->sched_retry
= scd_retry
;
676 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
677 active
? "Activate" : "Deactivate",
678 scd_retry
? "BA" : "AC", txq_id
, tx_fifo_id
);
681 static const u16 default_queue_to_tx_fifo
[] = {
691 static int iwl4965_alive_notify(struct iwl_priv
*priv
)
699 spin_lock_irqsave(&priv
->lock
, flags
);
701 ret
= iwl_grab_nic_access(priv
);
703 spin_unlock_irqrestore(&priv
->lock
, flags
);
707 /* Clear 4965's internal Tx Scheduler data base */
708 priv
->scd_base_addr
= iwl_read_prph(priv
, IWL49_SCD_SRAM_BASE_ADDR
);
709 a
= priv
->scd_base_addr
+ IWL49_SCD_CONTEXT_DATA_OFFSET
;
710 for (; a
< priv
->scd_base_addr
+ IWL49_SCD_TX_STTS_BITMAP_OFFSET
; a
+= 4)
711 iwl_write_targ_mem(priv
, a
, 0);
712 for (; a
< priv
->scd_base_addr
+ IWL49_SCD_TRANSLATE_TBL_OFFSET
; a
+= 4)
713 iwl_write_targ_mem(priv
, a
, 0);
714 for (; a
< sizeof(u16
) * priv
->hw_params
.max_txq_num
; a
+= 4)
715 iwl_write_targ_mem(priv
, a
, 0);
717 /* Tel 4965 where to find Tx byte count tables */
718 iwl_write_prph(priv
, IWL49_SCD_DRAM_BASE_ADDR
,
719 priv
->scd_bc_tbls
.dma
>> 10);
721 /* Enable DMA channel */
722 for (chan
= 0; chan
< FH49_TCSR_CHNL_NUM
; chan
++)
723 iwl_write_direct32(priv
, FH_TCSR_CHNL_TX_CONFIG_REG(chan
),
724 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE
|
725 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE
);
727 /* Update FH chicken bits */
728 reg_val
= iwl_read_direct32(priv
, FH_TX_CHICKEN_BITS_REG
);
729 iwl_write_direct32(priv
, FH_TX_CHICKEN_BITS_REG
,
730 reg_val
| FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN
);
732 /* Disable chain mode for all queues */
733 iwl_write_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, 0);
735 /* Initialize each Tx queue (including the command queue) */
736 for (i
= 0; i
< priv
->hw_params
.max_txq_num
; i
++) {
738 /* TFD circular buffer read/write indexes */
739 iwl_write_prph(priv
, IWL49_SCD_QUEUE_RDPTR(i
), 0);
740 iwl_write_direct32(priv
, HBUS_TARG_WRPTR
, 0 | (i
<< 8));
742 /* Max Tx Window size for Scheduler-ACK mode */
743 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
744 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i
),
746 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
747 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
750 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
751 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i
) +
754 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
) &
755 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
758 iwl_write_prph(priv
, IWL49_SCD_INTERRUPT_MASK
,
759 (1 << priv
->hw_params
.max_txq_num
) - 1);
761 /* Activate all Tx DMA/FIFO channels */
762 priv
->cfg
->ops
->lib
->txq_set_sched(priv
, IWL_MASK(0, 6));
764 iwl4965_set_wr_ptrs(priv
, IWL_CMD_QUEUE_NUM
, 0);
766 /* Map each Tx/cmd queue to its corresponding fifo */
767 for (i
= 0; i
< ARRAY_SIZE(default_queue_to_tx_fifo
); i
++) {
768 int ac
= default_queue_to_tx_fifo
[i
];
769 iwl_txq_ctx_activate(priv
, i
);
770 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[i
], ac
, 0);
773 iwl_release_nic_access(priv
);
774 spin_unlock_irqrestore(&priv
->lock
, flags
);
779 static struct iwl_sensitivity_ranges iwl4965_sensitivity
= {
783 .auto_corr_min_ofdm
= 85,
784 .auto_corr_min_ofdm_mrc
= 170,
785 .auto_corr_min_ofdm_x1
= 105,
786 .auto_corr_min_ofdm_mrc_x1
= 220,
788 .auto_corr_max_ofdm
= 120,
789 .auto_corr_max_ofdm_mrc
= 210,
790 .auto_corr_max_ofdm_x1
= 140,
791 .auto_corr_max_ofdm_mrc_x1
= 270,
793 .auto_corr_min_cck
= 125,
794 .auto_corr_max_cck
= 200,
795 .auto_corr_min_cck_mrc
= 200,
796 .auto_corr_max_cck_mrc
= 400,
803 * iwl4965_hw_set_hw_params
805 * Called when initializing driver
807 static int iwl4965_hw_set_hw_params(struct iwl_priv
*priv
)
810 if ((priv
->cfg
->mod_params
->num_of_queues
> IWL49_NUM_QUEUES
) ||
811 (priv
->cfg
->mod_params
->num_of_queues
< IWL_MIN_NUM_QUEUES
)) {
812 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
813 IWL_MIN_NUM_QUEUES
, IWL49_NUM_QUEUES
);
817 priv
->hw_params
.max_txq_num
= priv
->cfg
->mod_params
->num_of_queues
;
818 priv
->hw_params
.dma_chnl_num
= FH49_TCSR_CHNL_NUM
;
819 priv
->hw_params
.scd_bc_tbls_size
=
820 IWL49_NUM_QUEUES
* sizeof(struct iwl4965_scd_bc_tbl
);
821 priv
->hw_params
.max_stations
= IWL4965_STATION_COUNT
;
822 priv
->hw_params
.bcast_sta_id
= IWL4965_BROADCAST_ID
;
823 priv
->hw_params
.max_data_size
= IWL49_RTC_DATA_SIZE
;
824 priv
->hw_params
.max_inst_size
= IWL49_RTC_INST_SIZE
;
825 priv
->hw_params
.max_bsm_size
= BSM_SRAM_SIZE
;
826 priv
->hw_params
.fat_channel
= BIT(IEEE80211_BAND_5GHZ
);
828 priv
->hw_params
.tx_chains_num
= 2;
829 priv
->hw_params
.rx_chains_num
= 2;
830 priv
->hw_params
.valid_tx_ant
= ANT_A
| ANT_B
;
831 priv
->hw_params
.valid_rx_ant
= ANT_A
| ANT_B
;
832 priv
->hw_params
.ct_kill_threshold
= CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD
);
834 priv
->hw_params
.sens
= &iwl4965_sensitivity
;
839 static s32
iwl4965_math_div_round(s32 num
, s32 denom
, s32
*res
)
852 *res
= ((num
* 2 + denom
) / (denom
* 2)) * sign
;
858 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
860 * Determines power supply voltage compensation for txpower calculations.
861 * Returns number of 1/2-dB steps to subtract from gain table index,
862 * to compensate for difference between power supply voltage during
863 * factory measurements, vs. current power supply voltage.
865 * Voltage indication is higher for lower voltage.
866 * Lower voltage requires more gain (lower gain table index).
868 static s32
iwl4965_get_voltage_compensation(s32 eeprom_voltage
,
873 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE
== eeprom_voltage
) ||
874 (TX_POWER_IWL_ILLEGAL_VOLTAGE
== current_voltage
))
877 iwl4965_math_div_round(current_voltage
- eeprom_voltage
,
878 TX_POWER_IWL_VOLTAGE_CODES_PER_03V
, &comp
);
880 if (current_voltage
> eeprom_voltage
)
882 if ((comp
< -2) || (comp
> 2))
888 static s32
iwl4965_get_tx_atten_grp(u16 channel
)
890 if (channel
>= CALIB_IWL_TX_ATTEN_GR5_FCH
&&
891 channel
<= CALIB_IWL_TX_ATTEN_GR5_LCH
)
892 return CALIB_CH_GROUP_5
;
894 if (channel
>= CALIB_IWL_TX_ATTEN_GR1_FCH
&&
895 channel
<= CALIB_IWL_TX_ATTEN_GR1_LCH
)
896 return CALIB_CH_GROUP_1
;
898 if (channel
>= CALIB_IWL_TX_ATTEN_GR2_FCH
&&
899 channel
<= CALIB_IWL_TX_ATTEN_GR2_LCH
)
900 return CALIB_CH_GROUP_2
;
902 if (channel
>= CALIB_IWL_TX_ATTEN_GR3_FCH
&&
903 channel
<= CALIB_IWL_TX_ATTEN_GR3_LCH
)
904 return CALIB_CH_GROUP_3
;
906 if (channel
>= CALIB_IWL_TX_ATTEN_GR4_FCH
&&
907 channel
<= CALIB_IWL_TX_ATTEN_GR4_LCH
)
908 return CALIB_CH_GROUP_4
;
910 IWL_ERROR("Can't find txatten group for channel %d.\n", channel
);
914 static u32
iwl4965_get_sub_band(const struct iwl_priv
*priv
, u32 channel
)
918 for (b
= 0; b
< EEPROM_TX_POWER_BANDS
; b
++) {
919 if (priv
->calib_info
->band_info
[b
].ch_from
== 0)
922 if ((channel
>= priv
->calib_info
->band_info
[b
].ch_from
)
923 && (channel
<= priv
->calib_info
->band_info
[b
].ch_to
))
930 static s32
iwl4965_interpolate_value(s32 x
, s32 x1
, s32 y1
, s32 x2
, s32 y2
)
937 iwl4965_math_div_round((x2
- x
) * (y1
- y2
), (x2
- x1
), &val
);
943 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
945 * Interpolates factory measurements from the two sample channels within a
946 * sub-band, to apply to channel of interest. Interpolation is proportional to
947 * differences in channel frequencies, which is proportional to differences
950 static int iwl4965_interpolate_chan(struct iwl_priv
*priv
, u32 channel
,
951 struct iwl_eeprom_calib_ch_info
*chan_info
)
956 const struct iwl_eeprom_calib_measure
*m1
;
957 const struct iwl_eeprom_calib_measure
*m2
;
958 struct iwl_eeprom_calib_measure
*omeas
;
962 s
= iwl4965_get_sub_band(priv
, channel
);
963 if (s
>= EEPROM_TX_POWER_BANDS
) {
964 IWL_ERROR("Tx Power can not find channel %d\n", channel
);
968 ch_i1
= priv
->calib_info
->band_info
[s
].ch1
.ch_num
;
969 ch_i2
= priv
->calib_info
->band_info
[s
].ch2
.ch_num
;
970 chan_info
->ch_num
= (u8
) channel
;
972 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
973 channel
, s
, ch_i1
, ch_i2
);
975 for (c
= 0; c
< EEPROM_TX_POWER_TX_CHAINS
; c
++) {
976 for (m
= 0; m
< EEPROM_TX_POWER_MEASUREMENTS
; m
++) {
977 m1
= &(priv
->calib_info
->band_info
[s
].ch1
.
979 m2
= &(priv
->calib_info
->band_info
[s
].ch2
.
981 omeas
= &(chan_info
->measurements
[c
][m
]);
984 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
989 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
993 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
998 (s8
) iwl4965_interpolate_value(channel
, ch_i1
,
1003 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c
, m
,
1004 m1
->actual_pow
, m2
->actual_pow
, omeas
->actual_pow
);
1006 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c
, m
,
1007 m1
->gain_idx
, m2
->gain_idx
, omeas
->gain_idx
);
1009 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c
, m
,
1010 m1
->pa_det
, m2
->pa_det
, omeas
->pa_det
);
1012 ("chain %d meas %d T1=%d T2=%d T=%d\n", c
, m
,
1013 m1
->temperature
, m2
->temperature
,
1014 omeas
->temperature
);
1021 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1022 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1023 static s32 back_off_table
[] = {
1024 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1025 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1026 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1027 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1031 /* Thermal compensation values for txpower for various frequency ranges ...
1032 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1033 static struct iwl4965_txpower_comp_entry
{
1034 s32 degrees_per_05db_a
;
1035 s32 degrees_per_05db_a_denom
;
1036 } tx_power_cmp_tble
[CALIB_CH_GROUP_MAX
] = {
1037 {9, 2}, /* group 0 5.2, ch 34-43 */
1038 {4, 1}, /* group 1 5.2, ch 44-70 */
1039 {4, 1}, /* group 2 5.2, ch 71-124 */
1040 {4, 1}, /* group 3 5.2, ch 125-200 */
1041 {3, 1} /* group 4 2.4, ch all */
1044 static s32
get_min_power_index(s32 rate_power_index
, u32 band
)
1047 if ((rate_power_index
& 7) <= 4)
1048 return MIN_TX_GAIN_INDEX_52GHZ_EXT
;
1050 return MIN_TX_GAIN_INDEX
;
1058 static const struct gain_entry gain_table
[2][108] = {
1059 /* 5.2GHz power gain index table */
1061 {123, 0x3F}, /* highest txpower */
1170 /* 2.4GHz power gain index table */
1172 {110, 0x3f}, /* highest txpower */
1283 static int iwl4965_fill_txpower_tbl(struct iwl_priv
*priv
, u8 band
, u16 channel
,
1284 u8 is_fat
, u8 ctrl_chan_high
,
1285 struct iwl4965_tx_power_db
*tx_power_tbl
)
1287 u8 saturation_power
;
1289 s32 user_target_power
;
1293 s32 current_regulatory
;
1294 s32 txatten_grp
= CALIB_CH_GROUP_MAX
;
1297 const struct iwl_channel_info
*ch_info
= NULL
;
1298 struct iwl_eeprom_calib_ch_info ch_eeprom_info
;
1299 const struct iwl_eeprom_calib_measure
*measurement
;
1302 s32 voltage_compensation
;
1303 s32 degrees_per_05db_num
;
1304 s32 degrees_per_05db_denom
;
1306 s32 temperature_comp
[2];
1307 s32 factory_gain_index
[2];
1308 s32 factory_actual_pwr
[2];
1311 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1312 * are used for indexing into txpower table) */
1313 user_target_power
= 2 * priv
->tx_power_user_lmt
;
1315 /* Get current (RXON) channel, band, width */
1316 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel
, band
,
1319 ch_info
= iwl_get_channel_info(priv
, priv
->band
, channel
);
1321 if (!is_channel_valid(ch_info
))
1324 /* get txatten group, used to select 1) thermal txpower adjustment
1325 * and 2) mimo txpower balance between Tx chains. */
1326 txatten_grp
= iwl4965_get_tx_atten_grp(channel
);
1327 if (txatten_grp
< 0)
1330 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1331 channel
, txatten_grp
);
1340 /* hardware txpower limits ...
1341 * saturation (clipping distortion) txpowers are in half-dBm */
1343 saturation_power
= priv
->calib_info
->saturation_power24
;
1345 saturation_power
= priv
->calib_info
->saturation_power52
;
1347 if (saturation_power
< IWL_TX_POWER_SATURATION_MIN
||
1348 saturation_power
> IWL_TX_POWER_SATURATION_MAX
) {
1350 saturation_power
= IWL_TX_POWER_DEFAULT_SATURATION_24
;
1352 saturation_power
= IWL_TX_POWER_DEFAULT_SATURATION_52
;
1355 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1356 * max_power_avg values are in dBm, convert * 2 */
1358 reg_limit
= ch_info
->fat_max_power_avg
* 2;
1360 reg_limit
= ch_info
->max_power_avg
* 2;
1362 if ((reg_limit
< IWL_TX_POWER_REGULATORY_MIN
) ||
1363 (reg_limit
> IWL_TX_POWER_REGULATORY_MAX
)) {
1365 reg_limit
= IWL_TX_POWER_DEFAULT_REGULATORY_24
;
1367 reg_limit
= IWL_TX_POWER_DEFAULT_REGULATORY_52
;
1370 /* Interpolate txpower calibration values for this channel,
1371 * based on factory calibration tests on spaced channels. */
1372 iwl4965_interpolate_chan(priv
, channel
, &ch_eeprom_info
);
1374 /* calculate tx gain adjustment based on power supply voltage */
1375 voltage
= priv
->calib_info
->voltage
;
1376 init_voltage
= (s32
)le32_to_cpu(priv
->card_alive_init
.voltage
);
1377 voltage_compensation
=
1378 iwl4965_get_voltage_compensation(voltage
, init_voltage
);
1380 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1382 voltage
, voltage_compensation
);
1384 /* get current temperature (Celsius) */
1385 current_temp
= max(priv
->temperature
, IWL_TX_POWER_TEMPERATURE_MIN
);
1386 current_temp
= min(priv
->temperature
, IWL_TX_POWER_TEMPERATURE_MAX
);
1387 current_temp
= KELVIN_TO_CELSIUS(current_temp
);
1389 /* select thermal txpower adjustment params, based on channel group
1390 * (same frequency group used for mimo txatten adjustment) */
1391 degrees_per_05db_num
=
1392 tx_power_cmp_tble
[txatten_grp
].degrees_per_05db_a
;
1393 degrees_per_05db_denom
=
1394 tx_power_cmp_tble
[txatten_grp
].degrees_per_05db_a_denom
;
1396 /* get per-chain txpower values from factory measurements */
1397 for (c
= 0; c
< 2; c
++) {
1398 measurement
= &ch_eeprom_info
.measurements
[c
][1];
1400 /* txgain adjustment (in half-dB steps) based on difference
1401 * between factory and current temperature */
1402 factory_temp
= measurement
->temperature
;
1403 iwl4965_math_div_round((current_temp
- factory_temp
) *
1404 degrees_per_05db_denom
,
1405 degrees_per_05db_num
,
1406 &temperature_comp
[c
]);
1408 factory_gain_index
[c
] = measurement
->gain_idx
;
1409 factory_actual_pwr
[c
] = measurement
->actual_pow
;
1411 IWL_DEBUG_TXPOWER("chain = %d\n", c
);
1412 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1413 "curr tmp %d, comp %d steps\n",
1414 factory_temp
, current_temp
,
1415 temperature_comp
[c
]);
1417 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1418 factory_gain_index
[c
],
1419 factory_actual_pwr
[c
]);
1422 /* for each of 33 bit-rates (including 1 for CCK) */
1423 for (i
= 0; i
< POWER_TABLE_NUM_ENTRIES
; i
++) {
1425 union iwl4965_tx_power_dual_stream tx_power
;
1427 /* for mimo, reduce each chain's txpower by half
1428 * (3dB, 6 steps), so total output power is regulatory
1431 current_regulatory
= reg_limit
-
1432 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION
;
1435 current_regulatory
= reg_limit
;
1439 /* find txpower limit, either hardware or regulatory */
1440 power_limit
= saturation_power
- back_off_table
[i
];
1441 if (power_limit
> current_regulatory
)
1442 power_limit
= current_regulatory
;
1444 /* reduce user's txpower request if necessary
1445 * for this rate on this channel */
1446 target_power
= user_target_power
;
1447 if (target_power
> power_limit
)
1448 target_power
= power_limit
;
1450 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1451 i
, saturation_power
- back_off_table
[i
],
1452 current_regulatory
, user_target_power
,
1455 /* for each of 2 Tx chains (radio transmitters) */
1456 for (c
= 0; c
< 2; c
++) {
1461 (s32
)le32_to_cpu(priv
->card_alive_init
.
1462 tx_atten
[txatten_grp
][c
]);
1466 /* calculate index; higher index means lower txpower */
1467 power_index
= (u8
) (factory_gain_index
[c
] -
1469 factory_actual_pwr
[c
]) -
1470 temperature_comp
[c
] -
1471 voltage_compensation
+
1474 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1477 if (power_index
< get_min_power_index(i
, band
))
1478 power_index
= get_min_power_index(i
, band
);
1480 /* adjust 5 GHz index to support negative indexes */
1484 /* CCK, rate 32, reduce txpower for CCK */
1485 if (i
== POWER_TABLE_CCK_ENTRY
)
1487 IWL_TX_POWER_CCK_COMPENSATION_C_STEP
;
1489 /* stay within the table! */
1490 if (power_index
> 107) {
1491 IWL_WARNING("txpower index %d > 107\n",
1495 if (power_index
< 0) {
1496 IWL_WARNING("txpower index %d < 0\n",
1501 /* fill txpower command for this rate/chain */
1502 tx_power
.s
.radio_tx_gain
[c
] =
1503 gain_table
[band
][power_index
].radio
;
1504 tx_power
.s
.dsp_predis_atten
[c
] =
1505 gain_table
[band
][power_index
].dsp
;
1507 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1508 "gain 0x%02x dsp %d\n",
1509 c
, atten_value
, power_index
,
1510 tx_power
.s
.radio_tx_gain
[c
],
1511 tx_power
.s
.dsp_predis_atten
[c
]);
1512 } /* for each chain */
1514 tx_power_tbl
->power_tbl
[i
].dw
= cpu_to_le32(tx_power
.dw
);
1516 } /* for each rate */
1522 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1524 * Uses the active RXON for channel, band, and characteristics (fat, high)
1525 * The power limit is taken from priv->tx_power_user_lmt.
1527 static int iwl4965_send_tx_power(struct iwl_priv
*priv
)
1529 struct iwl4965_txpowertable_cmd cmd
= { 0 };
1533 u8 ctrl_chan_high
= 0;
1535 if (test_bit(STATUS_SCANNING
, &priv
->status
)) {
1536 /* If this gets hit a lot, switch it to a BUG() and catch
1537 * the stack trace to find out who is calling this during
1539 IWL_WARNING("TX Power requested while scanning!\n");
1543 band
= priv
->band
== IEEE80211_BAND_2GHZ
;
1545 is_fat
= is_fat_channel(priv
->active_rxon
.flags
);
1548 (priv
->active_rxon
.flags
& RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
))
1552 cmd
.channel
= priv
->active_rxon
.channel
;
1554 ret
= iwl4965_fill_txpower_tbl(priv
, band
,
1555 le16_to_cpu(priv
->active_rxon
.channel
),
1556 is_fat
, ctrl_chan_high
, &cmd
.tx_power
);
1560 ret
= iwl_send_cmd_pdu(priv
, REPLY_TX_PWR_TABLE_CMD
, sizeof(cmd
), &cmd
);
1566 static int iwl4965_send_rxon_assoc(struct iwl_priv
*priv
)
1569 struct iwl4965_rxon_assoc_cmd rxon_assoc
;
1570 const struct iwl_rxon_cmd
*rxon1
= &priv
->staging_rxon
;
1571 const struct iwl_rxon_cmd
*rxon2
= &priv
->active_rxon
;
1573 if ((rxon1
->flags
== rxon2
->flags
) &&
1574 (rxon1
->filter_flags
== rxon2
->filter_flags
) &&
1575 (rxon1
->cck_basic_rates
== rxon2
->cck_basic_rates
) &&
1576 (rxon1
->ofdm_ht_single_stream_basic_rates
==
1577 rxon2
->ofdm_ht_single_stream_basic_rates
) &&
1578 (rxon1
->ofdm_ht_dual_stream_basic_rates
==
1579 rxon2
->ofdm_ht_dual_stream_basic_rates
) &&
1580 (rxon1
->rx_chain
== rxon2
->rx_chain
) &&
1581 (rxon1
->ofdm_basic_rates
== rxon2
->ofdm_basic_rates
)) {
1582 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1586 rxon_assoc
.flags
= priv
->staging_rxon
.flags
;
1587 rxon_assoc
.filter_flags
= priv
->staging_rxon
.filter_flags
;
1588 rxon_assoc
.ofdm_basic_rates
= priv
->staging_rxon
.ofdm_basic_rates
;
1589 rxon_assoc
.cck_basic_rates
= priv
->staging_rxon
.cck_basic_rates
;
1590 rxon_assoc
.reserved
= 0;
1591 rxon_assoc
.ofdm_ht_single_stream_basic_rates
=
1592 priv
->staging_rxon
.ofdm_ht_single_stream_basic_rates
;
1593 rxon_assoc
.ofdm_ht_dual_stream_basic_rates
=
1594 priv
->staging_rxon
.ofdm_ht_dual_stream_basic_rates
;
1595 rxon_assoc
.rx_chain_select_flags
= priv
->staging_rxon
.rx_chain
;
1597 ret
= iwl_send_cmd_pdu_async(priv
, REPLY_RXON_ASSOC
,
1598 sizeof(rxon_assoc
), &rxon_assoc
, NULL
);
1605 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1606 static int iwl4965_hw_channel_switch(struct iwl_priv
*priv
, u16 channel
)
1611 u8 ctrl_chan_high
= 0;
1612 struct iwl4965_channel_switch_cmd cmd
= { 0 };
1613 const struct iwl_channel_info
*ch_info
;
1615 band
= priv
->band
== IEEE80211_BAND_2GHZ
;
1617 ch_info
= iwl_get_channel_info(priv
, priv
->band
, channel
);
1619 is_fat
= is_fat_channel(priv
->staging_rxon
.flags
);
1622 (priv
->active_rxon
.flags
& RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
))
1626 cmd
.expect_beacon
= 0;
1627 cmd
.channel
= cpu_to_le16(channel
);
1628 cmd
.rxon_flags
= priv
->active_rxon
.flags
;
1629 cmd
.rxon_filter_flags
= priv
->active_rxon
.filter_flags
;
1630 cmd
.switch_time
= cpu_to_le32(priv
->ucode_beacon_time
);
1632 cmd
.expect_beacon
= is_channel_radar(ch_info
);
1634 cmd
.expect_beacon
= 1;
1636 rc
= iwl4965_fill_txpower_tbl(priv
, band
, channel
, is_fat
,
1637 ctrl_chan_high
, &cmd
.tx_power
);
1639 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc
);
1643 rc
= iwl_send_cmd_pdu(priv
, REPLY_CHANNEL_SWITCH
, sizeof(cmd
), &cmd
);
1649 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1651 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv
*priv
,
1652 struct iwl_tx_queue
*txq
,
1655 struct iwl4965_scd_bc_tbl
*scd_bc_tbl
= priv
->scd_bc_tbls
.addr
;
1656 int txq_id
= txq
->q
.id
;
1657 int write_ptr
= txq
->q
.write_ptr
;
1658 int len
= byte_cnt
+ IWL_TX_CRC_SIZE
+ IWL_TX_DELIMITER_SIZE
;
1661 WARN_ON(len
> 0xFFF || write_ptr
>= TFD_QUEUE_SIZE_MAX
);
1663 bc_ent
= cpu_to_le16(len
& 0xFFF);
1664 /* Set up byte count within first 256 entries */
1665 scd_bc_tbl
[txq_id
].tfd_offset
[write_ptr
] = bc_ent
;
1667 /* If within first 64 entries, duplicate at end */
1668 if (write_ptr
< TFD_QUEUE_SIZE_BC_DUP
)
1670 tfd_offset
[TFD_QUEUE_SIZE_MAX
+ write_ptr
] = bc_ent
;
1674 * sign_extend - Sign extend a value using specified bit as sign-bit
1676 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1677 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1679 * @param oper value to sign extend
1680 * @param index 0 based bit index (0<=index<32) to sign bit
1682 static s32
sign_extend(u32 oper
, int index
)
1684 u8 shift
= 31 - index
;
1686 return (s32
)(oper
<< shift
) >> shift
;
1690 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1691 * @statistics: Provides the temperature reading from the uCode
1693 * A return of <0 indicates bogus data in the statistics
1695 static int iwl4965_hw_get_temperature(const struct iwl_priv
*priv
)
1702 if (test_bit(STATUS_TEMPERATURE
, &priv
->status
) &&
1703 (priv
->statistics
.flag
& STATISTICS_REPLY_FLG_FAT_MODE_MSK
)) {
1704 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1705 R1
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r1
[1]);
1706 R2
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r2
[1]);
1707 R3
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r3
[1]);
1708 R4
= le32_to_cpu(priv
->card_alive_init
.therm_r4
[1]);
1710 IWL_DEBUG_TEMP("Running temperature calibration\n");
1711 R1
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r1
[0]);
1712 R2
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r2
[0]);
1713 R3
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r3
[0]);
1714 R4
= le32_to_cpu(priv
->card_alive_init
.therm_r4
[0]);
1718 * Temperature is only 23 bits, so sign extend out to 32.
1720 * NOTE If we haven't received a statistics notification yet
1721 * with an updated temperature, use R4 provided to us in the
1722 * "initialize" ALIVE response.
1724 if (!test_bit(STATUS_TEMPERATURE
, &priv
->status
))
1725 vt
= sign_extend(R4
, 23);
1728 le32_to_cpu(priv
->statistics
.general
.temperature
), 23);
1730 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1
, R2
, R3
, vt
);
1733 IWL_ERROR("Calibration conflict R1 == R3\n");
1737 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1738 * Add offset to center the adjustment around 0 degrees Centigrade. */
1739 temperature
= TEMPERATURE_CALIB_A_VAL
* (vt
- R2
);
1740 temperature
/= (R3
- R1
);
1741 temperature
= (temperature
* 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET
;
1743 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1744 temperature
, KELVIN_TO_CELSIUS(temperature
));
1749 /* Adjust Txpower only if temperature variance is greater than threshold. */
1750 #define IWL_TEMPERATURE_THRESHOLD 3
1753 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1755 * If the temperature changed has changed sufficiently, then a recalibration
1758 * Assumes caller will replace priv->last_temperature once calibration
1761 static int iwl4965_is_temp_calib_needed(struct iwl_priv
*priv
)
1765 if (!test_bit(STATUS_STATISTICS
, &priv
->status
)) {
1766 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1770 temp_diff
= priv
->temperature
- priv
->last_temperature
;
1772 /* get absolute value */
1773 if (temp_diff
< 0) {
1774 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff
);
1775 temp_diff
= -temp_diff
;
1776 } else if (temp_diff
== 0)
1777 IWL_DEBUG_POWER("Same temp, \n");
1779 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff
);
1781 if (temp_diff
< IWL_TEMPERATURE_THRESHOLD
) {
1782 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1786 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1791 static void iwl4965_temperature_calib(struct iwl_priv
*priv
)
1795 temp
= iwl4965_hw_get_temperature(priv
);
1799 if (priv
->temperature
!= temp
) {
1800 if (priv
->temperature
)
1801 IWL_DEBUG_TEMP("Temperature changed "
1802 "from %dC to %dC\n",
1803 KELVIN_TO_CELSIUS(priv
->temperature
),
1804 KELVIN_TO_CELSIUS(temp
));
1806 IWL_DEBUG_TEMP("Temperature "
1807 "initialized to %dC\n",
1808 KELVIN_TO_CELSIUS(temp
));
1811 priv
->temperature
= temp
;
1812 set_bit(STATUS_TEMPERATURE
, &priv
->status
);
1814 if (!priv
->disable_tx_power_cal
&&
1815 unlikely(!test_bit(STATUS_SCANNING
, &priv
->status
)) &&
1816 iwl4965_is_temp_calib_needed(priv
))
1817 queue_work(priv
->workqueue
, &priv
->txpower_work
);
1821 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1823 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv
*priv
,
1826 /* Simply stop the queue, but don't change any configuration;
1827 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1828 iwl_write_prph(priv
,
1829 IWL49_SCD_QUEUE_STATUS_BITS(txq_id
),
1830 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
)|
1831 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN
));
1835 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1836 * priv->lock must be held by the caller
1838 static int iwl4965_txq_agg_disable(struct iwl_priv
*priv
, u16 txq_id
,
1839 u16 ssn_idx
, u8 tx_fifo
)
1843 if ((IWL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
1844 (IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
<= txq_id
)) {
1845 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1846 txq_id
, IWL49_FIRST_AMPDU_QUEUE
,
1847 IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
- 1);
1851 ret
= iwl_grab_nic_access(priv
);
1855 iwl4965_tx_queue_stop_scheduler(priv
, txq_id
);
1857 iwl_clear_bits_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
1859 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
1860 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
1861 /* supposes that ssn_idx is valid (!= 0xFFF) */
1862 iwl4965_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
1864 iwl_clear_bits_prph(priv
, IWL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
1865 iwl_txq_ctx_deactivate(priv
, txq_id
);
1866 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 0);
1868 iwl_release_nic_access(priv
);
1874 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1876 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv
*priv
, u16 ra_tid
,
1883 scd_q2ratid
= ra_tid
& IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK
;
1885 tbl_dw_addr
= priv
->scd_base_addr
+
1886 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id
);
1888 tbl_dw
= iwl_read_targ_mem(priv
, tbl_dw_addr
);
1891 tbl_dw
= (scd_q2ratid
<< 16) | (tbl_dw
& 0x0000FFFF);
1893 tbl_dw
= scd_q2ratid
| (tbl_dw
& 0xFFFF0000);
1895 iwl_write_targ_mem(priv
, tbl_dw_addr
, tbl_dw
);
1902 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1904 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1905 * i.e. it must be one of the higher queues used for aggregation
1907 static int iwl4965_txq_agg_enable(struct iwl_priv
*priv
, int txq_id
,
1908 int tx_fifo
, int sta_id
, int tid
, u16 ssn_idx
)
1910 unsigned long flags
;
1914 if ((IWL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
1915 (IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
<= txq_id
)) {
1916 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1917 txq_id
, IWL49_FIRST_AMPDU_QUEUE
,
1918 IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
- 1);
1922 ra_tid
= BUILD_RAxTID(sta_id
, tid
);
1924 /* Modify device's station table to Tx this TID */
1925 iwl_sta_tx_modify_enable_tid(priv
, sta_id
, tid
);
1927 spin_lock_irqsave(&priv
->lock
, flags
);
1928 ret
= iwl_grab_nic_access(priv
);
1930 spin_unlock_irqrestore(&priv
->lock
, flags
);
1934 /* Stop this Tx queue before configuring it */
1935 iwl4965_tx_queue_stop_scheduler(priv
, txq_id
);
1937 /* Map receiver-address / traffic-ID to this queue */
1938 iwl4965_tx_queue_set_q2ratid(priv
, ra_tid
, txq_id
);
1940 /* Set this queue as a chain-building queue */
1941 iwl_set_bits_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
1943 /* Place first TFD at index corresponding to start sequence number.
1944 * Assumes that ssn_idx is valid (!= 0xFFF) */
1945 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
1946 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
1947 iwl4965_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
1949 /* Set up Tx window size and frame limit for this queue */
1950 iwl_write_targ_mem(priv
,
1951 priv
->scd_base_addr
+ IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
),
1952 (SCD_WIN_SIZE
<< IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
1953 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
1955 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
1956 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
) + sizeof(u32
),
1957 (SCD_FRAME_LIMIT
<< IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
)
1958 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
1960 iwl_set_bits_prph(priv
, IWL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
1962 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1963 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 1);
1965 iwl_release_nic_access(priv
);
1966 spin_unlock_irqrestore(&priv
->lock
, flags
);
1972 static u16
iwl4965_get_hcmd_size(u8 cmd_id
, u16 len
)
1976 return (u16
) sizeof(struct iwl4965_rxon_cmd
);
1982 static u16
iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd
*cmd
, u8
*data
)
1984 struct iwl4965_addsta_cmd
*addsta
= (struct iwl4965_addsta_cmd
*)data
;
1985 addsta
->mode
= cmd
->mode
;
1986 memcpy(&addsta
->sta
, &cmd
->sta
, sizeof(struct sta_id_modify
));
1987 memcpy(&addsta
->key
, &cmd
->key
, sizeof(struct iwl4965_keyinfo
));
1988 addsta
->station_flags
= cmd
->station_flags
;
1989 addsta
->station_flags_msk
= cmd
->station_flags_msk
;
1990 addsta
->tid_disable_tx
= cmd
->tid_disable_tx
;
1991 addsta
->add_immediate_ba_tid
= cmd
->add_immediate_ba_tid
;
1992 addsta
->remove_immediate_ba_tid
= cmd
->remove_immediate_ba_tid
;
1993 addsta
->add_immediate_ba_ssn
= cmd
->add_immediate_ba_ssn
;
1994 addsta
->reserved1
= __constant_cpu_to_le16(0);
1995 addsta
->reserved2
= __constant_cpu_to_le32(0);
1997 return (u16
)sizeof(struct iwl4965_addsta_cmd
);
2000 static inline u32
iwl4965_get_scd_ssn(struct iwl4965_tx_resp
*tx_resp
)
2002 return le32_to_cpup(&tx_resp
->u
.status
+ tx_resp
->frame_count
) & MAX_SN
;
2006 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2008 static int iwl4965_tx_status_reply_tx(struct iwl_priv
*priv
,
2009 struct iwl_ht_agg
*agg
,
2010 struct iwl4965_tx_resp
*tx_resp
,
2011 int txq_id
, u16 start_idx
)
2014 struct agg_tx_status
*frame_status
= tx_resp
->u
.agg_status
;
2015 struct ieee80211_tx_info
*info
= NULL
;
2016 struct ieee80211_hdr
*hdr
= NULL
;
2017 u32 rate_n_flags
= le32_to_cpu(tx_resp
->rate_n_flags
);
2020 if (agg
->wait_for_ba
)
2021 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2023 agg
->frame_count
= tx_resp
->frame_count
;
2024 agg
->start_idx
= start_idx
;
2025 agg
->rate_n_flags
= rate_n_flags
;
2028 /* num frames attempted by Tx command */
2029 if (agg
->frame_count
== 1) {
2030 /* Only one frame was attempted; no block-ack will arrive */
2031 status
= le16_to_cpu(frame_status
[0].status
);
2034 /* FIXME: code repetition */
2035 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2036 agg
->frame_count
, agg
->start_idx
, idx
);
2038 info
= IEEE80211_SKB_CB(priv
->txq
[txq_id
].txb
[idx
].skb
[0]);
2039 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
2040 info
->flags
&= ~IEEE80211_TX_CTL_AMPDU
;
2041 info
->flags
|= iwl_is_tx_success(status
) ?
2042 IEEE80211_TX_STAT_ACK
: 0;
2043 iwl_hwrate_to_tx_control(priv
, rate_n_flags
, info
);
2044 /* FIXME: code repetition end */
2046 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2047 status
& 0xff, tx_resp
->failure_frame
);
2048 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags
);
2050 agg
->wait_for_ba
= 0;
2052 /* Two or more frames were attempted; expect block-ack */
2054 int start
= agg
->start_idx
;
2056 /* Construct bit-map of pending frames within Tx window */
2057 for (i
= 0; i
< agg
->frame_count
; i
++) {
2059 status
= le16_to_cpu(frame_status
[i
].status
);
2060 seq
= le16_to_cpu(frame_status
[i
].sequence
);
2061 idx
= SEQ_TO_INDEX(seq
);
2062 txq_id
= SEQ_TO_QUEUE(seq
);
2064 if (status
& (AGG_TX_STATE_FEW_BYTES_MSK
|
2065 AGG_TX_STATE_ABORT_MSK
))
2068 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2069 agg
->frame_count
, txq_id
, idx
);
2071 hdr
= iwl_tx_queue_get_hdr(priv
, txq_id
, idx
);
2073 sc
= le16_to_cpu(hdr
->seq_ctrl
);
2074 if (idx
!= (SEQ_TO_SN(sc
) & 0xff)) {
2075 IWL_ERROR("BUG_ON idx doesn't match seq control"
2076 " idx=%d, seq_idx=%d, seq=%d\n",
2082 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2083 i
, idx
, SEQ_TO_SN(sc
));
2087 sh
= (start
- idx
) + 0xff;
2088 bitmap
= bitmap
<< sh
;
2091 } else if (sh
< -64)
2092 sh
= 0xff - (start
- idx
);
2096 bitmap
= bitmap
<< sh
;
2099 bitmap
|= 1ULL << sh
;
2100 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
2101 start
, (unsigned long long)bitmap
);
2104 agg
->bitmap
= bitmap
;
2105 agg
->start_idx
= start
;
2106 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2107 agg
->frame_count
, agg
->start_idx
,
2108 (unsigned long long)agg
->bitmap
);
2111 agg
->wait_for_ba
= 1;
2117 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2119 static void iwl4965_rx_reply_tx(struct iwl_priv
*priv
,
2120 struct iwl_rx_mem_buffer
*rxb
)
2122 struct iwl_rx_packet
*pkt
= (struct iwl_rx_packet
*)rxb
->skb
->data
;
2123 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
2124 int txq_id
= SEQ_TO_QUEUE(sequence
);
2125 int index
= SEQ_TO_INDEX(sequence
);
2126 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
2127 struct ieee80211_hdr
*hdr
;
2128 struct ieee80211_tx_info
*info
;
2129 struct iwl4965_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
2130 u32 status
= le32_to_cpu(tx_resp
->u
.status
);
2131 int tid
= MAX_TID_COUNT
;
2136 if ((index
>= txq
->q
.n_bd
) || (iwl_queue_used(&txq
->q
, index
) == 0)) {
2137 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2138 "is out of range [0-%d] %d %d\n", txq_id
,
2139 index
, txq
->q
.n_bd
, txq
->q
.write_ptr
,
2144 info
= IEEE80211_SKB_CB(txq
->txb
[txq
->q
.read_ptr
].skb
[0]);
2145 memset(&info
->status
, 0, sizeof(info
->status
));
2147 hdr
= iwl_tx_queue_get_hdr(priv
, txq_id
, index
);
2148 if (ieee80211_is_data_qos(hdr
->frame_control
)) {
2149 qc
= ieee80211_get_qos_ctl(hdr
);
2153 sta_id
= iwl_get_ra_sta_id(priv
, hdr
);
2154 if (txq
->sched_retry
&& unlikely(sta_id
== IWL_INVALID_STATION
)) {
2155 IWL_ERROR("Station not known\n");
2159 if (txq
->sched_retry
) {
2160 const u32 scd_ssn
= iwl4965_get_scd_ssn(tx_resp
);
2161 struct iwl_ht_agg
*agg
= NULL
;
2165 agg
= &priv
->stations
[sta_id
].tid
[tid
].agg
;
2167 iwl4965_tx_status_reply_tx(priv
, agg
, tx_resp
, txq_id
, index
);
2169 /* check if BAR is needed */
2170 if ((tx_resp
->frame_count
== 1) && !iwl_is_tx_success(status
))
2171 info
->flags
|= IEEE80211_TX_STAT_AMPDU_NO_BACK
;
2173 if (txq
->q
.read_ptr
!= (scd_ssn
& 0xff)) {
2174 index
= iwl_queue_dec_wrap(scd_ssn
& 0xff, txq
->q
.n_bd
);
2175 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2176 "%d index %d\n", scd_ssn
, index
);
2177 freed
= iwl_tx_queue_reclaim(priv
, txq_id
, index
);
2178 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
2180 if (priv
->mac80211_registered
&&
2181 (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
) &&
2182 (agg
->state
!= IWL_EMPTYING_HW_QUEUE_DELBA
)) {
2183 if (agg
->state
== IWL_AGG_OFF
)
2184 ieee80211_wake_queue(priv
->hw
, txq_id
);
2186 ieee80211_wake_queue(priv
->hw
,
2191 info
->status
.rates
[0].count
= tx_resp
->failure_frame
+ 1;
2192 info
->flags
|= iwl_is_tx_success(status
) ?
2193 IEEE80211_TX_STAT_ACK
: 0;
2194 iwl_hwrate_to_tx_control(priv
,
2195 le32_to_cpu(tx_resp
->rate_n_flags
),
2198 IWL_DEBUG_TX_REPLY("TXQ %d status %s (0x%08x) "
2199 "rate_n_flags 0x%x retries %d\n",
2201 iwl_get_tx_fail_reason(status
), status
,
2202 le32_to_cpu(tx_resp
->rate_n_flags
),
2203 tx_resp
->failure_frame
);
2205 freed
= iwl_tx_queue_reclaim(priv
, txq_id
, index
);
2206 if (qc
&& likely(sta_id
!= IWL_INVALID_STATION
))
2207 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
2209 if (priv
->mac80211_registered
&&
2210 (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
))
2211 ieee80211_wake_queue(priv
->hw
, txq_id
);
2214 if (qc
&& likely(sta_id
!= IWL_INVALID_STATION
))
2215 iwl_txq_check_empty(priv
, sta_id
, tid
, txq_id
);
2217 if (iwl_check_bits(status
, TX_ABORT_REQUIRED_MSK
))
2218 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
2221 static int iwl4965_calc_rssi(struct iwl_priv
*priv
,
2222 struct iwl_rx_phy_res
*rx_resp
)
2224 /* data from PHY/DSP regarding signal strength, etc.,
2225 * contents are always there, not configurable by host. */
2226 struct iwl4965_rx_non_cfg_phy
*ncphy
=
2227 (struct iwl4965_rx_non_cfg_phy
*)rx_resp
->non_cfg_phy_buf
;
2228 u32 agc
= (le16_to_cpu(ncphy
->agc_info
) & IWL49_AGC_DB_MASK
)
2229 >> IWL49_AGC_DB_POS
;
2231 u32 valid_antennae
=
2232 (le16_to_cpu(rx_resp
->phy_flags
) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK
)
2233 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET
;
2237 /* Find max rssi among 3 possible receivers.
2238 * These values are measured by the digital signal processor (DSP).
2239 * They should stay fairly constant even as the signal strength varies,
2240 * if the radio's automatic gain control (AGC) is working right.
2241 * AGC value (see below) will provide the "interesting" info. */
2242 for (i
= 0; i
< 3; i
++)
2243 if (valid_antennae
& (1 << i
))
2244 max_rssi
= max(ncphy
->rssi_info
[i
<< 1], max_rssi
);
2246 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2247 ncphy
->rssi_info
[0], ncphy
->rssi_info
[2], ncphy
->rssi_info
[4],
2250 /* dBm = max_rssi dB - agc dB - constant.
2251 * Higher AGC (higher radio gain) means lower signal. */
2252 return max_rssi
- agc
- IWL_RSSI_OFFSET
;
2256 /* Set up 4965-specific Rx frame reply handlers */
2257 static void iwl4965_rx_handler_setup(struct iwl_priv
*priv
)
2259 /* Legacy Rx frames */
2260 priv
->rx_handlers
[REPLY_RX
] = iwl_rx_reply_rx
;
2262 priv
->rx_handlers
[REPLY_TX
] = iwl4965_rx_reply_tx
;
2265 static void iwl4965_setup_deferred_work(struct iwl_priv
*priv
)
2267 INIT_WORK(&priv
->txpower_work
, iwl4965_bg_txpower_work
);
2270 static void iwl4965_cancel_deferred_work(struct iwl_priv
*priv
)
2272 cancel_work_sync(&priv
->txpower_work
);
2276 static struct iwl_hcmd_ops iwl4965_hcmd
= {
2277 .rxon_assoc
= iwl4965_send_rxon_assoc
,
2280 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils
= {
2281 .get_hcmd_size
= iwl4965_get_hcmd_size
,
2282 .build_addsta_hcmd
= iwl4965_build_addsta_hcmd
,
2283 .chain_noise_reset
= iwl4965_chain_noise_reset
,
2284 .gain_computation
= iwl4965_gain_computation
,
2285 .rts_tx_cmd_flag
= iwl4965_rts_tx_cmd_flag
,
2286 .calc_rssi
= iwl4965_calc_rssi
,
2289 static struct iwl_lib_ops iwl4965_lib
= {
2290 .set_hw_params
= iwl4965_hw_set_hw_params
,
2291 .txq_update_byte_cnt_tbl
= iwl4965_txq_update_byte_cnt_tbl
,
2292 .txq_set_sched
= iwl4965_txq_set_sched
,
2293 .txq_agg_enable
= iwl4965_txq_agg_enable
,
2294 .txq_agg_disable
= iwl4965_txq_agg_disable
,
2295 .rx_handler_setup
= iwl4965_rx_handler_setup
,
2296 .setup_deferred_work
= iwl4965_setup_deferred_work
,
2297 .cancel_deferred_work
= iwl4965_cancel_deferred_work
,
2298 .is_valid_rtc_data_addr
= iwl4965_hw_valid_rtc_data_addr
,
2299 .alive_notify
= iwl4965_alive_notify
,
2300 .init_alive_start
= iwl4965_init_alive_start
,
2301 .load_ucode
= iwl4965_load_bsm
,
2303 .init
= iwl4965_apm_init
,
2304 .reset
= iwl4965_apm_reset
,
2305 .stop
= iwl4965_apm_stop
,
2306 .config
= iwl4965_nic_config
,
2307 .set_pwr_src
= iwl_set_pwr_src
,
2310 .regulatory_bands
= {
2311 EEPROM_REGULATORY_BAND_1_CHANNELS
,
2312 EEPROM_REGULATORY_BAND_2_CHANNELS
,
2313 EEPROM_REGULATORY_BAND_3_CHANNELS
,
2314 EEPROM_REGULATORY_BAND_4_CHANNELS
,
2315 EEPROM_REGULATORY_BAND_5_CHANNELS
,
2316 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS
,
2317 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2319 .verify_signature
= iwlcore_eeprom_verify_signature
,
2320 .acquire_semaphore
= iwlcore_eeprom_acquire_semaphore
,
2321 .release_semaphore
= iwlcore_eeprom_release_semaphore
,
2322 .calib_version
= iwl4965_eeprom_calib_version
,
2323 .query_addr
= iwlcore_eeprom_query_addr
,
2325 .send_tx_power
= iwl4965_send_tx_power
,
2326 .update_chain_flags
= iwl_update_chain_flags
,
2327 .temperature
= iwl4965_temperature_calib
,
2330 static struct iwl_ops iwl4965_ops
= {
2331 .lib
= &iwl4965_lib
,
2332 .hcmd
= &iwl4965_hcmd
,
2333 .utils
= &iwl4965_hcmd_utils
,
2336 struct iwl_cfg iwl4965_agn_cfg
= {
2338 .fw_name_pre
= IWL4965_FW_PRE
,
2339 .ucode_api_max
= IWL4965_UCODE_API_MAX
,
2340 .ucode_api_min
= IWL4965_UCODE_API_MIN
,
2341 .sku
= IWL_SKU_A
|IWL_SKU_G
|IWL_SKU_N
,
2342 .eeprom_size
= IWL4965_EEPROM_IMG_SIZE
,
2343 .eeprom_ver
= EEPROM_4965_EEPROM_VERSION
,
2344 .eeprom_calib_ver
= EEPROM_4965_TX_POWER_VERSION
,
2345 .ops
= &iwl4965_ops
,
2346 .mod_params
= &iwl4965_mod_params
,
2349 /* Module firmware */
2350 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX
));
2352 module_param_named(antenna
, iwl4965_mod_params
.antenna
, int, 0444);
2353 MODULE_PARM_DESC(antenna
, "select antenna (1=Main, 2=Aux, default 0 [both])");
2354 module_param_named(disable
, iwl4965_mod_params
.disable
, int, 0444);
2355 MODULE_PARM_DESC(disable
, "manually disable the radio (default 0 [radio on])");
2356 module_param_named(swcrypto
, iwl4965_mod_params
.sw_crypto
, int, 0444);
2357 MODULE_PARM_DESC(swcrypto
, "using crypto in software (default 0 [hardware])");
2358 module_param_named(debug
, iwl4965_mod_params
.debug
, int, 0444);
2359 MODULE_PARM_DESC(debug
, "debug output mask");
2361 disable_hw_scan
, iwl4965_mod_params
.disable_hw_scan
, int, 0444);
2362 MODULE_PARM_DESC(disable_hw_scan
, "disable hardware scanning (default 0)");
2364 module_param_named(queues_num
, iwl4965_mod_params
.num_of_queues
, int, 0444);
2365 MODULE_PARM_DESC(queues_num
, "number of hw queues.");
2367 module_param_named(qos_enable
, iwl4965_mod_params
.enable_qos
, int, 0444);
2368 MODULE_PARM_DESC(qos_enable
, "enable all QoS functionality");
2370 module_param_named(11n_disable
, iwl4965_mod_params
.disable_11n
, int, 0444);
2371 MODULE_PARM_DESC(11n_disable
, "disable 11n functionality");
2372 module_param_named(amsdu_size_8K
, iwl4965_mod_params
.amsdu_size_8K
, int, 0444);
2373 MODULE_PARM_DESC(amsdu_size_8K
, "enable 8K amsdu size");
2375 module_param_named(fw_restart4965
, iwl4965_mod_params
.restart_fw
, int, 0444);
2376 MODULE_PARM_DESC(fw_restart4965
, "restart firmware in case of error");