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iwlwifi: default max event log size
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #define DRV_NAME "iwlagn"
49
50 #include "iwl-eeprom.h"
51 #include "iwl-dev.h"
52 #include "iwl-core.h"
53 #include "iwl-io.h"
54 #include "iwl-helpers.h"
55 #include "iwl-sta.h"
56 #include "iwl-calib.h"
57 #include "iwl-agn.h"
58
59
60 /******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66 /*
67 * module name, copyright, version, etc.
68 */
69 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
70
71 #ifdef CONFIG_IWLWIFI_DEBUG
72 #define VD "d"
73 #else
74 #define VD
75 #endif
76
77 #define DRV_VERSION IWLWIFI_VERSION VD
78
79
80 MODULE_DESCRIPTION(DRV_DESCRIPTION);
81 MODULE_VERSION(DRV_VERSION);
82 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
83 MODULE_LICENSE("GPL");
84 MODULE_ALIAS("iwl4965");
85
86 /**
87 * iwl_commit_rxon - commit staging_rxon to hardware
88 *
89 * The RXON command in staging_rxon is committed to the hardware and
90 * the active_rxon structure is updated with the new data. This
91 * function correctly transitions out of the RXON_ASSOC_MSK state if
92 * a HW tune is required based on the RXON structure changes.
93 */
94 int iwl_commit_rxon(struct iwl_priv *priv)
95 {
96 /* cast away the const for active_rxon in this function */
97 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
98 int ret;
99 bool new_assoc =
100 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
101
102 if (!iwl_is_alive(priv))
103 return -EBUSY;
104
105 /* always get timestamp with Rx frame */
106 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
107
108 ret = iwl_check_rxon_cmd(priv);
109 if (ret) {
110 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
111 return -EINVAL;
112 }
113
114 /*
115 * receive commit_rxon request
116 * abort any previous channel switch if still in process
117 */
118 if (priv->switch_rxon.switch_in_progress &&
119 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
120 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
121 le16_to_cpu(priv->switch_rxon.channel));
122 priv->switch_rxon.switch_in_progress = false;
123 }
124
125 /* If we don't need to send a full RXON, we can use
126 * iwl_rxon_assoc_cmd which is used to reconfigure filter
127 * and other flags for the current radio configuration. */
128 if (!iwl_full_rxon_required(priv)) {
129 ret = iwl_send_rxon_assoc(priv);
130 if (ret) {
131 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
132 return ret;
133 }
134
135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
136 iwl_print_rx_config_cmd(priv);
137 return 0;
138 }
139
140 /* If we are currently associated and the new config requires
141 * an RXON_ASSOC and the new config wants the associated mask enabled,
142 * we must clear the associated from the active configuration
143 * before we apply the new config */
144 if (iwl_is_associated(priv) && new_assoc) {
145 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
146 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
147
148 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
149 sizeof(struct iwl_rxon_cmd),
150 &priv->active_rxon);
151
152 /* If the mask clearing failed then we set
153 * active_rxon back to what it was previously */
154 if (ret) {
155 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
156 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
157 return ret;
158 }
159 iwl_clear_ucode_stations(priv, false);
160 iwl_restore_stations(priv);
161 }
162
163 IWL_DEBUG_INFO(priv, "Sending RXON\n"
164 "* with%s RXON_FILTER_ASSOC_MSK\n"
165 "* channel = %d\n"
166 "* bssid = %pM\n",
167 (new_assoc ? "" : "out"),
168 le16_to_cpu(priv->staging_rxon.channel),
169 priv->staging_rxon.bssid_addr);
170
171 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
172
173 /* Apply the new configuration
174 * RXON unassoc clears the station table in uCode so restoration of
175 * stations is needed after it (the RXON command) completes
176 */
177 if (!new_assoc) {
178 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
179 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
180 if (ret) {
181 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
182 return ret;
183 }
184 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
185 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
186 iwl_clear_ucode_stations(priv, false);
187 iwl_restore_stations(priv);
188 }
189
190 priv->start_calib = 0;
191 if (new_assoc) {
192 /*
193 * allow CTS-to-self if possible for new association.
194 * this is relevant only for 5000 series and up,
195 * but will not damage 4965
196 */
197 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
198
199 /* Apply the new configuration
200 * RXON assoc doesn't clear the station table in uCode,
201 */
202 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
203 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
204 if (ret) {
205 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
206 return ret;
207 }
208 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
209 }
210 iwl_print_rx_config_cmd(priv);
211
212 iwl_init_sensitivity(priv);
213
214 /* If we issue a new RXON command which required a tune then we must
215 * send a new TXPOWER command or we won't be able to Tx any frames */
216 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
217 if (ret) {
218 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
219 return ret;
220 }
221
222 return 0;
223 }
224
225 void iwl_update_chain_flags(struct iwl_priv *priv)
226 {
227
228 if (priv->cfg->ops->hcmd->set_rxon_chain)
229 priv->cfg->ops->hcmd->set_rxon_chain(priv);
230 iwlcore_commit_rxon(priv);
231 }
232
233 static void iwl_clear_free_frames(struct iwl_priv *priv)
234 {
235 struct list_head *element;
236
237 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
238 priv->frames_count);
239
240 while (!list_empty(&priv->free_frames)) {
241 element = priv->free_frames.next;
242 list_del(element);
243 kfree(list_entry(element, struct iwl_frame, list));
244 priv->frames_count--;
245 }
246
247 if (priv->frames_count) {
248 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
249 priv->frames_count);
250 priv->frames_count = 0;
251 }
252 }
253
254 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
255 {
256 struct iwl_frame *frame;
257 struct list_head *element;
258 if (list_empty(&priv->free_frames)) {
259 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
260 if (!frame) {
261 IWL_ERR(priv, "Could not allocate frame!\n");
262 return NULL;
263 }
264
265 priv->frames_count++;
266 return frame;
267 }
268
269 element = priv->free_frames.next;
270 list_del(element);
271 return list_entry(element, struct iwl_frame, list);
272 }
273
274 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
275 {
276 memset(frame, 0, sizeof(*frame));
277 list_add(&frame->list, &priv->free_frames);
278 }
279
280 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
281 struct ieee80211_hdr *hdr,
282 int left)
283 {
284 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
285 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
286 (priv->iw_mode != NL80211_IFTYPE_AP)))
287 return 0;
288
289 if (priv->ibss_beacon->len > left)
290 return 0;
291
292 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
293
294 return priv->ibss_beacon->len;
295 }
296
297 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
298 static void iwl_set_beacon_tim(struct iwl_priv *priv,
299 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
300 u8 *beacon, u32 frame_size)
301 {
302 u16 tim_idx;
303 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
304
305 /*
306 * The index is relative to frame start but we start looking at the
307 * variable-length part of the beacon.
308 */
309 tim_idx = mgmt->u.beacon.variable - beacon;
310
311 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
312 while ((tim_idx < (frame_size - 2)) &&
313 (beacon[tim_idx] != WLAN_EID_TIM))
314 tim_idx += beacon[tim_idx+1] + 2;
315
316 /* If TIM field was found, set variables */
317 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
318 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
319 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
320 } else
321 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
322 }
323
324 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
325 struct iwl_frame *frame)
326 {
327 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
328 u32 frame_size;
329 u32 rate_flags;
330 u32 rate;
331 /*
332 * We have to set up the TX command, the TX Beacon command, and the
333 * beacon contents.
334 */
335
336 /* Initialize memory */
337 tx_beacon_cmd = &frame->u.beacon;
338 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
339
340 /* Set up TX beacon contents */
341 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
342 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
343 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
344 return 0;
345
346 /* Set up TX command fields */
347 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
348 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
349 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
350 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
351 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
352
353 /* Set up TX beacon command fields */
354 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
355 frame_size);
356
357 /* Set up packet rate and flags */
358 rate = iwl_rate_get_lowest_plcp(priv);
359 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
360 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
361 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
362 rate_flags |= RATE_MCS_CCK_MSK;
363 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
364 rate_flags);
365
366 return sizeof(*tx_beacon_cmd) + frame_size;
367 }
368 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
369 {
370 struct iwl_frame *frame;
371 unsigned int frame_size;
372 int rc;
373
374 frame = iwl_get_free_frame(priv);
375 if (!frame) {
376 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
377 "command.\n");
378 return -ENOMEM;
379 }
380
381 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
382 if (!frame_size) {
383 IWL_ERR(priv, "Error configuring the beacon command\n");
384 iwl_free_frame(priv, frame);
385 return -EINVAL;
386 }
387
388 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
389 &frame->u.cmd[0]);
390
391 iwl_free_frame(priv, frame);
392
393 return rc;
394 }
395
396 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
397 {
398 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
399
400 dma_addr_t addr = get_unaligned_le32(&tb->lo);
401 if (sizeof(dma_addr_t) > sizeof(u32))
402 addr |=
403 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
404
405 return addr;
406 }
407
408 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
409 {
410 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
411
412 return le16_to_cpu(tb->hi_n_len) >> 4;
413 }
414
415 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
416 dma_addr_t addr, u16 len)
417 {
418 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
419 u16 hi_n_len = len << 4;
420
421 put_unaligned_le32(addr, &tb->lo);
422 if (sizeof(dma_addr_t) > sizeof(u32))
423 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
424
425 tb->hi_n_len = cpu_to_le16(hi_n_len);
426
427 tfd->num_tbs = idx + 1;
428 }
429
430 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
431 {
432 return tfd->num_tbs & 0x1f;
433 }
434
435 /**
436 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
437 * @priv - driver private data
438 * @txq - tx queue
439 *
440 * Does NOT advance any TFD circular buffer read/write indexes
441 * Does NOT free the TFD itself (which is within circular buffer)
442 */
443 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
444 {
445 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
446 struct iwl_tfd *tfd;
447 struct pci_dev *dev = priv->pci_dev;
448 int index = txq->q.read_ptr;
449 int i;
450 int num_tbs;
451
452 tfd = &tfd_tmp[index];
453
454 /* Sanity check on number of chunks */
455 num_tbs = iwl_tfd_get_num_tbs(tfd);
456
457 if (num_tbs >= IWL_NUM_OF_TBS) {
458 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
459 /* @todo issue fatal error, it is quite serious situation */
460 return;
461 }
462
463 /* Unmap tx_cmd */
464 if (num_tbs)
465 pci_unmap_single(dev,
466 pci_unmap_addr(&txq->meta[index], mapping),
467 pci_unmap_len(&txq->meta[index], len),
468 PCI_DMA_BIDIRECTIONAL);
469
470 /* Unmap chunks, if any. */
471 for (i = 1; i < num_tbs; i++) {
472 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
473 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
474
475 if (txq->txb) {
476 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
477 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
478 }
479 }
480 }
481
482 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
483 struct iwl_tx_queue *txq,
484 dma_addr_t addr, u16 len,
485 u8 reset, u8 pad)
486 {
487 struct iwl_queue *q;
488 struct iwl_tfd *tfd, *tfd_tmp;
489 u32 num_tbs;
490
491 q = &txq->q;
492 tfd_tmp = (struct iwl_tfd *)txq->tfds;
493 tfd = &tfd_tmp[q->write_ptr];
494
495 if (reset)
496 memset(tfd, 0, sizeof(*tfd));
497
498 num_tbs = iwl_tfd_get_num_tbs(tfd);
499
500 /* Each TFD can point to a maximum 20 Tx buffers */
501 if (num_tbs >= IWL_NUM_OF_TBS) {
502 IWL_ERR(priv, "Error can not send more than %d chunks\n",
503 IWL_NUM_OF_TBS);
504 return -EINVAL;
505 }
506
507 BUG_ON(addr & ~DMA_BIT_MASK(36));
508 if (unlikely(addr & ~IWL_TX_DMA_MASK))
509 IWL_ERR(priv, "Unaligned address = %llx\n",
510 (unsigned long long)addr);
511
512 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
513
514 return 0;
515 }
516
517 /*
518 * Tell nic where to find circular buffer of Tx Frame Descriptors for
519 * given Tx queue, and enable the DMA channel used for that queue.
520 *
521 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
522 * channels supported in hardware.
523 */
524 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
525 struct iwl_tx_queue *txq)
526 {
527 int txq_id = txq->q.id;
528
529 /* Circular buffer (TFD queue in DRAM) physical base address */
530 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
531 txq->q.dma_addr >> 8);
532
533 return 0;
534 }
535
536 /******************************************************************************
537 *
538 * Generic RX handler implementations
539 *
540 ******************************************************************************/
541 static void iwl_rx_reply_alive(struct iwl_priv *priv,
542 struct iwl_rx_mem_buffer *rxb)
543 {
544 struct iwl_rx_packet *pkt = rxb_addr(rxb);
545 struct iwl_alive_resp *palive;
546 struct delayed_work *pwork;
547
548 palive = &pkt->u.alive_frame;
549
550 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
551 "0x%01X 0x%01X\n",
552 palive->is_valid, palive->ver_type,
553 palive->ver_subtype);
554
555 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
556 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
557 memcpy(&priv->card_alive_init,
558 &pkt->u.alive_frame,
559 sizeof(struct iwl_init_alive_resp));
560 pwork = &priv->init_alive_start;
561 } else {
562 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
563 memcpy(&priv->card_alive, &pkt->u.alive_frame,
564 sizeof(struct iwl_alive_resp));
565 pwork = &priv->alive_start;
566 }
567
568 /* We delay the ALIVE response by 5ms to
569 * give the HW RF Kill time to activate... */
570 if (palive->is_valid == UCODE_VALID_OK)
571 queue_delayed_work(priv->workqueue, pwork,
572 msecs_to_jiffies(5));
573 else
574 IWL_WARN(priv, "uCode did not respond OK.\n");
575 }
576
577 static void iwl_bg_beacon_update(struct work_struct *work)
578 {
579 struct iwl_priv *priv =
580 container_of(work, struct iwl_priv, beacon_update);
581 struct sk_buff *beacon;
582
583 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
584 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
585
586 if (!beacon) {
587 IWL_ERR(priv, "update beacon failed\n");
588 return;
589 }
590
591 mutex_lock(&priv->mutex);
592 /* new beacon skb is allocated every time; dispose previous.*/
593 if (priv->ibss_beacon)
594 dev_kfree_skb(priv->ibss_beacon);
595
596 priv->ibss_beacon = beacon;
597 mutex_unlock(&priv->mutex);
598
599 iwl_send_beacon_cmd(priv);
600 }
601
602 /**
603 * iwl_bg_statistics_periodic - Timer callback to queue statistics
604 *
605 * This callback is provided in order to send a statistics request.
606 *
607 * This timer function is continually reset to execute within
608 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
609 * was received. We need to ensure we receive the statistics in order
610 * to update the temperature used for calibrating the TXPOWER.
611 */
612 static void iwl_bg_statistics_periodic(unsigned long data)
613 {
614 struct iwl_priv *priv = (struct iwl_priv *)data;
615
616 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
617 return;
618
619 /* dont send host command if rf-kill is on */
620 if (!iwl_is_ready_rf(priv))
621 return;
622
623 iwl_send_statistics_request(priv, CMD_ASYNC, false);
624 }
625
626
627 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
628 u32 start_idx, u32 num_events,
629 u32 mode)
630 {
631 u32 i;
632 u32 ptr; /* SRAM byte address of log data */
633 u32 ev, time, data; /* event log data */
634 unsigned long reg_flags;
635
636 if (mode == 0)
637 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
638 else
639 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
640
641 /* Make sure device is powered up for SRAM reads */
642 spin_lock_irqsave(&priv->reg_lock, reg_flags);
643 if (iwl_grab_nic_access(priv)) {
644 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
645 return;
646 }
647
648 /* Set starting address; reads will auto-increment */
649 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
650 rmb();
651
652 /*
653 * "time" is actually "data" for mode 0 (no timestamp).
654 * place event id # at far right for easier visual parsing.
655 */
656 for (i = 0; i < num_events; i++) {
657 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
658 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
659 if (mode == 0) {
660 trace_iwlwifi_dev_ucode_cont_event(priv,
661 0, time, ev);
662 } else {
663 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
664 trace_iwlwifi_dev_ucode_cont_event(priv,
665 time, data, ev);
666 }
667 }
668 /* Allow device to power down */
669 iwl_release_nic_access(priv);
670 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
671 }
672
673 static void iwl_continuous_event_trace(struct iwl_priv *priv)
674 {
675 u32 capacity; /* event log capacity in # entries */
676 u32 base; /* SRAM byte address of event log header */
677 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
678 u32 num_wraps; /* # times uCode wrapped to top of log */
679 u32 next_entry; /* index of next entry to be written by uCode */
680
681 if (priv->ucode_type == UCODE_INIT)
682 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
683 else
684 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
685 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
686 capacity = iwl_read_targ_mem(priv, base);
687 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
688 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
689 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
690 } else
691 return;
692
693 if (num_wraps == priv->event_log.num_wraps) {
694 iwl_print_cont_event_trace(priv,
695 base, priv->event_log.next_entry,
696 next_entry - priv->event_log.next_entry,
697 mode);
698 priv->event_log.non_wraps_count++;
699 } else {
700 if ((num_wraps - priv->event_log.num_wraps) > 1)
701 priv->event_log.wraps_more_count++;
702 else
703 priv->event_log.wraps_once_count++;
704 trace_iwlwifi_dev_ucode_wrap_event(priv,
705 num_wraps - priv->event_log.num_wraps,
706 next_entry, priv->event_log.next_entry);
707 if (next_entry < priv->event_log.next_entry) {
708 iwl_print_cont_event_trace(priv, base,
709 priv->event_log.next_entry,
710 capacity - priv->event_log.next_entry,
711 mode);
712
713 iwl_print_cont_event_trace(priv, base, 0,
714 next_entry, mode);
715 } else {
716 iwl_print_cont_event_trace(priv, base,
717 next_entry, capacity - next_entry,
718 mode);
719
720 iwl_print_cont_event_trace(priv, base, 0,
721 next_entry, mode);
722 }
723 }
724 priv->event_log.num_wraps = num_wraps;
725 priv->event_log.next_entry = next_entry;
726 }
727
728 /**
729 * iwl_bg_ucode_trace - Timer callback to log ucode event
730 *
731 * The timer is continually set to execute every
732 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
733 * this function is to perform continuous uCode event logging operation
734 * if enabled
735 */
736 static void iwl_bg_ucode_trace(unsigned long data)
737 {
738 struct iwl_priv *priv = (struct iwl_priv *)data;
739
740 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
741 return;
742
743 if (priv->event_log.ucode_trace) {
744 iwl_continuous_event_trace(priv);
745 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
746 mod_timer(&priv->ucode_trace,
747 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
748 }
749 }
750
751 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
752 struct iwl_rx_mem_buffer *rxb)
753 {
754 #ifdef CONFIG_IWLWIFI_DEBUG
755 struct iwl_rx_packet *pkt = rxb_addr(rxb);
756 struct iwl4965_beacon_notif *beacon =
757 (struct iwl4965_beacon_notif *)pkt->u.raw;
758 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
759
760 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
761 "tsf %d %d rate %d\n",
762 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
763 beacon->beacon_notify_hdr.failure_frame,
764 le32_to_cpu(beacon->ibss_mgr_status),
765 le32_to_cpu(beacon->high_tsf),
766 le32_to_cpu(beacon->low_tsf), rate);
767 #endif
768
769 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
770 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
771 queue_work(priv->workqueue, &priv->beacon_update);
772 }
773
774 /* Handle notification from uCode that card's power state is changing
775 * due to software, hardware, or critical temperature RFKILL */
776 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
777 struct iwl_rx_mem_buffer *rxb)
778 {
779 struct iwl_rx_packet *pkt = rxb_addr(rxb);
780 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
781 unsigned long status = priv->status;
782
783 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
784 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
785 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
786 (flags & CT_CARD_DISABLED) ?
787 "Reached" : "Not reached");
788
789 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
790 CT_CARD_DISABLED)) {
791
792 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
793 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
794
795 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
796 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
797
798 if (!(flags & RXON_CARD_DISABLED)) {
799 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
800 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
801 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
802 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
803 }
804 if (flags & CT_CARD_DISABLED)
805 iwl_tt_enter_ct_kill(priv);
806 }
807 if (!(flags & CT_CARD_DISABLED))
808 iwl_tt_exit_ct_kill(priv);
809
810 if (flags & HW_CARD_DISABLED)
811 set_bit(STATUS_RF_KILL_HW, &priv->status);
812 else
813 clear_bit(STATUS_RF_KILL_HW, &priv->status);
814
815
816 if (!(flags & RXON_CARD_DISABLED))
817 iwl_scan_cancel(priv);
818
819 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
820 test_bit(STATUS_RF_KILL_HW, &priv->status)))
821 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
822 test_bit(STATUS_RF_KILL_HW, &priv->status));
823 else
824 wake_up_interruptible(&priv->wait_command_queue);
825 }
826
827 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
828 {
829 if (src == IWL_PWR_SRC_VAUX) {
830 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
831 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
832 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
833 ~APMG_PS_CTRL_MSK_PWR_SRC);
834 } else {
835 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
836 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
837 ~APMG_PS_CTRL_MSK_PWR_SRC);
838 }
839
840 return 0;
841 }
842
843 /**
844 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
845 *
846 * Setup the RX handlers for each of the reply types sent from the uCode
847 * to the host.
848 *
849 * This function chains into the hardware specific files for them to setup
850 * any hardware specific handlers as well.
851 */
852 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
853 {
854 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
855 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
856 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
857 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
858 iwl_rx_spectrum_measure_notif;
859 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
860 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
861 iwl_rx_pm_debug_statistics_notif;
862 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
863
864 /*
865 * The same handler is used for both the REPLY to a discrete
866 * statistics request from the host as well as for the periodic
867 * statistics notifications (after received beacons) from the uCode.
868 */
869 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
870 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
871
872 iwl_setup_rx_scan_handlers(priv);
873
874 /* status change handler */
875 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
876
877 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
878 iwl_rx_missed_beacon_notif;
879 /* Rx handlers */
880 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
881 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
882 /* block ack */
883 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
884 /* Set up hardware specific Rx handlers */
885 priv->cfg->ops->lib->rx_handler_setup(priv);
886 }
887
888 /**
889 * iwl_rx_handle - Main entry function for receiving responses from uCode
890 *
891 * Uses the priv->rx_handlers callback function array to invoke
892 * the appropriate handlers, including command responses,
893 * frame-received notifications, and other notifications.
894 */
895 void iwl_rx_handle(struct iwl_priv *priv)
896 {
897 struct iwl_rx_mem_buffer *rxb;
898 struct iwl_rx_packet *pkt;
899 struct iwl_rx_queue *rxq = &priv->rxq;
900 u32 r, i;
901 int reclaim;
902 unsigned long flags;
903 u8 fill_rx = 0;
904 u32 count = 8;
905 int total_empty;
906
907 /* uCode's read index (stored in shared DRAM) indicates the last Rx
908 * buffer that the driver may process (last buffer filled by ucode). */
909 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
910 i = rxq->read;
911
912 /* Rx interrupt, but nothing sent from uCode */
913 if (i == r)
914 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
915
916 /* calculate total frames need to be restock after handling RX */
917 total_empty = r - rxq->write_actual;
918 if (total_empty < 0)
919 total_empty += RX_QUEUE_SIZE;
920
921 if (total_empty > (RX_QUEUE_SIZE / 2))
922 fill_rx = 1;
923
924 while (i != r) {
925 rxb = rxq->queue[i];
926
927 /* If an RXB doesn't have a Rx queue slot associated with it,
928 * then a bug has been introduced in the queue refilling
929 * routines -- catch it here */
930 BUG_ON(rxb == NULL);
931
932 rxq->queue[i] = NULL;
933
934 pci_unmap_page(priv->pci_dev, rxb->page_dma,
935 PAGE_SIZE << priv->hw_params.rx_page_order,
936 PCI_DMA_FROMDEVICE);
937 pkt = rxb_addr(rxb);
938
939 trace_iwlwifi_dev_rx(priv, pkt,
940 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
941
942 /* Reclaim a command buffer only if this packet is a response
943 * to a (driver-originated) command.
944 * If the packet (e.g. Rx frame) originated from uCode,
945 * there is no command buffer to reclaim.
946 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
947 * but apparently a few don't get set; catch them here. */
948 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
949 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
950 (pkt->hdr.cmd != REPLY_RX) &&
951 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
952 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
953 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
954 (pkt->hdr.cmd != REPLY_TX);
955
956 /* Based on type of command response or notification,
957 * handle those that need handling via function in
958 * rx_handlers table. See iwl_setup_rx_handlers() */
959 if (priv->rx_handlers[pkt->hdr.cmd]) {
960 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
961 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
962 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
963 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
964 } else {
965 /* No handling needed */
966 IWL_DEBUG_RX(priv,
967 "r %d i %d No handler needed for %s, 0x%02x\n",
968 r, i, get_cmd_string(pkt->hdr.cmd),
969 pkt->hdr.cmd);
970 }
971
972 /*
973 * XXX: After here, we should always check rxb->page
974 * against NULL before touching it or its virtual
975 * memory (pkt). Because some rx_handler might have
976 * already taken or freed the pages.
977 */
978
979 if (reclaim) {
980 /* Invoke any callbacks, transfer the buffer to caller,
981 * and fire off the (possibly) blocking iwl_send_cmd()
982 * as we reclaim the driver command queue */
983 if (rxb->page)
984 iwl_tx_cmd_complete(priv, rxb);
985 else
986 IWL_WARN(priv, "Claim null rxb?\n");
987 }
988
989 /* Reuse the page if possible. For notification packets and
990 * SKBs that fail to Rx correctly, add them back into the
991 * rx_free list for reuse later. */
992 spin_lock_irqsave(&rxq->lock, flags);
993 if (rxb->page != NULL) {
994 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
995 0, PAGE_SIZE << priv->hw_params.rx_page_order,
996 PCI_DMA_FROMDEVICE);
997 list_add_tail(&rxb->list, &rxq->rx_free);
998 rxq->free_count++;
999 } else
1000 list_add_tail(&rxb->list, &rxq->rx_used);
1001
1002 spin_unlock_irqrestore(&rxq->lock, flags);
1003
1004 i = (i + 1) & RX_QUEUE_MASK;
1005 /* If there are a lot of unused frames,
1006 * restock the Rx queue so ucode wont assert. */
1007 if (fill_rx) {
1008 count++;
1009 if (count >= 8) {
1010 rxq->read = i;
1011 iwlagn_rx_replenish_now(priv);
1012 count = 0;
1013 }
1014 }
1015 }
1016
1017 /* Backtrack one entry */
1018 rxq->read = i;
1019 if (fill_rx)
1020 iwlagn_rx_replenish_now(priv);
1021 else
1022 iwlagn_rx_queue_restock(priv);
1023 }
1024
1025 /* call this function to flush any scheduled tasklet */
1026 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1027 {
1028 /* wait to make sure we flush pending tasklet*/
1029 synchronize_irq(priv->pci_dev->irq);
1030 tasklet_kill(&priv->irq_tasklet);
1031 }
1032
1033 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1034 {
1035 u32 inta, handled = 0;
1036 u32 inta_fh;
1037 unsigned long flags;
1038 u32 i;
1039 #ifdef CONFIG_IWLWIFI_DEBUG
1040 u32 inta_mask;
1041 #endif
1042
1043 spin_lock_irqsave(&priv->lock, flags);
1044
1045 /* Ack/clear/reset pending uCode interrupts.
1046 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1047 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1048 inta = iwl_read32(priv, CSR_INT);
1049 iwl_write32(priv, CSR_INT, inta);
1050
1051 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1052 * Any new interrupts that happen after this, either while we're
1053 * in this tasklet, or later, will show up in next ISR/tasklet. */
1054 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1055 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1056
1057 #ifdef CONFIG_IWLWIFI_DEBUG
1058 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1059 /* just for debug */
1060 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1061 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1062 inta, inta_mask, inta_fh);
1063 }
1064 #endif
1065
1066 spin_unlock_irqrestore(&priv->lock, flags);
1067
1068 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1069 * atomic, make sure that inta covers all the interrupts that
1070 * we've discovered, even if FH interrupt came in just after
1071 * reading CSR_INT. */
1072 if (inta_fh & CSR49_FH_INT_RX_MASK)
1073 inta |= CSR_INT_BIT_FH_RX;
1074 if (inta_fh & CSR49_FH_INT_TX_MASK)
1075 inta |= CSR_INT_BIT_FH_TX;
1076
1077 /* Now service all interrupt bits discovered above. */
1078 if (inta & CSR_INT_BIT_HW_ERR) {
1079 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1080
1081 /* Tell the device to stop sending interrupts */
1082 iwl_disable_interrupts(priv);
1083
1084 priv->isr_stats.hw++;
1085 iwl_irq_handle_error(priv);
1086
1087 handled |= CSR_INT_BIT_HW_ERR;
1088
1089 return;
1090 }
1091
1092 #ifdef CONFIG_IWLWIFI_DEBUG
1093 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1094 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1095 if (inta & CSR_INT_BIT_SCD) {
1096 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1097 "the frame/frames.\n");
1098 priv->isr_stats.sch++;
1099 }
1100
1101 /* Alive notification via Rx interrupt will do the real work */
1102 if (inta & CSR_INT_BIT_ALIVE) {
1103 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1104 priv->isr_stats.alive++;
1105 }
1106 }
1107 #endif
1108 /* Safely ignore these bits for debug checks below */
1109 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1110
1111 /* HW RF KILL switch toggled */
1112 if (inta & CSR_INT_BIT_RF_KILL) {
1113 int hw_rf_kill = 0;
1114 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1115 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1116 hw_rf_kill = 1;
1117
1118 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1119 hw_rf_kill ? "disable radio" : "enable radio");
1120
1121 priv->isr_stats.rfkill++;
1122
1123 /* driver only loads ucode once setting the interface up.
1124 * the driver allows loading the ucode even if the radio
1125 * is killed. Hence update the killswitch state here. The
1126 * rfkill handler will care about restarting if needed.
1127 */
1128 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1129 if (hw_rf_kill)
1130 set_bit(STATUS_RF_KILL_HW, &priv->status);
1131 else
1132 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1133 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1134 }
1135
1136 handled |= CSR_INT_BIT_RF_KILL;
1137 }
1138
1139 /* Chip got too hot and stopped itself */
1140 if (inta & CSR_INT_BIT_CT_KILL) {
1141 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1142 priv->isr_stats.ctkill++;
1143 handled |= CSR_INT_BIT_CT_KILL;
1144 }
1145
1146 /* Error detected by uCode */
1147 if (inta & CSR_INT_BIT_SW_ERR) {
1148 IWL_ERR(priv, "Microcode SW error detected. "
1149 " Restarting 0x%X.\n", inta);
1150 priv->isr_stats.sw++;
1151 priv->isr_stats.sw_err = inta;
1152 iwl_irq_handle_error(priv);
1153 handled |= CSR_INT_BIT_SW_ERR;
1154 }
1155
1156 /*
1157 * uCode wakes up after power-down sleep.
1158 * Tell device about any new tx or host commands enqueued,
1159 * and about any Rx buffers made available while asleep.
1160 */
1161 if (inta & CSR_INT_BIT_WAKEUP) {
1162 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1163 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1164 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1165 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1166 priv->isr_stats.wakeup++;
1167 handled |= CSR_INT_BIT_WAKEUP;
1168 }
1169
1170 /* All uCode command responses, including Tx command responses,
1171 * Rx "responses" (frame-received notification), and other
1172 * notifications from uCode come through here*/
1173 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1174 iwl_rx_handle(priv);
1175 priv->isr_stats.rx++;
1176 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1177 }
1178
1179 /* This "Tx" DMA channel is used only for loading uCode */
1180 if (inta & CSR_INT_BIT_FH_TX) {
1181 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1182 priv->isr_stats.tx++;
1183 handled |= CSR_INT_BIT_FH_TX;
1184 /* Wake up uCode load routine, now that load is complete */
1185 priv->ucode_write_complete = 1;
1186 wake_up_interruptible(&priv->wait_command_queue);
1187 }
1188
1189 if (inta & ~handled) {
1190 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1191 priv->isr_stats.unhandled++;
1192 }
1193
1194 if (inta & ~(priv->inta_mask)) {
1195 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1196 inta & ~priv->inta_mask);
1197 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1198 }
1199
1200 /* Re-enable all interrupts */
1201 /* only Re-enable if diabled by irq */
1202 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1203 iwl_enable_interrupts(priv);
1204
1205 #ifdef CONFIG_IWLWIFI_DEBUG
1206 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1207 inta = iwl_read32(priv, CSR_INT);
1208 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1209 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1210 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1211 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1212 }
1213 #endif
1214 }
1215
1216 /* tasklet for iwlagn interrupt */
1217 static void iwl_irq_tasklet(struct iwl_priv *priv)
1218 {
1219 u32 inta = 0;
1220 u32 handled = 0;
1221 unsigned long flags;
1222 u32 i;
1223 #ifdef CONFIG_IWLWIFI_DEBUG
1224 u32 inta_mask;
1225 #endif
1226
1227 spin_lock_irqsave(&priv->lock, flags);
1228
1229 /* Ack/clear/reset pending uCode interrupts.
1230 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1231 */
1232 /* There is a hardware bug in the interrupt mask function that some
1233 * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1234 * they are disabled in the CSR_INT_MASK register. Furthermore the
1235 * ICT interrupt handling mechanism has another bug that might cause
1236 * these unmasked interrupts fail to be detected. We workaround the
1237 * hardware bugs here by ACKing all the possible interrupts so that
1238 * interrupt coalescing can still be achieved.
1239 */
1240 iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1241
1242 inta = priv->_agn.inta;
1243
1244 #ifdef CONFIG_IWLWIFI_DEBUG
1245 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1246 /* just for debug */
1247 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1248 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1249 inta, inta_mask);
1250 }
1251 #endif
1252
1253 spin_unlock_irqrestore(&priv->lock, flags);
1254
1255 /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1256 priv->_agn.inta = 0;
1257
1258 /* Now service all interrupt bits discovered above. */
1259 if (inta & CSR_INT_BIT_HW_ERR) {
1260 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1261
1262 /* Tell the device to stop sending interrupts */
1263 iwl_disable_interrupts(priv);
1264
1265 priv->isr_stats.hw++;
1266 iwl_irq_handle_error(priv);
1267
1268 handled |= CSR_INT_BIT_HW_ERR;
1269
1270 return;
1271 }
1272
1273 #ifdef CONFIG_IWLWIFI_DEBUG
1274 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1275 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1276 if (inta & CSR_INT_BIT_SCD) {
1277 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1278 "the frame/frames.\n");
1279 priv->isr_stats.sch++;
1280 }
1281
1282 /* Alive notification via Rx interrupt will do the real work */
1283 if (inta & CSR_INT_BIT_ALIVE) {
1284 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1285 priv->isr_stats.alive++;
1286 }
1287 }
1288 #endif
1289 /* Safely ignore these bits for debug checks below */
1290 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1291
1292 /* HW RF KILL switch toggled */
1293 if (inta & CSR_INT_BIT_RF_KILL) {
1294 int hw_rf_kill = 0;
1295 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1296 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1297 hw_rf_kill = 1;
1298
1299 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1300 hw_rf_kill ? "disable radio" : "enable radio");
1301
1302 priv->isr_stats.rfkill++;
1303
1304 /* driver only loads ucode once setting the interface up.
1305 * the driver allows loading the ucode even if the radio
1306 * is killed. Hence update the killswitch state here. The
1307 * rfkill handler will care about restarting if needed.
1308 */
1309 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1310 if (hw_rf_kill)
1311 set_bit(STATUS_RF_KILL_HW, &priv->status);
1312 else
1313 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1314 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1315 }
1316
1317 handled |= CSR_INT_BIT_RF_KILL;
1318 }
1319
1320 /* Chip got too hot and stopped itself */
1321 if (inta & CSR_INT_BIT_CT_KILL) {
1322 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1323 priv->isr_stats.ctkill++;
1324 handled |= CSR_INT_BIT_CT_KILL;
1325 }
1326
1327 /* Error detected by uCode */
1328 if (inta & CSR_INT_BIT_SW_ERR) {
1329 IWL_ERR(priv, "Microcode SW error detected. "
1330 " Restarting 0x%X.\n", inta);
1331 priv->isr_stats.sw++;
1332 priv->isr_stats.sw_err = inta;
1333 iwl_irq_handle_error(priv);
1334 handled |= CSR_INT_BIT_SW_ERR;
1335 }
1336
1337 /* uCode wakes up after power-down sleep */
1338 if (inta & CSR_INT_BIT_WAKEUP) {
1339 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1340 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1341 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1342 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1343
1344 priv->isr_stats.wakeup++;
1345
1346 handled |= CSR_INT_BIT_WAKEUP;
1347 }
1348
1349 /* All uCode command responses, including Tx command responses,
1350 * Rx "responses" (frame-received notification), and other
1351 * notifications from uCode come through here*/
1352 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1353 CSR_INT_BIT_RX_PERIODIC)) {
1354 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1355 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1356 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1357 iwl_write32(priv, CSR_FH_INT_STATUS,
1358 CSR49_FH_INT_RX_MASK);
1359 }
1360 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1361 handled |= CSR_INT_BIT_RX_PERIODIC;
1362 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1363 }
1364 /* Sending RX interrupt require many steps to be done in the
1365 * the device:
1366 * 1- write interrupt to current index in ICT table.
1367 * 2- dma RX frame.
1368 * 3- update RX shared data to indicate last write index.
1369 * 4- send interrupt.
1370 * This could lead to RX race, driver could receive RX interrupt
1371 * but the shared data changes does not reflect this;
1372 * periodic interrupt will detect any dangling Rx activity.
1373 */
1374
1375 /* Disable periodic interrupt; we use it as just a one-shot. */
1376 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1377 CSR_INT_PERIODIC_DIS);
1378 iwl_rx_handle(priv);
1379
1380 /*
1381 * Enable periodic interrupt in 8 msec only if we received
1382 * real RX interrupt (instead of just periodic int), to catch
1383 * any dangling Rx interrupt. If it was just the periodic
1384 * interrupt, there was no dangling Rx activity, and no need
1385 * to extend the periodic interrupt; one-shot is enough.
1386 */
1387 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1388 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1389 CSR_INT_PERIODIC_ENA);
1390
1391 priv->isr_stats.rx++;
1392 }
1393
1394 /* This "Tx" DMA channel is used only for loading uCode */
1395 if (inta & CSR_INT_BIT_FH_TX) {
1396 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1397 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1398 priv->isr_stats.tx++;
1399 handled |= CSR_INT_BIT_FH_TX;
1400 /* Wake up uCode load routine, now that load is complete */
1401 priv->ucode_write_complete = 1;
1402 wake_up_interruptible(&priv->wait_command_queue);
1403 }
1404
1405 if (inta & ~handled) {
1406 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1407 priv->isr_stats.unhandled++;
1408 }
1409
1410 if (inta & ~(priv->inta_mask)) {
1411 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1412 inta & ~priv->inta_mask);
1413 }
1414
1415 /* Re-enable all interrupts */
1416 /* only Re-enable if diabled by irq */
1417 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1418 iwl_enable_interrupts(priv);
1419 }
1420
1421 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1422 #define ACK_CNT_RATIO (50)
1423 #define BA_TIMEOUT_CNT (5)
1424 #define BA_TIMEOUT_MAX (16)
1425
1426 /**
1427 * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1428 *
1429 * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1430 * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1431 * operation state.
1432 */
1433 bool iwl_good_ack_health(struct iwl_priv *priv,
1434 struct iwl_rx_packet *pkt)
1435 {
1436 bool rc = true;
1437 int actual_ack_cnt_delta, expected_ack_cnt_delta;
1438 int ba_timeout_delta;
1439
1440 actual_ack_cnt_delta =
1441 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1442 le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
1443 expected_ack_cnt_delta =
1444 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1445 le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
1446 ba_timeout_delta =
1447 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1448 le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
1449 if ((priv->_agn.agg_tids_count > 0) &&
1450 (expected_ack_cnt_delta > 0) &&
1451 (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1452 < ACK_CNT_RATIO) &&
1453 (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1454 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1455 " expected_ack_cnt = %d\n",
1456 actual_ack_cnt_delta, expected_ack_cnt_delta);
1457
1458 #ifdef CONFIG_IWLWIFI_DEBUG
1459 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1460 priv->delta_statistics.tx.rx_detected_cnt);
1461 IWL_DEBUG_RADIO(priv,
1462 "ack_or_ba_timeout_collision delta = %d\n",
1463 priv->delta_statistics.tx.
1464 ack_or_ba_timeout_collision);
1465 #endif
1466 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1467 ba_timeout_delta);
1468 if (!actual_ack_cnt_delta &&
1469 (ba_timeout_delta >= BA_TIMEOUT_MAX))
1470 rc = false;
1471 }
1472 return rc;
1473 }
1474
1475
1476 /******************************************************************************
1477 *
1478 * uCode download functions
1479 *
1480 ******************************************************************************/
1481
1482 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1483 {
1484 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1485 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1486 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1487 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1488 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1489 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1490 }
1491
1492 static void iwl_nic_start(struct iwl_priv *priv)
1493 {
1494 /* Remove all resets to allow NIC to operate */
1495 iwl_write32(priv, CSR_RESET, 0);
1496 }
1497
1498
1499 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1500 static int iwl_mac_setup_register(struct iwl_priv *priv);
1501
1502 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1503 {
1504 const char *name_pre = priv->cfg->fw_name_pre;
1505
1506 if (first)
1507 priv->fw_index = priv->cfg->ucode_api_max;
1508 else
1509 priv->fw_index--;
1510
1511 if (priv->fw_index < priv->cfg->ucode_api_min) {
1512 IWL_ERR(priv, "no suitable firmware found!\n");
1513 return -ENOENT;
1514 }
1515
1516 sprintf(priv->firmware_name, "%s%d%s",
1517 name_pre, priv->fw_index, ".ucode");
1518
1519 IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1520 priv->firmware_name);
1521
1522 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1523 &priv->pci_dev->dev, GFP_KERNEL, priv,
1524 iwl_ucode_callback);
1525 }
1526
1527 /**
1528 * iwl_ucode_callback - callback when firmware was loaded
1529 *
1530 * If loaded successfully, copies the firmware into buffers
1531 * for the card to fetch (via DMA).
1532 */
1533 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1534 {
1535 struct iwl_priv *priv = context;
1536 struct iwl_ucode_header *ucode;
1537 const unsigned int api_max = priv->cfg->ucode_api_max;
1538 const unsigned int api_min = priv->cfg->ucode_api_min;
1539 u8 *src;
1540 size_t len;
1541 u32 api_ver, build;
1542 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1543 int err;
1544 u16 eeprom_ver;
1545
1546 if (!ucode_raw) {
1547 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1548 priv->firmware_name);
1549 goto try_again;
1550 }
1551
1552 IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1553 priv->firmware_name, ucode_raw->size);
1554
1555 /* Make sure that we got at least the v1 header! */
1556 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1557 IWL_ERR(priv, "File size way too small!\n");
1558 goto try_again;
1559 }
1560
1561 /* Data from ucode file: header followed by uCode images */
1562 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1563
1564 priv->ucode_ver = le32_to_cpu(ucode->ver);
1565 api_ver = IWL_UCODE_API(priv->ucode_ver);
1566 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1567 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1568 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1569 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1570 init_data_size =
1571 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1572 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1573 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1574
1575 /* api_ver should match the api version forming part of the
1576 * firmware filename ... but we don't check for that and only rely
1577 * on the API version read from firmware header from here on forward */
1578
1579 if (api_ver < api_min || api_ver > api_max) {
1580 IWL_ERR(priv, "Driver unable to support your firmware API. "
1581 "Driver supports v%u, firmware is v%u.\n",
1582 api_max, api_ver);
1583 goto try_again;
1584 }
1585
1586 if (api_ver != api_max)
1587 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1588 "got v%u. New firmware can be obtained "
1589 "from http://www.intellinuxwireless.org.\n",
1590 api_max, api_ver);
1591
1592 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1593 IWL_UCODE_MAJOR(priv->ucode_ver),
1594 IWL_UCODE_MINOR(priv->ucode_ver),
1595 IWL_UCODE_API(priv->ucode_ver),
1596 IWL_UCODE_SERIAL(priv->ucode_ver));
1597
1598 snprintf(priv->hw->wiphy->fw_version,
1599 sizeof(priv->hw->wiphy->fw_version),
1600 "%u.%u.%u.%u",
1601 IWL_UCODE_MAJOR(priv->ucode_ver),
1602 IWL_UCODE_MINOR(priv->ucode_ver),
1603 IWL_UCODE_API(priv->ucode_ver),
1604 IWL_UCODE_SERIAL(priv->ucode_ver));
1605
1606 if (build)
1607 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1608
1609 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1610 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1611 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1612 ? "OTP" : "EEPROM", eeprom_ver);
1613
1614 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1615 priv->ucode_ver);
1616 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1617 inst_size);
1618 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1619 data_size);
1620 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1621 init_size);
1622 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1623 init_data_size);
1624 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1625 boot_size);
1626
1627 /*
1628 * For any of the failures below (before allocating pci memory)
1629 * we will try to load a version with a smaller API -- maybe the
1630 * user just got a corrupted version of the latest API.
1631 */
1632
1633 /* Verify size of file vs. image size info in file's header */
1634 if (ucode_raw->size !=
1635 priv->cfg->ops->ucode->get_header_size(api_ver) +
1636 inst_size + data_size + init_size +
1637 init_data_size + boot_size) {
1638
1639 IWL_DEBUG_INFO(priv,
1640 "uCode file size %d does not match expected size\n",
1641 (int)ucode_raw->size);
1642 goto try_again;
1643 }
1644
1645 /* Verify that uCode images will fit in card's SRAM */
1646 if (inst_size > priv->hw_params.max_inst_size) {
1647 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1648 inst_size);
1649 goto try_again;
1650 }
1651
1652 if (data_size > priv->hw_params.max_data_size) {
1653 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1654 data_size);
1655 goto try_again;
1656 }
1657 if (init_size > priv->hw_params.max_inst_size) {
1658 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1659 init_size);
1660 goto try_again;
1661 }
1662 if (init_data_size > priv->hw_params.max_data_size) {
1663 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1664 init_data_size);
1665 goto try_again;
1666 }
1667 if (boot_size > priv->hw_params.max_bsm_size) {
1668 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1669 boot_size);
1670 goto try_again;
1671 }
1672
1673 /* Allocate ucode buffers for card's bus-master loading ... */
1674
1675 /* Runtime instructions and 2 copies of data:
1676 * 1) unmodified from disk
1677 * 2) backup cache for save/restore during power-downs */
1678 priv->ucode_code.len = inst_size;
1679 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1680
1681 priv->ucode_data.len = data_size;
1682 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1683
1684 priv->ucode_data_backup.len = data_size;
1685 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1686
1687 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1688 !priv->ucode_data_backup.v_addr)
1689 goto err_pci_alloc;
1690
1691 /* Initialization instructions and data */
1692 if (init_size && init_data_size) {
1693 priv->ucode_init.len = init_size;
1694 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1695
1696 priv->ucode_init_data.len = init_data_size;
1697 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1698
1699 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1700 goto err_pci_alloc;
1701 }
1702
1703 /* Bootstrap (instructions only, no data) */
1704 if (boot_size) {
1705 priv->ucode_boot.len = boot_size;
1706 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1707
1708 if (!priv->ucode_boot.v_addr)
1709 goto err_pci_alloc;
1710 }
1711
1712 /* Copy images into buffers for card's bus-master reads ... */
1713
1714 /* Runtime instructions (first block of data in file) */
1715 len = inst_size;
1716 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1717 memcpy(priv->ucode_code.v_addr, src, len);
1718 src += len;
1719
1720 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1721 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1722
1723 /* Runtime data (2nd block)
1724 * NOTE: Copy into backup buffer will be done in iwl_up() */
1725 len = data_size;
1726 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1727 memcpy(priv->ucode_data.v_addr, src, len);
1728 memcpy(priv->ucode_data_backup.v_addr, src, len);
1729 src += len;
1730
1731 /* Initialization instructions (3rd block) */
1732 if (init_size) {
1733 len = init_size;
1734 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1735 len);
1736 memcpy(priv->ucode_init.v_addr, src, len);
1737 src += len;
1738 }
1739
1740 /* Initialization data (4th block) */
1741 if (init_data_size) {
1742 len = init_data_size;
1743 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1744 len);
1745 memcpy(priv->ucode_init_data.v_addr, src, len);
1746 src += len;
1747 }
1748
1749 /* Bootstrap instructions (5th block) */
1750 len = boot_size;
1751 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1752 memcpy(priv->ucode_boot.v_addr, src, len);
1753
1754 /**************************************************
1755 * This is still part of probe() in a sense...
1756 *
1757 * 9. Setup and register with mac80211 and debugfs
1758 **************************************************/
1759 err = iwl_mac_setup_register(priv);
1760 if (err)
1761 goto out_unbind;
1762
1763 err = iwl_dbgfs_register(priv, DRV_NAME);
1764 if (err)
1765 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1766
1767 /* We have our copies now, allow OS release its copies */
1768 release_firmware(ucode_raw);
1769 return;
1770
1771 try_again:
1772 /* try next, if any */
1773 if (iwl_request_firmware(priv, false))
1774 goto out_unbind;
1775 release_firmware(ucode_raw);
1776 return;
1777
1778 err_pci_alloc:
1779 IWL_ERR(priv, "failed to allocate pci memory\n");
1780 iwl_dealloc_ucode_pci(priv);
1781 out_unbind:
1782 device_release_driver(&priv->pci_dev->dev);
1783 release_firmware(ucode_raw);
1784 }
1785
1786 static const char *desc_lookup_text[] = {
1787 "OK",
1788 "FAIL",
1789 "BAD_PARAM",
1790 "BAD_CHECKSUM",
1791 "NMI_INTERRUPT_WDG",
1792 "SYSASSERT",
1793 "FATAL_ERROR",
1794 "BAD_COMMAND",
1795 "HW_ERROR_TUNE_LOCK",
1796 "HW_ERROR_TEMPERATURE",
1797 "ILLEGAL_CHAN_FREQ",
1798 "VCC_NOT_STABLE",
1799 "FH_ERROR",
1800 "NMI_INTERRUPT_HOST",
1801 "NMI_INTERRUPT_ACTION_PT",
1802 "NMI_INTERRUPT_UNKNOWN",
1803 "UCODE_VERSION_MISMATCH",
1804 "HW_ERROR_ABS_LOCK",
1805 "HW_ERROR_CAL_LOCK_FAIL",
1806 "NMI_INTERRUPT_INST_ACTION_PT",
1807 "NMI_INTERRUPT_DATA_ACTION_PT",
1808 "NMI_TRM_HW_ER",
1809 "NMI_INTERRUPT_TRM",
1810 "NMI_INTERRUPT_BREAK_POINT"
1811 "DEBUG_0",
1812 "DEBUG_1",
1813 "DEBUG_2",
1814 "DEBUG_3",
1815 "ADVANCED SYSASSERT"
1816 };
1817
1818 static const char *desc_lookup(int i)
1819 {
1820 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1821
1822 if (i < 0 || i > max)
1823 i = max;
1824
1825 return desc_lookup_text[i];
1826 }
1827
1828 #define ERROR_START_OFFSET (1 * sizeof(u32))
1829 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1830
1831 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1832 {
1833 u32 data2, line;
1834 u32 desc, time, count, base, data1;
1835 u32 blink1, blink2, ilink1, ilink2;
1836
1837 if (priv->ucode_type == UCODE_INIT)
1838 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1839 else
1840 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1841
1842 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1843 IWL_ERR(priv,
1844 "Not valid error log pointer 0x%08X for %s uCode\n",
1845 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1846 return;
1847 }
1848
1849 count = iwl_read_targ_mem(priv, base);
1850
1851 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1852 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1853 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1854 priv->status, count);
1855 }
1856
1857 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1858 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1859 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1860 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1861 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1862 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1863 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1864 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1865 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1866
1867 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1868 blink1, blink2, ilink1, ilink2);
1869
1870 IWL_ERR(priv, "Desc Time "
1871 "data1 data2 line\n");
1872 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1873 desc_lookup(desc), desc, time, data1, data2, line);
1874 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1875 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1876 ilink1, ilink2);
1877
1878 }
1879
1880 #define EVENT_START_OFFSET (4 * sizeof(u32))
1881
1882 /**
1883 * iwl_print_event_log - Dump error event log to syslog
1884 *
1885 */
1886 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1887 u32 num_events, u32 mode,
1888 int pos, char **buf, size_t bufsz)
1889 {
1890 u32 i;
1891 u32 base; /* SRAM byte address of event log header */
1892 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1893 u32 ptr; /* SRAM byte address of log data */
1894 u32 ev, time, data; /* event log data */
1895 unsigned long reg_flags;
1896
1897 if (num_events == 0)
1898 return pos;
1899 if (priv->ucode_type == UCODE_INIT)
1900 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1901 else
1902 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1903
1904 if (mode == 0)
1905 event_size = 2 * sizeof(u32);
1906 else
1907 event_size = 3 * sizeof(u32);
1908
1909 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1910
1911 /* Make sure device is powered up for SRAM reads */
1912 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1913 iwl_grab_nic_access(priv);
1914
1915 /* Set starting address; reads will auto-increment */
1916 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1917 rmb();
1918
1919 /* "time" is actually "data" for mode 0 (no timestamp).
1920 * place event id # at far right for easier visual parsing. */
1921 for (i = 0; i < num_events; i++) {
1922 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1923 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1924 if (mode == 0) {
1925 /* data, ev */
1926 if (bufsz) {
1927 pos += scnprintf(*buf + pos, bufsz - pos,
1928 "EVT_LOG:0x%08x:%04u\n",
1929 time, ev);
1930 } else {
1931 trace_iwlwifi_dev_ucode_event(priv, 0,
1932 time, ev);
1933 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1934 time, ev);
1935 }
1936 } else {
1937 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1938 if (bufsz) {
1939 pos += scnprintf(*buf + pos, bufsz - pos,
1940 "EVT_LOGT:%010u:0x%08x:%04u\n",
1941 time, data, ev);
1942 } else {
1943 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1944 time, data, ev);
1945 trace_iwlwifi_dev_ucode_event(priv, time,
1946 data, ev);
1947 }
1948 }
1949 }
1950
1951 /* Allow device to power down */
1952 iwl_release_nic_access(priv);
1953 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1954 return pos;
1955 }
1956
1957 /**
1958 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1959 */
1960 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1961 u32 num_wraps, u32 next_entry,
1962 u32 size, u32 mode,
1963 int pos, char **buf, size_t bufsz)
1964 {
1965 /*
1966 * display the newest DEFAULT_LOG_ENTRIES entries
1967 * i.e the entries just before the next ont that uCode would fill.
1968 */
1969 if (num_wraps) {
1970 if (next_entry < size) {
1971 pos = iwl_print_event_log(priv,
1972 capacity - (size - next_entry),
1973 size - next_entry, mode,
1974 pos, buf, bufsz);
1975 pos = iwl_print_event_log(priv, 0,
1976 next_entry, mode,
1977 pos, buf, bufsz);
1978 } else
1979 pos = iwl_print_event_log(priv, next_entry - size,
1980 size, mode, pos, buf, bufsz);
1981 } else {
1982 if (next_entry < size) {
1983 pos = iwl_print_event_log(priv, 0, next_entry,
1984 mode, pos, buf, bufsz);
1985 } else {
1986 pos = iwl_print_event_log(priv, next_entry - size,
1987 size, mode, pos, buf, bufsz);
1988 }
1989 }
1990 return pos;
1991 }
1992
1993 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1994
1995 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1996 char **buf, bool display)
1997 {
1998 u32 base; /* SRAM byte address of event log header */
1999 u32 capacity; /* event log capacity in # entries */
2000 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2001 u32 num_wraps; /* # times uCode wrapped to top of log */
2002 u32 next_entry; /* index of next entry to be written by uCode */
2003 u32 size; /* # entries that we'll print */
2004 int pos = 0;
2005 size_t bufsz = 0;
2006
2007 if (priv->ucode_type == UCODE_INIT)
2008 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2009 else
2010 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2011
2012 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2013 IWL_ERR(priv,
2014 "Invalid event log pointer 0x%08X for %s uCode\n",
2015 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2016 return -EINVAL;
2017 }
2018
2019 /* event log header */
2020 capacity = iwl_read_targ_mem(priv, base);
2021 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2022 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2023 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2024
2025 if (capacity > priv->cfg->max_event_log_size) {
2026 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2027 capacity, priv->cfg->max_event_log_size);
2028 capacity = priv->cfg->max_event_log_size;
2029 }
2030
2031 if (next_entry > priv->cfg->max_event_log_size) {
2032 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2033 next_entry, priv->cfg->max_event_log_size);
2034 next_entry = priv->cfg->max_event_log_size;
2035 }
2036
2037 size = num_wraps ? capacity : next_entry;
2038
2039 /* bail out if nothing in log */
2040 if (size == 0) {
2041 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2042 return pos;
2043 }
2044
2045 #ifdef CONFIG_IWLWIFI_DEBUG
2046 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2047 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2048 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2049 #else
2050 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2051 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2052 #endif
2053 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2054 size);
2055
2056 #ifdef CONFIG_IWLWIFI_DEBUG
2057 if (display) {
2058 if (full_log)
2059 bufsz = capacity * 48;
2060 else
2061 bufsz = size * 48;
2062 *buf = kmalloc(bufsz, GFP_KERNEL);
2063 if (!*buf)
2064 return -ENOMEM;
2065 }
2066 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2067 /*
2068 * if uCode has wrapped back to top of log,
2069 * start at the oldest entry,
2070 * i.e the next one that uCode would fill.
2071 */
2072 if (num_wraps)
2073 pos = iwl_print_event_log(priv, next_entry,
2074 capacity - next_entry, mode,
2075 pos, buf, bufsz);
2076 /* (then/else) start at top of log */
2077 pos = iwl_print_event_log(priv, 0,
2078 next_entry, mode, pos, buf, bufsz);
2079 } else
2080 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2081 next_entry, size, mode,
2082 pos, buf, bufsz);
2083 #else
2084 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2085 next_entry, size, mode,
2086 pos, buf, bufsz);
2087 #endif
2088 return pos;
2089 }
2090
2091 /**
2092 * iwl_alive_start - called after REPLY_ALIVE notification received
2093 * from protocol/runtime uCode (initialization uCode's
2094 * Alive gets handled by iwl_init_alive_start()).
2095 */
2096 static void iwl_alive_start(struct iwl_priv *priv)
2097 {
2098 int ret = 0;
2099
2100 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2101
2102 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2103 /* We had an error bringing up the hardware, so take it
2104 * all the way back down so we can try again */
2105 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2106 goto restart;
2107 }
2108
2109 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2110 * This is a paranoid check, because we would not have gotten the
2111 * "runtime" alive if code weren't properly loaded. */
2112 if (iwl_verify_ucode(priv)) {
2113 /* Runtime instruction load was bad;
2114 * take it all the way back down so we can try again */
2115 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2116 goto restart;
2117 }
2118
2119 ret = priv->cfg->ops->lib->alive_notify(priv);
2120 if (ret) {
2121 IWL_WARN(priv,
2122 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2123 goto restart;
2124 }
2125
2126 /* After the ALIVE response, we can send host commands to the uCode */
2127 set_bit(STATUS_ALIVE, &priv->status);
2128
2129 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2130 /* Enable timer to monitor the driver queues */
2131 mod_timer(&priv->monitor_recover,
2132 jiffies +
2133 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2134 }
2135
2136 if (iwl_is_rfkill(priv))
2137 return;
2138
2139 ieee80211_wake_queues(priv->hw);
2140
2141 priv->active_rate = IWL_RATES_MASK;
2142
2143 /* Configure Tx antenna selection based on H/W config */
2144 if (priv->cfg->ops->hcmd->set_tx_ant)
2145 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2146
2147 if (iwl_is_associated(priv)) {
2148 struct iwl_rxon_cmd *active_rxon =
2149 (struct iwl_rxon_cmd *)&priv->active_rxon;
2150 /* apply any changes in staging */
2151 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2152 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2153 } else {
2154 /* Initialize our rx_config data */
2155 iwl_connection_init_rx_config(priv, priv->iw_mode);
2156
2157 if (priv->cfg->ops->hcmd->set_rxon_chain)
2158 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2159
2160 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2161 }
2162
2163 /* Configure Bluetooth device coexistence support */
2164 iwl_send_bt_config(priv);
2165
2166 iwl_reset_run_time_calib(priv);
2167
2168 /* Configure the adapter for unassociated operation */
2169 iwlcore_commit_rxon(priv);
2170
2171 /* At this point, the NIC is initialized and operational */
2172 iwl_rf_kill_ct_config(priv);
2173
2174 iwl_leds_init(priv);
2175
2176 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2177 set_bit(STATUS_READY, &priv->status);
2178 wake_up_interruptible(&priv->wait_command_queue);
2179
2180 iwl_power_update_mode(priv, true);
2181 IWL_DEBUG_INFO(priv, "Updated power mode\n");
2182
2183
2184 return;
2185
2186 restart:
2187 queue_work(priv->workqueue, &priv->restart);
2188 }
2189
2190 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2191
2192 static void __iwl_down(struct iwl_priv *priv)
2193 {
2194 unsigned long flags;
2195 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2196
2197 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2198
2199 if (!exit_pending)
2200 set_bit(STATUS_EXIT_PENDING, &priv->status);
2201
2202 iwl_clear_ucode_stations(priv, true);
2203
2204 /* Unblock any waiting calls */
2205 wake_up_interruptible_all(&priv->wait_command_queue);
2206
2207 /* Wipe out the EXIT_PENDING status bit if we are not actually
2208 * exiting the module */
2209 if (!exit_pending)
2210 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2211
2212 /* stop and reset the on-board processor */
2213 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2214
2215 /* tell the device to stop sending interrupts */
2216 spin_lock_irqsave(&priv->lock, flags);
2217 iwl_disable_interrupts(priv);
2218 spin_unlock_irqrestore(&priv->lock, flags);
2219 iwl_synchronize_irq(priv);
2220
2221 if (priv->mac80211_registered)
2222 ieee80211_stop_queues(priv->hw);
2223
2224 /* If we have not previously called iwl_init() then
2225 * clear all bits but the RF Kill bit and return */
2226 if (!iwl_is_init(priv)) {
2227 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2228 STATUS_RF_KILL_HW |
2229 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2230 STATUS_GEO_CONFIGURED |
2231 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2232 STATUS_EXIT_PENDING;
2233 goto exit;
2234 }
2235
2236 /* ...otherwise clear out all the status bits but the RF Kill
2237 * bit and continue taking the NIC down. */
2238 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2239 STATUS_RF_KILL_HW |
2240 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2241 STATUS_GEO_CONFIGURED |
2242 test_bit(STATUS_FW_ERROR, &priv->status) <<
2243 STATUS_FW_ERROR |
2244 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2245 STATUS_EXIT_PENDING;
2246
2247 /* device going down, Stop using ICT table */
2248 iwl_disable_ict(priv);
2249
2250 iwlagn_txq_ctx_stop(priv);
2251 iwlagn_rxq_stop(priv);
2252
2253 /* Power-down device's busmaster DMA clocks */
2254 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2255 udelay(5);
2256
2257 /* Make sure (redundant) we've released our request to stay awake */
2258 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2259
2260 /* Stop the device, and put it in low power state */
2261 priv->cfg->ops->lib->apm_ops.stop(priv);
2262
2263 exit:
2264 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2265
2266 if (priv->ibss_beacon)
2267 dev_kfree_skb(priv->ibss_beacon);
2268 priv->ibss_beacon = NULL;
2269
2270 /* clear out any free frames */
2271 iwl_clear_free_frames(priv);
2272 }
2273
2274 static void iwl_down(struct iwl_priv *priv)
2275 {
2276 mutex_lock(&priv->mutex);
2277 __iwl_down(priv);
2278 mutex_unlock(&priv->mutex);
2279
2280 iwl_cancel_deferred_work(priv);
2281 }
2282
2283 #define HW_READY_TIMEOUT (50)
2284
2285 static int iwl_set_hw_ready(struct iwl_priv *priv)
2286 {
2287 int ret = 0;
2288
2289 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2290 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2291
2292 /* See if we got it */
2293 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2294 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2295 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2296 HW_READY_TIMEOUT);
2297 if (ret != -ETIMEDOUT)
2298 priv->hw_ready = true;
2299 else
2300 priv->hw_ready = false;
2301
2302 IWL_DEBUG_INFO(priv, "hardware %s\n",
2303 (priv->hw_ready == 1) ? "ready" : "not ready");
2304 return ret;
2305 }
2306
2307 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2308 {
2309 int ret = 0;
2310
2311 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2312
2313 ret = iwl_set_hw_ready(priv);
2314 if (priv->hw_ready)
2315 return ret;
2316
2317 /* If HW is not ready, prepare the conditions to check again */
2318 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2319 CSR_HW_IF_CONFIG_REG_PREPARE);
2320
2321 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2322 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2323 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2324
2325 /* HW should be ready by now, check again. */
2326 if (ret != -ETIMEDOUT)
2327 iwl_set_hw_ready(priv);
2328
2329 return ret;
2330 }
2331
2332 #define MAX_HW_RESTARTS 5
2333
2334 static int __iwl_up(struct iwl_priv *priv)
2335 {
2336 int i;
2337 int ret;
2338
2339 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2340 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2341 return -EIO;
2342 }
2343
2344 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2345 IWL_ERR(priv, "ucode not available for device bringup\n");
2346 return -EIO;
2347 }
2348
2349 iwl_prepare_card_hw(priv);
2350
2351 if (!priv->hw_ready) {
2352 IWL_WARN(priv, "Exit HW not ready\n");
2353 return -EIO;
2354 }
2355
2356 /* If platform's RF_KILL switch is NOT set to KILL */
2357 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2358 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2359 else
2360 set_bit(STATUS_RF_KILL_HW, &priv->status);
2361
2362 if (iwl_is_rfkill(priv)) {
2363 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2364
2365 iwl_enable_interrupts(priv);
2366 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2367 return 0;
2368 }
2369
2370 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2371
2372 ret = iwlagn_hw_nic_init(priv);
2373 if (ret) {
2374 IWL_ERR(priv, "Unable to init nic\n");
2375 return ret;
2376 }
2377
2378 /* make sure rfkill handshake bits are cleared */
2379 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2380 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2381 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2382
2383 /* clear (again), then enable host interrupts */
2384 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2385 iwl_enable_interrupts(priv);
2386
2387 /* really make sure rfkill handshake bits are cleared */
2388 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2389 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2390
2391 /* Copy original ucode data image from disk into backup cache.
2392 * This will be used to initialize the on-board processor's
2393 * data SRAM for a clean start when the runtime program first loads. */
2394 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2395 priv->ucode_data.len);
2396
2397 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2398
2399 /* load bootstrap state machine,
2400 * load bootstrap program into processor's memory,
2401 * prepare to load the "initialize" uCode */
2402 ret = priv->cfg->ops->lib->load_ucode(priv);
2403
2404 if (ret) {
2405 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2406 ret);
2407 continue;
2408 }
2409
2410 /* start card; "initialize" will load runtime ucode */
2411 iwl_nic_start(priv);
2412
2413 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2414
2415 return 0;
2416 }
2417
2418 set_bit(STATUS_EXIT_PENDING, &priv->status);
2419 __iwl_down(priv);
2420 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2421
2422 /* tried to restart and config the device for as long as our
2423 * patience could withstand */
2424 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2425 return -EIO;
2426 }
2427
2428
2429 /*****************************************************************************
2430 *
2431 * Workqueue callbacks
2432 *
2433 *****************************************************************************/
2434
2435 static void iwl_bg_init_alive_start(struct work_struct *data)
2436 {
2437 struct iwl_priv *priv =
2438 container_of(data, struct iwl_priv, init_alive_start.work);
2439
2440 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2441 return;
2442
2443 mutex_lock(&priv->mutex);
2444 priv->cfg->ops->lib->init_alive_start(priv);
2445 mutex_unlock(&priv->mutex);
2446 }
2447
2448 static void iwl_bg_alive_start(struct work_struct *data)
2449 {
2450 struct iwl_priv *priv =
2451 container_of(data, struct iwl_priv, alive_start.work);
2452
2453 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2454 return;
2455
2456 /* enable dram interrupt */
2457 iwl_reset_ict(priv);
2458
2459 mutex_lock(&priv->mutex);
2460 iwl_alive_start(priv);
2461 mutex_unlock(&priv->mutex);
2462 }
2463
2464 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2465 {
2466 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2467 run_time_calib_work);
2468
2469 mutex_lock(&priv->mutex);
2470
2471 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2472 test_bit(STATUS_SCANNING, &priv->status)) {
2473 mutex_unlock(&priv->mutex);
2474 return;
2475 }
2476
2477 if (priv->start_calib) {
2478 iwl_chain_noise_calibration(priv, &priv->statistics);
2479
2480 iwl_sensitivity_calibration(priv, &priv->statistics);
2481 }
2482
2483 mutex_unlock(&priv->mutex);
2484 return;
2485 }
2486
2487 static void iwl_bg_restart(struct work_struct *data)
2488 {
2489 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2490
2491 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2492 return;
2493
2494 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2495 mutex_lock(&priv->mutex);
2496 priv->vif = NULL;
2497 priv->is_open = 0;
2498 mutex_unlock(&priv->mutex);
2499 iwl_down(priv);
2500 ieee80211_restart_hw(priv->hw);
2501 } else {
2502 iwl_down(priv);
2503
2504 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2505 return;
2506
2507 mutex_lock(&priv->mutex);
2508 __iwl_up(priv);
2509 mutex_unlock(&priv->mutex);
2510 }
2511 }
2512
2513 static void iwl_bg_rx_replenish(struct work_struct *data)
2514 {
2515 struct iwl_priv *priv =
2516 container_of(data, struct iwl_priv, rx_replenish);
2517
2518 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2519 return;
2520
2521 mutex_lock(&priv->mutex);
2522 iwlagn_rx_replenish(priv);
2523 mutex_unlock(&priv->mutex);
2524 }
2525
2526 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2527
2528 void iwl_post_associate(struct iwl_priv *priv)
2529 {
2530 struct ieee80211_conf *conf = NULL;
2531 int ret = 0;
2532
2533 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2534 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2535 return;
2536 }
2537
2538 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2539 return;
2540
2541
2542 if (!priv->vif || !priv->is_open)
2543 return;
2544
2545 iwl_scan_cancel_timeout(priv, 200);
2546
2547 conf = ieee80211_get_hw_conf(priv->hw);
2548
2549 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2550 iwlcore_commit_rxon(priv);
2551
2552 iwl_setup_rxon_timing(priv);
2553 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2554 sizeof(priv->rxon_timing), &priv->rxon_timing);
2555 if (ret)
2556 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2557 "Attempting to continue.\n");
2558
2559 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2560
2561 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2562
2563 if (priv->cfg->ops->hcmd->set_rxon_chain)
2564 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2565
2566 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2567
2568 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2569 priv->assoc_id, priv->beacon_int);
2570
2571 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2572 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2573 else
2574 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2575
2576 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2577 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2578 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2579 else
2580 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2581
2582 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2583 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2584
2585 }
2586
2587 iwlcore_commit_rxon(priv);
2588
2589 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2590 priv->assoc_id, priv->active_rxon.bssid_addr);
2591
2592 switch (priv->iw_mode) {
2593 case NL80211_IFTYPE_STATION:
2594 break;
2595
2596 case NL80211_IFTYPE_ADHOC:
2597
2598 /* assume default assoc id */
2599 priv->assoc_id = 1;
2600
2601 iwl_add_local_station(priv, priv->bssid, true);
2602 iwl_send_beacon_cmd(priv);
2603
2604 break;
2605
2606 default:
2607 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2608 __func__, priv->iw_mode);
2609 break;
2610 }
2611
2612 /* the chain noise calibration will enabled PM upon completion
2613 * If chain noise has already been run, then we need to enable
2614 * power management here */
2615 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2616 iwl_power_update_mode(priv, false);
2617
2618 /* Enable Rx differential gain and sensitivity calibrations */
2619 iwl_chain_noise_reset(priv);
2620 priv->start_calib = 1;
2621
2622 }
2623
2624 /*****************************************************************************
2625 *
2626 * mac80211 entry point functions
2627 *
2628 *****************************************************************************/
2629
2630 #define UCODE_READY_TIMEOUT (4 * HZ)
2631
2632 /*
2633 * Not a mac80211 entry point function, but it fits in with all the
2634 * other mac80211 functions grouped here.
2635 */
2636 static int iwl_mac_setup_register(struct iwl_priv *priv)
2637 {
2638 int ret;
2639 struct ieee80211_hw *hw = priv->hw;
2640 hw->rate_control_algorithm = "iwl-agn-rs";
2641
2642 /* Tell mac80211 our characteristics */
2643 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2644 IEEE80211_HW_NOISE_DBM |
2645 IEEE80211_HW_AMPDU_AGGREGATION |
2646 IEEE80211_HW_SPECTRUM_MGMT;
2647
2648 if (!priv->cfg->broken_powersave)
2649 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2650 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2651
2652 if (priv->cfg->sku & IWL_SKU_N)
2653 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2654 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2655
2656 hw->sta_data_size = sizeof(struct iwl_station_priv);
2657 hw->wiphy->interface_modes =
2658 BIT(NL80211_IFTYPE_STATION) |
2659 BIT(NL80211_IFTYPE_ADHOC);
2660
2661 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2662 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2663
2664 /*
2665 * For now, disable PS by default because it affects
2666 * RX performance significantly.
2667 */
2668 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2669
2670 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2671 /* we create the 802.11 header and a zero-length SSID element */
2672 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2673
2674 /* Default value; 4 EDCA QOS priorities */
2675 hw->queues = 4;
2676
2677 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2678
2679 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2680 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2681 &priv->bands[IEEE80211_BAND_2GHZ];
2682 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2683 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2684 &priv->bands[IEEE80211_BAND_5GHZ];
2685
2686 ret = ieee80211_register_hw(priv->hw);
2687 if (ret) {
2688 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2689 return ret;
2690 }
2691 priv->mac80211_registered = 1;
2692
2693 return 0;
2694 }
2695
2696
2697 static int iwl_mac_start(struct ieee80211_hw *hw)
2698 {
2699 struct iwl_priv *priv = hw->priv;
2700 int ret;
2701
2702 IWL_DEBUG_MAC80211(priv, "enter\n");
2703
2704 /* we should be verifying the device is ready to be opened */
2705 mutex_lock(&priv->mutex);
2706 ret = __iwl_up(priv);
2707 mutex_unlock(&priv->mutex);
2708
2709 if (ret)
2710 return ret;
2711
2712 if (iwl_is_rfkill(priv))
2713 goto out;
2714
2715 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2716
2717 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2718 * mac80211 will not be run successfully. */
2719 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2720 test_bit(STATUS_READY, &priv->status),
2721 UCODE_READY_TIMEOUT);
2722 if (!ret) {
2723 if (!test_bit(STATUS_READY, &priv->status)) {
2724 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2725 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2726 return -ETIMEDOUT;
2727 }
2728 }
2729
2730 iwl_led_start(priv);
2731
2732 out:
2733 priv->is_open = 1;
2734 IWL_DEBUG_MAC80211(priv, "leave\n");
2735 return 0;
2736 }
2737
2738 static void iwl_mac_stop(struct ieee80211_hw *hw)
2739 {
2740 struct iwl_priv *priv = hw->priv;
2741
2742 IWL_DEBUG_MAC80211(priv, "enter\n");
2743
2744 if (!priv->is_open)
2745 return;
2746
2747 priv->is_open = 0;
2748
2749 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2750 /* stop mac, cancel any scan request and clear
2751 * RXON_FILTER_ASSOC_MSK BIT
2752 */
2753 mutex_lock(&priv->mutex);
2754 iwl_scan_cancel_timeout(priv, 100);
2755 mutex_unlock(&priv->mutex);
2756 }
2757
2758 iwl_down(priv);
2759
2760 flush_workqueue(priv->workqueue);
2761
2762 /* enable interrupts again in order to receive rfkill changes */
2763 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2764 iwl_enable_interrupts(priv);
2765
2766 IWL_DEBUG_MAC80211(priv, "leave\n");
2767 }
2768
2769 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2770 {
2771 struct iwl_priv *priv = hw->priv;
2772
2773 IWL_DEBUG_MACDUMP(priv, "enter\n");
2774
2775 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2776 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2777
2778 if (iwlagn_tx_skb(priv, skb))
2779 dev_kfree_skb_any(skb);
2780
2781 IWL_DEBUG_MACDUMP(priv, "leave\n");
2782 return NETDEV_TX_OK;
2783 }
2784
2785 void iwl_config_ap(struct iwl_priv *priv)
2786 {
2787 int ret = 0;
2788
2789 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2790 return;
2791
2792 /* The following should be done only at AP bring up */
2793 if (!iwl_is_associated(priv)) {
2794
2795 /* RXON - unassoc (to set timing command) */
2796 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2797 iwlcore_commit_rxon(priv);
2798
2799 /* RXON Timing */
2800 iwl_setup_rxon_timing(priv);
2801 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2802 sizeof(priv->rxon_timing), &priv->rxon_timing);
2803 if (ret)
2804 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2805 "Attempting to continue.\n");
2806
2807 /* AP has all antennas */
2808 priv->chain_noise_data.active_chains =
2809 priv->hw_params.valid_rx_ant;
2810 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2811 if (priv->cfg->ops->hcmd->set_rxon_chain)
2812 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2813
2814 /* FIXME: what should be the assoc_id for AP? */
2815 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2816 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2817 priv->staging_rxon.flags |=
2818 RXON_FLG_SHORT_PREAMBLE_MSK;
2819 else
2820 priv->staging_rxon.flags &=
2821 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2822
2823 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2824 if (priv->assoc_capability &
2825 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2826 priv->staging_rxon.flags |=
2827 RXON_FLG_SHORT_SLOT_MSK;
2828 else
2829 priv->staging_rxon.flags &=
2830 ~RXON_FLG_SHORT_SLOT_MSK;
2831
2832 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2833 priv->staging_rxon.flags &=
2834 ~RXON_FLG_SHORT_SLOT_MSK;
2835 }
2836 /* restore RXON assoc */
2837 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2838 iwlcore_commit_rxon(priv);
2839 iwl_add_bcast_station(priv);
2840 }
2841 iwl_send_beacon_cmd(priv);
2842
2843 /* FIXME - we need to add code here to detect a totally new
2844 * configuration, reset the AP, unassoc, rxon timing, assoc,
2845 * clear sta table, add BCAST sta... */
2846 }
2847
2848 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2849 struct ieee80211_vif *vif,
2850 struct ieee80211_key_conf *keyconf,
2851 struct ieee80211_sta *sta,
2852 u32 iv32, u16 *phase1key)
2853 {
2854
2855 struct iwl_priv *priv = hw->priv;
2856 IWL_DEBUG_MAC80211(priv, "enter\n");
2857
2858 iwl_update_tkip_key(priv, keyconf,
2859 sta ? sta->addr : iwl_bcast_addr,
2860 iv32, phase1key);
2861
2862 IWL_DEBUG_MAC80211(priv, "leave\n");
2863 }
2864
2865 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2866 struct ieee80211_vif *vif,
2867 struct ieee80211_sta *sta,
2868 struct ieee80211_key_conf *key)
2869 {
2870 struct iwl_priv *priv = hw->priv;
2871 const u8 *addr;
2872 int ret;
2873 u8 sta_id;
2874 bool is_default_wep_key = false;
2875
2876 IWL_DEBUG_MAC80211(priv, "enter\n");
2877
2878 if (priv->cfg->mod_params->sw_crypto) {
2879 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2880 return -EOPNOTSUPP;
2881 }
2882 addr = sta ? sta->addr : iwl_bcast_addr;
2883 sta_id = iwl_find_station(priv, addr);
2884 if (sta_id == IWL_INVALID_STATION) {
2885 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2886 addr);
2887 return -EINVAL;
2888
2889 }
2890
2891 mutex_lock(&priv->mutex);
2892 iwl_scan_cancel_timeout(priv, 100);
2893
2894 /* If we are getting WEP group key and we didn't receive any key mapping
2895 * so far, we are in legacy wep mode (group key only), otherwise we are
2896 * in 1X mode.
2897 * In legacy wep mode, we use another host command to the uCode */
2898 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2899 priv->iw_mode != NL80211_IFTYPE_AP) {
2900 if (cmd == SET_KEY)
2901 is_default_wep_key = !priv->key_mapping_key;
2902 else
2903 is_default_wep_key =
2904 (key->hw_key_idx == HW_KEY_DEFAULT);
2905 }
2906
2907 switch (cmd) {
2908 case SET_KEY:
2909 if (is_default_wep_key)
2910 ret = iwl_set_default_wep_key(priv, key);
2911 else
2912 ret = iwl_set_dynamic_key(priv, key, sta_id);
2913
2914 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2915 break;
2916 case DISABLE_KEY:
2917 if (is_default_wep_key)
2918 ret = iwl_remove_default_wep_key(priv, key);
2919 else
2920 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2921
2922 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2923 break;
2924 default:
2925 ret = -EINVAL;
2926 }
2927
2928 mutex_unlock(&priv->mutex);
2929 IWL_DEBUG_MAC80211(priv, "leave\n");
2930
2931 return ret;
2932 }
2933
2934 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2935 struct ieee80211_vif *vif,
2936 enum ieee80211_ampdu_mlme_action action,
2937 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2938 {
2939 struct iwl_priv *priv = hw->priv;
2940 int ret;
2941
2942 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2943 sta->addr, tid);
2944
2945 if (!(priv->cfg->sku & IWL_SKU_N))
2946 return -EACCES;
2947
2948 switch (action) {
2949 case IEEE80211_AMPDU_RX_START:
2950 IWL_DEBUG_HT(priv, "start Rx\n");
2951 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2952 case IEEE80211_AMPDU_RX_STOP:
2953 IWL_DEBUG_HT(priv, "stop Rx\n");
2954 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2955 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2956 return 0;
2957 else
2958 return ret;
2959 case IEEE80211_AMPDU_TX_START:
2960 IWL_DEBUG_HT(priv, "start Tx\n");
2961 ret = iwlagn_tx_agg_start(priv, sta->addr, tid, ssn);
2962 if (ret == 0) {
2963 priv->_agn.agg_tids_count++;
2964 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2965 priv->_agn.agg_tids_count);
2966 }
2967 return ret;
2968 case IEEE80211_AMPDU_TX_STOP:
2969 IWL_DEBUG_HT(priv, "stop Tx\n");
2970 ret = iwlagn_tx_agg_stop(priv, sta->addr, tid);
2971 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
2972 priv->_agn.agg_tids_count--;
2973 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2974 priv->_agn.agg_tids_count);
2975 }
2976 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2977 return 0;
2978 else
2979 return ret;
2980 case IEEE80211_AMPDU_TX_OPERATIONAL:
2981 /* do nothing */
2982 return -EOPNOTSUPP;
2983 default:
2984 IWL_DEBUG_HT(priv, "unknown\n");
2985 return -EINVAL;
2986 break;
2987 }
2988 return 0;
2989 }
2990
2991 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2992 struct ieee80211_low_level_stats *stats)
2993 {
2994 struct iwl_priv *priv = hw->priv;
2995
2996 priv = hw->priv;
2997 IWL_DEBUG_MAC80211(priv, "enter\n");
2998 IWL_DEBUG_MAC80211(priv, "leave\n");
2999
3000 return 0;
3001 }
3002
3003 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3004 struct ieee80211_vif *vif,
3005 enum sta_notify_cmd cmd,
3006 struct ieee80211_sta *sta)
3007 {
3008 struct iwl_priv *priv = hw->priv;
3009 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3010 int sta_id;
3011
3012 switch (cmd) {
3013 case STA_NOTIFY_SLEEP:
3014 WARN_ON(!sta_priv->client);
3015 sta_priv->asleep = true;
3016 if (atomic_read(&sta_priv->pending_frames) > 0)
3017 ieee80211_sta_block_awake(hw, sta, true);
3018 break;
3019 case STA_NOTIFY_AWAKE:
3020 WARN_ON(!sta_priv->client);
3021 if (!sta_priv->asleep)
3022 break;
3023 sta_priv->asleep = false;
3024 sta_id = iwl_find_station(priv, sta->addr);
3025 if (sta_id != IWL_INVALID_STATION)
3026 iwl_sta_modify_ps_wake(priv, sta_id);
3027 break;
3028 default:
3029 break;
3030 }
3031 }
3032
3033 /**
3034 * iwl_restore_wepkeys - Restore WEP keys to device
3035 */
3036 static void iwl_restore_wepkeys(struct iwl_priv *priv)
3037 {
3038 mutex_lock(&priv->mutex);
3039 if (priv->iw_mode == NL80211_IFTYPE_STATION &&
3040 priv->default_wep_key &&
3041 iwl_send_static_wepkey_cmd(priv, 0))
3042 IWL_ERR(priv, "Could not send WEP static key\n");
3043 mutex_unlock(&priv->mutex);
3044 }
3045
3046 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3047 struct ieee80211_vif *vif,
3048 struct ieee80211_sta *sta)
3049 {
3050 struct iwl_priv *priv = hw->priv;
3051 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3052 bool is_ap = priv->iw_mode == NL80211_IFTYPE_STATION;
3053 int ret;
3054 u8 sta_id;
3055
3056 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3057 sta->addr);
3058
3059 atomic_set(&sta_priv->pending_frames, 0);
3060 if (vif->type == NL80211_IFTYPE_AP)
3061 sta_priv->client = true;
3062
3063 ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3064 &sta_id);
3065 if (ret) {
3066 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3067 sta->addr, ret);
3068 /* Should we return success if return code is EEXIST ? */
3069 return ret;
3070 }
3071
3072 iwl_restore_wepkeys(priv);
3073
3074 /* Initialize rate scaling */
3075 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3076 sta->addr);
3077 iwl_rs_rate_init(priv, sta, sta_id);
3078
3079 return ret;
3080 }
3081
3082 /*****************************************************************************
3083 *
3084 * sysfs attributes
3085 *
3086 *****************************************************************************/
3087
3088 #ifdef CONFIG_IWLWIFI_DEBUG
3089
3090 /*
3091 * The following adds a new attribute to the sysfs representation
3092 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3093 * used for controlling the debug level.
3094 *
3095 * See the level definitions in iwl for details.
3096 *
3097 * The debug_level being managed using sysfs below is a per device debug
3098 * level that is used instead of the global debug level if it (the per
3099 * device debug level) is set.
3100 */
3101 static ssize_t show_debug_level(struct device *d,
3102 struct device_attribute *attr, char *buf)
3103 {
3104 struct iwl_priv *priv = dev_get_drvdata(d);
3105 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3106 }
3107 static ssize_t store_debug_level(struct device *d,
3108 struct device_attribute *attr,
3109 const char *buf, size_t count)
3110 {
3111 struct iwl_priv *priv = dev_get_drvdata(d);
3112 unsigned long val;
3113 int ret;
3114
3115 ret = strict_strtoul(buf, 0, &val);
3116 if (ret)
3117 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3118 else {
3119 priv->debug_level = val;
3120 if (iwl_alloc_traffic_mem(priv))
3121 IWL_ERR(priv,
3122 "Not enough memory to generate traffic log\n");
3123 }
3124 return strnlen(buf, count);
3125 }
3126
3127 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3128 show_debug_level, store_debug_level);
3129
3130
3131 #endif /* CONFIG_IWLWIFI_DEBUG */
3132
3133
3134 static ssize_t show_temperature(struct device *d,
3135 struct device_attribute *attr, char *buf)
3136 {
3137 struct iwl_priv *priv = dev_get_drvdata(d);
3138
3139 if (!iwl_is_alive(priv))
3140 return -EAGAIN;
3141
3142 return sprintf(buf, "%d\n", priv->temperature);
3143 }
3144
3145 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3146
3147 static ssize_t show_tx_power(struct device *d,
3148 struct device_attribute *attr, char *buf)
3149 {
3150 struct iwl_priv *priv = dev_get_drvdata(d);
3151
3152 if (!iwl_is_ready_rf(priv))
3153 return sprintf(buf, "off\n");
3154 else
3155 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3156 }
3157
3158 static ssize_t store_tx_power(struct device *d,
3159 struct device_attribute *attr,
3160 const char *buf, size_t count)
3161 {
3162 struct iwl_priv *priv = dev_get_drvdata(d);
3163 unsigned long val;
3164 int ret;
3165
3166 ret = strict_strtoul(buf, 10, &val);
3167 if (ret)
3168 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3169 else {
3170 ret = iwl_set_tx_power(priv, val, false);
3171 if (ret)
3172 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3173 ret);
3174 else
3175 ret = count;
3176 }
3177 return ret;
3178 }
3179
3180 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3181
3182 static ssize_t show_statistics(struct device *d,
3183 struct device_attribute *attr, char *buf)
3184 {
3185 struct iwl_priv *priv = dev_get_drvdata(d);
3186 u32 size = sizeof(struct iwl_notif_statistics);
3187 u32 len = 0, ofs = 0;
3188 u8 *data = (u8 *)&priv->statistics;
3189 int rc = 0;
3190
3191 if (!iwl_is_alive(priv))
3192 return -EAGAIN;
3193
3194 mutex_lock(&priv->mutex);
3195 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3196 mutex_unlock(&priv->mutex);
3197
3198 if (rc) {
3199 len = sprintf(buf,
3200 "Error sending statistics request: 0x%08X\n", rc);
3201 return len;
3202 }
3203
3204 while (size && (PAGE_SIZE - len)) {
3205 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3206 PAGE_SIZE - len, 1);
3207 len = strlen(buf);
3208 if (PAGE_SIZE - len)
3209 buf[len++] = '\n';
3210
3211 ofs += 16;
3212 size -= min(size, 16U);
3213 }
3214
3215 return len;
3216 }
3217
3218 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3219
3220 static ssize_t show_rts_ht_protection(struct device *d,
3221 struct device_attribute *attr, char *buf)
3222 {
3223 struct iwl_priv *priv = dev_get_drvdata(d);
3224
3225 return sprintf(buf, "%s\n",
3226 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3227 }
3228
3229 static ssize_t store_rts_ht_protection(struct device *d,
3230 struct device_attribute *attr,
3231 const char *buf, size_t count)
3232 {
3233 struct iwl_priv *priv = dev_get_drvdata(d);
3234 unsigned long val;
3235 int ret;
3236
3237 ret = strict_strtoul(buf, 10, &val);
3238 if (ret)
3239 IWL_INFO(priv, "Input is not in decimal form.\n");
3240 else {
3241 if (!iwl_is_associated(priv))
3242 priv->cfg->use_rts_for_ht = val ? true : false;
3243 else
3244 IWL_ERR(priv, "Sta associated with AP - "
3245 "Change protection mechanism is not allowed\n");
3246 ret = count;
3247 }
3248 return ret;
3249 }
3250
3251 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3252 show_rts_ht_protection, store_rts_ht_protection);
3253
3254
3255 /*****************************************************************************
3256 *
3257 * driver setup and teardown
3258 *
3259 *****************************************************************************/
3260
3261 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3262 {
3263 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3264
3265 init_waitqueue_head(&priv->wait_command_queue);
3266
3267 INIT_WORK(&priv->restart, iwl_bg_restart);
3268 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3269 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3270 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3271 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3272 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3273
3274 iwl_setup_scan_deferred_work(priv);
3275
3276 if (priv->cfg->ops->lib->setup_deferred_work)
3277 priv->cfg->ops->lib->setup_deferred_work(priv);
3278
3279 init_timer(&priv->statistics_periodic);
3280 priv->statistics_periodic.data = (unsigned long)priv;
3281 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3282
3283 init_timer(&priv->ucode_trace);
3284 priv->ucode_trace.data = (unsigned long)priv;
3285 priv->ucode_trace.function = iwl_bg_ucode_trace;
3286
3287 if (priv->cfg->ops->lib->recover_from_tx_stall) {
3288 init_timer(&priv->monitor_recover);
3289 priv->monitor_recover.data = (unsigned long)priv;
3290 priv->monitor_recover.function =
3291 priv->cfg->ops->lib->recover_from_tx_stall;
3292 }
3293
3294 if (!priv->cfg->use_isr_legacy)
3295 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3296 iwl_irq_tasklet, (unsigned long)priv);
3297 else
3298 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3299 iwl_irq_tasklet_legacy, (unsigned long)priv);
3300 }
3301
3302 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3303 {
3304 if (priv->cfg->ops->lib->cancel_deferred_work)
3305 priv->cfg->ops->lib->cancel_deferred_work(priv);
3306
3307 cancel_delayed_work_sync(&priv->init_alive_start);
3308 cancel_delayed_work(&priv->scan_check);
3309 cancel_delayed_work(&priv->alive_start);
3310 cancel_work_sync(&priv->beacon_update);
3311 del_timer_sync(&priv->statistics_periodic);
3312 del_timer_sync(&priv->ucode_trace);
3313 if (priv->cfg->ops->lib->recover_from_tx_stall)
3314 del_timer_sync(&priv->monitor_recover);
3315 }
3316
3317 static void iwl_init_hw_rates(struct iwl_priv *priv,
3318 struct ieee80211_rate *rates)
3319 {
3320 int i;
3321
3322 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3323 rates[i].bitrate = iwl_rates[i].ieee * 5;
3324 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3325 rates[i].hw_value_short = i;
3326 rates[i].flags = 0;
3327 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3328 /*
3329 * If CCK != 1M then set short preamble rate flag.
3330 */
3331 rates[i].flags |=
3332 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3333 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3334 }
3335 }
3336 }
3337
3338 static int iwl_init_drv(struct iwl_priv *priv)
3339 {
3340 int ret;
3341
3342 priv->ibss_beacon = NULL;
3343
3344 spin_lock_init(&priv->sta_lock);
3345 spin_lock_init(&priv->hcmd_lock);
3346
3347 INIT_LIST_HEAD(&priv->free_frames);
3348
3349 mutex_init(&priv->mutex);
3350 mutex_init(&priv->sync_cmd_mutex);
3351
3352 priv->ieee_channels = NULL;
3353 priv->ieee_rates = NULL;
3354 priv->band = IEEE80211_BAND_2GHZ;
3355
3356 priv->iw_mode = NL80211_IFTYPE_STATION;
3357 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3358 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3359 priv->_agn.agg_tids_count = 0;
3360
3361 /* initialize force reset */
3362 priv->force_reset[IWL_RF_RESET].reset_duration =
3363 IWL_DELAY_NEXT_FORCE_RF_RESET;
3364 priv->force_reset[IWL_FW_RESET].reset_duration =
3365 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3366
3367 /* Choose which receivers/antennas to use */
3368 if (priv->cfg->ops->hcmd->set_rxon_chain)
3369 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3370
3371 iwl_init_scan_params(priv);
3372
3373 /* Set the tx_power_user_lmt to the lowest power level
3374 * this value will get overwritten by channel max power avg
3375 * from eeprom */
3376 priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3377
3378 ret = iwl_init_channel_map(priv);
3379 if (ret) {
3380 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3381 goto err;
3382 }
3383
3384 ret = iwlcore_init_geos(priv);
3385 if (ret) {
3386 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3387 goto err_free_channel_map;
3388 }
3389 iwl_init_hw_rates(priv, priv->ieee_rates);
3390
3391 return 0;
3392
3393 err_free_channel_map:
3394 iwl_free_channel_map(priv);
3395 err:
3396 return ret;
3397 }
3398
3399 static void iwl_uninit_drv(struct iwl_priv *priv)
3400 {
3401 iwl_calib_free_results(priv);
3402 iwlcore_free_geos(priv);
3403 iwl_free_channel_map(priv);
3404 kfree(priv->scan);
3405 }
3406
3407 static struct attribute *iwl_sysfs_entries[] = {
3408 &dev_attr_statistics.attr,
3409 &dev_attr_temperature.attr,
3410 &dev_attr_tx_power.attr,
3411 &dev_attr_rts_ht_protection.attr,
3412 #ifdef CONFIG_IWLWIFI_DEBUG
3413 &dev_attr_debug_level.attr,
3414 #endif
3415 NULL
3416 };
3417
3418 static struct attribute_group iwl_attribute_group = {
3419 .name = NULL, /* put in device directory */
3420 .attrs = iwl_sysfs_entries,
3421 };
3422
3423 static struct ieee80211_ops iwl_hw_ops = {
3424 .tx = iwl_mac_tx,
3425 .start = iwl_mac_start,
3426 .stop = iwl_mac_stop,
3427 .add_interface = iwl_mac_add_interface,
3428 .remove_interface = iwl_mac_remove_interface,
3429 .config = iwl_mac_config,
3430 .configure_filter = iwl_configure_filter,
3431 .set_key = iwl_mac_set_key,
3432 .update_tkip_key = iwl_mac_update_tkip_key,
3433 .get_stats = iwl_mac_get_stats,
3434 .conf_tx = iwl_mac_conf_tx,
3435 .reset_tsf = iwl_mac_reset_tsf,
3436 .bss_info_changed = iwl_bss_info_changed,
3437 .ampdu_action = iwl_mac_ampdu_action,
3438 .hw_scan = iwl_mac_hw_scan,
3439 .sta_notify = iwl_mac_sta_notify,
3440 .sta_add = iwlagn_mac_sta_add,
3441 .sta_remove = iwl_mac_sta_remove,
3442 };
3443
3444 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3445 {
3446 int err = 0;
3447 struct iwl_priv *priv;
3448 struct ieee80211_hw *hw;
3449 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3450 unsigned long flags;
3451 u16 pci_cmd;
3452
3453 /************************
3454 * 1. Allocating HW data
3455 ************************/
3456
3457 /* Disabling hardware scan means that mac80211 will perform scans
3458 * "the hard way", rather than using device's scan. */
3459 if (cfg->mod_params->disable_hw_scan) {
3460 if (iwl_debug_level & IWL_DL_INFO)
3461 dev_printk(KERN_DEBUG, &(pdev->dev),
3462 "Disabling hw_scan\n");
3463 iwl_hw_ops.hw_scan = NULL;
3464 }
3465
3466 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3467 if (!hw) {
3468 err = -ENOMEM;
3469 goto out;
3470 }
3471 priv = hw->priv;
3472 /* At this point both hw and priv are allocated. */
3473
3474 SET_IEEE80211_DEV(hw, &pdev->dev);
3475
3476 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3477 priv->cfg = cfg;
3478 priv->pci_dev = pdev;
3479 priv->inta_mask = CSR_INI_SET_MASK;
3480
3481 #ifdef CONFIG_IWLWIFI_DEBUG
3482 atomic_set(&priv->restrict_refcnt, 0);
3483 #endif
3484 if (iwl_alloc_traffic_mem(priv))
3485 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3486
3487 /**************************
3488 * 2. Initializing PCI bus
3489 **************************/
3490 if (pci_enable_device(pdev)) {
3491 err = -ENODEV;
3492 goto out_ieee80211_free_hw;
3493 }
3494
3495 pci_set_master(pdev);
3496
3497 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3498 if (!err)
3499 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3500 if (err) {
3501 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3502 if (!err)
3503 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3504 /* both attempts failed: */
3505 if (err) {
3506 IWL_WARN(priv, "No suitable DMA available.\n");
3507 goto out_pci_disable_device;
3508 }
3509 }
3510
3511 err = pci_request_regions(pdev, DRV_NAME);
3512 if (err)
3513 goto out_pci_disable_device;
3514
3515 pci_set_drvdata(pdev, priv);
3516
3517
3518 /***********************
3519 * 3. Read REV register
3520 ***********************/
3521 priv->hw_base = pci_iomap(pdev, 0, 0);
3522 if (!priv->hw_base) {
3523 err = -ENODEV;
3524 goto out_pci_release_regions;
3525 }
3526
3527 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3528 (unsigned long long) pci_resource_len(pdev, 0));
3529 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3530
3531 /* these spin locks will be used in apm_ops.init and EEPROM access
3532 * we should init now
3533 */
3534 spin_lock_init(&priv->reg_lock);
3535 spin_lock_init(&priv->lock);
3536
3537 /*
3538 * stop and reset the on-board processor just in case it is in a
3539 * strange state ... like being left stranded by a primary kernel
3540 * and this is now the kdump kernel trying to start up
3541 */
3542 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3543
3544 iwl_hw_detect(priv);
3545 IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3546 priv->cfg->name, priv->hw_rev);
3547
3548 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3549 * PCI Tx retries from interfering with C3 CPU state */
3550 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3551
3552 iwl_prepare_card_hw(priv);
3553 if (!priv->hw_ready) {
3554 IWL_WARN(priv, "Failed, HW not ready\n");
3555 goto out_iounmap;
3556 }
3557
3558 /*****************
3559 * 4. Read EEPROM
3560 *****************/
3561 /* Read the EEPROM */
3562 err = iwl_eeprom_init(priv);
3563 if (err) {
3564 IWL_ERR(priv, "Unable to init EEPROM\n");
3565 goto out_iounmap;
3566 }
3567 err = iwl_eeprom_check_version(priv);
3568 if (err)
3569 goto out_free_eeprom;
3570
3571 /* extract MAC Address */
3572 iwl_eeprom_get_mac(priv, priv->mac_addr);
3573 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3574 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3575
3576 /************************
3577 * 5. Setup HW constants
3578 ************************/
3579 if (iwl_set_hw_params(priv)) {
3580 IWL_ERR(priv, "failed to set hw parameters\n");
3581 goto out_free_eeprom;
3582 }
3583
3584 /*******************
3585 * 6. Setup priv
3586 *******************/
3587
3588 err = iwl_init_drv(priv);
3589 if (err)
3590 goto out_free_eeprom;
3591 /* At this point both hw and priv are initialized. */
3592
3593 /********************
3594 * 7. Setup services
3595 ********************/
3596 spin_lock_irqsave(&priv->lock, flags);
3597 iwl_disable_interrupts(priv);
3598 spin_unlock_irqrestore(&priv->lock, flags);
3599
3600 pci_enable_msi(priv->pci_dev);
3601
3602 iwl_alloc_isr_ict(priv);
3603 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3604 IRQF_SHARED, DRV_NAME, priv);
3605 if (err) {
3606 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3607 goto out_disable_msi;
3608 }
3609 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3610 if (err) {
3611 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3612 goto out_free_irq;
3613 }
3614
3615 iwl_setup_deferred_work(priv);
3616 iwl_setup_rx_handlers(priv);
3617
3618 /*********************************************
3619 * 8. Enable interrupts and read RFKILL state
3620 *********************************************/
3621
3622 /* enable interrupts if needed: hw bug w/a */
3623 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3624 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3625 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3626 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3627 }
3628
3629 iwl_enable_interrupts(priv);
3630
3631 /* If platform's RF_KILL switch is NOT set to KILL */
3632 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3633 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3634 else
3635 set_bit(STATUS_RF_KILL_HW, &priv->status);
3636
3637 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3638 test_bit(STATUS_RF_KILL_HW, &priv->status));
3639
3640 iwl_power_initialize(priv);
3641 iwl_tt_initialize(priv);
3642
3643 err = iwl_request_firmware(priv, true);
3644 if (err)
3645 goto out_remove_sysfs;
3646
3647 return 0;
3648
3649 out_remove_sysfs:
3650 destroy_workqueue(priv->workqueue);
3651 priv->workqueue = NULL;
3652 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3653 out_free_irq:
3654 free_irq(priv->pci_dev->irq, priv);
3655 iwl_free_isr_ict(priv);
3656 out_disable_msi:
3657 pci_disable_msi(priv->pci_dev);
3658 iwl_uninit_drv(priv);
3659 out_free_eeprom:
3660 iwl_eeprom_free(priv);
3661 out_iounmap:
3662 pci_iounmap(pdev, priv->hw_base);
3663 out_pci_release_regions:
3664 pci_set_drvdata(pdev, NULL);
3665 pci_release_regions(pdev);
3666 out_pci_disable_device:
3667 pci_disable_device(pdev);
3668 out_ieee80211_free_hw:
3669 iwl_free_traffic_mem(priv);
3670 ieee80211_free_hw(priv->hw);
3671 out:
3672 return err;
3673 }
3674
3675 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3676 {
3677 struct iwl_priv *priv = pci_get_drvdata(pdev);
3678 unsigned long flags;
3679
3680 if (!priv)
3681 return;
3682
3683 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3684
3685 iwl_dbgfs_unregister(priv);
3686 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3687
3688 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3689 * to be called and iwl_down since we are removing the device
3690 * we need to set STATUS_EXIT_PENDING bit.
3691 */
3692 set_bit(STATUS_EXIT_PENDING, &priv->status);
3693 if (priv->mac80211_registered) {
3694 ieee80211_unregister_hw(priv->hw);
3695 priv->mac80211_registered = 0;
3696 } else {
3697 iwl_down(priv);
3698 }
3699
3700 /*
3701 * Make sure device is reset to low power before unloading driver.
3702 * This may be redundant with iwl_down(), but there are paths to
3703 * run iwl_down() without calling apm_ops.stop(), and there are
3704 * paths to avoid running iwl_down() at all before leaving driver.
3705 * This (inexpensive) call *makes sure* device is reset.
3706 */
3707 priv->cfg->ops->lib->apm_ops.stop(priv);
3708
3709 iwl_tt_exit(priv);
3710
3711 /* make sure we flush any pending irq or
3712 * tasklet for the driver
3713 */
3714 spin_lock_irqsave(&priv->lock, flags);
3715 iwl_disable_interrupts(priv);
3716 spin_unlock_irqrestore(&priv->lock, flags);
3717
3718 iwl_synchronize_irq(priv);
3719
3720 iwl_dealloc_ucode_pci(priv);
3721
3722 if (priv->rxq.bd)
3723 iwlagn_rx_queue_free(priv, &priv->rxq);
3724 iwlagn_hw_txq_ctx_free(priv);
3725
3726 iwl_eeprom_free(priv);
3727
3728
3729 /*netif_stop_queue(dev); */
3730 flush_workqueue(priv->workqueue);
3731
3732 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3733 * priv->workqueue... so we can't take down the workqueue
3734 * until now... */
3735 destroy_workqueue(priv->workqueue);
3736 priv->workqueue = NULL;
3737 iwl_free_traffic_mem(priv);
3738
3739 free_irq(priv->pci_dev->irq, priv);
3740 pci_disable_msi(priv->pci_dev);
3741 pci_iounmap(pdev, priv->hw_base);
3742 pci_release_regions(pdev);
3743 pci_disable_device(pdev);
3744 pci_set_drvdata(pdev, NULL);
3745
3746 iwl_uninit_drv(priv);
3747
3748 iwl_free_isr_ict(priv);
3749
3750 if (priv->ibss_beacon)
3751 dev_kfree_skb(priv->ibss_beacon);
3752
3753 ieee80211_free_hw(priv->hw);
3754 }
3755
3756
3757 /*****************************************************************************
3758 *
3759 * driver and module entry point
3760 *
3761 *****************************************************************************/
3762
3763 /* Hardware specific file defines the PCI IDs table for that hardware module */
3764 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3765 #ifdef CONFIG_IWL4965
3766 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3767 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3768 #endif /* CONFIG_IWL4965 */
3769 #ifdef CONFIG_IWL5000
3770 /* 5100 Series WiFi */
3771 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3772 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3773 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3774 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3775 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3776 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3777 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3778 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3779 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3780 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3781 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3782 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3783 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3784 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3785 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3786 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3787 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3788 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3789 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3790 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3791 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3792 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3793 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3794 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3795
3796 /* 5300 Series WiFi */
3797 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3798 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3799 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3800 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3801 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3802 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3803 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3804 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3805 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3806 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3807 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3808 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3809
3810 /* 5350 Series WiFi/WiMax */
3811 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3812 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3813 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3814
3815 /* 5150 Series Wifi/WiMax */
3816 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3817 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3818 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3819 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3820 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3821 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3822
3823 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3824 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3825 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3826 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3827
3828 /* 6x00 Series */
3829 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3830 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3831 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3832 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3833 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3834 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3835 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3836 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3837 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3838 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3839 {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000i_g2_2agn_cfg)},
3840
3841 /* 6x50 WiFi/WiMax Series */
3842 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3843 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3844 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3845 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3846 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3847 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3848
3849 /* 1000 Series WiFi */
3850 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3851 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3852 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3853 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3854 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3855 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3856 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3857 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3858 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3859 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3860 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3861 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3862 #endif /* CONFIG_IWL5000 */
3863
3864 {0}
3865 };
3866 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3867
3868 static struct pci_driver iwl_driver = {
3869 .name = DRV_NAME,
3870 .id_table = iwl_hw_card_ids,
3871 .probe = iwl_pci_probe,
3872 .remove = __devexit_p(iwl_pci_remove),
3873 #ifdef CONFIG_PM
3874 .suspend = iwl_pci_suspend,
3875 .resume = iwl_pci_resume,
3876 #endif
3877 };
3878
3879 static int __init iwl_init(void)
3880 {
3881
3882 int ret;
3883 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3884 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3885
3886 ret = iwlagn_rate_control_register();
3887 if (ret) {
3888 printk(KERN_ERR DRV_NAME
3889 "Unable to register rate control algorithm: %d\n", ret);
3890 return ret;
3891 }
3892
3893 ret = pci_register_driver(&iwl_driver);
3894 if (ret) {
3895 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3896 goto error_register;
3897 }
3898
3899 return ret;
3900
3901 error_register:
3902 iwlagn_rate_control_unregister();
3903 return ret;
3904 }
3905
3906 static void __exit iwl_exit(void)
3907 {
3908 pci_unregister_driver(&iwl_driver);
3909 iwlagn_rate_control_unregister();
3910 }
3911
3912 module_exit(iwl_exit);
3913 module_init(iwl_init);
3914
3915 #ifdef CONFIG_IWLWIFI_DEBUG
3916 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3917 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3918 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3919 MODULE_PARM_DESC(debug, "debug output mask");
3920 #endif
3921
3922 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
3923 MODULE_PARM_DESC(swcrypto50,
3924 "using crypto in software (default 0 [hardware]) (deprecated)");
3925 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
3926 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
3927 module_param_named(queues_num50,
3928 iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3929 MODULE_PARM_DESC(queues_num50,
3930 "number of hw queues in 50xx series (deprecated)");
3931 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3932 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3933 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3934 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
3935 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3936 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
3937 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
3938 int, S_IRUGO);
3939 MODULE_PARM_DESC(amsdu_size_8K50,
3940 "enable 8K amsdu size in 50XX series (deprecated)");
3941 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
3942 int, S_IRUGO);
3943 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3944 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3945 MODULE_PARM_DESC(fw_restart50,
3946 "restart firmware in case of error (deprecated)");
3947 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3948 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3949 module_param_named(
3950 disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
3951 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
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