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iwlwifi: correct return code for log_event
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #define DRV_NAME "iwlagn"
49
50 #include "iwl-eeprom.h"
51 #include "iwl-dev.h"
52 #include "iwl-core.h"
53 #include "iwl-io.h"
54 #include "iwl-helpers.h"
55 #include "iwl-sta.h"
56 #include "iwl-calib.h"
57
58
59 /******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65 /*
66 * module name, copyright, version, etc.
67 */
68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
69
70 #ifdef CONFIG_IWLWIFI_DEBUG
71 #define VD "d"
72 #else
73 #define VD
74 #endif
75
76 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
77 #define VS "s"
78 #else
79 #define VS
80 #endif
81
82 #define DRV_VERSION IWLWIFI_VERSION VD VS
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89 MODULE_ALIAS("iwl4965");
90
91 /*************** STATION TABLE MANAGEMENT ****
92 * mac80211 should be examined to determine if sta_info is duplicating
93 * the functionality provided here
94 */
95
96 /**************************************************************/
97
98 /**
99 * iwl_commit_rxon - commit staging_rxon to hardware
100 *
101 * The RXON command in staging_rxon is committed to the hardware and
102 * the active_rxon structure is updated with the new data. This
103 * function correctly transitions out of the RXON_ASSOC_MSK state if
104 * a HW tune is required based on the RXON structure changes.
105 */
106 int iwl_commit_rxon(struct iwl_priv *priv)
107 {
108 /* cast away the const for active_rxon in this function */
109 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
110 int ret;
111 bool new_assoc =
112 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
113
114 if (!iwl_is_alive(priv))
115 return -EBUSY;
116
117 /* always get timestamp with Rx frame */
118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
119
120 ret = iwl_check_rxon_cmd(priv);
121 if (ret) {
122 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
123 return -EINVAL;
124 }
125
126 /*
127 * receive commit_rxon request
128 * abort any previous channel switch if still in process
129 */
130 if (priv->switch_rxon.switch_in_progress &&
131 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
132 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
133 le16_to_cpu(priv->switch_rxon.channel));
134 priv->switch_rxon.switch_in_progress = false;
135 }
136
137 /* If we don't need to send a full RXON, we can use
138 * iwl_rxon_assoc_cmd which is used to reconfigure filter
139 * and other flags for the current radio configuration. */
140 if (!iwl_full_rxon_required(priv)) {
141 ret = iwl_send_rxon_assoc(priv);
142 if (ret) {
143 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
144 return ret;
145 }
146
147 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
148 iwl_print_rx_config_cmd(priv);
149 return 0;
150 }
151
152 /* station table will be cleared */
153 priv->assoc_station_added = 0;
154
155 /* If we are currently associated and the new config requires
156 * an RXON_ASSOC and the new config wants the associated mask enabled,
157 * we must clear the associated from the active configuration
158 * before we apply the new config */
159 if (iwl_is_associated(priv) && new_assoc) {
160 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
161 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
162
163 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
164 sizeof(struct iwl_rxon_cmd),
165 &priv->active_rxon);
166
167 /* If the mask clearing failed then we set
168 * active_rxon back to what it was previously */
169 if (ret) {
170 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
171 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
172 return ret;
173 }
174 }
175
176 IWL_DEBUG_INFO(priv, "Sending RXON\n"
177 "* with%s RXON_FILTER_ASSOC_MSK\n"
178 "* channel = %d\n"
179 "* bssid = %pM\n",
180 (new_assoc ? "" : "out"),
181 le16_to_cpu(priv->staging_rxon.channel),
182 priv->staging_rxon.bssid_addr);
183
184 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
185
186 /* Apply the new configuration
187 * RXON unassoc clears the station table in uCode, send it before
188 * we add the bcast station. If assoc bit is set, we will send RXON
189 * after having added the bcast and bssid station.
190 */
191 if (!new_assoc) {
192 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
193 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
194 if (ret) {
195 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
196 return ret;
197 }
198 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
199 }
200
201 iwl_clear_stations_table(priv);
202
203 priv->start_calib = 0;
204
205 /* Add the broadcast address so we can send broadcast frames */
206 iwl_add_bcast_station(priv);
207
208 /* If we have set the ASSOC_MSK and we are in BSS mode then
209 * add the IWL_AP_ID to the station rate table */
210 if (new_assoc) {
211 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
212 ret = iwl_rxon_add_station(priv,
213 priv->active_rxon.bssid_addr, 1);
214 if (ret == IWL_INVALID_STATION) {
215 IWL_ERR(priv,
216 "Error adding AP address for TX.\n");
217 return -EIO;
218 }
219 priv->assoc_station_added = 1;
220 if (priv->default_wep_key &&
221 iwl_send_static_wepkey_cmd(priv, 0))
222 IWL_ERR(priv,
223 "Could not send WEP static key.\n");
224 }
225
226 /*
227 * allow CTS-to-self if possible for new association.
228 * this is relevant only for 5000 series and up,
229 * but will not damage 4965
230 */
231 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
232
233 /* Apply the new configuration
234 * RXON assoc doesn't clear the station table in uCode,
235 */
236 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
237 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
238 if (ret) {
239 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
240 return ret;
241 }
242 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
243 }
244 iwl_print_rx_config_cmd(priv);
245
246 iwl_init_sensitivity(priv);
247
248 /* If we issue a new RXON command which required a tune then we must
249 * send a new TXPOWER command or we won't be able to Tx any frames */
250 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
251 if (ret) {
252 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
253 return ret;
254 }
255
256 return 0;
257 }
258
259 void iwl_update_chain_flags(struct iwl_priv *priv)
260 {
261
262 if (priv->cfg->ops->hcmd->set_rxon_chain)
263 priv->cfg->ops->hcmd->set_rxon_chain(priv);
264 iwlcore_commit_rxon(priv);
265 }
266
267 static void iwl_clear_free_frames(struct iwl_priv *priv)
268 {
269 struct list_head *element;
270
271 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
272 priv->frames_count);
273
274 while (!list_empty(&priv->free_frames)) {
275 element = priv->free_frames.next;
276 list_del(element);
277 kfree(list_entry(element, struct iwl_frame, list));
278 priv->frames_count--;
279 }
280
281 if (priv->frames_count) {
282 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
283 priv->frames_count);
284 priv->frames_count = 0;
285 }
286 }
287
288 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
289 {
290 struct iwl_frame *frame;
291 struct list_head *element;
292 if (list_empty(&priv->free_frames)) {
293 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
294 if (!frame) {
295 IWL_ERR(priv, "Could not allocate frame!\n");
296 return NULL;
297 }
298
299 priv->frames_count++;
300 return frame;
301 }
302
303 element = priv->free_frames.next;
304 list_del(element);
305 return list_entry(element, struct iwl_frame, list);
306 }
307
308 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
309 {
310 memset(frame, 0, sizeof(*frame));
311 list_add(&frame->list, &priv->free_frames);
312 }
313
314 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
315 struct ieee80211_hdr *hdr,
316 int left)
317 {
318 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
319 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
320 (priv->iw_mode != NL80211_IFTYPE_AP)))
321 return 0;
322
323 if (priv->ibss_beacon->len > left)
324 return 0;
325
326 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
327
328 return priv->ibss_beacon->len;
329 }
330
331 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
332 static void iwl_set_beacon_tim(struct iwl_priv *priv,
333 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
334 u8 *beacon, u32 frame_size)
335 {
336 u16 tim_idx;
337 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
338
339 /*
340 * The index is relative to frame start but we start looking at the
341 * variable-length part of the beacon.
342 */
343 tim_idx = mgmt->u.beacon.variable - beacon;
344
345 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
346 while ((tim_idx < (frame_size - 2)) &&
347 (beacon[tim_idx] != WLAN_EID_TIM))
348 tim_idx += beacon[tim_idx+1] + 2;
349
350 /* If TIM field was found, set variables */
351 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
352 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
353 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
354 } else
355 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
356 }
357
358 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
359 struct iwl_frame *frame)
360 {
361 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
362 u32 frame_size;
363 u32 rate_flags;
364 u32 rate;
365 /*
366 * We have to set up the TX command, the TX Beacon command, and the
367 * beacon contents.
368 */
369
370 /* Initialize memory */
371 tx_beacon_cmd = &frame->u.beacon;
372 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
373
374 /* Set up TX beacon contents */
375 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
376 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
377 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
378 return 0;
379
380 /* Set up TX command fields */
381 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
382 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
383 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
384 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
385 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
386
387 /* Set up TX beacon command fields */
388 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
389 frame_size);
390
391 /* Set up packet rate and flags */
392 rate = iwl_rate_get_lowest_plcp(priv);
393 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
394 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
395 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
396 rate_flags |= RATE_MCS_CCK_MSK;
397 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
398 rate_flags);
399
400 return sizeof(*tx_beacon_cmd) + frame_size;
401 }
402 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
403 {
404 struct iwl_frame *frame;
405 unsigned int frame_size;
406 int rc;
407
408 frame = iwl_get_free_frame(priv);
409 if (!frame) {
410 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
411 "command.\n");
412 return -ENOMEM;
413 }
414
415 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
416 if (!frame_size) {
417 IWL_ERR(priv, "Error configuring the beacon command\n");
418 iwl_free_frame(priv, frame);
419 return -EINVAL;
420 }
421
422 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
423 &frame->u.cmd[0]);
424
425 iwl_free_frame(priv, frame);
426
427 return rc;
428 }
429
430 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
431 {
432 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
433
434 dma_addr_t addr = get_unaligned_le32(&tb->lo);
435 if (sizeof(dma_addr_t) > sizeof(u32))
436 addr |=
437 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
438
439 return addr;
440 }
441
442 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
443 {
444 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
445
446 return le16_to_cpu(tb->hi_n_len) >> 4;
447 }
448
449 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
450 dma_addr_t addr, u16 len)
451 {
452 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
453 u16 hi_n_len = len << 4;
454
455 put_unaligned_le32(addr, &tb->lo);
456 if (sizeof(dma_addr_t) > sizeof(u32))
457 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
458
459 tb->hi_n_len = cpu_to_le16(hi_n_len);
460
461 tfd->num_tbs = idx + 1;
462 }
463
464 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
465 {
466 return tfd->num_tbs & 0x1f;
467 }
468
469 /**
470 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
471 * @priv - driver private data
472 * @txq - tx queue
473 *
474 * Does NOT advance any TFD circular buffer read/write indexes
475 * Does NOT free the TFD itself (which is within circular buffer)
476 */
477 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
478 {
479 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
480 struct iwl_tfd *tfd;
481 struct pci_dev *dev = priv->pci_dev;
482 int index = txq->q.read_ptr;
483 int i;
484 int num_tbs;
485
486 tfd = &tfd_tmp[index];
487
488 /* Sanity check on number of chunks */
489 num_tbs = iwl_tfd_get_num_tbs(tfd);
490
491 if (num_tbs >= IWL_NUM_OF_TBS) {
492 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
493 /* @todo issue fatal error, it is quite serious situation */
494 return;
495 }
496
497 /* Unmap tx_cmd */
498 if (num_tbs)
499 pci_unmap_single(dev,
500 pci_unmap_addr(&txq->meta[index], mapping),
501 pci_unmap_len(&txq->meta[index], len),
502 PCI_DMA_BIDIRECTIONAL);
503
504 /* Unmap chunks, if any. */
505 for (i = 1; i < num_tbs; i++) {
506 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
507 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
508
509 if (txq->txb) {
510 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
511 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
512 }
513 }
514 }
515
516 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
517 struct iwl_tx_queue *txq,
518 dma_addr_t addr, u16 len,
519 u8 reset, u8 pad)
520 {
521 struct iwl_queue *q;
522 struct iwl_tfd *tfd, *tfd_tmp;
523 u32 num_tbs;
524
525 q = &txq->q;
526 tfd_tmp = (struct iwl_tfd *)txq->tfds;
527 tfd = &tfd_tmp[q->write_ptr];
528
529 if (reset)
530 memset(tfd, 0, sizeof(*tfd));
531
532 num_tbs = iwl_tfd_get_num_tbs(tfd);
533
534 /* Each TFD can point to a maximum 20 Tx buffers */
535 if (num_tbs >= IWL_NUM_OF_TBS) {
536 IWL_ERR(priv, "Error can not send more than %d chunks\n",
537 IWL_NUM_OF_TBS);
538 return -EINVAL;
539 }
540
541 BUG_ON(addr & ~DMA_BIT_MASK(36));
542 if (unlikely(addr & ~IWL_TX_DMA_MASK))
543 IWL_ERR(priv, "Unaligned address = %llx\n",
544 (unsigned long long)addr);
545
546 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
547
548 return 0;
549 }
550
551 /*
552 * Tell nic where to find circular buffer of Tx Frame Descriptors for
553 * given Tx queue, and enable the DMA channel used for that queue.
554 *
555 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
556 * channels supported in hardware.
557 */
558 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
559 struct iwl_tx_queue *txq)
560 {
561 int txq_id = txq->q.id;
562
563 /* Circular buffer (TFD queue in DRAM) physical base address */
564 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
565 txq->q.dma_addr >> 8);
566
567 return 0;
568 }
569
570 /******************************************************************************
571 *
572 * Generic RX handler implementations
573 *
574 ******************************************************************************/
575 static void iwl_rx_reply_alive(struct iwl_priv *priv,
576 struct iwl_rx_mem_buffer *rxb)
577 {
578 struct iwl_rx_packet *pkt = rxb_addr(rxb);
579 struct iwl_alive_resp *palive;
580 struct delayed_work *pwork;
581
582 palive = &pkt->u.alive_frame;
583
584 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
585 "0x%01X 0x%01X\n",
586 palive->is_valid, palive->ver_type,
587 palive->ver_subtype);
588
589 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
590 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
591 memcpy(&priv->card_alive_init,
592 &pkt->u.alive_frame,
593 sizeof(struct iwl_init_alive_resp));
594 pwork = &priv->init_alive_start;
595 } else {
596 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
597 memcpy(&priv->card_alive, &pkt->u.alive_frame,
598 sizeof(struct iwl_alive_resp));
599 pwork = &priv->alive_start;
600 }
601
602 /* We delay the ALIVE response by 5ms to
603 * give the HW RF Kill time to activate... */
604 if (palive->is_valid == UCODE_VALID_OK)
605 queue_delayed_work(priv->workqueue, pwork,
606 msecs_to_jiffies(5));
607 else
608 IWL_WARN(priv, "uCode did not respond OK.\n");
609 }
610
611 static void iwl_bg_beacon_update(struct work_struct *work)
612 {
613 struct iwl_priv *priv =
614 container_of(work, struct iwl_priv, beacon_update);
615 struct sk_buff *beacon;
616
617 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
618 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
619
620 if (!beacon) {
621 IWL_ERR(priv, "update beacon failed\n");
622 return;
623 }
624
625 mutex_lock(&priv->mutex);
626 /* new beacon skb is allocated every time; dispose previous.*/
627 if (priv->ibss_beacon)
628 dev_kfree_skb(priv->ibss_beacon);
629
630 priv->ibss_beacon = beacon;
631 mutex_unlock(&priv->mutex);
632
633 iwl_send_beacon_cmd(priv);
634 }
635
636 /**
637 * iwl_bg_statistics_periodic - Timer callback to queue statistics
638 *
639 * This callback is provided in order to send a statistics request.
640 *
641 * This timer function is continually reset to execute within
642 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
643 * was received. We need to ensure we receive the statistics in order
644 * to update the temperature used for calibrating the TXPOWER.
645 */
646 static void iwl_bg_statistics_periodic(unsigned long data)
647 {
648 struct iwl_priv *priv = (struct iwl_priv *)data;
649
650 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
651 return;
652
653 /* dont send host command if rf-kill is on */
654 if (!iwl_is_ready_rf(priv))
655 return;
656
657 iwl_send_statistics_request(priv, CMD_ASYNC, false);
658 }
659
660
661 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
662 u32 start_idx, u32 num_events,
663 u32 mode)
664 {
665 u32 i;
666 u32 ptr; /* SRAM byte address of log data */
667 u32 ev, time, data; /* event log data */
668 unsigned long reg_flags;
669
670 if (mode == 0)
671 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
672 else
673 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
674
675 /* Make sure device is powered up for SRAM reads */
676 spin_lock_irqsave(&priv->reg_lock, reg_flags);
677 if (iwl_grab_nic_access(priv)) {
678 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
679 return;
680 }
681
682 /* Set starting address; reads will auto-increment */
683 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
684 rmb();
685
686 /*
687 * "time" is actually "data" for mode 0 (no timestamp).
688 * place event id # at far right for easier visual parsing.
689 */
690 for (i = 0; i < num_events; i++) {
691 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
692 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
693 if (mode == 0) {
694 trace_iwlwifi_dev_ucode_cont_event(priv,
695 0, time, ev);
696 } else {
697 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
698 trace_iwlwifi_dev_ucode_cont_event(priv,
699 time, data, ev);
700 }
701 }
702 /* Allow device to power down */
703 iwl_release_nic_access(priv);
704 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
705 }
706
707 void iwl_continuous_event_trace(struct iwl_priv *priv)
708 {
709 u32 capacity; /* event log capacity in # entries */
710 u32 base; /* SRAM byte address of event log header */
711 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
712 u32 num_wraps; /* # times uCode wrapped to top of log */
713 u32 next_entry; /* index of next entry to be written by uCode */
714
715 if (priv->ucode_type == UCODE_INIT)
716 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
717 else
718 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
719 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
720 capacity = iwl_read_targ_mem(priv, base);
721 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
722 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
723 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
724 } else
725 return;
726
727 if (num_wraps == priv->event_log.num_wraps) {
728 iwl_print_cont_event_trace(priv,
729 base, priv->event_log.next_entry,
730 next_entry - priv->event_log.next_entry,
731 mode);
732 priv->event_log.non_wraps_count++;
733 } else {
734 if ((num_wraps - priv->event_log.num_wraps) > 1)
735 priv->event_log.wraps_more_count++;
736 else
737 priv->event_log.wraps_once_count++;
738 trace_iwlwifi_dev_ucode_wrap_event(priv,
739 num_wraps - priv->event_log.num_wraps,
740 next_entry, priv->event_log.next_entry);
741 if (next_entry < priv->event_log.next_entry) {
742 iwl_print_cont_event_trace(priv, base,
743 priv->event_log.next_entry,
744 capacity - priv->event_log.next_entry,
745 mode);
746
747 iwl_print_cont_event_trace(priv, base, 0,
748 next_entry, mode);
749 } else {
750 iwl_print_cont_event_trace(priv, base,
751 next_entry, capacity - next_entry,
752 mode);
753
754 iwl_print_cont_event_trace(priv, base, 0,
755 next_entry, mode);
756 }
757 }
758 priv->event_log.num_wraps = num_wraps;
759 priv->event_log.next_entry = next_entry;
760 }
761
762 /**
763 * iwl_bg_ucode_trace - Timer callback to log ucode event
764 *
765 * The timer is continually set to execute every
766 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
767 * this function is to perform continuous uCode event logging operation
768 * if enabled
769 */
770 static void iwl_bg_ucode_trace(unsigned long data)
771 {
772 struct iwl_priv *priv = (struct iwl_priv *)data;
773
774 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
775 return;
776
777 if (priv->event_log.ucode_trace) {
778 iwl_continuous_event_trace(priv);
779 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
780 mod_timer(&priv->ucode_trace,
781 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
782 }
783 }
784
785 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
786 struct iwl_rx_mem_buffer *rxb)
787 {
788 #ifdef CONFIG_IWLWIFI_DEBUG
789 struct iwl_rx_packet *pkt = rxb_addr(rxb);
790 struct iwl4965_beacon_notif *beacon =
791 (struct iwl4965_beacon_notif *)pkt->u.raw;
792 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
793
794 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
795 "tsf %d %d rate %d\n",
796 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
797 beacon->beacon_notify_hdr.failure_frame,
798 le32_to_cpu(beacon->ibss_mgr_status),
799 le32_to_cpu(beacon->high_tsf),
800 le32_to_cpu(beacon->low_tsf), rate);
801 #endif
802
803 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
804 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
805 queue_work(priv->workqueue, &priv->beacon_update);
806 }
807
808 /* Handle notification from uCode that card's power state is changing
809 * due to software, hardware, or critical temperature RFKILL */
810 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
811 struct iwl_rx_mem_buffer *rxb)
812 {
813 struct iwl_rx_packet *pkt = rxb_addr(rxb);
814 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
815 unsigned long status = priv->status;
816
817 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
818 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
819 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
820 (flags & CT_CARD_DISABLED) ?
821 "Reached" : "Not reached");
822
823 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
824 CT_CARD_DISABLED)) {
825
826 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
827 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
828
829 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
830 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
831
832 if (!(flags & RXON_CARD_DISABLED)) {
833 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
834 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
835 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
836 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
837 }
838 if (flags & CT_CARD_DISABLED)
839 iwl_tt_enter_ct_kill(priv);
840 }
841 if (!(flags & CT_CARD_DISABLED))
842 iwl_tt_exit_ct_kill(priv);
843
844 if (flags & HW_CARD_DISABLED)
845 set_bit(STATUS_RF_KILL_HW, &priv->status);
846 else
847 clear_bit(STATUS_RF_KILL_HW, &priv->status);
848
849
850 if (!(flags & RXON_CARD_DISABLED))
851 iwl_scan_cancel(priv);
852
853 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
854 test_bit(STATUS_RF_KILL_HW, &priv->status)))
855 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
856 test_bit(STATUS_RF_KILL_HW, &priv->status));
857 else
858 wake_up_interruptible(&priv->wait_command_queue);
859 }
860
861 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
862 {
863 if (src == IWL_PWR_SRC_VAUX) {
864 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
865 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
866 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
867 ~APMG_PS_CTRL_MSK_PWR_SRC);
868 } else {
869 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
870 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
871 ~APMG_PS_CTRL_MSK_PWR_SRC);
872 }
873
874 return 0;
875 }
876
877 /**
878 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
879 *
880 * Setup the RX handlers for each of the reply types sent from the uCode
881 * to the host.
882 *
883 * This function chains into the hardware specific files for them to setup
884 * any hardware specific handlers as well.
885 */
886 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
887 {
888 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
889 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
890 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
891 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
892 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
893 iwl_rx_pm_debug_statistics_notif;
894 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
895
896 /*
897 * The same handler is used for both the REPLY to a discrete
898 * statistics request from the host as well as for the periodic
899 * statistics notifications (after received beacons) from the uCode.
900 */
901 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
902 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
903
904 iwl_setup_spectrum_handlers(priv);
905 iwl_setup_rx_scan_handlers(priv);
906
907 /* status change handler */
908 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
909
910 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
911 iwl_rx_missed_beacon_notif;
912 /* Rx handlers */
913 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
914 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
915 /* block ack */
916 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
917 /* Set up hardware specific Rx handlers */
918 priv->cfg->ops->lib->rx_handler_setup(priv);
919 }
920
921 /**
922 * iwl_rx_handle - Main entry function for receiving responses from uCode
923 *
924 * Uses the priv->rx_handlers callback function array to invoke
925 * the appropriate handlers, including command responses,
926 * frame-received notifications, and other notifications.
927 */
928 void iwl_rx_handle(struct iwl_priv *priv)
929 {
930 struct iwl_rx_mem_buffer *rxb;
931 struct iwl_rx_packet *pkt;
932 struct iwl_rx_queue *rxq = &priv->rxq;
933 u32 r, i;
934 int reclaim;
935 unsigned long flags;
936 u8 fill_rx = 0;
937 u32 count = 8;
938 int total_empty;
939
940 /* uCode's read index (stored in shared DRAM) indicates the last Rx
941 * buffer that the driver may process (last buffer filled by ucode). */
942 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
943 i = rxq->read;
944
945 /* Rx interrupt, but nothing sent from uCode */
946 if (i == r)
947 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
948
949 /* calculate total frames need to be restock after handling RX */
950 total_empty = r - rxq->write_actual;
951 if (total_empty < 0)
952 total_empty += RX_QUEUE_SIZE;
953
954 if (total_empty > (RX_QUEUE_SIZE / 2))
955 fill_rx = 1;
956
957 while (i != r) {
958 rxb = rxq->queue[i];
959
960 /* If an RXB doesn't have a Rx queue slot associated with it,
961 * then a bug has been introduced in the queue refilling
962 * routines -- catch it here */
963 BUG_ON(rxb == NULL);
964
965 rxq->queue[i] = NULL;
966
967 pci_unmap_page(priv->pci_dev, rxb->page_dma,
968 PAGE_SIZE << priv->hw_params.rx_page_order,
969 PCI_DMA_FROMDEVICE);
970 pkt = rxb_addr(rxb);
971
972 trace_iwlwifi_dev_rx(priv, pkt,
973 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
974
975 /* Reclaim a command buffer only if this packet is a response
976 * to a (driver-originated) command.
977 * If the packet (e.g. Rx frame) originated from uCode,
978 * there is no command buffer to reclaim.
979 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
980 * but apparently a few don't get set; catch them here. */
981 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
982 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
983 (pkt->hdr.cmd != REPLY_RX) &&
984 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
985 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
986 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
987 (pkt->hdr.cmd != REPLY_TX);
988
989 /* Based on type of command response or notification,
990 * handle those that need handling via function in
991 * rx_handlers table. See iwl_setup_rx_handlers() */
992 if (priv->rx_handlers[pkt->hdr.cmd]) {
993 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
994 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
995 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
996 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
997 } else {
998 /* No handling needed */
999 IWL_DEBUG_RX(priv,
1000 "r %d i %d No handler needed for %s, 0x%02x\n",
1001 r, i, get_cmd_string(pkt->hdr.cmd),
1002 pkt->hdr.cmd);
1003 }
1004
1005 /*
1006 * XXX: After here, we should always check rxb->page
1007 * against NULL before touching it or its virtual
1008 * memory (pkt). Because some rx_handler might have
1009 * already taken or freed the pages.
1010 */
1011
1012 if (reclaim) {
1013 /* Invoke any callbacks, transfer the buffer to caller,
1014 * and fire off the (possibly) blocking iwl_send_cmd()
1015 * as we reclaim the driver command queue */
1016 if (rxb->page)
1017 iwl_tx_cmd_complete(priv, rxb);
1018 else
1019 IWL_WARN(priv, "Claim null rxb?\n");
1020 }
1021
1022 /* Reuse the page if possible. For notification packets and
1023 * SKBs that fail to Rx correctly, add them back into the
1024 * rx_free list for reuse later. */
1025 spin_lock_irqsave(&rxq->lock, flags);
1026 if (rxb->page != NULL) {
1027 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1028 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1029 PCI_DMA_FROMDEVICE);
1030 list_add_tail(&rxb->list, &rxq->rx_free);
1031 rxq->free_count++;
1032 } else
1033 list_add_tail(&rxb->list, &rxq->rx_used);
1034
1035 spin_unlock_irqrestore(&rxq->lock, flags);
1036
1037 i = (i + 1) & RX_QUEUE_MASK;
1038 /* If there are a lot of unused frames,
1039 * restock the Rx queue so ucode wont assert. */
1040 if (fill_rx) {
1041 count++;
1042 if (count >= 8) {
1043 rxq->read = i;
1044 iwl_rx_replenish_now(priv);
1045 count = 0;
1046 }
1047 }
1048 }
1049
1050 /* Backtrack one entry */
1051 rxq->read = i;
1052 if (fill_rx)
1053 iwl_rx_replenish_now(priv);
1054 else
1055 iwl_rx_queue_restock(priv);
1056 }
1057
1058 /* call this function to flush any scheduled tasklet */
1059 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1060 {
1061 /* wait to make sure we flush pending tasklet*/
1062 synchronize_irq(priv->pci_dev->irq);
1063 tasklet_kill(&priv->irq_tasklet);
1064 }
1065
1066 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1067 {
1068 u32 inta, handled = 0;
1069 u32 inta_fh;
1070 unsigned long flags;
1071 u32 i;
1072 #ifdef CONFIG_IWLWIFI_DEBUG
1073 u32 inta_mask;
1074 #endif
1075
1076 spin_lock_irqsave(&priv->lock, flags);
1077
1078 /* Ack/clear/reset pending uCode interrupts.
1079 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1080 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1081 inta = iwl_read32(priv, CSR_INT);
1082 iwl_write32(priv, CSR_INT, inta);
1083
1084 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1085 * Any new interrupts that happen after this, either while we're
1086 * in this tasklet, or later, will show up in next ISR/tasklet. */
1087 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1088 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1089
1090 #ifdef CONFIG_IWLWIFI_DEBUG
1091 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1092 /* just for debug */
1093 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1094 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1095 inta, inta_mask, inta_fh);
1096 }
1097 #endif
1098
1099 spin_unlock_irqrestore(&priv->lock, flags);
1100
1101 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1102 * atomic, make sure that inta covers all the interrupts that
1103 * we've discovered, even if FH interrupt came in just after
1104 * reading CSR_INT. */
1105 if (inta_fh & CSR49_FH_INT_RX_MASK)
1106 inta |= CSR_INT_BIT_FH_RX;
1107 if (inta_fh & CSR49_FH_INT_TX_MASK)
1108 inta |= CSR_INT_BIT_FH_TX;
1109
1110 /* Now service all interrupt bits discovered above. */
1111 if (inta & CSR_INT_BIT_HW_ERR) {
1112 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1113
1114 /* Tell the device to stop sending interrupts */
1115 iwl_disable_interrupts(priv);
1116
1117 priv->isr_stats.hw++;
1118 iwl_irq_handle_error(priv);
1119
1120 handled |= CSR_INT_BIT_HW_ERR;
1121
1122 return;
1123 }
1124
1125 #ifdef CONFIG_IWLWIFI_DEBUG
1126 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1127 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1128 if (inta & CSR_INT_BIT_SCD) {
1129 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1130 "the frame/frames.\n");
1131 priv->isr_stats.sch++;
1132 }
1133
1134 /* Alive notification via Rx interrupt will do the real work */
1135 if (inta & CSR_INT_BIT_ALIVE) {
1136 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1137 priv->isr_stats.alive++;
1138 }
1139 }
1140 #endif
1141 /* Safely ignore these bits for debug checks below */
1142 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1143
1144 /* HW RF KILL switch toggled */
1145 if (inta & CSR_INT_BIT_RF_KILL) {
1146 int hw_rf_kill = 0;
1147 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1148 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1149 hw_rf_kill = 1;
1150
1151 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1152 hw_rf_kill ? "disable radio" : "enable radio");
1153
1154 priv->isr_stats.rfkill++;
1155
1156 /* driver only loads ucode once setting the interface up.
1157 * the driver allows loading the ucode even if the radio
1158 * is killed. Hence update the killswitch state here. The
1159 * rfkill handler will care about restarting if needed.
1160 */
1161 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1162 if (hw_rf_kill)
1163 set_bit(STATUS_RF_KILL_HW, &priv->status);
1164 else
1165 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1166 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1167 }
1168
1169 handled |= CSR_INT_BIT_RF_KILL;
1170 }
1171
1172 /* Chip got too hot and stopped itself */
1173 if (inta & CSR_INT_BIT_CT_KILL) {
1174 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1175 priv->isr_stats.ctkill++;
1176 handled |= CSR_INT_BIT_CT_KILL;
1177 }
1178
1179 /* Error detected by uCode */
1180 if (inta & CSR_INT_BIT_SW_ERR) {
1181 IWL_ERR(priv, "Microcode SW error detected. "
1182 " Restarting 0x%X.\n", inta);
1183 priv->isr_stats.sw++;
1184 priv->isr_stats.sw_err = inta;
1185 iwl_irq_handle_error(priv);
1186 handled |= CSR_INT_BIT_SW_ERR;
1187 }
1188
1189 /*
1190 * uCode wakes up after power-down sleep.
1191 * Tell device about any new tx or host commands enqueued,
1192 * and about any Rx buffers made available while asleep.
1193 */
1194 if (inta & CSR_INT_BIT_WAKEUP) {
1195 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1196 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1197 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1198 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1199 priv->isr_stats.wakeup++;
1200 handled |= CSR_INT_BIT_WAKEUP;
1201 }
1202
1203 /* All uCode command responses, including Tx command responses,
1204 * Rx "responses" (frame-received notification), and other
1205 * notifications from uCode come through here*/
1206 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1207 iwl_rx_handle(priv);
1208 priv->isr_stats.rx++;
1209 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1210 }
1211
1212 /* This "Tx" DMA channel is used only for loading uCode */
1213 if (inta & CSR_INT_BIT_FH_TX) {
1214 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1215 priv->isr_stats.tx++;
1216 handled |= CSR_INT_BIT_FH_TX;
1217 /* Wake up uCode load routine, now that load is complete */
1218 priv->ucode_write_complete = 1;
1219 wake_up_interruptible(&priv->wait_command_queue);
1220 }
1221
1222 if (inta & ~handled) {
1223 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1224 priv->isr_stats.unhandled++;
1225 }
1226
1227 if (inta & ~(priv->inta_mask)) {
1228 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1229 inta & ~priv->inta_mask);
1230 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1231 }
1232
1233 /* Re-enable all interrupts */
1234 /* only Re-enable if diabled by irq */
1235 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1236 iwl_enable_interrupts(priv);
1237
1238 #ifdef CONFIG_IWLWIFI_DEBUG
1239 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1240 inta = iwl_read32(priv, CSR_INT);
1241 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1242 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1243 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1244 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1245 }
1246 #endif
1247 }
1248
1249 /* tasklet for iwlagn interrupt */
1250 static void iwl_irq_tasklet(struct iwl_priv *priv)
1251 {
1252 u32 inta = 0;
1253 u32 handled = 0;
1254 unsigned long flags;
1255 u32 i;
1256 #ifdef CONFIG_IWLWIFI_DEBUG
1257 u32 inta_mask;
1258 #endif
1259
1260 spin_lock_irqsave(&priv->lock, flags);
1261
1262 /* Ack/clear/reset pending uCode interrupts.
1263 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1264 */
1265 iwl_write32(priv, CSR_INT, priv->inta);
1266
1267 inta = priv->inta;
1268
1269 #ifdef CONFIG_IWLWIFI_DEBUG
1270 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1271 /* just for debug */
1272 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1273 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1274 inta, inta_mask);
1275 }
1276 #endif
1277
1278 spin_unlock_irqrestore(&priv->lock, flags);
1279
1280 /* saved interrupt in inta variable now we can reset priv->inta */
1281 priv->inta = 0;
1282
1283 /* Now service all interrupt bits discovered above. */
1284 if (inta & CSR_INT_BIT_HW_ERR) {
1285 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1286
1287 /* Tell the device to stop sending interrupts */
1288 iwl_disable_interrupts(priv);
1289
1290 priv->isr_stats.hw++;
1291 iwl_irq_handle_error(priv);
1292
1293 handled |= CSR_INT_BIT_HW_ERR;
1294
1295 return;
1296 }
1297
1298 #ifdef CONFIG_IWLWIFI_DEBUG
1299 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1300 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1301 if (inta & CSR_INT_BIT_SCD) {
1302 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1303 "the frame/frames.\n");
1304 priv->isr_stats.sch++;
1305 }
1306
1307 /* Alive notification via Rx interrupt will do the real work */
1308 if (inta & CSR_INT_BIT_ALIVE) {
1309 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1310 priv->isr_stats.alive++;
1311 }
1312 }
1313 #endif
1314 /* Safely ignore these bits for debug checks below */
1315 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1316
1317 /* HW RF KILL switch toggled */
1318 if (inta & CSR_INT_BIT_RF_KILL) {
1319 int hw_rf_kill = 0;
1320 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1321 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1322 hw_rf_kill = 1;
1323
1324 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1325 hw_rf_kill ? "disable radio" : "enable radio");
1326
1327 priv->isr_stats.rfkill++;
1328
1329 /* driver only loads ucode once setting the interface up.
1330 * the driver allows loading the ucode even if the radio
1331 * is killed. Hence update the killswitch state here. The
1332 * rfkill handler will care about restarting if needed.
1333 */
1334 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1335 if (hw_rf_kill)
1336 set_bit(STATUS_RF_KILL_HW, &priv->status);
1337 else
1338 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1339 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1340 }
1341
1342 handled |= CSR_INT_BIT_RF_KILL;
1343 }
1344
1345 /* Chip got too hot and stopped itself */
1346 if (inta & CSR_INT_BIT_CT_KILL) {
1347 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1348 priv->isr_stats.ctkill++;
1349 handled |= CSR_INT_BIT_CT_KILL;
1350 }
1351
1352 /* Error detected by uCode */
1353 if (inta & CSR_INT_BIT_SW_ERR) {
1354 IWL_ERR(priv, "Microcode SW error detected. "
1355 " Restarting 0x%X.\n", inta);
1356 priv->isr_stats.sw++;
1357 priv->isr_stats.sw_err = inta;
1358 iwl_irq_handle_error(priv);
1359 handled |= CSR_INT_BIT_SW_ERR;
1360 }
1361
1362 /* uCode wakes up after power-down sleep */
1363 if (inta & CSR_INT_BIT_WAKEUP) {
1364 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1365 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1366 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1367 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1368
1369 priv->isr_stats.wakeup++;
1370
1371 handled |= CSR_INT_BIT_WAKEUP;
1372 }
1373
1374 /* All uCode command responses, including Tx command responses,
1375 * Rx "responses" (frame-received notification), and other
1376 * notifications from uCode come through here*/
1377 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1378 CSR_INT_BIT_RX_PERIODIC)) {
1379 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1380 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1381 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1382 iwl_write32(priv, CSR_FH_INT_STATUS,
1383 CSR49_FH_INT_RX_MASK);
1384 }
1385 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1386 handled |= CSR_INT_BIT_RX_PERIODIC;
1387 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1388 }
1389 /* Sending RX interrupt require many steps to be done in the
1390 * the device:
1391 * 1- write interrupt to current index in ICT table.
1392 * 2- dma RX frame.
1393 * 3- update RX shared data to indicate last write index.
1394 * 4- send interrupt.
1395 * This could lead to RX race, driver could receive RX interrupt
1396 * but the shared data changes does not reflect this;
1397 * periodic interrupt will detect any dangling Rx activity.
1398 */
1399
1400 /* Disable periodic interrupt; we use it as just a one-shot. */
1401 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1402 CSR_INT_PERIODIC_DIS);
1403 iwl_rx_handle(priv);
1404
1405 /*
1406 * Enable periodic interrupt in 8 msec only if we received
1407 * real RX interrupt (instead of just periodic int), to catch
1408 * any dangling Rx interrupt. If it was just the periodic
1409 * interrupt, there was no dangling Rx activity, and no need
1410 * to extend the periodic interrupt; one-shot is enough.
1411 */
1412 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1413 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1414 CSR_INT_PERIODIC_ENA);
1415
1416 priv->isr_stats.rx++;
1417 }
1418
1419 /* This "Tx" DMA channel is used only for loading uCode */
1420 if (inta & CSR_INT_BIT_FH_TX) {
1421 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1422 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1423 priv->isr_stats.tx++;
1424 handled |= CSR_INT_BIT_FH_TX;
1425 /* Wake up uCode load routine, now that load is complete */
1426 priv->ucode_write_complete = 1;
1427 wake_up_interruptible(&priv->wait_command_queue);
1428 }
1429
1430 if (inta & ~handled) {
1431 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1432 priv->isr_stats.unhandled++;
1433 }
1434
1435 if (inta & ~(priv->inta_mask)) {
1436 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1437 inta & ~priv->inta_mask);
1438 }
1439
1440 /* Re-enable all interrupts */
1441 /* only Re-enable if diabled by irq */
1442 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1443 iwl_enable_interrupts(priv);
1444 }
1445
1446
1447 /******************************************************************************
1448 *
1449 * uCode download functions
1450 *
1451 ******************************************************************************/
1452
1453 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1454 {
1455 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1456 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1457 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1458 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1459 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1460 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1461 }
1462
1463 static void iwl_nic_start(struct iwl_priv *priv)
1464 {
1465 /* Remove all resets to allow NIC to operate */
1466 iwl_write32(priv, CSR_RESET, 0);
1467 }
1468
1469
1470 /**
1471 * iwl_read_ucode - Read uCode images from disk file.
1472 *
1473 * Copy into buffers for card to fetch via bus-mastering
1474 */
1475 static int iwl_read_ucode(struct iwl_priv *priv)
1476 {
1477 struct iwl_ucode_header *ucode;
1478 int ret = -EINVAL, index;
1479 const struct firmware *ucode_raw;
1480 const char *name_pre = priv->cfg->fw_name_pre;
1481 const unsigned int api_max = priv->cfg->ucode_api_max;
1482 const unsigned int api_min = priv->cfg->ucode_api_min;
1483 char buf[25];
1484 u8 *src;
1485 size_t len;
1486 u32 api_ver, build;
1487 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1488 u16 eeprom_ver;
1489
1490 /* Ask kernel firmware_class module to get the boot firmware off disk.
1491 * request_firmware() is synchronous, file is in memory on return. */
1492 for (index = api_max; index >= api_min; index--) {
1493 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1494 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1495 if (ret < 0) {
1496 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1497 buf, ret);
1498 if (ret == -ENOENT)
1499 continue;
1500 else
1501 goto error;
1502 } else {
1503 if (index < api_max)
1504 IWL_ERR(priv, "Loaded firmware %s, "
1505 "which is deprecated. "
1506 "Please use API v%u instead.\n",
1507 buf, api_max);
1508
1509 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1510 buf, ucode_raw->size);
1511 break;
1512 }
1513 }
1514
1515 if (ret < 0)
1516 goto error;
1517
1518 /* Make sure that we got at least the v1 header! */
1519 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1520 IWL_ERR(priv, "File size way too small!\n");
1521 ret = -EINVAL;
1522 goto err_release;
1523 }
1524
1525 /* Data from ucode file: header followed by uCode images */
1526 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1527
1528 priv->ucode_ver = le32_to_cpu(ucode->ver);
1529 api_ver = IWL_UCODE_API(priv->ucode_ver);
1530 build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1531 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1532 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1533 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1534 init_data_size =
1535 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1536 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1537 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1538
1539 /* api_ver should match the api version forming part of the
1540 * firmware filename ... but we don't check for that and only rely
1541 * on the API version read from firmware header from here on forward */
1542
1543 if (api_ver < api_min || api_ver > api_max) {
1544 IWL_ERR(priv, "Driver unable to support your firmware API. "
1545 "Driver supports v%u, firmware is v%u.\n",
1546 api_max, api_ver);
1547 priv->ucode_ver = 0;
1548 ret = -EINVAL;
1549 goto err_release;
1550 }
1551 if (api_ver != api_max)
1552 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1553 "got v%u. New firmware can be obtained "
1554 "from http://www.intellinuxwireless.org.\n",
1555 api_max, api_ver);
1556
1557 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1558 IWL_UCODE_MAJOR(priv->ucode_ver),
1559 IWL_UCODE_MINOR(priv->ucode_ver),
1560 IWL_UCODE_API(priv->ucode_ver),
1561 IWL_UCODE_SERIAL(priv->ucode_ver));
1562
1563 snprintf(priv->hw->wiphy->fw_version,
1564 sizeof(priv->hw->wiphy->fw_version),
1565 "%u.%u.%u.%u",
1566 IWL_UCODE_MAJOR(priv->ucode_ver),
1567 IWL_UCODE_MINOR(priv->ucode_ver),
1568 IWL_UCODE_API(priv->ucode_ver),
1569 IWL_UCODE_SERIAL(priv->ucode_ver));
1570
1571 if (build)
1572 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1573
1574 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1575 IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1576 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1577 ? "OTP" : "EEPROM", eeprom_ver);
1578
1579 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1580 priv->ucode_ver);
1581 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1582 inst_size);
1583 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1584 data_size);
1585 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1586 init_size);
1587 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1588 init_data_size);
1589 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1590 boot_size);
1591
1592 /* Verify size of file vs. image size info in file's header */
1593 if (ucode_raw->size !=
1594 priv->cfg->ops->ucode->get_header_size(api_ver) +
1595 inst_size + data_size + init_size +
1596 init_data_size + boot_size) {
1597
1598 IWL_DEBUG_INFO(priv,
1599 "uCode file size %d does not match expected size\n",
1600 (int)ucode_raw->size);
1601 ret = -EINVAL;
1602 goto err_release;
1603 }
1604
1605 /* Verify that uCode images will fit in card's SRAM */
1606 if (inst_size > priv->hw_params.max_inst_size) {
1607 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1608 inst_size);
1609 ret = -EINVAL;
1610 goto err_release;
1611 }
1612
1613 if (data_size > priv->hw_params.max_data_size) {
1614 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1615 data_size);
1616 ret = -EINVAL;
1617 goto err_release;
1618 }
1619 if (init_size > priv->hw_params.max_inst_size) {
1620 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1621 init_size);
1622 ret = -EINVAL;
1623 goto err_release;
1624 }
1625 if (init_data_size > priv->hw_params.max_data_size) {
1626 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1627 init_data_size);
1628 ret = -EINVAL;
1629 goto err_release;
1630 }
1631 if (boot_size > priv->hw_params.max_bsm_size) {
1632 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1633 boot_size);
1634 ret = -EINVAL;
1635 goto err_release;
1636 }
1637
1638 /* Allocate ucode buffers for card's bus-master loading ... */
1639
1640 /* Runtime instructions and 2 copies of data:
1641 * 1) unmodified from disk
1642 * 2) backup cache for save/restore during power-downs */
1643 priv->ucode_code.len = inst_size;
1644 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1645
1646 priv->ucode_data.len = data_size;
1647 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1648
1649 priv->ucode_data_backup.len = data_size;
1650 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1651
1652 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1653 !priv->ucode_data_backup.v_addr)
1654 goto err_pci_alloc;
1655
1656 /* Initialization instructions and data */
1657 if (init_size && init_data_size) {
1658 priv->ucode_init.len = init_size;
1659 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1660
1661 priv->ucode_init_data.len = init_data_size;
1662 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1663
1664 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1665 goto err_pci_alloc;
1666 }
1667
1668 /* Bootstrap (instructions only, no data) */
1669 if (boot_size) {
1670 priv->ucode_boot.len = boot_size;
1671 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1672
1673 if (!priv->ucode_boot.v_addr)
1674 goto err_pci_alloc;
1675 }
1676
1677 /* Copy images into buffers for card's bus-master reads ... */
1678
1679 /* Runtime instructions (first block of data in file) */
1680 len = inst_size;
1681 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1682 memcpy(priv->ucode_code.v_addr, src, len);
1683 src += len;
1684
1685 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1686 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1687
1688 /* Runtime data (2nd block)
1689 * NOTE: Copy into backup buffer will be done in iwl_up() */
1690 len = data_size;
1691 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1692 memcpy(priv->ucode_data.v_addr, src, len);
1693 memcpy(priv->ucode_data_backup.v_addr, src, len);
1694 src += len;
1695
1696 /* Initialization instructions (3rd block) */
1697 if (init_size) {
1698 len = init_size;
1699 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1700 len);
1701 memcpy(priv->ucode_init.v_addr, src, len);
1702 src += len;
1703 }
1704
1705 /* Initialization data (4th block) */
1706 if (init_data_size) {
1707 len = init_data_size;
1708 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1709 len);
1710 memcpy(priv->ucode_init_data.v_addr, src, len);
1711 src += len;
1712 }
1713
1714 /* Bootstrap instructions (5th block) */
1715 len = boot_size;
1716 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1717 memcpy(priv->ucode_boot.v_addr, src, len);
1718
1719 /* We have our copies now, allow OS release its copies */
1720 release_firmware(ucode_raw);
1721 return 0;
1722
1723 err_pci_alloc:
1724 IWL_ERR(priv, "failed to allocate pci memory\n");
1725 ret = -ENOMEM;
1726 iwl_dealloc_ucode_pci(priv);
1727
1728 err_release:
1729 release_firmware(ucode_raw);
1730
1731 error:
1732 return ret;
1733 }
1734
1735 static const char *desc_lookup_text[] = {
1736 "OK",
1737 "FAIL",
1738 "BAD_PARAM",
1739 "BAD_CHECKSUM",
1740 "NMI_INTERRUPT_WDG",
1741 "SYSASSERT",
1742 "FATAL_ERROR",
1743 "BAD_COMMAND",
1744 "HW_ERROR_TUNE_LOCK",
1745 "HW_ERROR_TEMPERATURE",
1746 "ILLEGAL_CHAN_FREQ",
1747 "VCC_NOT_STABLE",
1748 "FH_ERROR",
1749 "NMI_INTERRUPT_HOST",
1750 "NMI_INTERRUPT_ACTION_PT",
1751 "NMI_INTERRUPT_UNKNOWN",
1752 "UCODE_VERSION_MISMATCH",
1753 "HW_ERROR_ABS_LOCK",
1754 "HW_ERROR_CAL_LOCK_FAIL",
1755 "NMI_INTERRUPT_INST_ACTION_PT",
1756 "NMI_INTERRUPT_DATA_ACTION_PT",
1757 "NMI_TRM_HW_ER",
1758 "NMI_INTERRUPT_TRM",
1759 "NMI_INTERRUPT_BREAK_POINT"
1760 "DEBUG_0",
1761 "DEBUG_1",
1762 "DEBUG_2",
1763 "DEBUG_3",
1764 "UNKNOWN"
1765 };
1766
1767 static const char *desc_lookup(int i)
1768 {
1769 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1770
1771 if (i < 0 || i > max)
1772 i = max;
1773
1774 return desc_lookup_text[i];
1775 }
1776
1777 #define ERROR_START_OFFSET (1 * sizeof(u32))
1778 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1779
1780 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1781 {
1782 u32 data2, line;
1783 u32 desc, time, count, base, data1;
1784 u32 blink1, blink2, ilink1, ilink2;
1785
1786 if (priv->ucode_type == UCODE_INIT)
1787 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1788 else
1789 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1790
1791 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1792 IWL_ERR(priv,
1793 "Not valid error log pointer 0x%08X for %s uCode\n",
1794 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1795 return;
1796 }
1797
1798 count = iwl_read_targ_mem(priv, base);
1799
1800 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1801 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1802 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1803 priv->status, count);
1804 }
1805
1806 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1807 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1808 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1809 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1810 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1811 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1812 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1813 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1814 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1815
1816 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1817 blink1, blink2, ilink1, ilink2);
1818
1819 IWL_ERR(priv, "Desc Time "
1820 "data1 data2 line\n");
1821 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1822 desc_lookup(desc), desc, time, data1, data2, line);
1823 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1824 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1825 ilink1, ilink2);
1826
1827 }
1828
1829 #define EVENT_START_OFFSET (4 * sizeof(u32))
1830
1831 /**
1832 * iwl_print_event_log - Dump error event log to syslog
1833 *
1834 */
1835 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1836 u32 num_events, u32 mode,
1837 int pos, char **buf, size_t bufsz)
1838 {
1839 u32 i;
1840 u32 base; /* SRAM byte address of event log header */
1841 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1842 u32 ptr; /* SRAM byte address of log data */
1843 u32 ev, time, data; /* event log data */
1844 unsigned long reg_flags;
1845
1846 if (num_events == 0)
1847 return pos;
1848 if (priv->ucode_type == UCODE_INIT)
1849 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1850 else
1851 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1852
1853 if (mode == 0)
1854 event_size = 2 * sizeof(u32);
1855 else
1856 event_size = 3 * sizeof(u32);
1857
1858 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1859
1860 /* Make sure device is powered up for SRAM reads */
1861 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1862 iwl_grab_nic_access(priv);
1863
1864 /* Set starting address; reads will auto-increment */
1865 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1866 rmb();
1867
1868 /* "time" is actually "data" for mode 0 (no timestamp).
1869 * place event id # at far right for easier visual parsing. */
1870 for (i = 0; i < num_events; i++) {
1871 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1872 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1873 if (mode == 0) {
1874 /* data, ev */
1875 if (bufsz) {
1876 pos += scnprintf(*buf + pos, bufsz - pos,
1877 "EVT_LOG:0x%08x:%04u\n",
1878 time, ev);
1879 } else {
1880 trace_iwlwifi_dev_ucode_event(priv, 0,
1881 time, ev);
1882 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1883 time, ev);
1884 }
1885 } else {
1886 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1887 if (bufsz) {
1888 pos += scnprintf(*buf + pos, bufsz - pos,
1889 "EVT_LOGT:%010u:0x%08x:%04u\n",
1890 time, data, ev);
1891 } else {
1892 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1893 time, data, ev);
1894 trace_iwlwifi_dev_ucode_event(priv, time,
1895 data, ev);
1896 }
1897 }
1898 }
1899
1900 /* Allow device to power down */
1901 iwl_release_nic_access(priv);
1902 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1903 return pos;
1904 }
1905
1906 /**
1907 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1908 */
1909 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1910 u32 num_wraps, u32 next_entry,
1911 u32 size, u32 mode,
1912 int pos, char **buf, size_t bufsz)
1913 {
1914 /*
1915 * display the newest DEFAULT_LOG_ENTRIES entries
1916 * i.e the entries just before the next ont that uCode would fill.
1917 */
1918 if (num_wraps) {
1919 if (next_entry < size) {
1920 pos = iwl_print_event_log(priv,
1921 capacity - (size - next_entry),
1922 size - next_entry, mode,
1923 pos, buf, bufsz);
1924 pos = iwl_print_event_log(priv, 0,
1925 next_entry, mode,
1926 pos, buf, bufsz);
1927 } else
1928 pos = iwl_print_event_log(priv, next_entry - size,
1929 size, mode, pos, buf, bufsz);
1930 } else {
1931 if (next_entry < size) {
1932 pos = iwl_print_event_log(priv, 0, next_entry,
1933 mode, pos, buf, bufsz);
1934 } else {
1935 pos = iwl_print_event_log(priv, next_entry - size,
1936 size, mode, pos, buf, bufsz);
1937 }
1938 }
1939 return pos;
1940 }
1941
1942 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1943 #define MAX_EVENT_LOG_SIZE (512)
1944
1945 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1946
1947 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1948 char **buf, bool display)
1949 {
1950 u32 base; /* SRAM byte address of event log header */
1951 u32 capacity; /* event log capacity in # entries */
1952 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1953 u32 num_wraps; /* # times uCode wrapped to top of log */
1954 u32 next_entry; /* index of next entry to be written by uCode */
1955 u32 size; /* # entries that we'll print */
1956 int pos = 0;
1957 size_t bufsz = 0;
1958
1959 if (priv->ucode_type == UCODE_INIT)
1960 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1961 else
1962 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1963
1964 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1965 IWL_ERR(priv,
1966 "Invalid event log pointer 0x%08X for %s uCode\n",
1967 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1968 return -EINVAL;
1969 }
1970
1971 /* event log header */
1972 capacity = iwl_read_targ_mem(priv, base);
1973 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1974 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1975 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1976
1977 if (capacity > MAX_EVENT_LOG_SIZE) {
1978 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1979 capacity, MAX_EVENT_LOG_SIZE);
1980 capacity = MAX_EVENT_LOG_SIZE;
1981 }
1982
1983 if (next_entry > MAX_EVENT_LOG_SIZE) {
1984 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1985 next_entry, MAX_EVENT_LOG_SIZE);
1986 next_entry = MAX_EVENT_LOG_SIZE;
1987 }
1988
1989 size = num_wraps ? capacity : next_entry;
1990
1991 /* bail out if nothing in log */
1992 if (size == 0) {
1993 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1994 return pos;
1995 }
1996
1997 #ifdef CONFIG_IWLWIFI_DEBUG
1998 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1999 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2000 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2001 #else
2002 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2003 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2004 #endif
2005 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2006 size);
2007
2008 #ifdef CONFIG_IWLWIFI_DEBUG
2009 if (display) {
2010 if (full_log)
2011 bufsz = capacity * 48;
2012 else
2013 bufsz = size * 48;
2014 *buf = kmalloc(bufsz, GFP_KERNEL);
2015 if (!*buf)
2016 return -ENOMEM;
2017 }
2018 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2019 /*
2020 * if uCode has wrapped back to top of log,
2021 * start at the oldest entry,
2022 * i.e the next one that uCode would fill.
2023 */
2024 if (num_wraps)
2025 pos = iwl_print_event_log(priv, next_entry,
2026 capacity - next_entry, mode,
2027 pos, buf, bufsz);
2028 /* (then/else) start at top of log */
2029 pos = iwl_print_event_log(priv, 0,
2030 next_entry, mode, pos, buf, bufsz);
2031 } else
2032 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2033 next_entry, size, mode,
2034 pos, buf, bufsz);
2035 #else
2036 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2037 next_entry, size, mode,
2038 pos, buf, bufsz);
2039 #endif
2040 return pos;
2041 }
2042
2043 /**
2044 * iwl_alive_start - called after REPLY_ALIVE notification received
2045 * from protocol/runtime uCode (initialization uCode's
2046 * Alive gets handled by iwl_init_alive_start()).
2047 */
2048 static void iwl_alive_start(struct iwl_priv *priv)
2049 {
2050 int ret = 0;
2051
2052 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2053
2054 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2055 /* We had an error bringing up the hardware, so take it
2056 * all the way back down so we can try again */
2057 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2058 goto restart;
2059 }
2060
2061 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2062 * This is a paranoid check, because we would not have gotten the
2063 * "runtime" alive if code weren't properly loaded. */
2064 if (iwl_verify_ucode(priv)) {
2065 /* Runtime instruction load was bad;
2066 * take it all the way back down so we can try again */
2067 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2068 goto restart;
2069 }
2070
2071 iwl_clear_stations_table(priv);
2072 ret = priv->cfg->ops->lib->alive_notify(priv);
2073 if (ret) {
2074 IWL_WARN(priv,
2075 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2076 goto restart;
2077 }
2078
2079 /* After the ALIVE response, we can send host commands to the uCode */
2080 set_bit(STATUS_ALIVE, &priv->status);
2081
2082 if (iwl_is_rfkill(priv))
2083 return;
2084
2085 ieee80211_wake_queues(priv->hw);
2086
2087 priv->active_rate = priv->rates_mask;
2088 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2089
2090 /* Configure Tx antenna selection based on H/W config */
2091 if (priv->cfg->ops->hcmd->set_tx_ant)
2092 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2093
2094 if (iwl_is_associated(priv)) {
2095 struct iwl_rxon_cmd *active_rxon =
2096 (struct iwl_rxon_cmd *)&priv->active_rxon;
2097 /* apply any changes in staging */
2098 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2099 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2100 } else {
2101 /* Initialize our rx_config data */
2102 iwl_connection_init_rx_config(priv, priv->iw_mode);
2103
2104 if (priv->cfg->ops->hcmd->set_rxon_chain)
2105 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2106
2107 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2108 }
2109
2110 /* Configure Bluetooth device coexistence support */
2111 iwl_send_bt_config(priv);
2112
2113 iwl_reset_run_time_calib(priv);
2114
2115 /* Configure the adapter for unassociated operation */
2116 iwlcore_commit_rxon(priv);
2117
2118 /* At this point, the NIC is initialized and operational */
2119 iwl_rf_kill_ct_config(priv);
2120
2121 iwl_leds_init(priv);
2122
2123 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2124 set_bit(STATUS_READY, &priv->status);
2125 wake_up_interruptible(&priv->wait_command_queue);
2126
2127 iwl_power_update_mode(priv, true);
2128
2129 /* reassociate for ADHOC mode */
2130 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2131 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2132 priv->vif);
2133 if (beacon)
2134 iwl_mac_beacon_update(priv->hw, beacon);
2135 }
2136
2137
2138 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2139 iwl_set_mode(priv, priv->iw_mode);
2140
2141 return;
2142
2143 restart:
2144 queue_work(priv->workqueue, &priv->restart);
2145 }
2146
2147 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2148
2149 static void __iwl_down(struct iwl_priv *priv)
2150 {
2151 unsigned long flags;
2152 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2153
2154 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2155
2156 if (!exit_pending)
2157 set_bit(STATUS_EXIT_PENDING, &priv->status);
2158
2159 iwl_clear_stations_table(priv);
2160
2161 /* Unblock any waiting calls */
2162 wake_up_interruptible_all(&priv->wait_command_queue);
2163
2164 /* Wipe out the EXIT_PENDING status bit if we are not actually
2165 * exiting the module */
2166 if (!exit_pending)
2167 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2168
2169 /* stop and reset the on-board processor */
2170 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2171
2172 /* tell the device to stop sending interrupts */
2173 spin_lock_irqsave(&priv->lock, flags);
2174 iwl_disable_interrupts(priv);
2175 spin_unlock_irqrestore(&priv->lock, flags);
2176 iwl_synchronize_irq(priv);
2177
2178 if (priv->mac80211_registered)
2179 ieee80211_stop_queues(priv->hw);
2180
2181 /* If we have not previously called iwl_init() then
2182 * clear all bits but the RF Kill bit and return */
2183 if (!iwl_is_init(priv)) {
2184 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2185 STATUS_RF_KILL_HW |
2186 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2187 STATUS_GEO_CONFIGURED |
2188 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2189 STATUS_EXIT_PENDING;
2190 goto exit;
2191 }
2192
2193 /* ...otherwise clear out all the status bits but the RF Kill
2194 * bit and continue taking the NIC down. */
2195 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2196 STATUS_RF_KILL_HW |
2197 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2198 STATUS_GEO_CONFIGURED |
2199 test_bit(STATUS_FW_ERROR, &priv->status) <<
2200 STATUS_FW_ERROR |
2201 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2202 STATUS_EXIT_PENDING;
2203
2204 /* device going down, Stop using ICT table */
2205 iwl_disable_ict(priv);
2206
2207 iwl_txq_ctx_stop(priv);
2208 iwl_rxq_stop(priv);
2209
2210 /* Power-down device's busmaster DMA clocks */
2211 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2212 udelay(5);
2213
2214 /* Make sure (redundant) we've released our request to stay awake */
2215 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2216
2217 /* Stop the device, and put it in low power state */
2218 priv->cfg->ops->lib->apm_ops.stop(priv);
2219
2220 exit:
2221 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2222
2223 if (priv->ibss_beacon)
2224 dev_kfree_skb(priv->ibss_beacon);
2225 priv->ibss_beacon = NULL;
2226
2227 /* clear out any free frames */
2228 iwl_clear_free_frames(priv);
2229 }
2230
2231 static void iwl_down(struct iwl_priv *priv)
2232 {
2233 mutex_lock(&priv->mutex);
2234 __iwl_down(priv);
2235 mutex_unlock(&priv->mutex);
2236
2237 iwl_cancel_deferred_work(priv);
2238 }
2239
2240 #define HW_READY_TIMEOUT (50)
2241
2242 static int iwl_set_hw_ready(struct iwl_priv *priv)
2243 {
2244 int ret = 0;
2245
2246 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2247 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2248
2249 /* See if we got it */
2250 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2251 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2252 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2253 HW_READY_TIMEOUT);
2254 if (ret != -ETIMEDOUT)
2255 priv->hw_ready = true;
2256 else
2257 priv->hw_ready = false;
2258
2259 IWL_DEBUG_INFO(priv, "hardware %s\n",
2260 (priv->hw_ready == 1) ? "ready" : "not ready");
2261 return ret;
2262 }
2263
2264 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2265 {
2266 int ret = 0;
2267
2268 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2269
2270 ret = iwl_set_hw_ready(priv);
2271 if (priv->hw_ready)
2272 return ret;
2273
2274 /* If HW is not ready, prepare the conditions to check again */
2275 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2276 CSR_HW_IF_CONFIG_REG_PREPARE);
2277
2278 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2279 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2280 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2281
2282 /* HW should be ready by now, check again. */
2283 if (ret != -ETIMEDOUT)
2284 iwl_set_hw_ready(priv);
2285
2286 return ret;
2287 }
2288
2289 #define MAX_HW_RESTARTS 5
2290
2291 static int __iwl_up(struct iwl_priv *priv)
2292 {
2293 int i;
2294 int ret;
2295
2296 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2297 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2298 return -EIO;
2299 }
2300
2301 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2302 IWL_ERR(priv, "ucode not available for device bringup\n");
2303 return -EIO;
2304 }
2305
2306 iwl_prepare_card_hw(priv);
2307
2308 if (!priv->hw_ready) {
2309 IWL_WARN(priv, "Exit HW not ready\n");
2310 return -EIO;
2311 }
2312
2313 /* If platform's RF_KILL switch is NOT set to KILL */
2314 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2315 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2316 else
2317 set_bit(STATUS_RF_KILL_HW, &priv->status);
2318
2319 if (iwl_is_rfkill(priv)) {
2320 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2321
2322 iwl_enable_interrupts(priv);
2323 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2324 return 0;
2325 }
2326
2327 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2328
2329 ret = iwl_hw_nic_init(priv);
2330 if (ret) {
2331 IWL_ERR(priv, "Unable to init nic\n");
2332 return ret;
2333 }
2334
2335 /* make sure rfkill handshake bits are cleared */
2336 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2337 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2338 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2339
2340 /* clear (again), then enable host interrupts */
2341 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2342 iwl_enable_interrupts(priv);
2343
2344 /* really make sure rfkill handshake bits are cleared */
2345 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2346 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2347
2348 /* Copy original ucode data image from disk into backup cache.
2349 * This will be used to initialize the on-board processor's
2350 * data SRAM for a clean start when the runtime program first loads. */
2351 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2352 priv->ucode_data.len);
2353
2354 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2355
2356 iwl_clear_stations_table(priv);
2357
2358 /* load bootstrap state machine,
2359 * load bootstrap program into processor's memory,
2360 * prepare to load the "initialize" uCode */
2361 ret = priv->cfg->ops->lib->load_ucode(priv);
2362
2363 if (ret) {
2364 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2365 ret);
2366 continue;
2367 }
2368
2369 /* start card; "initialize" will load runtime ucode */
2370 iwl_nic_start(priv);
2371
2372 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2373
2374 return 0;
2375 }
2376
2377 set_bit(STATUS_EXIT_PENDING, &priv->status);
2378 __iwl_down(priv);
2379 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2380
2381 /* tried to restart and config the device for as long as our
2382 * patience could withstand */
2383 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2384 return -EIO;
2385 }
2386
2387
2388 /*****************************************************************************
2389 *
2390 * Workqueue callbacks
2391 *
2392 *****************************************************************************/
2393
2394 static void iwl_bg_init_alive_start(struct work_struct *data)
2395 {
2396 struct iwl_priv *priv =
2397 container_of(data, struct iwl_priv, init_alive_start.work);
2398
2399 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2400 return;
2401
2402 mutex_lock(&priv->mutex);
2403 priv->cfg->ops->lib->init_alive_start(priv);
2404 mutex_unlock(&priv->mutex);
2405 }
2406
2407 static void iwl_bg_alive_start(struct work_struct *data)
2408 {
2409 struct iwl_priv *priv =
2410 container_of(data, struct iwl_priv, alive_start.work);
2411
2412 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2413 return;
2414
2415 /* enable dram interrupt */
2416 iwl_reset_ict(priv);
2417
2418 mutex_lock(&priv->mutex);
2419 iwl_alive_start(priv);
2420 mutex_unlock(&priv->mutex);
2421 }
2422
2423 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2424 {
2425 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2426 run_time_calib_work);
2427
2428 mutex_lock(&priv->mutex);
2429
2430 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2431 test_bit(STATUS_SCANNING, &priv->status)) {
2432 mutex_unlock(&priv->mutex);
2433 return;
2434 }
2435
2436 if (priv->start_calib) {
2437 iwl_chain_noise_calibration(priv, &priv->statistics);
2438
2439 iwl_sensitivity_calibration(priv, &priv->statistics);
2440 }
2441
2442 mutex_unlock(&priv->mutex);
2443 return;
2444 }
2445
2446 static void iwl_bg_up(struct work_struct *data)
2447 {
2448 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2449
2450 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2451 return;
2452
2453 mutex_lock(&priv->mutex);
2454 __iwl_up(priv);
2455 mutex_unlock(&priv->mutex);
2456 }
2457
2458 static void iwl_bg_restart(struct work_struct *data)
2459 {
2460 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2461
2462 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2463 return;
2464
2465 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2466 mutex_lock(&priv->mutex);
2467 priv->vif = NULL;
2468 priv->is_open = 0;
2469 mutex_unlock(&priv->mutex);
2470 iwl_down(priv);
2471 ieee80211_restart_hw(priv->hw);
2472 } else {
2473 iwl_down(priv);
2474 queue_work(priv->workqueue, &priv->up);
2475 }
2476 }
2477
2478 static void iwl_bg_rx_replenish(struct work_struct *data)
2479 {
2480 struct iwl_priv *priv =
2481 container_of(data, struct iwl_priv, rx_replenish);
2482
2483 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2484 return;
2485
2486 mutex_lock(&priv->mutex);
2487 iwl_rx_replenish(priv);
2488 mutex_unlock(&priv->mutex);
2489 }
2490
2491 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2492
2493 void iwl_post_associate(struct iwl_priv *priv)
2494 {
2495 struct ieee80211_conf *conf = NULL;
2496 int ret = 0;
2497 unsigned long flags;
2498
2499 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2500 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2501 return;
2502 }
2503
2504 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2505 priv->assoc_id, priv->active_rxon.bssid_addr);
2506
2507
2508 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2509 return;
2510
2511
2512 if (!priv->vif || !priv->is_open)
2513 return;
2514
2515 iwl_scan_cancel_timeout(priv, 200);
2516
2517 conf = ieee80211_get_hw_conf(priv->hw);
2518
2519 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2520 iwlcore_commit_rxon(priv);
2521
2522 iwl_setup_rxon_timing(priv);
2523 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2524 sizeof(priv->rxon_timing), &priv->rxon_timing);
2525 if (ret)
2526 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2527 "Attempting to continue.\n");
2528
2529 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2530
2531 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2532
2533 if (priv->cfg->ops->hcmd->set_rxon_chain)
2534 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2535
2536 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2537
2538 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2539 priv->assoc_id, priv->beacon_int);
2540
2541 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2542 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2543 else
2544 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2545
2546 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2547 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2548 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2549 else
2550 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2551
2552 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2553 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2554
2555 }
2556
2557 iwlcore_commit_rxon(priv);
2558
2559 switch (priv->iw_mode) {
2560 case NL80211_IFTYPE_STATION:
2561 break;
2562
2563 case NL80211_IFTYPE_ADHOC:
2564
2565 /* assume default assoc id */
2566 priv->assoc_id = 1;
2567
2568 iwl_rxon_add_station(priv, priv->bssid, 0);
2569 iwl_send_beacon_cmd(priv);
2570
2571 break;
2572
2573 default:
2574 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2575 __func__, priv->iw_mode);
2576 break;
2577 }
2578
2579 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2580 priv->assoc_station_added = 1;
2581
2582 spin_lock_irqsave(&priv->lock, flags);
2583 iwl_activate_qos(priv, 0);
2584 spin_unlock_irqrestore(&priv->lock, flags);
2585
2586 /* the chain noise calibration will enabled PM upon completion
2587 * If chain noise has already been run, then we need to enable
2588 * power management here */
2589 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2590 iwl_power_update_mode(priv, false);
2591
2592 /* Enable Rx differential gain and sensitivity calibrations */
2593 iwl_chain_noise_reset(priv);
2594 priv->start_calib = 1;
2595
2596 }
2597
2598 /*****************************************************************************
2599 *
2600 * mac80211 entry point functions
2601 *
2602 *****************************************************************************/
2603
2604 #define UCODE_READY_TIMEOUT (4 * HZ)
2605
2606 /*
2607 * Not a mac80211 entry point function, but it fits in with all the
2608 * other mac80211 functions grouped here.
2609 */
2610 static int iwl_setup_mac(struct iwl_priv *priv)
2611 {
2612 int ret;
2613 struct ieee80211_hw *hw = priv->hw;
2614 hw->rate_control_algorithm = "iwl-agn-rs";
2615
2616 /* Tell mac80211 our characteristics */
2617 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2618 IEEE80211_HW_NOISE_DBM |
2619 IEEE80211_HW_AMPDU_AGGREGATION |
2620 IEEE80211_HW_SPECTRUM_MGMT;
2621
2622 if (!priv->cfg->broken_powersave)
2623 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2624 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2625
2626 if (priv->cfg->sku & IWL_SKU_N)
2627 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2628 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2629
2630 hw->sta_data_size = sizeof(struct iwl_station_priv);
2631 hw->wiphy->interface_modes =
2632 BIT(NL80211_IFTYPE_STATION) |
2633 BIT(NL80211_IFTYPE_ADHOC);
2634
2635 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
2636 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2637
2638 /*
2639 * For now, disable PS by default because it affects
2640 * RX performance significantly.
2641 */
2642 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2643
2644 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2645 /* we create the 802.11 header and a zero-length SSID element */
2646 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2647
2648 /* Default value; 4 EDCA QOS priorities */
2649 hw->queues = 4;
2650
2651 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2652
2653 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2654 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2655 &priv->bands[IEEE80211_BAND_2GHZ];
2656 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2657 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2658 &priv->bands[IEEE80211_BAND_5GHZ];
2659
2660 ret = ieee80211_register_hw(priv->hw);
2661 if (ret) {
2662 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2663 return ret;
2664 }
2665 priv->mac80211_registered = 1;
2666
2667 return 0;
2668 }
2669
2670
2671 static int iwl_mac_start(struct ieee80211_hw *hw)
2672 {
2673 struct iwl_priv *priv = hw->priv;
2674 int ret;
2675
2676 IWL_DEBUG_MAC80211(priv, "enter\n");
2677
2678 /* we should be verifying the device is ready to be opened */
2679 mutex_lock(&priv->mutex);
2680
2681 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2682 * ucode filename and max sizes are card-specific. */
2683
2684 if (!priv->ucode_code.len) {
2685 ret = iwl_read_ucode(priv);
2686 if (ret) {
2687 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2688 mutex_unlock(&priv->mutex);
2689 return ret;
2690 }
2691 }
2692
2693 ret = __iwl_up(priv);
2694
2695 mutex_unlock(&priv->mutex);
2696
2697 if (ret)
2698 return ret;
2699
2700 if (iwl_is_rfkill(priv))
2701 goto out;
2702
2703 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2704
2705 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2706 * mac80211 will not be run successfully. */
2707 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2708 test_bit(STATUS_READY, &priv->status),
2709 UCODE_READY_TIMEOUT);
2710 if (!ret) {
2711 if (!test_bit(STATUS_READY, &priv->status)) {
2712 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2713 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2714 return -ETIMEDOUT;
2715 }
2716 }
2717
2718 iwl_led_start(priv);
2719
2720 out:
2721 priv->is_open = 1;
2722 IWL_DEBUG_MAC80211(priv, "leave\n");
2723 return 0;
2724 }
2725
2726 static void iwl_mac_stop(struct ieee80211_hw *hw)
2727 {
2728 struct iwl_priv *priv = hw->priv;
2729
2730 IWL_DEBUG_MAC80211(priv, "enter\n");
2731
2732 if (!priv->is_open)
2733 return;
2734
2735 priv->is_open = 0;
2736
2737 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2738 /* stop mac, cancel any scan request and clear
2739 * RXON_FILTER_ASSOC_MSK BIT
2740 */
2741 mutex_lock(&priv->mutex);
2742 iwl_scan_cancel_timeout(priv, 100);
2743 mutex_unlock(&priv->mutex);
2744 }
2745
2746 iwl_down(priv);
2747
2748 flush_workqueue(priv->workqueue);
2749
2750 /* enable interrupts again in order to receive rfkill changes */
2751 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2752 iwl_enable_interrupts(priv);
2753
2754 IWL_DEBUG_MAC80211(priv, "leave\n");
2755 }
2756
2757 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2758 {
2759 struct iwl_priv *priv = hw->priv;
2760
2761 IWL_DEBUG_MACDUMP(priv, "enter\n");
2762
2763 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2764 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2765
2766 if (iwl_tx_skb(priv, skb))
2767 dev_kfree_skb_any(skb);
2768
2769 IWL_DEBUG_MACDUMP(priv, "leave\n");
2770 return NETDEV_TX_OK;
2771 }
2772
2773 void iwl_config_ap(struct iwl_priv *priv)
2774 {
2775 int ret = 0;
2776 unsigned long flags;
2777
2778 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2779 return;
2780
2781 /* The following should be done only at AP bring up */
2782 if (!iwl_is_associated(priv)) {
2783
2784 /* RXON - unassoc (to set timing command) */
2785 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2786 iwlcore_commit_rxon(priv);
2787
2788 /* RXON Timing */
2789 iwl_setup_rxon_timing(priv);
2790 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2791 sizeof(priv->rxon_timing), &priv->rxon_timing);
2792 if (ret)
2793 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2794 "Attempting to continue.\n");
2795
2796 /* AP has all antennas */
2797 priv->chain_noise_data.active_chains =
2798 priv->hw_params.valid_rx_ant;
2799 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2800 if (priv->cfg->ops->hcmd->set_rxon_chain)
2801 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2802
2803 /* FIXME: what should be the assoc_id for AP? */
2804 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2805 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2806 priv->staging_rxon.flags |=
2807 RXON_FLG_SHORT_PREAMBLE_MSK;
2808 else
2809 priv->staging_rxon.flags &=
2810 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2811
2812 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2813 if (priv->assoc_capability &
2814 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2815 priv->staging_rxon.flags |=
2816 RXON_FLG_SHORT_SLOT_MSK;
2817 else
2818 priv->staging_rxon.flags &=
2819 ~RXON_FLG_SHORT_SLOT_MSK;
2820
2821 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2822 priv->staging_rxon.flags &=
2823 ~RXON_FLG_SHORT_SLOT_MSK;
2824 }
2825 /* restore RXON assoc */
2826 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2827 iwlcore_commit_rxon(priv);
2828 iwl_reset_qos(priv);
2829 spin_lock_irqsave(&priv->lock, flags);
2830 iwl_activate_qos(priv, 1);
2831 spin_unlock_irqrestore(&priv->lock, flags);
2832 iwl_add_bcast_station(priv);
2833 }
2834 iwl_send_beacon_cmd(priv);
2835
2836 /* FIXME - we need to add code here to detect a totally new
2837 * configuration, reset the AP, unassoc, rxon timing, assoc,
2838 * clear sta table, add BCAST sta... */
2839 }
2840
2841 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2842 struct ieee80211_key_conf *keyconf, const u8 *addr,
2843 u32 iv32, u16 *phase1key)
2844 {
2845
2846 struct iwl_priv *priv = hw->priv;
2847 IWL_DEBUG_MAC80211(priv, "enter\n");
2848
2849 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2850
2851 IWL_DEBUG_MAC80211(priv, "leave\n");
2852 }
2853
2854 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2855 struct ieee80211_vif *vif,
2856 struct ieee80211_sta *sta,
2857 struct ieee80211_key_conf *key)
2858 {
2859 struct iwl_priv *priv = hw->priv;
2860 const u8 *addr;
2861 int ret;
2862 u8 sta_id;
2863 bool is_default_wep_key = false;
2864
2865 IWL_DEBUG_MAC80211(priv, "enter\n");
2866
2867 if (priv->cfg->mod_params->sw_crypto) {
2868 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2869 return -EOPNOTSUPP;
2870 }
2871 addr = sta ? sta->addr : iwl_bcast_addr;
2872 sta_id = iwl_find_station(priv, addr);
2873 if (sta_id == IWL_INVALID_STATION) {
2874 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2875 addr);
2876 return -EINVAL;
2877
2878 }
2879
2880 mutex_lock(&priv->mutex);
2881 iwl_scan_cancel_timeout(priv, 100);
2882 mutex_unlock(&priv->mutex);
2883
2884 /* If we are getting WEP group key and we didn't receive any key mapping
2885 * so far, we are in legacy wep mode (group key only), otherwise we are
2886 * in 1X mode.
2887 * In legacy wep mode, we use another host command to the uCode */
2888 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2889 priv->iw_mode != NL80211_IFTYPE_AP) {
2890 if (cmd == SET_KEY)
2891 is_default_wep_key = !priv->key_mapping_key;
2892 else
2893 is_default_wep_key =
2894 (key->hw_key_idx == HW_KEY_DEFAULT);
2895 }
2896
2897 switch (cmd) {
2898 case SET_KEY:
2899 if (is_default_wep_key)
2900 ret = iwl_set_default_wep_key(priv, key);
2901 else
2902 ret = iwl_set_dynamic_key(priv, key, sta_id);
2903
2904 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2905 break;
2906 case DISABLE_KEY:
2907 if (is_default_wep_key)
2908 ret = iwl_remove_default_wep_key(priv, key);
2909 else
2910 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2911
2912 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2913 break;
2914 default:
2915 ret = -EINVAL;
2916 }
2917
2918 IWL_DEBUG_MAC80211(priv, "leave\n");
2919
2920 return ret;
2921 }
2922
2923 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2924 struct ieee80211_vif *vif,
2925 enum ieee80211_ampdu_mlme_action action,
2926 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2927 {
2928 struct iwl_priv *priv = hw->priv;
2929 int ret;
2930
2931 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2932 sta->addr, tid);
2933
2934 if (!(priv->cfg->sku & IWL_SKU_N))
2935 return -EACCES;
2936
2937 switch (action) {
2938 case IEEE80211_AMPDU_RX_START:
2939 IWL_DEBUG_HT(priv, "start Rx\n");
2940 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2941 case IEEE80211_AMPDU_RX_STOP:
2942 IWL_DEBUG_HT(priv, "stop Rx\n");
2943 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2944 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2945 return 0;
2946 else
2947 return ret;
2948 case IEEE80211_AMPDU_TX_START:
2949 IWL_DEBUG_HT(priv, "start Tx\n");
2950 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2951 case IEEE80211_AMPDU_TX_STOP:
2952 IWL_DEBUG_HT(priv, "stop Tx\n");
2953 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2954 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2955 return 0;
2956 else
2957 return ret;
2958 case IEEE80211_AMPDU_TX_OPERATIONAL:
2959 /* do nothing */
2960 return -EOPNOTSUPP;
2961 default:
2962 IWL_DEBUG_HT(priv, "unknown\n");
2963 return -EINVAL;
2964 break;
2965 }
2966 return 0;
2967 }
2968
2969 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2970 struct ieee80211_low_level_stats *stats)
2971 {
2972 struct iwl_priv *priv = hw->priv;
2973
2974 priv = hw->priv;
2975 IWL_DEBUG_MAC80211(priv, "enter\n");
2976 IWL_DEBUG_MAC80211(priv, "leave\n");
2977
2978 return 0;
2979 }
2980
2981 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2982 struct ieee80211_vif *vif,
2983 enum sta_notify_cmd cmd,
2984 struct ieee80211_sta *sta)
2985 {
2986 struct iwl_priv *priv = hw->priv;
2987 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2988 int sta_id;
2989
2990 /*
2991 * TODO: We really should use this callback to
2992 * actually maintain the station table in
2993 * the device.
2994 */
2995
2996 switch (cmd) {
2997 case STA_NOTIFY_ADD:
2998 atomic_set(&sta_priv->pending_frames, 0);
2999 if (vif->type == NL80211_IFTYPE_AP)
3000 sta_priv->client = true;
3001 break;
3002 case STA_NOTIFY_SLEEP:
3003 WARN_ON(!sta_priv->client);
3004 sta_priv->asleep = true;
3005 if (atomic_read(&sta_priv->pending_frames) > 0)
3006 ieee80211_sta_block_awake(hw, sta, true);
3007 break;
3008 case STA_NOTIFY_AWAKE:
3009 WARN_ON(!sta_priv->client);
3010 sta_priv->asleep = false;
3011 sta_id = iwl_find_station(priv, sta->addr);
3012 if (sta_id != IWL_INVALID_STATION)
3013 iwl_sta_modify_ps_wake(priv, sta_id);
3014 break;
3015 default:
3016 break;
3017 }
3018 }
3019
3020 /*****************************************************************************
3021 *
3022 * sysfs attributes
3023 *
3024 *****************************************************************************/
3025
3026 #ifdef CONFIG_IWLWIFI_DEBUG
3027
3028 /*
3029 * The following adds a new attribute to the sysfs representation
3030 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3031 * used for controlling the debug level.
3032 *
3033 * See the level definitions in iwl for details.
3034 *
3035 * The debug_level being managed using sysfs below is a per device debug
3036 * level that is used instead of the global debug level if it (the per
3037 * device debug level) is set.
3038 */
3039 static ssize_t show_debug_level(struct device *d,
3040 struct device_attribute *attr, char *buf)
3041 {
3042 struct iwl_priv *priv = dev_get_drvdata(d);
3043 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3044 }
3045 static ssize_t store_debug_level(struct device *d,
3046 struct device_attribute *attr,
3047 const char *buf, size_t count)
3048 {
3049 struct iwl_priv *priv = dev_get_drvdata(d);
3050 unsigned long val;
3051 int ret;
3052
3053 ret = strict_strtoul(buf, 0, &val);
3054 if (ret)
3055 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3056 else {
3057 priv->debug_level = val;
3058 if (iwl_alloc_traffic_mem(priv))
3059 IWL_ERR(priv,
3060 "Not enough memory to generate traffic log\n");
3061 }
3062 return strnlen(buf, count);
3063 }
3064
3065 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3066 show_debug_level, store_debug_level);
3067
3068
3069 #endif /* CONFIG_IWLWIFI_DEBUG */
3070
3071
3072 static ssize_t show_temperature(struct device *d,
3073 struct device_attribute *attr, char *buf)
3074 {
3075 struct iwl_priv *priv = dev_get_drvdata(d);
3076
3077 if (!iwl_is_alive(priv))
3078 return -EAGAIN;
3079
3080 return sprintf(buf, "%d\n", priv->temperature);
3081 }
3082
3083 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3084
3085 static ssize_t show_tx_power(struct device *d,
3086 struct device_attribute *attr, char *buf)
3087 {
3088 struct iwl_priv *priv = dev_get_drvdata(d);
3089
3090 if (!iwl_is_ready_rf(priv))
3091 return sprintf(buf, "off\n");
3092 else
3093 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3094 }
3095
3096 static ssize_t store_tx_power(struct device *d,
3097 struct device_attribute *attr,
3098 const char *buf, size_t count)
3099 {
3100 struct iwl_priv *priv = dev_get_drvdata(d);
3101 unsigned long val;
3102 int ret;
3103
3104 ret = strict_strtoul(buf, 10, &val);
3105 if (ret)
3106 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3107 else {
3108 ret = iwl_set_tx_power(priv, val, false);
3109 if (ret)
3110 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3111 ret);
3112 else
3113 ret = count;
3114 }
3115 return ret;
3116 }
3117
3118 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3119
3120 static ssize_t show_flags(struct device *d,
3121 struct device_attribute *attr, char *buf)
3122 {
3123 struct iwl_priv *priv = dev_get_drvdata(d);
3124
3125 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3126 }
3127
3128 static ssize_t store_flags(struct device *d,
3129 struct device_attribute *attr,
3130 const char *buf, size_t count)
3131 {
3132 struct iwl_priv *priv = dev_get_drvdata(d);
3133 unsigned long val;
3134 u32 flags;
3135 int ret = strict_strtoul(buf, 0, &val);
3136 if (ret)
3137 return ret;
3138 flags = (u32)val;
3139
3140 mutex_lock(&priv->mutex);
3141 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3142 /* Cancel any currently running scans... */
3143 if (iwl_scan_cancel_timeout(priv, 100))
3144 IWL_WARN(priv, "Could not cancel scan.\n");
3145 else {
3146 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
3147 priv->staging_rxon.flags = cpu_to_le32(flags);
3148 iwlcore_commit_rxon(priv);
3149 }
3150 }
3151 mutex_unlock(&priv->mutex);
3152
3153 return count;
3154 }
3155
3156 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3157
3158 static ssize_t show_filter_flags(struct device *d,
3159 struct device_attribute *attr, char *buf)
3160 {
3161 struct iwl_priv *priv = dev_get_drvdata(d);
3162
3163 return sprintf(buf, "0x%04X\n",
3164 le32_to_cpu(priv->active_rxon.filter_flags));
3165 }
3166
3167 static ssize_t store_filter_flags(struct device *d,
3168 struct device_attribute *attr,
3169 const char *buf, size_t count)
3170 {
3171 struct iwl_priv *priv = dev_get_drvdata(d);
3172 unsigned long val;
3173 u32 filter_flags;
3174 int ret = strict_strtoul(buf, 0, &val);
3175 if (ret)
3176 return ret;
3177 filter_flags = (u32)val;
3178
3179 mutex_lock(&priv->mutex);
3180 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3181 /* Cancel any currently running scans... */
3182 if (iwl_scan_cancel_timeout(priv, 100))
3183 IWL_WARN(priv, "Could not cancel scan.\n");
3184 else {
3185 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3186 "0x%04X\n", filter_flags);
3187 priv->staging_rxon.filter_flags =
3188 cpu_to_le32(filter_flags);
3189 iwlcore_commit_rxon(priv);
3190 }
3191 }
3192 mutex_unlock(&priv->mutex);
3193
3194 return count;
3195 }
3196
3197 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3198 store_filter_flags);
3199
3200
3201 static ssize_t show_statistics(struct device *d,
3202 struct device_attribute *attr, char *buf)
3203 {
3204 struct iwl_priv *priv = dev_get_drvdata(d);
3205 u32 size = sizeof(struct iwl_notif_statistics);
3206 u32 len = 0, ofs = 0;
3207 u8 *data = (u8 *)&priv->statistics;
3208 int rc = 0;
3209
3210 if (!iwl_is_alive(priv))
3211 return -EAGAIN;
3212
3213 mutex_lock(&priv->mutex);
3214 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3215 mutex_unlock(&priv->mutex);
3216
3217 if (rc) {
3218 len = sprintf(buf,
3219 "Error sending statistics request: 0x%08X\n", rc);
3220 return len;
3221 }
3222
3223 while (size && (PAGE_SIZE - len)) {
3224 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3225 PAGE_SIZE - len, 1);
3226 len = strlen(buf);
3227 if (PAGE_SIZE - len)
3228 buf[len++] = '\n';
3229
3230 ofs += 16;
3231 size -= min(size, 16U);
3232 }
3233
3234 return len;
3235 }
3236
3237 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3238
3239 static ssize_t show_rts_ht_protection(struct device *d,
3240 struct device_attribute *attr, char *buf)
3241 {
3242 struct iwl_priv *priv = dev_get_drvdata(d);
3243
3244 return sprintf(buf, "%s\n",
3245 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3246 }
3247
3248 static ssize_t store_rts_ht_protection(struct device *d,
3249 struct device_attribute *attr,
3250 const char *buf, size_t count)
3251 {
3252 struct iwl_priv *priv = dev_get_drvdata(d);
3253 unsigned long val;
3254 int ret;
3255
3256 ret = strict_strtoul(buf, 10, &val);
3257 if (ret)
3258 IWL_INFO(priv, "Input is not in decimal form.\n");
3259 else {
3260 if (!iwl_is_associated(priv))
3261 priv->cfg->use_rts_for_ht = val ? true : false;
3262 else
3263 IWL_ERR(priv, "Sta associated with AP - "
3264 "Change protection mechanism is not allowed\n");
3265 ret = count;
3266 }
3267 return ret;
3268 }
3269
3270 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3271 show_rts_ht_protection, store_rts_ht_protection);
3272
3273
3274 /*****************************************************************************
3275 *
3276 * driver setup and teardown
3277 *
3278 *****************************************************************************/
3279
3280 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3281 {
3282 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3283
3284 init_waitqueue_head(&priv->wait_command_queue);
3285
3286 INIT_WORK(&priv->up, iwl_bg_up);
3287 INIT_WORK(&priv->restart, iwl_bg_restart);
3288 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3289 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3290 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3291 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3292 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3293
3294 iwl_setup_scan_deferred_work(priv);
3295
3296 if (priv->cfg->ops->lib->setup_deferred_work)
3297 priv->cfg->ops->lib->setup_deferred_work(priv);
3298
3299 init_timer(&priv->statistics_periodic);
3300 priv->statistics_periodic.data = (unsigned long)priv;
3301 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3302
3303 init_timer(&priv->ucode_trace);
3304 priv->ucode_trace.data = (unsigned long)priv;
3305 priv->ucode_trace.function = iwl_bg_ucode_trace;
3306
3307 if (!priv->cfg->use_isr_legacy)
3308 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3309 iwl_irq_tasklet, (unsigned long)priv);
3310 else
3311 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3312 iwl_irq_tasklet_legacy, (unsigned long)priv);
3313 }
3314
3315 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3316 {
3317 if (priv->cfg->ops->lib->cancel_deferred_work)
3318 priv->cfg->ops->lib->cancel_deferred_work(priv);
3319
3320 cancel_delayed_work_sync(&priv->init_alive_start);
3321 cancel_delayed_work(&priv->scan_check);
3322 cancel_delayed_work(&priv->alive_start);
3323 cancel_work_sync(&priv->beacon_update);
3324 del_timer_sync(&priv->statistics_periodic);
3325 del_timer_sync(&priv->ucode_trace);
3326 }
3327
3328 static void iwl_init_hw_rates(struct iwl_priv *priv,
3329 struct ieee80211_rate *rates)
3330 {
3331 int i;
3332
3333 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3334 rates[i].bitrate = iwl_rates[i].ieee * 5;
3335 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3336 rates[i].hw_value_short = i;
3337 rates[i].flags = 0;
3338 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3339 /*
3340 * If CCK != 1M then set short preamble rate flag.
3341 */
3342 rates[i].flags |=
3343 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3344 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3345 }
3346 }
3347 }
3348
3349 static int iwl_init_drv(struct iwl_priv *priv)
3350 {
3351 int ret;
3352
3353 priv->ibss_beacon = NULL;
3354
3355 spin_lock_init(&priv->sta_lock);
3356 spin_lock_init(&priv->hcmd_lock);
3357
3358 INIT_LIST_HEAD(&priv->free_frames);
3359
3360 mutex_init(&priv->mutex);
3361
3362 /* Clear the driver's (not device's) station table */
3363 iwl_clear_stations_table(priv);
3364
3365 priv->ieee_channels = NULL;
3366 priv->ieee_rates = NULL;
3367 priv->band = IEEE80211_BAND_2GHZ;
3368
3369 priv->iw_mode = NL80211_IFTYPE_STATION;
3370 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3371
3372 /* Choose which receivers/antennas to use */
3373 if (priv->cfg->ops->hcmd->set_rxon_chain)
3374 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3375
3376 iwl_init_scan_params(priv);
3377
3378 iwl_reset_qos(priv);
3379
3380 priv->qos_data.qos_active = 0;
3381 priv->qos_data.qos_cap.val = 0;
3382
3383 priv->rates_mask = IWL_RATES_MASK;
3384 /* Set the tx_power_user_lmt to the lowest power level
3385 * this value will get overwritten by channel max power avg
3386 * from eeprom */
3387 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3388
3389 ret = iwl_init_channel_map(priv);
3390 if (ret) {
3391 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3392 goto err;
3393 }
3394
3395 ret = iwlcore_init_geos(priv);
3396 if (ret) {
3397 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3398 goto err_free_channel_map;
3399 }
3400 iwl_init_hw_rates(priv, priv->ieee_rates);
3401
3402 return 0;
3403
3404 err_free_channel_map:
3405 iwl_free_channel_map(priv);
3406 err:
3407 return ret;
3408 }
3409
3410 static void iwl_uninit_drv(struct iwl_priv *priv)
3411 {
3412 iwl_calib_free_results(priv);
3413 iwlcore_free_geos(priv);
3414 iwl_free_channel_map(priv);
3415 kfree(priv->scan);
3416 }
3417
3418 static struct attribute *iwl_sysfs_entries[] = {
3419 &dev_attr_flags.attr,
3420 &dev_attr_filter_flags.attr,
3421 &dev_attr_statistics.attr,
3422 &dev_attr_temperature.attr,
3423 &dev_attr_tx_power.attr,
3424 &dev_attr_rts_ht_protection.attr,
3425 #ifdef CONFIG_IWLWIFI_DEBUG
3426 &dev_attr_debug_level.attr,
3427 #endif
3428 NULL
3429 };
3430
3431 static struct attribute_group iwl_attribute_group = {
3432 .name = NULL, /* put in device directory */
3433 .attrs = iwl_sysfs_entries,
3434 };
3435
3436 static struct ieee80211_ops iwl_hw_ops = {
3437 .tx = iwl_mac_tx,
3438 .start = iwl_mac_start,
3439 .stop = iwl_mac_stop,
3440 .add_interface = iwl_mac_add_interface,
3441 .remove_interface = iwl_mac_remove_interface,
3442 .config = iwl_mac_config,
3443 .configure_filter = iwl_configure_filter,
3444 .set_key = iwl_mac_set_key,
3445 .update_tkip_key = iwl_mac_update_tkip_key,
3446 .get_stats = iwl_mac_get_stats,
3447 .get_tx_stats = iwl_mac_get_tx_stats,
3448 .conf_tx = iwl_mac_conf_tx,
3449 .reset_tsf = iwl_mac_reset_tsf,
3450 .bss_info_changed = iwl_bss_info_changed,
3451 .ampdu_action = iwl_mac_ampdu_action,
3452 .hw_scan = iwl_mac_hw_scan,
3453 .sta_notify = iwl_mac_sta_notify,
3454 };
3455
3456 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3457 {
3458 int err = 0;
3459 struct iwl_priv *priv;
3460 struct ieee80211_hw *hw;
3461 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3462 unsigned long flags;
3463 u16 pci_cmd;
3464
3465 /************************
3466 * 1. Allocating HW data
3467 ************************/
3468
3469 /* Disabling hardware scan means that mac80211 will perform scans
3470 * "the hard way", rather than using device's scan. */
3471 if (cfg->mod_params->disable_hw_scan) {
3472 if (iwl_debug_level & IWL_DL_INFO)
3473 dev_printk(KERN_DEBUG, &(pdev->dev),
3474 "Disabling hw_scan\n");
3475 iwl_hw_ops.hw_scan = NULL;
3476 }
3477
3478 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3479 if (!hw) {
3480 err = -ENOMEM;
3481 goto out;
3482 }
3483 priv = hw->priv;
3484 /* At this point both hw and priv are allocated. */
3485
3486 SET_IEEE80211_DEV(hw, &pdev->dev);
3487
3488 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3489 priv->cfg = cfg;
3490 priv->pci_dev = pdev;
3491 priv->inta_mask = CSR_INI_SET_MASK;
3492
3493 #ifdef CONFIG_IWLWIFI_DEBUG
3494 atomic_set(&priv->restrict_refcnt, 0);
3495 #endif
3496 if (iwl_alloc_traffic_mem(priv))
3497 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3498
3499 /**************************
3500 * 2. Initializing PCI bus
3501 **************************/
3502 if (pci_enable_device(pdev)) {
3503 err = -ENODEV;
3504 goto out_ieee80211_free_hw;
3505 }
3506
3507 pci_set_master(pdev);
3508
3509 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3510 if (!err)
3511 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3512 if (err) {
3513 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3514 if (!err)
3515 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3516 /* both attempts failed: */
3517 if (err) {
3518 IWL_WARN(priv, "No suitable DMA available.\n");
3519 goto out_pci_disable_device;
3520 }
3521 }
3522
3523 err = pci_request_regions(pdev, DRV_NAME);
3524 if (err)
3525 goto out_pci_disable_device;
3526
3527 pci_set_drvdata(pdev, priv);
3528
3529
3530 /***********************
3531 * 3. Read REV register
3532 ***********************/
3533 priv->hw_base = pci_iomap(pdev, 0, 0);
3534 if (!priv->hw_base) {
3535 err = -ENODEV;
3536 goto out_pci_release_regions;
3537 }
3538
3539 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3540 (unsigned long long) pci_resource_len(pdev, 0));
3541 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3542
3543 /* these spin locks will be used in apm_ops.init and EEPROM access
3544 * we should init now
3545 */
3546 spin_lock_init(&priv->reg_lock);
3547 spin_lock_init(&priv->lock);
3548 iwl_hw_detect(priv);
3549 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3550 priv->cfg->name, priv->hw_rev);
3551
3552 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3553 * PCI Tx retries from interfering with C3 CPU state */
3554 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3555
3556 iwl_prepare_card_hw(priv);
3557 if (!priv->hw_ready) {
3558 IWL_WARN(priv, "Failed, HW not ready\n");
3559 goto out_iounmap;
3560 }
3561
3562 /*****************
3563 * 4. Read EEPROM
3564 *****************/
3565 /* Read the EEPROM */
3566 err = iwl_eeprom_init(priv);
3567 if (err) {
3568 IWL_ERR(priv, "Unable to init EEPROM\n");
3569 goto out_iounmap;
3570 }
3571 err = iwl_eeprom_check_version(priv);
3572 if (err)
3573 goto out_free_eeprom;
3574
3575 /* extract MAC Address */
3576 iwl_eeprom_get_mac(priv, priv->mac_addr);
3577 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3578 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3579
3580 /************************
3581 * 5. Setup HW constants
3582 ************************/
3583 if (iwl_set_hw_params(priv)) {
3584 IWL_ERR(priv, "failed to set hw parameters\n");
3585 goto out_free_eeprom;
3586 }
3587
3588 /*******************
3589 * 6. Setup priv
3590 *******************/
3591
3592 err = iwl_init_drv(priv);
3593 if (err)
3594 goto out_free_eeprom;
3595 /* At this point both hw and priv are initialized. */
3596
3597 /********************
3598 * 7. Setup services
3599 ********************/
3600 spin_lock_irqsave(&priv->lock, flags);
3601 iwl_disable_interrupts(priv);
3602 spin_unlock_irqrestore(&priv->lock, flags);
3603
3604 pci_enable_msi(priv->pci_dev);
3605
3606 iwl_alloc_isr_ict(priv);
3607 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3608 IRQF_SHARED, DRV_NAME, priv);
3609 if (err) {
3610 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3611 goto out_disable_msi;
3612 }
3613 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3614 if (err) {
3615 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3616 goto out_free_irq;
3617 }
3618
3619 iwl_setup_deferred_work(priv);
3620 iwl_setup_rx_handlers(priv);
3621
3622 /**********************************
3623 * 8. Setup and register mac80211
3624 **********************************/
3625
3626 /* enable interrupts if needed: hw bug w/a */
3627 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3628 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3629 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3630 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3631 }
3632
3633 iwl_enable_interrupts(priv);
3634
3635 err = iwl_setup_mac(priv);
3636 if (err)
3637 goto out_remove_sysfs;
3638
3639 err = iwl_dbgfs_register(priv, DRV_NAME);
3640 if (err)
3641 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3642
3643 /* If platform's RF_KILL switch is NOT set to KILL */
3644 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3645 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3646 else
3647 set_bit(STATUS_RF_KILL_HW, &priv->status);
3648
3649 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3650 test_bit(STATUS_RF_KILL_HW, &priv->status));
3651
3652 iwl_power_initialize(priv);
3653 iwl_tt_initialize(priv);
3654 return 0;
3655
3656 out_remove_sysfs:
3657 destroy_workqueue(priv->workqueue);
3658 priv->workqueue = NULL;
3659 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3660 out_free_irq:
3661 free_irq(priv->pci_dev->irq, priv);
3662 iwl_free_isr_ict(priv);
3663 out_disable_msi:
3664 pci_disable_msi(priv->pci_dev);
3665 iwl_uninit_drv(priv);
3666 out_free_eeprom:
3667 iwl_eeprom_free(priv);
3668 out_iounmap:
3669 pci_iounmap(pdev, priv->hw_base);
3670 out_pci_release_regions:
3671 pci_set_drvdata(pdev, NULL);
3672 pci_release_regions(pdev);
3673 out_pci_disable_device:
3674 pci_disable_device(pdev);
3675 out_ieee80211_free_hw:
3676 iwl_free_traffic_mem(priv);
3677 ieee80211_free_hw(priv->hw);
3678 out:
3679 return err;
3680 }
3681
3682 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3683 {
3684 struct iwl_priv *priv = pci_get_drvdata(pdev);
3685 unsigned long flags;
3686
3687 if (!priv)
3688 return;
3689
3690 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3691
3692 iwl_dbgfs_unregister(priv);
3693 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3694
3695 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3696 * to be called and iwl_down since we are removing the device
3697 * we need to set STATUS_EXIT_PENDING bit.
3698 */
3699 set_bit(STATUS_EXIT_PENDING, &priv->status);
3700 if (priv->mac80211_registered) {
3701 ieee80211_unregister_hw(priv->hw);
3702 priv->mac80211_registered = 0;
3703 } else {
3704 iwl_down(priv);
3705 }
3706
3707 /*
3708 * Make sure device is reset to low power before unloading driver.
3709 * This may be redundant with iwl_down(), but there are paths to
3710 * run iwl_down() without calling apm_ops.stop(), and there are
3711 * paths to avoid running iwl_down() at all before leaving driver.
3712 * This (inexpensive) call *makes sure* device is reset.
3713 */
3714 priv->cfg->ops->lib->apm_ops.stop(priv);
3715
3716 iwl_tt_exit(priv);
3717
3718 /* make sure we flush any pending irq or
3719 * tasklet for the driver
3720 */
3721 spin_lock_irqsave(&priv->lock, flags);
3722 iwl_disable_interrupts(priv);
3723 spin_unlock_irqrestore(&priv->lock, flags);
3724
3725 iwl_synchronize_irq(priv);
3726
3727 iwl_dealloc_ucode_pci(priv);
3728
3729 if (priv->rxq.bd)
3730 iwl_rx_queue_free(priv, &priv->rxq);
3731 iwl_hw_txq_ctx_free(priv);
3732
3733 iwl_clear_stations_table(priv);
3734 iwl_eeprom_free(priv);
3735
3736
3737 /*netif_stop_queue(dev); */
3738 flush_workqueue(priv->workqueue);
3739
3740 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3741 * priv->workqueue... so we can't take down the workqueue
3742 * until now... */
3743 destroy_workqueue(priv->workqueue);
3744 priv->workqueue = NULL;
3745 iwl_free_traffic_mem(priv);
3746
3747 free_irq(priv->pci_dev->irq, priv);
3748 pci_disable_msi(priv->pci_dev);
3749 pci_iounmap(pdev, priv->hw_base);
3750 pci_release_regions(pdev);
3751 pci_disable_device(pdev);
3752 pci_set_drvdata(pdev, NULL);
3753
3754 iwl_uninit_drv(priv);
3755
3756 iwl_free_isr_ict(priv);
3757
3758 if (priv->ibss_beacon)
3759 dev_kfree_skb(priv->ibss_beacon);
3760
3761 ieee80211_free_hw(priv->hw);
3762 }
3763
3764
3765 /*****************************************************************************
3766 *
3767 * driver and module entry point
3768 *
3769 *****************************************************************************/
3770
3771 /* Hardware specific file defines the PCI IDs table for that hardware module */
3772 static struct pci_device_id iwl_hw_card_ids[] = {
3773 #ifdef CONFIG_IWL4965
3774 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3775 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3776 #endif /* CONFIG_IWL4965 */
3777 #ifdef CONFIG_IWL5000
3778 /* 5100 Series WiFi */
3779 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3780 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3781 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3782 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3783 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3784 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3785 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3786 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3787 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3788 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3789 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3790 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3791 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3792 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3793 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3794 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3795 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3796 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3797 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3798 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3799 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3800 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3801 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3802 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3803
3804 /* 5300 Series WiFi */
3805 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3806 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3807 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3808 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3809 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3810 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3811 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3812 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3813 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3814 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3815 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3816 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3817
3818 /* 5350 Series WiFi/WiMax */
3819 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3820 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3821 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3822
3823 /* 5150 Series Wifi/WiMax */
3824 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3825 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3826 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3827 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3828 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3829 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3830
3831 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3832 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3833 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3834 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3835
3836 /* 6x00 Series */
3837 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3838 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3839 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3840 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3841 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3842 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3843 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3844 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3845 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3846 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3847
3848 /* 6x50 WiFi/WiMax Series */
3849 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3850 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3851 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3852 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3853 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3854 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3855
3856 /* 1000 Series WiFi */
3857 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3858 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3859 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3860 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3861 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3862 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3863 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3864 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3865 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3866 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3867 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3868 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3869 #endif /* CONFIG_IWL5000 */
3870
3871 {0}
3872 };
3873 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3874
3875 static struct pci_driver iwl_driver = {
3876 .name = DRV_NAME,
3877 .id_table = iwl_hw_card_ids,
3878 .probe = iwl_pci_probe,
3879 .remove = __devexit_p(iwl_pci_remove),
3880 #ifdef CONFIG_PM
3881 .suspend = iwl_pci_suspend,
3882 .resume = iwl_pci_resume,
3883 #endif
3884 };
3885
3886 static int __init iwl_init(void)
3887 {
3888
3889 int ret;
3890 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3891 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3892
3893 ret = iwlagn_rate_control_register();
3894 if (ret) {
3895 printk(KERN_ERR DRV_NAME
3896 "Unable to register rate control algorithm: %d\n", ret);
3897 return ret;
3898 }
3899
3900 ret = pci_register_driver(&iwl_driver);
3901 if (ret) {
3902 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3903 goto error_register;
3904 }
3905
3906 return ret;
3907
3908 error_register:
3909 iwlagn_rate_control_unregister();
3910 return ret;
3911 }
3912
3913 static void __exit iwl_exit(void)
3914 {
3915 pci_unregister_driver(&iwl_driver);
3916 iwlagn_rate_control_unregister();
3917 }
3918
3919 module_exit(iwl_exit);
3920 module_init(iwl_init);
3921
3922 #ifdef CONFIG_IWLWIFI_DEBUG
3923 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3924 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3925 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3926 MODULE_PARM_DESC(debug, "debug output mask");
3927 #endif
3928
Linux kernel - Deliverables
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