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mac80211: clean up beacon interval settings
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /*
65 * module name, copyright, version, etc.
66 */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
93 */
94
95 /**************************************************************/
96
97 /**
98 * iwl_commit_rxon - commit staging_rxon to hardware
99 *
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
104 */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109 int ret;
110 bool new_assoc =
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113 if (!iwl_is_alive(priv))
114 return -EBUSY;
115
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118 /* allow CTS-to-self if possible. this is relevant only for
119 * 5000, but will not damage 4965 */
120 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
121
122 ret = iwl_check_rxon_cmd(priv);
123 if (ret) {
124 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
125 return -EINVAL;
126 }
127
128 /* If we don't need to send a full RXON, we can use
129 * iwl_rxon_assoc_cmd which is used to reconfigure filter
130 * and other flags for the current radio configuration. */
131 if (!iwl_full_rxon_required(priv)) {
132 ret = iwl_send_rxon_assoc(priv);
133 if (ret) {
134 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
135 return ret;
136 }
137
138 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
139 return 0;
140 }
141
142 /* station table will be cleared */
143 priv->assoc_station_added = 0;
144
145 /* If we are currently associated and the new config requires
146 * an RXON_ASSOC and the new config wants the associated mask enabled,
147 * we must clear the associated from the active configuration
148 * before we apply the new config */
149 if (iwl_is_associated(priv) && new_assoc) {
150 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
151 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
152
153 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
154 sizeof(struct iwl_rxon_cmd),
155 &priv->active_rxon);
156
157 /* If the mask clearing failed then we set
158 * active_rxon back to what it was previously */
159 if (ret) {
160 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
161 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
162 return ret;
163 }
164 }
165
166 IWL_DEBUG_INFO(priv, "Sending RXON\n"
167 "* with%s RXON_FILTER_ASSOC_MSK\n"
168 "* channel = %d\n"
169 "* bssid = %pM\n",
170 (new_assoc ? "" : "out"),
171 le16_to_cpu(priv->staging_rxon.channel),
172 priv->staging_rxon.bssid_addr);
173
174 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
175
176 /* Apply the new configuration
177 * RXON unassoc clears the station table in uCode, send it before
178 * we add the bcast station. If assoc bit is set, we will send RXON
179 * after having added the bcast and bssid station.
180 */
181 if (!new_assoc) {
182 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
183 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
184 if (ret) {
185 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
186 return ret;
187 }
188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
189 }
190
191 priv->cfg->ops->smgmt->clear_station_table(priv);
192
193 if (!priv->error_recovering)
194 priv->start_calib = 0;
195
196 /* Add the broadcast address so we can send broadcast frames */
197 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
198 IWL_INVALID_STATION) {
199 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
200 return -EIO;
201 }
202
203 /* If we have set the ASSOC_MSK and we are in BSS mode then
204 * add the IWL_AP_ID to the station rate table */
205 if (new_assoc) {
206 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
207 ret = iwl_rxon_add_station(priv,
208 priv->active_rxon.bssid_addr, 1);
209 if (ret == IWL_INVALID_STATION) {
210 IWL_ERR(priv,
211 "Error adding AP address for TX.\n");
212 return -EIO;
213 }
214 priv->assoc_station_added = 1;
215 if (priv->default_wep_key &&
216 iwl_send_static_wepkey_cmd(priv, 0))
217 IWL_ERR(priv,
218 "Could not send WEP static key.\n");
219 }
220
221 /* Apply the new configuration
222 * RXON assoc doesn't clear the station table in uCode,
223 */
224 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
225 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
226 if (ret) {
227 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
228 return ret;
229 }
230 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
231 }
232
233 iwl_init_sensitivity(priv);
234
235 /* If we issue a new RXON command which required a tune then we must
236 * send a new TXPOWER command or we won't be able to Tx any frames */
237 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
238 if (ret) {
239 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
240 return ret;
241 }
242
243 return 0;
244 }
245
246 void iwl_update_chain_flags(struct iwl_priv *priv)
247 {
248
249 if (priv->cfg->ops->hcmd->set_rxon_chain)
250 priv->cfg->ops->hcmd->set_rxon_chain(priv);
251 iwlcore_commit_rxon(priv);
252 }
253
254 static void iwl_clear_free_frames(struct iwl_priv *priv)
255 {
256 struct list_head *element;
257
258 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
259 priv->frames_count);
260
261 while (!list_empty(&priv->free_frames)) {
262 element = priv->free_frames.next;
263 list_del(element);
264 kfree(list_entry(element, struct iwl_frame, list));
265 priv->frames_count--;
266 }
267
268 if (priv->frames_count) {
269 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
270 priv->frames_count);
271 priv->frames_count = 0;
272 }
273 }
274
275 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
276 {
277 struct iwl_frame *frame;
278 struct list_head *element;
279 if (list_empty(&priv->free_frames)) {
280 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
281 if (!frame) {
282 IWL_ERR(priv, "Could not allocate frame!\n");
283 return NULL;
284 }
285
286 priv->frames_count++;
287 return frame;
288 }
289
290 element = priv->free_frames.next;
291 list_del(element);
292 return list_entry(element, struct iwl_frame, list);
293 }
294
295 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
296 {
297 memset(frame, 0, sizeof(*frame));
298 list_add(&frame->list, &priv->free_frames);
299 }
300
301 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
302 struct ieee80211_hdr *hdr,
303 int left)
304 {
305 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
306 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
307 (priv->iw_mode != NL80211_IFTYPE_AP)))
308 return 0;
309
310 if (priv->ibss_beacon->len > left)
311 return 0;
312
313 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
314
315 return priv->ibss_beacon->len;
316 }
317
318 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
319 struct iwl_frame *frame, u8 rate)
320 {
321 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
322 unsigned int frame_size;
323
324 tx_beacon_cmd = &frame->u.beacon;
325 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
326
327 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
328 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
329
330 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
331 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
332
333 BUG_ON(frame_size > MAX_MPDU_SIZE);
334 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
335
336 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
337 tx_beacon_cmd->tx.rate_n_flags =
338 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
339 else
340 tx_beacon_cmd->tx.rate_n_flags =
341 iwl_hw_set_rate_n_flags(rate, 0);
342
343 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
344 TX_CMD_FLG_TSF_MSK |
345 TX_CMD_FLG_STA_RATE_MSK;
346
347 return sizeof(*tx_beacon_cmd) + frame_size;
348 }
349 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
350 {
351 struct iwl_frame *frame;
352 unsigned int frame_size;
353 int rc;
354 u8 rate;
355
356 frame = iwl_get_free_frame(priv);
357
358 if (!frame) {
359 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
360 "command.\n");
361 return -ENOMEM;
362 }
363
364 rate = iwl_rate_get_lowest_plcp(priv);
365
366 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
367
368 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
369 &frame->u.cmd[0]);
370
371 iwl_free_frame(priv, frame);
372
373 return rc;
374 }
375
376 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
377 {
378 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
379
380 dma_addr_t addr = get_unaligned_le32(&tb->lo);
381 if (sizeof(dma_addr_t) > sizeof(u32))
382 addr |=
383 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
384
385 return addr;
386 }
387
388 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
389 {
390 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
391
392 return le16_to_cpu(tb->hi_n_len) >> 4;
393 }
394
395 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
396 dma_addr_t addr, u16 len)
397 {
398 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
399 u16 hi_n_len = len << 4;
400
401 put_unaligned_le32(addr, &tb->lo);
402 if (sizeof(dma_addr_t) > sizeof(u32))
403 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
404
405 tb->hi_n_len = cpu_to_le16(hi_n_len);
406
407 tfd->num_tbs = idx + 1;
408 }
409
410 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
411 {
412 return tfd->num_tbs & 0x1f;
413 }
414
415 /**
416 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
417 * @priv - driver private data
418 * @txq - tx queue
419 *
420 * Does NOT advance any TFD circular buffer read/write indexes
421 * Does NOT free the TFD itself (which is within circular buffer)
422 */
423 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
424 {
425 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
426 struct iwl_tfd *tfd;
427 struct pci_dev *dev = priv->pci_dev;
428 int index = txq->q.read_ptr;
429 int i;
430 int num_tbs;
431
432 tfd = &tfd_tmp[index];
433
434 /* Sanity check on number of chunks */
435 num_tbs = iwl_tfd_get_num_tbs(tfd);
436
437 if (num_tbs >= IWL_NUM_OF_TBS) {
438 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
439 /* @todo issue fatal error, it is quite serious situation */
440 return;
441 }
442
443 /* Unmap tx_cmd */
444 if (num_tbs)
445 pci_unmap_single(dev,
446 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
447 pci_unmap_len(&txq->cmd[index]->meta, len),
448 PCI_DMA_BIDIRECTIONAL);
449
450 /* Unmap chunks, if any. */
451 for (i = 1; i < num_tbs; i++) {
452 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
453 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
454
455 if (txq->txb) {
456 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
457 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
458 }
459 }
460 }
461
462 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
463 struct iwl_tx_queue *txq,
464 dma_addr_t addr, u16 len,
465 u8 reset, u8 pad)
466 {
467 struct iwl_queue *q;
468 struct iwl_tfd *tfd, *tfd_tmp;
469 u32 num_tbs;
470
471 q = &txq->q;
472 tfd_tmp = (struct iwl_tfd *)txq->tfds;
473 tfd = &tfd_tmp[q->write_ptr];
474
475 if (reset)
476 memset(tfd, 0, sizeof(*tfd));
477
478 num_tbs = iwl_tfd_get_num_tbs(tfd);
479
480 /* Each TFD can point to a maximum 20 Tx buffers */
481 if (num_tbs >= IWL_NUM_OF_TBS) {
482 IWL_ERR(priv, "Error can not send more than %d chunks\n",
483 IWL_NUM_OF_TBS);
484 return -EINVAL;
485 }
486
487 BUG_ON(addr & ~DMA_BIT_MASK(36));
488 if (unlikely(addr & ~IWL_TX_DMA_MASK))
489 IWL_ERR(priv, "Unaligned address = %llx\n",
490 (unsigned long long)addr);
491
492 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
493
494 return 0;
495 }
496
497 /*
498 * Tell nic where to find circular buffer of Tx Frame Descriptors for
499 * given Tx queue, and enable the DMA channel used for that queue.
500 *
501 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
502 * channels supported in hardware.
503 */
504 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
505 struct iwl_tx_queue *txq)
506 {
507 int ret;
508 unsigned long flags;
509 int txq_id = txq->q.id;
510
511 spin_lock_irqsave(&priv->lock, flags);
512 ret = iwl_grab_nic_access(priv);
513 if (ret) {
514 spin_unlock_irqrestore(&priv->lock, flags);
515 return ret;
516 }
517
518 /* Circular buffer (TFD queue in DRAM) physical base address */
519 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
520 txq->q.dma_addr >> 8);
521
522 iwl_release_nic_access(priv);
523 spin_unlock_irqrestore(&priv->lock, flags);
524
525 return 0;
526 }
527
528
529 /******************************************************************************
530 *
531 * Misc. internal state and helper functions
532 *
533 ******************************************************************************/
534
535 #define MAX_UCODE_BEACON_INTERVAL 4096
536
537 static u16 iwl_adjust_beacon_interval(u16 beacon_val)
538 {
539 u16 new_val = 0;
540 u16 beacon_factor = 0;
541
542 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
543 / MAX_UCODE_BEACON_INTERVAL;
544 new_val = beacon_val / beacon_factor;
545
546 if (!new_val)
547 new_val = MAX_UCODE_BEACON_INTERVAL;
548
549 return new_val;
550 }
551
552 static void iwl_setup_rxon_timing(struct iwl_priv *priv)
553 {
554 u64 tsf;
555 s32 interval_tm, rem;
556 unsigned long flags;
557 struct ieee80211_conf *conf = NULL;
558 u16 beacon_int = 0;
559
560 conf = ieee80211_get_hw_conf(priv->hw);
561
562 spin_lock_irqsave(&priv->lock, flags);
563 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
564 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
565
566 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
567 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
568 priv->rxon_timing.atim_window = 0;
569 } else {
570 beacon_int = iwl_adjust_beacon_interval(
571 priv->vif->bss_conf.beacon_int);
572
573 /* TODO: we need to get atim_window from upper stack
574 * for now we set to 0 */
575 priv->rxon_timing.atim_window = 0;
576 }
577
578 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
579
580 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
581 interval_tm = beacon_int * 1024;
582 rem = do_div(tsf, interval_tm);
583 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
584
585 spin_unlock_irqrestore(&priv->lock, flags);
586 IWL_DEBUG_ASSOC(priv, "beacon interval %d beacon timer %d beacon tim %d\n",
587 le16_to_cpu(priv->rxon_timing.beacon_interval),
588 le32_to_cpu(priv->rxon_timing.beacon_init_val),
589 le16_to_cpu(priv->rxon_timing.atim_window));
590 }
591
592 /******************************************************************************
593 *
594 * Generic RX handler implementations
595 *
596 ******************************************************************************/
597 static void iwl_rx_reply_alive(struct iwl_priv *priv,
598 struct iwl_rx_mem_buffer *rxb)
599 {
600 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
601 struct iwl_alive_resp *palive;
602 struct delayed_work *pwork;
603
604 palive = &pkt->u.alive_frame;
605
606 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
607 "0x%01X 0x%01X\n",
608 palive->is_valid, palive->ver_type,
609 palive->ver_subtype);
610
611 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
612 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
613 memcpy(&priv->card_alive_init,
614 &pkt->u.alive_frame,
615 sizeof(struct iwl_init_alive_resp));
616 pwork = &priv->init_alive_start;
617 } else {
618 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
619 memcpy(&priv->card_alive, &pkt->u.alive_frame,
620 sizeof(struct iwl_alive_resp));
621 pwork = &priv->alive_start;
622 }
623
624 /* We delay the ALIVE response by 5ms to
625 * give the HW RF Kill time to activate... */
626 if (palive->is_valid == UCODE_VALID_OK)
627 queue_delayed_work(priv->workqueue, pwork,
628 msecs_to_jiffies(5));
629 else
630 IWL_WARN(priv, "uCode did not respond OK.\n");
631 }
632
633 static void iwl_bg_beacon_update(struct work_struct *work)
634 {
635 struct iwl_priv *priv =
636 container_of(work, struct iwl_priv, beacon_update);
637 struct sk_buff *beacon;
638
639 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
640 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
641
642 if (!beacon) {
643 IWL_ERR(priv, "update beacon failed\n");
644 return;
645 }
646
647 mutex_lock(&priv->mutex);
648 /* new beacon skb is allocated every time; dispose previous.*/
649 if (priv->ibss_beacon)
650 dev_kfree_skb(priv->ibss_beacon);
651
652 priv->ibss_beacon = beacon;
653 mutex_unlock(&priv->mutex);
654
655 iwl_send_beacon_cmd(priv);
656 }
657
658 /**
659 * iwl_bg_statistics_periodic - Timer callback to queue statistics
660 *
661 * This callback is provided in order to send a statistics request.
662 *
663 * This timer function is continually reset to execute within
664 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
665 * was received. We need to ensure we receive the statistics in order
666 * to update the temperature used for calibrating the TXPOWER.
667 */
668 static void iwl_bg_statistics_periodic(unsigned long data)
669 {
670 struct iwl_priv *priv = (struct iwl_priv *)data;
671
672 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
673 return;
674
675 /* dont send host command if rf-kill is on */
676 if (!iwl_is_ready_rf(priv))
677 return;
678
679 iwl_send_statistics_request(priv, CMD_ASYNC);
680 }
681
682 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
683 struct iwl_rx_mem_buffer *rxb)
684 {
685 #ifdef CONFIG_IWLWIFI_DEBUG
686 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
687 struct iwl4965_beacon_notif *beacon =
688 (struct iwl4965_beacon_notif *)pkt->u.raw;
689 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
690
691 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
692 "tsf %d %d rate %d\n",
693 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
694 beacon->beacon_notify_hdr.failure_frame,
695 le32_to_cpu(beacon->ibss_mgr_status),
696 le32_to_cpu(beacon->high_tsf),
697 le32_to_cpu(beacon->low_tsf), rate);
698 #endif
699
700 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
701 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
702 queue_work(priv->workqueue, &priv->beacon_update);
703 }
704
705 /* Handle notification from uCode that card's power state is changing
706 * due to software, hardware, or critical temperature RFKILL */
707 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
708 struct iwl_rx_mem_buffer *rxb)
709 {
710 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
711 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
712 unsigned long status = priv->status;
713
714 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
715 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
716 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
717
718 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
719 RF_CARD_DISABLED)) {
720
721 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
722 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
723
724 if (!iwl_grab_nic_access(priv)) {
725 iwl_write_direct32(
726 priv, HBUS_TARG_MBX_C,
727 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
728
729 iwl_release_nic_access(priv);
730 }
731
732 if (!(flags & RXON_CARD_DISABLED)) {
733 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
734 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
735 if (!iwl_grab_nic_access(priv)) {
736 iwl_write_direct32(
737 priv, HBUS_TARG_MBX_C,
738 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
739
740 iwl_release_nic_access(priv);
741 }
742 }
743
744 if (flags & RF_CARD_DISABLED) {
745 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
746 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
747 iwl_read32(priv, CSR_UCODE_DRV_GP1);
748 if (!iwl_grab_nic_access(priv))
749 iwl_release_nic_access(priv);
750 }
751 }
752
753 if (flags & HW_CARD_DISABLED)
754 set_bit(STATUS_RF_KILL_HW, &priv->status);
755 else
756 clear_bit(STATUS_RF_KILL_HW, &priv->status);
757
758
759 if (flags & SW_CARD_DISABLED)
760 set_bit(STATUS_RF_KILL_SW, &priv->status);
761 else
762 clear_bit(STATUS_RF_KILL_SW, &priv->status);
763
764 if (!(flags & RXON_CARD_DISABLED))
765 iwl_scan_cancel(priv);
766
767 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
768 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
769 (test_bit(STATUS_RF_KILL_SW, &status) !=
770 test_bit(STATUS_RF_KILL_SW, &priv->status)))
771 queue_work(priv->workqueue, &priv->rf_kill);
772 else
773 wake_up_interruptible(&priv->wait_command_queue);
774 }
775
776 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
777 {
778 int ret;
779 unsigned long flags;
780
781 spin_lock_irqsave(&priv->lock, flags);
782 ret = iwl_grab_nic_access(priv);
783 if (ret)
784 goto err;
785
786 if (src == IWL_PWR_SRC_VAUX) {
787 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
788 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
789 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
790 ~APMG_PS_CTRL_MSK_PWR_SRC);
791 } else {
792 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
793 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
794 ~APMG_PS_CTRL_MSK_PWR_SRC);
795 }
796
797 iwl_release_nic_access(priv);
798 err:
799 spin_unlock_irqrestore(&priv->lock, flags);
800 return ret;
801 }
802
803 /**
804 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
805 *
806 * Setup the RX handlers for each of the reply types sent from the uCode
807 * to the host.
808 *
809 * This function chains into the hardware specific files for them to setup
810 * any hardware specific handlers as well.
811 */
812 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
813 {
814 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
815 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
816 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
817 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
818 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
819 iwl_rx_pm_debug_statistics_notif;
820 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
821
822 /*
823 * The same handler is used for both the REPLY to a discrete
824 * statistics request from the host as well as for the periodic
825 * statistics notifications (after received beacons) from the uCode.
826 */
827 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
828 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
829
830 iwl_setup_spectrum_handlers(priv);
831 iwl_setup_rx_scan_handlers(priv);
832
833 /* status change handler */
834 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
835
836 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
837 iwl_rx_missed_beacon_notif;
838 /* Rx handlers */
839 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
840 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
841 /* block ack */
842 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
843 /* Set up hardware specific Rx handlers */
844 priv->cfg->ops->lib->rx_handler_setup(priv);
845 }
846
847 /**
848 * iwl_rx_handle - Main entry function for receiving responses from uCode
849 *
850 * Uses the priv->rx_handlers callback function array to invoke
851 * the appropriate handlers, including command responses,
852 * frame-received notifications, and other notifications.
853 */
854 void iwl_rx_handle(struct iwl_priv *priv)
855 {
856 struct iwl_rx_mem_buffer *rxb;
857 struct iwl_rx_packet *pkt;
858 struct iwl_rx_queue *rxq = &priv->rxq;
859 u32 r, i;
860 int reclaim;
861 unsigned long flags;
862 u8 fill_rx = 0;
863 u32 count = 8;
864
865 /* uCode's read index (stored in shared DRAM) indicates the last Rx
866 * buffer that the driver may process (last buffer filled by ucode). */
867 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
868 i = rxq->read;
869
870 /* Rx interrupt, but nothing sent from uCode */
871 if (i == r)
872 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
873
874 if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
875 fill_rx = 1;
876
877 while (i != r) {
878 rxb = rxq->queue[i];
879
880 /* If an RXB doesn't have a Rx queue slot associated with it,
881 * then a bug has been introduced in the queue refilling
882 * routines -- catch it here */
883 BUG_ON(rxb == NULL);
884
885 rxq->queue[i] = NULL;
886
887 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
888 priv->hw_params.rx_buf_size + 256,
889 PCI_DMA_FROMDEVICE);
890 pkt = (struct iwl_rx_packet *)rxb->skb->data;
891
892 /* Reclaim a command buffer only if this packet is a response
893 * to a (driver-originated) command.
894 * If the packet (e.g. Rx frame) originated from uCode,
895 * there is no command buffer to reclaim.
896 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
897 * but apparently a few don't get set; catch them here. */
898 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
899 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
900 (pkt->hdr.cmd != REPLY_RX) &&
901 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
902 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
903 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
904 (pkt->hdr.cmd != REPLY_TX);
905
906 /* Based on type of command response or notification,
907 * handle those that need handling via function in
908 * rx_handlers table. See iwl_setup_rx_handlers() */
909 if (priv->rx_handlers[pkt->hdr.cmd]) {
910 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
911 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
912 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
913 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
914 } else {
915 /* No handling needed */
916 IWL_DEBUG_RX(priv,
917 "r %d i %d No handler needed for %s, 0x%02x\n",
918 r, i, get_cmd_string(pkt->hdr.cmd),
919 pkt->hdr.cmd);
920 }
921
922 if (reclaim) {
923 /* Invoke any callbacks, transfer the skb to caller, and
924 * fire off the (possibly) blocking iwl_send_cmd()
925 * as we reclaim the driver command queue */
926 if (rxb && rxb->skb)
927 iwl_tx_cmd_complete(priv, rxb);
928 else
929 IWL_WARN(priv, "Claim null rxb?\n");
930 }
931
932 /* For now we just don't re-use anything. We can tweak this
933 * later to try and re-use notification packets and SKBs that
934 * fail to Rx correctly */
935 if (rxb->skb != NULL) {
936 priv->alloc_rxb_skb--;
937 dev_kfree_skb_any(rxb->skb);
938 rxb->skb = NULL;
939 }
940
941 spin_lock_irqsave(&rxq->lock, flags);
942 list_add_tail(&rxb->list, &priv->rxq.rx_used);
943 spin_unlock_irqrestore(&rxq->lock, flags);
944 i = (i + 1) & RX_QUEUE_MASK;
945 /* If there are a lot of unused frames,
946 * restock the Rx queue so ucode wont assert. */
947 if (fill_rx) {
948 count++;
949 if (count >= 8) {
950 priv->rxq.read = i;
951 iwl_rx_queue_restock(priv);
952 count = 0;
953 }
954 }
955 }
956
957 /* Backtrack one entry */
958 priv->rxq.read = i;
959 iwl_rx_queue_restock(priv);
960 }
961
962 /* call this function to flush any scheduled tasklet */
963 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
964 {
965 /* wait to make sure we flush pending tasklet*/
966 synchronize_irq(priv->pci_dev->irq);
967 tasklet_kill(&priv->irq_tasklet);
968 }
969
970 static void iwl_error_recovery(struct iwl_priv *priv)
971 {
972 unsigned long flags;
973
974 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
975 sizeof(priv->staging_rxon));
976 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
977 iwlcore_commit_rxon(priv);
978
979 iwl_rxon_add_station(priv, priv->bssid, 1);
980
981 spin_lock_irqsave(&priv->lock, flags);
982 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
983 priv->error_recovering = 0;
984 spin_unlock_irqrestore(&priv->lock, flags);
985 }
986
987 static void iwl_irq_tasklet(struct iwl_priv *priv)
988 {
989 u32 inta, handled = 0;
990 u32 inta_fh;
991 unsigned long flags;
992 #ifdef CONFIG_IWLWIFI_DEBUG
993 u32 inta_mask;
994 #endif
995
996 spin_lock_irqsave(&priv->lock, flags);
997
998 /* Ack/clear/reset pending uCode interrupts.
999 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1000 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1001 inta = iwl_read32(priv, CSR_INT);
1002 iwl_write32(priv, CSR_INT, inta);
1003
1004 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1005 * Any new interrupts that happen after this, either while we're
1006 * in this tasklet, or later, will show up in next ISR/tasklet. */
1007 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1008 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1009
1010 #ifdef CONFIG_IWLWIFI_DEBUG
1011 if (priv->debug_level & IWL_DL_ISR) {
1012 /* just for debug */
1013 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1014 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1015 inta, inta_mask, inta_fh);
1016 }
1017 #endif
1018
1019 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1020 * atomic, make sure that inta covers all the interrupts that
1021 * we've discovered, even if FH interrupt came in just after
1022 * reading CSR_INT. */
1023 if (inta_fh & CSR49_FH_INT_RX_MASK)
1024 inta |= CSR_INT_BIT_FH_RX;
1025 if (inta_fh & CSR49_FH_INT_TX_MASK)
1026 inta |= CSR_INT_BIT_FH_TX;
1027
1028 /* Now service all interrupt bits discovered above. */
1029 if (inta & CSR_INT_BIT_HW_ERR) {
1030 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
1031
1032 /* Tell the device to stop sending interrupts */
1033 iwl_disable_interrupts(priv);
1034
1035 priv->isr_stats.hw++;
1036 iwl_irq_handle_error(priv);
1037
1038 handled |= CSR_INT_BIT_HW_ERR;
1039
1040 spin_unlock_irqrestore(&priv->lock, flags);
1041
1042 return;
1043 }
1044
1045 #ifdef CONFIG_IWLWIFI_DEBUG
1046 if (priv->debug_level & (IWL_DL_ISR)) {
1047 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1048 if (inta & CSR_INT_BIT_SCD) {
1049 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1050 "the frame/frames.\n");
1051 priv->isr_stats.sch++;
1052 }
1053
1054 /* Alive notification via Rx interrupt will do the real work */
1055 if (inta & CSR_INT_BIT_ALIVE) {
1056 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1057 priv->isr_stats.alive++;
1058 }
1059 }
1060 #endif
1061 /* Safely ignore these bits for debug checks below */
1062 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1063
1064 /* HW RF KILL switch toggled */
1065 if (inta & CSR_INT_BIT_RF_KILL) {
1066 int hw_rf_kill = 0;
1067 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1068 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1069 hw_rf_kill = 1;
1070
1071 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1072 hw_rf_kill ? "disable radio" : "enable radio");
1073
1074 priv->isr_stats.rfkill++;
1075
1076 /* driver only loads ucode once setting the interface up.
1077 * the driver allows loading the ucode even if the radio
1078 * is killed. Hence update the killswitch state here. The
1079 * rfkill handler will care about restarting if needed.
1080 */
1081 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1082 if (hw_rf_kill)
1083 set_bit(STATUS_RF_KILL_HW, &priv->status);
1084 else
1085 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1086 queue_work(priv->workqueue, &priv->rf_kill);
1087 }
1088
1089 handled |= CSR_INT_BIT_RF_KILL;
1090 }
1091
1092 /* Chip got too hot and stopped itself */
1093 if (inta & CSR_INT_BIT_CT_KILL) {
1094 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1095 priv->isr_stats.ctkill++;
1096 handled |= CSR_INT_BIT_CT_KILL;
1097 }
1098
1099 /* Error detected by uCode */
1100 if (inta & CSR_INT_BIT_SW_ERR) {
1101 IWL_ERR(priv, "Microcode SW error detected. "
1102 " Restarting 0x%X.\n", inta);
1103 priv->isr_stats.sw++;
1104 priv->isr_stats.sw_err = inta;
1105 iwl_irq_handle_error(priv);
1106 handled |= CSR_INT_BIT_SW_ERR;
1107 }
1108
1109 /* uCode wakes up after power-down sleep */
1110 if (inta & CSR_INT_BIT_WAKEUP) {
1111 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1112 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1113 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1114 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1115 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1116 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1117 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1118 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1119
1120 priv->isr_stats.wakeup++;
1121
1122 handled |= CSR_INT_BIT_WAKEUP;
1123 }
1124
1125 /* All uCode command responses, including Tx command responses,
1126 * Rx "responses" (frame-received notification), and other
1127 * notifications from uCode come through here*/
1128 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1129 iwl_rx_handle(priv);
1130 priv->isr_stats.rx++;
1131 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1132 }
1133
1134 if (inta & CSR_INT_BIT_FH_TX) {
1135 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1136 priv->isr_stats.tx++;
1137 handled |= CSR_INT_BIT_FH_TX;
1138 /* FH finished to write, send event */
1139 priv->ucode_write_complete = 1;
1140 wake_up_interruptible(&priv->wait_command_queue);
1141 }
1142
1143 if (inta & ~handled) {
1144 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1145 priv->isr_stats.unhandled++;
1146 }
1147
1148 if (inta & ~CSR_INI_SET_MASK) {
1149 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1150 inta & ~CSR_INI_SET_MASK);
1151 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1152 }
1153
1154 /* Re-enable all interrupts */
1155 /* only Re-enable if diabled by irq */
1156 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1157 iwl_enable_interrupts(priv);
1158
1159 #ifdef CONFIG_IWLWIFI_DEBUG
1160 if (priv->debug_level & (IWL_DL_ISR)) {
1161 inta = iwl_read32(priv, CSR_INT);
1162 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1163 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1164 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1165 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1166 }
1167 #endif
1168 spin_unlock_irqrestore(&priv->lock, flags);
1169 }
1170
1171
1172 /******************************************************************************
1173 *
1174 * uCode download functions
1175 *
1176 ******************************************************************************/
1177
1178 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1179 {
1180 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1181 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1182 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1183 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1184 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1185 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1186 }
1187
1188 static void iwl_nic_start(struct iwl_priv *priv)
1189 {
1190 /* Remove all resets to allow NIC to operate */
1191 iwl_write32(priv, CSR_RESET, 0);
1192 }
1193
1194
1195 /**
1196 * iwl_read_ucode - Read uCode images from disk file.
1197 *
1198 * Copy into buffers for card to fetch via bus-mastering
1199 */
1200 static int iwl_read_ucode(struct iwl_priv *priv)
1201 {
1202 struct iwl_ucode *ucode;
1203 int ret = -EINVAL, index;
1204 const struct firmware *ucode_raw;
1205 const char *name_pre = priv->cfg->fw_name_pre;
1206 const unsigned int api_max = priv->cfg->ucode_api_max;
1207 const unsigned int api_min = priv->cfg->ucode_api_min;
1208 char buf[25];
1209 u8 *src;
1210 size_t len;
1211 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1212
1213 /* Ask kernel firmware_class module to get the boot firmware off disk.
1214 * request_firmware() is synchronous, file is in memory on return. */
1215 for (index = api_max; index >= api_min; index--) {
1216 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1217 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1218 if (ret < 0) {
1219 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1220 buf, ret);
1221 if (ret == -ENOENT)
1222 continue;
1223 else
1224 goto error;
1225 } else {
1226 if (index < api_max)
1227 IWL_ERR(priv, "Loaded firmware %s, "
1228 "which is deprecated. "
1229 "Please use API v%u instead.\n",
1230 buf, api_max);
1231
1232 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1233 buf, ucode_raw->size);
1234 break;
1235 }
1236 }
1237
1238 if (ret < 0)
1239 goto error;
1240
1241 /* Make sure that we got at least our header! */
1242 if (ucode_raw->size < sizeof(*ucode)) {
1243 IWL_ERR(priv, "File size way too small!\n");
1244 ret = -EINVAL;
1245 goto err_release;
1246 }
1247
1248 /* Data from ucode file: header followed by uCode images */
1249 ucode = (void *)ucode_raw->data;
1250
1251 priv->ucode_ver = le32_to_cpu(ucode->ver);
1252 api_ver = IWL_UCODE_API(priv->ucode_ver);
1253 inst_size = le32_to_cpu(ucode->inst_size);
1254 data_size = le32_to_cpu(ucode->data_size);
1255 init_size = le32_to_cpu(ucode->init_size);
1256 init_data_size = le32_to_cpu(ucode->init_data_size);
1257 boot_size = le32_to_cpu(ucode->boot_size);
1258
1259 /* api_ver should match the api version forming part of the
1260 * firmware filename ... but we don't check for that and only rely
1261 * on the API version read from firmware header from here on forward */
1262
1263 if (api_ver < api_min || api_ver > api_max) {
1264 IWL_ERR(priv, "Driver unable to support your firmware API. "
1265 "Driver supports v%u, firmware is v%u.\n",
1266 api_max, api_ver);
1267 priv->ucode_ver = 0;
1268 ret = -EINVAL;
1269 goto err_release;
1270 }
1271 if (api_ver != api_max)
1272 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1273 "got v%u. New firmware can be obtained "
1274 "from http://www.intellinuxwireless.org.\n",
1275 api_max, api_ver);
1276
1277 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1278 IWL_UCODE_MAJOR(priv->ucode_ver),
1279 IWL_UCODE_MINOR(priv->ucode_ver),
1280 IWL_UCODE_API(priv->ucode_ver),
1281 IWL_UCODE_SERIAL(priv->ucode_ver));
1282
1283 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1284 priv->ucode_ver);
1285 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1286 inst_size);
1287 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1288 data_size);
1289 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1290 init_size);
1291 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1292 init_data_size);
1293 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1294 boot_size);
1295
1296 /* Verify size of file vs. image size info in file's header */
1297 if (ucode_raw->size < sizeof(*ucode) +
1298 inst_size + data_size + init_size +
1299 init_data_size + boot_size) {
1300
1301 IWL_DEBUG_INFO(priv, "uCode file size %d too small\n",
1302 (int)ucode_raw->size);
1303 ret = -EINVAL;
1304 goto err_release;
1305 }
1306
1307 /* Verify that uCode images will fit in card's SRAM */
1308 if (inst_size > priv->hw_params.max_inst_size) {
1309 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1310 inst_size);
1311 ret = -EINVAL;
1312 goto err_release;
1313 }
1314
1315 if (data_size > priv->hw_params.max_data_size) {
1316 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1317 data_size);
1318 ret = -EINVAL;
1319 goto err_release;
1320 }
1321 if (init_size > priv->hw_params.max_inst_size) {
1322 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1323 init_size);
1324 ret = -EINVAL;
1325 goto err_release;
1326 }
1327 if (init_data_size > priv->hw_params.max_data_size) {
1328 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1329 init_data_size);
1330 ret = -EINVAL;
1331 goto err_release;
1332 }
1333 if (boot_size > priv->hw_params.max_bsm_size) {
1334 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1335 boot_size);
1336 ret = -EINVAL;
1337 goto err_release;
1338 }
1339
1340 /* Allocate ucode buffers for card's bus-master loading ... */
1341
1342 /* Runtime instructions and 2 copies of data:
1343 * 1) unmodified from disk
1344 * 2) backup cache for save/restore during power-downs */
1345 priv->ucode_code.len = inst_size;
1346 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1347
1348 priv->ucode_data.len = data_size;
1349 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1350
1351 priv->ucode_data_backup.len = data_size;
1352 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1353
1354 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1355 !priv->ucode_data_backup.v_addr)
1356 goto err_pci_alloc;
1357
1358 /* Initialization instructions and data */
1359 if (init_size && init_data_size) {
1360 priv->ucode_init.len = init_size;
1361 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1362
1363 priv->ucode_init_data.len = init_data_size;
1364 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1365
1366 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1367 goto err_pci_alloc;
1368 }
1369
1370 /* Bootstrap (instructions only, no data) */
1371 if (boot_size) {
1372 priv->ucode_boot.len = boot_size;
1373 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1374
1375 if (!priv->ucode_boot.v_addr)
1376 goto err_pci_alloc;
1377 }
1378
1379 /* Copy images into buffers for card's bus-master reads ... */
1380
1381 /* Runtime instructions (first block of data in file) */
1382 src = &ucode->data[0];
1383 len = priv->ucode_code.len;
1384 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1385 memcpy(priv->ucode_code.v_addr, src, len);
1386 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1387 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1388
1389 /* Runtime data (2nd block)
1390 * NOTE: Copy into backup buffer will be done in iwl_up() */
1391 src = &ucode->data[inst_size];
1392 len = priv->ucode_data.len;
1393 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1394 memcpy(priv->ucode_data.v_addr, src, len);
1395 memcpy(priv->ucode_data_backup.v_addr, src, len);
1396
1397 /* Initialization instructions (3rd block) */
1398 if (init_size) {
1399 src = &ucode->data[inst_size + data_size];
1400 len = priv->ucode_init.len;
1401 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1402 len);
1403 memcpy(priv->ucode_init.v_addr, src, len);
1404 }
1405
1406 /* Initialization data (4th block) */
1407 if (init_data_size) {
1408 src = &ucode->data[inst_size + data_size + init_size];
1409 len = priv->ucode_init_data.len;
1410 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1411 len);
1412 memcpy(priv->ucode_init_data.v_addr, src, len);
1413 }
1414
1415 /* Bootstrap instructions (5th block) */
1416 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1417 len = priv->ucode_boot.len;
1418 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1419 memcpy(priv->ucode_boot.v_addr, src, len);
1420
1421 /* We have our copies now, allow OS release its copies */
1422 release_firmware(ucode_raw);
1423 return 0;
1424
1425 err_pci_alloc:
1426 IWL_ERR(priv, "failed to allocate pci memory\n");
1427 ret = -ENOMEM;
1428 iwl_dealloc_ucode_pci(priv);
1429
1430 err_release:
1431 release_firmware(ucode_raw);
1432
1433 error:
1434 return ret;
1435 }
1436
1437 /**
1438 * iwl_alive_start - called after REPLY_ALIVE notification received
1439 * from protocol/runtime uCode (initialization uCode's
1440 * Alive gets handled by iwl_init_alive_start()).
1441 */
1442 static void iwl_alive_start(struct iwl_priv *priv)
1443 {
1444 int ret = 0;
1445
1446 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1447
1448 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1449 /* We had an error bringing up the hardware, so take it
1450 * all the way back down so we can try again */
1451 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1452 goto restart;
1453 }
1454
1455 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1456 * This is a paranoid check, because we would not have gotten the
1457 * "runtime" alive if code weren't properly loaded. */
1458 if (iwl_verify_ucode(priv)) {
1459 /* Runtime instruction load was bad;
1460 * take it all the way back down so we can try again */
1461 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1462 goto restart;
1463 }
1464
1465 priv->cfg->ops->smgmt->clear_station_table(priv);
1466 ret = priv->cfg->ops->lib->alive_notify(priv);
1467 if (ret) {
1468 IWL_WARN(priv,
1469 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1470 goto restart;
1471 }
1472
1473 /* After the ALIVE response, we can send host commands to the uCode */
1474 set_bit(STATUS_ALIVE, &priv->status);
1475
1476 if (iwl_is_rfkill(priv))
1477 return;
1478
1479 ieee80211_wake_queues(priv->hw);
1480
1481 priv->active_rate = priv->rates_mask;
1482 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1483
1484 if (iwl_is_associated(priv)) {
1485 struct iwl_rxon_cmd *active_rxon =
1486 (struct iwl_rxon_cmd *)&priv->active_rxon;
1487 /* apply any changes in staging */
1488 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1489 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1490 } else {
1491 /* Initialize our rx_config data */
1492 iwl_connection_init_rx_config(priv, priv->iw_mode);
1493
1494 if (priv->cfg->ops->hcmd->set_rxon_chain)
1495 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1496
1497 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1498 }
1499
1500 /* Configure Bluetooth device coexistence support */
1501 iwl_send_bt_config(priv);
1502
1503 iwl_reset_run_time_calib(priv);
1504
1505 /* Configure the adapter for unassociated operation */
1506 iwlcore_commit_rxon(priv);
1507
1508 /* At this point, the NIC is initialized and operational */
1509 iwl_rf_kill_ct_config(priv);
1510
1511 iwl_leds_register(priv);
1512
1513 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1514 set_bit(STATUS_READY, &priv->status);
1515 wake_up_interruptible(&priv->wait_command_queue);
1516
1517 if (priv->error_recovering)
1518 iwl_error_recovery(priv);
1519
1520 iwl_power_update_mode(priv, 1);
1521
1522 /* reassociate for ADHOC mode */
1523 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1524 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1525 priv->vif);
1526 if (beacon)
1527 iwl_mac_beacon_update(priv->hw, beacon);
1528 }
1529
1530
1531 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1532 iwl_set_mode(priv, priv->iw_mode);
1533
1534 return;
1535
1536 restart:
1537 queue_work(priv->workqueue, &priv->restart);
1538 }
1539
1540 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1541
1542 static void __iwl_down(struct iwl_priv *priv)
1543 {
1544 unsigned long flags;
1545 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1546
1547 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1548
1549 if (!exit_pending)
1550 set_bit(STATUS_EXIT_PENDING, &priv->status);
1551
1552 iwl_leds_unregister(priv);
1553
1554 priv->cfg->ops->smgmt->clear_station_table(priv);
1555
1556 /* Unblock any waiting calls */
1557 wake_up_interruptible_all(&priv->wait_command_queue);
1558
1559 /* Wipe out the EXIT_PENDING status bit if we are not actually
1560 * exiting the module */
1561 if (!exit_pending)
1562 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1563
1564 /* stop and reset the on-board processor */
1565 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1566
1567 /* tell the device to stop sending interrupts */
1568 spin_lock_irqsave(&priv->lock, flags);
1569 iwl_disable_interrupts(priv);
1570 spin_unlock_irqrestore(&priv->lock, flags);
1571 iwl_synchronize_irq(priv);
1572
1573 if (priv->mac80211_registered)
1574 ieee80211_stop_queues(priv->hw);
1575
1576 /* If we have not previously called iwl_init() then
1577 * clear all bits but the RF Kill bits and return */
1578 if (!iwl_is_init(priv)) {
1579 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1580 STATUS_RF_KILL_HW |
1581 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1582 STATUS_RF_KILL_SW |
1583 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1584 STATUS_GEO_CONFIGURED |
1585 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1586 STATUS_EXIT_PENDING;
1587 goto exit;
1588 }
1589
1590 /* ...otherwise clear out all the status bits but the RF Kill
1591 * bits and continue taking the NIC down. */
1592 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1593 STATUS_RF_KILL_HW |
1594 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1595 STATUS_RF_KILL_SW |
1596 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1597 STATUS_GEO_CONFIGURED |
1598 test_bit(STATUS_FW_ERROR, &priv->status) <<
1599 STATUS_FW_ERROR |
1600 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1601 STATUS_EXIT_PENDING;
1602
1603 spin_lock_irqsave(&priv->lock, flags);
1604 iwl_clear_bit(priv, CSR_GP_CNTRL,
1605 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1606 spin_unlock_irqrestore(&priv->lock, flags);
1607
1608 iwl_txq_ctx_stop(priv);
1609 iwl_rxq_stop(priv);
1610
1611 spin_lock_irqsave(&priv->lock, flags);
1612 if (!iwl_grab_nic_access(priv)) {
1613 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1614 APMG_CLK_VAL_DMA_CLK_RQT);
1615 iwl_release_nic_access(priv);
1616 }
1617 spin_unlock_irqrestore(&priv->lock, flags);
1618
1619 udelay(5);
1620
1621 /* FIXME: apm_ops.suspend(priv) */
1622 if (exit_pending)
1623 priv->cfg->ops->lib->apm_ops.stop(priv);
1624 else
1625 priv->cfg->ops->lib->apm_ops.reset(priv);
1626 exit:
1627 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1628
1629 if (priv->ibss_beacon)
1630 dev_kfree_skb(priv->ibss_beacon);
1631 priv->ibss_beacon = NULL;
1632
1633 /* clear out any free frames */
1634 iwl_clear_free_frames(priv);
1635 }
1636
1637 static void iwl_down(struct iwl_priv *priv)
1638 {
1639 mutex_lock(&priv->mutex);
1640 __iwl_down(priv);
1641 mutex_unlock(&priv->mutex);
1642
1643 iwl_cancel_deferred_work(priv);
1644 }
1645
1646 #define MAX_HW_RESTARTS 5
1647
1648 static int __iwl_up(struct iwl_priv *priv)
1649 {
1650 int i;
1651 int ret;
1652
1653 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1654 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1655 return -EIO;
1656 }
1657
1658 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1659 IWL_ERR(priv, "ucode not available for device bringup\n");
1660 return -EIO;
1661 }
1662
1663 /* If platform's RF_KILL switch is NOT set to KILL */
1664 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1665 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1666 else
1667 set_bit(STATUS_RF_KILL_HW, &priv->status);
1668
1669 if (iwl_is_rfkill(priv)) {
1670 iwl_enable_interrupts(priv);
1671 IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n",
1672 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
1673 return 0;
1674 }
1675
1676 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1677
1678 ret = iwl_hw_nic_init(priv);
1679 if (ret) {
1680 IWL_ERR(priv, "Unable to init nic\n");
1681 return ret;
1682 }
1683
1684 /* make sure rfkill handshake bits are cleared */
1685 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1686 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1687 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1688
1689 /* clear (again), then enable host interrupts */
1690 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1691 iwl_enable_interrupts(priv);
1692
1693 /* really make sure rfkill handshake bits are cleared */
1694 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1695 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1696
1697 /* Copy original ucode data image from disk into backup cache.
1698 * This will be used to initialize the on-board processor's
1699 * data SRAM for a clean start when the runtime program first loads. */
1700 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
1701 priv->ucode_data.len);
1702
1703 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1704
1705 priv->cfg->ops->smgmt->clear_station_table(priv);
1706
1707 /* load bootstrap state machine,
1708 * load bootstrap program into processor's memory,
1709 * prepare to load the "initialize" uCode */
1710 ret = priv->cfg->ops->lib->load_ucode(priv);
1711
1712 if (ret) {
1713 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1714 ret);
1715 continue;
1716 }
1717
1718 /* Clear out the uCode error bit if it is set */
1719 clear_bit(STATUS_FW_ERROR, &priv->status);
1720
1721 /* start card; "initialize" will load runtime ucode */
1722 iwl_nic_start(priv);
1723
1724 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
1725
1726 return 0;
1727 }
1728
1729 set_bit(STATUS_EXIT_PENDING, &priv->status);
1730 __iwl_down(priv);
1731 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1732
1733 /* tried to restart and config the device for as long as our
1734 * patience could withstand */
1735 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
1736 return -EIO;
1737 }
1738
1739
1740 /*****************************************************************************
1741 *
1742 * Workqueue callbacks
1743 *
1744 *****************************************************************************/
1745
1746 static void iwl_bg_init_alive_start(struct work_struct *data)
1747 {
1748 struct iwl_priv *priv =
1749 container_of(data, struct iwl_priv, init_alive_start.work);
1750
1751 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1752 return;
1753
1754 mutex_lock(&priv->mutex);
1755 priv->cfg->ops->lib->init_alive_start(priv);
1756 mutex_unlock(&priv->mutex);
1757 }
1758
1759 static void iwl_bg_alive_start(struct work_struct *data)
1760 {
1761 struct iwl_priv *priv =
1762 container_of(data, struct iwl_priv, alive_start.work);
1763
1764 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1765 return;
1766
1767 mutex_lock(&priv->mutex);
1768 iwl_alive_start(priv);
1769 mutex_unlock(&priv->mutex);
1770 }
1771
1772 static void iwl_bg_run_time_calib_work(struct work_struct *work)
1773 {
1774 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1775 run_time_calib_work);
1776
1777 mutex_lock(&priv->mutex);
1778
1779 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1780 test_bit(STATUS_SCANNING, &priv->status)) {
1781 mutex_unlock(&priv->mutex);
1782 return;
1783 }
1784
1785 if (priv->start_calib) {
1786 iwl_chain_noise_calibration(priv, &priv->statistics);
1787
1788 iwl_sensitivity_calibration(priv, &priv->statistics);
1789 }
1790
1791 mutex_unlock(&priv->mutex);
1792 return;
1793 }
1794
1795 static void iwl_bg_up(struct work_struct *data)
1796 {
1797 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
1798
1799 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1800 return;
1801
1802 mutex_lock(&priv->mutex);
1803 __iwl_up(priv);
1804 mutex_unlock(&priv->mutex);
1805 iwl_rfkill_set_hw_state(priv);
1806 }
1807
1808 static void iwl_bg_restart(struct work_struct *data)
1809 {
1810 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
1811
1812 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1813 return;
1814
1815 iwl_down(priv);
1816 queue_work(priv->workqueue, &priv->up);
1817 }
1818
1819 static void iwl_bg_rx_replenish(struct work_struct *data)
1820 {
1821 struct iwl_priv *priv =
1822 container_of(data, struct iwl_priv, rx_replenish);
1823
1824 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1825 return;
1826
1827 mutex_lock(&priv->mutex);
1828 iwl_rx_replenish(priv);
1829 mutex_unlock(&priv->mutex);
1830 }
1831
1832 #define IWL_DELAY_NEXT_SCAN (HZ*2)
1833
1834 void iwl_post_associate(struct iwl_priv *priv)
1835 {
1836 struct ieee80211_conf *conf = NULL;
1837 int ret = 0;
1838 unsigned long flags;
1839
1840 if (priv->iw_mode == NL80211_IFTYPE_AP) {
1841 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
1842 return;
1843 }
1844
1845 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
1846 priv->assoc_id, priv->active_rxon.bssid_addr);
1847
1848
1849 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1850 return;
1851
1852
1853 if (!priv->vif || !priv->is_open)
1854 return;
1855
1856 iwl_power_cancel_timeout(priv);
1857 iwl_scan_cancel_timeout(priv, 200);
1858
1859 conf = ieee80211_get_hw_conf(priv->hw);
1860
1861 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1862 iwlcore_commit_rxon(priv);
1863
1864 iwl_setup_rxon_timing(priv);
1865 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
1866 sizeof(priv->rxon_timing), &priv->rxon_timing);
1867 if (ret)
1868 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
1869 "Attempting to continue.\n");
1870
1871 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1872
1873 iwl_set_rxon_ht(priv, &priv->current_ht_config);
1874
1875 if (priv->cfg->ops->hcmd->set_rxon_chain)
1876 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1877
1878 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
1879
1880 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
1881 priv->assoc_id, priv->beacon_int);
1882
1883 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
1884 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1885 else
1886 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1887
1888 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
1889 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1890 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1891 else
1892 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1893
1894 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1895 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1896
1897 }
1898
1899 iwlcore_commit_rxon(priv);
1900
1901 switch (priv->iw_mode) {
1902 case NL80211_IFTYPE_STATION:
1903 break;
1904
1905 case NL80211_IFTYPE_ADHOC:
1906
1907 /* assume default assoc id */
1908 priv->assoc_id = 1;
1909
1910 iwl_rxon_add_station(priv, priv->bssid, 0);
1911 iwl_send_beacon_cmd(priv);
1912
1913 break;
1914
1915 default:
1916 IWL_ERR(priv, "%s Should not be called in %d mode\n",
1917 __func__, priv->iw_mode);
1918 break;
1919 }
1920
1921 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1922 priv->assoc_station_added = 1;
1923
1924 spin_lock_irqsave(&priv->lock, flags);
1925 iwl_activate_qos(priv, 0);
1926 spin_unlock_irqrestore(&priv->lock, flags);
1927
1928 /* the chain noise calibration will enabled PM upon completion
1929 * If chain noise has already been run, then we need to enable
1930 * power management here */
1931 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
1932 iwl_power_enable_management(priv);
1933
1934 /* Enable Rx differential gain and sensitivity calibrations */
1935 iwl_chain_noise_reset(priv);
1936 priv->start_calib = 1;
1937
1938 }
1939
1940 /*****************************************************************************
1941 *
1942 * mac80211 entry point functions
1943 *
1944 *****************************************************************************/
1945
1946 #define UCODE_READY_TIMEOUT (4 * HZ)
1947
1948 static int iwl_mac_start(struct ieee80211_hw *hw)
1949 {
1950 struct iwl_priv *priv = hw->priv;
1951 int ret;
1952
1953 IWL_DEBUG_MAC80211(priv, "enter\n");
1954
1955 /* we should be verifying the device is ready to be opened */
1956 mutex_lock(&priv->mutex);
1957
1958 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
1959 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
1960 * ucode filename and max sizes are card-specific. */
1961
1962 if (!priv->ucode_code.len) {
1963 ret = iwl_read_ucode(priv);
1964 if (ret) {
1965 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
1966 mutex_unlock(&priv->mutex);
1967 return ret;
1968 }
1969 }
1970
1971 ret = __iwl_up(priv);
1972
1973 mutex_unlock(&priv->mutex);
1974
1975 iwl_rfkill_set_hw_state(priv);
1976
1977 if (ret)
1978 return ret;
1979
1980 if (iwl_is_rfkill(priv))
1981 goto out;
1982
1983 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
1984
1985 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
1986 * mac80211 will not be run successfully. */
1987 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
1988 test_bit(STATUS_READY, &priv->status),
1989 UCODE_READY_TIMEOUT);
1990 if (!ret) {
1991 if (!test_bit(STATUS_READY, &priv->status)) {
1992 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
1993 jiffies_to_msecs(UCODE_READY_TIMEOUT));
1994 return -ETIMEDOUT;
1995 }
1996 }
1997
1998 out:
1999 priv->is_open = 1;
2000 IWL_DEBUG_MAC80211(priv, "leave\n");
2001 return 0;
2002 }
2003
2004 static void iwl_mac_stop(struct ieee80211_hw *hw)
2005 {
2006 struct iwl_priv *priv = hw->priv;
2007
2008 IWL_DEBUG_MAC80211(priv, "enter\n");
2009
2010 if (!priv->is_open) {
2011 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
2012 return;
2013 }
2014
2015 priv->is_open = 0;
2016
2017 if (iwl_is_ready_rf(priv)) {
2018 /* stop mac, cancel any scan request and clear
2019 * RXON_FILTER_ASSOC_MSK BIT
2020 */
2021 mutex_lock(&priv->mutex);
2022 iwl_scan_cancel_timeout(priv, 100);
2023 mutex_unlock(&priv->mutex);
2024 }
2025
2026 iwl_down(priv);
2027
2028 flush_workqueue(priv->workqueue);
2029
2030 /* enable interrupts again in order to receive rfkill changes */
2031 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2032 iwl_enable_interrupts(priv);
2033
2034 IWL_DEBUG_MAC80211(priv, "leave\n");
2035 }
2036
2037 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2038 {
2039 struct iwl_priv *priv = hw->priv;
2040
2041 IWL_DEBUG_MACDUMP(priv, "enter\n");
2042
2043 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2044 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2045
2046 if (iwl_tx_skb(priv, skb))
2047 dev_kfree_skb_any(skb);
2048
2049 IWL_DEBUG_MACDUMP(priv, "leave\n");
2050 return NETDEV_TX_OK;
2051 }
2052
2053 void iwl_config_ap(struct iwl_priv *priv)
2054 {
2055 int ret = 0;
2056 unsigned long flags;
2057
2058 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2059 return;
2060
2061 /* The following should be done only at AP bring up */
2062 if (!iwl_is_associated(priv)) {
2063
2064 /* RXON - unassoc (to set timing command) */
2065 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2066 iwlcore_commit_rxon(priv);
2067
2068 /* RXON Timing */
2069 iwl_setup_rxon_timing(priv);
2070 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2071 sizeof(priv->rxon_timing), &priv->rxon_timing);
2072 if (ret)
2073 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2074 "Attempting to continue.\n");
2075
2076 if (priv->cfg->ops->hcmd->set_rxon_chain)
2077 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2078
2079 /* FIXME: what should be the assoc_id for AP? */
2080 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2081 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2082 priv->staging_rxon.flags |=
2083 RXON_FLG_SHORT_PREAMBLE_MSK;
2084 else
2085 priv->staging_rxon.flags &=
2086 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2087
2088 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2089 if (priv->assoc_capability &
2090 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2091 priv->staging_rxon.flags |=
2092 RXON_FLG_SHORT_SLOT_MSK;
2093 else
2094 priv->staging_rxon.flags &=
2095 ~RXON_FLG_SHORT_SLOT_MSK;
2096
2097 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2098 priv->staging_rxon.flags &=
2099 ~RXON_FLG_SHORT_SLOT_MSK;
2100 }
2101 /* restore RXON assoc */
2102 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2103 iwlcore_commit_rxon(priv);
2104 spin_lock_irqsave(&priv->lock, flags);
2105 iwl_activate_qos(priv, 1);
2106 spin_unlock_irqrestore(&priv->lock, flags);
2107 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2108 }
2109 iwl_send_beacon_cmd(priv);
2110
2111 /* FIXME - we need to add code here to detect a totally new
2112 * configuration, reset the AP, unassoc, rxon timing, assoc,
2113 * clear sta table, add BCAST sta... */
2114 }
2115
2116 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2117 struct ieee80211_key_conf *keyconf, const u8 *addr,
2118 u32 iv32, u16 *phase1key)
2119 {
2120
2121 struct iwl_priv *priv = hw->priv;
2122 IWL_DEBUG_MAC80211(priv, "enter\n");
2123
2124 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2125
2126 IWL_DEBUG_MAC80211(priv, "leave\n");
2127 }
2128
2129 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2130 struct ieee80211_vif *vif,
2131 struct ieee80211_sta *sta,
2132 struct ieee80211_key_conf *key)
2133 {
2134 struct iwl_priv *priv = hw->priv;
2135 const u8 *addr;
2136 int ret;
2137 u8 sta_id;
2138 bool is_default_wep_key = false;
2139
2140 IWL_DEBUG_MAC80211(priv, "enter\n");
2141
2142 if (priv->hw_params.sw_crypto) {
2143 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2144 return -EOPNOTSUPP;
2145 }
2146 addr = sta ? sta->addr : iwl_bcast_addr;
2147 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
2148 if (sta_id == IWL_INVALID_STATION) {
2149 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2150 addr);
2151 return -EINVAL;
2152
2153 }
2154
2155 mutex_lock(&priv->mutex);
2156 iwl_scan_cancel_timeout(priv, 100);
2157 mutex_unlock(&priv->mutex);
2158
2159 /* If we are getting WEP group key and we didn't receive any key mapping
2160 * so far, we are in legacy wep mode (group key only), otherwise we are
2161 * in 1X mode.
2162 * In legacy wep mode, we use another host command to the uCode */
2163 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2164 priv->iw_mode != NL80211_IFTYPE_AP) {
2165 if (cmd == SET_KEY)
2166 is_default_wep_key = !priv->key_mapping_key;
2167 else
2168 is_default_wep_key =
2169 (key->hw_key_idx == HW_KEY_DEFAULT);
2170 }
2171
2172 switch (cmd) {
2173 case SET_KEY:
2174 if (is_default_wep_key)
2175 ret = iwl_set_default_wep_key(priv, key);
2176 else
2177 ret = iwl_set_dynamic_key(priv, key, sta_id);
2178
2179 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2180 break;
2181 case DISABLE_KEY:
2182 if (is_default_wep_key)
2183 ret = iwl_remove_default_wep_key(priv, key);
2184 else
2185 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2186
2187 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2188 break;
2189 default:
2190 ret = -EINVAL;
2191 }
2192
2193 IWL_DEBUG_MAC80211(priv, "leave\n");
2194
2195 return ret;
2196 }
2197
2198 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2199 enum ieee80211_ampdu_mlme_action action,
2200 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2201 {
2202 struct iwl_priv *priv = hw->priv;
2203 int ret;
2204
2205 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2206 sta->addr, tid);
2207
2208 if (!(priv->cfg->sku & IWL_SKU_N))
2209 return -EACCES;
2210
2211 switch (action) {
2212 case IEEE80211_AMPDU_RX_START:
2213 IWL_DEBUG_HT(priv, "start Rx\n");
2214 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2215 case IEEE80211_AMPDU_RX_STOP:
2216 IWL_DEBUG_HT(priv, "stop Rx\n");
2217 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2218 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2219 return 0;
2220 else
2221 return ret;
2222 case IEEE80211_AMPDU_TX_START:
2223 IWL_DEBUG_HT(priv, "start Tx\n");
2224 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2225 case IEEE80211_AMPDU_TX_STOP:
2226 IWL_DEBUG_HT(priv, "stop Tx\n");
2227 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2228 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2229 return 0;
2230 else
2231 return ret;
2232 default:
2233 IWL_DEBUG_HT(priv, "unknown\n");
2234 return -EINVAL;
2235 break;
2236 }
2237 return 0;
2238 }
2239
2240 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2241 struct ieee80211_low_level_stats *stats)
2242 {
2243 struct iwl_priv *priv = hw->priv;
2244
2245 priv = hw->priv;
2246 IWL_DEBUG_MAC80211(priv, "enter\n");
2247 IWL_DEBUG_MAC80211(priv, "leave\n");
2248
2249 return 0;
2250 }
2251
2252 /*****************************************************************************
2253 *
2254 * sysfs attributes
2255 *
2256 *****************************************************************************/
2257
2258 #ifdef CONFIG_IWLWIFI_DEBUG
2259
2260 /*
2261 * The following adds a new attribute to the sysfs representation
2262 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2263 * used for controlling the debug level.
2264 *
2265 * See the level definitions in iwl for details.
2266 */
2267
2268 static ssize_t show_debug_level(struct device *d,
2269 struct device_attribute *attr, char *buf)
2270 {
2271 struct iwl_priv *priv = d->driver_data;
2272
2273 return sprintf(buf, "0x%08X\n", priv->debug_level);
2274 }
2275 static ssize_t store_debug_level(struct device *d,
2276 struct device_attribute *attr,
2277 const char *buf, size_t count)
2278 {
2279 struct iwl_priv *priv = d->driver_data;
2280 unsigned long val;
2281 int ret;
2282
2283 ret = strict_strtoul(buf, 0, &val);
2284 if (ret)
2285 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2286 else
2287 priv->debug_level = val;
2288
2289 return strnlen(buf, count);
2290 }
2291
2292 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2293 show_debug_level, store_debug_level);
2294
2295
2296 #endif /* CONFIG_IWLWIFI_DEBUG */
2297
2298
2299 static ssize_t show_version(struct device *d,
2300 struct device_attribute *attr, char *buf)
2301 {
2302 struct iwl_priv *priv = d->driver_data;
2303 struct iwl_alive_resp *palive = &priv->card_alive;
2304 ssize_t pos = 0;
2305 u16 eeprom_ver;
2306
2307 if (palive->is_valid)
2308 pos += sprintf(buf + pos,
2309 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
2310 "fw type: 0x%01X 0x%01X\n",
2311 palive->ucode_major, palive->ucode_minor,
2312 palive->sw_rev[0], palive->sw_rev[1],
2313 palive->ver_type, palive->ver_subtype);
2314 else
2315 pos += sprintf(buf + pos, "fw not loaded\n");
2316
2317 if (priv->eeprom) {
2318 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2319 pos += sprintf(buf + pos, "EEPROM version: 0x%x\n",
2320 eeprom_ver);
2321 } else {
2322 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2323 }
2324
2325 return pos;
2326 }
2327
2328 static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2329
2330 static ssize_t show_temperature(struct device *d,
2331 struct device_attribute *attr, char *buf)
2332 {
2333 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
2334
2335 if (!iwl_is_alive(priv))
2336 return -EAGAIN;
2337
2338 return sprintf(buf, "%d\n", priv->temperature);
2339 }
2340
2341 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2342
2343 static ssize_t show_tx_power(struct device *d,
2344 struct device_attribute *attr, char *buf)
2345 {
2346 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
2347
2348 if (!iwl_is_ready_rf(priv))
2349 return sprintf(buf, "off\n");
2350 else
2351 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2352 }
2353
2354 static ssize_t store_tx_power(struct device *d,
2355 struct device_attribute *attr,
2356 const char *buf, size_t count)
2357 {
2358 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
2359 unsigned long val;
2360 int ret;
2361
2362 ret = strict_strtoul(buf, 10, &val);
2363 if (ret)
2364 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2365 else
2366 iwl_set_tx_power(priv, val, false);
2367
2368 return count;
2369 }
2370
2371 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2372
2373 static ssize_t show_flags(struct device *d,
2374 struct device_attribute *attr, char *buf)
2375 {
2376 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
2377
2378 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2379 }
2380
2381 static ssize_t store_flags(struct device *d,
2382 struct device_attribute *attr,
2383 const char *buf, size_t count)
2384 {
2385 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
2386 unsigned long val;
2387 u32 flags;
2388 int ret = strict_strtoul(buf, 0, &val);
2389 if (ret)
2390 return ret;
2391 flags = (u32)val;
2392
2393 mutex_lock(&priv->mutex);
2394 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2395 /* Cancel any currently running scans... */
2396 if (iwl_scan_cancel_timeout(priv, 100))
2397 IWL_WARN(priv, "Could not cancel scan.\n");
2398 else {
2399 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2400 priv->staging_rxon.flags = cpu_to_le32(flags);
2401 iwlcore_commit_rxon(priv);
2402 }
2403 }
2404 mutex_unlock(&priv->mutex);
2405
2406 return count;
2407 }
2408
2409 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2410
2411 static ssize_t show_filter_flags(struct device *d,
2412 struct device_attribute *attr, char *buf)
2413 {
2414 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
2415
2416 return sprintf(buf, "0x%04X\n",
2417 le32_to_cpu(priv->active_rxon.filter_flags));
2418 }
2419
2420 static ssize_t store_filter_flags(struct device *d,
2421 struct device_attribute *attr,
2422 const char *buf, size_t count)
2423 {
2424 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
2425 unsigned long val;
2426 u32 filter_flags;
2427 int ret = strict_strtoul(buf, 0, &val);
2428 if (ret)
2429 return ret;
2430 filter_flags = (u32)val;
2431
2432 mutex_lock(&priv->mutex);
2433 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2434 /* Cancel any currently running scans... */
2435 if (iwl_scan_cancel_timeout(priv, 100))
2436 IWL_WARN(priv, "Could not cancel scan.\n");
2437 else {
2438 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2439 "0x%04X\n", filter_flags);
2440 priv->staging_rxon.filter_flags =
2441 cpu_to_le32(filter_flags);
2442 iwlcore_commit_rxon(priv);
2443 }
2444 }
2445 mutex_unlock(&priv->mutex);
2446
2447 return count;
2448 }
2449
2450 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2451 store_filter_flags);
2452
2453 static ssize_t store_power_level(struct device *d,
2454 struct device_attribute *attr,
2455 const char *buf, size_t count)
2456 {
2457 struct iwl_priv *priv = dev_get_drvdata(d);
2458 int ret;
2459 unsigned long mode;
2460
2461
2462 mutex_lock(&priv->mutex);
2463
2464 ret = strict_strtoul(buf, 10, &mode);
2465 if (ret)
2466 goto out;
2467
2468 ret = iwl_power_set_user_mode(priv, mode);
2469 if (ret) {
2470 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
2471 goto out;
2472 }
2473 ret = count;
2474
2475 out:
2476 mutex_unlock(&priv->mutex);
2477 return ret;
2478 }
2479
2480 static ssize_t show_power_level(struct device *d,
2481 struct device_attribute *attr, char *buf)
2482 {
2483 struct iwl_priv *priv = dev_get_drvdata(d);
2484 int mode = priv->power_data.user_power_setting;
2485 int system = priv->power_data.system_power_setting;
2486 int level = priv->power_data.power_mode;
2487 char *p = buf;
2488
2489 switch (system) {
2490 case IWL_POWER_SYS_AUTO:
2491 p += sprintf(p, "SYSTEM:auto");
2492 break;
2493 case IWL_POWER_SYS_AC:
2494 p += sprintf(p, "SYSTEM:ac");
2495 break;
2496 case IWL_POWER_SYS_BATTERY:
2497 p += sprintf(p, "SYSTEM:battery");
2498 break;
2499 }
2500
2501 p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
2502 "fixed" : "auto");
2503 p += sprintf(p, "\tINDEX:%d", level);
2504 p += sprintf(p, "\n");
2505 return p - buf + 1;
2506 }
2507
2508 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
2509 store_power_level);
2510
2511
2512 static ssize_t show_statistics(struct device *d,
2513 struct device_attribute *attr, char *buf)
2514 {
2515 struct iwl_priv *priv = dev_get_drvdata(d);
2516 u32 size = sizeof(struct iwl_notif_statistics);
2517 u32 len = 0, ofs = 0;
2518 u8 *data = (u8 *)&priv->statistics;
2519 int rc = 0;
2520
2521 if (!iwl_is_alive(priv))
2522 return -EAGAIN;
2523
2524 mutex_lock(&priv->mutex);
2525 rc = iwl_send_statistics_request(priv, 0);
2526 mutex_unlock(&priv->mutex);
2527
2528 if (rc) {
2529 len = sprintf(buf,
2530 "Error sending statistics request: 0x%08X\n", rc);
2531 return len;
2532 }
2533
2534 while (size && (PAGE_SIZE - len)) {
2535 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2536 PAGE_SIZE - len, 1);
2537 len = strlen(buf);
2538 if (PAGE_SIZE - len)
2539 buf[len++] = '\n';
2540
2541 ofs += 16;
2542 size -= min(size, 16U);
2543 }
2544
2545 return len;
2546 }
2547
2548 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2549
2550
2551 /*****************************************************************************
2552 *
2553 * driver setup and teardown
2554 *
2555 *****************************************************************************/
2556
2557 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2558 {
2559 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2560
2561 init_waitqueue_head(&priv->wait_command_queue);
2562
2563 INIT_WORK(&priv->up, iwl_bg_up);
2564 INIT_WORK(&priv->restart, iwl_bg_restart);
2565 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2566 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
2567 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2568 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2569 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2570 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2571
2572 iwl_setup_scan_deferred_work(priv);
2573 iwl_setup_power_deferred_work(priv);
2574
2575 if (priv->cfg->ops->lib->setup_deferred_work)
2576 priv->cfg->ops->lib->setup_deferred_work(priv);
2577
2578 init_timer(&priv->statistics_periodic);
2579 priv->statistics_periodic.data = (unsigned long)priv;
2580 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2581
2582 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2583 iwl_irq_tasklet, (unsigned long)priv);
2584 }
2585
2586 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2587 {
2588 if (priv->cfg->ops->lib->cancel_deferred_work)
2589 priv->cfg->ops->lib->cancel_deferred_work(priv);
2590
2591 cancel_delayed_work_sync(&priv->init_alive_start);
2592 cancel_delayed_work(&priv->scan_check);
2593 cancel_delayed_work_sync(&priv->set_power_save);
2594 cancel_delayed_work(&priv->alive_start);
2595 cancel_work_sync(&priv->beacon_update);
2596 del_timer_sync(&priv->statistics_periodic);
2597 }
2598
2599 static struct attribute *iwl_sysfs_entries[] = {
2600 &dev_attr_flags.attr,
2601 &dev_attr_filter_flags.attr,
2602 &dev_attr_power_level.attr,
2603 &dev_attr_statistics.attr,
2604 &dev_attr_temperature.attr,
2605 &dev_attr_tx_power.attr,
2606 #ifdef CONFIG_IWLWIFI_DEBUG
2607 &dev_attr_debug_level.attr,
2608 #endif
2609 &dev_attr_version.attr,
2610
2611 NULL
2612 };
2613
2614 static struct attribute_group iwl_attribute_group = {
2615 .name = NULL, /* put in device directory */
2616 .attrs = iwl_sysfs_entries,
2617 };
2618
2619 static struct ieee80211_ops iwl_hw_ops = {
2620 .tx = iwl_mac_tx,
2621 .start = iwl_mac_start,
2622 .stop = iwl_mac_stop,
2623 .add_interface = iwl_mac_add_interface,
2624 .remove_interface = iwl_mac_remove_interface,
2625 .config = iwl_mac_config,
2626 .config_interface = iwl_mac_config_interface,
2627 .configure_filter = iwl_configure_filter,
2628 .set_key = iwl_mac_set_key,
2629 .update_tkip_key = iwl_mac_update_tkip_key,
2630 .get_stats = iwl_mac_get_stats,
2631 .get_tx_stats = iwl_mac_get_tx_stats,
2632 .conf_tx = iwl_mac_conf_tx,
2633 .reset_tsf = iwl_mac_reset_tsf,
2634 .bss_info_changed = iwl_bss_info_changed,
2635 .ampdu_action = iwl_mac_ampdu_action,
2636 .hw_scan = iwl_mac_hw_scan
2637 };
2638
2639 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2640 {
2641 int err = 0;
2642 struct iwl_priv *priv;
2643 struct ieee80211_hw *hw;
2644 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2645 unsigned long flags;
2646 u16 pci_cmd;
2647
2648 /************************
2649 * 1. Allocating HW data
2650 ************************/
2651
2652 /* Disabling hardware scan means that mac80211 will perform scans
2653 * "the hard way", rather than using device's scan. */
2654 if (cfg->mod_params->disable_hw_scan) {
2655 if (cfg->mod_params->debug & IWL_DL_INFO)
2656 dev_printk(KERN_DEBUG, &(pdev->dev),
2657 "Disabling hw_scan\n");
2658 iwl_hw_ops.hw_scan = NULL;
2659 }
2660
2661 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2662 if (!hw) {
2663 err = -ENOMEM;
2664 goto out;
2665 }
2666 priv = hw->priv;
2667 /* At this point both hw and priv are allocated. */
2668
2669 SET_IEEE80211_DEV(hw, &pdev->dev);
2670
2671 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2672 priv->cfg = cfg;
2673 priv->pci_dev = pdev;
2674
2675 #ifdef CONFIG_IWLWIFI_DEBUG
2676 priv->debug_level = priv->cfg->mod_params->debug;
2677 atomic_set(&priv->restrict_refcnt, 0);
2678 #endif
2679
2680 /**************************
2681 * 2. Initializing PCI bus
2682 **************************/
2683 if (pci_enable_device(pdev)) {
2684 err = -ENODEV;
2685 goto out_ieee80211_free_hw;
2686 }
2687
2688 pci_set_master(pdev);
2689
2690 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2691 if (!err)
2692 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2693 if (err) {
2694 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2695 if (!err)
2696 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2697 /* both attempts failed: */
2698 if (err) {
2699 IWL_WARN(priv, "No suitable DMA available.\n");
2700 goto out_pci_disable_device;
2701 }
2702 }
2703
2704 err = pci_request_regions(pdev, DRV_NAME);
2705 if (err)
2706 goto out_pci_disable_device;
2707
2708 pci_set_drvdata(pdev, priv);
2709
2710
2711 /***********************
2712 * 3. Read REV register
2713 ***********************/
2714 priv->hw_base = pci_iomap(pdev, 0, 0);
2715 if (!priv->hw_base) {
2716 err = -ENODEV;
2717 goto out_pci_release_regions;
2718 }
2719
2720 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2721 (unsigned long long) pci_resource_len(pdev, 0));
2722 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2723
2724 iwl_hw_detect(priv);
2725 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2726 priv->cfg->name, priv->hw_rev);
2727
2728 /* We disable the RETRY_TIMEOUT register (0x41) to keep
2729 * PCI Tx retries from interfering with C3 CPU state */
2730 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2731
2732 /* amp init */
2733 err = priv->cfg->ops->lib->apm_ops.init(priv);
2734 if (err < 0) {
2735 IWL_ERR(priv, "Failed to init APMG\n");
2736 goto out_iounmap;
2737 }
2738 /*****************
2739 * 4. Read EEPROM
2740 *****************/
2741 /* Read the EEPROM */
2742 err = iwl_eeprom_init(priv);
2743 if (err) {
2744 IWL_ERR(priv, "Unable to init EEPROM\n");
2745 goto out_iounmap;
2746 }
2747 err = iwl_eeprom_check_version(priv);
2748 if (err)
2749 goto out_free_eeprom;
2750
2751 /* extract MAC Address */
2752 iwl_eeprom_get_mac(priv, priv->mac_addr);
2753 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
2754 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
2755
2756 /************************
2757 * 5. Setup HW constants
2758 ************************/
2759 if (iwl_set_hw_params(priv)) {
2760 IWL_ERR(priv, "failed to set hw parameters\n");
2761 goto out_free_eeprom;
2762 }
2763
2764 /*******************
2765 * 6. Setup priv
2766 *******************/
2767
2768 err = iwl_init_drv(priv);
2769 if (err)
2770 goto out_free_eeprom;
2771 /* At this point both hw and priv are initialized. */
2772
2773 /********************
2774 * 7. Setup services
2775 ********************/
2776 spin_lock_irqsave(&priv->lock, flags);
2777 iwl_disable_interrupts(priv);
2778 spin_unlock_irqrestore(&priv->lock, flags);
2779
2780 pci_enable_msi(priv->pci_dev);
2781
2782 err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
2783 DRV_NAME, priv);
2784 if (err) {
2785 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
2786 goto out_disable_msi;
2787 }
2788 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
2789 if (err) {
2790 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2791 goto out_free_irq;
2792 }
2793
2794 iwl_setup_deferred_work(priv);
2795 iwl_setup_rx_handlers(priv);
2796
2797 /**********************************
2798 * 8. Setup and register mac80211
2799 **********************************/
2800
2801 /* enable interrupts if needed: hw bug w/a */
2802 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
2803 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
2804 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
2805 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
2806 }
2807
2808 iwl_enable_interrupts(priv);
2809
2810 err = iwl_setup_mac(priv);
2811 if (err)
2812 goto out_remove_sysfs;
2813
2814 err = iwl_dbgfs_register(priv, DRV_NAME);
2815 if (err)
2816 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2817
2818 /* If platform's RF_KILL switch is NOT set to KILL */
2819 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2820 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2821 else
2822 set_bit(STATUS_RF_KILL_HW, &priv->status);
2823
2824 err = iwl_rfkill_init(priv);
2825 if (err)
2826 IWL_ERR(priv, "Unable to initialize RFKILL system. "
2827 "Ignoring error: %d\n", err);
2828 else
2829 iwl_rfkill_set_hw_state(priv);
2830
2831 iwl_power_initialize(priv);
2832 return 0;
2833
2834 out_remove_sysfs:
2835 destroy_workqueue(priv->workqueue);
2836 priv->workqueue = NULL;
2837 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
2838 out_free_irq:
2839 free_irq(priv->pci_dev->irq, priv);
2840 out_disable_msi:
2841 pci_disable_msi(priv->pci_dev);
2842 iwl_uninit_drv(priv);
2843 out_free_eeprom:
2844 iwl_eeprom_free(priv);
2845 out_iounmap:
2846 pci_iounmap(pdev, priv->hw_base);
2847 out_pci_release_regions:
2848 pci_set_drvdata(pdev, NULL);
2849 pci_release_regions(pdev);
2850 out_pci_disable_device:
2851 pci_disable_device(pdev);
2852 out_ieee80211_free_hw:
2853 ieee80211_free_hw(priv->hw);
2854 out:
2855 return err;
2856 }
2857
2858 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
2859 {
2860 struct iwl_priv *priv = pci_get_drvdata(pdev);
2861 unsigned long flags;
2862
2863 if (!priv)
2864 return;
2865
2866 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
2867
2868 iwl_dbgfs_unregister(priv);
2869 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
2870
2871 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
2872 * to be called and iwl_down since we are removing the device
2873 * we need to set STATUS_EXIT_PENDING bit.
2874 */
2875 set_bit(STATUS_EXIT_PENDING, &priv->status);
2876 if (priv->mac80211_registered) {
2877 ieee80211_unregister_hw(priv->hw);
2878 priv->mac80211_registered = 0;
2879 } else {
2880 iwl_down(priv);
2881 }
2882
2883 /* make sure we flush any pending irq or
2884 * tasklet for the driver
2885 */
2886 spin_lock_irqsave(&priv->lock, flags);
2887 iwl_disable_interrupts(priv);
2888 spin_unlock_irqrestore(&priv->lock, flags);
2889
2890 iwl_synchronize_irq(priv);
2891
2892 iwl_rfkill_unregister(priv);
2893 iwl_dealloc_ucode_pci(priv);
2894
2895 if (priv->rxq.bd)
2896 iwl_rx_queue_free(priv, &priv->rxq);
2897 iwl_hw_txq_ctx_free(priv);
2898
2899 priv->cfg->ops->smgmt->clear_station_table(priv);
2900 iwl_eeprom_free(priv);
2901
2902
2903 /*netif_stop_queue(dev); */
2904 flush_workqueue(priv->workqueue);
2905
2906 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
2907 * priv->workqueue... so we can't take down the workqueue
2908 * until now... */
2909 destroy_workqueue(priv->workqueue);
2910 priv->workqueue = NULL;
2911
2912 free_irq(priv->pci_dev->irq, priv);
2913 pci_disable_msi(priv->pci_dev);
2914 pci_iounmap(pdev, priv->hw_base);
2915 pci_release_regions(pdev);
2916 pci_disable_device(pdev);
2917 pci_set_drvdata(pdev, NULL);
2918
2919 iwl_uninit_drv(priv);
2920
2921 if (priv->ibss_beacon)
2922 dev_kfree_skb(priv->ibss_beacon);
2923
2924 ieee80211_free_hw(priv->hw);
2925 }
2926
2927
2928 /*****************************************************************************
2929 *
2930 * driver and module entry point
2931 *
2932 *****************************************************************************/
2933
2934 /* Hardware specific file defines the PCI IDs table for that hardware module */
2935 static struct pci_device_id iwl_hw_card_ids[] = {
2936 #ifdef CONFIG_IWL4965
2937 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
2938 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
2939 #endif /* CONFIG_IWL4965 */
2940 #ifdef CONFIG_IWL5000
2941 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
2942 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
2943 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
2944 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
2945 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
2946 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
2947 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
2948 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
2949 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
2950 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
2951 /* 5350 WiFi/WiMax */
2952 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
2953 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
2954 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
2955 /* 5150 Wifi/WiMax */
2956 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
2957 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
2958 /* 6000/6050 Series */
2959 {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
2960 {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
2961 {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
2962 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
2963 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
2964 {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
2965 {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
2966 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
2967 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
2968 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
2969 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
2970 /* 1000 Series WiFi */
2971 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
2972 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
2973 #endif /* CONFIG_IWL5000 */
2974
2975 {0}
2976 };
2977 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
2978
2979 static struct pci_driver iwl_driver = {
2980 .name = DRV_NAME,
2981 .id_table = iwl_hw_card_ids,
2982 .probe = iwl_pci_probe,
2983 .remove = __devexit_p(iwl_pci_remove),
2984 #ifdef CONFIG_PM
2985 .suspend = iwl_pci_suspend,
2986 .resume = iwl_pci_resume,
2987 #endif
2988 };
2989
2990 static int __init iwl_init(void)
2991 {
2992
2993 int ret;
2994 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
2995 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
2996
2997 ret = iwlagn_rate_control_register();
2998 if (ret) {
2999 printk(KERN_ERR DRV_NAME
3000 "Unable to register rate control algorithm: %d\n", ret);
3001 return ret;
3002 }
3003
3004 ret = pci_register_driver(&iwl_driver);
3005 if (ret) {
3006 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3007 goto error_register;
3008 }
3009
3010 return ret;
3011
3012 error_register:
3013 iwlagn_rate_control_unregister();
3014 return ret;
3015 }
3016
3017 static void __exit iwl_exit(void)
3018 {
3019 pci_unregister_driver(&iwl_driver);
3020 iwlagn_rate_control_unregister();
3021 }
3022
3023 module_exit(iwl_exit);
3024 module_init(iwl_init);
Linux kernel - Deliverables
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