iwlwifi: Fix to set correct ht configuration
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-core.c
1 /******************************************************************************
2 *
3 * GPL LICENSE SUMMARY
4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <net/mac80211.h>
34
35 #include "iwl-eeprom.h"
36 #include "iwl-dev.h" /* FIXME: remove */
37 #include "iwl-debug.h"
38 #include "iwl-core.h"
39 #include "iwl-io.h"
40 #include "iwl-power.h"
41 #include "iwl-sta.h"
42 #include "iwl-helpers.h"
43
44
45 MODULE_DESCRIPTION("iwl core");
46 MODULE_VERSION(IWLWIFI_VERSION);
47 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
48 MODULE_LICENSE("GPL");
49
50 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
51 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
52 0, COEX_UNASSOC_IDLE_FLAGS},
53 {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
54 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
55 {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
56 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
57 {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
58 0, COEX_CALIBRATION_FLAGS},
59 {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
60 0, COEX_PERIODIC_CALIBRATION_FLAGS},
61 {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
62 0, COEX_CONNECTION_ESTAB_FLAGS},
63 {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
64 0, COEX_ASSOCIATED_IDLE_FLAGS},
65 {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
66 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
67 {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
68 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
69 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
70 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
71 {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
72 {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
73 {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
74 0, COEX_STAND_ALONE_DEBUG_FLAGS},
75 {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
76 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
77 {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
78 {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
79 };
80
81 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
82 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
83 IWL_RATE_SISO_##s##M_PLCP, \
84 IWL_RATE_MIMO2_##s##M_PLCP,\
85 IWL_RATE_MIMO3_##s##M_PLCP,\
86 IWL_RATE_##r##M_IEEE, \
87 IWL_RATE_##ip##M_INDEX, \
88 IWL_RATE_##in##M_INDEX, \
89 IWL_RATE_##rp##M_INDEX, \
90 IWL_RATE_##rn##M_INDEX, \
91 IWL_RATE_##pp##M_INDEX, \
92 IWL_RATE_##np##M_INDEX }
93
94 u32 iwl_debug_level;
95 EXPORT_SYMBOL(iwl_debug_level);
96
97 static irqreturn_t iwl_isr(int irq, void *data);
98
99 /*
100 * Parameter order:
101 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
102 *
103 * If there isn't a valid next or previous rate then INV is used which
104 * maps to IWL_RATE_INVALID
105 *
106 */
107 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
108 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
109 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
110 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
111 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
112 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
113 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
114 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
115 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
116 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
117 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
118 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
119 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
120 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
121 /* FIXME:RS: ^^ should be INV (legacy) */
122 };
123 EXPORT_SYMBOL(iwl_rates);
124
125 /**
126 * translate ucode response to mac80211 tx status control values
127 */
128 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
129 struct ieee80211_tx_info *info)
130 {
131 struct ieee80211_tx_rate *r = &info->control.rates[0];
132
133 info->antenna_sel_tx =
134 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
135 if (rate_n_flags & RATE_MCS_HT_MSK)
136 r->flags |= IEEE80211_TX_RC_MCS;
137 if (rate_n_flags & RATE_MCS_GF_MSK)
138 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
139 if (rate_n_flags & RATE_MCS_HT40_MSK)
140 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
141 if (rate_n_flags & RATE_MCS_DUP_MSK)
142 r->flags |= IEEE80211_TX_RC_DUP_DATA;
143 if (rate_n_flags & RATE_MCS_SGI_MSK)
144 r->flags |= IEEE80211_TX_RC_SHORT_GI;
145 r->idx = iwl_hwrate_to_mac80211_idx(rate_n_flags, info->band);
146 }
147 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
148
149 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
150 {
151 int idx = 0;
152
153 /* HT rate format */
154 if (rate_n_flags & RATE_MCS_HT_MSK) {
155 idx = (rate_n_flags & 0xff);
156
157 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
158 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
159 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
160 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
161
162 idx += IWL_FIRST_OFDM_RATE;
163 /* skip 9M not supported in ht*/
164 if (idx >= IWL_RATE_9M_INDEX)
165 idx += 1;
166 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
167 return idx;
168
169 /* legacy rate format, search for match in table */
170 } else {
171 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
172 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
173 return idx;
174 }
175
176 return -1;
177 }
178 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
179
180 int iwl_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
181 {
182 int idx = 0;
183 int band_offset = 0;
184
185 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
186 if (rate_n_flags & RATE_MCS_HT_MSK) {
187 idx = (rate_n_flags & 0xff);
188 return idx;
189 /* Legacy rate format, search for match in table */
190 } else {
191 if (band == IEEE80211_BAND_5GHZ)
192 band_offset = IWL_FIRST_OFDM_RATE;
193 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
194 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
195 return idx - band_offset;
196 }
197
198 return -1;
199 }
200
201 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
202 {
203 int i;
204 u8 ind = ant;
205 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
206 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
207 if (priv->hw_params.valid_tx_ant & BIT(ind))
208 return ind;
209 }
210 return ant;
211 }
212 EXPORT_SYMBOL(iwl_toggle_tx_ant);
213
214 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
215 EXPORT_SYMBOL(iwl_bcast_addr);
216
217
218 /* This function both allocates and initializes hw and priv. */
219 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
220 struct ieee80211_ops *hw_ops)
221 {
222 struct iwl_priv *priv;
223
224 /* mac80211 allocates memory for this device instance, including
225 * space for this driver's private structure */
226 struct ieee80211_hw *hw =
227 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
228 if (hw == NULL) {
229 printk(KERN_ERR "%s: Can not allocate network device\n",
230 cfg->name);
231 goto out;
232 }
233
234 priv = hw->priv;
235 priv->hw = hw;
236
237 out:
238 return hw;
239 }
240 EXPORT_SYMBOL(iwl_alloc_all);
241
242 void iwl_hw_detect(struct iwl_priv *priv)
243 {
244 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
245 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
246 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
247 }
248 EXPORT_SYMBOL(iwl_hw_detect);
249
250 int iwl_hw_nic_init(struct iwl_priv *priv)
251 {
252 unsigned long flags;
253 struct iwl_rx_queue *rxq = &priv->rxq;
254 int ret;
255
256 /* nic_init */
257 spin_lock_irqsave(&priv->lock, flags);
258 priv->cfg->ops->lib->apm_ops.init(priv);
259
260 /* Set interrupt coalescing timer to 512 usecs */
261 iwl_write8(priv, CSR_INT_COALESCING, 512 / 32);
262
263 spin_unlock_irqrestore(&priv->lock, flags);
264
265 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
266
267 priv->cfg->ops->lib->apm_ops.config(priv);
268
269 /* Allocate the RX queue, or reset if it is already allocated */
270 if (!rxq->bd) {
271 ret = iwl_rx_queue_alloc(priv);
272 if (ret) {
273 IWL_ERR(priv, "Unable to initialize Rx queue\n");
274 return -ENOMEM;
275 }
276 } else
277 iwl_rx_queue_reset(priv, rxq);
278
279 iwl_rx_replenish(priv);
280
281 iwl_rx_init(priv, rxq);
282
283 spin_lock_irqsave(&priv->lock, flags);
284
285 rxq->need_update = 1;
286 iwl_rx_queue_update_write_ptr(priv, rxq);
287
288 spin_unlock_irqrestore(&priv->lock, flags);
289
290 /* Allocate and init all Tx and Command queues */
291 ret = iwl_txq_ctx_reset(priv);
292 if (ret)
293 return ret;
294
295 set_bit(STATUS_INIT, &priv->status);
296
297 return 0;
298 }
299 EXPORT_SYMBOL(iwl_hw_nic_init);
300
301 /*
302 * QoS support
303 */
304 void iwl_activate_qos(struct iwl_priv *priv, u8 force)
305 {
306 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
307 return;
308
309 priv->qos_data.def_qos_parm.qos_flags = 0;
310
311 if (priv->qos_data.qos_cap.q_AP.queue_request &&
312 !priv->qos_data.qos_cap.q_AP.txop_request)
313 priv->qos_data.def_qos_parm.qos_flags |=
314 QOS_PARAM_FLG_TXOP_TYPE_MSK;
315 if (priv->qos_data.qos_active)
316 priv->qos_data.def_qos_parm.qos_flags |=
317 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
318
319 if (priv->current_ht_config.is_ht)
320 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
321
322 if (force || iwl_is_associated(priv)) {
323 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
324 priv->qos_data.qos_active,
325 priv->qos_data.def_qos_parm.qos_flags);
326
327 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
328 sizeof(struct iwl_qosparam_cmd),
329 &priv->qos_data.def_qos_parm, NULL);
330 }
331 }
332 EXPORT_SYMBOL(iwl_activate_qos);
333
334 /*
335 * AC CWmin CW max AIFSN TXOP Limit TXOP Limit
336 * (802.11b) (802.11a/g)
337 * AC_BK 15 1023 7 0 0
338 * AC_BE 15 1023 3 0 0
339 * AC_VI 7 15 2 6.016ms 3.008ms
340 * AC_VO 3 7 2 3.264ms 1.504ms
341 */
342 void iwl_reset_qos(struct iwl_priv *priv)
343 {
344 u16 cw_min = 15;
345 u16 cw_max = 1023;
346 u8 aifs = 2;
347 bool is_legacy = false;
348 unsigned long flags;
349 int i;
350
351 spin_lock_irqsave(&priv->lock, flags);
352 /* QoS always active in AP and ADHOC mode
353 * In STA mode wait for association
354 */
355 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
356 priv->iw_mode == NL80211_IFTYPE_AP)
357 priv->qos_data.qos_active = 1;
358 else
359 priv->qos_data.qos_active = 0;
360
361 /* check for legacy mode */
362 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
363 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
364 (priv->iw_mode == NL80211_IFTYPE_STATION &&
365 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
366 cw_min = 31;
367 is_legacy = 1;
368 }
369
370 if (priv->qos_data.qos_active)
371 aifs = 3;
372
373 /* AC_BE */
374 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
375 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
376 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
377 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
378 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
379
380 if (priv->qos_data.qos_active) {
381 /* AC_BK */
382 i = 1;
383 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
384 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
385 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
386 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
387 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
388
389 /* AC_VI */
390 i = 2;
391 priv->qos_data.def_qos_parm.ac[i].cw_min =
392 cpu_to_le16((cw_min + 1) / 2 - 1);
393 priv->qos_data.def_qos_parm.ac[i].cw_max =
394 cpu_to_le16(cw_min);
395 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
396 if (is_legacy)
397 priv->qos_data.def_qos_parm.ac[i].edca_txop =
398 cpu_to_le16(6016);
399 else
400 priv->qos_data.def_qos_parm.ac[i].edca_txop =
401 cpu_to_le16(3008);
402 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
403
404 /* AC_VO */
405 i = 3;
406 priv->qos_data.def_qos_parm.ac[i].cw_min =
407 cpu_to_le16((cw_min + 1) / 4 - 1);
408 priv->qos_data.def_qos_parm.ac[i].cw_max =
409 cpu_to_le16((cw_min + 1) / 2 - 1);
410 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
411 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
412 if (is_legacy)
413 priv->qos_data.def_qos_parm.ac[i].edca_txop =
414 cpu_to_le16(3264);
415 else
416 priv->qos_data.def_qos_parm.ac[i].edca_txop =
417 cpu_to_le16(1504);
418 } else {
419 for (i = 1; i < 4; i++) {
420 priv->qos_data.def_qos_parm.ac[i].cw_min =
421 cpu_to_le16(cw_min);
422 priv->qos_data.def_qos_parm.ac[i].cw_max =
423 cpu_to_le16(cw_max);
424 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
425 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
426 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
427 }
428 }
429 IWL_DEBUG_QOS(priv, "set QoS to default \n");
430
431 spin_unlock_irqrestore(&priv->lock, flags);
432 }
433 EXPORT_SYMBOL(iwl_reset_qos);
434
435 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
436 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
437 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
438 struct ieee80211_sta_ht_cap *ht_info,
439 enum ieee80211_band band)
440 {
441 u16 max_bit_rate = 0;
442 u8 rx_chains_num = priv->hw_params.rx_chains_num;
443 u8 tx_chains_num = priv->hw_params.tx_chains_num;
444
445 ht_info->cap = 0;
446 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
447
448 ht_info->ht_supported = true;
449
450 if (priv->cfg->ht_greenfield_support)
451 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
452 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
453 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
454 (priv->cfg->sm_ps_mode << 2));
455 max_bit_rate = MAX_BIT_RATE_20_MHZ;
456 if (priv->hw_params.ht40_channel & BIT(band)) {
457 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
458 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
459 ht_info->mcs.rx_mask[4] = 0x01;
460 max_bit_rate = MAX_BIT_RATE_40_MHZ;
461 }
462
463 if (priv->cfg->mod_params->amsdu_size_8K)
464 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
465
466 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
467 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
468
469 ht_info->mcs.rx_mask[0] = 0xFF;
470 if (rx_chains_num >= 2)
471 ht_info->mcs.rx_mask[1] = 0xFF;
472 if (rx_chains_num >= 3)
473 ht_info->mcs.rx_mask[2] = 0xFF;
474
475 /* Highest supported Rx data rate */
476 max_bit_rate *= rx_chains_num;
477 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
478 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
479
480 /* Tx MCS capabilities */
481 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
482 if (tx_chains_num != rx_chains_num) {
483 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
484 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
485 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
486 }
487 }
488
489 /**
490 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
491 */
492 int iwlcore_init_geos(struct iwl_priv *priv)
493 {
494 struct iwl_channel_info *ch;
495 struct ieee80211_supported_band *sband;
496 struct ieee80211_channel *channels;
497 struct ieee80211_channel *geo_ch;
498 struct ieee80211_rate *rates;
499 int i = 0;
500
501 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
502 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
503 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
504 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
505 return 0;
506 }
507
508 channels = kzalloc(sizeof(struct ieee80211_channel) *
509 priv->channel_count, GFP_KERNEL);
510 if (!channels)
511 return -ENOMEM;
512
513 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
514 GFP_KERNEL);
515 if (!rates) {
516 kfree(channels);
517 return -ENOMEM;
518 }
519
520 /* 5.2GHz channels start after the 2.4GHz channels */
521 sband = &priv->bands[IEEE80211_BAND_5GHZ];
522 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
523 /* just OFDM */
524 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
525 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
526
527 if (priv->cfg->sku & IWL_SKU_N)
528 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
529 IEEE80211_BAND_5GHZ);
530
531 sband = &priv->bands[IEEE80211_BAND_2GHZ];
532 sband->channels = channels;
533 /* OFDM & CCK */
534 sband->bitrates = rates;
535 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
536
537 if (priv->cfg->sku & IWL_SKU_N)
538 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
539 IEEE80211_BAND_2GHZ);
540
541 priv->ieee_channels = channels;
542 priv->ieee_rates = rates;
543
544 for (i = 0; i < priv->channel_count; i++) {
545 ch = &priv->channel_info[i];
546
547 /* FIXME: might be removed if scan is OK */
548 if (!is_channel_valid(ch))
549 continue;
550
551 if (is_channel_a_band(ch))
552 sband = &priv->bands[IEEE80211_BAND_5GHZ];
553 else
554 sband = &priv->bands[IEEE80211_BAND_2GHZ];
555
556 geo_ch = &sband->channels[sband->n_channels++];
557
558 geo_ch->center_freq =
559 ieee80211_channel_to_frequency(ch->channel);
560 geo_ch->max_power = ch->max_power_avg;
561 geo_ch->max_antenna_gain = 0xff;
562 geo_ch->hw_value = ch->channel;
563
564 if (is_channel_valid(ch)) {
565 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
566 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
567
568 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
569 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
570
571 if (ch->flags & EEPROM_CHANNEL_RADAR)
572 geo_ch->flags |= IEEE80211_CHAN_RADAR;
573
574 geo_ch->flags |= ch->ht40_extension_channel;
575
576 if (ch->max_power_avg > priv->tx_power_device_lmt)
577 priv->tx_power_device_lmt = ch->max_power_avg;
578 } else {
579 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
580 }
581
582 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
583 ch->channel, geo_ch->center_freq,
584 is_channel_a_band(ch) ? "5.2" : "2.4",
585 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
586 "restricted" : "valid",
587 geo_ch->flags);
588 }
589
590 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
591 priv->cfg->sku & IWL_SKU_A) {
592 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
593 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
594 priv->pci_dev->device,
595 priv->pci_dev->subsystem_device);
596 priv->cfg->sku &= ~IWL_SKU_A;
597 }
598
599 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
600 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
601 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
602
603 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
604
605 return 0;
606 }
607 EXPORT_SYMBOL(iwlcore_init_geos);
608
609 /*
610 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
611 */
612 void iwlcore_free_geos(struct iwl_priv *priv)
613 {
614 kfree(priv->ieee_channels);
615 kfree(priv->ieee_rates);
616 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
617 }
618 EXPORT_SYMBOL(iwlcore_free_geos);
619
620 /*
621 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
622 * function.
623 */
624 void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
625 __le32 *tx_flags)
626 {
627 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
628 *tx_flags |= TX_CMD_FLG_RTS_MSK;
629 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
630 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
631 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
632 *tx_flags |= TX_CMD_FLG_CTS_MSK;
633 }
634 }
635 EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
636
637 static bool is_single_rx_stream(struct iwl_priv *priv)
638 {
639 return !priv->current_ht_config.is_ht ||
640 priv->current_ht_config.single_chain_sufficient;
641 }
642
643 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
644 enum ieee80211_band band,
645 u16 channel, u8 extension_chan_offset)
646 {
647 const struct iwl_channel_info *ch_info;
648
649 ch_info = iwl_get_channel_info(priv, band, channel);
650 if (!is_channel_valid(ch_info))
651 return 0;
652
653 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
654 return !(ch_info->ht40_extension_channel &
655 IEEE80211_CHAN_NO_HT40PLUS);
656 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
657 return !(ch_info->ht40_extension_channel &
658 IEEE80211_CHAN_NO_HT40MINUS);
659
660 return 0;
661 }
662
663 u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
664 struct ieee80211_sta_ht_cap *sta_ht_inf)
665 {
666 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
667
668 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
669 return 0;
670
671 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
672 * the bit will not set if it is pure 40MHz case
673 */
674 if (sta_ht_inf) {
675 if (!sta_ht_inf->ht_supported)
676 return 0;
677 }
678 #ifdef CONFIG_IWLWIFI_DEBUG
679 if (priv->disable_ht40)
680 return 0;
681 #endif
682 return iwl_is_channel_extension(priv, priv->band,
683 le16_to_cpu(priv->staging_rxon.channel),
684 ht_conf->extension_chan_offset);
685 }
686 EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
687
688 static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
689 {
690 u16 new_val = 0;
691 u16 beacon_factor = 0;
692
693 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
694 new_val = beacon_val / beacon_factor;
695
696 if (!new_val)
697 new_val = max_beacon_val;
698
699 return new_val;
700 }
701
702 void iwl_setup_rxon_timing(struct iwl_priv *priv)
703 {
704 u64 tsf;
705 s32 interval_tm, rem;
706 unsigned long flags;
707 struct ieee80211_conf *conf = NULL;
708 u16 beacon_int;
709
710 conf = ieee80211_get_hw_conf(priv->hw);
711
712 spin_lock_irqsave(&priv->lock, flags);
713 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
714 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
715
716 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
717 beacon_int = priv->beacon_int;
718 priv->rxon_timing.atim_window = 0;
719 } else {
720 beacon_int = priv->vif->bss_conf.beacon_int;
721
722 /* TODO: we need to get atim_window from upper stack
723 * for now we set to 0 */
724 priv->rxon_timing.atim_window = 0;
725 }
726
727 beacon_int = iwl_adjust_beacon_interval(beacon_int,
728 priv->hw_params.max_beacon_itrvl * 1024);
729 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
730
731 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
732 interval_tm = beacon_int * 1024;
733 rem = do_div(tsf, interval_tm);
734 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
735
736 spin_unlock_irqrestore(&priv->lock, flags);
737 IWL_DEBUG_ASSOC(priv,
738 "beacon interval %d beacon timer %d beacon tim %d\n",
739 le16_to_cpu(priv->rxon_timing.beacon_interval),
740 le32_to_cpu(priv->rxon_timing.beacon_init_val),
741 le16_to_cpu(priv->rxon_timing.atim_window));
742 }
743 EXPORT_SYMBOL(iwl_setup_rxon_timing);
744
745 void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
746 {
747 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
748
749 if (hw_decrypt)
750 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
751 else
752 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
753
754 }
755 EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
756
757 /**
758 * iwl_check_rxon_cmd - validate RXON structure is valid
759 *
760 * NOTE: This is really only useful during development and can eventually
761 * be #ifdef'd out once the driver is stable and folks aren't actively
762 * making changes
763 */
764 int iwl_check_rxon_cmd(struct iwl_priv *priv)
765 {
766 int error = 0;
767 int counter = 1;
768 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
769
770 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
771 error |= le32_to_cpu(rxon->flags &
772 (RXON_FLG_TGJ_NARROW_BAND_MSK |
773 RXON_FLG_RADAR_DETECT_MSK));
774 if (error)
775 IWL_WARN(priv, "check 24G fields %d | %d\n",
776 counter++, error);
777 } else {
778 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
779 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
780 if (error)
781 IWL_WARN(priv, "check 52 fields %d | %d\n",
782 counter++, error);
783 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
784 if (error)
785 IWL_WARN(priv, "check 52 CCK %d | %d\n",
786 counter++, error);
787 }
788 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
789 if (error)
790 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
791
792 /* make sure basic rates 6Mbps and 1Mbps are supported */
793 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
794 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
795 if (error)
796 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
797
798 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
799 if (error)
800 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
801
802 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
803 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
804 if (error)
805 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
806 counter++, error);
807
808 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
809 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
810 if (error)
811 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
812 counter++, error);
813
814 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
815 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
816 if (error)
817 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
818 counter++, error);
819
820 if (error)
821 IWL_WARN(priv, "Tuning to channel %d\n",
822 le16_to_cpu(rxon->channel));
823
824 if (error) {
825 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
826 return -1;
827 }
828 return 0;
829 }
830 EXPORT_SYMBOL(iwl_check_rxon_cmd);
831
832 /**
833 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
834 * @priv: staging_rxon is compared to active_rxon
835 *
836 * If the RXON structure is changing enough to require a new tune,
837 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
838 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
839 */
840 int iwl_full_rxon_required(struct iwl_priv *priv)
841 {
842
843 /* These items are only settable from the full RXON command */
844 if (!(iwl_is_associated(priv)) ||
845 compare_ether_addr(priv->staging_rxon.bssid_addr,
846 priv->active_rxon.bssid_addr) ||
847 compare_ether_addr(priv->staging_rxon.node_addr,
848 priv->active_rxon.node_addr) ||
849 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
850 priv->active_rxon.wlap_bssid_addr) ||
851 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
852 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
853 (priv->staging_rxon.air_propagation !=
854 priv->active_rxon.air_propagation) ||
855 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
856 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
857 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
858 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
859 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
860 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
861 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
862 return 1;
863
864 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
865 * be updated with the RXON_ASSOC command -- however only some
866 * flag transitions are allowed using RXON_ASSOC */
867
868 /* Check if we are not switching bands */
869 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
870 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
871 return 1;
872
873 /* Check if we are switching association toggle */
874 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
875 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
876 return 1;
877
878 return 0;
879 }
880 EXPORT_SYMBOL(iwl_full_rxon_required);
881
882 u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
883 {
884 int i;
885 int rate_mask;
886
887 /* Set rate mask*/
888 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
889 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
890 else
891 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
892
893 /* Find lowest valid rate */
894 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
895 i = iwl_rates[i].next_ieee) {
896 if (rate_mask & (1 << i))
897 return iwl_rates[i].plcp;
898 }
899
900 /* No valid rate was found. Assign the lowest one */
901 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
902 return IWL_RATE_1M_PLCP;
903 else
904 return IWL_RATE_6M_PLCP;
905 }
906 EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
907
908 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
909 {
910 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
911
912 if (!ht_conf->is_ht) {
913 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
914 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
915 RXON_FLG_HT40_PROT_MSK |
916 RXON_FLG_HT_PROT_MSK);
917 return;
918 }
919
920 /* FIXME: if the definition of ht_protection changed, the "translation"
921 * will be needed for rxon->flags
922 */
923 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
924
925 /* Set up channel bandwidth:
926 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
927 /* clear the HT channel mode before set the mode */
928 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
929 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
930 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
931 /* pure ht40 */
932 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
933 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
934 /* Note: control channel is opposite of extension channel */
935 switch (ht_conf->extension_chan_offset) {
936 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
937 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
938 break;
939 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
940 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
941 break;
942 }
943 } else {
944 /* Note: control channel is opposite of extension channel */
945 switch (ht_conf->extension_chan_offset) {
946 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
947 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
948 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
949 break;
950 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
951 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
952 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
953 break;
954 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
955 default:
956 /* channel location only valid if in Mixed mode */
957 IWL_ERR(priv, "invalid extension channel offset\n");
958 break;
959 }
960 }
961 } else {
962 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
963 }
964
965 if (priv->cfg->ops->hcmd->set_rxon_chain)
966 priv->cfg->ops->hcmd->set_rxon_chain(priv);
967
968 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
969 "extension channel offset 0x%x\n",
970 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
971 ht_conf->extension_chan_offset);
972 return;
973 }
974 EXPORT_SYMBOL(iwl_set_rxon_ht);
975
976 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
977 #define IWL_NUM_RX_CHAINS_SINGLE 2
978 #define IWL_NUM_IDLE_CHAINS_DUAL 2
979 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
980
981 /*
982 * Determine how many receiver/antenna chains to use.
983 *
984 * More provides better reception via diversity. Fewer saves power
985 * at the expense of throughput, but only when not in powersave to
986 * start with.
987 *
988 * MIMO (dual stream) requires at least 2, but works better with 3.
989 * This does not determine *which* chains to use, just how many.
990 */
991 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
992 {
993 /* # of Rx chains to use when expecting MIMO. */
994 if (is_single_rx_stream(priv))
995 return IWL_NUM_RX_CHAINS_SINGLE;
996 else
997 return IWL_NUM_RX_CHAINS_MULTIPLE;
998 }
999
1000 /*
1001 * When we are in power saving mode, unless device support spatial
1002 * multiplexing power save, use the active count for rx chain count.
1003 */
1004 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
1005 {
1006 int idle_cnt = active_cnt;
1007 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1008
1009 /* # Rx chains when idling and maybe trying to save power */
1010 switch (priv->cfg->sm_ps_mode) {
1011 case WLAN_HT_CAP_SM_PS_STATIC:
1012 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
1013 break;
1014 case WLAN_HT_CAP_SM_PS_DYNAMIC:
1015 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
1016 IWL_NUM_IDLE_CHAINS_SINGLE;
1017 break;
1018 case WLAN_HT_CAP_SM_PS_DISABLED:
1019 break;
1020 case WLAN_HT_CAP_SM_PS_INVALID:
1021 default:
1022 IWL_ERR(priv, "invalid sm_ps mode %u\n",
1023 priv->cfg->sm_ps_mode);
1024 WARN_ON(1);
1025 break;
1026 }
1027 return idle_cnt;
1028 }
1029
1030 /* up to 4 chains */
1031 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1032 {
1033 u8 res;
1034 res = (chain_bitmap & BIT(0)) >> 0;
1035 res += (chain_bitmap & BIT(1)) >> 1;
1036 res += (chain_bitmap & BIT(2)) >> 2;
1037 res += (chain_bitmap & BIT(3)) >> 3;
1038 return res;
1039 }
1040
1041 /**
1042 * iwl_is_monitor_mode - Determine if interface in monitor mode
1043 *
1044 * priv->iw_mode is set in add_interface, but add_interface is
1045 * never called for monitor mode. The only way mac80211 informs us about
1046 * monitor mode is through configuring filters (call to configure_filter).
1047 */
1048 bool iwl_is_monitor_mode(struct iwl_priv *priv)
1049 {
1050 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
1051 }
1052 EXPORT_SYMBOL(iwl_is_monitor_mode);
1053
1054 /**
1055 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1056 *
1057 * Selects how many and which Rx receivers/antennas/chains to use.
1058 * This should not be used for scan command ... it puts data in wrong place.
1059 */
1060 void iwl_set_rxon_chain(struct iwl_priv *priv)
1061 {
1062 bool is_single = is_single_rx_stream(priv);
1063 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
1064 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1065 u32 active_chains;
1066 u16 rx_chain;
1067
1068 /* Tell uCode which antennas are actually connected.
1069 * Before first association, we assume all antennas are connected.
1070 * Just after first association, iwl_chain_noise_calibration()
1071 * checks which antennas actually *are* connected. */
1072 if (priv->chain_noise_data.active_chains)
1073 active_chains = priv->chain_noise_data.active_chains;
1074 else
1075 active_chains = priv->hw_params.valid_rx_ant;
1076
1077 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1078
1079 /* How many receivers should we use? */
1080 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
1081 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
1082
1083
1084 /* correct rx chain count according hw settings
1085 * and chain noise calibration
1086 */
1087 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
1088 if (valid_rx_cnt < active_rx_cnt)
1089 active_rx_cnt = valid_rx_cnt;
1090
1091 if (valid_rx_cnt < idle_rx_cnt)
1092 idle_rx_cnt = valid_rx_cnt;
1093
1094 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1095 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1096
1097 /* copied from 'iwl_bg_request_scan()' */
1098 /* Force use of chains B and C (0x6) for Rx for 4965
1099 * Avoid A (0x1) because of its off-channel reception on A-band.
1100 * MIMO is not used here, but value is required */
1101 if (iwl_is_monitor_mode(priv) &&
1102 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
1103 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
1104 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
1105 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
1106 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1107 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1108 }
1109
1110 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
1111
1112 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
1113 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1114 else
1115 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1116
1117 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
1118 priv->staging_rxon.rx_chain,
1119 active_rx_cnt, idle_rx_cnt);
1120
1121 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1122 active_rx_cnt < idle_rx_cnt);
1123 }
1124 EXPORT_SYMBOL(iwl_set_rxon_chain);
1125
1126 /**
1127 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
1128 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
1129 * @channel: Any channel valid for the requested phymode
1130
1131 * In addition to setting the staging RXON, priv->phymode is also set.
1132 *
1133 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
1134 * in the staging RXON flag structure based on the phymode
1135 */
1136 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
1137 {
1138 enum ieee80211_band band = ch->band;
1139 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
1140
1141 if (!iwl_get_channel_info(priv, band, channel)) {
1142 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
1143 channel, band);
1144 return -EINVAL;
1145 }
1146
1147 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
1148 (priv->band == band))
1149 return 0;
1150
1151 priv->staging_rxon.channel = cpu_to_le16(channel);
1152 if (band == IEEE80211_BAND_5GHZ)
1153 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
1154 else
1155 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1156
1157 priv->band = band;
1158
1159 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
1160
1161 return 0;
1162 }
1163 EXPORT_SYMBOL(iwl_set_rxon_channel);
1164
1165 void iwl_set_flags_for_band(struct iwl_priv *priv,
1166 enum ieee80211_band band)
1167 {
1168 if (band == IEEE80211_BAND_5GHZ) {
1169 priv->staging_rxon.flags &=
1170 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1171 | RXON_FLG_CCK_MSK);
1172 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1173 } else {
1174 /* Copied from iwl_post_associate() */
1175 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1176 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1177 else
1178 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1179
1180 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1181 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1182
1183 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1184 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1185 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
1186 }
1187 }
1188
1189 /*
1190 * initialize rxon structure with default values from eeprom
1191 */
1192 void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
1193 {
1194 const struct iwl_channel_info *ch_info;
1195
1196 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
1197
1198 switch (mode) {
1199 case NL80211_IFTYPE_AP:
1200 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
1201 break;
1202
1203 case NL80211_IFTYPE_STATION:
1204 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
1205 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1206 break;
1207
1208 case NL80211_IFTYPE_ADHOC:
1209 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1210 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1211 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1212 RXON_FILTER_ACCEPT_GRP_MSK;
1213 break;
1214
1215 default:
1216 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1217 break;
1218 }
1219
1220 #if 0
1221 /* TODO: Figure out when short_preamble would be set and cache from
1222 * that */
1223 if (!hw_to_local(priv->hw)->short_preamble)
1224 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1225 else
1226 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1227 #endif
1228
1229 ch_info = iwl_get_channel_info(priv, priv->band,
1230 le16_to_cpu(priv->active_rxon.channel));
1231
1232 if (!ch_info)
1233 ch_info = &priv->channel_info[0];
1234
1235 /*
1236 * in some case A channels are all non IBSS
1237 * in this case force B/G channel
1238 */
1239 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
1240 !(is_channel_ibss(ch_info)))
1241 ch_info = &priv->channel_info[0];
1242
1243 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1244 priv->band = ch_info->band;
1245
1246 iwl_set_flags_for_band(priv, priv->band);
1247
1248 priv->staging_rxon.ofdm_basic_rates =
1249 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1250 priv->staging_rxon.cck_basic_rates =
1251 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1252
1253 /* clear both MIX and PURE40 mode flag */
1254 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1255 RXON_FLG_CHANNEL_MODE_PURE_40);
1256 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1257 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1258 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1259 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
1260 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
1261 }
1262 EXPORT_SYMBOL(iwl_connection_init_rx_config);
1263
1264 static void iwl_set_rate(struct iwl_priv *priv)
1265 {
1266 const struct ieee80211_supported_band *hw = NULL;
1267 struct ieee80211_rate *rate;
1268 int i;
1269
1270 hw = iwl_get_hw_mode(priv, priv->band);
1271 if (!hw) {
1272 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1273 return;
1274 }
1275
1276 priv->active_rate = 0;
1277 priv->active_rate_basic = 0;
1278
1279 for (i = 0; i < hw->n_bitrates; i++) {
1280 rate = &(hw->bitrates[i]);
1281 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
1282 priv->active_rate |= (1 << rate->hw_value);
1283 }
1284
1285 IWL_DEBUG_RATE(priv, "Set active_rate = %0x, active_rate_basic = %0x\n",
1286 priv->active_rate, priv->active_rate_basic);
1287
1288 /*
1289 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
1290 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
1291 * OFDM
1292 */
1293 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
1294 priv->staging_rxon.cck_basic_rates =
1295 ((priv->active_rate_basic &
1296 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
1297 else
1298 priv->staging_rxon.cck_basic_rates =
1299 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1300
1301 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
1302 priv->staging_rxon.ofdm_basic_rates =
1303 ((priv->active_rate_basic &
1304 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
1305 IWL_FIRST_OFDM_RATE) & 0xFF;
1306 else
1307 priv->staging_rxon.ofdm_basic_rates =
1308 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1309 }
1310
1311 void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1312 {
1313 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1314 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1315 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1316
1317 if (priv->switch_rxon.switch_in_progress) {
1318 if (!le32_to_cpu(csa->status) &&
1319 (csa->channel == priv->switch_rxon.channel)) {
1320 rxon->channel = csa->channel;
1321 priv->staging_rxon.channel = csa->channel;
1322 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1323 le16_to_cpu(csa->channel));
1324 } else
1325 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1326 le16_to_cpu(csa->channel));
1327
1328 priv->switch_rxon.switch_in_progress = false;
1329 }
1330 }
1331 EXPORT_SYMBOL(iwl_rx_csa);
1332
1333 #ifdef CONFIG_IWLWIFI_DEBUG
1334 void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1335 {
1336 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1337
1338 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
1339 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
1340 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1341 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1342 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
1343 le32_to_cpu(rxon->filter_flags));
1344 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1345 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
1346 rxon->ofdm_basic_rates);
1347 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1348 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1349 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1350 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1351 }
1352 EXPORT_SYMBOL(iwl_print_rx_config_cmd);
1353 #endif
1354 /**
1355 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1356 */
1357 void iwl_irq_handle_error(struct iwl_priv *priv)
1358 {
1359 /* Set the FW error flag -- cleared on iwl_down */
1360 set_bit(STATUS_FW_ERROR, &priv->status);
1361
1362 /* Cancel currently queued command. */
1363 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1364
1365 priv->cfg->ops->lib->dump_nic_error_log(priv);
1366 priv->cfg->ops->lib->dump_nic_event_log(priv, false);
1367 #ifdef CONFIG_IWLWIFI_DEBUG
1368 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
1369 iwl_print_rx_config_cmd(priv);
1370 #endif
1371
1372 wake_up_interruptible(&priv->wait_command_queue);
1373
1374 /* Keep the restart process from trying to send host
1375 * commands by clearing the INIT status bit */
1376 clear_bit(STATUS_READY, &priv->status);
1377
1378 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1379 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
1380 "Restarting adapter due to uCode error.\n");
1381
1382 if (priv->cfg->mod_params->restart_fw)
1383 queue_work(priv->workqueue, &priv->restart);
1384 }
1385 }
1386 EXPORT_SYMBOL(iwl_irq_handle_error);
1387
1388 int iwl_apm_stop_master(struct iwl_priv *priv)
1389 {
1390 int ret = 0;
1391
1392 /* stop device's busmaster DMA activity */
1393 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1394
1395 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
1396 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1397 if (ret)
1398 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
1399
1400 IWL_DEBUG_INFO(priv, "stop master\n");
1401
1402 return ret;
1403 }
1404 EXPORT_SYMBOL(iwl_apm_stop_master);
1405
1406 void iwl_apm_stop(struct iwl_priv *priv)
1407 {
1408 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1409
1410 /* Stop device's DMA activity */
1411 iwl_apm_stop_master(priv);
1412
1413 /* Reset the entire device */
1414 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1415
1416 udelay(10);
1417
1418 /*
1419 * Clear "initialization complete" bit to move adapter from
1420 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1421 */
1422 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1423 }
1424 EXPORT_SYMBOL(iwl_apm_stop);
1425
1426
1427 /*
1428 * Start up NIC's basic functionality after it has been reset
1429 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1430 * NOTE: This does not load uCode nor start the embedded processor
1431 */
1432 int iwl_apm_init(struct iwl_priv *priv)
1433 {
1434 int ret = 0;
1435 u16 lctl;
1436
1437 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1438
1439 /*
1440 * Use "set_bit" below rather than "write", to preserve any hardware
1441 * bits already set by default after reset.
1442 */
1443
1444 /* Disable L0S exit timer (platform NMI Work/Around) */
1445 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1446 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1447
1448 /*
1449 * Disable L0s without affecting L1;
1450 * don't wait for ICH L0s (ICH bug W/A)
1451 */
1452 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1453 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1454
1455 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1456 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1457
1458 /*
1459 * Enable HAP INTA (interrupt from management bus) to
1460 * wake device's PCI Express link L1a -> L0s
1461 * NOTE: This is no-op for 3945 (non-existant bit)
1462 */
1463 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1464 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1465
1466 /*
1467 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1468 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1469 * If so (likely), disable L0S, so device moves directly L0->L1;
1470 * costs negligible amount of power savings.
1471 * If not (unlikely), enable L0S, so there is at least some
1472 * power savings, even without L1.
1473 */
1474 if (priv->cfg->set_l0s) {
1475 lctl = iwl_pcie_link_ctl(priv);
1476 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1477 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1478 /* L1-ASPM enabled; disable(!) L0S */
1479 iwl_set_bit(priv, CSR_GIO_REG,
1480 CSR_GIO_REG_VAL_L0S_ENABLED);
1481 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1482 } else {
1483 /* L1-ASPM disabled; enable(!) L0S */
1484 iwl_clear_bit(priv, CSR_GIO_REG,
1485 CSR_GIO_REG_VAL_L0S_ENABLED);
1486 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1487 }
1488 }
1489
1490 /* Configure analog phase-lock-loop before activating to D0A */
1491 if (priv->cfg->pll_cfg_val)
1492 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1493
1494 /*
1495 * Set "initialization complete" bit to move adapter from
1496 * D0U* --> D0A* (powered-up active) state.
1497 */
1498 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1499
1500 /*
1501 * Wait for clock stabilization; once stabilized, access to
1502 * device-internal resources is supported, e.g. iwl_write_prph()
1503 * and accesses to uCode SRAM.
1504 */
1505 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1506 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1507 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1508 if (ret < 0) {
1509 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1510 goto out;
1511 }
1512
1513 /*
1514 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1515 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1516 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1517 * and don't need BSM to restore data after power-saving sleep.
1518 *
1519 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1520 * do not disable clocks. This preserves any hardware bits already
1521 * set by default in "CLK_CTRL_REG" after reset.
1522 */
1523 if (priv->cfg->use_bsm)
1524 iwl_write_prph(priv, APMG_CLK_EN_REG,
1525 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1526 else
1527 iwl_write_prph(priv, APMG_CLK_EN_REG,
1528 APMG_CLK_VAL_DMA_CLK_RQT);
1529 udelay(20);
1530
1531 /* Disable L1-Active */
1532 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1533 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1534
1535 out:
1536 return ret;
1537 }
1538 EXPORT_SYMBOL(iwl_apm_init);
1539
1540
1541
1542 void iwl_configure_filter(struct ieee80211_hw *hw,
1543 unsigned int changed_flags,
1544 unsigned int *total_flags,
1545 u64 multicast)
1546 {
1547 struct iwl_priv *priv = hw->priv;
1548 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1549
1550 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
1551 changed_flags, *total_flags);
1552
1553 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1554 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1555 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1556 else
1557 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1558 }
1559 if (changed_flags & FIF_ALLMULTI) {
1560 if (*total_flags & FIF_ALLMULTI)
1561 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1562 else
1563 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1564 }
1565 if (changed_flags & FIF_CONTROL) {
1566 if (*total_flags & FIF_CONTROL)
1567 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1568 else
1569 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1570 }
1571 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1572 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1573 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1574 else
1575 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1576 }
1577
1578 /* We avoid iwl_commit_rxon here to commit the new filter flags
1579 * since mac80211 will call ieee80211_hw_config immediately.
1580 * (mc_list is not supported at this time). Otherwise, we need to
1581 * queue a background iwl_commit_rxon work.
1582 */
1583
1584 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1585 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1586 }
1587 EXPORT_SYMBOL(iwl_configure_filter);
1588
1589 int iwl_set_hw_params(struct iwl_priv *priv)
1590 {
1591 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1592 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1593 if (priv->cfg->mod_params->amsdu_size_8K)
1594 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
1595 else
1596 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
1597
1598 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1599
1600 if (priv->cfg->mod_params->disable_11n)
1601 priv->cfg->sku &= ~IWL_SKU_N;
1602
1603 /* Device-specific setup */
1604 return priv->cfg->ops->lib->set_hw_params(priv);
1605 }
1606 EXPORT_SYMBOL(iwl_set_hw_params);
1607
1608 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1609 {
1610 int ret = 0;
1611 s8 prev_tx_power = priv->tx_power_user_lmt;
1612
1613 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
1614 IWL_WARN(priv, "Requested user TXPOWER %d below lower limit %d.\n",
1615 tx_power,
1616 IWL_TX_POWER_TARGET_POWER_MIN);
1617 return -EINVAL;
1618 }
1619
1620 if (tx_power > priv->tx_power_device_lmt) {
1621 IWL_WARN(priv,
1622 "Requested user TXPOWER %d above upper limit %d.\n",
1623 tx_power, priv->tx_power_device_lmt);
1624 return -EINVAL;
1625 }
1626
1627 if (priv->tx_power_user_lmt != tx_power)
1628 force = true;
1629
1630 /* if nic is not up don't send command */
1631 if (iwl_is_ready_rf(priv)) {
1632 priv->tx_power_user_lmt = tx_power;
1633 if (force && priv->cfg->ops->lib->send_tx_power)
1634 ret = priv->cfg->ops->lib->send_tx_power(priv);
1635 else if (!priv->cfg->ops->lib->send_tx_power)
1636 ret = -EOPNOTSUPP;
1637 /*
1638 * if fail to set tx_power, restore the orig. tx power
1639 */
1640 if (ret)
1641 priv->tx_power_user_lmt = prev_tx_power;
1642 }
1643
1644 /*
1645 * Even this is an async host command, the command
1646 * will always report success from uCode
1647 * So once driver can placing the command into the queue
1648 * successfully, driver can use priv->tx_power_user_lmt
1649 * to reflect the current tx power
1650 */
1651 return ret;
1652 }
1653 EXPORT_SYMBOL(iwl_set_tx_power);
1654
1655 #define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1656
1657 /* Free dram table */
1658 void iwl_free_isr_ict(struct iwl_priv *priv)
1659 {
1660 if (priv->ict_tbl_vir) {
1661 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) +
1662 PAGE_SIZE, priv->ict_tbl_vir,
1663 priv->ict_tbl_dma);
1664 priv->ict_tbl_vir = NULL;
1665 }
1666 }
1667 EXPORT_SYMBOL(iwl_free_isr_ict);
1668
1669
1670 /* allocate dram shared table it is a PAGE_SIZE aligned
1671 * also reset all data related to ICT table interrupt.
1672 */
1673 int iwl_alloc_isr_ict(struct iwl_priv *priv)
1674 {
1675
1676 if (priv->cfg->use_isr_legacy)
1677 return 0;
1678 /* allocate shrared data table */
1679 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) *
1680 ICT_COUNT) + PAGE_SIZE,
1681 &priv->ict_tbl_dma);
1682 if (!priv->ict_tbl_vir)
1683 return -ENOMEM;
1684
1685 /* align table to PAGE_SIZE boundry */
1686 priv->aligned_ict_tbl_dma = ALIGN(priv->ict_tbl_dma, PAGE_SIZE);
1687
1688 IWL_DEBUG_ISR(priv, "ict dma addr %Lx dma aligned %Lx diff %d\n",
1689 (unsigned long long)priv->ict_tbl_dma,
1690 (unsigned long long)priv->aligned_ict_tbl_dma,
1691 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1692
1693 priv->ict_tbl = priv->ict_tbl_vir +
1694 (priv->aligned_ict_tbl_dma - priv->ict_tbl_dma);
1695
1696 IWL_DEBUG_ISR(priv, "ict vir addr %p vir aligned %p diff %d\n",
1697 priv->ict_tbl, priv->ict_tbl_vir,
1698 (int)(priv->aligned_ict_tbl_dma - priv->ict_tbl_dma));
1699
1700 /* reset table and index to all 0 */
1701 memset(priv->ict_tbl_vir,0, (sizeof(u32) * ICT_COUNT) + PAGE_SIZE);
1702 priv->ict_index = 0;
1703
1704 /* add periodic RX interrupt */
1705 priv->inta_mask |= CSR_INT_BIT_RX_PERIODIC;
1706 return 0;
1707 }
1708 EXPORT_SYMBOL(iwl_alloc_isr_ict);
1709
1710 /* Device is going up inform it about using ICT interrupt table,
1711 * also we need to tell the driver to start using ICT interrupt.
1712 */
1713 int iwl_reset_ict(struct iwl_priv *priv)
1714 {
1715 u32 val;
1716 unsigned long flags;
1717
1718 if (!priv->ict_tbl_vir)
1719 return 0;
1720
1721 spin_lock_irqsave(&priv->lock, flags);
1722 iwl_disable_interrupts(priv);
1723
1724 memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
1725
1726 val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
1727
1728 val |= CSR_DRAM_INT_TBL_ENABLE;
1729 val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;
1730
1731 IWL_DEBUG_ISR(priv, "CSR_DRAM_INT_TBL_REG =0x%X "
1732 "aligned dma address %Lx\n",
1733 val, (unsigned long long)priv->aligned_ict_tbl_dma);
1734
1735 iwl_write32(priv, CSR_DRAM_INT_TBL_REG, val);
1736 priv->use_ict = true;
1737 priv->ict_index = 0;
1738 iwl_write32(priv, CSR_INT, priv->inta_mask);
1739 iwl_enable_interrupts(priv);
1740 spin_unlock_irqrestore(&priv->lock, flags);
1741
1742 return 0;
1743 }
1744 EXPORT_SYMBOL(iwl_reset_ict);
1745
1746 /* Device is going down disable ict interrupt usage */
1747 void iwl_disable_ict(struct iwl_priv *priv)
1748 {
1749 unsigned long flags;
1750
1751 spin_lock_irqsave(&priv->lock, flags);
1752 priv->use_ict = false;
1753 spin_unlock_irqrestore(&priv->lock, flags);
1754 }
1755 EXPORT_SYMBOL(iwl_disable_ict);
1756
1757 /* interrupt handler using ict table, with this interrupt driver will
1758 * stop using INTA register to get device's interrupt, reading this register
1759 * is expensive, device will write interrupts in ICT dram table, increment
1760 * index then will fire interrupt to driver, driver will OR all ICT table
1761 * entries from current index up to table entry with 0 value. the result is
1762 * the interrupt we need to service, driver will set the entries back to 0 and
1763 * set index.
1764 */
1765 irqreturn_t iwl_isr_ict(int irq, void *data)
1766 {
1767 struct iwl_priv *priv = data;
1768 u32 inta, inta_mask;
1769 u32 val = 0;
1770
1771 if (!priv)
1772 return IRQ_NONE;
1773
1774 /* dram interrupt table not set yet,
1775 * use legacy interrupt.
1776 */
1777 if (!priv->use_ict)
1778 return iwl_isr(irq, data);
1779
1780 spin_lock(&priv->lock);
1781
1782 /* Disable (but don't clear!) interrupts here to avoid
1783 * back-to-back ISRs and sporadic interrupts from our NIC.
1784 * If we have something to service, the tasklet will re-enable ints.
1785 * If we *don't* have something, we'll re-enable before leaving here.
1786 */
1787 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1788 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1789
1790
1791 /* Ignore interrupt if there's nothing in NIC to service.
1792 * This may be due to IRQ shared with another device,
1793 * or due to sporadic interrupts thrown from our NIC. */
1794 if (!priv->ict_tbl[priv->ict_index]) {
1795 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1796 goto none;
1797 }
1798
1799 /* read all entries that not 0 start with ict_index */
1800 while (priv->ict_tbl[priv->ict_index]) {
1801
1802 val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
1803 IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
1804 priv->ict_index,
1805 le32_to_cpu(priv->ict_tbl[priv->ict_index]));
1806 priv->ict_tbl[priv->ict_index] = 0;
1807 priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
1808 ICT_COUNT);
1809
1810 }
1811
1812 /* We should not get this value, just ignore it. */
1813 if (val == 0xffffffff)
1814 val = 0;
1815
1816 inta = (0xff & val) | ((0xff00 & val) << 16);
1817 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1818 inta, inta_mask, val);
1819
1820 inta &= priv->inta_mask;
1821 priv->inta |= inta;
1822
1823 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1824 if (likely(inta))
1825 tasklet_schedule(&priv->irq_tasklet);
1826 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta) {
1827 /* Allow interrupt if was disabled by this handler and
1828 * no tasklet was schedules, We should not enable interrupt,
1829 * tasklet will enable it.
1830 */
1831 iwl_enable_interrupts(priv);
1832 }
1833
1834 spin_unlock(&priv->lock);
1835 return IRQ_HANDLED;
1836
1837 none:
1838 /* re-enable interrupts here since we don't have anything to service.
1839 * only Re-enable if disabled by irq.
1840 */
1841 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1842 iwl_enable_interrupts(priv);
1843
1844 spin_unlock(&priv->lock);
1845 return IRQ_NONE;
1846 }
1847 EXPORT_SYMBOL(iwl_isr_ict);
1848
1849
1850 static irqreturn_t iwl_isr(int irq, void *data)
1851 {
1852 struct iwl_priv *priv = data;
1853 u32 inta, inta_mask;
1854 #ifdef CONFIG_IWLWIFI_DEBUG
1855 u32 inta_fh;
1856 #endif
1857 if (!priv)
1858 return IRQ_NONE;
1859
1860 spin_lock(&priv->lock);
1861
1862 /* Disable (but don't clear!) interrupts here to avoid
1863 * back-to-back ISRs and sporadic interrupts from our NIC.
1864 * If we have something to service, the tasklet will re-enable ints.
1865 * If we *don't* have something, we'll re-enable before leaving here. */
1866 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1867 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1868
1869 /* Discover which interrupts are active/pending */
1870 inta = iwl_read32(priv, CSR_INT);
1871
1872 /* Ignore interrupt if there's nothing in NIC to service.
1873 * This may be due to IRQ shared with another device,
1874 * or due to sporadic interrupts thrown from our NIC. */
1875 if (!inta) {
1876 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0\n");
1877 goto none;
1878 }
1879
1880 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1881 /* Hardware disappeared. It might have already raised
1882 * an interrupt */
1883 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1884 goto unplugged;
1885 }
1886
1887 #ifdef CONFIG_IWLWIFI_DEBUG
1888 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1889 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1890 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, "
1891 "fh 0x%08x\n", inta, inta_mask, inta_fh);
1892 }
1893 #endif
1894
1895 priv->inta |= inta;
1896 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1897 if (likely(inta))
1898 tasklet_schedule(&priv->irq_tasklet);
1899 else if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1900 iwl_enable_interrupts(priv);
1901
1902 unplugged:
1903 spin_unlock(&priv->lock);
1904 return IRQ_HANDLED;
1905
1906 none:
1907 /* re-enable interrupts here since we don't have anything to service. */
1908 /* only Re-enable if diabled by irq and no schedules tasklet. */
1909 if (test_bit(STATUS_INT_ENABLED, &priv->status) && !priv->inta)
1910 iwl_enable_interrupts(priv);
1911
1912 spin_unlock(&priv->lock);
1913 return IRQ_NONE;
1914 }
1915
1916 irqreturn_t iwl_isr_legacy(int irq, void *data)
1917 {
1918 struct iwl_priv *priv = data;
1919 u32 inta, inta_mask;
1920 u32 inta_fh;
1921 if (!priv)
1922 return IRQ_NONE;
1923
1924 spin_lock(&priv->lock);
1925
1926 /* Disable (but don't clear!) interrupts here to avoid
1927 * back-to-back ISRs and sporadic interrupts from our NIC.
1928 * If we have something to service, the tasklet will re-enable ints.
1929 * If we *don't* have something, we'll re-enable before leaving here. */
1930 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1931 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1932
1933 /* Discover which interrupts are active/pending */
1934 inta = iwl_read32(priv, CSR_INT);
1935 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1936
1937 /* Ignore interrupt if there's nothing in NIC to service.
1938 * This may be due to IRQ shared with another device,
1939 * or due to sporadic interrupts thrown from our NIC. */
1940 if (!inta && !inta_fh) {
1941 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1942 goto none;
1943 }
1944
1945 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1946 /* Hardware disappeared. It might have already raised
1947 * an interrupt */
1948 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1949 goto unplugged;
1950 }
1951
1952 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1953 inta, inta_mask, inta_fh);
1954
1955 inta &= ~CSR_INT_BIT_SCD;
1956
1957 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1958 if (likely(inta || inta_fh))
1959 tasklet_schedule(&priv->irq_tasklet);
1960
1961 unplugged:
1962 spin_unlock(&priv->lock);
1963 return IRQ_HANDLED;
1964
1965 none:
1966 /* re-enable interrupts here since we don't have anything to service. */
1967 /* only Re-enable if diabled by irq */
1968 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1969 iwl_enable_interrupts(priv);
1970 spin_unlock(&priv->lock);
1971 return IRQ_NONE;
1972 }
1973 EXPORT_SYMBOL(iwl_isr_legacy);
1974
1975 int iwl_send_bt_config(struct iwl_priv *priv)
1976 {
1977 struct iwl_bt_cmd bt_cmd = {
1978 .flags = BT_COEX_MODE_4W,
1979 .lead_time = BT_LEAD_TIME_DEF,
1980 .max_kill = BT_MAX_KILL_DEF,
1981 .kill_ack_mask = 0,
1982 .kill_cts_mask = 0,
1983 };
1984
1985 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1986 sizeof(struct iwl_bt_cmd), &bt_cmd);
1987 }
1988 EXPORT_SYMBOL(iwl_send_bt_config);
1989
1990 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
1991 {
1992 struct iwl_statistics_cmd statistics_cmd = {
1993 .configuration_flags =
1994 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
1995 };
1996
1997 if (flags & CMD_ASYNC)
1998 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1999 sizeof(struct iwl_statistics_cmd),
2000 &statistics_cmd, NULL);
2001 else
2002 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
2003 sizeof(struct iwl_statistics_cmd),
2004 &statistics_cmd);
2005 }
2006 EXPORT_SYMBOL(iwl_send_statistics_request);
2007
2008 /**
2009 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
2010 * using sample data 100 bytes apart. If these sample points are good,
2011 * it's a pretty good bet that everything between them is good, too.
2012 */
2013 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2014 {
2015 u32 val;
2016 int ret = 0;
2017 u32 errcnt = 0;
2018 u32 i;
2019
2020 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2021
2022 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2023 /* read data comes through single port, auto-incr addr */
2024 /* NOTE: Use the debugless read so we don't flood kernel log
2025 * if IWL_DL_IO is set */
2026 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2027 i + IWL49_RTC_INST_LOWER_BOUND);
2028 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2029 if (val != le32_to_cpu(*image)) {
2030 ret = -EIO;
2031 errcnt++;
2032 if (errcnt >= 3)
2033 break;
2034 }
2035 }
2036
2037 return ret;
2038 }
2039
2040 /**
2041 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
2042 * looking at all data.
2043 */
2044 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
2045 u32 len)
2046 {
2047 u32 val;
2048 u32 save_len = len;
2049 int ret = 0;
2050 u32 errcnt;
2051
2052 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2053
2054 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2055 IWL49_RTC_INST_LOWER_BOUND);
2056
2057 errcnt = 0;
2058 for (; len > 0; len -= sizeof(u32), image++) {
2059 /* read data comes through single port, auto-incr addr */
2060 /* NOTE: Use the debugless read so we don't flood kernel log
2061 * if IWL_DL_IO is set */
2062 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2063 if (val != le32_to_cpu(*image)) {
2064 IWL_ERR(priv, "uCode INST section is invalid at "
2065 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2066 save_len - len, val, le32_to_cpu(*image));
2067 ret = -EIO;
2068 errcnt++;
2069 if (errcnt >= 20)
2070 break;
2071 }
2072 }
2073
2074 if (!errcnt)
2075 IWL_DEBUG_INFO(priv,
2076 "ucode image in INSTRUCTION memory is good\n");
2077
2078 return ret;
2079 }
2080
2081 /**
2082 * iwl_verify_ucode - determine which instruction image is in SRAM,
2083 * and verify its contents
2084 */
2085 int iwl_verify_ucode(struct iwl_priv *priv)
2086 {
2087 __le32 *image;
2088 u32 len;
2089 int ret;
2090
2091 /* Try bootstrap */
2092 image = (__le32 *)priv->ucode_boot.v_addr;
2093 len = priv->ucode_boot.len;
2094 ret = iwlcore_verify_inst_sparse(priv, image, len);
2095 if (!ret) {
2096 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2097 return 0;
2098 }
2099
2100 /* Try initialize */
2101 image = (__le32 *)priv->ucode_init.v_addr;
2102 len = priv->ucode_init.len;
2103 ret = iwlcore_verify_inst_sparse(priv, image, len);
2104 if (!ret) {
2105 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2106 return 0;
2107 }
2108
2109 /* Try runtime/protocol */
2110 image = (__le32 *)priv->ucode_code.v_addr;
2111 len = priv->ucode_code.len;
2112 ret = iwlcore_verify_inst_sparse(priv, image, len);
2113 if (!ret) {
2114 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2115 return 0;
2116 }
2117
2118 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2119
2120 /* Since nothing seems to match, show first several data entries in
2121 * instruction SRAM, so maybe visual inspection will give a clue.
2122 * Selection of bootstrap image (vs. other images) is arbitrary. */
2123 image = (__le32 *)priv->ucode_boot.v_addr;
2124 len = priv->ucode_boot.len;
2125 ret = iwl_verify_inst_full(priv, image, len);
2126
2127 return ret;
2128 }
2129 EXPORT_SYMBOL(iwl_verify_ucode);
2130
2131
2132 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2133 {
2134 struct iwl_ct_kill_config cmd;
2135 struct iwl_ct_kill_throttling_config adv_cmd;
2136 unsigned long flags;
2137 int ret = 0;
2138
2139 spin_lock_irqsave(&priv->lock, flags);
2140 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2141 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2142 spin_unlock_irqrestore(&priv->lock, flags);
2143 priv->thermal_throttle.ct_kill_toggle = false;
2144
2145 if (priv->cfg->support_ct_kill_exit) {
2146 adv_cmd.critical_temperature_enter =
2147 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2148 adv_cmd.critical_temperature_exit =
2149 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2150
2151 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2152 sizeof(adv_cmd), &adv_cmd);
2153 if (ret)
2154 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2155 else
2156 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2157 "succeeded, "
2158 "critical temperature enter is %d,"
2159 "exit is %d\n",
2160 priv->hw_params.ct_kill_threshold,
2161 priv->hw_params.ct_kill_exit_threshold);
2162 } else {
2163 cmd.critical_temperature_R =
2164 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2165
2166 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2167 sizeof(cmd), &cmd);
2168 if (ret)
2169 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2170 else
2171 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2172 "succeeded, "
2173 "critical temperature is %d\n",
2174 priv->hw_params.ct_kill_threshold);
2175 }
2176 }
2177 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
2178
2179
2180 /*
2181 * CARD_STATE_CMD
2182 *
2183 * Use: Sets the device's internal card state to enable, disable, or halt
2184 *
2185 * When in the 'enable' state the card operates as normal.
2186 * When in the 'disable' state, the card enters into a low power mode.
2187 * When in the 'halt' state, the card is shut down and must be fully
2188 * restarted to come back on.
2189 */
2190 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
2191 {
2192 struct iwl_host_cmd cmd = {
2193 .id = REPLY_CARD_STATE_CMD,
2194 .len = sizeof(u32),
2195 .data = &flags,
2196 .flags = meta_flag,
2197 };
2198
2199 return iwl_send_cmd(priv, &cmd);
2200 }
2201
2202 void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2203 struct iwl_rx_mem_buffer *rxb)
2204 {
2205 #ifdef CONFIG_IWLWIFI_DEBUG
2206 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2207 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2208 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2209 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2210 #endif
2211 }
2212 EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2213
2214 void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2215 struct iwl_rx_mem_buffer *rxb)
2216 {
2217 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2218 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
2219 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2220 "notification for %s:\n", len,
2221 get_cmd_string(pkt->hdr.cmd));
2222 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
2223 }
2224 EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2225
2226 void iwl_rx_reply_error(struct iwl_priv *priv,
2227 struct iwl_rx_mem_buffer *rxb)
2228 {
2229 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2230
2231 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2232 "seq 0x%04X ser 0x%08X\n",
2233 le32_to_cpu(pkt->u.err_resp.error_type),
2234 get_cmd_string(pkt->u.err_resp.cmd_id),
2235 pkt->u.err_resp.cmd_id,
2236 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2237 le32_to_cpu(pkt->u.err_resp.error_info));
2238 }
2239 EXPORT_SYMBOL(iwl_rx_reply_error);
2240
2241 void iwl_clear_isr_stats(struct iwl_priv *priv)
2242 {
2243 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
2244 }
2245
2246 int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2247 const struct ieee80211_tx_queue_params *params)
2248 {
2249 struct iwl_priv *priv = hw->priv;
2250 unsigned long flags;
2251 int q;
2252
2253 IWL_DEBUG_MAC80211(priv, "enter\n");
2254
2255 if (!iwl_is_ready_rf(priv)) {
2256 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2257 return -EIO;
2258 }
2259
2260 if (queue >= AC_NUM) {
2261 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
2262 return 0;
2263 }
2264
2265 q = AC_NUM - 1 - queue;
2266
2267 spin_lock_irqsave(&priv->lock, flags);
2268
2269 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
2270 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
2271 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
2272 priv->qos_data.def_qos_parm.ac[q].edca_txop =
2273 cpu_to_le16((params->txop * 32));
2274
2275 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
2276 priv->qos_data.qos_active = 1;
2277
2278 if (priv->iw_mode == NL80211_IFTYPE_AP)
2279 iwl_activate_qos(priv, 1);
2280 else if (priv->assoc_id && iwl_is_associated(priv))
2281 iwl_activate_qos(priv, 0);
2282
2283 spin_unlock_irqrestore(&priv->lock, flags);
2284
2285 IWL_DEBUG_MAC80211(priv, "leave\n");
2286 return 0;
2287 }
2288 EXPORT_SYMBOL(iwl_mac_conf_tx);
2289
2290 static void iwl_ht_conf(struct iwl_priv *priv,
2291 struct ieee80211_bss_conf *bss_conf)
2292 {
2293 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2294 struct ieee80211_sta *sta;
2295
2296 IWL_DEBUG_MAC80211(priv, "enter: \n");
2297
2298 if (!ht_conf->is_ht)
2299 return;
2300
2301 ht_conf->ht_protection =
2302 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2303 ht_conf->non_GF_STA_present =
2304 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2305
2306 ht_conf->single_chain_sufficient = false;
2307
2308 switch (priv->iw_mode) {
2309 case NL80211_IFTYPE_STATION:
2310 rcu_read_lock();
2311 sta = ieee80211_find_sta(priv->vif, priv->bssid);
2312 if (sta) {
2313 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2314 int maxstreams;
2315
2316 maxstreams = (ht_cap->mcs.tx_params &
2317 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
2318 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2319 maxstreams += 1;
2320
2321 if ((ht_cap->mcs.rx_mask[1] == 0) &&
2322 (ht_cap->mcs.rx_mask[2] == 0))
2323 ht_conf->single_chain_sufficient = true;
2324 if (maxstreams <= 1)
2325 ht_conf->single_chain_sufficient = true;
2326 } else {
2327 /*
2328 * If at all, this can only happen through a race
2329 * when the AP disconnects us while we're still
2330 * setting up the connection, in that case mac80211
2331 * will soon tell us about that.
2332 */
2333 ht_conf->single_chain_sufficient = true;
2334 }
2335 rcu_read_unlock();
2336 break;
2337 case NL80211_IFTYPE_ADHOC:
2338 ht_conf->single_chain_sufficient = true;
2339 break;
2340 default:
2341 break;
2342 }
2343
2344 IWL_DEBUG_MAC80211(priv, "leave\n");
2345 }
2346
2347 static inline void iwl_set_no_assoc(struct iwl_priv *priv)
2348 {
2349 priv->assoc_id = 0;
2350 iwl_led_disassociate(priv);
2351 /*
2352 * inform the ucode that there is no longer an
2353 * association and that no more packets should be
2354 * sent
2355 */
2356 priv->staging_rxon.filter_flags &=
2357 ~RXON_FILTER_ASSOC_MSK;
2358 priv->staging_rxon.assoc_id = 0;
2359 iwlcore_commit_rxon(priv);
2360 }
2361
2362 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2363 void iwl_bss_info_changed(struct ieee80211_hw *hw,
2364 struct ieee80211_vif *vif,
2365 struct ieee80211_bss_conf *bss_conf,
2366 u32 changes)
2367 {
2368 struct iwl_priv *priv = hw->priv;
2369 int ret;
2370
2371 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
2372
2373 if (!iwl_is_alive(priv))
2374 return;
2375
2376 mutex_lock(&priv->mutex);
2377
2378 if (changes & BSS_CHANGED_BEACON &&
2379 priv->iw_mode == NL80211_IFTYPE_AP) {
2380 dev_kfree_skb(priv->ibss_beacon);
2381 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
2382 }
2383
2384 if (changes & BSS_CHANGED_BEACON_INT) {
2385 priv->beacon_int = bss_conf->beacon_int;
2386 /* TODO: in AP mode, do something to make this take effect */
2387 }
2388
2389 if (changes & BSS_CHANGED_BSSID) {
2390 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
2391
2392 /*
2393 * If there is currently a HW scan going on in the
2394 * background then we need to cancel it else the RXON
2395 * below/in post_associate will fail.
2396 */
2397 if (iwl_scan_cancel_timeout(priv, 100)) {
2398 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2399 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
2400 mutex_unlock(&priv->mutex);
2401 return;
2402 }
2403
2404 /* mac80211 only sets assoc when in STATION mode */
2405 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
2406 bss_conf->assoc) {
2407 memcpy(priv->staging_rxon.bssid_addr,
2408 bss_conf->bssid, ETH_ALEN);
2409
2410 /* currently needed in a few places */
2411 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2412 } else {
2413 priv->staging_rxon.filter_flags &=
2414 ~RXON_FILTER_ASSOC_MSK;
2415 }
2416
2417 }
2418
2419 /*
2420 * This needs to be after setting the BSSID in case
2421 * mac80211 decides to do both changes at once because
2422 * it will invoke post_associate.
2423 */
2424 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2425 changes & BSS_CHANGED_BEACON) {
2426 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
2427
2428 if (beacon)
2429 iwl_mac_beacon_update(hw, beacon);
2430 }
2431
2432 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
2433 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
2434 bss_conf->use_short_preamble);
2435 if (bss_conf->use_short_preamble)
2436 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2437 else
2438 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2439 }
2440
2441 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
2442 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
2443 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
2444 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
2445 else
2446 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
2447 }
2448
2449 if (changes & BSS_CHANGED_BASIC_RATES) {
2450 /* XXX use this information
2451 *
2452 * To do that, remove code from iwl_set_rate() and put something
2453 * like this here:
2454 *
2455 if (A-band)
2456 priv->staging_rxon.ofdm_basic_rates =
2457 bss_conf->basic_rates;
2458 else
2459 priv->staging_rxon.ofdm_basic_rates =
2460 bss_conf->basic_rates >> 4;
2461 priv->staging_rxon.cck_basic_rates =
2462 bss_conf->basic_rates & 0xF;
2463 */
2464 }
2465
2466 if (changes & BSS_CHANGED_HT) {
2467 iwl_ht_conf(priv, bss_conf);
2468
2469 if (priv->cfg->ops->hcmd->set_rxon_chain)
2470 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2471 }
2472
2473 if (changes & BSS_CHANGED_ASSOC) {
2474 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
2475 if (bss_conf->assoc) {
2476 priv->assoc_id = bss_conf->aid;
2477 priv->beacon_int = bss_conf->beacon_int;
2478 priv->timestamp = bss_conf->timestamp;
2479 priv->assoc_capability = bss_conf->assoc_capability;
2480
2481 iwl_led_associate(priv);
2482
2483 /*
2484 * We have just associated, don't start scan too early
2485 * leave time for EAPOL exchange to complete.
2486 *
2487 * XXX: do this in mac80211
2488 */
2489 priv->next_scan_jiffies = jiffies +
2490 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2491 if (!iwl_is_rfkill(priv))
2492 priv->cfg->ops->lib->post_associate(priv);
2493 } else
2494 iwl_set_no_assoc(priv);
2495 }
2496
2497 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2498 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2499 changes);
2500 ret = iwl_send_rxon_assoc(priv);
2501 if (!ret) {
2502 /* Sync active_rxon with latest change. */
2503 memcpy((void *)&priv->active_rxon,
2504 &priv->staging_rxon,
2505 sizeof(struct iwl_rxon_cmd));
2506 }
2507 }
2508
2509 if (changes & BSS_CHANGED_BEACON_ENABLED) {
2510 if (vif->bss_conf.enable_beacon) {
2511 memcpy(priv->staging_rxon.bssid_addr,
2512 bss_conf->bssid, ETH_ALEN);
2513 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2514 iwlcore_config_ap(priv);
2515 } else
2516 iwl_set_no_assoc(priv);
2517 }
2518
2519 mutex_unlock(&priv->mutex);
2520
2521 IWL_DEBUG_MAC80211(priv, "leave\n");
2522 }
2523 EXPORT_SYMBOL(iwl_bss_info_changed);
2524
2525 int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2526 {
2527 struct iwl_priv *priv = hw->priv;
2528 unsigned long flags;
2529 __le64 timestamp;
2530
2531 IWL_DEBUG_MAC80211(priv, "enter\n");
2532
2533 if (!iwl_is_ready_rf(priv)) {
2534 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2535 return -EIO;
2536 }
2537
2538 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2539 IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
2540 return -EIO;
2541 }
2542
2543 spin_lock_irqsave(&priv->lock, flags);
2544
2545 if (priv->ibss_beacon)
2546 dev_kfree_skb(priv->ibss_beacon);
2547
2548 priv->ibss_beacon = skb;
2549
2550 priv->assoc_id = 0;
2551 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2552 priv->timestamp = le64_to_cpu(timestamp);
2553
2554 IWL_DEBUG_MAC80211(priv, "leave\n");
2555 spin_unlock_irqrestore(&priv->lock, flags);
2556
2557 iwl_reset_qos(priv);
2558
2559 priv->cfg->ops->lib->post_associate(priv);
2560
2561
2562 return 0;
2563 }
2564 EXPORT_SYMBOL(iwl_mac_beacon_update);
2565
2566 int iwl_set_mode(struct iwl_priv *priv, int mode)
2567 {
2568 if (mode == NL80211_IFTYPE_ADHOC) {
2569 const struct iwl_channel_info *ch_info;
2570
2571 ch_info = iwl_get_channel_info(priv,
2572 priv->band,
2573 le16_to_cpu(priv->staging_rxon.channel));
2574
2575 if (!ch_info || !is_channel_ibss(ch_info)) {
2576 IWL_ERR(priv, "channel %d not IBSS channel\n",
2577 le16_to_cpu(priv->staging_rxon.channel));
2578 return -EINVAL;
2579 }
2580 }
2581
2582 iwl_connection_init_rx_config(priv, mode);
2583
2584 if (priv->cfg->ops->hcmd->set_rxon_chain)
2585 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2586
2587 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2588
2589 iwl_clear_stations_table(priv);
2590
2591 /* dont commit rxon if rf-kill is on*/
2592 if (!iwl_is_ready_rf(priv))
2593 return -EAGAIN;
2594
2595 iwlcore_commit_rxon(priv);
2596
2597 return 0;
2598 }
2599 EXPORT_SYMBOL(iwl_set_mode);
2600
2601 int iwl_mac_add_interface(struct ieee80211_hw *hw,
2602 struct ieee80211_if_init_conf *conf)
2603 {
2604 struct iwl_priv *priv = hw->priv;
2605 unsigned long flags;
2606
2607 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
2608
2609 if (priv->vif) {
2610 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2611 return -EOPNOTSUPP;
2612 }
2613
2614 spin_lock_irqsave(&priv->lock, flags);
2615 priv->vif = conf->vif;
2616 priv->iw_mode = conf->type;
2617
2618 spin_unlock_irqrestore(&priv->lock, flags);
2619
2620 mutex_lock(&priv->mutex);
2621
2622 if (conf->mac_addr) {
2623 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2624 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2625 }
2626
2627 if (iwl_set_mode(priv, conf->type) == -EAGAIN)
2628 /* we are not ready, will run again when ready */
2629 set_bit(STATUS_MODE_PENDING, &priv->status);
2630
2631 mutex_unlock(&priv->mutex);
2632
2633 IWL_DEBUG_MAC80211(priv, "leave\n");
2634 return 0;
2635 }
2636 EXPORT_SYMBOL(iwl_mac_add_interface);
2637
2638 void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2639 struct ieee80211_if_init_conf *conf)
2640 {
2641 struct iwl_priv *priv = hw->priv;
2642
2643 IWL_DEBUG_MAC80211(priv, "enter\n");
2644
2645 mutex_lock(&priv->mutex);
2646
2647 if (iwl_is_ready_rf(priv)) {
2648 iwl_scan_cancel_timeout(priv, 100);
2649 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2650 iwlcore_commit_rxon(priv);
2651 }
2652 if (priv->vif == conf->vif) {
2653 priv->vif = NULL;
2654 memset(priv->bssid, 0, ETH_ALEN);
2655 }
2656 mutex_unlock(&priv->mutex);
2657
2658 IWL_DEBUG_MAC80211(priv, "leave\n");
2659
2660 }
2661 EXPORT_SYMBOL(iwl_mac_remove_interface);
2662
2663 /**
2664 * iwl_mac_config - mac80211 config callback
2665 *
2666 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2667 * be set inappropriately and the driver currently sets the hardware up to
2668 * use it whenever needed.
2669 */
2670 int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2671 {
2672 struct iwl_priv *priv = hw->priv;
2673 const struct iwl_channel_info *ch_info;
2674 struct ieee80211_conf *conf = &hw->conf;
2675 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2676 unsigned long flags = 0;
2677 int ret = 0;
2678 u16 ch;
2679 int scan_active = 0;
2680
2681 mutex_lock(&priv->mutex);
2682
2683 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2684 conf->channel->hw_value, changed);
2685
2686 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2687 test_bit(STATUS_SCANNING, &priv->status))) {
2688 scan_active = 1;
2689 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2690 }
2691
2692
2693 /* during scanning mac80211 will delay channel setting until
2694 * scan finish with changed = 0
2695 */
2696 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2697 if (scan_active)
2698 goto set_ch_out;
2699
2700 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2701 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2702 if (!is_channel_valid(ch_info)) {
2703 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2704 ret = -EINVAL;
2705 goto set_ch_out;
2706 }
2707
2708 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
2709 !is_channel_ibss(ch_info)) {
2710 IWL_ERR(priv, "channel %d in band %d not "
2711 "IBSS channel\n",
2712 conf->channel->hw_value, conf->channel->band);
2713 ret = -EINVAL;
2714 goto set_ch_out;
2715 }
2716
2717 spin_lock_irqsave(&priv->lock, flags);
2718
2719 /* Configure HT40 channels */
2720 ht_conf->is_ht = conf_is_ht(conf);
2721 if (ht_conf->is_ht) {
2722 if (conf_is_ht40_minus(conf)) {
2723 ht_conf->extension_chan_offset =
2724 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2725 ht_conf->is_40mhz = true;
2726 } else if (conf_is_ht40_plus(conf)) {
2727 ht_conf->extension_chan_offset =
2728 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2729 ht_conf->is_40mhz = true;
2730 } else {
2731 ht_conf->extension_chan_offset =
2732 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2733 ht_conf->is_40mhz = false;
2734 }
2735 } else
2736 ht_conf->is_40mhz = false;
2737 /* Default to no protection. Protection mode will later be set
2738 * from BSS config in iwl_ht_conf */
2739 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
2740
2741 /* if we are switching from ht to 2.4 clear flags
2742 * from any ht related info since 2.4 does not
2743 * support ht */
2744 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2745 priv->staging_rxon.flags = 0;
2746
2747 iwl_set_rxon_ht(priv, ht_conf);
2748 iwl_set_rxon_channel(priv, conf->channel);
2749
2750 iwl_set_flags_for_band(priv, conf->channel->band);
2751 spin_unlock_irqrestore(&priv->lock, flags);
2752 if (iwl_is_associated(priv) &&
2753 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2754 priv->cfg->ops->lib->set_channel_switch) {
2755 iwl_set_rate(priv);
2756 /*
2757 * at this point, staging_rxon has the
2758 * configuration for channel switch
2759 */
2760 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2761 ch);
2762 if (!ret) {
2763 iwl_print_rx_config_cmd(priv);
2764 goto out;
2765 }
2766 priv->switch_rxon.switch_in_progress = false;
2767 }
2768 set_ch_out:
2769 /* The list of supported rates and rate mask can be different
2770 * for each band; since the band may have changed, reset
2771 * the rate mask to what mac80211 lists */
2772 iwl_set_rate(priv);
2773 }
2774
2775 if (changed & (IEEE80211_CONF_CHANGE_PS |
2776 IEEE80211_CONF_CHANGE_IDLE)) {
2777 ret = iwl_power_update_mode(priv, false);
2778 if (ret)
2779 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
2780 }
2781
2782 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2783 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2784 priv->tx_power_user_lmt, conf->power_level);
2785
2786 iwl_set_tx_power(priv, conf->power_level, false);
2787 }
2788
2789 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2790 if (priv->cfg->ops->hcmd->set_rxon_chain)
2791 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2792
2793 if (!iwl_is_ready(priv)) {
2794 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2795 goto out;
2796 }
2797
2798 if (scan_active)
2799 goto out;
2800
2801 if (memcmp(&priv->active_rxon,
2802 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2803 iwlcore_commit_rxon(priv);
2804 else
2805 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2806
2807
2808 out:
2809 IWL_DEBUG_MAC80211(priv, "leave\n");
2810 mutex_unlock(&priv->mutex);
2811 return ret;
2812 }
2813 EXPORT_SYMBOL(iwl_mac_config);
2814
2815 int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2816 struct ieee80211_tx_queue_stats *stats)
2817 {
2818 struct iwl_priv *priv = hw->priv;
2819 int i, avail;
2820 struct iwl_tx_queue *txq;
2821 struct iwl_queue *q;
2822 unsigned long flags;
2823
2824 IWL_DEBUG_MAC80211(priv, "enter\n");
2825
2826 if (!iwl_is_ready_rf(priv)) {
2827 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2828 return -EIO;
2829 }
2830
2831 spin_lock_irqsave(&priv->lock, flags);
2832
2833 for (i = 0; i < AC_NUM; i++) {
2834 txq = &priv->txq[i];
2835 q = &txq->q;
2836 avail = iwl_queue_space(q);
2837
2838 stats[i].len = q->n_window - avail;
2839 stats[i].limit = q->n_window - q->high_mark;
2840 stats[i].count = q->n_window;
2841
2842 }
2843 spin_unlock_irqrestore(&priv->lock, flags);
2844
2845 IWL_DEBUG_MAC80211(priv, "leave\n");
2846
2847 return 0;
2848 }
2849 EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2850
2851 void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2852 {
2853 struct iwl_priv *priv = hw->priv;
2854 unsigned long flags;
2855
2856 mutex_lock(&priv->mutex);
2857 IWL_DEBUG_MAC80211(priv, "enter\n");
2858
2859 spin_lock_irqsave(&priv->lock, flags);
2860 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
2861 spin_unlock_irqrestore(&priv->lock, flags);
2862
2863 iwl_reset_qos(priv);
2864
2865 spin_lock_irqsave(&priv->lock, flags);
2866 priv->assoc_id = 0;
2867 priv->assoc_capability = 0;
2868 priv->assoc_station_added = 0;
2869
2870 /* new association get rid of ibss beacon skb */
2871 if (priv->ibss_beacon)
2872 dev_kfree_skb(priv->ibss_beacon);
2873
2874 priv->ibss_beacon = NULL;
2875
2876 priv->beacon_int = priv->vif->bss_conf.beacon_int;
2877 priv->timestamp = 0;
2878 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
2879 priv->beacon_int = 0;
2880
2881 spin_unlock_irqrestore(&priv->lock, flags);
2882
2883 if (!iwl_is_ready_rf(priv)) {
2884 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2885 mutex_unlock(&priv->mutex);
2886 return;
2887 }
2888
2889 /* we are restarting association process
2890 * clear RXON_FILTER_ASSOC_MSK bit
2891 */
2892 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2893 iwl_scan_cancel_timeout(priv, 100);
2894 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2895 iwlcore_commit_rxon(priv);
2896 }
2897
2898 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
2899 IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
2900 mutex_unlock(&priv->mutex);
2901 return;
2902 }
2903
2904 iwl_set_rate(priv);
2905
2906 mutex_unlock(&priv->mutex);
2907
2908 IWL_DEBUG_MAC80211(priv, "leave\n");
2909 }
2910 EXPORT_SYMBOL(iwl_mac_reset_tsf);
2911
2912 int iwl_alloc_txq_mem(struct iwl_priv *priv)
2913 {
2914 if (!priv->txq)
2915 priv->txq = kzalloc(
2916 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2917 GFP_KERNEL);
2918 if (!priv->txq) {
2919 IWL_ERR(priv, "Not enough memory for txq \n");
2920 return -ENOMEM;
2921 }
2922 return 0;
2923 }
2924 EXPORT_SYMBOL(iwl_alloc_txq_mem);
2925
2926 void iwl_free_txq_mem(struct iwl_priv *priv)
2927 {
2928 kfree(priv->txq);
2929 priv->txq = NULL;
2930 }
2931 EXPORT_SYMBOL(iwl_free_txq_mem);
2932
2933 int iwl_send_wimax_coex(struct iwl_priv *priv)
2934 {
2935 struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
2936
2937 if (priv->cfg->support_wimax_coexist) {
2938 /* UnMask wake up src at associated sleep */
2939 coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
2940
2941 /* UnMask wake up src at unassociated sleep */
2942 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2943 memcpy(coex_cmd.sta_prio, cu_priorities,
2944 sizeof(struct iwl_wimax_coex_event_entry) *
2945 COEX_NUM_OF_EVENTS);
2946
2947 /* enabling the coexistence feature */
2948 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2949
2950 /* enabling the priorities tables */
2951 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2952 } else {
2953 /* coexistence is disabled */
2954 memset(&coex_cmd, 0, sizeof(coex_cmd));
2955 }
2956 return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2957 sizeof(coex_cmd), &coex_cmd);
2958 }
2959 EXPORT_SYMBOL(iwl_send_wimax_coex);
2960
2961 #ifdef CONFIG_IWLWIFI_DEBUGFS
2962
2963 #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2964
2965 void iwl_reset_traffic_log(struct iwl_priv *priv)
2966 {
2967 priv->tx_traffic_idx = 0;
2968 priv->rx_traffic_idx = 0;
2969 if (priv->tx_traffic)
2970 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2971 if (priv->rx_traffic)
2972 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2973 }
2974
2975 int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2976 {
2977 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2978
2979 if (iwl_debug_level & IWL_DL_TX) {
2980 if (!priv->tx_traffic) {
2981 priv->tx_traffic =
2982 kzalloc(traffic_size, GFP_KERNEL);
2983 if (!priv->tx_traffic)
2984 return -ENOMEM;
2985 }
2986 }
2987 if (iwl_debug_level & IWL_DL_RX) {
2988 if (!priv->rx_traffic) {
2989 priv->rx_traffic =
2990 kzalloc(traffic_size, GFP_KERNEL);
2991 if (!priv->rx_traffic)
2992 return -ENOMEM;
2993 }
2994 }
2995 iwl_reset_traffic_log(priv);
2996 return 0;
2997 }
2998 EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2999
3000 void iwl_free_traffic_mem(struct iwl_priv *priv)
3001 {
3002 kfree(priv->tx_traffic);
3003 priv->tx_traffic = NULL;
3004
3005 kfree(priv->rx_traffic);
3006 priv->rx_traffic = NULL;
3007 }
3008 EXPORT_SYMBOL(iwl_free_traffic_mem);
3009
3010 void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
3011 u16 length, struct ieee80211_hdr *header)
3012 {
3013 __le16 fc;
3014 u16 len;
3015
3016 if (likely(!(iwl_debug_level & IWL_DL_TX)))
3017 return;
3018
3019 if (!priv->tx_traffic)
3020 return;
3021
3022 fc = header->frame_control;
3023 if (ieee80211_is_data(fc)) {
3024 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3025 ? IWL_TRAFFIC_ENTRY_SIZE : length;
3026 memcpy((priv->tx_traffic +
3027 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3028 header, len);
3029 priv->tx_traffic_idx =
3030 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3031 }
3032 }
3033 EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
3034
3035 void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
3036 u16 length, struct ieee80211_hdr *header)
3037 {
3038 __le16 fc;
3039 u16 len;
3040
3041 if (likely(!(iwl_debug_level & IWL_DL_RX)))
3042 return;
3043
3044 if (!priv->rx_traffic)
3045 return;
3046
3047 fc = header->frame_control;
3048 if (ieee80211_is_data(fc)) {
3049 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
3050 ? IWL_TRAFFIC_ENTRY_SIZE : length;
3051 memcpy((priv->rx_traffic +
3052 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
3053 header, len);
3054 priv->rx_traffic_idx =
3055 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
3056 }
3057 }
3058 EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
3059
3060 const char *get_mgmt_string(int cmd)
3061 {
3062 switch (cmd) {
3063 IWL_CMD(MANAGEMENT_ASSOC_REQ);
3064 IWL_CMD(MANAGEMENT_ASSOC_RESP);
3065 IWL_CMD(MANAGEMENT_REASSOC_REQ);
3066 IWL_CMD(MANAGEMENT_REASSOC_RESP);
3067 IWL_CMD(MANAGEMENT_PROBE_REQ);
3068 IWL_CMD(MANAGEMENT_PROBE_RESP);
3069 IWL_CMD(MANAGEMENT_BEACON);
3070 IWL_CMD(MANAGEMENT_ATIM);
3071 IWL_CMD(MANAGEMENT_DISASSOC);
3072 IWL_CMD(MANAGEMENT_AUTH);
3073 IWL_CMD(MANAGEMENT_DEAUTH);
3074 IWL_CMD(MANAGEMENT_ACTION);
3075 default:
3076 return "UNKNOWN";
3077
3078 }
3079 }
3080
3081 const char *get_ctrl_string(int cmd)
3082 {
3083 switch (cmd) {
3084 IWL_CMD(CONTROL_BACK_REQ);
3085 IWL_CMD(CONTROL_BACK);
3086 IWL_CMD(CONTROL_PSPOLL);
3087 IWL_CMD(CONTROL_RTS);
3088 IWL_CMD(CONTROL_CTS);
3089 IWL_CMD(CONTROL_ACK);
3090 IWL_CMD(CONTROL_CFEND);
3091 IWL_CMD(CONTROL_CFENDACK);
3092 default:
3093 return "UNKNOWN";
3094
3095 }
3096 }
3097
3098 void iwl_clear_traffic_stats(struct iwl_priv *priv)
3099 {
3100 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
3101 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
3102 priv->led_tpt = 0;
3103 }
3104
3105 /*
3106 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
3107 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
3108 * Use debugFs to display the rx/rx_statistics
3109 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
3110 * information will be recorded, but DATA pkt still will be recorded
3111 * for the reason of iwl_led.c need to control the led blinking based on
3112 * number of tx and rx data.
3113 *
3114 */
3115 void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
3116 {
3117 struct traffic_stats *stats;
3118
3119 if (is_tx)
3120 stats = &priv->tx_stats;
3121 else
3122 stats = &priv->rx_stats;
3123
3124 if (ieee80211_is_mgmt(fc)) {
3125 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3126 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
3127 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
3128 break;
3129 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
3130 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
3131 break;
3132 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
3133 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
3134 break;
3135 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
3136 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
3137 break;
3138 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
3139 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
3140 break;
3141 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
3142 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
3143 break;
3144 case cpu_to_le16(IEEE80211_STYPE_BEACON):
3145 stats->mgmt[MANAGEMENT_BEACON]++;
3146 break;
3147 case cpu_to_le16(IEEE80211_STYPE_ATIM):
3148 stats->mgmt[MANAGEMENT_ATIM]++;
3149 break;
3150 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
3151 stats->mgmt[MANAGEMENT_DISASSOC]++;
3152 break;
3153 case cpu_to_le16(IEEE80211_STYPE_AUTH):
3154 stats->mgmt[MANAGEMENT_AUTH]++;
3155 break;
3156 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
3157 stats->mgmt[MANAGEMENT_DEAUTH]++;
3158 break;
3159 case cpu_to_le16(IEEE80211_STYPE_ACTION):
3160 stats->mgmt[MANAGEMENT_ACTION]++;
3161 break;
3162 }
3163 } else if (ieee80211_is_ctl(fc)) {
3164 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
3165 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
3166 stats->ctrl[CONTROL_BACK_REQ]++;
3167 break;
3168 case cpu_to_le16(IEEE80211_STYPE_BACK):
3169 stats->ctrl[CONTROL_BACK]++;
3170 break;
3171 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
3172 stats->ctrl[CONTROL_PSPOLL]++;
3173 break;
3174 case cpu_to_le16(IEEE80211_STYPE_RTS):
3175 stats->ctrl[CONTROL_RTS]++;
3176 break;
3177 case cpu_to_le16(IEEE80211_STYPE_CTS):
3178 stats->ctrl[CONTROL_CTS]++;
3179 break;
3180 case cpu_to_le16(IEEE80211_STYPE_ACK):
3181 stats->ctrl[CONTROL_ACK]++;
3182 break;
3183 case cpu_to_le16(IEEE80211_STYPE_CFEND):
3184 stats->ctrl[CONTROL_CFEND]++;
3185 break;
3186 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
3187 stats->ctrl[CONTROL_CFENDACK]++;
3188 break;
3189 }
3190 } else {
3191 /* data */
3192 stats->data_cnt++;
3193 stats->data_bytes += len;
3194 }
3195 iwl_leds_background(priv);
3196 }
3197 EXPORT_SYMBOL(iwl_update_stats);
3198 #endif
3199
3200 #ifdef CONFIG_PM
3201
3202 int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3203 {
3204 struct iwl_priv *priv = pci_get_drvdata(pdev);
3205
3206 /*
3207 * This function is called when system goes into suspend state
3208 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
3209 * first but since iwl_mac_stop() has no knowledge of who the caller is,
3210 * it will not call apm_ops.stop() to stop the DMA operation.
3211 * Calling apm_ops.stop here to make sure we stop the DMA.
3212 */
3213 priv->cfg->ops->lib->apm_ops.stop(priv);
3214
3215 pci_save_state(pdev);
3216 pci_disable_device(pdev);
3217 pci_set_power_state(pdev, PCI_D3hot);
3218
3219 return 0;
3220 }
3221 EXPORT_SYMBOL(iwl_pci_suspend);
3222
3223 int iwl_pci_resume(struct pci_dev *pdev)
3224 {
3225 struct iwl_priv *priv = pci_get_drvdata(pdev);
3226 int ret;
3227
3228 pci_set_power_state(pdev, PCI_D0);
3229 ret = pci_enable_device(pdev);
3230 if (ret)
3231 return ret;
3232 pci_restore_state(pdev);
3233 iwl_enable_interrupts(priv);
3234
3235 return 0;
3236 }
3237 EXPORT_SYMBOL(iwl_pci_resume);
3238
3239 #endif /* CONFIG_PM */
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