1 /******************************************************************************
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <net/mac80211.h>
33 #include "iwl-eeprom.h"
34 #include "iwl-dev.h" /* FIXME: remove */
35 #include "iwl-debug.h"
38 #include "iwl-rfkill.h"
39 #include "iwl-power.h"
43 MODULE_DESCRIPTION("iwl core");
44 MODULE_VERSION(IWLWIFI_VERSION
);
45 MODULE_AUTHOR(DRV_COPYRIGHT
" " DRV_AUTHOR
);
46 MODULE_LICENSE("GPL");
48 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
49 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
50 IWL_RATE_SISO_##s##M_PLCP, \
51 IWL_RATE_MIMO2_##s##M_PLCP,\
52 IWL_RATE_MIMO3_##s##M_PLCP,\
53 IWL_RATE_##r##M_IEEE, \
54 IWL_RATE_##ip##M_INDEX, \
55 IWL_RATE_##in##M_INDEX, \
56 IWL_RATE_##rp##M_INDEX, \
57 IWL_RATE_##rn##M_INDEX, \
58 IWL_RATE_##pp##M_INDEX, \
59 IWL_RATE_##np##M_INDEX }
63 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
65 * If there isn't a valid next or previous rate then INV is used which
66 * maps to IWL_RATE_INVALID
69 const struct iwl_rate_info iwl_rates
[IWL_RATE_COUNT
] = {
70 IWL_DECLARE_RATE_INFO(1, INV
, INV
, 2, INV
, 2, INV
, 2), /* 1mbps */
71 IWL_DECLARE_RATE_INFO(2, INV
, 1, 5, 1, 5, 1, 5), /* 2mbps */
72 IWL_DECLARE_RATE_INFO(5, INV
, 2, 6, 2, 11, 2, 11), /*5.5mbps */
73 IWL_DECLARE_RATE_INFO(11, INV
, 9, 12, 9, 12, 5, 18), /* 11mbps */
74 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
75 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
76 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
77 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
78 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
79 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
80 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
81 IWL_DECLARE_RATE_INFO(54, 54, 48, INV
, 48, INV
, 48, INV
),/* 54mbps */
82 IWL_DECLARE_RATE_INFO(60, 60, 48, INV
, 48, INV
, 48, INV
),/* 60mbps */
83 /* FIXME:RS: ^^ should be INV (legacy) */
85 EXPORT_SYMBOL(iwl_rates
);
88 * translate ucode response to mac80211 tx status control values
90 void iwl_hwrate_to_tx_control(struct iwl_priv
*priv
, u32 rate_n_flags
,
91 struct ieee80211_tx_info
*info
)
94 struct ieee80211_tx_rate
*r
= &info
->control
.rates
[0];
96 info
->antenna_sel_tx
=
97 ((rate_n_flags
& RATE_MCS_ANT_ABC_MSK
) >> RATE_MCS_ANT_POS
);
98 if (rate_n_flags
& RATE_MCS_HT_MSK
)
99 r
->flags
|= IEEE80211_TX_RC_MCS
;
100 if (rate_n_flags
& RATE_MCS_GF_MSK
)
101 r
->flags
|= IEEE80211_TX_RC_GREEN_FIELD
;
102 if (rate_n_flags
& RATE_MCS_FAT_MSK
)
103 r
->flags
|= IEEE80211_TX_RC_40_MHZ_WIDTH
;
104 if (rate_n_flags
& RATE_MCS_DUP_MSK
)
105 r
->flags
|= IEEE80211_TX_RC_DUP_DATA
;
106 if (rate_n_flags
& RATE_MCS_SGI_MSK
)
107 r
->flags
|= IEEE80211_TX_RC_SHORT_GI
;
108 rate_index
= iwl_hwrate_to_plcp_idx(rate_n_flags
);
109 if (info
->band
== IEEE80211_BAND_5GHZ
)
110 rate_index
-= IWL_FIRST_OFDM_RATE
;
113 EXPORT_SYMBOL(iwl_hwrate_to_tx_control
);
115 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags
)
120 if (rate_n_flags
& RATE_MCS_HT_MSK
) {
121 idx
= (rate_n_flags
& 0xff);
123 if (idx
>= IWL_RATE_MIMO3_6M_PLCP
)
124 idx
= idx
- IWL_RATE_MIMO3_6M_PLCP
;
125 else if (idx
>= IWL_RATE_MIMO2_6M_PLCP
)
126 idx
= idx
- IWL_RATE_MIMO2_6M_PLCP
;
128 idx
+= IWL_FIRST_OFDM_RATE
;
129 /* skip 9M not supported in ht*/
130 if (idx
>= IWL_RATE_9M_INDEX
)
132 if ((idx
>= IWL_FIRST_OFDM_RATE
) && (idx
<= IWL_LAST_OFDM_RATE
))
135 /* legacy rate format, search for match in table */
137 for (idx
= 0; idx
< ARRAY_SIZE(iwl_rates
); idx
++)
138 if (iwl_rates
[idx
].plcp
== (rate_n_flags
& 0xFF))
144 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx
);
146 u8
iwl_toggle_tx_ant(struct iwl_priv
*priv
, u8 ant
)
150 for (i
= 0; i
< RATE_ANT_NUM
- 1; i
++) {
151 ind
= (ind
+ 1) < RATE_ANT_NUM
? ind
+ 1 : 0;
152 if (priv
->hw_params
.valid_tx_ant
& BIT(ind
))
158 const u8 iwl_bcast_addr
[ETH_ALEN
] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
159 EXPORT_SYMBOL(iwl_bcast_addr
);
162 /* This function both allocates and initializes hw and priv. */
163 struct ieee80211_hw
*iwl_alloc_all(struct iwl_cfg
*cfg
,
164 struct ieee80211_ops
*hw_ops
)
166 struct iwl_priv
*priv
;
168 /* mac80211 allocates memory for this device instance, including
169 * space for this driver's private structure */
170 struct ieee80211_hw
*hw
=
171 ieee80211_alloc_hw(sizeof(struct iwl_priv
), hw_ops
);
173 IWL_ERROR("Can not allocate network device\n");
183 EXPORT_SYMBOL(iwl_alloc_all
);
185 void iwl_hw_detect(struct iwl_priv
*priv
)
187 priv
->hw_rev
= _iwl_read32(priv
, CSR_HW_REV
);
188 priv
->hw_wa_rev
= _iwl_read32(priv
, CSR_HW_REV_WA_REG
);
189 pci_read_config_byte(priv
->pci_dev
, PCI_REVISION_ID
, &priv
->rev_id
);
191 EXPORT_SYMBOL(iwl_hw_detect
);
193 int iwl_hw_nic_init(struct iwl_priv
*priv
)
196 struct iwl_rx_queue
*rxq
= &priv
->rxq
;
200 spin_lock_irqsave(&priv
->lock
, flags
);
201 priv
->cfg
->ops
->lib
->apm_ops
.init(priv
);
202 iwl_write32(priv
, CSR_INT_COALESCING
, 512 / 32);
203 spin_unlock_irqrestore(&priv
->lock
, flags
);
205 ret
= priv
->cfg
->ops
->lib
->apm_ops
.set_pwr_src(priv
, IWL_PWR_SRC_VMAIN
);
207 priv
->cfg
->ops
->lib
->apm_ops
.config(priv
);
209 /* Allocate the RX queue, or reset if it is already allocated */
211 ret
= iwl_rx_queue_alloc(priv
);
213 IWL_ERROR("Unable to initialize Rx queue\n");
217 iwl_rx_queue_reset(priv
, rxq
);
219 iwl_rx_replenish(priv
);
221 iwl_rx_init(priv
, rxq
);
223 spin_lock_irqsave(&priv
->lock
, flags
);
225 rxq
->need_update
= 1;
226 iwl_rx_queue_update_write_ptr(priv
, rxq
);
228 spin_unlock_irqrestore(&priv
->lock
, flags
);
230 /* Allocate and init all Tx and Command queues */
231 ret
= iwl_txq_ctx_reset(priv
);
235 set_bit(STATUS_INIT
, &priv
->status
);
239 EXPORT_SYMBOL(iwl_hw_nic_init
);
241 void iwl_reset_qos(struct iwl_priv
*priv
)
246 bool is_legacy
= false;
250 spin_lock_irqsave(&priv
->lock
, flags
);
251 /* QoS always active in AP and ADHOC mode
252 * In STA mode wait for association
254 if (priv
->iw_mode
== NL80211_IFTYPE_ADHOC
||
255 priv
->iw_mode
== NL80211_IFTYPE_AP
)
256 priv
->qos_data
.qos_active
= 1;
258 priv
->qos_data
.qos_active
= 0;
260 /* check for legacy mode */
261 if ((priv
->iw_mode
== NL80211_IFTYPE_ADHOC
&&
262 (priv
->active_rate
& IWL_OFDM_RATES_MASK
) == 0) ||
263 (priv
->iw_mode
== NL80211_IFTYPE_STATION
&&
264 (priv
->staging_rxon
.flags
& RXON_FLG_SHORT_SLOT_MSK
) == 0)) {
269 if (priv
->qos_data
.qos_active
)
272 priv
->qos_data
.def_qos_parm
.ac
[0].cw_min
= cpu_to_le16(cw_min
);
273 priv
->qos_data
.def_qos_parm
.ac
[0].cw_max
= cpu_to_le16(cw_max
);
274 priv
->qos_data
.def_qos_parm
.ac
[0].aifsn
= aifs
;
275 priv
->qos_data
.def_qos_parm
.ac
[0].edca_txop
= 0;
276 priv
->qos_data
.def_qos_parm
.ac
[0].reserved1
= 0;
278 if (priv
->qos_data
.qos_active
) {
280 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
= cpu_to_le16(cw_min
);
281 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
= cpu_to_le16(cw_max
);
282 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= 7;
283 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
= 0;
284 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
287 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
=
288 cpu_to_le16((cw_min
+ 1) / 2 - 1);
289 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
=
291 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= 2;
293 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
296 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
298 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
301 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
=
302 cpu_to_le16((cw_min
+ 1) / 4 - 1);
303 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
=
304 cpu_to_le16((cw_max
+ 1) / 2 - 1);
305 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= 2;
306 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
308 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
311 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
=
314 for (i
= 1; i
< 4; i
++) {
315 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_min
=
317 priv
->qos_data
.def_qos_parm
.ac
[i
].cw_max
=
319 priv
->qos_data
.def_qos_parm
.ac
[i
].aifsn
= aifs
;
320 priv
->qos_data
.def_qos_parm
.ac
[i
].edca_txop
= 0;
321 priv
->qos_data
.def_qos_parm
.ac
[i
].reserved1
= 0;
324 IWL_DEBUG_QOS("set QoS to default \n");
326 spin_unlock_irqrestore(&priv
->lock
, flags
);
328 EXPORT_SYMBOL(iwl_reset_qos
);
330 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
331 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
332 static void iwlcore_init_ht_hw_capab(const struct iwl_priv
*priv
,
333 struct ieee80211_sta_ht_cap
*ht_info
,
334 enum ieee80211_band band
)
336 u16 max_bit_rate
= 0;
337 u8 rx_chains_num
= priv
->hw_params
.rx_chains_num
;
338 u8 tx_chains_num
= priv
->hw_params
.tx_chains_num
;
341 memset(&ht_info
->mcs
, 0, sizeof(ht_info
->mcs
));
343 ht_info
->ht_supported
= true;
345 ht_info
->cap
|= IEEE80211_HT_CAP_GRN_FLD
;
346 ht_info
->cap
|= IEEE80211_HT_CAP_SGI_20
;
347 ht_info
->cap
|= (IEEE80211_HT_CAP_SM_PS
&
348 (WLAN_HT_CAP_SM_PS_DISABLED
<< 2));
350 max_bit_rate
= MAX_BIT_RATE_20_MHZ
;
351 if (priv
->hw_params
.fat_channel
& BIT(band
)) {
352 ht_info
->cap
|= IEEE80211_HT_CAP_SUP_WIDTH_20_40
;
353 ht_info
->cap
|= IEEE80211_HT_CAP_SGI_40
;
354 ht_info
->mcs
.rx_mask
[4] = 0x01;
355 max_bit_rate
= MAX_BIT_RATE_40_MHZ
;
358 if (priv
->cfg
->mod_params
->amsdu_size_8K
)
359 ht_info
->cap
|= IEEE80211_HT_CAP_MAX_AMSDU
;
361 ht_info
->ampdu_factor
= CFG_HT_RX_AMPDU_FACTOR_DEF
;
362 ht_info
->ampdu_density
= CFG_HT_MPDU_DENSITY_DEF
;
364 ht_info
->mcs
.rx_mask
[0] = 0xFF;
365 if (rx_chains_num
>= 2)
366 ht_info
->mcs
.rx_mask
[1] = 0xFF;
367 if (rx_chains_num
>= 3)
368 ht_info
->mcs
.rx_mask
[2] = 0xFF;
370 /* Highest supported Rx data rate */
371 max_bit_rate
*= rx_chains_num
;
372 WARN_ON(max_bit_rate
& ~IEEE80211_HT_MCS_RX_HIGHEST_MASK
);
373 ht_info
->mcs
.rx_highest
= cpu_to_le16(max_bit_rate
);
375 /* Tx MCS capabilities */
376 ht_info
->mcs
.tx_params
= IEEE80211_HT_MCS_TX_DEFINED
;
377 if (tx_chains_num
!= rx_chains_num
) {
378 ht_info
->mcs
.tx_params
|= IEEE80211_HT_MCS_TX_RX_DIFF
;
379 ht_info
->mcs
.tx_params
|= ((tx_chains_num
- 1) <<
380 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT
);
384 static void iwlcore_init_hw_rates(struct iwl_priv
*priv
,
385 struct ieee80211_rate
*rates
)
389 for (i
= 0; i
< IWL_RATE_COUNT
; i
++) {
390 rates
[i
].bitrate
= iwl_rates
[i
].ieee
* 5;
391 rates
[i
].hw_value
= i
; /* Rate scaling will work on indexes */
392 rates
[i
].hw_value_short
= i
;
394 if ((i
> IWL_LAST_OFDM_RATE
) || (i
< IWL_FIRST_OFDM_RATE
)) {
396 * If CCK != 1M then set short preamble rate flag.
399 (iwl_rates
[i
].plcp
== IWL_RATE_1M_PLCP
) ?
400 0 : IEEE80211_RATE_SHORT_PREAMBLE
;
406 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
408 static int iwlcore_init_geos(struct iwl_priv
*priv
)
410 struct iwl_channel_info
*ch
;
411 struct ieee80211_supported_band
*sband
;
412 struct ieee80211_channel
*channels
;
413 struct ieee80211_channel
*geo_ch
;
414 struct ieee80211_rate
*rates
;
417 if (priv
->bands
[IEEE80211_BAND_2GHZ
].n_bitrates
||
418 priv
->bands
[IEEE80211_BAND_5GHZ
].n_bitrates
) {
419 IWL_DEBUG_INFO("Geography modes already initialized.\n");
420 set_bit(STATUS_GEO_CONFIGURED
, &priv
->status
);
424 channels
= kzalloc(sizeof(struct ieee80211_channel
) *
425 priv
->channel_count
, GFP_KERNEL
);
429 rates
= kzalloc((sizeof(struct ieee80211_rate
) * (IWL_RATE_COUNT
+ 1)),
436 /* 5.2GHz channels start after the 2.4GHz channels */
437 sband
= &priv
->bands
[IEEE80211_BAND_5GHZ
];
438 sband
->channels
= &channels
[ARRAY_SIZE(iwl_eeprom_band_1
)];
440 sband
->bitrates
= &rates
[IWL_FIRST_OFDM_RATE
];
441 sband
->n_bitrates
= IWL_RATE_COUNT
- IWL_FIRST_OFDM_RATE
;
443 if (priv
->cfg
->sku
& IWL_SKU_N
)
444 iwlcore_init_ht_hw_capab(priv
, &sband
->ht_cap
,
445 IEEE80211_BAND_5GHZ
);
447 sband
= &priv
->bands
[IEEE80211_BAND_2GHZ
];
448 sband
->channels
= channels
;
450 sband
->bitrates
= rates
;
451 sband
->n_bitrates
= IWL_RATE_COUNT
;
453 if (priv
->cfg
->sku
& IWL_SKU_N
)
454 iwlcore_init_ht_hw_capab(priv
, &sband
->ht_cap
,
455 IEEE80211_BAND_2GHZ
);
457 priv
->ieee_channels
= channels
;
458 priv
->ieee_rates
= rates
;
460 iwlcore_init_hw_rates(priv
, rates
);
462 for (i
= 0; i
< priv
->channel_count
; i
++) {
463 ch
= &priv
->channel_info
[i
];
465 /* FIXME: might be removed if scan is OK */
466 if (!is_channel_valid(ch
))
469 if (is_channel_a_band(ch
))
470 sband
= &priv
->bands
[IEEE80211_BAND_5GHZ
];
472 sband
= &priv
->bands
[IEEE80211_BAND_2GHZ
];
474 geo_ch
= &sband
->channels
[sband
->n_channels
++];
476 geo_ch
->center_freq
=
477 ieee80211_channel_to_frequency(ch
->channel
);
478 geo_ch
->max_power
= ch
->max_power_avg
;
479 geo_ch
->max_antenna_gain
= 0xff;
480 geo_ch
->hw_value
= ch
->channel
;
482 if (is_channel_valid(ch
)) {
483 if (!(ch
->flags
& EEPROM_CHANNEL_IBSS
))
484 geo_ch
->flags
|= IEEE80211_CHAN_NO_IBSS
;
486 if (!(ch
->flags
& EEPROM_CHANNEL_ACTIVE
))
487 geo_ch
->flags
|= IEEE80211_CHAN_PASSIVE_SCAN
;
489 if (ch
->flags
& EEPROM_CHANNEL_RADAR
)
490 geo_ch
->flags
|= IEEE80211_CHAN_RADAR
;
492 geo_ch
->flags
|= ch
->fat_extension_channel
;
494 if (ch
->max_power_avg
> priv
->tx_power_channel_lmt
)
495 priv
->tx_power_channel_lmt
= ch
->max_power_avg
;
497 geo_ch
->flags
|= IEEE80211_CHAN_DISABLED
;
500 /* Save flags for reg domain usage */
501 geo_ch
->orig_flags
= geo_ch
->flags
;
503 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
504 ch
->channel
, geo_ch
->center_freq
,
505 is_channel_a_band(ch
) ? "5.2" : "2.4",
506 geo_ch
->flags
& IEEE80211_CHAN_DISABLED
?
507 "restricted" : "valid",
511 if ((priv
->bands
[IEEE80211_BAND_5GHZ
].n_channels
== 0) &&
512 priv
->cfg
->sku
& IWL_SKU_A
) {
513 printk(KERN_INFO DRV_NAME
514 ": Incorrectly detected BG card as ABG. Please send "
515 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
516 priv
->pci_dev
->device
, priv
->pci_dev
->subsystem_device
);
517 priv
->cfg
->sku
&= ~IWL_SKU_A
;
520 printk(KERN_INFO DRV_NAME
521 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
522 priv
->bands
[IEEE80211_BAND_2GHZ
].n_channels
,
523 priv
->bands
[IEEE80211_BAND_5GHZ
].n_channels
);
526 set_bit(STATUS_GEO_CONFIGURED
, &priv
->status
);
532 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
534 static void iwlcore_free_geos(struct iwl_priv
*priv
)
536 kfree(priv
->ieee_channels
);
537 kfree(priv
->ieee_rates
);
538 clear_bit(STATUS_GEO_CONFIGURED
, &priv
->status
);
541 static bool is_single_rx_stream(struct iwl_priv
*priv
)
543 return !priv
->current_ht_config
.is_ht
||
544 ((priv
->current_ht_config
.mcs
.rx_mask
[1] == 0) &&
545 (priv
->current_ht_config
.mcs
.rx_mask
[2] == 0));
548 static u8
iwl_is_channel_extension(struct iwl_priv
*priv
,
549 enum ieee80211_band band
,
550 u16 channel
, u8 extension_chan_offset
)
552 const struct iwl_channel_info
*ch_info
;
554 ch_info
= iwl_get_channel_info(priv
, band
, channel
);
555 if (!is_channel_valid(ch_info
))
558 if (extension_chan_offset
== IEEE80211_HT_PARAM_CHA_SEC_ABOVE
)
559 return !(ch_info
->fat_extension_channel
&
560 IEEE80211_CHAN_NO_FAT_ABOVE
);
561 else if (extension_chan_offset
== IEEE80211_HT_PARAM_CHA_SEC_BELOW
)
562 return !(ch_info
->fat_extension_channel
&
563 IEEE80211_CHAN_NO_FAT_BELOW
);
568 u8
iwl_is_fat_tx_allowed(struct iwl_priv
*priv
,
569 struct ieee80211_sta_ht_cap
*sta_ht_inf
)
571 struct iwl_ht_info
*iwl_ht_conf
= &priv
->current_ht_config
;
573 if ((!iwl_ht_conf
->is_ht
) ||
574 (iwl_ht_conf
->supported_chan_width
!= IWL_CHANNEL_WIDTH_40MHZ
) ||
575 (iwl_ht_conf
->extension_chan_offset
== IEEE80211_HT_PARAM_CHA_SEC_NONE
))
579 if ((!sta_ht_inf
->ht_supported
) ||
580 (!(sta_ht_inf
->cap
& IEEE80211_HT_CAP_SUP_WIDTH_20_40
)))
584 return iwl_is_channel_extension(priv
, priv
->band
,
585 le16_to_cpu(priv
->staging_rxon
.channel
),
586 iwl_ht_conf
->extension_chan_offset
);
588 EXPORT_SYMBOL(iwl_is_fat_tx_allowed
);
590 void iwl_set_rxon_ht(struct iwl_priv
*priv
, struct iwl_ht_info
*ht_info
)
592 struct iwl_rxon_cmd
*rxon
= &priv
->staging_rxon
;
595 if (!ht_info
->is_ht
) {
596 rxon
->flags
&= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK
|
597 RXON_FLG_CHANNEL_MODE_PURE_40_MSK
|
598 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
|
599 RXON_FLG_FAT_PROT_MSK
|
600 RXON_FLG_HT_PROT_MSK
);
604 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
605 if (iwl_is_fat_tx_allowed(priv
, NULL
))
606 rxon
->flags
|= RXON_FLG_CHANNEL_MODE_MIXED_MSK
;
608 rxon
->flags
&= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK
|
609 RXON_FLG_CHANNEL_MODE_PURE_40_MSK
);
611 /* Note: control channel is opposite of extension channel */
612 switch (ht_info
->extension_chan_offset
) {
613 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE
:
614 rxon
->flags
&= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
);
616 case IEEE80211_HT_PARAM_CHA_SEC_BELOW
:
617 rxon
->flags
|= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
;
619 case IEEE80211_HT_PARAM_CHA_SEC_NONE
:
621 rxon
->flags
&= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK
;
625 val
= ht_info
->ht_protection
;
627 rxon
->flags
|= cpu_to_le32(val
<< RXON_FLG_HT_OPERATING_MODE_POS
);
629 iwl_set_rxon_chain(priv
);
631 IWL_DEBUG_ASSOC("supported HT rate 0x%X 0x%X 0x%X "
632 "rxon flags 0x%X operation mode :0x%X "
633 "extension channel offset 0x%x\n",
634 ht_info
->mcs
.rx_mask
[0],
635 ht_info
->mcs
.rx_mask
[1],
636 ht_info
->mcs
.rx_mask
[2],
637 le32_to_cpu(rxon
->flags
), ht_info
->ht_protection
,
638 ht_info
->extension_chan_offset
);
641 EXPORT_SYMBOL(iwl_set_rxon_ht
);
643 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
644 #define IWL_NUM_RX_CHAINS_SINGLE 2
645 #define IWL_NUM_IDLE_CHAINS_DUAL 2
646 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
648 /* Determine how many receiver/antenna chains to use.
649 * More provides better reception via diversity. Fewer saves power.
650 * MIMO (dual stream) requires at least 2, but works better with 3.
651 * This does not determine *which* chains to use, just how many.
653 static int iwl_get_active_rx_chain_count(struct iwl_priv
*priv
)
655 bool is_single
= is_single_rx_stream(priv
);
656 bool is_cam
= !test_bit(STATUS_POWER_PMI
, &priv
->status
);
658 /* # of Rx chains to use when expecting MIMO. */
659 if (is_single
|| (!is_cam
&& (priv
->current_ht_config
.sm_ps
==
660 WLAN_HT_CAP_SM_PS_STATIC
)))
661 return IWL_NUM_RX_CHAINS_SINGLE
;
663 return IWL_NUM_RX_CHAINS_MULTIPLE
;
666 static int iwl_get_idle_rx_chain_count(struct iwl_priv
*priv
, int active_cnt
)
669 bool is_cam
= !test_bit(STATUS_POWER_PMI
, &priv
->status
);
670 /* # Rx chains when idling and maybe trying to save power */
671 switch (priv
->current_ht_config
.sm_ps
) {
672 case WLAN_HT_CAP_SM_PS_STATIC
:
673 case WLAN_HT_CAP_SM_PS_DYNAMIC
:
674 idle_cnt
= (is_cam
) ? IWL_NUM_IDLE_CHAINS_DUAL
:
675 IWL_NUM_IDLE_CHAINS_SINGLE
;
677 case WLAN_HT_CAP_SM_PS_DISABLED
:
678 idle_cnt
= (is_cam
) ? active_cnt
: IWL_NUM_IDLE_CHAINS_SINGLE
;
680 case WLAN_HT_CAP_SM_PS_INVALID
:
682 IWL_ERROR("invalid mimo ps mode %d\n",
683 priv
->current_ht_config
.sm_ps
);
692 static u8
iwl_count_chain_bitmap(u32 chain_bitmap
)
695 res
= (chain_bitmap
& BIT(0)) >> 0;
696 res
+= (chain_bitmap
& BIT(1)) >> 1;
697 res
+= (chain_bitmap
& BIT(2)) >> 2;
698 res
+= (chain_bitmap
& BIT(4)) >> 4;
703 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
705 * Selects how many and which Rx receivers/antennas/chains to use.
706 * This should not be used for scan command ... it puts data in wrong place.
708 void iwl_set_rxon_chain(struct iwl_priv
*priv
)
710 bool is_single
= is_single_rx_stream(priv
);
711 bool is_cam
= !test_bit(STATUS_POWER_PMI
, &priv
->status
);
712 u8 idle_rx_cnt
, active_rx_cnt
, valid_rx_cnt
;
716 /* Tell uCode which antennas are actually connected.
717 * Before first association, we assume all antennas are connected.
718 * Just after first association, iwl_chain_noise_calibration()
719 * checks which antennas actually *are* connected. */
720 if (priv
->chain_noise_data
.active_chains
)
721 active_chains
= priv
->chain_noise_data
.active_chains
;
723 active_chains
= priv
->hw_params
.valid_rx_ant
;
725 rx_chain
= active_chains
<< RXON_RX_CHAIN_VALID_POS
;
727 /* How many receivers should we use? */
728 active_rx_cnt
= iwl_get_active_rx_chain_count(priv
);
729 idle_rx_cnt
= iwl_get_idle_rx_chain_count(priv
, active_rx_cnt
);
732 /* correct rx chain count according hw settings
733 * and chain noise calibration
735 valid_rx_cnt
= iwl_count_chain_bitmap(active_chains
);
736 if (valid_rx_cnt
< active_rx_cnt
)
737 active_rx_cnt
= valid_rx_cnt
;
739 if (valid_rx_cnt
< idle_rx_cnt
)
740 idle_rx_cnt
= valid_rx_cnt
;
742 rx_chain
|= active_rx_cnt
<< RXON_RX_CHAIN_MIMO_CNT_POS
;
743 rx_chain
|= idle_rx_cnt
<< RXON_RX_CHAIN_CNT_POS
;
745 priv
->staging_rxon
.rx_chain
= cpu_to_le16(rx_chain
);
747 if (!is_single
&& (active_rx_cnt
>= IWL_NUM_RX_CHAINS_SINGLE
) && is_cam
)
748 priv
->staging_rxon
.rx_chain
|= RXON_RX_CHAIN_MIMO_FORCE_MSK
;
750 priv
->staging_rxon
.rx_chain
&= ~RXON_RX_CHAIN_MIMO_FORCE_MSK
;
752 IWL_DEBUG_ASSOC("rx_chain=0x%X active=%d idle=%d\n",
753 priv
->staging_rxon
.rx_chain
,
754 active_rx_cnt
, idle_rx_cnt
);
756 WARN_ON(active_rx_cnt
== 0 || idle_rx_cnt
== 0 ||
757 active_rx_cnt
< idle_rx_cnt
);
759 EXPORT_SYMBOL(iwl_set_rxon_chain
);
762 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
763 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
764 * @channel: Any channel valid for the requested phymode
766 * In addition to setting the staging RXON, priv->phymode is also set.
768 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
769 * in the staging RXON flag structure based on the phymode
771 int iwl_set_rxon_channel(struct iwl_priv
*priv
, struct ieee80211_channel
*ch
)
773 enum ieee80211_band band
= ch
->band
;
774 u16 channel
= ieee80211_frequency_to_channel(ch
->center_freq
);
776 if (!iwl_get_channel_info(priv
, band
, channel
)) {
777 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
782 if ((le16_to_cpu(priv
->staging_rxon
.channel
) == channel
) &&
783 (priv
->band
== band
))
786 priv
->staging_rxon
.channel
= cpu_to_le16(channel
);
787 if (band
== IEEE80211_BAND_5GHZ
)
788 priv
->staging_rxon
.flags
&= ~RXON_FLG_BAND_24G_MSK
;
790 priv
->staging_rxon
.flags
|= RXON_FLG_BAND_24G_MSK
;
794 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel
, band
);
798 EXPORT_SYMBOL(iwl_set_rxon_channel
);
800 int iwl_setup_mac(struct iwl_priv
*priv
)
803 struct ieee80211_hw
*hw
= priv
->hw
;
804 hw
->rate_control_algorithm
= "iwl-agn-rs";
806 /* Tell mac80211 our characteristics */
807 hw
->flags
= IEEE80211_HW_SIGNAL_DBM
|
808 IEEE80211_HW_NOISE_DBM
|
809 IEEE80211_HW_AMPDU_AGGREGATION
;
810 hw
->wiphy
->interface_modes
=
811 BIT(NL80211_IFTYPE_STATION
) |
812 BIT(NL80211_IFTYPE_ADHOC
);
814 hw
->wiphy
->fw_handles_regulatory
= true;
816 /* Default value; 4 EDCA QOS priorities */
818 /* queues to support 11n aggregation */
819 if (priv
->cfg
->sku
& IWL_SKU_N
)
820 hw
->ampdu_queues
= priv
->cfg
->mod_params
->num_of_ampdu_queues
;
822 hw
->conf
.beacon_int
= 100;
823 hw
->max_listen_interval
= IWL_CONN_MAX_LISTEN_INTERVAL
;
825 if (priv
->bands
[IEEE80211_BAND_2GHZ
].n_channels
)
826 priv
->hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
827 &priv
->bands
[IEEE80211_BAND_2GHZ
];
828 if (priv
->bands
[IEEE80211_BAND_5GHZ
].n_channels
)
829 priv
->hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
] =
830 &priv
->bands
[IEEE80211_BAND_5GHZ
];
832 ret
= ieee80211_register_hw(priv
->hw
);
834 IWL_ERROR("Failed to register hw (error %d)\n", ret
);
837 priv
->mac80211_registered
= 1;
841 EXPORT_SYMBOL(iwl_setup_mac
);
843 int iwl_set_hw_params(struct iwl_priv
*priv
)
845 priv
->hw_params
.sw_crypto
= priv
->cfg
->mod_params
->sw_crypto
;
846 priv
->hw_params
.max_rxq_size
= RX_QUEUE_SIZE
;
847 priv
->hw_params
.max_rxq_log
= RX_QUEUE_SIZE_LOG
;
848 if (priv
->cfg
->mod_params
->amsdu_size_8K
)
849 priv
->hw_params
.rx_buf_size
= IWL_RX_BUF_SIZE_8K
;
851 priv
->hw_params
.rx_buf_size
= IWL_RX_BUF_SIZE_4K
;
852 priv
->hw_params
.max_pkt_size
= priv
->hw_params
.rx_buf_size
- 256;
854 if (priv
->cfg
->mod_params
->disable_11n
)
855 priv
->cfg
->sku
&= ~IWL_SKU_N
;
857 /* Device-specific setup */
858 return priv
->cfg
->ops
->lib
->set_hw_params(priv
);
860 EXPORT_SYMBOL(iwl_set_hw_params
);
862 int iwl_init_drv(struct iwl_priv
*priv
)
866 priv
->retry_rate
= 1;
867 priv
->ibss_beacon
= NULL
;
869 spin_lock_init(&priv
->lock
);
870 spin_lock_init(&priv
->power_data
.lock
);
871 spin_lock_init(&priv
->sta_lock
);
872 spin_lock_init(&priv
->hcmd_lock
);
874 INIT_LIST_HEAD(&priv
->free_frames
);
876 mutex_init(&priv
->mutex
);
878 /* Clear the driver's (not device's) station table */
879 iwl_clear_stations_table(priv
);
881 priv
->data_retry_limit
= -1;
882 priv
->ieee_channels
= NULL
;
883 priv
->ieee_rates
= NULL
;
884 priv
->band
= IEEE80211_BAND_2GHZ
;
886 priv
->iw_mode
= NL80211_IFTYPE_STATION
;
888 priv
->current_ht_config
.sm_ps
= WLAN_HT_CAP_SM_PS_DISABLED
;
890 /* Choose which receivers/antennas to use */
891 iwl_set_rxon_chain(priv
);
892 iwl_init_scan_params(priv
);
896 priv
->qos_data
.qos_active
= 0;
897 priv
->qos_data
.qos_cap
.val
= 0;
899 priv
->rates_mask
= IWL_RATES_MASK
;
900 /* If power management is turned on, default to AC mode */
901 priv
->power_mode
= IWL_POWER_AC
;
902 priv
->tx_power_user_lmt
= IWL_TX_POWER_TARGET_POWER_MAX
;
904 ret
= iwl_init_channel_map(priv
);
906 IWL_ERROR("initializing regulatory failed: %d\n", ret
);
910 ret
= iwlcore_init_geos(priv
);
912 IWL_ERROR("initializing geos failed: %d\n", ret
);
913 goto err_free_channel_map
;
918 err_free_channel_map
:
919 iwl_free_channel_map(priv
);
923 EXPORT_SYMBOL(iwl_init_drv
);
925 int iwl_set_tx_power(struct iwl_priv
*priv
, s8 tx_power
, bool force
)
928 if (tx_power
< IWL_TX_POWER_TARGET_POWER_MIN
) {
929 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
930 priv
->tx_power_user_lmt
);
934 if (tx_power
> IWL_TX_POWER_TARGET_POWER_MAX
) {
935 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
936 priv
->tx_power_user_lmt
);
940 if (priv
->tx_power_user_lmt
!= tx_power
)
943 priv
->tx_power_user_lmt
= tx_power
;
945 if (force
&& priv
->cfg
->ops
->lib
->send_tx_power
)
946 ret
= priv
->cfg
->ops
->lib
->send_tx_power(priv
);
950 EXPORT_SYMBOL(iwl_set_tx_power
);
952 void iwl_uninit_drv(struct iwl_priv
*priv
)
954 iwl_calib_free_results(priv
);
955 iwlcore_free_geos(priv
);
956 iwl_free_channel_map(priv
);
959 EXPORT_SYMBOL(iwl_uninit_drv
);
962 void iwl_disable_interrupts(struct iwl_priv
*priv
)
964 clear_bit(STATUS_INT_ENABLED
, &priv
->status
);
966 /* disable interrupts from uCode/NIC to host */
967 iwl_write32(priv
, CSR_INT_MASK
, 0x00000000);
969 /* acknowledge/clear/reset any interrupts still pending
970 * from uCode or flow handler (Rx/Tx DMA) */
971 iwl_write32(priv
, CSR_INT
, 0xffffffff);
972 iwl_write32(priv
, CSR_FH_INT_STATUS
, 0xffffffff);
973 IWL_DEBUG_ISR("Disabled interrupts\n");
975 EXPORT_SYMBOL(iwl_disable_interrupts
);
977 void iwl_enable_interrupts(struct iwl_priv
*priv
)
979 IWL_DEBUG_ISR("Enabling interrupts\n");
980 set_bit(STATUS_INT_ENABLED
, &priv
->status
);
981 iwl_write32(priv
, CSR_INT_MASK
, CSR_INI_SET_MASK
);
983 EXPORT_SYMBOL(iwl_enable_interrupts
);
985 int iwl_send_statistics_request(struct iwl_priv
*priv
, u8 flags
)
988 struct iwl_host_cmd cmd
= {
989 .id
= REPLY_STATISTICS_CMD
,
991 .len
= sizeof(stat_flags
),
992 .data
= (u8
*) &stat_flags
,
994 return iwl_send_cmd(priv
, &cmd
);
996 EXPORT_SYMBOL(iwl_send_statistics_request
);
999 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1000 * using sample data 100 bytes apart. If these sample points are good,
1001 * it's a pretty good bet that everything between them is good, too.
1003 static int iwlcore_verify_inst_sparse(struct iwl_priv
*priv
, __le32
*image
, u32 len
)
1010 IWL_DEBUG_INFO("ucode inst image size is %u\n", len
);
1012 ret
= iwl_grab_nic_access(priv
);
1016 for (i
= 0; i
< len
; i
+= 100, image
+= 100/sizeof(u32
)) {
1017 /* read data comes through single port, auto-incr addr */
1018 /* NOTE: Use the debugless read so we don't flood kernel log
1019 * if IWL_DL_IO is set */
1020 iwl_write_direct32(priv
, HBUS_TARG_MEM_RADDR
,
1021 i
+ RTC_INST_LOWER_BOUND
);
1022 val
= _iwl_read_direct32(priv
, HBUS_TARG_MEM_RDAT
);
1023 if (val
!= le32_to_cpu(*image
)) {
1031 iwl_release_nic_access(priv
);
1037 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1038 * looking at all data.
1040 static int iwl_verify_inst_full(struct iwl_priv
*priv
, __le32
*image
,
1048 IWL_DEBUG_INFO("ucode inst image size is %u\n", len
);
1050 ret
= iwl_grab_nic_access(priv
);
1054 iwl_write_direct32(priv
, HBUS_TARG_MEM_RADDR
, RTC_INST_LOWER_BOUND
);
1057 for (; len
> 0; len
-= sizeof(u32
), image
++) {
1058 /* read data comes through single port, auto-incr addr */
1059 /* NOTE: Use the debugless read so we don't flood kernel log
1060 * if IWL_DL_IO is set */
1061 val
= _iwl_read_direct32(priv
, HBUS_TARG_MEM_RDAT
);
1062 if (val
!= le32_to_cpu(*image
)) {
1063 IWL_ERROR("uCode INST section is invalid at "
1064 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1065 save_len
- len
, val
, le32_to_cpu(*image
));
1073 iwl_release_nic_access(priv
);
1077 ("ucode image in INSTRUCTION memory is good\n");
1083 * iwl_verify_ucode - determine which instruction image is in SRAM,
1084 * and verify its contents
1086 int iwl_verify_ucode(struct iwl_priv
*priv
)
1093 image
= (__le32
*)priv
->ucode_boot
.v_addr
;
1094 len
= priv
->ucode_boot
.len
;
1095 ret
= iwlcore_verify_inst_sparse(priv
, image
, len
);
1097 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
1101 /* Try initialize */
1102 image
= (__le32
*)priv
->ucode_init
.v_addr
;
1103 len
= priv
->ucode_init
.len
;
1104 ret
= iwlcore_verify_inst_sparse(priv
, image
, len
);
1106 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
1110 /* Try runtime/protocol */
1111 image
= (__le32
*)priv
->ucode_code
.v_addr
;
1112 len
= priv
->ucode_code
.len
;
1113 ret
= iwlcore_verify_inst_sparse(priv
, image
, len
);
1115 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
1119 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1121 /* Since nothing seems to match, show first several data entries in
1122 * instruction SRAM, so maybe visual inspection will give a clue.
1123 * Selection of bootstrap image (vs. other images) is arbitrary. */
1124 image
= (__le32
*)priv
->ucode_boot
.v_addr
;
1125 len
= priv
->ucode_boot
.len
;
1126 ret
= iwl_verify_inst_full(priv
, image
, len
);
1130 EXPORT_SYMBOL(iwl_verify_ucode
);
1133 static const char *desc_lookup_text
[] = {
1138 "NMI_INTERRUPT_WDG",
1142 "HW_ERROR_TUNE_LOCK",
1143 "HW_ERROR_TEMPERATURE",
1144 "ILLEGAL_CHAN_FREQ",
1147 "NMI_INTERRUPT_HOST",
1148 "NMI_INTERRUPT_ACTION_PT",
1149 "NMI_INTERRUPT_UNKNOWN",
1150 "UCODE_VERSION_MISMATCH",
1151 "HW_ERROR_ABS_LOCK",
1152 "HW_ERROR_CAL_LOCK_FAIL",
1153 "NMI_INTERRUPT_INST_ACTION_PT",
1154 "NMI_INTERRUPT_DATA_ACTION_PT",
1156 "NMI_INTERRUPT_TRM",
1157 "NMI_INTERRUPT_BREAK_POINT"
1165 static const char *desc_lookup(int i
)
1167 int max
= ARRAY_SIZE(desc_lookup_text
) - 1;
1169 if (i
< 0 || i
> max
)
1172 return desc_lookup_text
[i
];
1175 #define ERROR_START_OFFSET (1 * sizeof(u32))
1176 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1178 void iwl_dump_nic_error_log(struct iwl_priv
*priv
)
1181 u32 desc
, time
, count
, base
, data1
;
1182 u32 blink1
, blink2
, ilink1
, ilink2
;
1185 if (priv
->ucode_type
== UCODE_INIT
)
1186 base
= le32_to_cpu(priv
->card_alive_init
.error_event_table_ptr
);
1188 base
= le32_to_cpu(priv
->card_alive
.error_event_table_ptr
);
1190 if (!priv
->cfg
->ops
->lib
->is_valid_rtc_data_addr(base
)) {
1191 IWL_ERROR("Not valid error log pointer 0x%08X\n", base
);
1195 ret
= iwl_grab_nic_access(priv
);
1197 IWL_WARNING("Can not read from adapter at this time.\n");
1201 count
= iwl_read_targ_mem(priv
, base
);
1203 if (ERROR_START_OFFSET
<= count
* ERROR_ELEM_SIZE
) {
1204 IWL_ERROR("Start IWL Error Log Dump:\n");
1205 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv
->status
, count
);
1208 desc
= iwl_read_targ_mem(priv
, base
+ 1 * sizeof(u32
));
1209 blink1
= iwl_read_targ_mem(priv
, base
+ 3 * sizeof(u32
));
1210 blink2
= iwl_read_targ_mem(priv
, base
+ 4 * sizeof(u32
));
1211 ilink1
= iwl_read_targ_mem(priv
, base
+ 5 * sizeof(u32
));
1212 ilink2
= iwl_read_targ_mem(priv
, base
+ 6 * sizeof(u32
));
1213 data1
= iwl_read_targ_mem(priv
, base
+ 7 * sizeof(u32
));
1214 data2
= iwl_read_targ_mem(priv
, base
+ 8 * sizeof(u32
));
1215 line
= iwl_read_targ_mem(priv
, base
+ 9 * sizeof(u32
));
1216 time
= iwl_read_targ_mem(priv
, base
+ 11 * sizeof(u32
));
1218 IWL_ERROR("Desc Time "
1219 "data1 data2 line\n");
1220 IWL_ERROR("%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1221 desc_lookup(desc
), desc
, time
, data1
, data2
, line
);
1222 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
1223 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1
, blink2
,
1226 iwl_release_nic_access(priv
);
1228 EXPORT_SYMBOL(iwl_dump_nic_error_log
);
1230 #define EVENT_START_OFFSET (4 * sizeof(u32))
1233 * iwl_print_event_log - Dump error event log to syslog
1235 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
1237 static void iwl_print_event_log(struct iwl_priv
*priv
, u32 start_idx
,
1238 u32 num_events
, u32 mode
)
1241 u32 base
; /* SRAM byte address of event log header */
1242 u32 event_size
; /* 2 u32s, or 3 u32s if timestamp recorded */
1243 u32 ptr
; /* SRAM byte address of log data */
1244 u32 ev
, time
, data
; /* event log data */
1246 if (num_events
== 0)
1248 if (priv
->ucode_type
== UCODE_INIT
)
1249 base
= le32_to_cpu(priv
->card_alive_init
.log_event_table_ptr
);
1251 base
= le32_to_cpu(priv
->card_alive
.log_event_table_ptr
);
1254 event_size
= 2 * sizeof(u32
);
1256 event_size
= 3 * sizeof(u32
);
1258 ptr
= base
+ EVENT_START_OFFSET
+ (start_idx
* event_size
);
1260 /* "time" is actually "data" for mode 0 (no timestamp).
1261 * place event id # at far right for easier visual parsing. */
1262 for (i
= 0; i
< num_events
; i
++) {
1263 ev
= iwl_read_targ_mem(priv
, ptr
);
1265 time
= iwl_read_targ_mem(priv
, ptr
);
1269 IWL_ERROR("EVT_LOG:0x%08x:%04u\n", time
, ev
);
1271 data
= iwl_read_targ_mem(priv
, ptr
);
1273 IWL_ERROR("EVT_LOGT:%010u:0x%08x:%04u\n",
1279 void iwl_dump_nic_event_log(struct iwl_priv
*priv
)
1282 u32 base
; /* SRAM byte address of event log header */
1283 u32 capacity
; /* event log capacity in # entries */
1284 u32 mode
; /* 0 - no timestamp, 1 - timestamp recorded */
1285 u32 num_wraps
; /* # times uCode wrapped to top of log */
1286 u32 next_entry
; /* index of next entry to be written by uCode */
1287 u32 size
; /* # entries that we'll print */
1289 if (priv
->ucode_type
== UCODE_INIT
)
1290 base
= le32_to_cpu(priv
->card_alive_init
.log_event_table_ptr
);
1292 base
= le32_to_cpu(priv
->card_alive
.log_event_table_ptr
);
1294 if (!priv
->cfg
->ops
->lib
->is_valid_rtc_data_addr(base
)) {
1295 IWL_ERROR("Invalid event log pointer 0x%08X\n", base
);
1299 ret
= iwl_grab_nic_access(priv
);
1301 IWL_WARNING("Can not read from adapter at this time.\n");
1305 /* event log header */
1306 capacity
= iwl_read_targ_mem(priv
, base
);
1307 mode
= iwl_read_targ_mem(priv
, base
+ (1 * sizeof(u32
)));
1308 num_wraps
= iwl_read_targ_mem(priv
, base
+ (2 * sizeof(u32
)));
1309 next_entry
= iwl_read_targ_mem(priv
, base
+ (3 * sizeof(u32
)));
1311 size
= num_wraps
? capacity
: next_entry
;
1313 /* bail out if nothing in log */
1315 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
1316 iwl_release_nic_access(priv
);
1320 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
1323 /* if uCode has wrapped back to top of log, start at the oldest entry,
1324 * i.e the next one that uCode would fill. */
1326 iwl_print_event_log(priv
, next_entry
,
1327 capacity
- next_entry
, mode
);
1328 /* (then/else) start at top of log */
1329 iwl_print_event_log(priv
, 0, next_entry
, mode
);
1331 iwl_release_nic_access(priv
);
1333 EXPORT_SYMBOL(iwl_dump_nic_event_log
);
1335 void iwl_rf_kill_ct_config(struct iwl_priv
*priv
)
1337 struct iwl_ct_kill_config cmd
;
1338 unsigned long flags
;
1341 spin_lock_irqsave(&priv
->lock
, flags
);
1342 iwl_write32(priv
, CSR_UCODE_DRV_GP1_CLR
,
1343 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT
);
1344 spin_unlock_irqrestore(&priv
->lock
, flags
);
1346 cmd
.critical_temperature_R
=
1347 cpu_to_le32(priv
->hw_params
.ct_kill_threshold
);
1349 ret
= iwl_send_cmd_pdu(priv
, REPLY_CT_KILL_CONFIG_CMD
,
1352 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
1354 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
1355 "critical temperature is %d\n",
1356 cmd
.critical_temperature_R
);
1358 EXPORT_SYMBOL(iwl_rf_kill_ct_config
);
1364 * Use: Sets the device's internal card state to enable, disable, or halt
1366 * When in the 'enable' state the card operates as normal.
1367 * When in the 'disable' state, the card enters into a low power mode.
1368 * When in the 'halt' state, the card is shut down and must be fully
1369 * restarted to come back on.
1371 static int iwl_send_card_state(struct iwl_priv
*priv
, u32 flags
, u8 meta_flag
)
1373 struct iwl_host_cmd cmd
= {
1374 .id
= REPLY_CARD_STATE_CMD
,
1377 .meta
.flags
= meta_flag
,
1380 return iwl_send_cmd(priv
, &cmd
);
1383 void iwl_radio_kill_sw_disable_radio(struct iwl_priv
*priv
)
1385 unsigned long flags
;
1387 if (test_bit(STATUS_RF_KILL_SW
, &priv
->status
))
1390 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO OFF\n");
1392 iwl_scan_cancel(priv
);
1393 /* FIXME: This is a workaround for AP */
1394 if (priv
->iw_mode
!= NL80211_IFTYPE_AP
) {
1395 spin_lock_irqsave(&priv
->lock
, flags
);
1396 iwl_write32(priv
, CSR_UCODE_DRV_GP1_SET
,
1397 CSR_UCODE_SW_BIT_RFKILL
);
1398 spin_unlock_irqrestore(&priv
->lock
, flags
);
1399 /* call the host command only if no hw rf-kill set */
1400 if (!test_bit(STATUS_RF_KILL_HW
, &priv
->status
) &&
1402 iwl_send_card_state(priv
,
1403 CARD_STATE_CMD_DISABLE
, 0);
1404 set_bit(STATUS_RF_KILL_SW
, &priv
->status
);
1405 /* make sure mac80211 stop sending Tx frame */
1406 if (priv
->mac80211_registered
)
1407 ieee80211_stop_queues(priv
->hw
);
1410 EXPORT_SYMBOL(iwl_radio_kill_sw_disable_radio
);
1412 int iwl_radio_kill_sw_enable_radio(struct iwl_priv
*priv
)
1414 unsigned long flags
;
1416 if (!test_bit(STATUS_RF_KILL_SW
, &priv
->status
))
1419 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO ON\n");
1421 spin_lock_irqsave(&priv
->lock
, flags
);
1422 iwl_write32(priv
, CSR_UCODE_DRV_GP1_CLR
, CSR_UCODE_SW_BIT_RFKILL
);
1424 /* If the driver is up it will receive CARD_STATE_NOTIFICATION
1425 * notification where it will clear SW rfkill status.
1426 * Setting it here would break the handler. Only if the
1427 * interface is down we can set here since we don't
1428 * receive any further notification.
1431 clear_bit(STATUS_RF_KILL_SW
, &priv
->status
);
1432 spin_unlock_irqrestore(&priv
->lock
, flags
);
1437 spin_lock_irqsave(&priv
->lock
, flags
);
1438 iwl_read32(priv
, CSR_UCODE_DRV_GP1
);
1439 if (!iwl_grab_nic_access(priv
))
1440 iwl_release_nic_access(priv
);
1441 spin_unlock_irqrestore(&priv
->lock
, flags
);
1443 if (test_bit(STATUS_RF_KILL_HW
, &priv
->status
)) {
1444 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
1445 "disabled by HW switch\n");
1449 /* when driver is up while rfkill is on, it wont receive
1450 * any CARD_STATE_NOTIFICATION notifications so we have to
1451 * restart it in here
1453 if (priv
->is_open
&& !test_bit(STATUS_ALIVE
, &priv
->status
)) {
1454 clear_bit(STATUS_RF_KILL_SW
, &priv
->status
);
1455 if (!iwl_is_rfkill(priv
))
1456 queue_work(priv
->workqueue
, &priv
->up
);
1459 /* If the driver is already loaded, it will receive
1460 * CARD_STATE_NOTIFICATION notifications and the handler will
1461 * call restart to reload the driver.
1465 EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio
);