1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
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43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *****************************************************************************/
63 #ifndef __iwl_eeprom_h__
64 #define __iwl_eeprom_h__
69 * EEPROM access time values:
71 * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG.
72 * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
73 * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
74 * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
76 #define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
78 #define IWL_EEPROM_SEM_TIMEOUT 10 /* microseconds */
79 #define IWL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
83 * Regulatory channel usage flags in EEPROM struct iwl4965_eeprom_channel.flags.
85 * IBSS and/or AP operation is allowed *only* on those channels with
86 * (VALID && IBSS && ACTIVE && !RADAR). This restriction is in place because
87 * RADAR detection is not supported by the 4965 driver, but is a
88 * requirement for establishing a new network for legal operation on channels
89 * requiring RADAR detection or restricting ACTIVE scanning.
91 * NOTE: "WIDE" flag does not indicate anything about "HT40" 40 MHz channels.
92 * It only indicates that 20 MHz channel use is supported; HT40 channel
93 * usage is indicated by a separate set of regulatory flags for each
96 * NOTE: Using a channel inappropriately will result in a uCode error!
98 #define IWL_NUM_TX_CALIB_GROUPS 5
100 EEPROM_CHANNEL_VALID
= (1 << 0), /* usable for this SKU/geo */
101 EEPROM_CHANNEL_IBSS
= (1 << 1), /* usable as an IBSS channel */
103 EEPROM_CHANNEL_ACTIVE
= (1 << 3), /* active scanning allowed */
104 EEPROM_CHANNEL_RADAR
= (1 << 4), /* radar detection required */
105 EEPROM_CHANNEL_WIDE
= (1 << 5), /* 20 MHz channel okay */
106 /* Bit 6 Reserved (was Narrow Channel) */
107 EEPROM_CHANNEL_DFS
= (1 << 7), /* dynamic freq selection candidate */
110 /* SKU Capabilities */
111 #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
112 #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
114 /* *regulatory* channel data format in eeprom, one for each channel.
115 * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */
116 struct iwl_eeprom_channel
{
117 u8 flags
; /* EEPROM_CHANNEL_* flags copied from EEPROM */
118 s8 max_power_avg
; /* max power (dBm) on this chnl, limit 31 */
119 } __attribute__ ((packed
));
122 * iwl_eeprom_enhanced_txpwr structure
123 * This structure presents the enhanced regulatory tx power limit layout
125 * Enhanced regulatory tx power portion of eeprom image can be broken down
126 * into individual structures; each one is 8 bytes in size and contain the
127 * following information
128 * @chain_a_max_pwr: chain a max power in 1/2 dBm
129 * @chain_b_max_pwr: chain b max power in 1/2 dBm
130 * @chain_c_max_pwr: chain c max power in 1/2 dBm
131 * @mimo2_max_pwr: mimo2 max power in 1/2 dBm
132 * @mimo3_max_pwr: mimo3 max power in 1/2 dBm
135 struct iwl_eeprom_enhanced_txpwr
{
143 } __attribute__ ((packed
));
146 #define EEPROM_3945_EEPROM_VERSION (0x2f)
148 /* 4965 has two radio transmitters (and 3 radio receivers) */
149 #define EEPROM_TX_POWER_TX_CHAINS (2)
151 /* 4965 has room for up to 8 sets of txpower calibration data */
152 #define EEPROM_TX_POWER_BANDS (8)
154 /* 4965 factory calibration measures txpower gain settings for
155 * each of 3 target output levels */
156 #define EEPROM_TX_POWER_MEASUREMENTS (3)
159 /* 4965 driver does not work with txpower calibration version < 5 */
160 #define EEPROM_4965_TX_POWER_VERSION (5)
161 #define EEPROM_4965_EEPROM_VERSION (0x2f)
162 #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
163 #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
164 #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
165 #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
168 #define EEPROM_5000_TX_POWER_VERSION (4)
169 #define EEPROM_5000_EEPROM_VERSION (0x11A)
171 /*5000 calibrations */
172 #define EEPROM_5000_CALIB_ALL (INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
173 #define EEPROM_5000_XTAL ((2*0x128) | EEPROM_5000_CALIB_ALL)
174 #define EEPROM_5000_TEMPERATURE ((2*0x12A) | EEPROM_5000_CALIB_ALL)
177 #define EEPROM_5000_LINK_HOST (2*0x64)
178 #define EEPROM_5000_LINK_GENERAL (2*0x65)
179 #define EEPROM_5000_LINK_REGULATORY (2*0x66)
180 #define EEPROM_5000_LINK_CALIBRATION (2*0x67)
181 #define EEPROM_5000_LINK_PROCESS_ADJST (2*0x68)
182 #define EEPROM_5000_LINK_OTHERS (2*0x69)
184 /* 5000 regulatory - indirect access */
185 #define EEPROM_5000_REG_SKU_ID ((0x02)\
186 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 4 bytes */
187 #define EEPROM_5000_REG_BAND_1_CHANNELS ((0x08)\
188 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 28 bytes */
189 #define EEPROM_5000_REG_BAND_2_CHANNELS ((0x26)\
190 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 26 bytes */
191 #define EEPROM_5000_REG_BAND_3_CHANNELS ((0x42)\
192 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
193 #define EEPROM_5000_REG_BAND_4_CHANNELS ((0x5C)\
194 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
195 #define EEPROM_5000_REG_BAND_5_CHANNELS ((0x74)\
196 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 12 bytes */
197 #define EEPROM_5000_REG_BAND_24_HT40_CHANNELS ((0x82)\
198 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 14 bytes */
199 #define EEPROM_5000_REG_BAND_52_HT40_CHANNELS ((0x92)\
200 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
202 /* 6000 and up regulatory tx power - indirect access */
203 /* max. elements per section */
204 #define EEPROM_MAX_TXPOWER_SECTION_ELEMENTS (8)
205 #define EEPROM_TXPOWER_COMMON_HT40_INDEX (2)
208 * Partition the enhanced tx power portion of eeprom image into
209 * 10 sections based on band, modulation, frequency and channel
211 * Section 1: all CCK channels
212 * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40 ) channels
213 * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
214 * Section 4: 2.4 GHz 20MHz channels: 1, 2, 10, 11. Both Legacy and HT
215 * Section 5: 2.4 GHz 40MHz channels: 1, 2, 6, 7, 9, (_above_)
216 * Section 6: 5.2 GHz 20MHz channels: 36, 64, 100, both Legacy and HT
217 * Section 7: 5.2 GHz 40MHz channels: 36, 60, 100 (_above_)
218 * Section 8: 2.4 GHz channel 13, Both Legacy and HT
219 * Section 9: 2.4 GHz channel 140, Both Legacy and HT
220 * Section 10: 2.4 GHz 40MHz channels: 132, 44 (_above_)
222 /* 2.4 GHz band: CCK */
223 #define EEPROM_LB_CCK_20_COMMON ((0xAA)\
224 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 8 bytes */
225 /* 2.4 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */
226 #define EEPROM_LB_OFDM_COMMON ((0xB2)\
227 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
228 /* 5.2 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */
229 #define EEPROM_HB_OFDM_COMMON ((0xCA)\
230 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
231 /* 2.4GHz band channels:
232 * 1Legacy, 1HT, 2Legacy, 2HT, 10Legacy, 10HT, 11Legacy, 11HT */
233 #define EEPROM_LB_OFDM_20_BAND ((0xE2)\
234 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 64 bytes */
235 /* 2.4 GHz band HT40 channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1) */
236 #define EEPROM_LB_OFDM_HT40_BAND ((0x122)\
237 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 40 bytes */
238 /* 5.2GHz band channels: 36Legacy, 36HT, 64Legacy, 64HT, 100Legacy, 100HT */
239 #define EEPROM_HB_OFDM_20_BAND ((0x14A)\
240 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 48 bytes */
241 /* 5.2 GHz band HT40 channels: (36,+1) (60,+1) (100,+1) */
242 #define EEPROM_HB_OFDM_HT40_BAND ((0x17A)\
243 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
244 /* 2.4 GHz band, channnel 13: Legacy, HT */
245 #define EEPROM_LB_OFDM_20_CHANNEL_13 ((0x192)\
246 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */
247 /* 5.2 GHz band, channnel 140: Legacy, HT */
248 #define EEPROM_HB_OFDM_20_CHANNEL_140 ((0x1A2)\
249 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */
250 /* 5.2 GHz band, HT40 channnels (132,+1) (44,+1) */
251 #define EEPROM_HB_OFDM_HT40_BAND_1 ((0x1B2)\
252 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */
256 #define EEPROM_5050_TX_POWER_VERSION (4)
257 #define EEPROM_5050_EEPROM_VERSION (0x21E)
260 /* lower blocks contain EEPROM image and calibration data */
261 #define OTP_LOW_IMAGE_SIZE (2 * 512 * sizeof(u16)) /* 2 KB */
262 /* high blocks contain PAPD data */
263 #define OTP_HIGH_IMAGE_SIZE_6x00 (6 * 512 * sizeof(u16)) /* 6 KB */
264 #define OTP_HIGH_IMAGE_SIZE_1000 (0x200 * sizeof(u16)) /* 1024 bytes */
265 #define OTP_MAX_LL_ITEMS_1000 (3) /* OTP blocks for 1000 */
266 #define OTP_MAX_LL_ITEMS_6x00 (4) /* OTP blocks for 6x00 */
267 #define OTP_MAX_LL_ITEMS_6x50 (7) /* OTP blocks for 6x50 */
270 extern const u8 iwl_eeprom_band_1
[14];
273 * factory calibration data for one txpower level, on one channel,
274 * measured on one of the 2 tx chains (radio transmitter and associated
275 * antenna). EEPROM contains:
277 * 1) Temperature (degrees Celsius) of device when measurement was made.
279 * 2) Gain table index used to achieve the target measurement power.
280 * This refers to the "well-known" gain tables (see iwl-4965-hw.h).
282 * 3) Actual measured output power, in half-dBm ("34" = 17 dBm).
284 * 4) RF power amplifier detector level measurement (not used).
286 struct iwl_eeprom_calib_measure
{
287 u8 temperature
; /* Device temperature (Celsius) */
288 u8 gain_idx
; /* Index into gain table */
289 u8 actual_pow
; /* Measured RF output power, half-dBm */
290 s8 pa_det
; /* Power amp detector level (not used) */
291 } __attribute__ ((packed
));
295 * measurement set for one channel. EEPROM contains:
297 * 1) Channel number measured
299 * 2) Measurements for each of 3 power levels for each of 2 radio transmitters
300 * (a.k.a. "tx chains") (6 measurements altogether)
302 struct iwl_eeprom_calib_ch_info
{
304 struct iwl_eeprom_calib_measure
305 measurements
[EEPROM_TX_POWER_TX_CHAINS
]
306 [EEPROM_TX_POWER_MEASUREMENTS
];
307 } __attribute__ ((packed
));
310 * txpower subband info.
312 * For each frequency subband, EEPROM contains the following:
314 * 1) First and last channels within range of the subband. "0" values
315 * indicate that this sample set is not being used.
317 * 2) Sample measurement sets for 2 channels close to the range endpoints.
319 struct iwl_eeprom_calib_subband_info
{
320 u8 ch_from
; /* channel number of lowest channel in subband */
321 u8 ch_to
; /* channel number of highest channel in subband */
322 struct iwl_eeprom_calib_ch_info ch1
;
323 struct iwl_eeprom_calib_ch_info ch2
;
324 } __attribute__ ((packed
));
328 * txpower calibration info. EEPROM contains:
330 * 1) Factory-measured saturation power levels (maximum levels at which
331 * tx power amplifier can output a signal without too much distortion).
332 * There is one level for 2.4 GHz band and one for 5 GHz band. These
333 * values apply to all channels within each of the bands.
335 * 2) Factory-measured power supply voltage level. This is assumed to be
336 * constant (i.e. same value applies to all channels/bands) while the
337 * factory measurements are being made.
339 * 3) Up to 8 sets of factory-measured txpower calibration values.
340 * These are for different frequency ranges, since txpower gain
341 * characteristics of the analog radio circuitry vary with frequency.
343 * Not all sets need to be filled with data;
344 * struct iwl_eeprom_calib_subband_info contains range of channels
345 * (0 if unused) for each set of data.
347 struct iwl_eeprom_calib_info
{
348 u8 saturation_power24
; /* half-dBm (e.g. "34" = 17 dBm) */
349 u8 saturation_power52
; /* half-dBm */
350 s16 voltage
; /* signed */
351 struct iwl_eeprom_calib_subband_info
352 band_info
[EEPROM_TX_POWER_BANDS
];
353 } __attribute__ ((packed
));
356 #define ADDRESS_MSK 0x0000FFFF
357 #define INDIRECT_TYPE_MSK 0x000F0000
358 #define INDIRECT_HOST 0x00010000
359 #define INDIRECT_GENERAL 0x00020000
360 #define INDIRECT_REGULATORY 0x00030000
361 #define INDIRECT_CALIBRATION 0x00040000
362 #define INDIRECT_PROCESS_ADJST 0x00050000
363 #define INDIRECT_OTHERS 0x00060000
364 #define INDIRECT_ADDRESS 0x00100000
367 #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
368 #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
369 #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
370 #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
371 #define EEPROM_VERSION (2*0x44) /* 2 bytes */
372 #define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */
373 #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
374 #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
375 #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
376 #define EEPROM_3945_M_VERSION (2*0x4A) /* 1 bytes */
378 /* The following masks are to be applied on EEPROM_RADIO_CONFIG */
379 #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */
380 #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */
381 #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */
382 #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
383 #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
384 #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
386 #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0
387 #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1
388 #define EEPROM_5000_RF_CFG_TYPE_MAX 0x3
391 * Per-channel regulatory data.
393 * Each channel that *might* be supported by iwl has a fixed location
394 * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
397 * Entries immediately below are for 20 MHz channel width. HT40 (40 MHz)
398 * channels (only for 4965, not supported by 3945) appear later in the EEPROM.
400 * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
402 #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
403 #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
404 #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
407 * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
408 * 5.0 GHz channels 7, 8, 11, 12, 16
409 * (4915-5080MHz) (none of these is ever supported)
411 #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */
412 #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */
415 * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
418 #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */
419 #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */
422 * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
425 #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */
426 #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */
429 * 5.7 GHz channels 145, 149, 153, 157, 161, 165
432 #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */
433 #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */
436 * 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11)
438 * The channel listed is the center of the lower 20 MHz half of the channel.
439 * The overall center frequency is actually 2 channels (10 MHz) above that,
440 * and the upper half of each HT40 channel is centered 4 channels (20 MHz) away
441 * from the lower half; e.g. the upper half of HT40 channel 1 is channel 5,
442 * and the overall HT40 channel width centers on channel 3.
444 * NOTE: The RXON command uses 20 MHz channel numbers to specify the
445 * control channel to which to tune. RXON also specifies whether the
446 * control channel is the upper or lower half of a HT40 channel.
448 * NOTE: 4965 does not support HT40 channels on 2.4 GHz.
450 #define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0) /* 14 bytes */
453 * 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64),
454 * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161)
456 #define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8) /* 22 bytes */
458 #define EEPROM_REGULATORY_BAND_NO_HT40 (0)
460 struct iwl_eeprom_ops
{
461 const u32 regulatory_bands
[7];
462 int (*verify_signature
) (struct iwl_priv
*priv
);
463 int (*acquire_semaphore
) (struct iwl_priv
*priv
);
464 void (*release_semaphore
) (struct iwl_priv
*priv
);
465 u16 (*calib_version
) (struct iwl_priv
*priv
);
466 const u8
* (*query_addr
) (const struct iwl_priv
*priv
, size_t offset
);
467 void (*update_enhanced_txpower
) (struct iwl_priv
*priv
);
471 void iwl_eeprom_get_mac(const struct iwl_priv
*priv
, u8
*mac
);
472 int iwl_eeprom_init(struct iwl_priv
*priv
);
473 void iwl_eeprom_free(struct iwl_priv
*priv
);
474 int iwl_eeprom_check_version(struct iwl_priv
*priv
);
475 const u8
*iwl_eeprom_query_addr(const struct iwl_priv
*priv
, size_t offset
);
476 u16
iwl_eeprom_query16(const struct iwl_priv
*priv
, size_t offset
);
478 int iwlcore_eeprom_verify_signature(struct iwl_priv
*priv
);
479 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv
*priv
);
480 void iwlcore_eeprom_release_semaphore(struct iwl_priv
*priv
);
481 const u8
*iwlcore_eeprom_query_addr(const struct iwl_priv
*priv
, size_t offset
);
482 void iwlcore_eeprom_enhanced_txpower(struct iwl_priv
*priv
);
483 int iwl_init_channel_map(struct iwl_priv
*priv
);
484 void iwl_free_channel_map(struct iwl_priv
*priv
);
485 const struct iwl_channel_info
*iwl_get_channel_info(
486 const struct iwl_priv
*priv
,
487 enum ieee80211_band band
, u16 channel
);
489 #endif /* __iwl_eeprom_h__ */