1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
23 * Contact Information:
24 * Intel Linux Wireless <ilw@linux.intel.com>
25 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
34 #include "iwl-debug.h"
35 #include "iwl-devtrace.h"
38 * IO, register, and NIC memory access functions
40 * NOTE on naming convention and macro usage for these
42 * A single _ prefix before a an access function means that no state
43 * check or debug information is printed when that function is called.
45 * A double __ prefix before an access function means that state is checked
46 * and the current line number and caller function name are printed in addition
47 * to any other debug output.
49 * The non-prefixed name is the #define that maps the caller into a
50 * #define that provides the caller's name and __LINE__ to the double
53 * If you wish to call the function without any debug or state checking,
54 * you should use the single _ prefix version (as is used by dependent IO
55 * routines, for example _iwl_read_direct32 calls the non-check version of
58 * These declarations are *extremely* useful in quickly isolating code deltas
59 * which result in misconfiguration of the hardware I/O. In combination with
60 * git-bisect and the IO debug level you can quickly determine the specific
61 * commit which breaks the IO sequence to the hardware.
65 static inline void _iwl_write8(struct iwl_priv
*priv
, u32 ofs
, u8 val
)
67 trace_iwlwifi_dev_iowrite8(priv
, ofs
, val
);
68 iowrite8(val
, priv
->hw_base
+ ofs
);
71 #ifdef CONFIG_IWLWIFI_DEBUG
72 static inline void __iwl_write8(const char *f
, u32 l
, struct iwl_priv
*priv
,
75 IWL_DEBUG_IO(priv
, "write8(0x%08X, 0x%02X) - %s %d\n", ofs
, val
, f
, l
);
76 _iwl_write8(priv
, ofs
, val
);
78 #define iwl_write8(priv, ofs, val) \
79 __iwl_write8(__FILE__, __LINE__, priv, ofs, val)
81 #define iwl_write8(priv, ofs, val) _iwl_write8(priv, ofs, val)
85 static inline void _iwl_write32(struct iwl_priv
*priv
, u32 ofs
, u32 val
)
87 trace_iwlwifi_dev_iowrite32(priv
, ofs
, val
);
88 iowrite32(val
, priv
->hw_base
+ ofs
);
91 #ifdef CONFIG_IWLWIFI_DEBUG
92 static inline void __iwl_write32(const char *f
, u32 l
, struct iwl_priv
*priv
,
95 IWL_DEBUG_IO(priv
, "write32(0x%08X, 0x%08X) - %s %d\n", ofs
, val
, f
, l
);
96 _iwl_write32(priv
, ofs
, val
);
98 #define iwl_write32(priv, ofs, val) \
99 __iwl_write32(__FILE__, __LINE__, priv, ofs, val)
101 #define iwl_write32(priv, ofs, val) _iwl_write32(priv, ofs, val)
104 static inline u32
_iwl_read32(struct iwl_priv
*priv
, u32 ofs
)
106 u32 val
= ioread32(priv
->hw_base
+ ofs
);
107 trace_iwlwifi_dev_ioread32(priv
, ofs
, val
);
111 #ifdef CONFIG_IWLWIFI_DEBUG
112 static inline u32
__iwl_read32(char *f
, u32 l
, struct iwl_priv
*priv
, u32 ofs
)
114 IWL_DEBUG_IO(priv
, "read_direct32(0x%08X) - %s %d\n", ofs
, f
, l
);
115 return _iwl_read32(priv
, ofs
);
117 #define iwl_read32(priv, ofs) __iwl_read32(__FILE__, __LINE__, priv, ofs)
119 #define iwl_read32(p, o) _iwl_read32(p, o)
122 #define IWL_POLL_INTERVAL 10 /* microseconds */
123 static inline int _iwl_poll_bit(struct iwl_priv
*priv
, u32 addr
,
124 u32 bits
, u32 mask
, int timeout
)
129 if ((_iwl_read32(priv
, addr
) & mask
) == (bits
& mask
))
131 udelay(IWL_POLL_INTERVAL
);
132 t
+= IWL_POLL_INTERVAL
;
133 } while (t
< timeout
);
137 #ifdef CONFIG_IWLWIFI_DEBUG
138 static inline int __iwl_poll_bit(const char *f
, u32 l
,
139 struct iwl_priv
*priv
, u32 addr
,
140 u32 bits
, u32 mask
, int timeout
)
142 int ret
= _iwl_poll_bit(priv
, addr
, bits
, mask
, timeout
);
143 IWL_DEBUG_IO(priv
, "poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n",
145 unlikely(ret
== -ETIMEDOUT
) ? "timeout" : "", f
, l
);
148 #define iwl_poll_bit(priv, addr, bits, mask, timeout) \
149 __iwl_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout)
151 #define iwl_poll_bit(p, a, b, m, t) _iwl_poll_bit(p, a, b, m, t)
154 static inline void _iwl_set_bit(struct iwl_priv
*priv
, u32 reg
, u32 mask
)
156 _iwl_write32(priv
, reg
, _iwl_read32(priv
, reg
) | mask
);
158 #ifdef CONFIG_IWLWIFI_DEBUG
159 static inline void __iwl_set_bit(const char *f
, u32 l
,
160 struct iwl_priv
*priv
, u32 reg
, u32 mask
)
162 u32 val
= _iwl_read32(priv
, reg
) | mask
;
163 IWL_DEBUG_IO(priv
, "set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg
, mask
, val
);
164 _iwl_write32(priv
, reg
, val
);
166 static inline void iwl_set_bit(struct iwl_priv
*p
, u32 r
, u32 m
)
168 unsigned long reg_flags
;
170 spin_lock_irqsave(&p
->reg_lock
, reg_flags
);
171 __iwl_set_bit(__FILE__
, __LINE__
, p
, r
, m
);
172 spin_unlock_irqrestore(&p
->reg_lock
, reg_flags
);
175 static inline void iwl_set_bit(struct iwl_priv
*p
, u32 r
, u32 m
)
177 unsigned long reg_flags
;
179 spin_lock_irqsave(&p
->reg_lock
, reg_flags
);
180 _iwl_set_bit(p
, r
, m
);
181 spin_unlock_irqrestore(&p
->reg_lock
, reg_flags
);
185 static inline void _iwl_clear_bit(struct iwl_priv
*priv
, u32 reg
, u32 mask
)
187 _iwl_write32(priv
, reg
, _iwl_read32(priv
, reg
) & ~mask
);
189 #ifdef CONFIG_IWLWIFI_DEBUG
190 static inline void __iwl_clear_bit(const char *f
, u32 l
,
191 struct iwl_priv
*priv
, u32 reg
, u32 mask
)
193 u32 val
= _iwl_read32(priv
, reg
) & ~mask
;
194 IWL_DEBUG_IO(priv
, "clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg
, mask
, val
);
195 _iwl_write32(priv
, reg
, val
);
197 static inline void iwl_clear_bit(struct iwl_priv
*p
, u32 r
, u32 m
)
199 unsigned long reg_flags
;
201 spin_lock_irqsave(&p
->reg_lock
, reg_flags
);
202 __iwl_clear_bit(__FILE__
, __LINE__
, p
, r
, m
);
203 spin_unlock_irqrestore(&p
->reg_lock
, reg_flags
);
206 static inline void iwl_clear_bit(struct iwl_priv
*p
, u32 r
, u32 m
)
208 unsigned long reg_flags
;
210 spin_lock_irqsave(&p
->reg_lock
, reg_flags
);
211 _iwl_clear_bit(p
, r
, m
);
212 spin_unlock_irqrestore(&p
->reg_lock
, reg_flags
);
216 static inline int _iwl_grab_nic_access(struct iwl_priv
*priv
)
221 /* this bit wakes up the NIC */
222 _iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ
);
225 * These bits say the device is running, and should keep running for
226 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
227 * but they do not indicate that embedded SRAM is restored yet;
228 * 3945 and 4965 have volatile SRAM, and must save/restore contents
229 * to/from host DRAM when sleeping/waking for power-saving.
230 * Each direction takes approximately 1/4 millisecond; with this
231 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
232 * series of register accesses are expected (e.g. reading Event Log),
233 * to keep device from sleeping.
235 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
236 * SRAM is okay/restored. We don't check that here because this call
237 * is just for hardware register access; but GP1 MAC_SLEEP check is a
238 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
240 * 5000 series and later (including 1000 series) have non-volatile SRAM,
241 * and do not save/restore SRAM when power cycling.
243 ret
= _iwl_poll_bit(priv
, CSR_GP_CNTRL
,
244 CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN
,
245 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
|
246 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP
), 15000);
248 val
= _iwl_read32(priv
, CSR_GP_CNTRL
);
249 IWL_ERR(priv
, "MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val
);
250 _iwl_write32(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_FORCE_NMI
);
257 #ifdef CONFIG_IWLWIFI_DEBUG
258 static inline int __iwl_grab_nic_access(const char *f
, u32 l
,
259 struct iwl_priv
*priv
)
261 IWL_DEBUG_IO(priv
, "grabbing nic access - %s %d\n", f
, l
);
262 return _iwl_grab_nic_access(priv
);
264 #define iwl_grab_nic_access(priv) \
265 __iwl_grab_nic_access(__FILE__, __LINE__, priv)
267 #define iwl_grab_nic_access(priv) \
268 _iwl_grab_nic_access(priv)
271 static inline void _iwl_release_nic_access(struct iwl_priv
*priv
)
273 _iwl_clear_bit(priv
, CSR_GP_CNTRL
,
274 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ
);
276 #ifdef CONFIG_IWLWIFI_DEBUG
277 static inline void __iwl_release_nic_access(const char *f
, u32 l
,
278 struct iwl_priv
*priv
)
281 IWL_DEBUG_IO(priv
, "releasing nic access - %s %d\n", f
, l
);
282 _iwl_release_nic_access(priv
);
284 #define iwl_release_nic_access(priv) \
285 __iwl_release_nic_access(__FILE__, __LINE__, priv)
287 #define iwl_release_nic_access(priv) \
288 _iwl_release_nic_access(priv)
291 static inline u32
_iwl_read_direct32(struct iwl_priv
*priv
, u32 reg
)
293 return _iwl_read32(priv
, reg
);
295 #ifdef CONFIG_IWLWIFI_DEBUG
296 static inline u32
__iwl_read_direct32(const char *f
, u32 l
,
297 struct iwl_priv
*priv
, u32 reg
)
299 u32 value
= _iwl_read_direct32(priv
, reg
);
300 IWL_DEBUG_IO(priv
, "read_direct32(0x%4X) = 0x%08x - %s %d \n", reg
, value
,
304 static inline u32
iwl_read_direct32(struct iwl_priv
*priv
, u32 reg
)
307 unsigned long reg_flags
;
309 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
310 iwl_grab_nic_access(priv
);
311 value
= __iwl_read_direct32(__FILE__
, __LINE__
, priv
, reg
);
312 iwl_release_nic_access(priv
);
313 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
318 static inline u32
iwl_read_direct32(struct iwl_priv
*priv
, u32 reg
)
321 unsigned long reg_flags
;
323 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
324 iwl_grab_nic_access(priv
);
325 value
= _iwl_read_direct32(priv
, reg
);
326 iwl_release_nic_access(priv
);
327 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
333 static inline void _iwl_write_direct32(struct iwl_priv
*priv
,
336 _iwl_write32(priv
, reg
, value
);
338 static inline void iwl_write_direct32(struct iwl_priv
*priv
, u32 reg
, u32 value
)
340 unsigned long reg_flags
;
342 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
343 if (!iwl_grab_nic_access(priv
)) {
344 _iwl_write_direct32(priv
, reg
, value
);
345 iwl_release_nic_access(priv
);
347 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
350 static inline void iwl_write_reg_buf(struct iwl_priv
*priv
,
351 u32 reg
, u32 len
, u32
*values
)
353 u32 count
= sizeof(u32
);
355 if ((priv
!= NULL
) && (values
!= NULL
)) {
356 for (; 0 < len
; len
-= count
, reg
+= count
, values
++)
357 iwl_write_direct32(priv
, reg
, *values
);
361 static inline int _iwl_poll_direct_bit(struct iwl_priv
*priv
, u32 addr
,
362 u32 mask
, int timeout
)
367 if ((iwl_read_direct32(priv
, addr
) & mask
) == mask
)
369 udelay(IWL_POLL_INTERVAL
);
370 t
+= IWL_POLL_INTERVAL
;
371 } while (t
< timeout
);
376 #ifdef CONFIG_IWLWIFI_DEBUG
377 static inline int __iwl_poll_direct_bit(const char *f
, u32 l
,
378 struct iwl_priv
*priv
,
379 u32 addr
, u32 mask
, int timeout
)
381 int ret
= _iwl_poll_direct_bit(priv
, addr
, mask
, timeout
);
383 if (unlikely(ret
== -ETIMEDOUT
))
384 IWL_DEBUG_IO(priv
, "poll_direct_bit(0x%08X, 0x%08X) - "
385 "timedout - %s %d\n", addr
, mask
, f
, l
);
387 IWL_DEBUG_IO(priv
, "poll_direct_bit(0x%08X, 0x%08X) = 0x%08X "
388 "- %s %d\n", addr
, mask
, ret
, f
, l
);
391 #define iwl_poll_direct_bit(priv, addr, mask, timeout) \
392 __iwl_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout)
394 #define iwl_poll_direct_bit _iwl_poll_direct_bit
397 static inline u32
_iwl_read_prph(struct iwl_priv
*priv
, u32 reg
)
399 _iwl_write_direct32(priv
, HBUS_TARG_PRPH_RADDR
, reg
| (3 << 24));
401 return _iwl_read_direct32(priv
, HBUS_TARG_PRPH_RDAT
);
403 static inline u32
iwl_read_prph(struct iwl_priv
*priv
, u32 reg
)
405 unsigned long reg_flags
;
408 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
409 iwl_grab_nic_access(priv
);
410 val
= _iwl_read_prph(priv
, reg
);
411 iwl_release_nic_access(priv
);
412 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
416 static inline void _iwl_write_prph(struct iwl_priv
*priv
,
419 _iwl_write_direct32(priv
, HBUS_TARG_PRPH_WADDR
,
420 ((addr
& 0x0000FFFF) | (3 << 24)));
422 _iwl_write_direct32(priv
, HBUS_TARG_PRPH_WDAT
, val
);
425 static inline void iwl_write_prph(struct iwl_priv
*priv
, u32 addr
, u32 val
)
427 unsigned long reg_flags
;
429 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
430 if (!iwl_grab_nic_access(priv
)) {
431 _iwl_write_prph(priv
, addr
, val
);
432 iwl_release_nic_access(priv
);
434 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
437 #define _iwl_set_bits_prph(priv, reg, mask) \
438 _iwl_write_prph(priv, reg, (_iwl_read_prph(priv, reg) | mask))
440 static inline void iwl_set_bits_prph(struct iwl_priv
*priv
, u32 reg
, u32 mask
)
442 unsigned long reg_flags
;
444 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
445 iwl_grab_nic_access(priv
);
446 _iwl_set_bits_prph(priv
, reg
, mask
);
447 iwl_release_nic_access(priv
);
448 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
451 #define _iwl_set_bits_mask_prph(priv, reg, bits, mask) \
452 _iwl_write_prph(priv, reg, ((_iwl_read_prph(priv, reg) & mask) | bits))
454 static inline void iwl_set_bits_mask_prph(struct iwl_priv
*priv
, u32 reg
,
457 unsigned long reg_flags
;
459 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
460 iwl_grab_nic_access(priv
);
461 _iwl_set_bits_mask_prph(priv
, reg
, bits
, mask
);
462 iwl_release_nic_access(priv
);
463 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
466 static inline void iwl_clear_bits_prph(struct iwl_priv
467 *priv
, u32 reg
, u32 mask
)
469 unsigned long reg_flags
;
472 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
473 iwl_grab_nic_access(priv
);
474 val
= _iwl_read_prph(priv
, reg
);
475 _iwl_write_prph(priv
, reg
, (val
& ~mask
));
476 iwl_release_nic_access(priv
);
477 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
480 static inline u32
iwl_read_targ_mem(struct iwl_priv
*priv
, u32 addr
)
482 unsigned long reg_flags
;
485 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
486 iwl_grab_nic_access(priv
);
488 _iwl_write_direct32(priv
, HBUS_TARG_MEM_RADDR
, addr
);
490 value
= _iwl_read_direct32(priv
, HBUS_TARG_MEM_RDAT
);
492 iwl_release_nic_access(priv
);
493 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
497 static inline void iwl_write_targ_mem(struct iwl_priv
*priv
, u32 addr
, u32 val
)
499 unsigned long reg_flags
;
501 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
502 if (!iwl_grab_nic_access(priv
)) {
503 _iwl_write_direct32(priv
, HBUS_TARG_MEM_WADDR
, addr
);
505 _iwl_write_direct32(priv
, HBUS_TARG_MEM_WDAT
, val
);
506 iwl_release_nic_access(priv
);
508 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);
511 static inline void iwl_write_targ_mem_buf(struct iwl_priv
*priv
, u32 addr
,
512 u32 len
, u32
*values
)
514 unsigned long reg_flags
;
516 spin_lock_irqsave(&priv
->reg_lock
, reg_flags
);
517 if (!iwl_grab_nic_access(priv
)) {
518 _iwl_write_direct32(priv
, HBUS_TARG_MEM_WADDR
, addr
);
520 for (; 0 < len
; len
-= sizeof(u32
), values
++)
521 _iwl_write_direct32(priv
, HBUS_TARG_MEM_WDAT
, *values
);
523 iwl_release_nic_access(priv
);
525 spin_unlock_irqrestore(&priv
->reg_lock
, reg_flags
);