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iwlwifi: fix build error for CONFIG_IWLAGN=n
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl-rx.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/etherdevice.h>
31 #include <net/mac80211.h>
32 #include <asm/unaligned.h>
33 #include "iwl-eeprom.h"
34 #include "iwl-dev.h"
35 #include "iwl-core.h"
36 #include "iwl-sta.h"
37 #include "iwl-io.h"
38 #include "iwl-calib.h"
39 #include "iwl-helpers.h"
40 /************************** RX-FUNCTIONS ****************************/
41 /*
42 * Rx theory of operation
43 *
44 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45 * each of which point to Receive Buffers to be filled by the NIC. These get
46 * used not only for Rx frames, but for any command response or notification
47 * from the NIC. The driver and NIC manage the Rx buffers by means
48 * of indexes into the circular buffer.
49 *
50 * Rx Queue Indexes
51 * The host/firmware share two index registers for managing the Rx buffers.
52 *
53 * The READ index maps to the first position that the firmware may be writing
54 * to -- the driver can read up to (but not including) this position and get
55 * good data.
56 * The READ index is managed by the firmware once the card is enabled.
57 *
58 * The WRITE index maps to the last position the driver has read from -- the
59 * position preceding WRITE is the last slot the firmware can place a packet.
60 *
61 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
62 * WRITE = READ.
63 *
64 * During initialization, the host sets up the READ queue position to the first
65 * INDEX position, and WRITE to the last (READ - 1 wrapped)
66 *
67 * When the firmware places a packet in a buffer, it will advance the READ index
68 * and fire the RX interrupt. The driver can then query the READ index and
69 * process as many packets as possible, moving the WRITE index forward as it
70 * resets the Rx queue buffers with new memory.
71 *
72 * The management in the driver is as follows:
73 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
74 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75 * to replenish the iwl->rxq->rx_free.
76 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77 * iwl->rxq is replenished and the READ INDEX is updated (updating the
78 * 'processed' and 'read' driver indexes as well)
79 * + A received packet is processed and handed to the kernel network stack,
80 * detached from the iwl->rxq. The driver 'processed' index is updated.
81 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
84 * were enough free buffers and RX_STALLED is set it is cleared.
85 *
86 *
87 * Driver sequence:
88 *
89 * iwl_rx_queue_alloc() Allocates rx_free
90 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
91 * iwl_rx_queue_restock
92 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93 * queue, updates firmware pointers, and updates
94 * the WRITE index. If insufficient rx_free buffers
95 * are available, schedules iwl_rx_replenish
96 *
97 * -- enable interrupts --
98 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
99 * READ INDEX, detaching the SKB from the pool.
100 * Moves the packet buffer from queue to rx_used.
101 * Calls iwl_rx_queue_restock to refill any empty
102 * slots.
103 * ...
104 *
105 */
106
107 /**
108 * iwl_rx_queue_space - Return number of free slots available in queue.
109 */
110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
111 {
112 int s = q->read - q->write;
113 if (s <= 0)
114 s += RX_QUEUE_SIZE;
115 /* keep some buffer to not confuse full and empty queue */
116 s -= 2;
117 if (s < 0)
118 s = 0;
119 return s;
120 }
121 EXPORT_SYMBOL(iwl_rx_queue_space);
122
123 /**
124 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
125 */
126 void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
127 {
128 unsigned long flags;
129 u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
130 u32 reg;
131
132 spin_lock_irqsave(&q->lock, flags);
133
134 if (q->need_update == 0)
135 goto exit_unlock;
136
137 /* If power-saving is in use, make sure device is awake */
138 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
139 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
140
141 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
142 IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
143 reg);
144 iwl_set_bit(priv, CSR_GP_CNTRL,
145 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
146 goto exit_unlock;
147 }
148
149 q->write_actual = (q->write & ~0x7);
150 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
151
152 /* Else device is assumed to be awake */
153 } else {
154 /* Device expects a multiple of 8 */
155 q->write_actual = (q->write & ~0x7);
156 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
157 }
158
159 q->need_update = 0;
160
161 exit_unlock:
162 spin_unlock_irqrestore(&q->lock, flags);
163 }
164 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
165 /**
166 * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
167 */
168 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
169 dma_addr_t dma_addr)
170 {
171 return cpu_to_le32((u32)(dma_addr >> 8));
172 }
173
174 /**
175 * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
176 *
177 * If there are slots in the RX queue that need to be restocked,
178 * and we have free pre-allocated buffers, fill the ranks as much
179 * as we can, pulling from rx_free.
180 *
181 * This moves the 'write' index forward to catch up with 'processed', and
182 * also updates the memory address in the firmware to reference the new
183 * target buffer.
184 */
185 void iwl_rx_queue_restock(struct iwl_priv *priv)
186 {
187 struct iwl_rx_queue *rxq = &priv->rxq;
188 struct list_head *element;
189 struct iwl_rx_mem_buffer *rxb;
190 unsigned long flags;
191 int write;
192
193 spin_lock_irqsave(&rxq->lock, flags);
194 write = rxq->write & ~0x7;
195 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
196 /* Get next free Rx buffer, remove from free list */
197 element = rxq->rx_free.next;
198 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
199 list_del(element);
200
201 /* Point to Rx buffer via next RBD in circular buffer */
202 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->page_dma);
203 rxq->queue[rxq->write] = rxb;
204 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
205 rxq->free_count--;
206 }
207 spin_unlock_irqrestore(&rxq->lock, flags);
208 /* If the pre-allocated buffer pool is dropping low, schedule to
209 * refill it */
210 if (rxq->free_count <= RX_LOW_WATERMARK)
211 queue_work(priv->workqueue, &priv->rx_replenish);
212
213
214 /* If we've added more space for the firmware to place data, tell it.
215 * Increment device's write pointer in multiples of 8. */
216 if (rxq->write_actual != (rxq->write & ~0x7)) {
217 spin_lock_irqsave(&rxq->lock, flags);
218 rxq->need_update = 1;
219 spin_unlock_irqrestore(&rxq->lock, flags);
220 iwl_rx_queue_update_write_ptr(priv, rxq);
221 }
222 }
223 EXPORT_SYMBOL(iwl_rx_queue_restock);
224
225
226 /**
227 * iwl_rx_replenish - Move all used packet from rx_used to rx_free
228 *
229 * When moving to rx_free an SKB is allocated for the slot.
230 *
231 * Also restock the Rx queue via iwl_rx_queue_restock.
232 * This is called as a scheduled work item (except for during initialization)
233 */
234 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
235 {
236 struct iwl_rx_queue *rxq = &priv->rxq;
237 struct list_head *element;
238 struct iwl_rx_mem_buffer *rxb;
239 struct page *page;
240 unsigned long flags;
241 gfp_t gfp_mask = priority;
242
243 while (1) {
244 spin_lock_irqsave(&rxq->lock, flags);
245 if (list_empty(&rxq->rx_used)) {
246 spin_unlock_irqrestore(&rxq->lock, flags);
247 return;
248 }
249 spin_unlock_irqrestore(&rxq->lock, flags);
250
251 if (rxq->free_count > RX_LOW_WATERMARK)
252 gfp_mask |= __GFP_NOWARN;
253
254 if (priv->hw_params.rx_page_order > 0)
255 gfp_mask |= __GFP_COMP;
256
257 /* Alloc a new receive buffer */
258 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
259 if (!page) {
260 if (net_ratelimit())
261 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
262 "order: %d\n",
263 priv->hw_params.rx_page_order);
264
265 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
266 net_ratelimit())
267 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
268 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
269 rxq->free_count);
270 /* We don't reschedule replenish work here -- we will
271 * call the restock method and if it still needs
272 * more buffers it will schedule replenish */
273 return;
274 }
275
276 spin_lock_irqsave(&rxq->lock, flags);
277
278 if (list_empty(&rxq->rx_used)) {
279 spin_unlock_irqrestore(&rxq->lock, flags);
280 __free_pages(page, priv->hw_params.rx_page_order);
281 return;
282 }
283 element = rxq->rx_used.next;
284 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
285 list_del(element);
286
287 spin_unlock_irqrestore(&rxq->lock, flags);
288
289 rxb->page = page;
290 /* Get physical address of the RB */
291 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
292 PAGE_SIZE << priv->hw_params.rx_page_order,
293 PCI_DMA_FROMDEVICE);
294 /* dma address must be no more than 36 bits */
295 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
296 /* and also 256 byte aligned! */
297 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
298
299 spin_lock_irqsave(&rxq->lock, flags);
300
301 list_add_tail(&rxb->list, &rxq->rx_free);
302 rxq->free_count++;
303 priv->alloc_rxb_page++;
304
305 spin_unlock_irqrestore(&rxq->lock, flags);
306 }
307 }
308
309 void iwl_rx_replenish(struct iwl_priv *priv)
310 {
311 unsigned long flags;
312
313 iwl_rx_allocate(priv, GFP_KERNEL);
314
315 spin_lock_irqsave(&priv->lock, flags);
316 iwl_rx_queue_restock(priv);
317 spin_unlock_irqrestore(&priv->lock, flags);
318 }
319 EXPORT_SYMBOL(iwl_rx_replenish);
320
321 void iwl_rx_replenish_now(struct iwl_priv *priv)
322 {
323 iwl_rx_allocate(priv, GFP_ATOMIC);
324
325 iwl_rx_queue_restock(priv);
326 }
327 EXPORT_SYMBOL(iwl_rx_replenish_now);
328
329
330 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
331 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
332 * This free routine walks the list of POOL entries and if SKB is set to
333 * non NULL it is unmapped and freed
334 */
335 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
336 {
337 int i;
338 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
339 if (rxq->pool[i].page != NULL) {
340 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
341 PAGE_SIZE << priv->hw_params.rx_page_order,
342 PCI_DMA_FROMDEVICE);
343 __iwl_free_pages(priv, rxq->pool[i].page);
344 rxq->pool[i].page = NULL;
345 }
346 }
347
348 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
349 rxq->dma_addr);
350 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
351 rxq->rb_stts, rxq->rb_stts_dma);
352 rxq->bd = NULL;
353 rxq->rb_stts = NULL;
354 }
355 EXPORT_SYMBOL(iwl_rx_queue_free);
356
357 int iwl_rx_queue_alloc(struct iwl_priv *priv)
358 {
359 struct iwl_rx_queue *rxq = &priv->rxq;
360 struct device *dev = &priv->pci_dev->dev;
361 int i;
362
363 spin_lock_init(&rxq->lock);
364 INIT_LIST_HEAD(&rxq->rx_free);
365 INIT_LIST_HEAD(&rxq->rx_used);
366
367 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
368 rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr,
369 GFP_KERNEL);
370 if (!rxq->bd)
371 goto err_bd;
372
373 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
374 &rxq->rb_stts_dma, GFP_KERNEL);
375 if (!rxq->rb_stts)
376 goto err_rb;
377
378 /* Fill the rx_used queue with _all_ of the Rx buffers */
379 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
380 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
381
382 /* Set us so that we have processed and used all buffers, but have
383 * not restocked the Rx queue with fresh buffers */
384 rxq->read = rxq->write = 0;
385 rxq->write_actual = 0;
386 rxq->free_count = 0;
387 rxq->need_update = 0;
388 return 0;
389
390 err_rb:
391 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
392 rxq->dma_addr);
393 err_bd:
394 return -ENOMEM;
395 }
396 EXPORT_SYMBOL(iwl_rx_queue_alloc);
397
398 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
399 {
400 unsigned long flags;
401 int i;
402 spin_lock_irqsave(&rxq->lock, flags);
403 INIT_LIST_HEAD(&rxq->rx_free);
404 INIT_LIST_HEAD(&rxq->rx_used);
405 /* Fill the rx_used queue with _all_ of the Rx buffers */
406 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
407 /* In the reset function, these buffers may have been allocated
408 * to an SKB, so we need to unmap and free potential storage */
409 if (rxq->pool[i].page != NULL) {
410 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
411 PAGE_SIZE << priv->hw_params.rx_page_order,
412 PCI_DMA_FROMDEVICE);
413 __iwl_free_pages(priv, rxq->pool[i].page);
414 rxq->pool[i].page = NULL;
415 }
416 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
417 }
418
419 /* Set us so that we have processed and used all buffers, but have
420 * not restocked the Rx queue with fresh buffers */
421 rxq->read = rxq->write = 0;
422 rxq->write_actual = 0;
423 rxq->free_count = 0;
424 spin_unlock_irqrestore(&rxq->lock, flags);
425 }
426
427 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
428 {
429 u32 rb_size;
430 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
431 u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
432
433 if (!priv->cfg->use_isr_legacy)
434 rb_timeout = RX_RB_TIMEOUT;
435
436 if (priv->cfg->mod_params->amsdu_size_8K)
437 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
438 else
439 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
440
441 /* Stop Rx DMA */
442 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
443
444 /* Reset driver's Rx queue write index */
445 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
446
447 /* Tell device where to find RBD circular buffer in DRAM */
448 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
449 (u32)(rxq->dma_addr >> 8));
450
451 /* Tell device where in DRAM to update its Rx status */
452 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
453 rxq->rb_stts_dma >> 4);
454
455 /* Enable Rx DMA
456 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
457 * the credit mechanism in 5000 HW RX FIFO
458 * Direct rx interrupts to hosts
459 * Rx buffer size 4 or 8k
460 * RB timeout 0x10
461 * 256 RBDs
462 */
463 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
464 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
465 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
466 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
467 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
468 rb_size|
469 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
470 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
471
472 /* Set interrupt coalescing timer to default (2048 usecs) */
473 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
474
475 return 0;
476 }
477
478 int iwl_rxq_stop(struct iwl_priv *priv)
479 {
480
481 /* stop Rx DMA */
482 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
483 iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
484 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
485
486 return 0;
487 }
488 EXPORT_SYMBOL(iwl_rxq_stop);
489
490 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
491 struct iwl_rx_mem_buffer *rxb)
492
493 {
494 struct iwl_rx_packet *pkt = rxb_addr(rxb);
495 struct iwl_missed_beacon_notif *missed_beacon;
496
497 missed_beacon = &pkt->u.missed_beacon;
498 if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
499 priv->missed_beacon_threshold) {
500 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
501 le32_to_cpu(missed_beacon->consecutive_missed_beacons),
502 le32_to_cpu(missed_beacon->total_missed_becons),
503 le32_to_cpu(missed_beacon->num_recvd_beacons),
504 le32_to_cpu(missed_beacon->num_expected_beacons));
505 if (!test_bit(STATUS_SCANNING, &priv->status))
506 iwl_init_sensitivity(priv);
507 }
508 }
509 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
510
511 void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
512 struct iwl_rx_mem_buffer *rxb)
513 {
514 struct iwl_rx_packet *pkt = rxb_addr(rxb);
515 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
516
517 if (!report->state) {
518 IWL_DEBUG_11H(priv,
519 "Spectrum Measure Notification: Start\n");
520 return;
521 }
522
523 memcpy(&priv->measure_report, report, sizeof(*report));
524 priv->measurement_status |= MEASUREMENT_READY;
525 }
526 EXPORT_SYMBOL(iwl_rx_spectrum_measure_notif);
527
528
529
530 /* Calculate noise level, based on measurements during network silence just
531 * before arriving beacon. This measurement can be done only if we know
532 * exactly when to expect beacons, therefore only when we're associated. */
533 static void iwl_rx_calc_noise(struct iwl_priv *priv)
534 {
535 struct statistics_rx_non_phy *rx_info
536 = &(priv->statistics.rx.general);
537 int num_active_rx = 0;
538 int total_silence = 0;
539 int bcn_silence_a =
540 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
541 int bcn_silence_b =
542 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
543 int bcn_silence_c =
544 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
545
546 if (bcn_silence_a) {
547 total_silence += bcn_silence_a;
548 num_active_rx++;
549 }
550 if (bcn_silence_b) {
551 total_silence += bcn_silence_b;
552 num_active_rx++;
553 }
554 if (bcn_silence_c) {
555 total_silence += bcn_silence_c;
556 num_active_rx++;
557 }
558
559 /* Average among active antennas */
560 if (num_active_rx)
561 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
562 else
563 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
564
565 IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
566 bcn_silence_a, bcn_silence_b, bcn_silence_c,
567 priv->last_rx_noise);
568 }
569
570 #ifdef CONFIG_IWLWIFI_DEBUG
571 /*
572 * based on the assumption of all statistics counter are in DWORD
573 * FIXME: This function is for debugging, do not deal with
574 * the case of counters roll-over.
575 */
576 static void iwl_accumulative_statistics(struct iwl_priv *priv,
577 __le32 *stats)
578 {
579 int i;
580 __le32 *prev_stats;
581 u32 *accum_stats;
582 u32 *delta, *max_delta;
583
584 prev_stats = (__le32 *)&priv->statistics;
585 accum_stats = (u32 *)&priv->accum_statistics;
586 delta = (u32 *)&priv->delta_statistics;
587 max_delta = (u32 *)&priv->max_delta;
588
589 for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
590 i += sizeof(__le32), stats++, prev_stats++, delta++,
591 max_delta++, accum_stats++) {
592 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
593 *delta = (le32_to_cpu(*stats) -
594 le32_to_cpu(*prev_stats));
595 *accum_stats += *delta;
596 if (*delta > *max_delta)
597 *max_delta = *delta;
598 }
599 }
600
601 /* reset accumulative statistics for "no-counter" type statistics */
602 priv->accum_statistics.general.temperature =
603 priv->statistics.general.temperature;
604 priv->accum_statistics.general.temperature_m =
605 priv->statistics.general.temperature_m;
606 priv->accum_statistics.general.ttl_timestamp =
607 priv->statistics.general.ttl_timestamp;
608 priv->accum_statistics.tx.tx_power.ant_a =
609 priv->statistics.tx.tx_power.ant_a;
610 priv->accum_statistics.tx.tx_power.ant_b =
611 priv->statistics.tx.tx_power.ant_b;
612 priv->accum_statistics.tx.tx_power.ant_c =
613 priv->statistics.tx.tx_power.ant_c;
614 }
615 #endif
616
617 #define REG_RECALIB_PERIOD (60)
618
619 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
620 #define ACK_CNT_RATIO (50)
621 #define BA_TIMEOUT_CNT (5)
622 #define BA_TIMEOUT_MAX (16)
623
624 #if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE)
625 /**
626 * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
627 *
628 * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
629 * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
630 * operation state.
631 */
632 bool iwl_good_ack_health(struct iwl_priv *priv,
633 struct iwl_rx_packet *pkt)
634 {
635 bool rc = true;
636 int actual_ack_cnt_delta, expected_ack_cnt_delta;
637 int ba_timeout_delta;
638
639 actual_ack_cnt_delta =
640 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
641 le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
642 expected_ack_cnt_delta =
643 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
644 le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
645 ba_timeout_delta =
646 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
647 le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
648 if ((priv->_agn.agg_tids_count > 0) &&
649 (expected_ack_cnt_delta > 0) &&
650 (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
651 < ACK_CNT_RATIO) &&
652 (ba_timeout_delta > BA_TIMEOUT_CNT)) {
653 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
654 " expected_ack_cnt = %d\n",
655 actual_ack_cnt_delta, expected_ack_cnt_delta);
656
657 #ifdef CONFIG_IWLWIFI_DEBUG
658 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
659 priv->delta_statistics.tx.rx_detected_cnt);
660 IWL_DEBUG_RADIO(priv,
661 "ack_or_ba_timeout_collision delta = %d\n",
662 priv->delta_statistics.tx.
663 ack_or_ba_timeout_collision);
664 #endif
665 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
666 ba_timeout_delta);
667 if (!actual_ack_cnt_delta &&
668 (ba_timeout_delta >= BA_TIMEOUT_MAX))
669 rc = false;
670 }
671 return rc;
672 }
673 EXPORT_SYMBOL(iwl_good_ack_health);
674 #endif
675
676 /**
677 * iwl_good_plcp_health - checks for plcp error.
678 *
679 * When the plcp error is exceeding the thresholds, reset the radio
680 * to improve the throughput.
681 */
682 bool iwl_good_plcp_health(struct iwl_priv *priv,
683 struct iwl_rx_packet *pkt)
684 {
685 bool rc = true;
686 int combined_plcp_delta;
687 unsigned int plcp_msec;
688 unsigned long plcp_received_jiffies;
689
690 /*
691 * check for plcp_err and trigger radio reset if it exceeds
692 * the plcp error threshold plcp_delta.
693 */
694 plcp_received_jiffies = jiffies;
695 plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies -
696 (long) priv->plcp_jiffies);
697 priv->plcp_jiffies = plcp_received_jiffies;
698 /*
699 * check to make sure plcp_msec is not 0 to prevent division
700 * by zero.
701 */
702 if (plcp_msec) {
703 combined_plcp_delta =
704 (le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err) -
705 le32_to_cpu(priv->statistics.rx.ofdm.plcp_err)) +
706 (le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err) -
707 le32_to_cpu(priv->statistics.rx.ofdm_ht.plcp_err));
708
709 if ((combined_plcp_delta > 0) &&
710 ((combined_plcp_delta * 100) / plcp_msec) >
711 priv->cfg->plcp_delta_threshold) {
712 /*
713 * if plcp_err exceed the threshold,
714 * the following data is printed in csv format:
715 * Text: plcp_err exceeded %d,
716 * Received ofdm.plcp_err,
717 * Current ofdm.plcp_err,
718 * Received ofdm_ht.plcp_err,
719 * Current ofdm_ht.plcp_err,
720 * combined_plcp_delta,
721 * plcp_msec
722 */
723 IWL_DEBUG_RADIO(priv, "plcp_err exceeded %u, "
724 "%u, %u, %u, %u, %d, %u mSecs\n",
725 priv->cfg->plcp_delta_threshold,
726 le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err),
727 le32_to_cpu(priv->statistics.rx.ofdm.plcp_err),
728 le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err),
729 le32_to_cpu(
730 priv->statistics.rx.ofdm_ht.plcp_err),
731 combined_plcp_delta, plcp_msec);
732 rc = false;
733 }
734 }
735 return rc;
736 }
737 EXPORT_SYMBOL(iwl_good_plcp_health);
738
739 static void iwl_recover_from_statistics(struct iwl_priv *priv,
740 struct iwl_rx_packet *pkt)
741 {
742 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
743 return;
744 if (iwl_is_associated(priv)) {
745 if (priv->cfg->ops->lib->check_ack_health) {
746 if (!priv->cfg->ops->lib->check_ack_health(
747 priv, pkt)) {
748 /*
749 * low ack count detected
750 * restart Firmware
751 */
752 IWL_ERR(priv, "low ack count detected, "
753 "restart firmware\n");
754 iwl_force_reset(priv, IWL_FW_RESET);
755 }
756 } else if (priv->cfg->ops->lib->check_plcp_health) {
757 if (!priv->cfg->ops->lib->check_plcp_health(
758 priv, pkt)) {
759 /*
760 * high plcp error detected
761 * reset Radio
762 */
763 iwl_force_reset(priv, IWL_RF_RESET);
764 }
765 }
766 }
767 }
768
769 void iwl_rx_statistics(struct iwl_priv *priv,
770 struct iwl_rx_mem_buffer *rxb)
771 {
772 int change;
773 struct iwl_rx_packet *pkt = rxb_addr(rxb);
774
775
776 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
777 (int)sizeof(priv->statistics),
778 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
779
780 change = ((priv->statistics.general.temperature !=
781 pkt->u.stats.general.temperature) ||
782 ((priv->statistics.flag &
783 STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
784 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
785
786 #ifdef CONFIG_IWLWIFI_DEBUG
787 iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
788 #endif
789 iwl_recover_from_statistics(priv, pkt);
790
791 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
792
793 set_bit(STATUS_STATISTICS, &priv->status);
794
795 /* Reschedule the statistics timer to occur in
796 * REG_RECALIB_PERIOD seconds to ensure we get a
797 * thermal update even if the uCode doesn't give
798 * us one */
799 mod_timer(&priv->statistics_periodic, jiffies +
800 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
801
802 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
803 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
804 iwl_rx_calc_noise(priv);
805 queue_work(priv->workqueue, &priv->run_time_calib_work);
806 }
807 if (priv->cfg->ops->lib->temp_ops.temperature && change)
808 priv->cfg->ops->lib->temp_ops.temperature(priv);
809 }
810 EXPORT_SYMBOL(iwl_rx_statistics);
811
812 void iwl_reply_statistics(struct iwl_priv *priv,
813 struct iwl_rx_mem_buffer *rxb)
814 {
815 struct iwl_rx_packet *pkt = rxb_addr(rxb);
816
817 if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
818 #ifdef CONFIG_IWLWIFI_DEBUG
819 memset(&priv->accum_statistics, 0,
820 sizeof(struct iwl_notif_statistics));
821 memset(&priv->delta_statistics, 0,
822 sizeof(struct iwl_notif_statistics));
823 memset(&priv->max_delta, 0,
824 sizeof(struct iwl_notif_statistics));
825 #endif
826 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
827 }
828 iwl_rx_statistics(priv, rxb);
829 }
830 EXPORT_SYMBOL(iwl_reply_statistics);
831
832 /* Calc max signal level (dBm) among 3 possible receivers */
833 static inline int iwl_calc_rssi(struct iwl_priv *priv,
834 struct iwl_rx_phy_res *rx_resp)
835 {
836 return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
837 }
838
839 #ifdef CONFIG_IWLWIFI_DEBUG
840 /**
841 * iwl_dbg_report_frame - dump frame to syslog during debug sessions
842 *
843 * You may hack this function to show different aspects of received frames,
844 * including selective frame dumps.
845 * group100 parameter selects whether to show 1 out of 100 good data frames.
846 * All beacon and probe response frames are printed.
847 */
848 static void iwl_dbg_report_frame(struct iwl_priv *priv,
849 struct iwl_rx_phy_res *phy_res, u16 length,
850 struct ieee80211_hdr *header, int group100)
851 {
852 u32 to_us;
853 u32 print_summary = 0;
854 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
855 u32 hundred = 0;
856 u32 dataframe = 0;
857 __le16 fc;
858 u16 seq_ctl;
859 u16 channel;
860 u16 phy_flags;
861 u32 rate_n_flags;
862 u32 tsf_low;
863 int rssi;
864
865 if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
866 return;
867
868 /* MAC header */
869 fc = header->frame_control;
870 seq_ctl = le16_to_cpu(header->seq_ctrl);
871
872 /* metadata */
873 channel = le16_to_cpu(phy_res->channel);
874 phy_flags = le16_to_cpu(phy_res->phy_flags);
875 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
876
877 /* signal statistics */
878 rssi = iwl_calc_rssi(priv, phy_res);
879 tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
880
881 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
882
883 /* if data frame is to us and all is good,
884 * (optionally) print summary for only 1 out of every 100 */
885 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
886 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
887 dataframe = 1;
888 if (!group100)
889 print_summary = 1; /* print each frame */
890 else if (priv->framecnt_to_us < 100) {
891 priv->framecnt_to_us++;
892 print_summary = 0;
893 } else {
894 priv->framecnt_to_us = 0;
895 print_summary = 1;
896 hundred = 1;
897 }
898 } else {
899 /* print summary for all other frames */
900 print_summary = 1;
901 }
902
903 if (print_summary) {
904 char *title;
905 int rate_idx;
906 u32 bitrate;
907
908 if (hundred)
909 title = "100Frames";
910 else if (ieee80211_has_retry(fc))
911 title = "Retry";
912 else if (ieee80211_is_assoc_resp(fc))
913 title = "AscRsp";
914 else if (ieee80211_is_reassoc_resp(fc))
915 title = "RasRsp";
916 else if (ieee80211_is_probe_resp(fc)) {
917 title = "PrbRsp";
918 print_dump = 1; /* dump frame contents */
919 } else if (ieee80211_is_beacon(fc)) {
920 title = "Beacon";
921 print_dump = 1; /* dump frame contents */
922 } else if (ieee80211_is_atim(fc))
923 title = "ATIM";
924 else if (ieee80211_is_auth(fc))
925 title = "Auth";
926 else if (ieee80211_is_deauth(fc))
927 title = "DeAuth";
928 else if (ieee80211_is_disassoc(fc))
929 title = "DisAssoc";
930 else
931 title = "Frame";
932
933 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
934 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
935 bitrate = 0;
936 WARN_ON_ONCE(1);
937 } else {
938 bitrate = iwl_rates[rate_idx].ieee / 2;
939 }
940
941 /* print frame summary.
942 * MAC addresses show just the last byte (for brevity),
943 * but you can hack it to show more, if you'd like to. */
944 if (dataframe)
945 IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
946 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
947 title, le16_to_cpu(fc), header->addr1[5],
948 length, rssi, channel, bitrate);
949 else {
950 /* src/dst addresses assume managed mode */
951 IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
952 "len=%u, rssi=%d, tim=%lu usec, "
953 "phy=0x%02x, chnl=%d\n",
954 title, le16_to_cpu(fc), header->addr1[5],
955 header->addr3[5], length, rssi,
956 tsf_low - priv->scan_start_tsf,
957 phy_flags, channel);
958 }
959 }
960 if (print_dump)
961 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
962 }
963 #endif
964
965 /*
966 * returns non-zero if packet should be dropped
967 */
968 int iwl_set_decrypted_flag(struct iwl_priv *priv,
969 struct ieee80211_hdr *hdr,
970 u32 decrypt_res,
971 struct ieee80211_rx_status *stats)
972 {
973 u16 fc = le16_to_cpu(hdr->frame_control);
974
975 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
976 return 0;
977
978 if (!(fc & IEEE80211_FCTL_PROTECTED))
979 return 0;
980
981 IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
982 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
983 case RX_RES_STATUS_SEC_TYPE_TKIP:
984 /* The uCode has got a bad phase 1 Key, pushes the packet.
985 * Decryption will be done in SW. */
986 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
987 RX_RES_STATUS_BAD_KEY_TTAK)
988 break;
989
990 case RX_RES_STATUS_SEC_TYPE_WEP:
991 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
992 RX_RES_STATUS_BAD_ICV_MIC) {
993 /* bad ICV, the packet is destroyed since the
994 * decryption is inplace, drop it */
995 IWL_DEBUG_RX(priv, "Packet destroyed\n");
996 return -1;
997 }
998 case RX_RES_STATUS_SEC_TYPE_CCMP:
999 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
1000 RX_RES_STATUS_DECRYPT_OK) {
1001 IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
1002 stats->flag |= RX_FLAG_DECRYPTED;
1003 }
1004 break;
1005
1006 default:
1007 break;
1008 }
1009 return 0;
1010 }
1011 EXPORT_SYMBOL(iwl_set_decrypted_flag);
1012
1013 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
1014 {
1015 u32 decrypt_out = 0;
1016
1017 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
1018 RX_RES_STATUS_STATION_FOUND)
1019 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
1020 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
1021
1022 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
1023
1024 /* packet was not encrypted */
1025 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
1026 RX_RES_STATUS_SEC_TYPE_NONE)
1027 return decrypt_out;
1028
1029 /* packet was encrypted with unknown alg */
1030 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
1031 RX_RES_STATUS_SEC_TYPE_ERR)
1032 return decrypt_out;
1033
1034 /* decryption was not done in HW */
1035 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
1036 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
1037 return decrypt_out;
1038
1039 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
1040
1041 case RX_RES_STATUS_SEC_TYPE_CCMP:
1042 /* alg is CCM: check MIC only */
1043 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
1044 /* Bad MIC */
1045 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
1046 else
1047 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
1048
1049 break;
1050
1051 case RX_RES_STATUS_SEC_TYPE_TKIP:
1052 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
1053 /* Bad TTAK */
1054 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
1055 break;
1056 }
1057 /* fall through if TTAK OK */
1058 default:
1059 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
1060 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
1061 else
1062 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
1063 break;
1064 };
1065
1066 IWL_DEBUG_RX(priv, "decrypt_in:0x%x decrypt_out = 0x%x\n",
1067 decrypt_in, decrypt_out);
1068
1069 return decrypt_out;
1070 }
1071
1072 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
1073 struct ieee80211_hdr *hdr,
1074 u16 len,
1075 u32 ampdu_status,
1076 struct iwl_rx_mem_buffer *rxb,
1077 struct ieee80211_rx_status *stats)
1078 {
1079 struct sk_buff *skb;
1080 int ret = 0;
1081 __le16 fc = hdr->frame_control;
1082
1083 /* We only process data packets if the interface is open */
1084 if (unlikely(!priv->is_open)) {
1085 IWL_DEBUG_DROP_LIMIT(priv,
1086 "Dropping packet while interface is not open.\n");
1087 return;
1088 }
1089
1090 /* In case of HW accelerated crypto and bad decryption, drop */
1091 if (!priv->cfg->mod_params->sw_crypto &&
1092 iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
1093 return;
1094
1095 skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
1096 if (!skb) {
1097 IWL_ERR(priv, "alloc_skb failed\n");
1098 return;
1099 }
1100
1101 skb_reserve(skb, IWL_LINK_HDR_MAX);
1102 skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
1103
1104 /* mac80211 currently doesn't support paged SKB. Convert it to
1105 * linear SKB for management frame and data frame requires
1106 * software decryption or software defragementation. */
1107 if (ieee80211_is_mgmt(fc) ||
1108 ieee80211_has_protected(fc) ||
1109 ieee80211_has_morefrags(fc) ||
1110 le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG ||
1111 (ieee80211_is_data_qos(fc) &&
1112 *ieee80211_get_qos_ctl(hdr) &
1113 IEEE80211_QOS_CONTROL_A_MSDU_PRESENT))
1114 ret = skb_linearize(skb);
1115 else
1116 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
1117 0 : -ENOMEM;
1118
1119 if (ret) {
1120 kfree_skb(skb);
1121 goto out;
1122 }
1123
1124 /*
1125 * XXX: We cannot touch the page and its virtual memory (hdr) after
1126 * here. It might have already been freed by the above skb change.
1127 */
1128
1129 iwl_update_stats(priv, false, fc, len);
1130 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
1131
1132 ieee80211_rx(priv->hw, skb);
1133 out:
1134 priv->alloc_rxb_page--;
1135 rxb->page = NULL;
1136 }
1137
1138 /* Called for REPLY_RX (legacy ABG frames), or
1139 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
1140 void iwl_rx_reply_rx(struct iwl_priv *priv,
1141 struct iwl_rx_mem_buffer *rxb)
1142 {
1143 struct ieee80211_hdr *header;
1144 struct ieee80211_rx_status rx_status;
1145 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1146 struct iwl_rx_phy_res *phy_res;
1147 __le32 rx_pkt_status;
1148 struct iwl4965_rx_mpdu_res_start *amsdu;
1149 u32 len;
1150 u32 ampdu_status;
1151 u32 rate_n_flags;
1152
1153 /**
1154 * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
1155 * REPLY_RX: physical layer info is in this buffer
1156 * REPLY_RX_MPDU_CMD: physical layer info was sent in separate
1157 * command and cached in priv->last_phy_res
1158 *
1159 * Here we set up local variables depending on which command is
1160 * received.
1161 */
1162 if (pkt->hdr.cmd == REPLY_RX) {
1163 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
1164 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
1165 + phy_res->cfg_phy_cnt);
1166
1167 len = le16_to_cpu(phy_res->byte_count);
1168 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
1169 phy_res->cfg_phy_cnt + len);
1170 ampdu_status = le32_to_cpu(rx_pkt_status);
1171 } else {
1172 if (!priv->last_phy_res[0]) {
1173 IWL_ERR(priv, "MPDU frame without cached PHY data\n");
1174 return;
1175 }
1176 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1177 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1178 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
1179 len = le16_to_cpu(amsdu->byte_count);
1180 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
1181 ampdu_status = iwl_translate_rx_status(priv,
1182 le32_to_cpu(rx_pkt_status));
1183 }
1184
1185 if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
1186 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
1187 phy_res->cfg_phy_cnt);
1188 return;
1189 }
1190
1191 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
1192 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1193 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1194 le32_to_cpu(rx_pkt_status));
1195 return;
1196 }
1197
1198 /* This will be used in several places later */
1199 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
1200
1201 /* rx_status carries information about the packet to mac80211 */
1202 rx_status.mactime = le64_to_cpu(phy_res->timestamp);
1203 rx_status.freq =
1204 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
1205 rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1206 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1207 rx_status.rate_idx =
1208 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
1209 rx_status.flag = 0;
1210
1211 /* TSF isn't reliable. In order to allow smooth user experience,
1212 * this W/A doesn't propagate it to the mac80211 */
1213 /*rx_status.flag |= RX_FLAG_TSFT;*/
1214
1215 priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1216
1217 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1218 rx_status.signal = iwl_calc_rssi(priv, phy_res);
1219
1220 /* Meaningful noise values are available only from beacon statistics,
1221 * which are gathered only when associated, and indicate noise
1222 * only for the associated network channel ...
1223 * Ignore these noise values while scanning (other channels) */
1224 if (iwl_is_associated(priv) &&
1225 !test_bit(STATUS_SCANNING, &priv->status)) {
1226 rx_status.noise = priv->last_rx_noise;
1227 } else {
1228 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1229 }
1230
1231 /* Reset beacon noise level if not associated. */
1232 if (!iwl_is_associated(priv))
1233 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1234
1235 #ifdef CONFIG_IWLWIFI_DEBUG
1236 /* Set "1" to report good data frames in groups of 100 */
1237 if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1238 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1239 #endif
1240 iwl_dbg_log_rx_data_frame(priv, len, header);
1241 IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, TSF %llu\n",
1242 rx_status.signal, rx_status.noise,
1243 (unsigned long long)rx_status.mactime);
1244
1245 /*
1246 * "antenna number"
1247 *
1248 * It seems that the antenna field in the phy flags value
1249 * is actually a bit field. This is undefined by radiotap,
1250 * it wants an actual antenna number but I always get "7"
1251 * for most legacy frames I receive indicating that the
1252 * same frame was received on all three RX chains.
1253 *
1254 * I think this field should be removed in favor of a
1255 * new 802.11n radiotap field "RX chains" that is defined
1256 * as a bitmask.
1257 */
1258 rx_status.antenna =
1259 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1260 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1261
1262 /* set the preamble flag if appropriate */
1263 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1264 rx_status.flag |= RX_FLAG_SHORTPRE;
1265
1266 /* Set up the HT phy flags */
1267 if (rate_n_flags & RATE_MCS_HT_MSK)
1268 rx_status.flag |= RX_FLAG_HT;
1269 if (rate_n_flags & RATE_MCS_HT40_MSK)
1270 rx_status.flag |= RX_FLAG_40MHZ;
1271 if (rate_n_flags & RATE_MCS_SGI_MSK)
1272 rx_status.flag |= RX_FLAG_SHORT_GI;
1273
1274 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1275 rxb, &rx_status);
1276 }
1277 EXPORT_SYMBOL(iwl_rx_reply_rx);
1278
1279 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1280 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1281 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1282 struct iwl_rx_mem_buffer *rxb)
1283 {
1284 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1285 priv->last_phy_res[0] = 1;
1286 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1287 sizeof(struct iwl_rx_phy_res));
1288 }
1289 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);
Linux kernel - Deliverables
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