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iwlwifi: use iwl_cmd instead of iwl3945_cmd
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-commands.h"
52 #include "iwl-3945.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-helpers.h"
55 #include "iwl-core.h"
56 #include "iwl-dev.h"
57
58 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
59 struct iwl3945_tx_queue *txq);
60
61 /******************************************************************************
62 *
63 * module boiler plate
64 *
65 ******************************************************************************/
66
67 /* module parameters */
68 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
69 static u32 iwl3945_param_debug; /* def: 0 = minimal debug log messages */
70 static int iwl3945_param_disable; /* def: 0 = enable radio */
71 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
72 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
73 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
74
75 /*
76 * module name, copyright, version, etc.
77 */
78
79 #define DRV_DESCRIPTION \
80 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
82 #ifdef CONFIG_IWL3945_DEBUG
83 #define VD "d"
84 #else
85 #define VD
86 #endif
87
88 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
89 #define VS "s"
90 #else
91 #define VS
92 #endif
93
94 #define IWL39_VERSION "1.2.26k" VD VS
95 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
96 #define DRV_AUTHOR "<ilw@linux.intel.com>"
97 #define DRV_VERSION IWL39_VERSION
98
99
100 MODULE_DESCRIPTION(DRV_DESCRIPTION);
101 MODULE_VERSION(DRV_VERSION);
102 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
103 MODULE_LICENSE("GPL");
104
105 static const struct ieee80211_supported_band *iwl3945_get_band(
106 struct iwl_priv *priv, enum ieee80211_band band)
107 {
108 return priv->hw->wiphy->bands[band];
109 }
110
111 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
112 * DMA services
113 *
114 * Theory of operation
115 *
116 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
117 * of buffer descriptors, each of which points to one or more data buffers for
118 * the device to read from or fill. Driver and device exchange status of each
119 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
120 * entries in each circular buffer, to protect against confusing empty and full
121 * queue states.
122 *
123 * The device reads or writes the data in the queues via the device's several
124 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
125 *
126 * For Tx queue, there are low mark and high mark limits. If, after queuing
127 * the packet for Tx, free space become < low mark, Tx queue stopped. When
128 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
129 * Tx queue resumed.
130 *
131 * The 3945 operates with six queues: One receive queue, one transmit queue
132 * (#4) for sending commands to the device firmware, and four transmit queues
133 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
134 ***************************************************/
135
136 int iwl3945_x2_queue_used(const struct iwl_queue *q, int i)
137 {
138 return q->write_ptr > q->read_ptr ?
139 (i >= q->read_ptr && i < q->write_ptr) :
140 !(i < q->read_ptr && i >= q->write_ptr);
141 }
142
143 /**
144 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
145 */
146 static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
147 int count, int slots_num, u32 id)
148 {
149 q->n_bd = count;
150 q->n_window = slots_num;
151 q->id = id;
152
153 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
154 * and iwl_queue_dec_wrap are broken. */
155 BUG_ON(!is_power_of_2(count));
156
157 /* slots_num must be power-of-two size, otherwise
158 * get_cmd_index is broken. */
159 BUG_ON(!is_power_of_2(slots_num));
160
161 q->low_mark = q->n_window / 4;
162 if (q->low_mark < 4)
163 q->low_mark = 4;
164
165 q->high_mark = q->n_window / 8;
166 if (q->high_mark < 2)
167 q->high_mark = 2;
168
169 q->write_ptr = q->read_ptr = 0;
170
171 return 0;
172 }
173
174 /**
175 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
176 */
177 static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
178 struct iwl3945_tx_queue *txq, u32 id)
179 {
180 struct pci_dev *dev = priv->pci_dev;
181
182 /* Driver private data, only for Tx (not command) queues,
183 * not shared with device. */
184 if (id != IWL_CMD_QUEUE_NUM) {
185 txq->txb = kmalloc(sizeof(txq->txb[0]) *
186 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
187 if (!txq->txb) {
188 IWL_ERR(priv, "kmalloc for auxiliary BD "
189 "structures failed\n");
190 goto error;
191 }
192 } else
193 txq->txb = NULL;
194
195 /* Circular buffer of transmit frame descriptors (TFDs),
196 * shared with device */
197 txq->bd = pci_alloc_consistent(dev,
198 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
199 &txq->q.dma_addr);
200
201 if (!txq->bd) {
202 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
203 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
204 goto error;
205 }
206 txq->q.id = id;
207
208 return 0;
209
210 error:
211 kfree(txq->txb);
212 txq->txb = NULL;
213
214 return -ENOMEM;
215 }
216
217 /**
218 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
219 */
220 int iwl3945_tx_queue_init(struct iwl_priv *priv,
221 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
222 {
223 struct pci_dev *dev = priv->pci_dev;
224 int len;
225 int rc = 0;
226
227 /*
228 * Alloc buffer array for commands (Tx or other types of commands).
229 * For the command queue (#4), allocate command space + one big
230 * command for scan, since scan command is very huge; the system will
231 * not have two scans at the same time, so only one is needed.
232 * For data Tx queues (all other queues), no super-size command
233 * space is needed.
234 */
235 len = sizeof(struct iwl_cmd) * slots_num;
236 if (txq_id == IWL_CMD_QUEUE_NUM)
237 len += IWL_MAX_SCAN_SIZE;
238 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
239 if (!txq->cmd)
240 return -ENOMEM;
241
242 /* Alloc driver data array and TFD circular buffer */
243 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
244 if (rc) {
245 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
246
247 return -ENOMEM;
248 }
249 txq->need_update = 0;
250
251 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
252 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
253 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
254
255 /* Initialize queue high/low-water, head/tail indexes */
256 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
257
258 /* Tell device where to find queue, enable DMA channel. */
259 iwl3945_hw_tx_queue_init(priv, txq);
260
261 return 0;
262 }
263
264 /**
265 * iwl3945_tx_queue_free - Deallocate DMA queue.
266 * @txq: Transmit queue to deallocate.
267 *
268 * Empty queue by removing and destroying all BD's.
269 * Free all buffers.
270 * 0-fill, but do not free "txq" descriptor structure.
271 */
272 void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl3945_tx_queue *txq)
273 {
274 struct iwl_queue *q = &txq->q;
275 struct pci_dev *dev = priv->pci_dev;
276 int len;
277
278 if (q->n_bd == 0)
279 return;
280
281 /* first, empty all BD's */
282 for (; q->write_ptr != q->read_ptr;
283 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
284 iwl3945_hw_txq_free_tfd(priv, txq);
285
286 len = sizeof(struct iwl_cmd) * q->n_window;
287 if (q->id == IWL_CMD_QUEUE_NUM)
288 len += IWL_MAX_SCAN_SIZE;
289
290 /* De-alloc array of command/tx buffers */
291 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
292
293 /* De-alloc circular buffer of TFDs */
294 if (txq->q.n_bd)
295 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
296 txq->q.n_bd, txq->bd, txq->q.dma_addr);
297
298 /* De-alloc array of per-TFD driver data */
299 kfree(txq->txb);
300 txq->txb = NULL;
301
302 /* 0-fill queue descriptor structure */
303 memset(txq, 0, sizeof(*txq));
304 }
305
306 /*************** STATION TABLE MANAGEMENT ****
307 * mac80211 should be examined to determine if sta_info is duplicating
308 * the functionality provided here
309 */
310
311 /**************************************************************/
312 #if 0 /* temporary disable till we add real remove station */
313 /**
314 * iwl3945_remove_station - Remove driver's knowledge of station.
315 *
316 * NOTE: This does not remove station from device's station table.
317 */
318 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
319 {
320 int index = IWL_INVALID_STATION;
321 int i;
322 unsigned long flags;
323
324 spin_lock_irqsave(&priv->sta_lock, flags);
325
326 if (is_ap)
327 index = IWL_AP_ID;
328 else if (is_broadcast_ether_addr(addr))
329 index = priv->hw_params.bcast_sta_id;
330 else
331 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
332 if (priv->stations_39[i].used &&
333 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
334 addr)) {
335 index = i;
336 break;
337 }
338
339 if (unlikely(index == IWL_INVALID_STATION))
340 goto out;
341
342 if (priv->stations_39[index].used) {
343 priv->stations_39[index].used = 0;
344 priv->num_stations--;
345 }
346
347 BUG_ON(priv->num_stations < 0);
348
349 out:
350 spin_unlock_irqrestore(&priv->sta_lock, flags);
351 return 0;
352 }
353 #endif
354
355 /**
356 * iwl3945_clear_stations_table - Clear the driver's station table
357 *
358 * NOTE: This does not clear or otherwise alter the device's station table.
359 */
360 static void iwl3945_clear_stations_table(struct iwl_priv *priv)
361 {
362 unsigned long flags;
363
364 spin_lock_irqsave(&priv->sta_lock, flags);
365
366 priv->num_stations = 0;
367 memset(priv->stations_39, 0, sizeof(priv->stations_39));
368
369 spin_unlock_irqrestore(&priv->sta_lock, flags);
370 }
371
372 /**
373 * iwl3945_add_station - Add station to station tables in driver and device
374 */
375 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
376 {
377 int i;
378 int index = IWL_INVALID_STATION;
379 struct iwl3945_station_entry *station;
380 unsigned long flags_spin;
381 u8 rate;
382
383 spin_lock_irqsave(&priv->sta_lock, flags_spin);
384 if (is_ap)
385 index = IWL_AP_ID;
386 else if (is_broadcast_ether_addr(addr))
387 index = priv->hw_params.bcast_sta_id;
388 else
389 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
390 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
391 addr)) {
392 index = i;
393 break;
394 }
395
396 if (!priv->stations_39[i].used &&
397 index == IWL_INVALID_STATION)
398 index = i;
399 }
400
401 /* These two conditions has the same outcome but keep them separate
402 since they have different meaning */
403 if (unlikely(index == IWL_INVALID_STATION)) {
404 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
405 return index;
406 }
407
408 if (priv->stations_39[index].used &&
409 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
410 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
411 return index;
412 }
413
414 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
415 station = &priv->stations_39[index];
416 station->used = 1;
417 priv->num_stations++;
418
419 /* Set up the REPLY_ADD_STA command to send to device */
420 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
421 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
422 station->sta.mode = 0;
423 station->sta.sta.sta_id = index;
424 station->sta.station_flags = 0;
425
426 if (priv->band == IEEE80211_BAND_5GHZ)
427 rate = IWL_RATE_6M_PLCP;
428 else
429 rate = IWL_RATE_1M_PLCP;
430
431 /* Turn on both antennas for the station... */
432 station->sta.rate_n_flags =
433 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
434
435 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
436
437 /* Add station to device's station table */
438 iwl3945_send_add_station(priv, &station->sta, flags);
439 return index;
440
441 }
442
443 /*************** DRIVER STATUS FUNCTIONS *****/
444
445 static inline int iwl3945_is_ready(struct iwl_priv *priv)
446 {
447 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
448 * set but EXIT_PENDING is not */
449 return test_bit(STATUS_READY, &priv->status) &&
450 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
451 !test_bit(STATUS_EXIT_PENDING, &priv->status);
452 }
453
454 static inline int iwl3945_is_alive(struct iwl_priv *priv)
455 {
456 return test_bit(STATUS_ALIVE, &priv->status);
457 }
458
459 static inline int iwl3945_is_init(struct iwl_priv *priv)
460 {
461 return test_bit(STATUS_INIT, &priv->status);
462 }
463
464 static inline int iwl3945_is_rfkill_sw(struct iwl_priv *priv)
465 {
466 return test_bit(STATUS_RF_KILL_SW, &priv->status);
467 }
468
469 static inline int iwl3945_is_rfkill_hw(struct iwl_priv *priv)
470 {
471 return test_bit(STATUS_RF_KILL_HW, &priv->status);
472 }
473
474 static inline int iwl3945_is_rfkill(struct iwl_priv *priv)
475 {
476 return iwl3945_is_rfkill_hw(priv) ||
477 iwl3945_is_rfkill_sw(priv);
478 }
479
480 static inline int iwl3945_is_ready_rf(struct iwl_priv *priv)
481 {
482
483 if (iwl3945_is_rfkill(priv))
484 return 0;
485
486 return iwl3945_is_ready(priv);
487 }
488
489 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
490
491 #define IWL_CMD(x) case x: return #x
492 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
493
494 /**
495 * iwl3945_enqueue_hcmd - enqueue a uCode command
496 * @priv: device private data point
497 * @cmd: a point to the ucode command structure
498 *
499 * The function returns < 0 values to indicate the operation is
500 * failed. On success, it turns the index (> 0) of command in the
501 * command queue.
502 */
503 static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
504 {
505 struct iwl3945_tx_queue *txq = &priv->txq39[IWL_CMD_QUEUE_NUM];
506 struct iwl_queue *q = &txq->q;
507 struct iwl3945_tfd_frame *tfd;
508 u32 *control_flags;
509 struct iwl_cmd *out_cmd;
510 u32 idx;
511 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
512 dma_addr_t phys_addr;
513 int pad;
514 u16 count;
515 int ret;
516 unsigned long flags;
517
518 /* If any of the command structures end up being larger than
519 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
520 * we will need to increase the size of the TFD entries */
521 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
522 !(cmd->meta.flags & CMD_SIZE_HUGE));
523
524
525 if (iwl3945_is_rfkill(priv)) {
526 IWL_DEBUG_INFO("Not sending command - RF KILL");
527 return -EIO;
528 }
529
530 if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
531 IWL_ERR(priv, "No space for Tx\n");
532 return -ENOSPC;
533 }
534
535 spin_lock_irqsave(&priv->hcmd_lock, flags);
536
537 tfd = &txq->bd[q->write_ptr];
538 memset(tfd, 0, sizeof(*tfd));
539
540 control_flags = (u32 *) tfd;
541
542 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
543 out_cmd = &txq->cmd[idx];
544
545 out_cmd->hdr.cmd = cmd->id;
546 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
547 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
548
549 /* At this point, the out_cmd now has all of the incoming cmd
550 * information */
551
552 out_cmd->hdr.flags = 0;
553 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
554 INDEX_TO_SEQ(q->write_ptr));
555 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
556 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
557
558 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
559 offsetof(struct iwl_cmd, hdr);
560 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
561
562 pad = U32_PAD(cmd->len);
563 count = TFD_CTL_COUNT_GET(*control_flags);
564 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
565
566 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
567 "%d bytes at %d[%d]:%d\n",
568 get_cmd_string(out_cmd->hdr.cmd),
569 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
570 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
571
572 txq->need_update = 1;
573
574 /* Increment and update queue's write index */
575 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
576 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
577
578 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
579 return ret ? ret : idx;
580 }
581
582 static int iwl3945_send_cmd_async(struct iwl_priv *priv,
583 struct iwl_host_cmd *cmd)
584 {
585 int ret;
586
587 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
588
589 /* An asynchronous command can not expect an SKB to be set. */
590 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
591
592 /* An asynchronous command MUST have a callback. */
593 BUG_ON(!cmd->meta.u.callback);
594
595 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
596 return -EBUSY;
597
598 ret = iwl3945_enqueue_hcmd(priv, cmd);
599 if (ret < 0) {
600 IWL_ERR(priv,
601 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
602 get_cmd_string(cmd->id), ret);
603 return ret;
604 }
605 return 0;
606 }
607
608 static int iwl3945_send_cmd_sync(struct iwl_priv *priv,
609 struct iwl_host_cmd *cmd)
610 {
611 int cmd_idx;
612 int ret;
613
614 BUG_ON(cmd->meta.flags & CMD_ASYNC);
615
616 /* A synchronous command can not have a callback set. */
617 BUG_ON(cmd->meta.u.callback != NULL);
618
619 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
620 IWL_ERR(priv,
621 "Error sending %s: Already sending a host command\n",
622 get_cmd_string(cmd->id));
623 ret = -EBUSY;
624 goto out;
625 }
626
627 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
628
629 if (cmd->meta.flags & CMD_WANT_SKB)
630 cmd->meta.source = &cmd->meta;
631
632 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
633 if (cmd_idx < 0) {
634 ret = cmd_idx;
635 IWL_ERR(priv,
636 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
637 get_cmd_string(cmd->id), ret);
638 goto out;
639 }
640
641 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
642 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
643 HOST_COMPLETE_TIMEOUT);
644 if (!ret) {
645 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
646 IWL_ERR(priv, "Error sending %s: time out after %dms\n",
647 get_cmd_string(cmd->id),
648 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
649
650 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
651 ret = -ETIMEDOUT;
652 goto cancel;
653 }
654 }
655
656 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
657 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
658 get_cmd_string(cmd->id));
659 ret = -ECANCELED;
660 goto fail;
661 }
662 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
663 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
664 get_cmd_string(cmd->id));
665 ret = -EIO;
666 goto fail;
667 }
668 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
669 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
670 get_cmd_string(cmd->id));
671 ret = -EIO;
672 goto cancel;
673 }
674
675 ret = 0;
676 goto out;
677
678 cancel:
679 if (cmd->meta.flags & CMD_WANT_SKB) {
680 struct iwl_cmd *qcmd;
681
682 /* Cancel the CMD_WANT_SKB flag for the cmd in the
683 * TX cmd queue. Otherwise in case the cmd comes
684 * in later, it will possibly set an invalid
685 * address (cmd->meta.source). */
686 qcmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
687 qcmd->meta.flags &= ~CMD_WANT_SKB;
688 }
689 fail:
690 if (cmd->meta.u.skb) {
691 dev_kfree_skb_any(cmd->meta.u.skb);
692 cmd->meta.u.skb = NULL;
693 }
694 out:
695 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
696 return ret;
697 }
698
699 int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
700 {
701 if (cmd->meta.flags & CMD_ASYNC)
702 return iwl3945_send_cmd_async(priv, cmd);
703
704 return iwl3945_send_cmd_sync(priv, cmd);
705 }
706
707 int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
708 {
709 struct iwl_host_cmd cmd = {
710 .id = id,
711 .len = len,
712 .data = data,
713 };
714
715 return iwl3945_send_cmd_sync(priv, &cmd);
716 }
717
718 static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
719 {
720 struct iwl_host_cmd cmd = {
721 .id = id,
722 .len = sizeof(val),
723 .data = &val,
724 };
725
726 return iwl3945_send_cmd_sync(priv, &cmd);
727 }
728
729 int iwl3945_send_statistics_request(struct iwl_priv *priv)
730 {
731 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
732 }
733
734 /**
735 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
736 * @band: 2.4 or 5 GHz band
737 * @channel: Any channel valid for the requested band
738
739 * In addition to setting the staging RXON, priv->band is also set.
740 *
741 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
742 * in the staging RXON flag structure based on the band
743 */
744 static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
745 enum ieee80211_band band,
746 u16 channel)
747 {
748 if (!iwl3945_get_channel_info(priv, band, channel)) {
749 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
750 channel, band);
751 return -EINVAL;
752 }
753
754 if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
755 (priv->band == band))
756 return 0;
757
758 priv->staging39_rxon.channel = cpu_to_le16(channel);
759 if (band == IEEE80211_BAND_5GHZ)
760 priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
761 else
762 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
763
764 priv->band = band;
765
766 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
767
768 return 0;
769 }
770
771 /**
772 * iwl3945_check_rxon_cmd - validate RXON structure is valid
773 *
774 * NOTE: This is really only useful during development and can eventually
775 * be #ifdef'd out once the driver is stable and folks aren't actively
776 * making changes
777 */
778 static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
779 {
780 int error = 0;
781 int counter = 1;
782 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
783
784 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
785 error |= le32_to_cpu(rxon->flags &
786 (RXON_FLG_TGJ_NARROW_BAND_MSK |
787 RXON_FLG_RADAR_DETECT_MSK));
788 if (error)
789 IWL_WARN(priv, "check 24G fields %d | %d\n",
790 counter++, error);
791 } else {
792 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
793 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
794 if (error)
795 IWL_WARN(priv, "check 52 fields %d | %d\n",
796 counter++, error);
797 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
798 if (error)
799 IWL_WARN(priv, "check 52 CCK %d | %d\n",
800 counter++, error);
801 }
802 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
803 if (error)
804 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
805
806 /* make sure basic rates 6Mbps and 1Mbps are supported */
807 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
808 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
809 if (error)
810 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
811
812 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
813 if (error)
814 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
815
816 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
817 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
818 if (error)
819 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
820 counter++, error);
821
822 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
823 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
824 if (error)
825 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
826 counter++, error);
827
828 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
829 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
830 if (error)
831 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
832 counter++, error);
833
834 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
835 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
836 RXON_FLG_ANT_A_MSK)) == 0);
837 if (error)
838 IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
839
840 if (error)
841 IWL_WARN(priv, "Tuning to channel %d\n",
842 le16_to_cpu(rxon->channel));
843
844 if (error) {
845 IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
846 return -1;
847 }
848 return 0;
849 }
850
851 /**
852 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
853 * @priv: staging_rxon is compared to active_rxon
854 *
855 * If the RXON structure is changing enough to require a new tune,
856 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
857 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
858 */
859 static int iwl3945_full_rxon_required(struct iwl_priv *priv)
860 {
861
862 /* These items are only settable from the full RXON command */
863 if (!(iwl3945_is_associated(priv)) ||
864 compare_ether_addr(priv->staging39_rxon.bssid_addr,
865 priv->active39_rxon.bssid_addr) ||
866 compare_ether_addr(priv->staging39_rxon.node_addr,
867 priv->active39_rxon.node_addr) ||
868 compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
869 priv->active39_rxon.wlap_bssid_addr) ||
870 (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
871 (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
872 (priv->staging39_rxon.air_propagation !=
873 priv->active39_rxon.air_propagation) ||
874 (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
875 return 1;
876
877 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
878 * be updated with the RXON_ASSOC command -- however only some
879 * flag transitions are allowed using RXON_ASSOC */
880
881 /* Check if we are not switching bands */
882 if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
883 (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
884 return 1;
885
886 /* Check if we are switching association toggle */
887 if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
888 (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
889 return 1;
890
891 return 0;
892 }
893
894 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
895 {
896 int rc = 0;
897 struct iwl_rx_packet *res = NULL;
898 struct iwl3945_rxon_assoc_cmd rxon_assoc;
899 struct iwl_host_cmd cmd = {
900 .id = REPLY_RXON_ASSOC,
901 .len = sizeof(rxon_assoc),
902 .meta.flags = CMD_WANT_SKB,
903 .data = &rxon_assoc,
904 };
905 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
906 const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
907
908 if ((rxon1->flags == rxon2->flags) &&
909 (rxon1->filter_flags == rxon2->filter_flags) &&
910 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
911 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
912 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
913 return 0;
914 }
915
916 rxon_assoc.flags = priv->staging39_rxon.flags;
917 rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
918 rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
919 rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
920 rxon_assoc.reserved = 0;
921
922 rc = iwl3945_send_cmd_sync(priv, &cmd);
923 if (rc)
924 return rc;
925
926 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
927 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
928 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
929 rc = -EIO;
930 }
931
932 priv->alloc_rxb_skb--;
933 dev_kfree_skb_any(cmd.meta.u.skb);
934
935 return rc;
936 }
937
938 /**
939 * iwl3945_commit_rxon - commit staging_rxon to hardware
940 *
941 * The RXON command in staging_rxon is committed to the hardware and
942 * the active_rxon structure is updated with the new data. This
943 * function correctly transitions out of the RXON_ASSOC_MSK state if
944 * a HW tune is required based on the RXON structure changes.
945 */
946 static int iwl3945_commit_rxon(struct iwl_priv *priv)
947 {
948 /* cast away the const for active_rxon in this function */
949 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
950 int rc = 0;
951
952 if (!iwl3945_is_alive(priv))
953 return -1;
954
955 /* always get timestamp with Rx frame */
956 priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
957
958 /* select antenna */
959 priv->staging39_rxon.flags &=
960 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
961 priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
962
963 rc = iwl3945_check_rxon_cmd(priv);
964 if (rc) {
965 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
966 return -EINVAL;
967 }
968
969 /* If we don't need to send a full RXON, we can use
970 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
971 * and other flags for the current radio configuration. */
972 if (!iwl3945_full_rxon_required(priv)) {
973 rc = iwl3945_send_rxon_assoc(priv);
974 if (rc) {
975 IWL_ERR(priv, "Error setting RXON_ASSOC "
976 "configuration (%d).\n", rc);
977 return rc;
978 }
979
980 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
981
982 return 0;
983 }
984
985 /* If we are currently associated and the new config requires
986 * an RXON_ASSOC and the new config wants the associated mask enabled,
987 * we must clear the associated from the active configuration
988 * before we apply the new config */
989 if (iwl3945_is_associated(priv) &&
990 (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
991 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
992 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
993
994 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
995 sizeof(struct iwl3945_rxon_cmd),
996 &priv->active39_rxon);
997
998 /* If the mask clearing failed then we set
999 * active_rxon back to what it was previously */
1000 if (rc) {
1001 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1002 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
1003 "configuration (%d).\n", rc);
1004 return rc;
1005 }
1006 }
1007
1008 IWL_DEBUG_INFO("Sending RXON\n"
1009 "* with%s RXON_FILTER_ASSOC_MSK\n"
1010 "* channel = %d\n"
1011 "* bssid = %pM\n",
1012 ((priv->staging39_rxon.filter_flags &
1013 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1014 le16_to_cpu(priv->staging39_rxon.channel),
1015 priv->staging_rxon.bssid_addr);
1016
1017 /* Apply the new configuration */
1018 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1019 sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
1020 if (rc) {
1021 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
1022 return rc;
1023 }
1024
1025 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
1026
1027 iwl3945_clear_stations_table(priv);
1028
1029 /* If we issue a new RXON command which required a tune then we must
1030 * send a new TXPOWER command or we won't be able to Tx any frames */
1031 rc = iwl3945_hw_reg_send_txpower(priv);
1032 if (rc) {
1033 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
1034 return rc;
1035 }
1036
1037 /* Add the broadcast address so we can send broadcast frames */
1038 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
1039 IWL_INVALID_STATION) {
1040 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
1041 return -EIO;
1042 }
1043
1044 /* If we have set the ASSOC_MSK and we are in BSS mode then
1045 * add the IWL_AP_ID to the station rate table */
1046 if (iwl3945_is_associated(priv) &&
1047 (priv->iw_mode == NL80211_IFTYPE_STATION))
1048 if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
1049 == IWL_INVALID_STATION) {
1050 IWL_ERR(priv, "Error adding AP address for transmit\n");
1051 return -EIO;
1052 }
1053
1054 /* Init the hardware's rate fallback order based on the band */
1055 rc = iwl3945_init_hw_rate_table(priv);
1056 if (rc) {
1057 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
1058 return -EIO;
1059 }
1060
1061 return 0;
1062 }
1063
1064 static int iwl3945_send_bt_config(struct iwl_priv *priv)
1065 {
1066 struct iwl_bt_cmd bt_cmd = {
1067 .flags = 3,
1068 .lead_time = 0xAA,
1069 .max_kill = 1,
1070 .kill_ack_mask = 0,
1071 .kill_cts_mask = 0,
1072 };
1073
1074 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1075 sizeof(bt_cmd), &bt_cmd);
1076 }
1077
1078 static int iwl3945_send_scan_abort(struct iwl_priv *priv)
1079 {
1080 int rc = 0;
1081 struct iwl_rx_packet *res;
1082 struct iwl_host_cmd cmd = {
1083 .id = REPLY_SCAN_ABORT_CMD,
1084 .meta.flags = CMD_WANT_SKB,
1085 };
1086
1087 /* If there isn't a scan actively going on in the hardware
1088 * then we are in between scan bands and not actually
1089 * actively scanning, so don't send the abort command */
1090 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1091 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1092 return 0;
1093 }
1094
1095 rc = iwl3945_send_cmd_sync(priv, &cmd);
1096 if (rc) {
1097 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1098 return rc;
1099 }
1100
1101 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1102 if (res->u.status != CAN_ABORT_STATUS) {
1103 /* The scan abort will return 1 for success or
1104 * 2 for "failure". A failure condition can be
1105 * due to simply not being in an active scan which
1106 * can occur if we send the scan abort before we
1107 * the microcode has notified us that a scan is
1108 * completed. */
1109 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1110 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1111 clear_bit(STATUS_SCAN_HW, &priv->status);
1112 }
1113
1114 dev_kfree_skb_any(cmd.meta.u.skb);
1115
1116 return rc;
1117 }
1118
1119 static int iwl3945_card_state_sync_callback(struct iwl_priv *priv,
1120 struct iwl_cmd *cmd,
1121 struct sk_buff *skb)
1122 {
1123 return 1;
1124 }
1125
1126 /*
1127 * CARD_STATE_CMD
1128 *
1129 * Use: Sets the device's internal card state to enable, disable, or halt
1130 *
1131 * When in the 'enable' state the card operates as normal.
1132 * When in the 'disable' state, the card enters into a low power mode.
1133 * When in the 'halt' state, the card is shut down and must be fully
1134 * restarted to come back on.
1135 */
1136 static int iwl3945_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1137 {
1138 struct iwl_host_cmd cmd = {
1139 .id = REPLY_CARD_STATE_CMD,
1140 .len = sizeof(u32),
1141 .data = &flags,
1142 .meta.flags = meta_flag,
1143 };
1144
1145 if (meta_flag & CMD_ASYNC)
1146 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1147
1148 return iwl3945_send_cmd(priv, &cmd);
1149 }
1150
1151 static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
1152 struct iwl_cmd *cmd, struct sk_buff *skb)
1153 {
1154 struct iwl_rx_packet *res = NULL;
1155
1156 if (!skb) {
1157 IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
1158 return 1;
1159 }
1160
1161 res = (struct iwl_rx_packet *)skb->data;
1162 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1163 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1164 res->hdr.flags);
1165 return 1;
1166 }
1167
1168 switch (res->u.add_sta.status) {
1169 case ADD_STA_SUCCESS_MSK:
1170 break;
1171 default:
1172 break;
1173 }
1174
1175 /* We didn't cache the SKB; let the caller free it */
1176 return 1;
1177 }
1178
1179 int iwl3945_send_add_station(struct iwl_priv *priv,
1180 struct iwl3945_addsta_cmd *sta, u8 flags)
1181 {
1182 struct iwl_rx_packet *res = NULL;
1183 int rc = 0;
1184 struct iwl_host_cmd cmd = {
1185 .id = REPLY_ADD_STA,
1186 .len = sizeof(struct iwl3945_addsta_cmd),
1187 .meta.flags = flags,
1188 .data = sta,
1189 };
1190
1191 if (flags & CMD_ASYNC)
1192 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1193 else
1194 cmd.meta.flags |= CMD_WANT_SKB;
1195
1196 rc = iwl3945_send_cmd(priv, &cmd);
1197
1198 if (rc || (flags & CMD_ASYNC))
1199 return rc;
1200
1201 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1202 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1203 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1204 res->hdr.flags);
1205 rc = -EIO;
1206 }
1207
1208 if (rc == 0) {
1209 switch (res->u.add_sta.status) {
1210 case ADD_STA_SUCCESS_MSK:
1211 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1212 break;
1213 default:
1214 rc = -EIO;
1215 IWL_WARN(priv, "REPLY_ADD_STA failed\n");
1216 break;
1217 }
1218 }
1219
1220 priv->alloc_rxb_skb--;
1221 dev_kfree_skb_any(cmd.meta.u.skb);
1222
1223 return rc;
1224 }
1225
1226 static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
1227 struct ieee80211_key_conf *keyconf,
1228 u8 sta_id)
1229 {
1230 unsigned long flags;
1231 __le16 key_flags = 0;
1232
1233 switch (keyconf->alg) {
1234 case ALG_CCMP:
1235 key_flags |= STA_KEY_FLG_CCMP;
1236 key_flags |= cpu_to_le16(
1237 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1238 key_flags &= ~STA_KEY_FLG_INVALID;
1239 break;
1240 case ALG_TKIP:
1241 case ALG_WEP:
1242 default:
1243 return -EINVAL;
1244 }
1245 spin_lock_irqsave(&priv->sta_lock, flags);
1246 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
1247 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
1248 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
1249 keyconf->keylen);
1250
1251 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
1252 keyconf->keylen);
1253 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
1254 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1255 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1256
1257 spin_unlock_irqrestore(&priv->sta_lock, flags);
1258
1259 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1260 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1261 return 0;
1262 }
1263
1264 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
1265 {
1266 unsigned long flags;
1267
1268 spin_lock_irqsave(&priv->sta_lock, flags);
1269 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1270 memset(&priv->stations_39[sta_id].sta.key, 0,
1271 sizeof(struct iwl4965_keyinfo));
1272 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1273 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1274 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1275 spin_unlock_irqrestore(&priv->sta_lock, flags);
1276
1277 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1278 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1279 return 0;
1280 }
1281
1282 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
1283 {
1284 struct list_head *element;
1285
1286 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1287 priv->frames_count);
1288
1289 while (!list_empty(&priv->free_frames)) {
1290 element = priv->free_frames.next;
1291 list_del(element);
1292 kfree(list_entry(element, struct iwl3945_frame, list));
1293 priv->frames_count--;
1294 }
1295
1296 if (priv->frames_count) {
1297 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
1298 priv->frames_count);
1299 priv->frames_count = 0;
1300 }
1301 }
1302
1303 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
1304 {
1305 struct iwl3945_frame *frame;
1306 struct list_head *element;
1307 if (list_empty(&priv->free_frames)) {
1308 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1309 if (!frame) {
1310 IWL_ERR(priv, "Could not allocate frame!\n");
1311 return NULL;
1312 }
1313
1314 priv->frames_count++;
1315 return frame;
1316 }
1317
1318 element = priv->free_frames.next;
1319 list_del(element);
1320 return list_entry(element, struct iwl3945_frame, list);
1321 }
1322
1323 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
1324 {
1325 memset(frame, 0, sizeof(*frame));
1326 list_add(&frame->list, &priv->free_frames);
1327 }
1328
1329 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
1330 struct ieee80211_hdr *hdr,
1331 int left)
1332 {
1333
1334 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1335 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1336 (priv->iw_mode != NL80211_IFTYPE_AP)))
1337 return 0;
1338
1339 if (priv->ibss_beacon->len > left)
1340 return 0;
1341
1342 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1343
1344 return priv->ibss_beacon->len;
1345 }
1346
1347 static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
1348 {
1349 u8 i;
1350 int rate_mask;
1351
1352 /* Set rate mask*/
1353 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1354 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1355 else
1356 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1357
1358 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1359 i = iwl3945_rates[i].next_ieee) {
1360 if (rate_mask & (1 << i))
1361 return iwl3945_rates[i].plcp;
1362 }
1363
1364 /* No valid rate was found. Assign the lowest one */
1365 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1366 return IWL_RATE_1M_PLCP;
1367 else
1368 return IWL_RATE_6M_PLCP;
1369 }
1370
1371 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
1372 {
1373 struct iwl3945_frame *frame;
1374 unsigned int frame_size;
1375 int rc;
1376 u8 rate;
1377
1378 frame = iwl3945_get_free_frame(priv);
1379
1380 if (!frame) {
1381 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
1382 "command.\n");
1383 return -ENOMEM;
1384 }
1385
1386 rate = iwl3945_rate_get_lowest_plcp(priv);
1387
1388 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1389
1390 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1391 &frame->u.cmd[0]);
1392
1393 iwl3945_free_frame(priv, frame);
1394
1395 return rc;
1396 }
1397
1398 /******************************************************************************
1399 *
1400 * EEPROM related functions
1401 *
1402 ******************************************************************************/
1403
1404 static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
1405 {
1406 memcpy(mac, priv->eeprom39.mac_address, 6);
1407 }
1408
1409 /*
1410 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1411 * embedded controller) as EEPROM reader; each read is a series of pulses
1412 * to/from the EEPROM chip, not a single event, so even reads could conflict
1413 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1414 * simply claims ownership, which should be safe when this function is called
1415 * (i.e. before loading uCode!).
1416 */
1417 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
1418 {
1419 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1420 return 0;
1421 }
1422
1423 /**
1424 * iwl3945_eeprom_init - read EEPROM contents
1425 *
1426 * Load the EEPROM contents from adapter into priv->eeprom39
1427 *
1428 * NOTE: This routine uses the non-debug IO access functions.
1429 */
1430 int iwl3945_eeprom_init(struct iwl_priv *priv)
1431 {
1432 u16 *e = (u16 *)&priv->eeprom39;
1433 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
1434 int sz = sizeof(priv->eeprom39);
1435 int ret;
1436 u16 addr;
1437
1438 /* The EEPROM structure has several padding buffers within it
1439 * and when adding new EEPROM maps is subject to programmer errors
1440 * which may be very difficult to identify without explicitly
1441 * checking the resulting size of the eeprom map. */
1442 BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
1443
1444 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1445 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1446 return -ENOENT;
1447 }
1448
1449 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1450 ret = iwl3945_eeprom_acquire_semaphore(priv);
1451 if (ret < 0) {
1452 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
1453 return -ENOENT;
1454 }
1455
1456 /* eeprom is an array of 16bit values */
1457 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1458 u32 r;
1459
1460 _iwl_write32(priv, CSR_EEPROM_REG,
1461 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1462 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1463 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
1464 CSR_EEPROM_REG_READ_VALID_MSK,
1465 IWL_EEPROM_ACCESS_TIMEOUT);
1466 if (ret < 0) {
1467 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
1468 return ret;
1469 }
1470
1471 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
1472 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1473 }
1474
1475 return 0;
1476 }
1477
1478 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
1479 {
1480 if (priv->shared_virt)
1481 pci_free_consistent(priv->pci_dev,
1482 sizeof(struct iwl3945_shared),
1483 priv->shared_virt,
1484 priv->shared_phys);
1485 }
1486
1487 /**
1488 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1489 *
1490 * return : set the bit for each supported rate insert in ie
1491 */
1492 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1493 u16 basic_rate, int *left)
1494 {
1495 u16 ret_rates = 0, bit;
1496 int i;
1497 u8 *cnt = ie;
1498 u8 *rates = ie + 1;
1499
1500 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1501 if (bit & supported_rate) {
1502 ret_rates |= bit;
1503 rates[*cnt] = iwl3945_rates[i].ieee |
1504 ((bit & basic_rate) ? 0x80 : 0x00);
1505 (*cnt)++;
1506 (*left)--;
1507 if ((*left <= 0) ||
1508 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1509 break;
1510 }
1511 }
1512
1513 return ret_rates;
1514 }
1515
1516 /**
1517 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1518 */
1519 static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
1520 struct ieee80211_mgmt *frame,
1521 int left)
1522 {
1523 int len = 0;
1524 u8 *pos = NULL;
1525 u16 active_rates, ret_rates, cck_rates;
1526
1527 /* Make sure there is enough space for the probe request,
1528 * two mandatory IEs and the data */
1529 left -= 24;
1530 if (left < 0)
1531 return 0;
1532 len += 24;
1533
1534 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1535 memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
1536 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1537 memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
1538 frame->seq_ctrl = 0;
1539
1540 /* fill in our indirect SSID IE */
1541 /* ...next IE... */
1542
1543 left -= 2;
1544 if (left < 0)
1545 return 0;
1546 len += 2;
1547 pos = &(frame->u.probe_req.variable[0]);
1548 *pos++ = WLAN_EID_SSID;
1549 *pos++ = 0;
1550
1551 /* fill in supported rate */
1552 /* ...next IE... */
1553 left -= 2;
1554 if (left < 0)
1555 return 0;
1556
1557 /* ... fill it in... */
1558 *pos++ = WLAN_EID_SUPP_RATES;
1559 *pos = 0;
1560
1561 priv->active_rate = priv->rates_mask;
1562 active_rates = priv->active_rate;
1563 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1564
1565 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1566 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1567 priv->active_rate_basic, &left);
1568 active_rates &= ~ret_rates;
1569
1570 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1571 priv->active_rate_basic, &left);
1572 active_rates &= ~ret_rates;
1573
1574 len += 2 + *pos;
1575 pos += (*pos) + 1;
1576 if (active_rates == 0)
1577 goto fill_end;
1578
1579 /* fill in supported extended rate */
1580 /* ...next IE... */
1581 left -= 2;
1582 if (left < 0)
1583 return 0;
1584 /* ... fill it in... */
1585 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1586 *pos = 0;
1587 iwl3945_supported_rate_to_ie(pos, active_rates,
1588 priv->active_rate_basic, &left);
1589 if (*pos > 0)
1590 len += 2 + *pos;
1591
1592 fill_end:
1593 return (u16)len;
1594 }
1595
1596 /*
1597 * QoS support
1598 */
1599 static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
1600 struct iwl_qosparam_cmd *qos)
1601 {
1602
1603 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1604 sizeof(struct iwl_qosparam_cmd), qos);
1605 }
1606
1607 static void iwl3945_reset_qos(struct iwl_priv *priv)
1608 {
1609 u16 cw_min = 15;
1610 u16 cw_max = 1023;
1611 u8 aifs = 2;
1612 u8 is_legacy = 0;
1613 unsigned long flags;
1614 int i;
1615
1616 spin_lock_irqsave(&priv->lock, flags);
1617 priv->qos_data.qos_active = 0;
1618
1619 /* QoS always active in AP and ADHOC mode
1620 * In STA mode wait for association
1621 */
1622 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1623 priv->iw_mode == NL80211_IFTYPE_AP)
1624 priv->qos_data.qos_active = 1;
1625 else
1626 priv->qos_data.qos_active = 0;
1627
1628
1629 /* check for legacy mode */
1630 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1631 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
1632 (priv->iw_mode == NL80211_IFTYPE_STATION &&
1633 (priv->staging39_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
1634 cw_min = 31;
1635 is_legacy = 1;
1636 }
1637
1638 if (priv->qos_data.qos_active)
1639 aifs = 3;
1640
1641 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1642 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1643 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1644 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1645 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1646
1647 if (priv->qos_data.qos_active) {
1648 i = 1;
1649 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1650 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1651 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1652 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1653 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1654
1655 i = 2;
1656 priv->qos_data.def_qos_parm.ac[i].cw_min =
1657 cpu_to_le16((cw_min + 1) / 2 - 1);
1658 priv->qos_data.def_qos_parm.ac[i].cw_max =
1659 cpu_to_le16(cw_max);
1660 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1661 if (is_legacy)
1662 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1663 cpu_to_le16(6016);
1664 else
1665 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1666 cpu_to_le16(3008);
1667 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1668
1669 i = 3;
1670 priv->qos_data.def_qos_parm.ac[i].cw_min =
1671 cpu_to_le16((cw_min + 1) / 4 - 1);
1672 priv->qos_data.def_qos_parm.ac[i].cw_max =
1673 cpu_to_le16((cw_max + 1) / 2 - 1);
1674 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1675 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1676 if (is_legacy)
1677 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1678 cpu_to_le16(3264);
1679 else
1680 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1681 cpu_to_le16(1504);
1682 } else {
1683 for (i = 1; i < 4; i++) {
1684 priv->qos_data.def_qos_parm.ac[i].cw_min =
1685 cpu_to_le16(cw_min);
1686 priv->qos_data.def_qos_parm.ac[i].cw_max =
1687 cpu_to_le16(cw_max);
1688 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1689 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1690 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1691 }
1692 }
1693 IWL_DEBUG_QOS("set QoS to default \n");
1694
1695 spin_unlock_irqrestore(&priv->lock, flags);
1696 }
1697
1698 static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
1699 {
1700 unsigned long flags;
1701
1702 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1703 return;
1704
1705 spin_lock_irqsave(&priv->lock, flags);
1706 priv->qos_data.def_qos_parm.qos_flags = 0;
1707
1708 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1709 !priv->qos_data.qos_cap.q_AP.txop_request)
1710 priv->qos_data.def_qos_parm.qos_flags |=
1711 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1712
1713 if (priv->qos_data.qos_active)
1714 priv->qos_data.def_qos_parm.qos_flags |=
1715 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1716
1717 spin_unlock_irqrestore(&priv->lock, flags);
1718
1719 if (force || iwl3945_is_associated(priv)) {
1720 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1721 priv->qos_data.qos_active);
1722
1723 iwl3945_send_qos_params_command(priv,
1724 &(priv->qos_data.def_qos_parm));
1725 }
1726 }
1727
1728 /*
1729 * Power management (not Tx power!) functions
1730 */
1731 #define MSEC_TO_USEC 1024
1732
1733
1734 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1735 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1736 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1737 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1738 __constant_cpu_to_le32(X1), \
1739 __constant_cpu_to_le32(X2), \
1740 __constant_cpu_to_le32(X3), \
1741 __constant_cpu_to_le32(X4)}
1742
1743 /* default power management (not Tx power) table values */
1744 /* for TIM 0-10 */
1745 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1746 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1747 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1748 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1749 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1750 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1751 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1752 };
1753
1754 /* for TIM > 10 */
1755 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1756 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1757 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1758 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1759 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1760 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1761 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1762 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1763 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1764 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1765 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1766 };
1767
1768 int iwl3945_power_init_handle(struct iwl_priv *priv)
1769 {
1770 int rc = 0, i;
1771 struct iwl3945_power_mgr *pow_data;
1772 int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1773 u16 pci_pm;
1774
1775 IWL_DEBUG_POWER("Initialize power \n");
1776
1777 pow_data = &(priv->power_data_39);
1778
1779 memset(pow_data, 0, sizeof(*pow_data));
1780
1781 pow_data->active_index = IWL_POWER_RANGE_0;
1782 pow_data->dtim_val = 0xffff;
1783
1784 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1785 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1786
1787 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1788 if (rc != 0)
1789 return 0;
1790 else {
1791 struct iwl_powertable_cmd *cmd;
1792
1793 IWL_DEBUG_POWER("adjust power command flags\n");
1794
1795 for (i = 0; i < IWL39_POWER_AC; i++) {
1796 cmd = &pow_data->pwr_range_0[i].cmd;
1797
1798 if (pci_pm & 0x1)
1799 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1800 else
1801 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1802 }
1803 }
1804 return rc;
1805 }
1806
1807 static int iwl3945_update_power_cmd(struct iwl_priv *priv,
1808 struct iwl_powertable_cmd *cmd, u32 mode)
1809 {
1810 int rc = 0, i;
1811 u8 skip;
1812 u32 max_sleep = 0;
1813 struct iwl_power_vec_entry *range;
1814 u8 period = 0;
1815 struct iwl3945_power_mgr *pow_data;
1816
1817 if (mode > IWL_POWER_INDEX_5) {
1818 IWL_DEBUG_POWER("Error invalid power mode \n");
1819 return -1;
1820 }
1821 pow_data = &(priv->power_data_39);
1822
1823 if (pow_data->active_index == IWL_POWER_RANGE_0)
1824 range = &pow_data->pwr_range_0[0];
1825 else
1826 range = &pow_data->pwr_range_1[1];
1827
1828 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1829
1830 #ifdef IWL_MAC80211_DISABLE
1831 if (priv->assoc_network != NULL) {
1832 unsigned long flags;
1833
1834 period = priv->assoc_network->tim.tim_period;
1835 }
1836 #endif /*IWL_MAC80211_DISABLE */
1837 skip = range[mode].no_dtim;
1838
1839 if (period == 0) {
1840 period = 1;
1841 skip = 0;
1842 }
1843
1844 if (skip == 0) {
1845 max_sleep = period;
1846 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1847 } else {
1848 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1849 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1850 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1851 }
1852
1853 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1854 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1855 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1856 }
1857
1858 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1859 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1860 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1861 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1862 le32_to_cpu(cmd->sleep_interval[0]),
1863 le32_to_cpu(cmd->sleep_interval[1]),
1864 le32_to_cpu(cmd->sleep_interval[2]),
1865 le32_to_cpu(cmd->sleep_interval[3]),
1866 le32_to_cpu(cmd->sleep_interval[4]));
1867
1868 return rc;
1869 }
1870
1871 static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
1872 {
1873 u32 uninitialized_var(final_mode);
1874 int rc;
1875 struct iwl_powertable_cmd cmd;
1876
1877 /* If on battery, set to 3,
1878 * if plugged into AC power, set to CAM ("continuously aware mode"),
1879 * else user level */
1880 switch (mode) {
1881 case IWL39_POWER_BATTERY:
1882 final_mode = IWL_POWER_INDEX_3;
1883 break;
1884 case IWL39_POWER_AC:
1885 final_mode = IWL_POWER_MODE_CAM;
1886 break;
1887 default:
1888 final_mode = mode;
1889 break;
1890 }
1891
1892 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1893
1894 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1895 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1896 sizeof(struct iwl3945_powertable_cmd), &cmd);
1897
1898 if (final_mode == IWL_POWER_MODE_CAM)
1899 clear_bit(STATUS_POWER_PMI, &priv->status);
1900 else
1901 set_bit(STATUS_POWER_PMI, &priv->status);
1902
1903 return rc;
1904 }
1905
1906 /**
1907 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1908 *
1909 * NOTE: priv->mutex is not required before calling this function
1910 */
1911 static int iwl3945_scan_cancel(struct iwl_priv *priv)
1912 {
1913 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1914 clear_bit(STATUS_SCANNING, &priv->status);
1915 return 0;
1916 }
1917
1918 if (test_bit(STATUS_SCANNING, &priv->status)) {
1919 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1920 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1921 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1922 queue_work(priv->workqueue, &priv->abort_scan);
1923
1924 } else
1925 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1926
1927 return test_bit(STATUS_SCANNING, &priv->status);
1928 }
1929
1930 return 0;
1931 }
1932
1933 /**
1934 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
1935 * @ms: amount of time to wait (in milliseconds) for scan to abort
1936 *
1937 * NOTE: priv->mutex must be held before calling this function
1938 */
1939 static int iwl3945_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
1940 {
1941 unsigned long now = jiffies;
1942 int ret;
1943
1944 ret = iwl3945_scan_cancel(priv);
1945 if (ret && ms) {
1946 mutex_unlock(&priv->mutex);
1947 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1948 test_bit(STATUS_SCANNING, &priv->status))
1949 msleep(1);
1950 mutex_lock(&priv->mutex);
1951
1952 return test_bit(STATUS_SCANNING, &priv->status);
1953 }
1954
1955 return ret;
1956 }
1957
1958 #define MAX_UCODE_BEACON_INTERVAL 1024
1959 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1960
1961 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
1962 {
1963 u16 new_val = 0;
1964 u16 beacon_factor = 0;
1965
1966 beacon_factor =
1967 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1968 / MAX_UCODE_BEACON_INTERVAL;
1969 new_val = beacon_val / beacon_factor;
1970
1971 return cpu_to_le16(new_val);
1972 }
1973
1974 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
1975 {
1976 u64 interval_tm_unit;
1977 u64 tsf, result;
1978 unsigned long flags;
1979 struct ieee80211_conf *conf = NULL;
1980 u16 beacon_int = 0;
1981
1982 conf = ieee80211_get_hw_conf(priv->hw);
1983
1984 spin_lock_irqsave(&priv->lock, flags);
1985 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
1986 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1987
1988 tsf = priv->timestamp;
1989
1990 beacon_int = priv->beacon_int;
1991 spin_unlock_irqrestore(&priv->lock, flags);
1992
1993 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
1994 if (beacon_int == 0) {
1995 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1996 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1997 } else {
1998 priv->rxon_timing.beacon_interval =
1999 cpu_to_le16(beacon_int);
2000 priv->rxon_timing.beacon_interval =
2001 iwl3945_adjust_beacon_interval(
2002 le16_to_cpu(priv->rxon_timing.beacon_interval));
2003 }
2004
2005 priv->rxon_timing.atim_window = 0;
2006 } else {
2007 priv->rxon_timing.beacon_interval =
2008 iwl3945_adjust_beacon_interval(conf->beacon_int);
2009 /* TODO: we need to get atim_window from upper stack
2010 * for now we set to 0 */
2011 priv->rxon_timing.atim_window = 0;
2012 }
2013
2014 interval_tm_unit =
2015 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2016 result = do_div(tsf, interval_tm_unit);
2017 priv->rxon_timing.beacon_init_val =
2018 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2019
2020 IWL_DEBUG_ASSOC
2021 ("beacon interval %d beacon timer %d beacon tim %d\n",
2022 le16_to_cpu(priv->rxon_timing.beacon_interval),
2023 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2024 le16_to_cpu(priv->rxon_timing.atim_window));
2025 }
2026
2027 static int iwl3945_scan_initiate(struct iwl_priv *priv)
2028 {
2029 if (!iwl3945_is_ready_rf(priv)) {
2030 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2031 return -EIO;
2032 }
2033
2034 if (test_bit(STATUS_SCANNING, &priv->status)) {
2035 IWL_DEBUG_SCAN("Scan already in progress.\n");
2036 return -EAGAIN;
2037 }
2038
2039 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2040 IWL_DEBUG_SCAN("Scan request while abort pending. "
2041 "Queuing.\n");
2042 return -EAGAIN;
2043 }
2044
2045 IWL_DEBUG_INFO("Starting scan...\n");
2046 if (priv->cfg->sku & IWL_SKU_G)
2047 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2048 if (priv->cfg->sku & IWL_SKU_A)
2049 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2050 set_bit(STATUS_SCANNING, &priv->status);
2051 priv->scan_start = jiffies;
2052 priv->scan_pass_start = priv->scan_start;
2053
2054 queue_work(priv->workqueue, &priv->request_scan);
2055
2056 return 0;
2057 }
2058
2059 static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
2060 {
2061 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
2062
2063 if (hw_decrypt)
2064 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2065 else
2066 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2067
2068 return 0;
2069 }
2070
2071 static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
2072 enum ieee80211_band band)
2073 {
2074 if (band == IEEE80211_BAND_5GHZ) {
2075 priv->staging39_rxon.flags &=
2076 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2077 | RXON_FLG_CCK_MSK);
2078 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2079 } else {
2080 /* Copied from iwl3945_bg_post_associate() */
2081 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2082 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2083 else
2084 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2085
2086 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2087 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2088
2089 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2090 priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2091 priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
2092 }
2093 }
2094
2095 /*
2096 * initialize rxon structure with default values from eeprom
2097 */
2098 static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
2099 int mode)
2100 {
2101 const struct iwl_channel_info *ch_info;
2102
2103 memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
2104
2105 switch (mode) {
2106 case NL80211_IFTYPE_AP:
2107 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
2108 break;
2109
2110 case NL80211_IFTYPE_STATION:
2111 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
2112 priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2113 break;
2114
2115 case NL80211_IFTYPE_ADHOC:
2116 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2117 priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2118 priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2119 RXON_FILTER_ACCEPT_GRP_MSK;
2120 break;
2121
2122 case NL80211_IFTYPE_MONITOR:
2123 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2124 priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2125 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2126 break;
2127 default:
2128 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
2129 break;
2130 }
2131
2132 #if 0
2133 /* TODO: Figure out when short_preamble would be set and cache from
2134 * that */
2135 if (!hw_to_local(priv->hw)->short_preamble)
2136 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2137 else
2138 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2139 #endif
2140
2141 ch_info = iwl3945_get_channel_info(priv, priv->band,
2142 le16_to_cpu(priv->active39_rxon.channel));
2143
2144 if (!ch_info)
2145 ch_info = &priv->channel_info[0];
2146
2147 /*
2148 * in some case A channels are all non IBSS
2149 * in this case force B/G channel
2150 */
2151 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2152 ch_info = &priv->channel_info[0];
2153
2154 priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
2155 if (is_channel_a_band(ch_info))
2156 priv->band = IEEE80211_BAND_5GHZ;
2157 else
2158 priv->band = IEEE80211_BAND_2GHZ;
2159
2160 iwl3945_set_flags_for_phymode(priv, priv->band);
2161
2162 priv->staging39_rxon.ofdm_basic_rates =
2163 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2164 priv->staging39_rxon.cck_basic_rates =
2165 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2166 }
2167
2168 static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
2169 {
2170 if (mode == NL80211_IFTYPE_ADHOC) {
2171 const struct iwl_channel_info *ch_info;
2172
2173 ch_info = iwl3945_get_channel_info(priv,
2174 priv->band,
2175 le16_to_cpu(priv->staging39_rxon.channel));
2176
2177 if (!ch_info || !is_channel_ibss(ch_info)) {
2178 IWL_ERR(priv, "channel %d not IBSS channel\n",
2179 le16_to_cpu(priv->staging39_rxon.channel));
2180 return -EINVAL;
2181 }
2182 }
2183
2184 iwl3945_connection_init_rx_config(priv, mode);
2185 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2186
2187 iwl3945_clear_stations_table(priv);
2188
2189 /* don't commit rxon if rf-kill is on*/
2190 if (!iwl3945_is_ready_rf(priv))
2191 return -EAGAIN;
2192
2193 cancel_delayed_work(&priv->scan_check);
2194 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2195 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2196 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2197 return -EAGAIN;
2198 }
2199
2200 iwl3945_commit_rxon(priv);
2201
2202 return 0;
2203 }
2204
2205 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
2206 struct ieee80211_tx_info *info,
2207 struct iwl_cmd *cmd,
2208 struct sk_buff *skb_frag,
2209 int last_frag)
2210 {
2211 struct iwl3945_hw_key *keyinfo =
2212 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
2213
2214 switch (keyinfo->alg) {
2215 case ALG_CCMP:
2216 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2217 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2218 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2219 break;
2220
2221 case ALG_TKIP:
2222 #if 0
2223 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2224
2225 if (last_frag)
2226 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2227 8);
2228 else
2229 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2230 #endif
2231 break;
2232
2233 case ALG_WEP:
2234 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2235 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2236
2237 if (keyinfo->keylen == 13)
2238 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2239
2240 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2241
2242 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2243 "with key %d\n", info->control.hw_key->hw_key_idx);
2244 break;
2245
2246 default:
2247 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
2248 break;
2249 }
2250 }
2251
2252 /*
2253 * handle build REPLY_TX command notification.
2254 */
2255 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
2256 struct iwl_cmd *cmd,
2257 struct ieee80211_tx_info *info,
2258 struct ieee80211_hdr *hdr,
2259 int is_unicast, u8 std_id)
2260 {
2261 __le16 fc = hdr->frame_control;
2262 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2263 u8 rc_flags = info->control.rates[0].flags;
2264
2265 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2266 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2267 tx_flags |= TX_CMD_FLG_ACK_MSK;
2268 if (ieee80211_is_mgmt(fc))
2269 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2270 if (ieee80211_is_probe_resp(fc) &&
2271 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2272 tx_flags |= TX_CMD_FLG_TSF_MSK;
2273 } else {
2274 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2275 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2276 }
2277
2278 cmd->cmd.tx.sta_id = std_id;
2279 if (ieee80211_has_morefrags(fc))
2280 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2281
2282 if (ieee80211_is_data_qos(fc)) {
2283 u8 *qc = ieee80211_get_qos_ctl(hdr);
2284 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2285 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2286 } else {
2287 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2288 }
2289
2290 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2291 tx_flags |= TX_CMD_FLG_RTS_MSK;
2292 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2293 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2294 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2295 tx_flags |= TX_CMD_FLG_CTS_MSK;
2296 }
2297
2298 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2299 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2300
2301 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2302 if (ieee80211_is_mgmt(fc)) {
2303 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2304 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2305 else
2306 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2307 } else {
2308 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2309 #ifdef CONFIG_IWL3945_LEDS
2310 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2311 #endif
2312 }
2313
2314 cmd->cmd.tx.driver_txop = 0;
2315 cmd->cmd.tx.tx_flags = tx_flags;
2316 cmd->cmd.tx.next_frame_len = 0;
2317 }
2318
2319 /**
2320 * iwl3945_get_sta_id - Find station's index within station table
2321 */
2322 static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2323 {
2324 int sta_id;
2325 u16 fc = le16_to_cpu(hdr->frame_control);
2326
2327 /* If this frame is broadcast or management, use broadcast station id */
2328 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2329 is_multicast_ether_addr(hdr->addr1))
2330 return priv->hw_params.bcast_sta_id;
2331
2332 switch (priv->iw_mode) {
2333
2334 /* If we are a client station in a BSS network, use the special
2335 * AP station entry (that's the only station we communicate with) */
2336 case NL80211_IFTYPE_STATION:
2337 return IWL_AP_ID;
2338
2339 /* If we are an AP, then find the station, or use BCAST */
2340 case NL80211_IFTYPE_AP:
2341 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2342 if (sta_id != IWL_INVALID_STATION)
2343 return sta_id;
2344 return priv->hw_params.bcast_sta_id;
2345
2346 /* If this frame is going out to an IBSS network, find the station,
2347 * or create a new station table entry */
2348 case NL80211_IFTYPE_ADHOC: {
2349 /* Create new station table entry */
2350 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2351 if (sta_id != IWL_INVALID_STATION)
2352 return sta_id;
2353
2354 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2355
2356 if (sta_id != IWL_INVALID_STATION)
2357 return sta_id;
2358
2359 IWL_DEBUG_DROP("Station %pM not in station map. "
2360 "Defaulting to broadcast...\n",
2361 hdr->addr1);
2362 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2363 return priv->hw_params.bcast_sta_id;
2364 }
2365 /* If we are in monitor mode, use BCAST. This is required for
2366 * packet injection. */
2367 case NL80211_IFTYPE_MONITOR:
2368 return priv->hw_params.bcast_sta_id;
2369
2370 default:
2371 IWL_WARN(priv, "Unknown mode of operation: %d\n",
2372 priv->iw_mode);
2373 return priv->hw_params.bcast_sta_id;
2374 }
2375 }
2376
2377 /*
2378 * start REPLY_TX command process
2379 */
2380 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
2381 {
2382 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2383 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2384 struct iwl3945_tfd_frame *tfd;
2385 u32 *control_flags;
2386 int txq_id = skb_get_queue_mapping(skb);
2387 struct iwl3945_tx_queue *txq = NULL;
2388 struct iwl_queue *q = NULL;
2389 dma_addr_t phys_addr;
2390 dma_addr_t txcmd_phys;
2391 struct iwl_cmd *out_cmd = NULL;
2392 u16 len, idx, len_org, hdr_len;
2393 u8 id;
2394 u8 unicast;
2395 u8 sta_id;
2396 u8 tid = 0;
2397 u16 seq_number = 0;
2398 __le16 fc;
2399 u8 wait_write_ptr = 0;
2400 u8 *qc = NULL;
2401 unsigned long flags;
2402 int rc;
2403
2404 spin_lock_irqsave(&priv->lock, flags);
2405 if (iwl3945_is_rfkill(priv)) {
2406 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2407 goto drop_unlock;
2408 }
2409
2410 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2411 IWL_ERR(priv, "ERROR: No TX rate available.\n");
2412 goto drop_unlock;
2413 }
2414
2415 unicast = !is_multicast_ether_addr(hdr->addr1);
2416 id = 0;
2417
2418 fc = hdr->frame_control;
2419
2420 #ifdef CONFIG_IWL3945_DEBUG
2421 if (ieee80211_is_auth(fc))
2422 IWL_DEBUG_TX("Sending AUTH frame\n");
2423 else if (ieee80211_is_assoc_req(fc))
2424 IWL_DEBUG_TX("Sending ASSOC frame\n");
2425 else if (ieee80211_is_reassoc_req(fc))
2426 IWL_DEBUG_TX("Sending REASSOC frame\n");
2427 #endif
2428
2429 /* drop all data frame if we are not associated */
2430 if (ieee80211_is_data(fc) &&
2431 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2432 (!iwl3945_is_associated(priv) ||
2433 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2434 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2435 goto drop_unlock;
2436 }
2437
2438 spin_unlock_irqrestore(&priv->lock, flags);
2439
2440 hdr_len = ieee80211_hdrlen(fc);
2441
2442 /* Find (or create) index into station table for destination station */
2443 sta_id = iwl3945_get_sta_id(priv, hdr);
2444 if (sta_id == IWL_INVALID_STATION) {
2445 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2446 hdr->addr1);
2447 goto drop;
2448 }
2449
2450 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2451
2452 if (ieee80211_is_data_qos(fc)) {
2453 qc = ieee80211_get_qos_ctl(hdr);
2454 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2455 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
2456 IEEE80211_SCTL_SEQ;
2457 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2458 (hdr->seq_ctrl &
2459 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2460 seq_number += 0x10;
2461 }
2462
2463 /* Descriptor for chosen Tx queue */
2464 txq = &priv->txq39[txq_id];
2465 q = &txq->q;
2466
2467 spin_lock_irqsave(&priv->lock, flags);
2468
2469 /* Set up first empty TFD within this queue's circular TFD buffer */
2470 tfd = &txq->bd[q->write_ptr];
2471 memset(tfd, 0, sizeof(*tfd));
2472 control_flags = (u32 *) tfd;
2473 idx = get_cmd_index(q, q->write_ptr, 0);
2474
2475 /* Set up driver data for this TFD */
2476 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2477 txq->txb[q->write_ptr].skb[0] = skb;
2478
2479 /* Init first empty entry in queue's array of Tx/cmd buffers */
2480 out_cmd = &txq->cmd[idx];
2481 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2482 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2483
2484 /*
2485 * Set up the Tx-command (not MAC!) header.
2486 * Store the chosen Tx queue and TFD index within the sequence field;
2487 * after Tx, uCode's Tx response will return this value so driver can
2488 * locate the frame within the tx queue and do post-tx processing.
2489 */
2490 out_cmd->hdr.cmd = REPLY_TX;
2491 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2492 INDEX_TO_SEQ(q->write_ptr)));
2493
2494 /* Copy MAC header from skb into command buffer */
2495 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2496
2497 /*
2498 * Use the first empty entry in this queue's command buffer array
2499 * to contain the Tx command and MAC header concatenated together
2500 * (payload data will be in another buffer).
2501 * Size of this varies, due to varying MAC header length.
2502 * If end is not dword aligned, we'll have 2 extra bytes at the end
2503 * of the MAC header (device reads on dword boundaries).
2504 * We'll tell device about this padding later.
2505 */
2506 len = sizeof(struct iwl3945_tx_cmd) +
2507 sizeof(struct iwl_cmd_header) + hdr_len;
2508
2509 len_org = len;
2510 len = (len + 3) & ~3;
2511
2512 if (len_org != len)
2513 len_org = 1;
2514 else
2515 len_org = 0;
2516
2517 /* Physical address of this Tx command's header (not MAC header!),
2518 * within command buffer array. */
2519 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2520 offsetof(struct iwl_cmd, hdr);
2521
2522 /* Add buffer containing Tx command and MAC(!) header to TFD's
2523 * first entry */
2524 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2525
2526 if (info->control.hw_key)
2527 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2528
2529 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2530 * if any (802.11 null frames have no payload). */
2531 len = skb->len - hdr_len;
2532 if (len) {
2533 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2534 len, PCI_DMA_TODEVICE);
2535 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2536 }
2537
2538 if (!len)
2539 /* If there is no payload, then we use only one Tx buffer */
2540 *control_flags = TFD_CTL_COUNT_SET(1);
2541 else
2542 /* Else use 2 buffers.
2543 * Tell 3945 about any padding after MAC header */
2544 *control_flags = TFD_CTL_COUNT_SET(2) |
2545 TFD_CTL_PAD_SET(U32_PAD(len));
2546
2547 /* Total # bytes to be transmitted */
2548 len = (u16)skb->len;
2549 out_cmd->cmd.tx.len = cpu_to_le16(len);
2550
2551 /* TODO need this for burst mode later on */
2552 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2553
2554 /* set is_hcca to 0; it probably will never be implemented */
2555 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2556
2557 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2558 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2559
2560 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2561 txq->need_update = 1;
2562 if (qc)
2563 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
2564 } else {
2565 wait_write_ptr = 1;
2566 txq->need_update = 0;
2567 }
2568
2569 iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload,
2570 sizeof(out_cmd->cmd.tx));
2571
2572 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2573 ieee80211_hdrlen(fc));
2574
2575 /* Tell device the write index *just past* this latest filled TFD */
2576 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2577 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2578 spin_unlock_irqrestore(&priv->lock, flags);
2579
2580 if (rc)
2581 return rc;
2582
2583 if ((iwl_queue_space(q) < q->high_mark)
2584 && priv->mac80211_registered) {
2585 if (wait_write_ptr) {
2586 spin_lock_irqsave(&priv->lock, flags);
2587 txq->need_update = 1;
2588 iwl3945_tx_queue_update_write_ptr(priv, txq);
2589 spin_unlock_irqrestore(&priv->lock, flags);
2590 }
2591
2592 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2593 }
2594
2595 return 0;
2596
2597 drop_unlock:
2598 spin_unlock_irqrestore(&priv->lock, flags);
2599 drop:
2600 return -1;
2601 }
2602
2603 static void iwl3945_set_rate(struct iwl_priv *priv)
2604 {
2605 const struct ieee80211_supported_band *sband = NULL;
2606 struct ieee80211_rate *rate;
2607 int i;
2608
2609 sband = iwl3945_get_band(priv, priv->band);
2610 if (!sband) {
2611 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
2612 return;
2613 }
2614
2615 priv->active_rate = 0;
2616 priv->active_rate_basic = 0;
2617
2618 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2619 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2620
2621 for (i = 0; i < sband->n_bitrates; i++) {
2622 rate = &sband->bitrates[i];
2623 if ((rate->hw_value < IWL_RATE_COUNT) &&
2624 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2625 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2626 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2627 priv->active_rate |= (1 << rate->hw_value);
2628 }
2629 }
2630
2631 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2632 priv->active_rate, priv->active_rate_basic);
2633
2634 /*
2635 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2636 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2637 * OFDM
2638 */
2639 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2640 priv->staging39_rxon.cck_basic_rates =
2641 ((priv->active_rate_basic &
2642 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2643 else
2644 priv->staging39_rxon.cck_basic_rates =
2645 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2646
2647 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2648 priv->staging39_rxon.ofdm_basic_rates =
2649 ((priv->active_rate_basic &
2650 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2651 IWL_FIRST_OFDM_RATE) & 0xFF;
2652 else
2653 priv->staging39_rxon.ofdm_basic_rates =
2654 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2655 }
2656
2657 static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2658 {
2659 unsigned long flags;
2660
2661 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2662 return;
2663
2664 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2665 disable_radio ? "OFF" : "ON");
2666
2667 if (disable_radio) {
2668 iwl3945_scan_cancel(priv);
2669 /* FIXME: This is a workaround for AP */
2670 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2671 spin_lock_irqsave(&priv->lock, flags);
2672 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2673 CSR_UCODE_SW_BIT_RFKILL);
2674 spin_unlock_irqrestore(&priv->lock, flags);
2675 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2676 set_bit(STATUS_RF_KILL_SW, &priv->status);
2677 }
2678 return;
2679 }
2680
2681 spin_lock_irqsave(&priv->lock, flags);
2682 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2683
2684 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2685 spin_unlock_irqrestore(&priv->lock, flags);
2686
2687 /* wake up ucode */
2688 msleep(10);
2689
2690 spin_lock_irqsave(&priv->lock, flags);
2691 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2692 if (!iwl_grab_nic_access(priv))
2693 iwl_release_nic_access(priv);
2694 spin_unlock_irqrestore(&priv->lock, flags);
2695
2696 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2697 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2698 "disabled by HW switch\n");
2699 return;
2700 }
2701
2702 if (priv->is_open)
2703 queue_work(priv->workqueue, &priv->restart);
2704 return;
2705 }
2706
2707 void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
2708 u32 decrypt_res, struct ieee80211_rx_status *stats)
2709 {
2710 u16 fc =
2711 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2712
2713 if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2714 return;
2715
2716 if (!(fc & IEEE80211_FCTL_PROTECTED))
2717 return;
2718
2719 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2720 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2721 case RX_RES_STATUS_SEC_TYPE_TKIP:
2722 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2723 RX_RES_STATUS_BAD_ICV_MIC)
2724 stats->flag |= RX_FLAG_MMIC_ERROR;
2725 case RX_RES_STATUS_SEC_TYPE_WEP:
2726 case RX_RES_STATUS_SEC_TYPE_CCMP:
2727 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2728 RX_RES_STATUS_DECRYPT_OK) {
2729 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2730 stats->flag |= RX_FLAG_DECRYPTED;
2731 }
2732 break;
2733
2734 default:
2735 break;
2736 }
2737 }
2738
2739 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2740
2741 #include "iwl-spectrum.h"
2742
2743 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2744 #define BEACON_TIME_MASK_HIGH 0xFF000000
2745 #define TIME_UNIT 1024
2746
2747 /*
2748 * extended beacon time format
2749 * time in usec will be changed into a 32-bit value in 8:24 format
2750 * the high 1 byte is the beacon counts
2751 * the lower 3 bytes is the time in usec within one beacon interval
2752 */
2753
2754 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2755 {
2756 u32 quot;
2757 u32 rem;
2758 u32 interval = beacon_interval * 1024;
2759
2760 if (!interval || !usec)
2761 return 0;
2762
2763 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2764 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2765
2766 return (quot << 24) + rem;
2767 }
2768
2769 /* base is usually what we get from ucode with each received frame,
2770 * the same as HW timer counter counting down
2771 */
2772
2773 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2774 {
2775 u32 base_low = base & BEACON_TIME_MASK_LOW;
2776 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2777 u32 interval = beacon_interval * TIME_UNIT;
2778 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2779 (addon & BEACON_TIME_MASK_HIGH);
2780
2781 if (base_low > addon_low)
2782 res += base_low - addon_low;
2783 else if (base_low < addon_low) {
2784 res += interval + base_low - addon_low;
2785 res += (1 << 24);
2786 } else
2787 res += (1 << 24);
2788
2789 return cpu_to_le32(res);
2790 }
2791
2792 static int iwl3945_get_measurement(struct iwl_priv *priv,
2793 struct ieee80211_measurement_params *params,
2794 u8 type)
2795 {
2796 struct iwl_spectrum_cmd spectrum;
2797 struct iwl_rx_packet *res;
2798 struct iwl_host_cmd cmd = {
2799 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2800 .data = (void *)&spectrum,
2801 .meta.flags = CMD_WANT_SKB,
2802 };
2803 u32 add_time = le64_to_cpu(params->start_time);
2804 int rc;
2805 int spectrum_resp_status;
2806 int duration = le16_to_cpu(params->duration);
2807
2808 if (iwl3945_is_associated(priv))
2809 add_time =
2810 iwl3945_usecs_to_beacons(
2811 le64_to_cpu(params->start_time) - priv->last_tsf,
2812 le16_to_cpu(priv->rxon_timing.beacon_interval));
2813
2814 memset(&spectrum, 0, sizeof(spectrum));
2815
2816 spectrum.channel_count = cpu_to_le16(1);
2817 spectrum.flags =
2818 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2819 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2820 cmd.len = sizeof(spectrum);
2821 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2822
2823 if (iwl3945_is_associated(priv))
2824 spectrum.start_time =
2825 iwl3945_add_beacon_time(priv->last_beacon_time,
2826 add_time,
2827 le16_to_cpu(priv->rxon_timing.beacon_interval));
2828 else
2829 spectrum.start_time = 0;
2830
2831 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2832 spectrum.channels[0].channel = params->channel;
2833 spectrum.channels[0].type = type;
2834 if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
2835 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2836 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2837
2838 rc = iwl3945_send_cmd_sync(priv, &cmd);
2839 if (rc)
2840 return rc;
2841
2842 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2843 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2844 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
2845 rc = -EIO;
2846 }
2847
2848 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2849 switch (spectrum_resp_status) {
2850 case 0: /* Command will be handled */
2851 if (res->u.spectrum.id != 0xff) {
2852 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2853 res->u.spectrum.id);
2854 priv->measurement_status &= ~MEASUREMENT_READY;
2855 }
2856 priv->measurement_status |= MEASUREMENT_ACTIVE;
2857 rc = 0;
2858 break;
2859
2860 case 1: /* Command will not be handled */
2861 rc = -EAGAIN;
2862 break;
2863 }
2864
2865 dev_kfree_skb_any(cmd.meta.u.skb);
2866
2867 return rc;
2868 }
2869 #endif
2870
2871 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
2872 struct iwl_rx_mem_buffer *rxb)
2873 {
2874 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2875 struct iwl_alive_resp *palive;
2876 struct delayed_work *pwork;
2877
2878 palive = &pkt->u.alive_frame;
2879
2880 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2881 "0x%01X 0x%01X\n",
2882 palive->is_valid, palive->ver_type,
2883 palive->ver_subtype);
2884
2885 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2886 IWL_DEBUG_INFO("Initialization Alive received.\n");
2887 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2888 sizeof(struct iwl_alive_resp));
2889 pwork = &priv->init_alive_start;
2890 } else {
2891 IWL_DEBUG_INFO("Runtime Alive received.\n");
2892 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2893 sizeof(struct iwl_alive_resp));
2894 pwork = &priv->alive_start;
2895 iwl3945_disable_events(priv);
2896 }
2897
2898 /* We delay the ALIVE response by 5ms to
2899 * give the HW RF Kill time to activate... */
2900 if (palive->is_valid == UCODE_VALID_OK)
2901 queue_delayed_work(priv->workqueue, pwork,
2902 msecs_to_jiffies(5));
2903 else
2904 IWL_WARN(priv, "uCode did not respond OK.\n");
2905 }
2906
2907 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
2908 struct iwl_rx_mem_buffer *rxb)
2909 {
2910 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2911
2912 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2913 return;
2914 }
2915
2916 static void iwl3945_rx_reply_error(struct iwl_priv *priv,
2917 struct iwl_rx_mem_buffer *rxb)
2918 {
2919 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2920
2921 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2922 "seq 0x%04X ser 0x%08X\n",
2923 le32_to_cpu(pkt->u.err_resp.error_type),
2924 get_cmd_string(pkt->u.err_resp.cmd_id),
2925 pkt->u.err_resp.cmd_id,
2926 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2927 le32_to_cpu(pkt->u.err_resp.error_info));
2928 }
2929
2930 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2931
2932 static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
2933 {
2934 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2935 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
2936 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
2937 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2938 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2939 rxon->channel = csa->channel;
2940 priv->staging39_rxon.channel = csa->channel;
2941 }
2942
2943 static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
2944 struct iwl_rx_mem_buffer *rxb)
2945 {
2946 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2947 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2948 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
2949
2950 if (!report->state) {
2951 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2952 "Spectrum Measure Notification: Start\n");
2953 return;
2954 }
2955
2956 memcpy(&priv->measure_report, report, sizeof(*report));
2957 priv->measurement_status |= MEASUREMENT_READY;
2958 #endif
2959 }
2960
2961 static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
2962 struct iwl_rx_mem_buffer *rxb)
2963 {
2964 #ifdef CONFIG_IWL3945_DEBUG
2965 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2966 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2967 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2968 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2969 #endif
2970 }
2971
2972 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2973 struct iwl_rx_mem_buffer *rxb)
2974 {
2975 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2976 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2977 "notification for %s:\n",
2978 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2979 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
2980 le32_to_cpu(pkt->len));
2981 }
2982
2983 static void iwl3945_bg_beacon_update(struct work_struct *work)
2984 {
2985 struct iwl_priv *priv =
2986 container_of(work, struct iwl_priv, beacon_update);
2987 struct sk_buff *beacon;
2988
2989 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
2990 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
2991
2992 if (!beacon) {
2993 IWL_ERR(priv, "update beacon failed\n");
2994 return;
2995 }
2996
2997 mutex_lock(&priv->mutex);
2998 /* new beacon skb is allocated every time; dispose previous.*/
2999 if (priv->ibss_beacon)
3000 dev_kfree_skb(priv->ibss_beacon);
3001
3002 priv->ibss_beacon = beacon;
3003 mutex_unlock(&priv->mutex);
3004
3005 iwl3945_send_beacon_cmd(priv);
3006 }
3007
3008 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
3009 struct iwl_rx_mem_buffer *rxb)
3010 {
3011 #ifdef CONFIG_IWL3945_DEBUG
3012 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3013 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3014 u8 rate = beacon->beacon_notify_hdr.rate;
3015
3016 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3017 "tsf %d %d rate %d\n",
3018 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3019 beacon->beacon_notify_hdr.failure_frame,
3020 le32_to_cpu(beacon->ibss_mgr_status),
3021 le32_to_cpu(beacon->high_tsf),
3022 le32_to_cpu(beacon->low_tsf), rate);
3023 #endif
3024
3025 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
3026 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3027 queue_work(priv->workqueue, &priv->beacon_update);
3028 }
3029
3030 /* Service response to REPLY_SCAN_CMD (0x80) */
3031 static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
3032 struct iwl_rx_mem_buffer *rxb)
3033 {
3034 #ifdef CONFIG_IWL3945_DEBUG
3035 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3036 struct iwl_scanreq_notification *notif =
3037 (struct iwl_scanreq_notification *)pkt->u.raw;
3038
3039 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3040 #endif
3041 }
3042
3043 /* Service SCAN_START_NOTIFICATION (0x82) */
3044 static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
3045 struct iwl_rx_mem_buffer *rxb)
3046 {
3047 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3048 struct iwl_scanstart_notification *notif =
3049 (struct iwl_scanstart_notification *)pkt->u.raw;
3050 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3051 IWL_DEBUG_SCAN("Scan start: "
3052 "%d [802.11%s] "
3053 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3054 notif->channel,
3055 notif->band ? "bg" : "a",
3056 notif->tsf_high,
3057 notif->tsf_low, notif->status, notif->beacon_timer);
3058 }
3059
3060 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3061 static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
3062 struct iwl_rx_mem_buffer *rxb)
3063 {
3064 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3065 struct iwl_scanresults_notification *notif =
3066 (struct iwl_scanresults_notification *)pkt->u.raw;
3067
3068 IWL_DEBUG_SCAN("Scan ch.res: "
3069 "%d [802.11%s] "
3070 "(TSF: 0x%08X:%08X) - %d "
3071 "elapsed=%lu usec (%dms since last)\n",
3072 notif->channel,
3073 notif->band ? "bg" : "a",
3074 le32_to_cpu(notif->tsf_high),
3075 le32_to_cpu(notif->tsf_low),
3076 le32_to_cpu(notif->statistics[0]),
3077 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3078 jiffies_to_msecs(elapsed_jiffies
3079 (priv->last_scan_jiffies, jiffies)));
3080
3081 priv->last_scan_jiffies = jiffies;
3082 priv->next_scan_jiffies = 0;
3083 }
3084
3085 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3086 static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
3087 struct iwl_rx_mem_buffer *rxb)
3088 {
3089 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3090 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3091
3092 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3093 scan_notif->scanned_channels,
3094 scan_notif->tsf_low,
3095 scan_notif->tsf_high, scan_notif->status);
3096
3097 /* The HW is no longer scanning */
3098 clear_bit(STATUS_SCAN_HW, &priv->status);
3099
3100 /* The scan completion notification came in, so kill that timer... */
3101 cancel_delayed_work(&priv->scan_check);
3102
3103 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3104 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3105 "2.4" : "5.2",
3106 jiffies_to_msecs(elapsed_jiffies
3107 (priv->scan_pass_start, jiffies)));
3108
3109 /* Remove this scanned band from the list of pending
3110 * bands to scan, band G precedes A in order of scanning
3111 * as seen in iwl3945_bg_request_scan */
3112 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3113 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3114 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3115 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3116
3117 /* If a request to abort was given, or the scan did not succeed
3118 * then we reset the scan state machine and terminate,
3119 * re-queuing another scan if one has been requested */
3120 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3121 IWL_DEBUG_INFO("Aborted scan completed.\n");
3122 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3123 } else {
3124 /* If there are more bands on this scan pass reschedule */
3125 if (priv->scan_bands > 0)
3126 goto reschedule;
3127 }
3128
3129 priv->last_scan_jiffies = jiffies;
3130 priv->next_scan_jiffies = 0;
3131 IWL_DEBUG_INFO("Setting scan to off\n");
3132
3133 clear_bit(STATUS_SCANNING, &priv->status);
3134
3135 IWL_DEBUG_INFO("Scan took %dms\n",
3136 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3137
3138 queue_work(priv->workqueue, &priv->scan_completed);
3139
3140 return;
3141
3142 reschedule:
3143 priv->scan_pass_start = jiffies;
3144 queue_work(priv->workqueue, &priv->request_scan);
3145 }
3146
3147 /* Handle notification from uCode that card's power state is changing
3148 * due to software, hardware, or critical temperature RFKILL */
3149 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
3150 struct iwl_rx_mem_buffer *rxb)
3151 {
3152 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3153 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3154 unsigned long status = priv->status;
3155
3156 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3157 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3158 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3159
3160 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
3161 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3162
3163 if (flags & HW_CARD_DISABLED)
3164 set_bit(STATUS_RF_KILL_HW, &priv->status);
3165 else
3166 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3167
3168
3169 if (flags & SW_CARD_DISABLED)
3170 set_bit(STATUS_RF_KILL_SW, &priv->status);
3171 else
3172 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3173
3174 iwl3945_scan_cancel(priv);
3175
3176 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3177 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3178 (test_bit(STATUS_RF_KILL_SW, &status) !=
3179 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3180 queue_work(priv->workqueue, &priv->rf_kill);
3181 else
3182 wake_up_interruptible(&priv->wait_command_queue);
3183 }
3184
3185 /**
3186 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3187 *
3188 * Setup the RX handlers for each of the reply types sent from the uCode
3189 * to the host.
3190 *
3191 * This function chains into the hardware specific files for them to setup
3192 * any hardware specific handlers as well.
3193 */
3194 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
3195 {
3196 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3197 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3198 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3199 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3200 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3201 iwl3945_rx_spectrum_measure_notif;
3202 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3203 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3204 iwl3945_rx_pm_debug_statistics_notif;
3205 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3206
3207 /*
3208 * The same handler is used for both the REPLY to a discrete
3209 * statistics request from the host as well as for the periodic
3210 * statistics notifications (after received beacons) from the uCode.
3211 */
3212 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3213 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3214
3215 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3216 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3217 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3218 iwl3945_rx_scan_results_notif;
3219 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3220 iwl3945_rx_scan_complete_notif;
3221 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3222
3223 /* Set up hardware specific Rx handlers */
3224 iwl3945_hw_rx_handler_setup(priv);
3225 }
3226
3227 /**
3228 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3229 * When FW advances 'R' index, all entries between old and new 'R' index
3230 * need to be reclaimed.
3231 */
3232 static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
3233 int txq_id, int index)
3234 {
3235 struct iwl3945_tx_queue *txq = &priv->txq39[txq_id];
3236 struct iwl_queue *q = &txq->q;
3237 int nfreed = 0;
3238
3239 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3240 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
3241 "is out of range [0-%d] %d %d.\n", txq_id,
3242 index, q->n_bd, q->write_ptr, q->read_ptr);
3243 return;
3244 }
3245
3246 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3247 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3248 if (nfreed > 1) {
3249 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
3250 q->write_ptr, q->read_ptr);
3251 queue_work(priv->workqueue, &priv->restart);
3252 break;
3253 }
3254 nfreed++;
3255 }
3256 }
3257
3258
3259 /**
3260 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3261 * @rxb: Rx buffer to reclaim
3262 *
3263 * If an Rx buffer has an async callback associated with it the callback
3264 * will be executed. The attached skb (if present) will only be freed
3265 * if the callback returns 1
3266 */
3267 static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
3268 struct iwl_rx_mem_buffer *rxb)
3269 {
3270 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3271 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3272 int txq_id = SEQ_TO_QUEUE(sequence);
3273 int index = SEQ_TO_INDEX(sequence);
3274 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3275 int cmd_index;
3276 struct iwl_cmd *cmd;
3277
3278 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3279
3280 cmd_index = get_cmd_index(&priv->txq39[IWL_CMD_QUEUE_NUM].q, index, huge);
3281 cmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3282
3283 /* Input error checking is done when commands are added to queue. */
3284 if (cmd->meta.flags & CMD_WANT_SKB) {
3285 cmd->meta.source->u.skb = rxb->skb;
3286 rxb->skb = NULL;
3287 } else if (cmd->meta.u.callback &&
3288 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3289 rxb->skb = NULL;
3290
3291 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3292
3293 if (!(cmd->meta.flags & CMD_ASYNC)) {
3294 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3295 wake_up_interruptible(&priv->wait_command_queue);
3296 }
3297 }
3298
3299 /************************** RX-FUNCTIONS ****************************/
3300 /*
3301 * Rx theory of operation
3302 *
3303 * The host allocates 32 DMA target addresses and passes the host address
3304 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3305 * 0 to 31
3306 *
3307 * Rx Queue Indexes
3308 * The host/firmware share two index registers for managing the Rx buffers.
3309 *
3310 * The READ index maps to the first position that the firmware may be writing
3311 * to -- the driver can read up to (but not including) this position and get
3312 * good data.
3313 * The READ index is managed by the firmware once the card is enabled.
3314 *
3315 * The WRITE index maps to the last position the driver has read from -- the
3316 * position preceding WRITE is the last slot the firmware can place a packet.
3317 *
3318 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3319 * WRITE = READ.
3320 *
3321 * During initialization, the host sets up the READ queue position to the first
3322 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3323 *
3324 * When the firmware places a packet in a buffer, it will advance the READ index
3325 * and fire the RX interrupt. The driver can then query the READ index and
3326 * process as many packets as possible, moving the WRITE index forward as it
3327 * resets the Rx queue buffers with new memory.
3328 *
3329 * The management in the driver is as follows:
3330 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3331 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3332 * to replenish the iwl->rxq->rx_free.
3333 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3334 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3335 * 'processed' and 'read' driver indexes as well)
3336 * + A received packet is processed and handed to the kernel network stack,
3337 * detached from the iwl->rxq. The driver 'processed' index is updated.
3338 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3339 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3340 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3341 * were enough free buffers and RX_STALLED is set it is cleared.
3342 *
3343 *
3344 * Driver sequence:
3345 *
3346 * iwl3945_rx_queue_alloc() Allocates rx_free
3347 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3348 * iwl3945_rx_queue_restock
3349 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3350 * queue, updates firmware pointers, and updates
3351 * the WRITE index. If insufficient rx_free buffers
3352 * are available, schedules iwl3945_rx_replenish
3353 *
3354 * -- enable interrupts --
3355 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
3356 * READ INDEX, detaching the SKB from the pool.
3357 * Moves the packet buffer from queue to rx_used.
3358 * Calls iwl3945_rx_queue_restock to refill any empty
3359 * slots.
3360 * ...
3361 *
3362 */
3363
3364 /**
3365 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3366 */
3367 static int iwl3945_rx_queue_space(const struct iwl_rx_queue *q)
3368 {
3369 int s = q->read - q->write;
3370 if (s <= 0)
3371 s += RX_QUEUE_SIZE;
3372 /* keep some buffer to not confuse full and empty queue */
3373 s -= 2;
3374 if (s < 0)
3375 s = 0;
3376 return s;
3377 }
3378
3379 /**
3380 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3381 */
3382 int iwl3945_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
3383 {
3384 u32 reg = 0;
3385 int rc = 0;
3386 unsigned long flags;
3387
3388 spin_lock_irqsave(&q->lock, flags);
3389
3390 if (q->need_update == 0)
3391 goto exit_unlock;
3392
3393 /* If power-saving is in use, make sure device is awake */
3394 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3395 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3396
3397 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3398 iwl_set_bit(priv, CSR_GP_CNTRL,
3399 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3400 goto exit_unlock;
3401 }
3402
3403 rc = iwl_grab_nic_access(priv);
3404 if (rc)
3405 goto exit_unlock;
3406
3407 /* Device expects a multiple of 8 */
3408 iwl_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3409 q->write & ~0x7);
3410 iwl_release_nic_access(priv);
3411
3412 /* Else device is assumed to be awake */
3413 } else
3414 /* Device expects a multiple of 8 */
3415 iwl_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3416
3417
3418 q->need_update = 0;
3419
3420 exit_unlock:
3421 spin_unlock_irqrestore(&q->lock, flags);
3422 return rc;
3423 }
3424
3425 /**
3426 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3427 */
3428 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
3429 dma_addr_t dma_addr)
3430 {
3431 return cpu_to_le32((u32)dma_addr);
3432 }
3433
3434 /**
3435 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3436 *
3437 * If there are slots in the RX queue that need to be restocked,
3438 * and we have free pre-allocated buffers, fill the ranks as much
3439 * as we can, pulling from rx_free.
3440 *
3441 * This moves the 'write' index forward to catch up with 'processed', and
3442 * also updates the memory address in the firmware to reference the new
3443 * target buffer.
3444 */
3445 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
3446 {
3447 struct iwl_rx_queue *rxq = &priv->rxq;
3448 struct list_head *element;
3449 struct iwl_rx_mem_buffer *rxb;
3450 unsigned long flags;
3451 int write, rc;
3452
3453 spin_lock_irqsave(&rxq->lock, flags);
3454 write = rxq->write & ~0x7;
3455 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3456 /* Get next free Rx buffer, remove from free list */
3457 element = rxq->rx_free.next;
3458 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3459 list_del(element);
3460
3461 /* Point to Rx buffer via next RBD in circular buffer */
3462 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
3463 rxq->queue[rxq->write] = rxb;
3464 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3465 rxq->free_count--;
3466 }
3467 spin_unlock_irqrestore(&rxq->lock, flags);
3468 /* If the pre-allocated buffer pool is dropping low, schedule to
3469 * refill it */
3470 if (rxq->free_count <= RX_LOW_WATERMARK)
3471 queue_work(priv->workqueue, &priv->rx_replenish);
3472
3473
3474 /* If we've added more space for the firmware to place data, tell it.
3475 * Increment device's write pointer in multiples of 8. */
3476 if ((write != (rxq->write & ~0x7))
3477 || (abs(rxq->write - rxq->read) > 7)) {
3478 spin_lock_irqsave(&rxq->lock, flags);
3479 rxq->need_update = 1;
3480 spin_unlock_irqrestore(&rxq->lock, flags);
3481 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3482 if (rc)
3483 return rc;
3484 }
3485
3486 return 0;
3487 }
3488
3489 /**
3490 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3491 *
3492 * When moving to rx_free an SKB is allocated for the slot.
3493 *
3494 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3495 * This is called as a scheduled work item (except for during initialization)
3496 */
3497 static void iwl3945_rx_allocate(struct iwl_priv *priv)
3498 {
3499 struct iwl_rx_queue *rxq = &priv->rxq;
3500 struct list_head *element;
3501 struct iwl_rx_mem_buffer *rxb;
3502 unsigned long flags;
3503 spin_lock_irqsave(&rxq->lock, flags);
3504 while (!list_empty(&rxq->rx_used)) {
3505 element = rxq->rx_used.next;
3506 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3507
3508 /* Alloc a new receive buffer */
3509 rxb->skb =
3510 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3511 if (!rxb->skb) {
3512 if (net_ratelimit())
3513 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
3514 /* We don't reschedule replenish work here -- we will
3515 * call the restock method and if it still needs
3516 * more buffers it will schedule replenish */
3517 break;
3518 }
3519
3520 /* If radiotap head is required, reserve some headroom here.
3521 * The physical head count is a variable rx_stats->phy_count.
3522 * We reserve 4 bytes here. Plus these extra bytes, the
3523 * headroom of the physical head should be enough for the
3524 * radiotap head that iwl3945 supported. See iwl3945_rt.
3525 */
3526 skb_reserve(rxb->skb, 4);
3527
3528 priv->alloc_rxb_skb++;
3529 list_del(element);
3530
3531 /* Get physical address of RB/SKB */
3532 rxb->real_dma_addr =
3533 pci_map_single(priv->pci_dev, rxb->skb->data,
3534 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3535 list_add_tail(&rxb->list, &rxq->rx_free);
3536 rxq->free_count++;
3537 }
3538 spin_unlock_irqrestore(&rxq->lock, flags);
3539 }
3540
3541 /*
3542 * this should be called while priv->lock is locked
3543 */
3544 static void __iwl3945_rx_replenish(void *data)
3545 {
3546 struct iwl_priv *priv = data;
3547
3548 iwl3945_rx_allocate(priv);
3549 iwl3945_rx_queue_restock(priv);
3550 }
3551
3552
3553 void iwl3945_rx_replenish(void *data)
3554 {
3555 struct iwl_priv *priv = data;
3556 unsigned long flags;
3557
3558 iwl3945_rx_allocate(priv);
3559
3560 spin_lock_irqsave(&priv->lock, flags);
3561 iwl3945_rx_queue_restock(priv);
3562 spin_unlock_irqrestore(&priv->lock, flags);
3563 }
3564
3565 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3566 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3567 * This free routine walks the list of POOL entries and if SKB is set to
3568 * non NULL it is unmapped and freed
3569 */
3570 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3571 {
3572 int i;
3573 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3574 if (rxq->pool[i].skb != NULL) {
3575 pci_unmap_single(priv->pci_dev,
3576 rxq->pool[i].real_dma_addr,
3577 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3578 dev_kfree_skb(rxq->pool[i].skb);
3579 }
3580 }
3581
3582 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3583 rxq->dma_addr);
3584 rxq->bd = NULL;
3585 }
3586
3587 int iwl3945_rx_queue_alloc(struct iwl_priv *priv)
3588 {
3589 struct iwl_rx_queue *rxq = &priv->rxq;
3590 struct pci_dev *dev = priv->pci_dev;
3591 int i;
3592
3593 spin_lock_init(&rxq->lock);
3594 INIT_LIST_HEAD(&rxq->rx_free);
3595 INIT_LIST_HEAD(&rxq->rx_used);
3596
3597 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3598 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3599 if (!rxq->bd)
3600 return -ENOMEM;
3601
3602 /* Fill the rx_used queue with _all_ of the Rx buffers */
3603 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3604 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3605
3606 /* Set us so that we have processed and used all buffers, but have
3607 * not restocked the Rx queue with fresh buffers */
3608 rxq->read = rxq->write = 0;
3609 rxq->free_count = 0;
3610 rxq->need_update = 0;
3611 return 0;
3612 }
3613
3614 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3615 {
3616 unsigned long flags;
3617 int i;
3618 spin_lock_irqsave(&rxq->lock, flags);
3619 INIT_LIST_HEAD(&rxq->rx_free);
3620 INIT_LIST_HEAD(&rxq->rx_used);
3621 /* Fill the rx_used queue with _all_ of the Rx buffers */
3622 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3623 /* In the reset function, these buffers may have been allocated
3624 * to an SKB, so we need to unmap and free potential storage */
3625 if (rxq->pool[i].skb != NULL) {
3626 pci_unmap_single(priv->pci_dev,
3627 rxq->pool[i].real_dma_addr,
3628 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3629 priv->alloc_rxb_skb--;
3630 dev_kfree_skb(rxq->pool[i].skb);
3631 rxq->pool[i].skb = NULL;
3632 }
3633 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3634 }
3635
3636 /* Set us so that we have processed and used all buffers, but have
3637 * not restocked the Rx queue with fresh buffers */
3638 rxq->read = rxq->write = 0;
3639 rxq->free_count = 0;
3640 spin_unlock_irqrestore(&rxq->lock, flags);
3641 }
3642
3643 /* Convert linear signal-to-noise ratio into dB */
3644 static u8 ratio2dB[100] = {
3645 /* 0 1 2 3 4 5 6 7 8 9 */
3646 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3647 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3648 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3649 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3650 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3651 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3652 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3653 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3654 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3655 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3656 };
3657
3658 /* Calculates a relative dB value from a ratio of linear
3659 * (i.e. not dB) signal levels.
3660 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3661 int iwl3945_calc_db_from_ratio(int sig_ratio)
3662 {
3663 /* 1000:1 or higher just report as 60 dB */
3664 if (sig_ratio >= 1000)
3665 return 60;
3666
3667 /* 100:1 or higher, divide by 10 and use table,
3668 * add 20 dB to make up for divide by 10 */
3669 if (sig_ratio >= 100)
3670 return 20 + (int)ratio2dB[sig_ratio/10];
3671
3672 /* We shouldn't see this */
3673 if (sig_ratio < 1)
3674 return 0;
3675
3676 /* Use table for ratios 1:1 - 99:1 */
3677 return (int)ratio2dB[sig_ratio];
3678 }
3679
3680 #define PERFECT_RSSI (-20) /* dBm */
3681 #define WORST_RSSI (-95) /* dBm */
3682 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3683
3684 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3685 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3686 * about formulas used below. */
3687 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3688 {
3689 int sig_qual;
3690 int degradation = PERFECT_RSSI - rssi_dbm;
3691
3692 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3693 * as indicator; formula is (signal dbm - noise dbm).
3694 * SNR at or above 40 is a great signal (100%).
3695 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3696 * Weakest usable signal is usually 10 - 15 dB SNR. */
3697 if (noise_dbm) {
3698 if (rssi_dbm - noise_dbm >= 40)
3699 return 100;
3700 else if (rssi_dbm < noise_dbm)
3701 return 0;
3702 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3703
3704 /* Else use just the signal level.
3705 * This formula is a least squares fit of data points collected and
3706 * compared with a reference system that had a percentage (%) display
3707 * for signal quality. */
3708 } else
3709 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3710 (15 * RSSI_RANGE + 62 * degradation)) /
3711 (RSSI_RANGE * RSSI_RANGE);
3712
3713 if (sig_qual > 100)
3714 sig_qual = 100;
3715 else if (sig_qual < 1)
3716 sig_qual = 0;
3717
3718 return sig_qual;
3719 }
3720
3721 /**
3722 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3723 *
3724 * Uses the priv->rx_handlers callback function array to invoke
3725 * the appropriate handlers, including command responses,
3726 * frame-received notifications, and other notifications.
3727 */
3728 static void iwl3945_rx_handle(struct iwl_priv *priv)
3729 {
3730 struct iwl_rx_mem_buffer *rxb;
3731 struct iwl_rx_packet *pkt;
3732 struct iwl_rx_queue *rxq = &priv->rxq;
3733 u32 r, i;
3734 int reclaim;
3735 unsigned long flags;
3736 u8 fill_rx = 0;
3737 u32 count = 8;
3738
3739 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3740 * buffer that the driver may process (last buffer filled by ucode). */
3741 r = iwl3945_hw_get_rx_read(priv);
3742 i = rxq->read;
3743
3744 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3745 fill_rx = 1;
3746 /* Rx interrupt, but nothing sent from uCode */
3747 if (i == r)
3748 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3749
3750 while (i != r) {
3751 rxb = rxq->queue[i];
3752
3753 /* If an RXB doesn't have a Rx queue slot associated with it,
3754 * then a bug has been introduced in the queue refilling
3755 * routines -- catch it here */
3756 BUG_ON(rxb == NULL);
3757
3758 rxq->queue[i] = NULL;
3759
3760 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
3761 IWL_RX_BUF_SIZE,
3762 PCI_DMA_FROMDEVICE);
3763 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3764
3765 /* Reclaim a command buffer only if this packet is a response
3766 * to a (driver-originated) command.
3767 * If the packet (e.g. Rx frame) originated from uCode,
3768 * there is no command buffer to reclaim.
3769 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3770 * but apparently a few don't get set; catch them here. */
3771 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3772 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3773 (pkt->hdr.cmd != REPLY_TX);
3774
3775 /* Based on type of command response or notification,
3776 * handle those that need handling via function in
3777 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3778 if (priv->rx_handlers[pkt->hdr.cmd]) {
3779 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3780 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3781 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3782 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3783 } else {
3784 /* No handling needed */
3785 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3786 "r %d i %d No handler needed for %s, 0x%02x\n",
3787 r, i, get_cmd_string(pkt->hdr.cmd),
3788 pkt->hdr.cmd);
3789 }
3790
3791 if (reclaim) {
3792 /* Invoke any callbacks, transfer the skb to caller, and
3793 * fire off the (possibly) blocking iwl3945_send_cmd()
3794 * as we reclaim the driver command queue */
3795 if (rxb && rxb->skb)
3796 iwl3945_tx_cmd_complete(priv, rxb);
3797 else
3798 IWL_WARN(priv, "Claim null rxb?\n");
3799 }
3800
3801 /* For now we just don't re-use anything. We can tweak this
3802 * later to try and re-use notification packets and SKBs that
3803 * fail to Rx correctly */
3804 if (rxb->skb != NULL) {
3805 priv->alloc_rxb_skb--;
3806 dev_kfree_skb_any(rxb->skb);
3807 rxb->skb = NULL;
3808 }
3809
3810 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
3811 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3812 spin_lock_irqsave(&rxq->lock, flags);
3813 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3814 spin_unlock_irqrestore(&rxq->lock, flags);
3815 i = (i + 1) & RX_QUEUE_MASK;
3816 /* If there are a lot of unused frames,
3817 * restock the Rx queue so ucode won't assert. */
3818 if (fill_rx) {
3819 count++;
3820 if (count >= 8) {
3821 priv->rxq.read = i;
3822 __iwl3945_rx_replenish(priv);
3823 count = 0;
3824 }
3825 }
3826 }
3827
3828 /* Backtrack one entry */
3829 priv->rxq.read = i;
3830 iwl3945_rx_queue_restock(priv);
3831 }
3832
3833 /**
3834 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3835 */
3836 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
3837 struct iwl3945_tx_queue *txq)
3838 {
3839 u32 reg = 0;
3840 int rc = 0;
3841 int txq_id = txq->q.id;
3842
3843 if (txq->need_update == 0)
3844 return rc;
3845
3846 /* if we're trying to save power */
3847 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3848 /* wake up nic if it's powered down ...
3849 * uCode will wake up, and interrupt us again, so next
3850 * time we'll skip this part. */
3851 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3852
3853 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3854 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3855 iwl_set_bit(priv, CSR_GP_CNTRL,
3856 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3857 return rc;
3858 }
3859
3860 /* restore this queue's parameters in nic hardware. */
3861 rc = iwl_grab_nic_access(priv);
3862 if (rc)
3863 return rc;
3864 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
3865 txq->q.write_ptr | (txq_id << 8));
3866 iwl_release_nic_access(priv);
3867
3868 /* else not in power-save mode, uCode will never sleep when we're
3869 * trying to tx (during RFKILL, we're not trying to tx). */
3870 } else
3871 iwl_write32(priv, HBUS_TARG_WRPTR,
3872 txq->q.write_ptr | (txq_id << 8));
3873
3874 txq->need_update = 0;
3875
3876 return rc;
3877 }
3878
3879 #ifdef CONFIG_IWL3945_DEBUG
3880 static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
3881 struct iwl3945_rxon_cmd *rxon)
3882 {
3883 IWL_DEBUG_RADIO("RX CONFIG:\n");
3884 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3885 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3886 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3887 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3888 le32_to_cpu(rxon->filter_flags));
3889 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3890 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3891 rxon->ofdm_basic_rates);
3892 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3893 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3894 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3895 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3896 }
3897 #endif
3898
3899 static void iwl3945_enable_interrupts(struct iwl_priv *priv)
3900 {
3901 IWL_DEBUG_ISR("Enabling interrupts\n");
3902 set_bit(STATUS_INT_ENABLED, &priv->status);
3903 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3904 }
3905
3906
3907 /* call this function to flush any scheduled tasklet */
3908 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3909 {
3910 /* wait to make sure we flush pending tasklet*/
3911 synchronize_irq(priv->pci_dev->irq);
3912 tasklet_kill(&priv->irq_tasklet);
3913 }
3914
3915
3916 static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
3917 {
3918 clear_bit(STATUS_INT_ENABLED, &priv->status);
3919
3920 /* disable interrupts from uCode/NIC to host */
3921 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3922
3923 /* acknowledge/clear/reset any interrupts still pending
3924 * from uCode or flow handler (Rx/Tx DMA) */
3925 iwl_write32(priv, CSR_INT, 0xffffffff);
3926 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
3927 IWL_DEBUG_ISR("Disabled interrupts\n");
3928 }
3929
3930 static const char *desc_lookup(int i)
3931 {
3932 switch (i) {
3933 case 1:
3934 return "FAIL";
3935 case 2:
3936 return "BAD_PARAM";
3937 case 3:
3938 return "BAD_CHECKSUM";
3939 case 4:
3940 return "NMI_INTERRUPT";
3941 case 5:
3942 return "SYSASSERT";
3943 case 6:
3944 return "FATAL_ERROR";
3945 }
3946
3947 return "UNKNOWN";
3948 }
3949
3950 #define ERROR_START_OFFSET (1 * sizeof(u32))
3951 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
3952
3953 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
3954 {
3955 u32 i;
3956 u32 desc, time, count, base, data1;
3957 u32 blink1, blink2, ilink1, ilink2;
3958 int rc;
3959
3960 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3961
3962 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3963 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
3964 return;
3965 }
3966
3967 rc = iwl_grab_nic_access(priv);
3968 if (rc) {
3969 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3970 return;
3971 }
3972
3973 count = iwl_read_targ_mem(priv, base);
3974
3975 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3976 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
3977 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
3978 priv->status, count);
3979 }
3980
3981 IWL_ERR(priv, "Desc Time asrtPC blink2 "
3982 "ilink1 nmiPC Line\n");
3983 for (i = ERROR_START_OFFSET;
3984 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
3985 i += ERROR_ELEM_SIZE) {
3986 desc = iwl_read_targ_mem(priv, base + i);
3987 time =
3988 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
3989 blink1 =
3990 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
3991 blink2 =
3992 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
3993 ilink1 =
3994 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
3995 ilink2 =
3996 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
3997 data1 =
3998 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
3999
4000 IWL_ERR(priv,
4001 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4002 desc_lookup(desc), desc, time, blink1, blink2,
4003 ilink1, ilink2, data1);
4004 }
4005
4006 iwl_release_nic_access(priv);
4007
4008 }
4009
4010 #define EVENT_START_OFFSET (6 * sizeof(u32))
4011
4012 /**
4013 * iwl3945_print_event_log - Dump error event log to syslog
4014 *
4015 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
4016 */
4017 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
4018 u32 num_events, u32 mode)
4019 {
4020 u32 i;
4021 u32 base; /* SRAM byte address of event log header */
4022 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4023 u32 ptr; /* SRAM byte address of log data */
4024 u32 ev, time, data; /* event log data */
4025
4026 if (num_events == 0)
4027 return;
4028
4029 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4030
4031 if (mode == 0)
4032 event_size = 2 * sizeof(u32);
4033 else
4034 event_size = 3 * sizeof(u32);
4035
4036 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4037
4038 /* "time" is actually "data" for mode 0 (no timestamp).
4039 * place event id # at far right for easier visual parsing. */
4040 for (i = 0; i < num_events; i++) {
4041 ev = iwl_read_targ_mem(priv, ptr);
4042 ptr += sizeof(u32);
4043 time = iwl_read_targ_mem(priv, ptr);
4044 ptr += sizeof(u32);
4045 if (mode == 0) {
4046 /* data, ev */
4047 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
4048 } else {
4049 data = iwl_read_targ_mem(priv, ptr);
4050 ptr += sizeof(u32);
4051 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
4052 }
4053 }
4054 }
4055
4056 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
4057 {
4058 int rc;
4059 u32 base; /* SRAM byte address of event log header */
4060 u32 capacity; /* event log capacity in # entries */
4061 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4062 u32 num_wraps; /* # times uCode wrapped to top of log */
4063 u32 next_entry; /* index of next entry to be written by uCode */
4064 u32 size; /* # entries that we'll print */
4065
4066 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4067 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4068 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
4069 return;
4070 }
4071
4072 rc = iwl_grab_nic_access(priv);
4073 if (rc) {
4074 IWL_WARN(priv, "Can not read from adapter at this time.\n");
4075 return;
4076 }
4077
4078 /* event log header */
4079 capacity = iwl_read_targ_mem(priv, base);
4080 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4081 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4082 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
4083
4084 size = num_wraps ? capacity : next_entry;
4085
4086 /* bail out if nothing in log */
4087 if (size == 0) {
4088 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
4089 iwl_release_nic_access(priv);
4090 return;
4091 }
4092
4093 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
4094 size, num_wraps);
4095
4096 /* if uCode has wrapped back to top of log, start at the oldest entry,
4097 * i.e the next one that uCode would fill. */
4098 if (num_wraps)
4099 iwl3945_print_event_log(priv, next_entry,
4100 capacity - next_entry, mode);
4101
4102 /* (then/else) start at top of log */
4103 iwl3945_print_event_log(priv, 0, next_entry, mode);
4104
4105 iwl_release_nic_access(priv);
4106 }
4107
4108 /**
4109 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4110 */
4111 static void iwl3945_irq_handle_error(struct iwl_priv *priv)
4112 {
4113 /* Set the FW error flag -- cleared on iwl3945_down */
4114 set_bit(STATUS_FW_ERROR, &priv->status);
4115
4116 /* Cancel currently queued command. */
4117 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4118
4119 #ifdef CONFIG_IWL3945_DEBUG
4120 if (priv->debug_level & IWL_DL_FW_ERRORS) {
4121 iwl3945_dump_nic_error_log(priv);
4122 iwl3945_dump_nic_event_log(priv);
4123 iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
4124 }
4125 #endif
4126
4127 wake_up_interruptible(&priv->wait_command_queue);
4128
4129 /* Keep the restart process from trying to send host
4130 * commands by clearing the INIT status bit */
4131 clear_bit(STATUS_READY, &priv->status);
4132
4133 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4134 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4135 "Restarting adapter due to uCode error.\n");
4136
4137 if (iwl3945_is_associated(priv)) {
4138 memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
4139 sizeof(priv->recovery39_rxon));
4140 priv->error_recovering = 1;
4141 }
4142 queue_work(priv->workqueue, &priv->restart);
4143 }
4144 }
4145
4146 static void iwl3945_error_recovery(struct iwl_priv *priv)
4147 {
4148 unsigned long flags;
4149
4150 memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
4151 sizeof(priv->staging39_rxon));
4152 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4153 iwl3945_commit_rxon(priv);
4154
4155 iwl3945_add_station(priv, priv->bssid, 1, 0);
4156
4157 spin_lock_irqsave(&priv->lock, flags);
4158 priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
4159 priv->error_recovering = 0;
4160 spin_unlock_irqrestore(&priv->lock, flags);
4161 }
4162
4163 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
4164 {
4165 u32 inta, handled = 0;
4166 u32 inta_fh;
4167 unsigned long flags;
4168 #ifdef CONFIG_IWL3945_DEBUG
4169 u32 inta_mask;
4170 #endif
4171
4172 spin_lock_irqsave(&priv->lock, flags);
4173
4174 /* Ack/clear/reset pending uCode interrupts.
4175 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4176 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4177 inta = iwl_read32(priv, CSR_INT);
4178 iwl_write32(priv, CSR_INT, inta);
4179
4180 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4181 * Any new interrupts that happen after this, either while we're
4182 * in this tasklet, or later, will show up in next ISR/tasklet. */
4183 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4184 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4185
4186 #ifdef CONFIG_IWL3945_DEBUG
4187 if (priv->debug_level & IWL_DL_ISR) {
4188 /* just for debug */
4189 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4190 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4191 inta, inta_mask, inta_fh);
4192 }
4193 #endif
4194
4195 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4196 * atomic, make sure that inta covers all the interrupts that
4197 * we've discovered, even if FH interrupt came in just after
4198 * reading CSR_INT. */
4199 if (inta_fh & CSR39_FH_INT_RX_MASK)
4200 inta |= CSR_INT_BIT_FH_RX;
4201 if (inta_fh & CSR39_FH_INT_TX_MASK)
4202 inta |= CSR_INT_BIT_FH_TX;
4203
4204 /* Now service all interrupt bits discovered above. */
4205 if (inta & CSR_INT_BIT_HW_ERR) {
4206 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
4207
4208 /* Tell the device to stop sending interrupts */
4209 iwl3945_disable_interrupts(priv);
4210
4211 iwl3945_irq_handle_error(priv);
4212
4213 handled |= CSR_INT_BIT_HW_ERR;
4214
4215 spin_unlock_irqrestore(&priv->lock, flags);
4216
4217 return;
4218 }
4219
4220 #ifdef CONFIG_IWL3945_DEBUG
4221 if (priv->debug_level & (IWL_DL_ISR)) {
4222 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4223 if (inta & CSR_INT_BIT_SCD)
4224 IWL_DEBUG_ISR("Scheduler finished to transmit "
4225 "the frame/frames.\n");
4226
4227 /* Alive notification via Rx interrupt will do the real work */
4228 if (inta & CSR_INT_BIT_ALIVE)
4229 IWL_DEBUG_ISR("Alive interrupt\n");
4230 }
4231 #endif
4232 /* Safely ignore these bits for debug checks below */
4233 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4234
4235 /* Error detected by uCode */
4236 if (inta & CSR_INT_BIT_SW_ERR) {
4237 IWL_ERR(priv, "Microcode SW error detected. "
4238 "Restarting 0x%X.\n", inta);
4239 iwl3945_irq_handle_error(priv);
4240 handled |= CSR_INT_BIT_SW_ERR;
4241 }
4242
4243 /* uCode wakes up after power-down sleep */
4244 if (inta & CSR_INT_BIT_WAKEUP) {
4245 IWL_DEBUG_ISR("Wakeup interrupt\n");
4246 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4247 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[0]);
4248 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[1]);
4249 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[2]);
4250 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[3]);
4251 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[4]);
4252 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[5]);
4253
4254 handled |= CSR_INT_BIT_WAKEUP;
4255 }
4256
4257 /* All uCode command responses, including Tx command responses,
4258 * Rx "responses" (frame-received notification), and other
4259 * notifications from uCode come through here*/
4260 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4261 iwl3945_rx_handle(priv);
4262 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4263 }
4264
4265 if (inta & CSR_INT_BIT_FH_TX) {
4266 IWL_DEBUG_ISR("Tx interrupt\n");
4267
4268 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4269 if (!iwl_grab_nic_access(priv)) {
4270 iwl_write_direct32(priv, FH39_TCSR_CREDIT
4271 (FH39_SRVC_CHNL), 0x0);
4272 iwl_release_nic_access(priv);
4273 }
4274 handled |= CSR_INT_BIT_FH_TX;
4275 }
4276
4277 if (inta & ~handled)
4278 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
4279
4280 if (inta & ~CSR_INI_SET_MASK) {
4281 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
4282 inta & ~CSR_INI_SET_MASK);
4283 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
4284 }
4285
4286 /* Re-enable all interrupts */
4287 /* only Re-enable if disabled by irq */
4288 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4289 iwl3945_enable_interrupts(priv);
4290
4291 #ifdef CONFIG_IWL3945_DEBUG
4292 if (priv->debug_level & (IWL_DL_ISR)) {
4293 inta = iwl_read32(priv, CSR_INT);
4294 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4295 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4296 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4297 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4298 }
4299 #endif
4300 spin_unlock_irqrestore(&priv->lock, flags);
4301 }
4302
4303 static irqreturn_t iwl3945_isr(int irq, void *data)
4304 {
4305 struct iwl_priv *priv = data;
4306 u32 inta, inta_mask;
4307 u32 inta_fh;
4308 if (!priv)
4309 return IRQ_NONE;
4310
4311 spin_lock(&priv->lock);
4312
4313 /* Disable (but don't clear!) interrupts here to avoid
4314 * back-to-back ISRs and sporadic interrupts from our NIC.
4315 * If we have something to service, the tasklet will re-enable ints.
4316 * If we *don't* have something, we'll re-enable before leaving here. */
4317 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4318 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4319
4320 /* Discover which interrupts are active/pending */
4321 inta = iwl_read32(priv, CSR_INT);
4322 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4323
4324 /* Ignore interrupt if there's nothing in NIC to service.
4325 * This may be due to IRQ shared with another device,
4326 * or due to sporadic interrupts thrown from our NIC. */
4327 if (!inta && !inta_fh) {
4328 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4329 goto none;
4330 }
4331
4332 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4333 /* Hardware disappeared */
4334 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
4335 goto unplugged;
4336 }
4337
4338 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4339 inta, inta_mask, inta_fh);
4340
4341 inta &= ~CSR_INT_BIT_SCD;
4342
4343 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4344 if (likely(inta || inta_fh))
4345 tasklet_schedule(&priv->irq_tasklet);
4346 unplugged:
4347 spin_unlock(&priv->lock);
4348
4349 return IRQ_HANDLED;
4350
4351 none:
4352 /* re-enable interrupts here since we don't have anything to service. */
4353 /* only Re-enable if disabled by irq */
4354 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4355 iwl3945_enable_interrupts(priv);
4356 spin_unlock(&priv->lock);
4357 return IRQ_NONE;
4358 }
4359
4360 /************************** EEPROM BANDS ****************************
4361 *
4362 * The iwl3945_eeprom_band definitions below provide the mapping from the
4363 * EEPROM contents to the specific channel number supported for each
4364 * band.
4365 *
4366 * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
4367 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4368 * The specific geography and calibration information for that channel
4369 * is contained in the eeprom map itself.
4370 *
4371 * During init, we copy the eeprom information and channel map
4372 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4373 *
4374 * channel_map_24/52 provides the index in the channel_info array for a
4375 * given channel. We have to have two separate maps as there is channel
4376 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4377 * band_2
4378 *
4379 * A value of 0xff stored in the channel_map indicates that the channel
4380 * is not supported by the hardware at all.
4381 *
4382 * A value of 0xfe in the channel_map indicates that the channel is not
4383 * valid for Tx with the current hardware. This means that
4384 * while the system can tune and receive on a given channel, it may not
4385 * be able to associate or transmit any frames on that
4386 * channel. There is no corresponding channel information for that
4387 * entry.
4388 *
4389 *********************************************************************/
4390
4391 /* 2.4 GHz */
4392 static const u8 iwl3945_eeprom_band_1[14] = {
4393 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4394 };
4395
4396 /* 5.2 GHz bands */
4397 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4398 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4399 };
4400
4401 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4402 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4403 };
4404
4405 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4406 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4407 };
4408
4409 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4410 145, 149, 153, 157, 161, 165
4411 };
4412
4413 static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
4414 int *eeprom_ch_count,
4415 const struct iwl_eeprom_channel
4416 **eeprom_ch_info,
4417 const u8 **eeprom_ch_index)
4418 {
4419 switch (band) {
4420 case 1: /* 2.4GHz band */
4421 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4422 *eeprom_ch_info = priv->eeprom39.band_1_channels;
4423 *eeprom_ch_index = iwl3945_eeprom_band_1;
4424 break;
4425 case 2: /* 4.9GHz band */
4426 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4427 *eeprom_ch_info = priv->eeprom39.band_2_channels;
4428 *eeprom_ch_index = iwl3945_eeprom_band_2;
4429 break;
4430 case 3: /* 5.2GHz band */
4431 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4432 *eeprom_ch_info = priv->eeprom39.band_3_channels;
4433 *eeprom_ch_index = iwl3945_eeprom_band_3;
4434 break;
4435 case 4: /* 5.5GHz band */
4436 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4437 *eeprom_ch_info = priv->eeprom39.band_4_channels;
4438 *eeprom_ch_index = iwl3945_eeprom_band_4;
4439 break;
4440 case 5: /* 5.7GHz band */
4441 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4442 *eeprom_ch_info = priv->eeprom39.band_5_channels;
4443 *eeprom_ch_index = iwl3945_eeprom_band_5;
4444 break;
4445 default:
4446 BUG();
4447 return;
4448 }
4449 }
4450
4451 /**
4452 * iwl3945_get_channel_info - Find driver's private channel info
4453 *
4454 * Based on band and channel number.
4455 */
4456 const struct iwl_channel_info *
4457 iwl3945_get_channel_info(const struct iwl_priv *priv,
4458 enum ieee80211_band band, u16 channel)
4459 {
4460 int i;
4461
4462 switch (band) {
4463 case IEEE80211_BAND_5GHZ:
4464 for (i = 14; i < priv->channel_count; i++) {
4465 if (priv->channel_info[i].channel == channel)
4466 return &priv->channel_info[i];
4467 }
4468 break;
4469
4470 case IEEE80211_BAND_2GHZ:
4471 if (channel >= 1 && channel <= 14)
4472 return &priv->channel_info[channel - 1];
4473 break;
4474 case IEEE80211_NUM_BANDS:
4475 WARN_ON(1);
4476 }
4477
4478 return NULL;
4479 }
4480
4481 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4482 ? # x " " : "")
4483
4484 /**
4485 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4486 */
4487 static int iwl3945_init_channel_map(struct iwl_priv *priv)
4488 {
4489 int eeprom_ch_count = 0;
4490 const u8 *eeprom_ch_index = NULL;
4491 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4492 int band, ch;
4493 struct iwl_channel_info *ch_info;
4494
4495 if (priv->channel_count) {
4496 IWL_DEBUG_INFO("Channel map already initialized.\n");
4497 return 0;
4498 }
4499
4500 if (priv->eeprom39.version < 0x2f) {
4501 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4502 priv->eeprom39.version);
4503 return -EINVAL;
4504 }
4505
4506 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4507
4508 priv->channel_count =
4509 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4510 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4511 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4512 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4513 ARRAY_SIZE(iwl3945_eeprom_band_5);
4514
4515 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4516
4517 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
4518 priv->channel_count, GFP_KERNEL);
4519 if (!priv->channel_info) {
4520 IWL_ERR(priv, "Could not allocate channel_info\n");
4521 priv->channel_count = 0;
4522 return -ENOMEM;
4523 }
4524
4525 ch_info = priv->channel_info;
4526
4527 /* Loop through the 5 EEPROM bands adding them in order to the
4528 * channel map we maintain (that contains additional information than
4529 * what just in the EEPROM) */
4530 for (band = 1; band <= 5; band++) {
4531
4532 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4533 &eeprom_ch_info, &eeprom_ch_index);
4534
4535 /* Loop through each band adding each of the channels */
4536 for (ch = 0; ch < eeprom_ch_count; ch++) {
4537 ch_info->channel = eeprom_ch_index[ch];
4538 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4539 IEEE80211_BAND_5GHZ;
4540
4541 /* permanently store EEPROM's channel regulatory flags
4542 * and max power in channel info database. */
4543 ch_info->eeprom = eeprom_ch_info[ch];
4544
4545 /* Copy the run-time flags so they are there even on
4546 * invalid channels */
4547 ch_info->flags = eeprom_ch_info[ch].flags;
4548
4549 if (!(is_channel_valid(ch_info))) {
4550 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4551 "No traffic\n",
4552 ch_info->channel,
4553 ch_info->flags,
4554 is_channel_a_band(ch_info) ?
4555 "5.2" : "2.4");
4556 ch_info++;
4557 continue;
4558 }
4559
4560 /* Initialize regulatory-based run-time data */
4561 ch_info->max_power_avg = ch_info->curr_txpow =
4562 eeprom_ch_info[ch].max_power_avg;
4563 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4564 ch_info->min_power = 0;
4565
4566 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4567 " %ddBm): Ad-Hoc %ssupported\n",
4568 ch_info->channel,
4569 is_channel_a_band(ch_info) ?
4570 "5.2" : "2.4",
4571 CHECK_AND_PRINT(VALID),
4572 CHECK_AND_PRINT(IBSS),
4573 CHECK_AND_PRINT(ACTIVE),
4574 CHECK_AND_PRINT(RADAR),
4575 CHECK_AND_PRINT(WIDE),
4576 CHECK_AND_PRINT(DFS),
4577 eeprom_ch_info[ch].flags,
4578 eeprom_ch_info[ch].max_power_avg,
4579 ((eeprom_ch_info[ch].
4580 flags & EEPROM_CHANNEL_IBSS)
4581 && !(eeprom_ch_info[ch].
4582 flags & EEPROM_CHANNEL_RADAR))
4583 ? "" : "not ");
4584
4585 /* Set the user_txpower_limit to the highest power
4586 * supported by any channel */
4587 if (eeprom_ch_info[ch].max_power_avg >
4588 priv->user_txpower_limit)
4589 priv->user_txpower_limit =
4590 eeprom_ch_info[ch].max_power_avg;
4591
4592 ch_info++;
4593 }
4594 }
4595
4596 /* Set up txpower settings in driver for all channels */
4597 if (iwl3945_txpower_set_from_eeprom(priv))
4598 return -EIO;
4599
4600 return 0;
4601 }
4602
4603 /*
4604 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4605 */
4606 static void iwl3945_free_channel_map(struct iwl_priv *priv)
4607 {
4608 kfree(priv->channel_info);
4609 priv->channel_count = 0;
4610 }
4611
4612 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4613 * sending probe req. This should be set long enough to hear probe responses
4614 * from more than one AP. */
4615 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4616 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4617
4618 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4619 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4620
4621 /* For faster active scanning, scan will move to the next channel if fewer than
4622 * PLCP_QUIET_THRESH packets are heard on this channel within
4623 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4624 * time if it's a quiet channel (nothing responded to our probe, and there's
4625 * no other traffic).
4626 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4627 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4628 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4629
4630 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4631 * Must be set longer than active dwell time.
4632 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4633 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4634 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4635 #define IWL_PASSIVE_DWELL_BASE (100)
4636 #define IWL_CHANNEL_TUNE_TIME 5
4637
4638 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4639
4640 static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
4641 enum ieee80211_band band,
4642 u8 n_probes)
4643 {
4644 if (band == IEEE80211_BAND_5GHZ)
4645 return IWL_ACTIVE_DWELL_TIME_52 +
4646 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4647 else
4648 return IWL_ACTIVE_DWELL_TIME_24 +
4649 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4650 }
4651
4652 static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
4653 enum ieee80211_band band)
4654 {
4655 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4656 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4657 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4658
4659 if (iwl3945_is_associated(priv)) {
4660 /* If we're associated, we clamp the maximum passive
4661 * dwell time to be 98% of the beacon interval (minus
4662 * 2 * channel tune time) */
4663 passive = priv->beacon_int;
4664 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4665 passive = IWL_PASSIVE_DWELL_BASE;
4666 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4667 }
4668
4669 return passive;
4670 }
4671
4672 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
4673 enum ieee80211_band band,
4674 u8 is_active, u8 n_probes,
4675 struct iwl3945_scan_channel *scan_ch)
4676 {
4677 const struct ieee80211_channel *channels = NULL;
4678 const struct ieee80211_supported_band *sband;
4679 const struct iwl_channel_info *ch_info;
4680 u16 passive_dwell = 0;
4681 u16 active_dwell = 0;
4682 int added, i;
4683
4684 sband = iwl3945_get_band(priv, band);
4685 if (!sband)
4686 return 0;
4687
4688 channels = sband->channels;
4689
4690 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4691 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4692
4693 if (passive_dwell <= active_dwell)
4694 passive_dwell = active_dwell + 1;
4695
4696 for (i = 0, added = 0; i < sband->n_channels; i++) {
4697 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4698 continue;
4699
4700 scan_ch->channel = channels[i].hw_value;
4701
4702 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4703 if (!is_channel_valid(ch_info)) {
4704 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4705 scan_ch->channel);
4706 continue;
4707 }
4708
4709 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4710 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4711 /* If passive , set up for auto-switch
4712 * and use long active_dwell time.
4713 */
4714 if (!is_active || is_channel_passive(ch_info) ||
4715 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4716 scan_ch->type = 0; /* passive */
4717 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4718 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4719 } else {
4720 scan_ch->type = 1; /* active */
4721 }
4722
4723 /* Set direct probe bits. These may be used both for active
4724 * scan channels (probes gets sent right away),
4725 * or for passive channels (probes get se sent only after
4726 * hearing clear Rx packet).*/
4727 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4728 if (n_probes)
4729 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4730 } else {
4731 /* uCode v1 does not allow setting direct probe bits on
4732 * passive channel. */
4733 if ((scan_ch->type & 1) && n_probes)
4734 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4735 }
4736
4737 /* Set txpower levels to defaults */
4738 scan_ch->tpc.dsp_atten = 110;
4739 /* scan_pwr_info->tpc.dsp_atten; */
4740
4741 /*scan_pwr_info->tpc.tx_gain; */
4742 if (band == IEEE80211_BAND_5GHZ)
4743 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4744 else {
4745 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4746 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4747 * power level:
4748 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4749 */
4750 }
4751
4752 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4753 scan_ch->channel,
4754 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4755 (scan_ch->type & 1) ?
4756 active_dwell : passive_dwell);
4757
4758 scan_ch++;
4759 added++;
4760 }
4761
4762 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4763 return added;
4764 }
4765
4766 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
4767 struct ieee80211_rate *rates)
4768 {
4769 int i;
4770
4771 for (i = 0; i < IWL_RATE_COUNT; i++) {
4772 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4773 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4774 rates[i].hw_value_short = i;
4775 rates[i].flags = 0;
4776 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4777 /*
4778 * If CCK != 1M then set short preamble rate flag.
4779 */
4780 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4781 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4782 }
4783 }
4784 }
4785
4786 /**
4787 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4788 */
4789 static int iwl3945_init_geos(struct iwl_priv *priv)
4790 {
4791 struct iwl_channel_info *ch;
4792 struct ieee80211_supported_band *sband;
4793 struct ieee80211_channel *channels;
4794 struct ieee80211_channel *geo_ch;
4795 struct ieee80211_rate *rates;
4796 int i = 0;
4797
4798 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4799 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4800 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4801 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4802 return 0;
4803 }
4804
4805 channels = kzalloc(sizeof(struct ieee80211_channel) *
4806 priv->channel_count, GFP_KERNEL);
4807 if (!channels)
4808 return -ENOMEM;
4809
4810 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4811 GFP_KERNEL);
4812 if (!rates) {
4813 kfree(channels);
4814 return -ENOMEM;
4815 }
4816
4817 /* 5.2GHz channels start after the 2.4GHz channels */
4818 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4819 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4820 /* just OFDM */
4821 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4822 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4823
4824 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4825 sband->channels = channels;
4826 /* OFDM & CCK */
4827 sband->bitrates = rates;
4828 sband->n_bitrates = IWL_RATE_COUNT;
4829
4830 priv->ieee_channels = channels;
4831 priv->ieee_rates = rates;
4832
4833 iwl3945_init_hw_rates(priv, rates);
4834
4835 for (i = 0; i < priv->channel_count; i++) {
4836 ch = &priv->channel_info[i];
4837
4838 /* FIXME: might be removed if scan is OK*/
4839 if (!is_channel_valid(ch))
4840 continue;
4841
4842 if (is_channel_a_band(ch))
4843 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4844 else
4845 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4846
4847 geo_ch = &sband->channels[sband->n_channels++];
4848
4849 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4850 geo_ch->max_power = ch->max_power_avg;
4851 geo_ch->max_antenna_gain = 0xff;
4852 geo_ch->hw_value = ch->channel;
4853
4854 if (is_channel_valid(ch)) {
4855 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4856 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4857
4858 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4859 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4860
4861 if (ch->flags & EEPROM_CHANNEL_RADAR)
4862 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4863
4864 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4865 priv->max_channel_txpower_limit =
4866 ch->max_power_avg;
4867 } else {
4868 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4869 }
4870
4871 /* Save flags for reg domain usage */
4872 geo_ch->orig_flags = geo_ch->flags;
4873
4874 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4875 ch->channel, geo_ch->center_freq,
4876 is_channel_a_band(ch) ? "5.2" : "2.4",
4877 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4878 "restricted" : "valid",
4879 geo_ch->flags);
4880 }
4881
4882 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4883 priv->cfg->sku & IWL_SKU_A) {
4884 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
4885 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
4886 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4887 priv->cfg->sku &= ~IWL_SKU_A;
4888 }
4889
4890 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4891 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4892 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4893
4894 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4895 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4896 &priv->bands[IEEE80211_BAND_2GHZ];
4897 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4898 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4899 &priv->bands[IEEE80211_BAND_5GHZ];
4900
4901 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4902
4903 return 0;
4904 }
4905
4906 /*
4907 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4908 */
4909 static void iwl3945_free_geos(struct iwl_priv *priv)
4910 {
4911 kfree(priv->ieee_channels);
4912 kfree(priv->ieee_rates);
4913 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4914 }
4915
4916 /******************************************************************************
4917 *
4918 * uCode download functions
4919 *
4920 ******************************************************************************/
4921
4922 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
4923 {
4924 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4925 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4926 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4927 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4928 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4929 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
4930 }
4931
4932 /**
4933 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
4934 * looking at all data.
4935 */
4936 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
4937 {
4938 u32 val;
4939 u32 save_len = len;
4940 int rc = 0;
4941 u32 errcnt;
4942
4943 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4944
4945 rc = iwl_grab_nic_access(priv);
4946 if (rc)
4947 return rc;
4948
4949 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4950 IWL39_RTC_INST_LOWER_BOUND);
4951
4952 errcnt = 0;
4953 for (; len > 0; len -= sizeof(u32), image++) {
4954 /* read data comes through single port, auto-incr addr */
4955 /* NOTE: Use the debugless read so we don't flood kernel log
4956 * if IWL_DL_IO is set */
4957 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4958 if (val != le32_to_cpu(*image)) {
4959 IWL_ERR(priv, "uCode INST section is invalid at "
4960 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4961 save_len - len, val, le32_to_cpu(*image));
4962 rc = -EIO;
4963 errcnt++;
4964 if (errcnt >= 20)
4965 break;
4966 }
4967 }
4968
4969 iwl_release_nic_access(priv);
4970
4971 if (!errcnt)
4972 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
4973
4974 return rc;
4975 }
4976
4977
4978 /**
4979 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
4980 * using sample data 100 bytes apart. If these sample points are good,
4981 * it's a pretty good bet that everything between them is good, too.
4982 */
4983 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
4984 {
4985 u32 val;
4986 int rc = 0;
4987 u32 errcnt = 0;
4988 u32 i;
4989
4990 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4991
4992 rc = iwl_grab_nic_access(priv);
4993 if (rc)
4994 return rc;
4995
4996 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4997 /* read data comes through single port, auto-incr addr */
4998 /* NOTE: Use the debugless read so we don't flood kernel log
4999 * if IWL_DL_IO is set */
5000 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5001 i + IWL39_RTC_INST_LOWER_BOUND);
5002 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5003 if (val != le32_to_cpu(*image)) {
5004 #if 0 /* Enable this if you want to see details */
5005 IWL_ERR(priv, "uCode INST section is invalid at "
5006 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5007 i, val, *image);
5008 #endif
5009 rc = -EIO;
5010 errcnt++;
5011 if (errcnt >= 3)
5012 break;
5013 }
5014 }
5015
5016 iwl_release_nic_access(priv);
5017
5018 return rc;
5019 }
5020
5021
5022 /**
5023 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5024 * and verify its contents
5025 */
5026 static int iwl3945_verify_ucode(struct iwl_priv *priv)
5027 {
5028 __le32 *image;
5029 u32 len;
5030 int rc = 0;
5031
5032 /* Try bootstrap */
5033 image = (__le32 *)priv->ucode_boot.v_addr;
5034 len = priv->ucode_boot.len;
5035 rc = iwl3945_verify_inst_sparse(priv, image, len);
5036 if (rc == 0) {
5037 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5038 return 0;
5039 }
5040
5041 /* Try initialize */
5042 image = (__le32 *)priv->ucode_init.v_addr;
5043 len = priv->ucode_init.len;
5044 rc = iwl3945_verify_inst_sparse(priv, image, len);
5045 if (rc == 0) {
5046 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5047 return 0;
5048 }
5049
5050 /* Try runtime/protocol */
5051 image = (__le32 *)priv->ucode_code.v_addr;
5052 len = priv->ucode_code.len;
5053 rc = iwl3945_verify_inst_sparse(priv, image, len);
5054 if (rc == 0) {
5055 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5056 return 0;
5057 }
5058
5059 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5060
5061 /* Since nothing seems to match, show first several data entries in
5062 * instruction SRAM, so maybe visual inspection will give a clue.
5063 * Selection of bootstrap image (vs. other images) is arbitrary. */
5064 image = (__le32 *)priv->ucode_boot.v_addr;
5065 len = priv->ucode_boot.len;
5066 rc = iwl3945_verify_inst_full(priv, image, len);
5067
5068 return rc;
5069 }
5070
5071
5072 /* check contents of special bootstrap uCode SRAM */
5073 static int iwl3945_verify_bsm(struct iwl_priv *priv)
5074 {
5075 __le32 *image = priv->ucode_boot.v_addr;
5076 u32 len = priv->ucode_boot.len;
5077 u32 reg;
5078 u32 val;
5079
5080 IWL_DEBUG_INFO("Begin verify bsm\n");
5081
5082 /* verify BSM SRAM contents */
5083 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
5084 for (reg = BSM_SRAM_LOWER_BOUND;
5085 reg < BSM_SRAM_LOWER_BOUND + len;
5086 reg += sizeof(u32), image++) {
5087 val = iwl_read_prph(priv, reg);
5088 if (val != le32_to_cpu(*image)) {
5089 IWL_ERR(priv, "BSM uCode verification failed at "
5090 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5091 BSM_SRAM_LOWER_BOUND,
5092 reg - BSM_SRAM_LOWER_BOUND, len,
5093 val, le32_to_cpu(*image));
5094 return -EIO;
5095 }
5096 }
5097
5098 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5099
5100 return 0;
5101 }
5102
5103 /**
5104 * iwl3945_load_bsm - Load bootstrap instructions
5105 *
5106 * BSM operation:
5107 *
5108 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5109 * in special SRAM that does not power down during RFKILL. When powering back
5110 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5111 * the bootstrap program into the on-board processor, and starts it.
5112 *
5113 * The bootstrap program loads (via DMA) instructions and data for a new
5114 * program from host DRAM locations indicated by the host driver in the
5115 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5116 * automatically.
5117 *
5118 * When initializing the NIC, the host driver points the BSM to the
5119 * "initialize" uCode image. This uCode sets up some internal data, then
5120 * notifies host via "initialize alive" that it is complete.
5121 *
5122 * The host then replaces the BSM_DRAM_* pointer values to point to the
5123 * normal runtime uCode instructions and a backup uCode data cache buffer
5124 * (filled initially with starting data values for the on-board processor),
5125 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5126 * which begins normal operation.
5127 *
5128 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5129 * the backup data cache in DRAM before SRAM is powered down.
5130 *
5131 * When powering back up, the BSM loads the bootstrap program. This reloads
5132 * the runtime uCode instructions and the backup data cache into SRAM,
5133 * and re-launches the runtime uCode from where it left off.
5134 */
5135 static int iwl3945_load_bsm(struct iwl_priv *priv)
5136 {
5137 __le32 *image = priv->ucode_boot.v_addr;
5138 u32 len = priv->ucode_boot.len;
5139 dma_addr_t pinst;
5140 dma_addr_t pdata;
5141 u32 inst_len;
5142 u32 data_len;
5143 int rc;
5144 int i;
5145 u32 done;
5146 u32 reg_offset;
5147
5148 IWL_DEBUG_INFO("Begin load bsm\n");
5149
5150 /* make sure bootstrap program is no larger than BSM's SRAM size */
5151 if (len > IWL39_MAX_BSM_SIZE)
5152 return -EINVAL;
5153
5154 /* Tell bootstrap uCode where to find the "Initialize" uCode
5155 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5156 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5157 * after the "initialize" uCode has run, to point to
5158 * runtime/protocol instructions and backup data cache. */
5159 pinst = priv->ucode_init.p_addr;
5160 pdata = priv->ucode_init_data.p_addr;
5161 inst_len = priv->ucode_init.len;
5162 data_len = priv->ucode_init_data.len;
5163
5164 rc = iwl_grab_nic_access(priv);
5165 if (rc)
5166 return rc;
5167
5168 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5169 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5170 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5171 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5172
5173 /* Fill BSM memory with bootstrap instructions */
5174 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5175 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5176 reg_offset += sizeof(u32), image++)
5177 _iwl_write_prph(priv, reg_offset,
5178 le32_to_cpu(*image));
5179
5180 rc = iwl3945_verify_bsm(priv);
5181 if (rc) {
5182 iwl_release_nic_access(priv);
5183 return rc;
5184 }
5185
5186 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5187 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5188 iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
5189 IWL39_RTC_INST_LOWER_BOUND);
5190 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5191
5192 /* Load bootstrap code into instruction SRAM now,
5193 * to prepare to load "initialize" uCode */
5194 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5195 BSM_WR_CTRL_REG_BIT_START);
5196
5197 /* Wait for load of bootstrap uCode to finish */
5198 for (i = 0; i < 100; i++) {
5199 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
5200 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5201 break;
5202 udelay(10);
5203 }
5204 if (i < 100)
5205 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5206 else {
5207 IWL_ERR(priv, "BSM write did not complete!\n");
5208 return -EIO;
5209 }
5210
5211 /* Enable future boot loads whenever power management unit triggers it
5212 * (e.g. when powering back up after power-save shutdown) */
5213 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5214 BSM_WR_CTRL_REG_BIT_START_EN);
5215
5216 iwl_release_nic_access(priv);
5217
5218 return 0;
5219 }
5220
5221 static void iwl3945_nic_start(struct iwl_priv *priv)
5222 {
5223 /* Remove all resets to allow NIC to operate */
5224 iwl_write32(priv, CSR_RESET, 0);
5225 }
5226
5227 /**
5228 * iwl3945_read_ucode - Read uCode images from disk file.
5229 *
5230 * Copy into buffers for card to fetch via bus-mastering
5231 */
5232 static int iwl3945_read_ucode(struct iwl_priv *priv)
5233 {
5234 struct iwl_ucode *ucode;
5235 int ret = -EINVAL, index;
5236 const struct firmware *ucode_raw;
5237 /* firmware file name contains uCode/driver compatibility version */
5238 const char *name_pre = priv->cfg->fw_name_pre;
5239 const unsigned int api_max = priv->cfg->ucode_api_max;
5240 const unsigned int api_min = priv->cfg->ucode_api_min;
5241 char buf[25];
5242 u8 *src;
5243 size_t len;
5244 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
5245
5246 /* Ask kernel firmware_class module to get the boot firmware off disk.
5247 * request_firmware() is synchronous, file is in memory on return. */
5248 for (index = api_max; index >= api_min; index--) {
5249 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
5250 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
5251 if (ret < 0) {
5252 IWL_ERR(priv, "%s firmware file req failed: %d\n",
5253 buf, ret);
5254 if (ret == -ENOENT)
5255 continue;
5256 else
5257 goto error;
5258 } else {
5259 if (index < api_max)
5260 IWL_ERR(priv, "Loaded firmware %s, "
5261 "which is deprecated. "
5262 " Please use API v%u instead.\n",
5263 buf, api_max);
5264 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5265 buf, ucode_raw->size);
5266 break;
5267 }
5268 }
5269
5270 if (ret < 0)
5271 goto error;
5272
5273 /* Make sure that we got at least our header! */
5274 if (ucode_raw->size < sizeof(*ucode)) {
5275 IWL_ERR(priv, "File size way too small!\n");
5276 ret = -EINVAL;
5277 goto err_release;
5278 }
5279
5280 /* Data from ucode file: header followed by uCode images */
5281 ucode = (void *)ucode_raw->data;
5282
5283 priv->ucode_ver = le32_to_cpu(ucode->ver);
5284 api_ver = IWL_UCODE_API(priv->ucode_ver);
5285 inst_size = le32_to_cpu(ucode->inst_size);
5286 data_size = le32_to_cpu(ucode->data_size);
5287 init_size = le32_to_cpu(ucode->init_size);
5288 init_data_size = le32_to_cpu(ucode->init_data_size);
5289 boot_size = le32_to_cpu(ucode->boot_size);
5290
5291 /* api_ver should match the api version forming part of the
5292 * firmware filename ... but we don't check for that and only rely
5293 * on the API version read from firware header from here on forward */
5294
5295 if (api_ver < api_min || api_ver > api_max) {
5296 IWL_ERR(priv, "Driver unable to support your firmware API. "
5297 "Driver supports v%u, firmware is v%u.\n",
5298 api_max, api_ver);
5299 priv->ucode_ver = 0;
5300 ret = -EINVAL;
5301 goto err_release;
5302 }
5303 if (api_ver != api_max)
5304 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
5305 "got %u. New firmware can be obtained "
5306 "from http://www.intellinuxwireless.org.\n",
5307 api_max, api_ver);
5308
5309 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
5310 IWL_UCODE_MAJOR(priv->ucode_ver),
5311 IWL_UCODE_MINOR(priv->ucode_ver),
5312 IWL_UCODE_API(priv->ucode_ver),
5313 IWL_UCODE_SERIAL(priv->ucode_ver));
5314
5315 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5316 priv->ucode_ver);
5317 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5318 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5319 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5320 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5321 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5322
5323
5324 /* Verify size of file vs. image size info in file's header */
5325 if (ucode_raw->size < sizeof(*ucode) +
5326 inst_size + data_size + init_size +
5327 init_data_size + boot_size) {
5328
5329 IWL_DEBUG_INFO("uCode file size %d too small\n",
5330 (int)ucode_raw->size);
5331 ret = -EINVAL;
5332 goto err_release;
5333 }
5334
5335 /* Verify that uCode images will fit in card's SRAM */
5336 if (inst_size > IWL39_MAX_INST_SIZE) {
5337 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5338 inst_size);
5339 ret = -EINVAL;
5340 goto err_release;
5341 }
5342
5343 if (data_size > IWL39_MAX_DATA_SIZE) {
5344 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5345 data_size);
5346 ret = -EINVAL;
5347 goto err_release;
5348 }
5349 if (init_size > IWL39_MAX_INST_SIZE) {
5350 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5351 init_size);
5352 ret = -EINVAL;
5353 goto err_release;
5354 }
5355 if (init_data_size > IWL39_MAX_DATA_SIZE) {
5356 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5357 init_data_size);
5358 ret = -EINVAL;
5359 goto err_release;
5360 }
5361 if (boot_size > IWL39_MAX_BSM_SIZE) {
5362 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5363 boot_size);
5364 ret = -EINVAL;
5365 goto err_release;
5366 }
5367
5368 /* Allocate ucode buffers for card's bus-master loading ... */
5369
5370 /* Runtime instructions and 2 copies of data:
5371 * 1) unmodified from disk
5372 * 2) backup cache for save/restore during power-downs */
5373 priv->ucode_code.len = inst_size;
5374 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5375
5376 priv->ucode_data.len = data_size;
5377 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5378
5379 priv->ucode_data_backup.len = data_size;
5380 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5381
5382 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5383 !priv->ucode_data_backup.v_addr)
5384 goto err_pci_alloc;
5385
5386 /* Initialization instructions and data */
5387 if (init_size && init_data_size) {
5388 priv->ucode_init.len = init_size;
5389 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5390
5391 priv->ucode_init_data.len = init_data_size;
5392 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5393
5394 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5395 goto err_pci_alloc;
5396 }
5397
5398 /* Bootstrap (instructions only, no data) */
5399 if (boot_size) {
5400 priv->ucode_boot.len = boot_size;
5401 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5402
5403 if (!priv->ucode_boot.v_addr)
5404 goto err_pci_alloc;
5405 }
5406
5407 /* Copy images into buffers for card's bus-master reads ... */
5408
5409 /* Runtime instructions (first block of data in file) */
5410 src = &ucode->data[0];
5411 len = priv->ucode_code.len;
5412 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5413 memcpy(priv->ucode_code.v_addr, src, len);
5414 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5415 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5416
5417 /* Runtime data (2nd block)
5418 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5419 src = &ucode->data[inst_size];
5420 len = priv->ucode_data.len;
5421 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5422 memcpy(priv->ucode_data.v_addr, src, len);
5423 memcpy(priv->ucode_data_backup.v_addr, src, len);
5424
5425 /* Initialization instructions (3rd block) */
5426 if (init_size) {
5427 src = &ucode->data[inst_size + data_size];
5428 len = priv->ucode_init.len;
5429 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5430 len);
5431 memcpy(priv->ucode_init.v_addr, src, len);
5432 }
5433
5434 /* Initialization data (4th block) */
5435 if (init_data_size) {
5436 src = &ucode->data[inst_size + data_size + init_size];
5437 len = priv->ucode_init_data.len;
5438 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5439 (int)len);
5440 memcpy(priv->ucode_init_data.v_addr, src, len);
5441 }
5442
5443 /* Bootstrap instructions (5th block) */
5444 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5445 len = priv->ucode_boot.len;
5446 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5447 (int)len);
5448 memcpy(priv->ucode_boot.v_addr, src, len);
5449
5450 /* We have our copies now, allow OS release its copies */
5451 release_firmware(ucode_raw);
5452 return 0;
5453
5454 err_pci_alloc:
5455 IWL_ERR(priv, "failed to allocate pci memory\n");
5456 ret = -ENOMEM;
5457 iwl3945_dealloc_ucode_pci(priv);
5458
5459 err_release:
5460 release_firmware(ucode_raw);
5461
5462 error:
5463 return ret;
5464 }
5465
5466
5467 /**
5468 * iwl3945_set_ucode_ptrs - Set uCode address location
5469 *
5470 * Tell initialization uCode where to find runtime uCode.
5471 *
5472 * BSM registers initially contain pointers to initialization uCode.
5473 * We need to replace them to load runtime uCode inst and data,
5474 * and to save runtime data when powering down.
5475 */
5476 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
5477 {
5478 dma_addr_t pinst;
5479 dma_addr_t pdata;
5480 int rc = 0;
5481 unsigned long flags;
5482
5483 /* bits 31:0 for 3945 */
5484 pinst = priv->ucode_code.p_addr;
5485 pdata = priv->ucode_data_backup.p_addr;
5486
5487 spin_lock_irqsave(&priv->lock, flags);
5488 rc = iwl_grab_nic_access(priv);
5489 if (rc) {
5490 spin_unlock_irqrestore(&priv->lock, flags);
5491 return rc;
5492 }
5493
5494 /* Tell bootstrap uCode where to find image to load */
5495 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5496 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5497 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5498 priv->ucode_data.len);
5499
5500 /* Inst byte count must be last to set up, bit 31 signals uCode
5501 * that all new ptr/size info is in place */
5502 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5503 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5504
5505 iwl_release_nic_access(priv);
5506
5507 spin_unlock_irqrestore(&priv->lock, flags);
5508
5509 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5510
5511 return rc;
5512 }
5513
5514 /**
5515 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5516 *
5517 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5518 *
5519 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5520 */
5521 static void iwl3945_init_alive_start(struct iwl_priv *priv)
5522 {
5523 /* Check alive response for "valid" sign from uCode */
5524 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5525 /* We had an error bringing up the hardware, so take it
5526 * all the way back down so we can try again */
5527 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5528 goto restart;
5529 }
5530
5531 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5532 * This is a paranoid check, because we would not have gotten the
5533 * "initialize" alive if code weren't properly loaded. */
5534 if (iwl3945_verify_ucode(priv)) {
5535 /* Runtime instruction load was bad;
5536 * take it all the way back down so we can try again */
5537 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5538 goto restart;
5539 }
5540
5541 /* Send pointers to protocol/runtime uCode image ... init code will
5542 * load and launch runtime uCode, which will send us another "Alive"
5543 * notification. */
5544 IWL_DEBUG_INFO("Initialization Alive received.\n");
5545 if (iwl3945_set_ucode_ptrs(priv)) {
5546 /* Runtime instruction load won't happen;
5547 * take it all the way back down so we can try again */
5548 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5549 goto restart;
5550 }
5551 return;
5552
5553 restart:
5554 queue_work(priv->workqueue, &priv->restart);
5555 }
5556
5557
5558 /* temporary */
5559 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5560 struct sk_buff *skb);
5561
5562 /**
5563 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5564 * from protocol/runtime uCode (initialization uCode's
5565 * Alive gets handled by iwl3945_init_alive_start()).
5566 */
5567 static void iwl3945_alive_start(struct iwl_priv *priv)
5568 {
5569 int rc = 0;
5570 int thermal_spin = 0;
5571 u32 rfkill;
5572
5573 IWL_DEBUG_INFO("Runtime Alive received.\n");
5574
5575 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5576 /* We had an error bringing up the hardware, so take it
5577 * all the way back down so we can try again */
5578 IWL_DEBUG_INFO("Alive failed.\n");
5579 goto restart;
5580 }
5581
5582 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5583 * This is a paranoid check, because we would not have gotten the
5584 * "runtime" alive if code weren't properly loaded. */
5585 if (iwl3945_verify_ucode(priv)) {
5586 /* Runtime instruction load was bad;
5587 * take it all the way back down so we can try again */
5588 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5589 goto restart;
5590 }
5591
5592 iwl3945_clear_stations_table(priv);
5593
5594 rc = iwl_grab_nic_access(priv);
5595 if (rc) {
5596 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
5597 return;
5598 }
5599
5600 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
5601 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5602 iwl_release_nic_access(priv);
5603
5604 if (rfkill & 0x1) {
5605 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5606 /* if RFKILL is not on, then wait for thermal
5607 * sensor in adapter to kick in */
5608 while (iwl3945_hw_get_temperature(priv) == 0) {
5609 thermal_spin++;
5610 udelay(10);
5611 }
5612
5613 if (thermal_spin)
5614 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5615 thermal_spin * 10);
5616 } else
5617 set_bit(STATUS_RF_KILL_HW, &priv->status);
5618
5619 /* After the ALIVE response, we can send commands to 3945 uCode */
5620 set_bit(STATUS_ALIVE, &priv->status);
5621
5622 /* Clear out the uCode error bit if it is set */
5623 clear_bit(STATUS_FW_ERROR, &priv->status);
5624
5625 if (iwl3945_is_rfkill(priv))
5626 return;
5627
5628 ieee80211_wake_queues(priv->hw);
5629
5630 priv->active_rate = priv->rates_mask;
5631 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5632
5633 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5634
5635 if (iwl3945_is_associated(priv)) {
5636 struct iwl3945_rxon_cmd *active_rxon =
5637 (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
5638
5639 memcpy(&priv->staging39_rxon, &priv->active39_rxon,
5640 sizeof(priv->staging39_rxon));
5641 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5642 } else {
5643 /* Initialize our rx_config data */
5644 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5645 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5646 }
5647
5648 /* Configure Bluetooth device coexistence support */
5649 iwl3945_send_bt_config(priv);
5650
5651 /* Configure the adapter for unassociated operation */
5652 iwl3945_commit_rxon(priv);
5653
5654 iwl3945_reg_txpower_periodic(priv);
5655
5656 iwl3945_led_register(priv);
5657
5658 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5659 set_bit(STATUS_READY, &priv->status);
5660 wake_up_interruptible(&priv->wait_command_queue);
5661
5662 if (priv->error_recovering)
5663 iwl3945_error_recovery(priv);
5664
5665 /* reassociate for ADHOC mode */
5666 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5667 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5668 priv->vif);
5669 if (beacon)
5670 iwl3945_mac_beacon_update(priv->hw, beacon);
5671 }
5672
5673 return;
5674
5675 restart:
5676 queue_work(priv->workqueue, &priv->restart);
5677 }
5678
5679 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
5680
5681 static void __iwl3945_down(struct iwl_priv *priv)
5682 {
5683 unsigned long flags;
5684 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5685 struct ieee80211_conf *conf = NULL;
5686
5687 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5688
5689 conf = ieee80211_get_hw_conf(priv->hw);
5690
5691 if (!exit_pending)
5692 set_bit(STATUS_EXIT_PENDING, &priv->status);
5693
5694 iwl3945_led_unregister(priv);
5695 iwl3945_clear_stations_table(priv);
5696
5697 /* Unblock any waiting calls */
5698 wake_up_interruptible_all(&priv->wait_command_queue);
5699
5700 /* Wipe out the EXIT_PENDING status bit if we are not actually
5701 * exiting the module */
5702 if (!exit_pending)
5703 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5704
5705 /* stop and reset the on-board processor */
5706 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5707
5708 /* tell the device to stop sending interrupts */
5709 spin_lock_irqsave(&priv->lock, flags);
5710 iwl3945_disable_interrupts(priv);
5711 spin_unlock_irqrestore(&priv->lock, flags);
5712 iwl_synchronize_irq(priv);
5713
5714 if (priv->mac80211_registered)
5715 ieee80211_stop_queues(priv->hw);
5716
5717 /* If we have not previously called iwl3945_init() then
5718 * clear all bits but the RF Kill and SUSPEND bits and return */
5719 if (!iwl3945_is_init(priv)) {
5720 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5721 STATUS_RF_KILL_HW |
5722 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5723 STATUS_RF_KILL_SW |
5724 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5725 STATUS_GEO_CONFIGURED |
5726 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5727 STATUS_IN_SUSPEND |
5728 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5729 STATUS_EXIT_PENDING;
5730 goto exit;
5731 }
5732
5733 /* ...otherwise clear out all the status bits but the RF Kill and
5734 * SUSPEND bits and continue taking the NIC down. */
5735 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5736 STATUS_RF_KILL_HW |
5737 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5738 STATUS_RF_KILL_SW |
5739 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5740 STATUS_GEO_CONFIGURED |
5741 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5742 STATUS_IN_SUSPEND |
5743 test_bit(STATUS_FW_ERROR, &priv->status) <<
5744 STATUS_FW_ERROR |
5745 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5746 STATUS_EXIT_PENDING;
5747
5748 spin_lock_irqsave(&priv->lock, flags);
5749 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5750 spin_unlock_irqrestore(&priv->lock, flags);
5751
5752 iwl3945_hw_txq_ctx_stop(priv);
5753 iwl3945_hw_rxq_stop(priv);
5754
5755 spin_lock_irqsave(&priv->lock, flags);
5756 if (!iwl_grab_nic_access(priv)) {
5757 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5758 APMG_CLK_VAL_DMA_CLK_RQT);
5759 iwl_release_nic_access(priv);
5760 }
5761 spin_unlock_irqrestore(&priv->lock, flags);
5762
5763 udelay(5);
5764
5765 iwl3945_hw_nic_stop_master(priv);
5766 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5767 iwl3945_hw_nic_reset(priv);
5768
5769 exit:
5770 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5771
5772 if (priv->ibss_beacon)
5773 dev_kfree_skb(priv->ibss_beacon);
5774 priv->ibss_beacon = NULL;
5775
5776 /* clear out any free frames */
5777 iwl3945_clear_free_frames(priv);
5778 }
5779
5780 static void iwl3945_down(struct iwl_priv *priv)
5781 {
5782 mutex_lock(&priv->mutex);
5783 __iwl3945_down(priv);
5784 mutex_unlock(&priv->mutex);
5785
5786 iwl3945_cancel_deferred_work(priv);
5787 }
5788
5789 #define MAX_HW_RESTARTS 5
5790
5791 static int __iwl3945_up(struct iwl_priv *priv)
5792 {
5793 int rc, i;
5794
5795 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5796 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
5797 return -EIO;
5798 }
5799
5800 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5801 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
5802 "parameter)\n");
5803 return -ENODEV;
5804 }
5805
5806 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5807 IWL_ERR(priv, "ucode not available for device bring up\n");
5808 return -EIO;
5809 }
5810
5811 /* If platform's RF_KILL switch is NOT set to KILL */
5812 if (iwl_read32(priv, CSR_GP_CNTRL) &
5813 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5814 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5815 else {
5816 set_bit(STATUS_RF_KILL_HW, &priv->status);
5817 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5818 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
5819 return -ENODEV;
5820 }
5821 }
5822
5823 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5824
5825 rc = iwl3945_hw_nic_init(priv);
5826 if (rc) {
5827 IWL_ERR(priv, "Unable to int nic\n");
5828 return rc;
5829 }
5830
5831 /* make sure rfkill handshake bits are cleared */
5832 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5833 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5834 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5835
5836 /* clear (again), then enable host interrupts */
5837 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5838 iwl3945_enable_interrupts(priv);
5839
5840 /* really make sure rfkill handshake bits are cleared */
5841 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5842 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5843
5844 /* Copy original ucode data image from disk into backup cache.
5845 * This will be used to initialize the on-board processor's
5846 * data SRAM for a clean start when the runtime program first loads. */
5847 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5848 priv->ucode_data.len);
5849
5850 /* We return success when we resume from suspend and rf_kill is on. */
5851 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5852 return 0;
5853
5854 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5855
5856 iwl3945_clear_stations_table(priv);
5857
5858 /* load bootstrap state machine,
5859 * load bootstrap program into processor's memory,
5860 * prepare to load the "initialize" uCode */
5861 rc = iwl3945_load_bsm(priv);
5862
5863 if (rc) {
5864 IWL_ERR(priv,
5865 "Unable to set up bootstrap uCode: %d\n", rc);
5866 continue;
5867 }
5868
5869 /* start card; "initialize" will load runtime ucode */
5870 iwl3945_nic_start(priv);
5871
5872 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5873
5874 return 0;
5875 }
5876
5877 set_bit(STATUS_EXIT_PENDING, &priv->status);
5878 __iwl3945_down(priv);
5879 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5880
5881 /* tried to restart and config the device for as long as our
5882 * patience could withstand */
5883 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
5884 return -EIO;
5885 }
5886
5887
5888 /*****************************************************************************
5889 *
5890 * Workqueue callbacks
5891 *
5892 *****************************************************************************/
5893
5894 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5895 {
5896 struct iwl_priv *priv =
5897 container_of(data, struct iwl_priv, init_alive_start.work);
5898
5899 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5900 return;
5901
5902 mutex_lock(&priv->mutex);
5903 iwl3945_init_alive_start(priv);
5904 mutex_unlock(&priv->mutex);
5905 }
5906
5907 static void iwl3945_bg_alive_start(struct work_struct *data)
5908 {
5909 struct iwl_priv *priv =
5910 container_of(data, struct iwl_priv, alive_start.work);
5911
5912 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5913 return;
5914
5915 mutex_lock(&priv->mutex);
5916 iwl3945_alive_start(priv);
5917 mutex_unlock(&priv->mutex);
5918 }
5919
5920 static void iwl3945_bg_rf_kill(struct work_struct *work)
5921 {
5922 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
5923
5924 wake_up_interruptible(&priv->wait_command_queue);
5925
5926 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5927 return;
5928
5929 mutex_lock(&priv->mutex);
5930
5931 if (!iwl3945_is_rfkill(priv)) {
5932 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5933 "HW and/or SW RF Kill no longer active, restarting "
5934 "device\n");
5935 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5936 queue_work(priv->workqueue, &priv->restart);
5937 } else {
5938
5939 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5940 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5941 "disabled by SW switch\n");
5942 else
5943 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
5944 "Kill switch must be turned off for "
5945 "wireless networking to work.\n");
5946 }
5947
5948 mutex_unlock(&priv->mutex);
5949 iwl3945_rfkill_set_hw_state(priv);
5950 }
5951
5952 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5953
5954 static void iwl3945_bg_scan_check(struct work_struct *data)
5955 {
5956 struct iwl_priv *priv =
5957 container_of(data, struct iwl_priv, scan_check.work);
5958
5959 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5960 return;
5961
5962 mutex_lock(&priv->mutex);
5963 if (test_bit(STATUS_SCANNING, &priv->status) ||
5964 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5965 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5966 "Scan completion watchdog resetting adapter (%dms)\n",
5967 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
5968
5969 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5970 iwl3945_send_scan_abort(priv);
5971 }
5972 mutex_unlock(&priv->mutex);
5973 }
5974
5975 static void iwl3945_bg_request_scan(struct work_struct *data)
5976 {
5977 struct iwl_priv *priv =
5978 container_of(data, struct iwl_priv, request_scan);
5979 struct iwl_host_cmd cmd = {
5980 .id = REPLY_SCAN_CMD,
5981 .len = sizeof(struct iwl3945_scan_cmd),
5982 .meta.flags = CMD_SIZE_HUGE,
5983 };
5984 int rc = 0;
5985 struct iwl3945_scan_cmd *scan;
5986 struct ieee80211_conf *conf = NULL;
5987 u8 n_probes = 2;
5988 enum ieee80211_band band;
5989 DECLARE_SSID_BUF(ssid);
5990
5991 conf = ieee80211_get_hw_conf(priv->hw);
5992
5993 mutex_lock(&priv->mutex);
5994
5995 if (!iwl3945_is_ready(priv)) {
5996 IWL_WARN(priv, "request scan called when driver not ready.\n");
5997 goto done;
5998 }
5999
6000 /* Make sure the scan wasn't canceled before this queued work
6001 * was given the chance to run... */
6002 if (!test_bit(STATUS_SCANNING, &priv->status))
6003 goto done;
6004
6005 /* This should never be called or scheduled if there is currently
6006 * a scan active in the hardware. */
6007 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6008 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6009 "Ignoring second request.\n");
6010 rc = -EIO;
6011 goto done;
6012 }
6013
6014 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6015 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6016 goto done;
6017 }
6018
6019 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6020 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6021 goto done;
6022 }
6023
6024 if (iwl3945_is_rfkill(priv)) {
6025 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6026 goto done;
6027 }
6028
6029 if (!test_bit(STATUS_READY, &priv->status)) {
6030 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6031 goto done;
6032 }
6033
6034 if (!priv->scan_bands) {
6035 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6036 goto done;
6037 }
6038
6039 if (!priv->scan39) {
6040 priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6041 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6042 if (!priv->scan39) {
6043 rc = -ENOMEM;
6044 goto done;
6045 }
6046 }
6047 scan = priv->scan39;
6048 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6049
6050 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6051 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6052
6053 if (iwl3945_is_associated(priv)) {
6054 u16 interval = 0;
6055 u32 extra;
6056 u32 suspend_time = 100;
6057 u32 scan_suspend_time = 100;
6058 unsigned long flags;
6059
6060 IWL_DEBUG_INFO("Scanning while associated...\n");
6061
6062 spin_lock_irqsave(&priv->lock, flags);
6063 interval = priv->beacon_int;
6064 spin_unlock_irqrestore(&priv->lock, flags);
6065
6066 scan->suspend_time = 0;
6067 scan->max_out_time = cpu_to_le32(200 * 1024);
6068 if (!interval)
6069 interval = suspend_time;
6070 /*
6071 * suspend time format:
6072 * 0-19: beacon interval in usec (time before exec.)
6073 * 20-23: 0
6074 * 24-31: number of beacons (suspend between channels)
6075 */
6076
6077 extra = (suspend_time / interval) << 24;
6078 scan_suspend_time = 0xFF0FFFFF &
6079 (extra | ((suspend_time % interval) * 1024));
6080
6081 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6082 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6083 scan_suspend_time, interval);
6084 }
6085
6086 /* We should add the ability for user to lock to PASSIVE ONLY */
6087 if (priv->one_direct_scan) {
6088 IWL_DEBUG_SCAN
6089 ("Kicking off one direct scan for '%s'\n",
6090 print_ssid(ssid, priv->direct_ssid,
6091 priv->direct_ssid_len));
6092 scan->direct_scan[0].id = WLAN_EID_SSID;
6093 scan->direct_scan[0].len = priv->direct_ssid_len;
6094 memcpy(scan->direct_scan[0].ssid,
6095 priv->direct_ssid, priv->direct_ssid_len);
6096 n_probes++;
6097 } else
6098 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6099
6100 /* We don't build a direct scan probe request; the uCode will do
6101 * that based on the direct_mask added to each channel entry */
6102 scan->tx_cmd.len = cpu_to_le16(
6103 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6104 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
6105 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6106 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
6107 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6108
6109 /* flags + rate selection */
6110
6111 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6112 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6113 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6114 scan->good_CRC_th = 0;
6115 band = IEEE80211_BAND_2GHZ;
6116 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6117 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6118 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6119 band = IEEE80211_BAND_5GHZ;
6120 } else {
6121 IWL_WARN(priv, "Invalid scan band count\n");
6122 goto done;
6123 }
6124
6125 /* select Rx antennas */
6126 scan->flags |= iwl3945_get_antenna_flags(priv);
6127
6128 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
6129 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6130
6131 scan->channel_count =
6132 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
6133 n_probes,
6134 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6135
6136 if (scan->channel_count == 0) {
6137 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
6138 goto done;
6139 }
6140
6141 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6142 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6143 cmd.data = scan;
6144 scan->len = cpu_to_le16(cmd.len);
6145
6146 set_bit(STATUS_SCAN_HW, &priv->status);
6147 rc = iwl3945_send_cmd_sync(priv, &cmd);
6148 if (rc)
6149 goto done;
6150
6151 queue_delayed_work(priv->workqueue, &priv->scan_check,
6152 IWL_SCAN_CHECK_WATCHDOG);
6153
6154 mutex_unlock(&priv->mutex);
6155 return;
6156
6157 done:
6158 /* can not perform scan make sure we clear scanning
6159 * bits from status so next scan request can be performed.
6160 * if we dont clear scanning status bit here all next scan
6161 * will fail
6162 */
6163 clear_bit(STATUS_SCAN_HW, &priv->status);
6164 clear_bit(STATUS_SCANNING, &priv->status);
6165
6166 /* inform mac80211 scan aborted */
6167 queue_work(priv->workqueue, &priv->scan_completed);
6168 mutex_unlock(&priv->mutex);
6169 }
6170
6171 static void iwl3945_bg_up(struct work_struct *data)
6172 {
6173 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
6174
6175 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6176 return;
6177
6178 mutex_lock(&priv->mutex);
6179 __iwl3945_up(priv);
6180 mutex_unlock(&priv->mutex);
6181 iwl3945_rfkill_set_hw_state(priv);
6182 }
6183
6184 static void iwl3945_bg_restart(struct work_struct *data)
6185 {
6186 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
6187
6188 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6189 return;
6190
6191 iwl3945_down(priv);
6192 queue_work(priv->workqueue, &priv->up);
6193 }
6194
6195 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6196 {
6197 struct iwl_priv *priv =
6198 container_of(data, struct iwl_priv, rx_replenish);
6199
6200 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6201 return;
6202
6203 mutex_lock(&priv->mutex);
6204 iwl3945_rx_replenish(priv);
6205 mutex_unlock(&priv->mutex);
6206 }
6207
6208 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6209
6210 static void iwl3945_post_associate(struct iwl_priv *priv)
6211 {
6212 int rc = 0;
6213 struct ieee80211_conf *conf = NULL;
6214
6215 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6216 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
6217 return;
6218 }
6219
6220
6221 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
6222 priv->assoc_id, priv->active39_rxon.bssid_addr);
6223
6224 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6225 return;
6226
6227 if (!priv->vif || !priv->is_open)
6228 return;
6229
6230 iwl3945_scan_cancel_timeout(priv, 200);
6231
6232 conf = ieee80211_get_hw_conf(priv->hw);
6233
6234 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6235 iwl3945_commit_rxon(priv);
6236
6237 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6238 iwl3945_setup_rxon_timing(priv);
6239 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6240 sizeof(priv->rxon_timing), &priv->rxon_timing);
6241 if (rc)
6242 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6243 "Attempting to continue.\n");
6244
6245 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6246
6247 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6248
6249 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6250 priv->assoc_id, priv->beacon_int);
6251
6252 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6253 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6254 else
6255 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6256
6257 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6258 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6259 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6260 else
6261 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6262
6263 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6264 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6265
6266 }
6267
6268 iwl3945_commit_rxon(priv);
6269
6270 switch (priv->iw_mode) {
6271 case NL80211_IFTYPE_STATION:
6272 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6273 break;
6274
6275 case NL80211_IFTYPE_ADHOC:
6276
6277 priv->assoc_id = 1;
6278 iwl3945_add_station(priv, priv->bssid, 0, 0);
6279 iwl3945_sync_sta(priv, IWL_STA_ID,
6280 (priv->band == IEEE80211_BAND_5GHZ) ?
6281 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6282 CMD_ASYNC);
6283 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6284 iwl3945_send_beacon_cmd(priv);
6285
6286 break;
6287
6288 default:
6289 IWL_ERR(priv, "%s Should not be called in %d mode\n",
6290 __func__, priv->iw_mode);
6291 break;
6292 }
6293
6294 iwl3945_activate_qos(priv, 0);
6295
6296 /* we have just associated, don't start scan too early */
6297 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6298 }
6299
6300 static void iwl3945_bg_abort_scan(struct work_struct *work)
6301 {
6302 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
6303
6304 if (!iwl3945_is_ready(priv))
6305 return;
6306
6307 mutex_lock(&priv->mutex);
6308
6309 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6310 iwl3945_send_scan_abort(priv);
6311
6312 mutex_unlock(&priv->mutex);
6313 }
6314
6315 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6316
6317 static void iwl3945_bg_scan_completed(struct work_struct *work)
6318 {
6319 struct iwl_priv *priv =
6320 container_of(work, struct iwl_priv, scan_completed);
6321
6322 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6323
6324 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6325 return;
6326
6327 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6328 iwl3945_mac_config(priv->hw, 0);
6329
6330 ieee80211_scan_completed(priv->hw);
6331
6332 /* Since setting the TXPOWER may have been deferred while
6333 * performing the scan, fire one off */
6334 mutex_lock(&priv->mutex);
6335 iwl3945_hw_reg_send_txpower(priv);
6336 mutex_unlock(&priv->mutex);
6337 }
6338
6339 /*****************************************************************************
6340 *
6341 * mac80211 entry point functions
6342 *
6343 *****************************************************************************/
6344
6345 #define UCODE_READY_TIMEOUT (2 * HZ)
6346
6347 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6348 {
6349 struct iwl_priv *priv = hw->priv;
6350 int ret;
6351
6352 IWL_DEBUG_MAC80211("enter\n");
6353
6354 if (pci_enable_device(priv->pci_dev)) {
6355 IWL_ERR(priv, "Fail to pci_enable_device\n");
6356 return -ENODEV;
6357 }
6358 pci_restore_state(priv->pci_dev);
6359 pci_enable_msi(priv->pci_dev);
6360
6361 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6362 DRV_NAME, priv);
6363 if (ret) {
6364 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
6365 goto out_disable_msi;
6366 }
6367
6368 /* we should be verifying the device is ready to be opened */
6369 mutex_lock(&priv->mutex);
6370
6371 memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6372 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6373 * ucode filename and max sizes are card-specific. */
6374
6375 if (!priv->ucode_code.len) {
6376 ret = iwl3945_read_ucode(priv);
6377 if (ret) {
6378 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
6379 mutex_unlock(&priv->mutex);
6380 goto out_release_irq;
6381 }
6382 }
6383
6384 ret = __iwl3945_up(priv);
6385
6386 mutex_unlock(&priv->mutex);
6387
6388 iwl3945_rfkill_set_hw_state(priv);
6389
6390 if (ret)
6391 goto out_release_irq;
6392
6393 IWL_DEBUG_INFO("Start UP work.\n");
6394
6395 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6396 return 0;
6397
6398 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6399 * mac80211 will not be run successfully. */
6400 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6401 test_bit(STATUS_READY, &priv->status),
6402 UCODE_READY_TIMEOUT);
6403 if (!ret) {
6404 if (!test_bit(STATUS_READY, &priv->status)) {
6405 IWL_ERR(priv,
6406 "Wait for START_ALIVE timeout after %dms.\n",
6407 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6408 ret = -ETIMEDOUT;
6409 goto out_release_irq;
6410 }
6411 }
6412
6413 priv->is_open = 1;
6414 IWL_DEBUG_MAC80211("leave\n");
6415 return 0;
6416
6417 out_release_irq:
6418 free_irq(priv->pci_dev->irq, priv);
6419 out_disable_msi:
6420 pci_disable_msi(priv->pci_dev);
6421 pci_disable_device(priv->pci_dev);
6422 priv->is_open = 0;
6423 IWL_DEBUG_MAC80211("leave - failed\n");
6424 return ret;
6425 }
6426
6427 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6428 {
6429 struct iwl_priv *priv = hw->priv;
6430
6431 IWL_DEBUG_MAC80211("enter\n");
6432
6433 if (!priv->is_open) {
6434 IWL_DEBUG_MAC80211("leave - skip\n");
6435 return;
6436 }
6437
6438 priv->is_open = 0;
6439
6440 if (iwl3945_is_ready_rf(priv)) {
6441 /* stop mac, cancel any scan request and clear
6442 * RXON_FILTER_ASSOC_MSK BIT
6443 */
6444 mutex_lock(&priv->mutex);
6445 iwl3945_scan_cancel_timeout(priv, 100);
6446 mutex_unlock(&priv->mutex);
6447 }
6448
6449 iwl3945_down(priv);
6450
6451 flush_workqueue(priv->workqueue);
6452 free_irq(priv->pci_dev->irq, priv);
6453 pci_disable_msi(priv->pci_dev);
6454 pci_save_state(priv->pci_dev);
6455 pci_disable_device(priv->pci_dev);
6456
6457 IWL_DEBUG_MAC80211("leave\n");
6458 }
6459
6460 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6461 {
6462 struct iwl_priv *priv = hw->priv;
6463
6464 IWL_DEBUG_MAC80211("enter\n");
6465
6466 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6467 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6468
6469 if (iwl3945_tx_skb(priv, skb))
6470 dev_kfree_skb_any(skb);
6471
6472 IWL_DEBUG_MAC80211("leave\n");
6473 return NETDEV_TX_OK;
6474 }
6475
6476 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6477 struct ieee80211_if_init_conf *conf)
6478 {
6479 struct iwl_priv *priv = hw->priv;
6480 unsigned long flags;
6481
6482 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6483
6484 if (priv->vif) {
6485 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6486 return -EOPNOTSUPP;
6487 }
6488
6489 spin_lock_irqsave(&priv->lock, flags);
6490 priv->vif = conf->vif;
6491 priv->iw_mode = conf->type;
6492
6493 spin_unlock_irqrestore(&priv->lock, flags);
6494
6495 mutex_lock(&priv->mutex);
6496
6497 if (conf->mac_addr) {
6498 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6499 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6500 }
6501
6502 if (iwl3945_is_ready(priv))
6503 iwl3945_set_mode(priv, conf->type);
6504
6505 mutex_unlock(&priv->mutex);
6506
6507 IWL_DEBUG_MAC80211("leave\n");
6508 return 0;
6509 }
6510
6511 /**
6512 * iwl3945_mac_config - mac80211 config callback
6513 *
6514 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6515 * be set inappropriately and the driver currently sets the hardware up to
6516 * use it whenever needed.
6517 */
6518 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6519 {
6520 struct iwl_priv *priv = hw->priv;
6521 const struct iwl_channel_info *ch_info;
6522 struct ieee80211_conf *conf = &hw->conf;
6523 unsigned long flags;
6524 int ret = 0;
6525
6526 mutex_lock(&priv->mutex);
6527 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6528
6529 if (!iwl3945_is_ready(priv)) {
6530 IWL_DEBUG_MAC80211("leave - not ready\n");
6531 ret = -EIO;
6532 goto out;
6533 }
6534
6535 if (unlikely(!iwl3945_param_disable_hw_scan &&
6536 test_bit(STATUS_SCANNING, &priv->status))) {
6537 IWL_DEBUG_MAC80211("leave - scanning\n");
6538 set_bit(STATUS_CONF_PENDING, &priv->status);
6539 mutex_unlock(&priv->mutex);
6540 return 0;
6541 }
6542
6543 spin_lock_irqsave(&priv->lock, flags);
6544
6545 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6546 conf->channel->hw_value);
6547 if (!is_channel_valid(ch_info)) {
6548 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6549 conf->channel->hw_value, conf->channel->band);
6550 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6551 spin_unlock_irqrestore(&priv->lock, flags);
6552 ret = -EINVAL;
6553 goto out;
6554 }
6555
6556 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6557
6558 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6559
6560 /* The list of supported rates and rate mask can be different
6561 * for each phymode; since the phymode may have changed, reset
6562 * the rate mask to what mac80211 lists */
6563 iwl3945_set_rate(priv);
6564
6565 spin_unlock_irqrestore(&priv->lock, flags);
6566
6567 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6568 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6569 iwl3945_hw_channel_switch(priv, conf->channel);
6570 goto out;
6571 }
6572 #endif
6573
6574 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6575
6576 if (!conf->radio_enabled) {
6577 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6578 goto out;
6579 }
6580
6581 if (iwl3945_is_rfkill(priv)) {
6582 IWL_DEBUG_MAC80211("leave - RF kill\n");
6583 ret = -EIO;
6584 goto out;
6585 }
6586
6587 iwl3945_set_rate(priv);
6588
6589 if (memcmp(&priv->active39_rxon,
6590 &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
6591 iwl3945_commit_rxon(priv);
6592 else
6593 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6594
6595 IWL_DEBUG_MAC80211("leave\n");
6596
6597 out:
6598 clear_bit(STATUS_CONF_PENDING, &priv->status);
6599 mutex_unlock(&priv->mutex);
6600 return ret;
6601 }
6602
6603 static void iwl3945_config_ap(struct iwl_priv *priv)
6604 {
6605 int rc = 0;
6606
6607 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6608 return;
6609
6610 /* The following should be done only at AP bring up */
6611 if (!(iwl3945_is_associated(priv))) {
6612
6613 /* RXON - unassoc (to set timing command) */
6614 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6615 iwl3945_commit_rxon(priv);
6616
6617 /* RXON Timing */
6618 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6619 iwl3945_setup_rxon_timing(priv);
6620 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6621 sizeof(priv->rxon_timing), &priv->rxon_timing);
6622 if (rc)
6623 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6624 "Attempting to continue.\n");
6625
6626 /* FIXME: what should be the assoc_id for AP? */
6627 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6628 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6629 priv->staging39_rxon.flags |=
6630 RXON_FLG_SHORT_PREAMBLE_MSK;
6631 else
6632 priv->staging39_rxon.flags &=
6633 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6634
6635 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6636 if (priv->assoc_capability &
6637 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6638 priv->staging39_rxon.flags |=
6639 RXON_FLG_SHORT_SLOT_MSK;
6640 else
6641 priv->staging39_rxon.flags &=
6642 ~RXON_FLG_SHORT_SLOT_MSK;
6643
6644 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6645 priv->staging39_rxon.flags &=
6646 ~RXON_FLG_SHORT_SLOT_MSK;
6647 }
6648 /* restore RXON assoc */
6649 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6650 iwl3945_commit_rxon(priv);
6651 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
6652 }
6653 iwl3945_send_beacon_cmd(priv);
6654
6655 /* FIXME - we need to add code here to detect a totally new
6656 * configuration, reset the AP, unassoc, rxon timing, assoc,
6657 * clear sta table, add BCAST sta... */
6658 }
6659
6660 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6661 struct ieee80211_vif *vif,
6662 struct ieee80211_if_conf *conf)
6663 {
6664 struct iwl_priv *priv = hw->priv;
6665 int rc;
6666
6667 if (conf == NULL)
6668 return -EIO;
6669
6670 if (priv->vif != vif) {
6671 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6672 return 0;
6673 }
6674
6675 /* handle this temporarily here */
6676 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6677 conf->changed & IEEE80211_IFCC_BEACON) {
6678 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6679 if (!beacon)
6680 return -ENOMEM;
6681 mutex_lock(&priv->mutex);
6682 rc = iwl3945_mac_beacon_update(hw, beacon);
6683 mutex_unlock(&priv->mutex);
6684 if (rc)
6685 return rc;
6686 }
6687
6688 if (!iwl3945_is_alive(priv))
6689 return -EAGAIN;
6690
6691 mutex_lock(&priv->mutex);
6692
6693 if (conf->bssid)
6694 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6695
6696 /*
6697 * very dubious code was here; the probe filtering flag is never set:
6698 *
6699 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6700 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6701 */
6702
6703 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6704 if (!conf->bssid) {
6705 conf->bssid = priv->mac_addr;
6706 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6707 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6708 conf->bssid);
6709 }
6710 if (priv->ibss_beacon)
6711 dev_kfree_skb(priv->ibss_beacon);
6712
6713 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6714 }
6715
6716 if (iwl3945_is_rfkill(priv))
6717 goto done;
6718
6719 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6720 !is_multicast_ether_addr(conf->bssid)) {
6721 /* If there is currently a HW scan going on in the background
6722 * then we need to cancel it else the RXON below will fail. */
6723 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6724 IWL_WARN(priv, "Aborted scan still in progress "
6725 "after 100ms\n");
6726 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6727 mutex_unlock(&priv->mutex);
6728 return -EAGAIN;
6729 }
6730 memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6731
6732 /* TODO: Audit driver for usage of these members and see
6733 * if mac80211 deprecates them (priv->bssid looks like it
6734 * shouldn't be there, but I haven't scanned the IBSS code
6735 * to verify) - jpk */
6736 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6737
6738 if (priv->iw_mode == NL80211_IFTYPE_AP)
6739 iwl3945_config_ap(priv);
6740 else {
6741 rc = iwl3945_commit_rxon(priv);
6742 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6743 iwl3945_add_station(priv,
6744 priv->active39_rxon.bssid_addr, 1, 0);
6745 }
6746
6747 } else {
6748 iwl3945_scan_cancel_timeout(priv, 100);
6749 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6750 iwl3945_commit_rxon(priv);
6751 }
6752
6753 done:
6754 IWL_DEBUG_MAC80211("leave\n");
6755 mutex_unlock(&priv->mutex);
6756
6757 return 0;
6758 }
6759
6760 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6761 unsigned int changed_flags,
6762 unsigned int *total_flags,
6763 int mc_count, struct dev_addr_list *mc_list)
6764 {
6765 struct iwl_priv *priv = hw->priv;
6766 __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
6767
6768 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6769 changed_flags, *total_flags);
6770
6771 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6772 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6773 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6774 else
6775 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6776 }
6777 if (changed_flags & FIF_ALLMULTI) {
6778 if (*total_flags & FIF_ALLMULTI)
6779 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6780 else
6781 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6782 }
6783 if (changed_flags & FIF_CONTROL) {
6784 if (*total_flags & FIF_CONTROL)
6785 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6786 else
6787 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6788 }
6789 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6790 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6791 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6792 else
6793 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6794 }
6795
6796 /* We avoid iwl_commit_rxon here to commit the new filter flags
6797 * since mac80211 will call ieee80211_hw_config immediately.
6798 * (mc_list is not supported at this time). Otherwise, we need to
6799 * queue a background iwl_commit_rxon work.
6800 */
6801
6802 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6803 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6804 }
6805
6806 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6807 struct ieee80211_if_init_conf *conf)
6808 {
6809 struct iwl_priv *priv = hw->priv;
6810
6811 IWL_DEBUG_MAC80211("enter\n");
6812
6813 mutex_lock(&priv->mutex);
6814
6815 if (iwl3945_is_ready_rf(priv)) {
6816 iwl3945_scan_cancel_timeout(priv, 100);
6817 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6818 iwl3945_commit_rxon(priv);
6819 }
6820 if (priv->vif == conf->vif) {
6821 priv->vif = NULL;
6822 memset(priv->bssid, 0, ETH_ALEN);
6823 }
6824 mutex_unlock(&priv->mutex);
6825
6826 IWL_DEBUG_MAC80211("leave\n");
6827 }
6828
6829 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6830
6831 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6832 struct ieee80211_vif *vif,
6833 struct ieee80211_bss_conf *bss_conf,
6834 u32 changes)
6835 {
6836 struct iwl_priv *priv = hw->priv;
6837
6838 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6839
6840 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6841 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6842 bss_conf->use_short_preamble);
6843 if (bss_conf->use_short_preamble)
6844 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6845 else
6846 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6847 }
6848
6849 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6850 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6851 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6852 priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6853 else
6854 priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6855 }
6856
6857 if (changes & BSS_CHANGED_ASSOC) {
6858 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6859 /* This should never happen as this function should
6860 * never be called from interrupt context. */
6861 if (WARN_ON_ONCE(in_interrupt()))
6862 return;
6863 if (bss_conf->assoc) {
6864 priv->assoc_id = bss_conf->aid;
6865 priv->beacon_int = bss_conf->beacon_int;
6866 priv->timestamp = bss_conf->timestamp;
6867 priv->assoc_capability = bss_conf->assoc_capability;
6868 priv->next_scan_jiffies = jiffies +
6869 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6870 mutex_lock(&priv->mutex);
6871 iwl3945_post_associate(priv);
6872 mutex_unlock(&priv->mutex);
6873 } else {
6874 priv->assoc_id = 0;
6875 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6876 }
6877 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6878 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6879 iwl3945_send_rxon_assoc(priv);
6880 }
6881
6882 }
6883
6884 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6885 {
6886 int rc = 0;
6887 unsigned long flags;
6888 struct iwl_priv *priv = hw->priv;
6889 DECLARE_SSID_BUF(ssid_buf);
6890
6891 IWL_DEBUG_MAC80211("enter\n");
6892
6893 mutex_lock(&priv->mutex);
6894 spin_lock_irqsave(&priv->lock, flags);
6895
6896 if (!iwl3945_is_ready_rf(priv)) {
6897 rc = -EIO;
6898 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6899 goto out_unlock;
6900 }
6901
6902 /* we don't schedule scan within next_scan_jiffies period */
6903 if (priv->next_scan_jiffies &&
6904 time_after(priv->next_scan_jiffies, jiffies)) {
6905 rc = -EAGAIN;
6906 goto out_unlock;
6907 }
6908 /* if we just finished scan ask for delay for a broadcast scan */
6909 if ((len == 0) && priv->last_scan_jiffies &&
6910 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6911 jiffies)) {
6912 rc = -EAGAIN;
6913 goto out_unlock;
6914 }
6915 if (len) {
6916 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6917 print_ssid(ssid_buf, ssid, len), (int)len);
6918
6919 priv->one_direct_scan = 1;
6920 priv->direct_ssid_len = (u8)
6921 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6922 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6923 } else
6924 priv->one_direct_scan = 0;
6925
6926 rc = iwl3945_scan_initiate(priv);
6927
6928 IWL_DEBUG_MAC80211("leave\n");
6929
6930 out_unlock:
6931 spin_unlock_irqrestore(&priv->lock, flags);
6932 mutex_unlock(&priv->mutex);
6933
6934 return rc;
6935 }
6936
6937 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
6938 const u8 *local_addr, const u8 *addr,
6939 struct ieee80211_key_conf *key)
6940 {
6941 struct iwl_priv *priv = hw->priv;
6942 int rc = 0;
6943 u8 sta_id;
6944
6945 IWL_DEBUG_MAC80211("enter\n");
6946
6947 if (!iwl3945_param_hwcrypto) {
6948 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6949 return -EOPNOTSUPP;
6950 }
6951
6952 if (is_zero_ether_addr(addr))
6953 /* only support pairwise keys */
6954 return -EOPNOTSUPP;
6955
6956 sta_id = iwl3945_hw_find_station(priv, addr);
6957 if (sta_id == IWL_INVALID_STATION) {
6958 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
6959 addr);
6960 return -EINVAL;
6961 }
6962
6963 mutex_lock(&priv->mutex);
6964
6965 iwl3945_scan_cancel_timeout(priv, 100);
6966
6967 switch (cmd) {
6968 case SET_KEY:
6969 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
6970 if (!rc) {
6971 iwl3945_set_rxon_hwcrypto(priv, 1);
6972 iwl3945_commit_rxon(priv);
6973 key->hw_key_idx = sta_id;
6974 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
6975 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
6976 }
6977 break;
6978 case DISABLE_KEY:
6979 rc = iwl3945_clear_sta_key_info(priv, sta_id);
6980 if (!rc) {
6981 iwl3945_set_rxon_hwcrypto(priv, 0);
6982 iwl3945_commit_rxon(priv);
6983 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
6984 }
6985 break;
6986 default:
6987 rc = -EINVAL;
6988 }
6989
6990 IWL_DEBUG_MAC80211("leave\n");
6991 mutex_unlock(&priv->mutex);
6992
6993 return rc;
6994 }
6995
6996 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
6997 const struct ieee80211_tx_queue_params *params)
6998 {
6999 struct iwl_priv *priv = hw->priv;
7000 unsigned long flags;
7001 int q;
7002
7003 IWL_DEBUG_MAC80211("enter\n");
7004
7005 if (!iwl3945_is_ready_rf(priv)) {
7006 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7007 return -EIO;
7008 }
7009
7010 if (queue >= AC_NUM) {
7011 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7012 return 0;
7013 }
7014
7015 q = AC_NUM - 1 - queue;
7016
7017 spin_lock_irqsave(&priv->lock, flags);
7018
7019 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7020 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7021 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7022 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7023 cpu_to_le16((params->txop * 32));
7024
7025 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7026 priv->qos_data.qos_active = 1;
7027
7028 spin_unlock_irqrestore(&priv->lock, flags);
7029
7030 mutex_lock(&priv->mutex);
7031 if (priv->iw_mode == NL80211_IFTYPE_AP)
7032 iwl3945_activate_qos(priv, 1);
7033 else if (priv->assoc_id && iwl3945_is_associated(priv))
7034 iwl3945_activate_qos(priv, 0);
7035
7036 mutex_unlock(&priv->mutex);
7037
7038 IWL_DEBUG_MAC80211("leave\n");
7039 return 0;
7040 }
7041
7042 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7043 struct ieee80211_tx_queue_stats *stats)
7044 {
7045 struct iwl_priv *priv = hw->priv;
7046 int i, avail;
7047 struct iwl3945_tx_queue *txq;
7048 struct iwl_queue *q;
7049 unsigned long flags;
7050
7051 IWL_DEBUG_MAC80211("enter\n");
7052
7053 if (!iwl3945_is_ready_rf(priv)) {
7054 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7055 return -EIO;
7056 }
7057
7058 spin_lock_irqsave(&priv->lock, flags);
7059
7060 for (i = 0; i < AC_NUM; i++) {
7061 txq = &priv->txq39[i];
7062 q = &txq->q;
7063 avail = iwl_queue_space(q);
7064
7065 stats[i].len = q->n_window - avail;
7066 stats[i].limit = q->n_window - q->high_mark;
7067 stats[i].count = q->n_window;
7068
7069 }
7070 spin_unlock_irqrestore(&priv->lock, flags);
7071
7072 IWL_DEBUG_MAC80211("leave\n");
7073
7074 return 0;
7075 }
7076
7077 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7078 {
7079 struct iwl_priv *priv = hw->priv;
7080 unsigned long flags;
7081
7082 mutex_lock(&priv->mutex);
7083 IWL_DEBUG_MAC80211("enter\n");
7084
7085 iwl3945_reset_qos(priv);
7086
7087 spin_lock_irqsave(&priv->lock, flags);
7088 priv->assoc_id = 0;
7089 priv->assoc_capability = 0;
7090 priv->call_post_assoc_from_beacon = 0;
7091
7092 /* new association get rid of ibss beacon skb */
7093 if (priv->ibss_beacon)
7094 dev_kfree_skb(priv->ibss_beacon);
7095
7096 priv->ibss_beacon = NULL;
7097
7098 priv->beacon_int = priv->hw->conf.beacon_int;
7099 priv->timestamp = 0;
7100 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
7101 priv->beacon_int = 0;
7102
7103 spin_unlock_irqrestore(&priv->lock, flags);
7104
7105 if (!iwl3945_is_ready_rf(priv)) {
7106 IWL_DEBUG_MAC80211("leave - not ready\n");
7107 mutex_unlock(&priv->mutex);
7108 return;
7109 }
7110
7111 /* we are restarting association process
7112 * clear RXON_FILTER_ASSOC_MSK bit
7113 */
7114 if (priv->iw_mode != NL80211_IFTYPE_AP) {
7115 iwl3945_scan_cancel_timeout(priv, 100);
7116 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7117 iwl3945_commit_rxon(priv);
7118 }
7119
7120 /* Per mac80211.h: This is only used in IBSS mode... */
7121 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7122
7123 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7124 mutex_unlock(&priv->mutex);
7125 return;
7126 }
7127
7128 iwl3945_set_rate(priv);
7129
7130 mutex_unlock(&priv->mutex);
7131
7132 IWL_DEBUG_MAC80211("leave\n");
7133
7134 }
7135
7136 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7137 {
7138 struct iwl_priv *priv = hw->priv;
7139 unsigned long flags;
7140
7141 IWL_DEBUG_MAC80211("enter\n");
7142
7143 if (!iwl3945_is_ready_rf(priv)) {
7144 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7145 return -EIO;
7146 }
7147
7148 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7149 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7150 return -EIO;
7151 }
7152
7153 spin_lock_irqsave(&priv->lock, flags);
7154
7155 if (priv->ibss_beacon)
7156 dev_kfree_skb(priv->ibss_beacon);
7157
7158 priv->ibss_beacon = skb;
7159
7160 priv->assoc_id = 0;
7161
7162 IWL_DEBUG_MAC80211("leave\n");
7163 spin_unlock_irqrestore(&priv->lock, flags);
7164
7165 iwl3945_reset_qos(priv);
7166
7167 iwl3945_post_associate(priv);
7168
7169
7170 return 0;
7171 }
7172
7173 /*****************************************************************************
7174 *
7175 * sysfs attributes
7176 *
7177 *****************************************************************************/
7178
7179 #ifdef CONFIG_IWL3945_DEBUG
7180
7181 /*
7182 * The following adds a new attribute to the sysfs representation
7183 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7184 * used for controlling the debug level.
7185 *
7186 * See the level definitions in iwl for details.
7187 */
7188 static ssize_t show_debug_level(struct device *d,
7189 struct device_attribute *attr, char *buf)
7190 {
7191 struct iwl_priv *priv = d->driver_data;
7192
7193 return sprintf(buf, "0x%08X\n", priv->debug_level);
7194 }
7195 static ssize_t store_debug_level(struct device *d,
7196 struct device_attribute *attr,
7197 const char *buf, size_t count)
7198 {
7199 struct iwl_priv *priv = d->driver_data;
7200 unsigned long val;
7201 int ret;
7202
7203 ret = strict_strtoul(buf, 0, &val);
7204 if (ret)
7205 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
7206 else
7207 priv->debug_level = val;
7208
7209 return strnlen(buf, count);
7210 }
7211
7212 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
7213 show_debug_level, store_debug_level);
7214
7215 #endif /* CONFIG_IWL3945_DEBUG */
7216
7217 static ssize_t show_temperature(struct device *d,
7218 struct device_attribute *attr, char *buf)
7219 {
7220 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7221
7222 if (!iwl3945_is_alive(priv))
7223 return -EAGAIN;
7224
7225 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7226 }
7227
7228 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7229
7230 static ssize_t show_tx_power(struct device *d,
7231 struct device_attribute *attr, char *buf)
7232 {
7233 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7234 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7235 }
7236
7237 static ssize_t store_tx_power(struct device *d,
7238 struct device_attribute *attr,
7239 const char *buf, size_t count)
7240 {
7241 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7242 char *p = (char *)buf;
7243 u32 val;
7244
7245 val = simple_strtoul(p, &p, 10);
7246 if (p == buf)
7247 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
7248 else
7249 iwl3945_hw_reg_set_txpower(priv, val);
7250
7251 return count;
7252 }
7253
7254 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7255
7256 static ssize_t show_flags(struct device *d,
7257 struct device_attribute *attr, char *buf)
7258 {
7259 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7260
7261 return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
7262 }
7263
7264 static ssize_t store_flags(struct device *d,
7265 struct device_attribute *attr,
7266 const char *buf, size_t count)
7267 {
7268 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7269 u32 flags = simple_strtoul(buf, NULL, 0);
7270
7271 mutex_lock(&priv->mutex);
7272 if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
7273 /* Cancel any currently running scans... */
7274 if (iwl3945_scan_cancel_timeout(priv, 100))
7275 IWL_WARN(priv, "Could not cancel scan.\n");
7276 else {
7277 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7278 flags);
7279 priv->staging39_rxon.flags = cpu_to_le32(flags);
7280 iwl3945_commit_rxon(priv);
7281 }
7282 }
7283 mutex_unlock(&priv->mutex);
7284
7285 return count;
7286 }
7287
7288 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7289
7290 static ssize_t show_filter_flags(struct device *d,
7291 struct device_attribute *attr, char *buf)
7292 {
7293 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7294
7295 return sprintf(buf, "0x%04X\n",
7296 le32_to_cpu(priv->active39_rxon.filter_flags));
7297 }
7298
7299 static ssize_t store_filter_flags(struct device *d,
7300 struct device_attribute *attr,
7301 const char *buf, size_t count)
7302 {
7303 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7304 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7305
7306 mutex_lock(&priv->mutex);
7307 if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
7308 /* Cancel any currently running scans... */
7309 if (iwl3945_scan_cancel_timeout(priv, 100))
7310 IWL_WARN(priv, "Could not cancel scan.\n");
7311 else {
7312 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7313 "0x%04X\n", filter_flags);
7314 priv->staging39_rxon.filter_flags =
7315 cpu_to_le32(filter_flags);
7316 iwl3945_commit_rxon(priv);
7317 }
7318 }
7319 mutex_unlock(&priv->mutex);
7320
7321 return count;
7322 }
7323
7324 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7325 store_filter_flags);
7326
7327 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7328
7329 static ssize_t show_measurement(struct device *d,
7330 struct device_attribute *attr, char *buf)
7331 {
7332 struct iwl_priv *priv = dev_get_drvdata(d);
7333 struct iwl_spectrum_notification measure_report;
7334 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7335 u8 *data = (u8 *)&measure_report;
7336 unsigned long flags;
7337
7338 spin_lock_irqsave(&priv->lock, flags);
7339 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7340 spin_unlock_irqrestore(&priv->lock, flags);
7341 return 0;
7342 }
7343 memcpy(&measure_report, &priv->measure_report, size);
7344 priv->measurement_status = 0;
7345 spin_unlock_irqrestore(&priv->lock, flags);
7346
7347 while (size && (PAGE_SIZE - len)) {
7348 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7349 PAGE_SIZE - len, 1);
7350 len = strlen(buf);
7351 if (PAGE_SIZE - len)
7352 buf[len++] = '\n';
7353
7354 ofs += 16;
7355 size -= min(size, 16U);
7356 }
7357
7358 return len;
7359 }
7360
7361 static ssize_t store_measurement(struct device *d,
7362 struct device_attribute *attr,
7363 const char *buf, size_t count)
7364 {
7365 struct iwl_priv *priv = dev_get_drvdata(d);
7366 struct ieee80211_measurement_params params = {
7367 .channel = le16_to_cpu(priv->active39_rxon.channel),
7368 .start_time = cpu_to_le64(priv->last_tsf),
7369 .duration = cpu_to_le16(1),
7370 };
7371 u8 type = IWL_MEASURE_BASIC;
7372 u8 buffer[32];
7373 u8 channel;
7374
7375 if (count) {
7376 char *p = buffer;
7377 strncpy(buffer, buf, min(sizeof(buffer), count));
7378 channel = simple_strtoul(p, NULL, 0);
7379 if (channel)
7380 params.channel = channel;
7381
7382 p = buffer;
7383 while (*p && *p != ' ')
7384 p++;
7385 if (*p)
7386 type = simple_strtoul(p + 1, NULL, 0);
7387 }
7388
7389 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7390 "channel %d (for '%s')\n", type, params.channel, buf);
7391 iwl3945_get_measurement(priv, &params, type);
7392
7393 return count;
7394 }
7395
7396 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7397 show_measurement, store_measurement);
7398 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7399
7400 static ssize_t store_retry_rate(struct device *d,
7401 struct device_attribute *attr,
7402 const char *buf, size_t count)
7403 {
7404 struct iwl_priv *priv = dev_get_drvdata(d);
7405
7406 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7407 if (priv->retry_rate <= 0)
7408 priv->retry_rate = 1;
7409
7410 return count;
7411 }
7412
7413 static ssize_t show_retry_rate(struct device *d,
7414 struct device_attribute *attr, char *buf)
7415 {
7416 struct iwl_priv *priv = dev_get_drvdata(d);
7417 return sprintf(buf, "%d", priv->retry_rate);
7418 }
7419
7420 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7421 store_retry_rate);
7422
7423 static ssize_t store_power_level(struct device *d,
7424 struct device_attribute *attr,
7425 const char *buf, size_t count)
7426 {
7427 struct iwl_priv *priv = dev_get_drvdata(d);
7428 int rc;
7429 int mode;
7430
7431 mode = simple_strtoul(buf, NULL, 0);
7432 mutex_lock(&priv->mutex);
7433
7434 if (!iwl3945_is_ready(priv)) {
7435 rc = -EAGAIN;
7436 goto out;
7437 }
7438
7439 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
7440 (mode == IWL39_POWER_AC))
7441 mode = IWL39_POWER_AC;
7442 else
7443 mode |= IWL_POWER_ENABLED;
7444
7445 if (mode != priv->power_mode) {
7446 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7447 if (rc) {
7448 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7449 goto out;
7450 }
7451 priv->power_mode = mode;
7452 }
7453
7454 rc = count;
7455
7456 out:
7457 mutex_unlock(&priv->mutex);
7458 return rc;
7459 }
7460
7461 #define MAX_WX_STRING 80
7462
7463 /* Values are in microsecond */
7464 static const s32 timeout_duration[] = {
7465 350000,
7466 250000,
7467 75000,
7468 37000,
7469 25000,
7470 };
7471 static const s32 period_duration[] = {
7472 400000,
7473 700000,
7474 1000000,
7475 1000000,
7476 1000000
7477 };
7478
7479 static ssize_t show_power_level(struct device *d,
7480 struct device_attribute *attr, char *buf)
7481 {
7482 struct iwl_priv *priv = dev_get_drvdata(d);
7483 int level = IWL_POWER_LEVEL(priv->power_mode);
7484 char *p = buf;
7485
7486 p += sprintf(p, "%d ", level);
7487 switch (level) {
7488 case IWL_POWER_MODE_CAM:
7489 case IWL39_POWER_AC:
7490 p += sprintf(p, "(AC)");
7491 break;
7492 case IWL39_POWER_BATTERY:
7493 p += sprintf(p, "(BATTERY)");
7494 break;
7495 default:
7496 p += sprintf(p,
7497 "(Timeout %dms, Period %dms)",
7498 timeout_duration[level - 1] / 1000,
7499 period_duration[level - 1] / 1000);
7500 }
7501
7502 if (!(priv->power_mode & IWL_POWER_ENABLED))
7503 p += sprintf(p, " OFF\n");
7504 else
7505 p += sprintf(p, " \n");
7506
7507 return p - buf + 1;
7508
7509 }
7510
7511 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7512 store_power_level);
7513
7514 static ssize_t show_channels(struct device *d,
7515 struct device_attribute *attr, char *buf)
7516 {
7517 /* all this shit doesn't belong into sysfs anyway */
7518 return 0;
7519 }
7520
7521 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7522
7523 static ssize_t show_statistics(struct device *d,
7524 struct device_attribute *attr, char *buf)
7525 {
7526 struct iwl_priv *priv = dev_get_drvdata(d);
7527 u32 size = sizeof(struct iwl3945_notif_statistics);
7528 u32 len = 0, ofs = 0;
7529 u8 *data = (u8 *)&priv->statistics_39;
7530 int rc = 0;
7531
7532 if (!iwl3945_is_alive(priv))
7533 return -EAGAIN;
7534
7535 mutex_lock(&priv->mutex);
7536 rc = iwl3945_send_statistics_request(priv);
7537 mutex_unlock(&priv->mutex);
7538
7539 if (rc) {
7540 len = sprintf(buf,
7541 "Error sending statistics request: 0x%08X\n", rc);
7542 return len;
7543 }
7544
7545 while (size && (PAGE_SIZE - len)) {
7546 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7547 PAGE_SIZE - len, 1);
7548 len = strlen(buf);
7549 if (PAGE_SIZE - len)
7550 buf[len++] = '\n';
7551
7552 ofs += 16;
7553 size -= min(size, 16U);
7554 }
7555
7556 return len;
7557 }
7558
7559 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7560
7561 static ssize_t show_antenna(struct device *d,
7562 struct device_attribute *attr, char *buf)
7563 {
7564 struct iwl_priv *priv = dev_get_drvdata(d);
7565
7566 if (!iwl3945_is_alive(priv))
7567 return -EAGAIN;
7568
7569 return sprintf(buf, "%d\n", priv->antenna);
7570 }
7571
7572 static ssize_t store_antenna(struct device *d,
7573 struct device_attribute *attr,
7574 const char *buf, size_t count)
7575 {
7576 int ant;
7577 struct iwl_priv *priv = dev_get_drvdata(d);
7578
7579 if (count == 0)
7580 return 0;
7581
7582 if (sscanf(buf, "%1i", &ant) != 1) {
7583 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7584 return count;
7585 }
7586
7587 if ((ant >= 0) && (ant <= 2)) {
7588 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7589 priv->antenna = (enum iwl3945_antenna)ant;
7590 } else
7591 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7592
7593
7594 return count;
7595 }
7596
7597 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7598
7599 static ssize_t show_status(struct device *d,
7600 struct device_attribute *attr, char *buf)
7601 {
7602 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7603 if (!iwl3945_is_alive(priv))
7604 return -EAGAIN;
7605 return sprintf(buf, "0x%08x\n", (int)priv->status);
7606 }
7607
7608 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7609
7610 static ssize_t dump_error_log(struct device *d,
7611 struct device_attribute *attr,
7612 const char *buf, size_t count)
7613 {
7614 char *p = (char *)buf;
7615
7616 if (p[0] == '1')
7617 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
7618
7619 return strnlen(buf, count);
7620 }
7621
7622 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7623
7624 static ssize_t dump_event_log(struct device *d,
7625 struct device_attribute *attr,
7626 const char *buf, size_t count)
7627 {
7628 char *p = (char *)buf;
7629
7630 if (p[0] == '1')
7631 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
7632
7633 return strnlen(buf, count);
7634 }
7635
7636 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7637
7638 /*****************************************************************************
7639 *
7640 * driver setup and tear down
7641 *
7642 *****************************************************************************/
7643
7644 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
7645 {
7646 priv->workqueue = create_workqueue(DRV_NAME);
7647
7648 init_waitqueue_head(&priv->wait_command_queue);
7649
7650 INIT_WORK(&priv->up, iwl3945_bg_up);
7651 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7652 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7653 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7654 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7655 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7656 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7657 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7658 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7659 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7660 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7661
7662 iwl3945_hw_setup_deferred_work(priv);
7663
7664 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7665 iwl3945_irq_tasklet, (unsigned long)priv);
7666 }
7667
7668 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
7669 {
7670 iwl3945_hw_cancel_deferred_work(priv);
7671
7672 cancel_delayed_work_sync(&priv->init_alive_start);
7673 cancel_delayed_work(&priv->scan_check);
7674 cancel_delayed_work(&priv->alive_start);
7675 cancel_work_sync(&priv->beacon_update);
7676 }
7677
7678 static struct attribute *iwl3945_sysfs_entries[] = {
7679 &dev_attr_antenna.attr,
7680 &dev_attr_channels.attr,
7681 &dev_attr_dump_errors.attr,
7682 &dev_attr_dump_events.attr,
7683 &dev_attr_flags.attr,
7684 &dev_attr_filter_flags.attr,
7685 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7686 &dev_attr_measurement.attr,
7687 #endif
7688 &dev_attr_power_level.attr,
7689 &dev_attr_retry_rate.attr,
7690 &dev_attr_statistics.attr,
7691 &dev_attr_status.attr,
7692 &dev_attr_temperature.attr,
7693 &dev_attr_tx_power.attr,
7694 #ifdef CONFIG_IWL3945_DEBUG
7695 &dev_attr_debug_level.attr,
7696 #endif
7697 NULL
7698 };
7699
7700 static struct attribute_group iwl3945_attribute_group = {
7701 .name = NULL, /* put in device directory */
7702 .attrs = iwl3945_sysfs_entries,
7703 };
7704
7705 static struct ieee80211_ops iwl3945_hw_ops = {
7706 .tx = iwl3945_mac_tx,
7707 .start = iwl3945_mac_start,
7708 .stop = iwl3945_mac_stop,
7709 .add_interface = iwl3945_mac_add_interface,
7710 .remove_interface = iwl3945_mac_remove_interface,
7711 .config = iwl3945_mac_config,
7712 .config_interface = iwl3945_mac_config_interface,
7713 .configure_filter = iwl3945_configure_filter,
7714 .set_key = iwl3945_mac_set_key,
7715 .get_tx_stats = iwl3945_mac_get_tx_stats,
7716 .conf_tx = iwl3945_mac_conf_tx,
7717 .reset_tsf = iwl3945_mac_reset_tsf,
7718 .bss_info_changed = iwl3945_bss_info_changed,
7719 .hw_scan = iwl3945_mac_hw_scan
7720 };
7721
7722 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7723 {
7724 int err = 0;
7725 struct iwl_priv *priv;
7726 struct ieee80211_hw *hw;
7727 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
7728 unsigned long flags;
7729
7730 /***********************
7731 * 1. Allocating HW data
7732 * ********************/
7733
7734 /* mac80211 allocates memory for this device instance, including
7735 * space for this driver's private structure */
7736 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl3945_hw_ops);
7737 if (hw == NULL) {
7738 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7739 err = -ENOMEM;
7740 goto out;
7741 }
7742
7743 SET_IEEE80211_DEV(hw, &pdev->dev);
7744
7745 priv = hw->priv;
7746 priv->hw = hw;
7747 priv->pci_dev = pdev;
7748 priv->cfg = cfg;
7749
7750 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7751 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7752 IWL_ERR(priv,
7753 "invalid queues_num, should be between %d and %d\n",
7754 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7755 err = -EINVAL;
7756 goto out;
7757 }
7758
7759 /* Disabling hardware scan means that mac80211 will perform scans
7760 * "the hard way", rather than using device's scan. */
7761 if (iwl3945_param_disable_hw_scan) {
7762 IWL_DEBUG_INFO("Disabling hw_scan\n");
7763 iwl3945_hw_ops.hw_scan = NULL;
7764 }
7765
7766 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7767 hw->rate_control_algorithm = "iwl-3945-rs";
7768 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7769
7770 /* Select antenna (may be helpful if only one antenna is connected) */
7771 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7772 #ifdef CONFIG_IWL3945_DEBUG
7773 priv->debug_level = iwl3945_param_debug;
7774 atomic_set(&priv->restrict_refcnt, 0);
7775 #endif
7776
7777 /* Tell mac80211 our characteristics */
7778 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7779 IEEE80211_HW_NOISE_DBM;
7780
7781 hw->wiphy->interface_modes =
7782 BIT(NL80211_IFTYPE_STATION) |
7783 BIT(NL80211_IFTYPE_ADHOC);
7784
7785 hw->wiphy->fw_handles_regulatory = true;
7786
7787 /* 4 EDCA QOS priorities */
7788 hw->queues = 4;
7789
7790 /***************************
7791 * 2. Initializing PCI bus
7792 * *************************/
7793 if (pci_enable_device(pdev)) {
7794 err = -ENODEV;
7795 goto out_ieee80211_free_hw;
7796 }
7797
7798 pci_set_master(pdev);
7799
7800 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7801 if (!err)
7802 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7803 if (err) {
7804 IWL_WARN(priv, "No suitable DMA available.\n");
7805 goto out_pci_disable_device;
7806 }
7807
7808 pci_set_drvdata(pdev, priv);
7809 err = pci_request_regions(pdev, DRV_NAME);
7810 if (err)
7811 goto out_pci_disable_device;
7812
7813 /***********************
7814 * 3. Read REV Register
7815 * ********************/
7816 priv->hw_base = pci_iomap(pdev, 0, 0);
7817 if (!priv->hw_base) {
7818 err = -ENODEV;
7819 goto out_pci_release_regions;
7820 }
7821
7822 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7823 (unsigned long long) pci_resource_len(pdev, 0));
7824 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7825
7826 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7827 * PCI Tx retries from interfering with C3 CPU state */
7828 pci_write_config_byte(pdev, 0x41, 0x00);
7829
7830 /* nic init */
7831 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7832 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7833
7834 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7835 err = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
7836 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7837 if (err < 0) {
7838 IWL_DEBUG_INFO("Failed to init the card\n");
7839 goto out_remove_sysfs;
7840 }
7841
7842 /***********************
7843 * 4. Read EEPROM
7844 * ********************/
7845 /* Read the EEPROM */
7846 err = iwl3945_eeprom_init(priv);
7847 if (err) {
7848 IWL_ERR(priv, "Unable to init EEPROM\n");
7849 goto out_remove_sysfs;
7850 }
7851 /* MAC Address location in EEPROM same for 3945/4965 */
7852 get_eeprom_mac(priv, priv->mac_addr);
7853 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7854 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7855
7856 /***********************
7857 * 5. Setup HW Constants
7858 * ********************/
7859 /* Device-specific setup */
7860 if (iwl3945_hw_set_hw_params(priv)) {
7861 IWL_ERR(priv, "failed to set hw settings\n");
7862 goto out_iounmap;
7863 }
7864
7865 /***********************
7866 * 6. Setup priv
7867 * ********************/
7868 priv->retry_rate = 1;
7869 priv->ibss_beacon = NULL;
7870
7871 spin_lock_init(&priv->lock);
7872 spin_lock_init(&priv->power_data_39.lock);
7873 spin_lock_init(&priv->sta_lock);
7874 spin_lock_init(&priv->hcmd_lock);
7875
7876 INIT_LIST_HEAD(&priv->free_frames);
7877 mutex_init(&priv->mutex);
7878
7879 /* Clear the driver's (not device's) station table */
7880 iwl3945_clear_stations_table(priv);
7881
7882 priv->data_retry_limit = -1;
7883 priv->ieee_channels = NULL;
7884 priv->ieee_rates = NULL;
7885 priv->band = IEEE80211_BAND_2GHZ;
7886
7887 priv->iw_mode = NL80211_IFTYPE_STATION;
7888
7889 iwl3945_reset_qos(priv);
7890
7891 priv->qos_data.qos_active = 0;
7892 priv->qos_data.qos_cap.val = 0;
7893
7894
7895 priv->rates_mask = IWL_RATES_MASK;
7896 /* If power management is turned on, default to AC mode */
7897 priv->power_mode = IWL39_POWER_AC;
7898 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7899
7900 err = iwl3945_init_channel_map(priv);
7901 if (err) {
7902 IWL_ERR(priv, "initializing regulatory failed: %d\n", err);
7903 goto out_release_irq;
7904 }
7905
7906 err = iwl3945_init_geos(priv);
7907 if (err) {
7908 IWL_ERR(priv, "initializing geos failed: %d\n", err);
7909 goto out_free_channel_map;
7910 }
7911
7912 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
7913 priv->cfg->name);
7914
7915 /***********************************
7916 * 7. Initialize Module Parameters
7917 * **********************************/
7918
7919 /* Initialize module parameter values here */
7920 /* Disable radio (SW RF KILL) via parameter when loading driver */
7921 if (iwl3945_param_disable) {
7922 set_bit(STATUS_RF_KILL_SW, &priv->status);
7923 IWL_DEBUG_INFO("Radio disabled.\n");
7924 }
7925
7926
7927 /***********************
7928 * 8. Setup Services
7929 * ********************/
7930
7931 spin_lock_irqsave(&priv->lock, flags);
7932 iwl3945_disable_interrupts(priv);
7933 spin_unlock_irqrestore(&priv->lock, flags);
7934
7935 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7936 if (err) {
7937 IWL_ERR(priv, "failed to create sysfs device attributes\n");
7938 goto out_free_geos;
7939 }
7940
7941 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7942 iwl3945_setup_deferred_work(priv);
7943 iwl3945_setup_rx_handlers(priv);
7944
7945 /***********************
7946 * 9. Conclude
7947 * ********************/
7948 pci_save_state(pdev);
7949 pci_disable_device(pdev);
7950
7951 /*********************************
7952 * 10. Setup and Register mac80211
7953 * *******************************/
7954
7955 err = ieee80211_register_hw(priv->hw);
7956 if (err) {
7957 IWL_ERR(priv, "Failed to register network device: %d\n", err);
7958 goto out_remove_sysfs;
7959 }
7960
7961 priv->hw->conf.beacon_int = 100;
7962 priv->mac80211_registered = 1;
7963
7964
7965 err = iwl3945_rfkill_init(priv);
7966 if (err)
7967 IWL_ERR(priv, "Unable to initialize RFKILL system. "
7968 "Ignoring error: %d\n", err);
7969
7970 return 0;
7971
7972 out_remove_sysfs:
7973 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7974 out_free_geos:
7975 iwl3945_free_geos(priv);
7976 out_free_channel_map:
7977 iwl3945_free_channel_map(priv);
7978
7979
7980 out_release_irq:
7981 destroy_workqueue(priv->workqueue);
7982 priv->workqueue = NULL;
7983 iwl3945_unset_hw_params(priv);
7984
7985 out_iounmap:
7986 pci_iounmap(pdev, priv->hw_base);
7987 out_pci_release_regions:
7988 pci_release_regions(pdev);
7989 out_pci_disable_device:
7990 pci_disable_device(pdev);
7991 pci_set_drvdata(pdev, NULL);
7992 out_ieee80211_free_hw:
7993 ieee80211_free_hw(priv->hw);
7994 out:
7995 return err;
7996 }
7997
7998 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
7999 {
8000 struct iwl_priv *priv = pci_get_drvdata(pdev);
8001 unsigned long flags;
8002
8003 if (!priv)
8004 return;
8005
8006 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8007
8008 set_bit(STATUS_EXIT_PENDING, &priv->status);
8009
8010 iwl3945_down(priv);
8011
8012 /* make sure we flush any pending irq or
8013 * tasklet for the driver
8014 */
8015 spin_lock_irqsave(&priv->lock, flags);
8016 iwl3945_disable_interrupts(priv);
8017 spin_unlock_irqrestore(&priv->lock, flags);
8018
8019 iwl_synchronize_irq(priv);
8020
8021 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8022
8023 iwl3945_rfkill_unregister(priv);
8024 iwl3945_dealloc_ucode_pci(priv);
8025
8026 if (priv->rxq.bd)
8027 iwl3945_rx_queue_free(priv, &priv->rxq);
8028 iwl3945_hw_txq_ctx_free(priv);
8029
8030 iwl3945_unset_hw_params(priv);
8031 iwl3945_clear_stations_table(priv);
8032
8033 if (priv->mac80211_registered)
8034 ieee80211_unregister_hw(priv->hw);
8035
8036 /*netif_stop_queue(dev); */
8037 flush_workqueue(priv->workqueue);
8038
8039 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8040 * priv->workqueue... so we can't take down the workqueue
8041 * until now... */
8042 destroy_workqueue(priv->workqueue);
8043 priv->workqueue = NULL;
8044
8045 pci_iounmap(pdev, priv->hw_base);
8046 pci_release_regions(pdev);
8047 pci_disable_device(pdev);
8048 pci_set_drvdata(pdev, NULL);
8049
8050 iwl3945_free_channel_map(priv);
8051 iwl3945_free_geos(priv);
8052 kfree(priv->scan39);
8053 if (priv->ibss_beacon)
8054 dev_kfree_skb(priv->ibss_beacon);
8055
8056 ieee80211_free_hw(priv->hw);
8057 }
8058
8059 #ifdef CONFIG_PM
8060
8061 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8062 {
8063 struct iwl_priv *priv = pci_get_drvdata(pdev);
8064
8065 if (priv->is_open) {
8066 set_bit(STATUS_IN_SUSPEND, &priv->status);
8067 iwl3945_mac_stop(priv->hw);
8068 priv->is_open = 1;
8069 }
8070
8071 pci_set_power_state(pdev, PCI_D3hot);
8072
8073 return 0;
8074 }
8075
8076 static int iwl3945_pci_resume(struct pci_dev *pdev)
8077 {
8078 struct iwl_priv *priv = pci_get_drvdata(pdev);
8079
8080 pci_set_power_state(pdev, PCI_D0);
8081
8082 if (priv->is_open)
8083 iwl3945_mac_start(priv->hw);
8084
8085 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8086 return 0;
8087 }
8088
8089 #endif /* CONFIG_PM */
8090
8091 /*************** RFKILL FUNCTIONS **********/
8092 #ifdef CONFIG_IWL3945_RFKILL
8093 /* software rf-kill from user */
8094 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8095 {
8096 struct iwl_priv *priv = data;
8097 int err = 0;
8098
8099 if (!priv->rfkill)
8100 return 0;
8101
8102 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8103 return 0;
8104
8105 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
8106 mutex_lock(&priv->mutex);
8107
8108 switch (state) {
8109 case RFKILL_STATE_UNBLOCKED:
8110 if (iwl3945_is_rfkill_hw(priv)) {
8111 err = -EBUSY;
8112 goto out_unlock;
8113 }
8114 iwl3945_radio_kill_sw(priv, 0);
8115 break;
8116 case RFKILL_STATE_SOFT_BLOCKED:
8117 iwl3945_radio_kill_sw(priv, 1);
8118 break;
8119 default:
8120 IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
8121 break;
8122 }
8123 out_unlock:
8124 mutex_unlock(&priv->mutex);
8125
8126 return err;
8127 }
8128
8129 int iwl3945_rfkill_init(struct iwl_priv *priv)
8130 {
8131 struct device *device = wiphy_dev(priv->hw->wiphy);
8132 int ret = 0;
8133
8134 BUG_ON(device == NULL);
8135
8136 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8137 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8138 if (!priv->rfkill) {
8139 IWL_ERR(priv, "Unable to allocate rfkill device.\n");
8140 ret = -ENOMEM;
8141 goto error;
8142 }
8143
8144 priv->rfkill->name = priv->cfg->name;
8145 priv->rfkill->data = priv;
8146 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8147 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8148 priv->rfkill->user_claim_unsupported = 1;
8149
8150 priv->rfkill->dev.class->suspend = NULL;
8151 priv->rfkill->dev.class->resume = NULL;
8152
8153 ret = rfkill_register(priv->rfkill);
8154 if (ret) {
8155 IWL_ERR(priv, "Unable to register rfkill: %d\n", ret);
8156 goto freed_rfkill;
8157 }
8158
8159 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8160 return ret;
8161
8162 freed_rfkill:
8163 if (priv->rfkill != NULL)
8164 rfkill_free(priv->rfkill);
8165 priv->rfkill = NULL;
8166
8167 error:
8168 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8169 return ret;
8170 }
8171
8172 void iwl3945_rfkill_unregister(struct iwl_priv *priv)
8173 {
8174 if (priv->rfkill)
8175 rfkill_unregister(priv->rfkill);
8176
8177 priv->rfkill = NULL;
8178 }
8179
8180 /* set rf-kill to the right state. */
8181 void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
8182 {
8183
8184 if (!priv->rfkill)
8185 return;
8186
8187 if (iwl3945_is_rfkill_hw(priv)) {
8188 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8189 return;
8190 }
8191
8192 if (!iwl3945_is_rfkill_sw(priv))
8193 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8194 else
8195 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8196 }
8197 #endif
8198
8199 /*****************************************************************************
8200 *
8201 * driver and module entry point
8202 *
8203 *****************************************************************************/
8204
8205 static struct pci_driver iwl3945_driver = {
8206 .name = DRV_NAME,
8207 .id_table = iwl3945_hw_card_ids,
8208 .probe = iwl3945_pci_probe,
8209 .remove = __devexit_p(iwl3945_pci_remove),
8210 #ifdef CONFIG_PM
8211 .suspend = iwl3945_pci_suspend,
8212 .resume = iwl3945_pci_resume,
8213 #endif
8214 };
8215
8216 static int __init iwl3945_init(void)
8217 {
8218
8219 int ret;
8220 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8221 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8222
8223 ret = iwl3945_rate_control_register();
8224 if (ret) {
8225 printk(KERN_ERR DRV_NAME
8226 "Unable to register rate control algorithm: %d\n", ret);
8227 return ret;
8228 }
8229
8230 ret = pci_register_driver(&iwl3945_driver);
8231 if (ret) {
8232 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
8233 goto error_register;
8234 }
8235
8236 return ret;
8237
8238 error_register:
8239 iwl3945_rate_control_unregister();
8240 return ret;
8241 }
8242
8243 static void __exit iwl3945_exit(void)
8244 {
8245 pci_unregister_driver(&iwl3945_driver);
8246 iwl3945_rate_control_unregister();
8247 }
8248
8249 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
8250
8251 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8252 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8253 module_param_named(disable, iwl3945_param_disable, int, 0444);
8254 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8255 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8256 MODULE_PARM_DESC(hwcrypto,
8257 "using hardware crypto engine (default 0 [software])\n");
8258 module_param_named(debug, iwl3945_param_debug, uint, 0444);
8259 MODULE_PARM_DESC(debug, "debug output mask");
8260 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8261 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8262
8263 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8264 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8265
8266 module_exit(iwl3945_exit);
8267 module_init(iwl3945_init);
Linux kernel - Deliverables
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