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iwl3945: rearrange 3945 tfd
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-fh.h"
52 #include "iwl-3945-fh.h"
53 #include "iwl-commands.h"
54 #include "iwl-3945.h"
55 #include "iwl-helpers.h"
56 #include "iwl-core.h"
57 #include "iwl-dev.h"
58
59 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
60 struct iwl3945_tx_queue *txq);
61
62 /*
63 * module name, copyright, version, etc.
64 */
65
66 #define DRV_DESCRIPTION \
67 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
68
69 #ifdef CONFIG_IWL3945_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define IWL39_VERSION "1.2.26k" VD VS
82 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
83 #define DRV_AUTHOR "<ilw@linux.intel.com>"
84 #define DRV_VERSION IWL39_VERSION
85
86
87 MODULE_DESCRIPTION(DRV_DESCRIPTION);
88 MODULE_VERSION(DRV_VERSION);
89 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
90 MODULE_LICENSE("GPL");
91
92 /* module parameters */
93 struct iwl_mod_params iwl3945_mod_params = {
94 .num_of_queues = IWL39_MAX_NUM_QUEUES,
95 /* the rest are 0 by default */
96 };
97
98 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
99 * DMA services
100 *
101 * Theory of operation
102 *
103 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
104 * of buffer descriptors, each of which points to one or more data buffers for
105 * the device to read from or fill. Driver and device exchange status of each
106 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
107 * entries in each circular buffer, to protect against confusing empty and full
108 * queue states.
109 *
110 * The device reads or writes the data in the queues via the device's several
111 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
112 *
113 * For Tx queue, there are low mark and high mark limits. If, after queuing
114 * the packet for Tx, free space become < low mark, Tx queue stopped. When
115 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
116 * Tx queue resumed.
117 *
118 * The 3945 operates with six queues: One receive queue, one transmit queue
119 * (#4) for sending commands to the device firmware, and four transmit queues
120 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
121 ***************************************************/
122
123 int iwl3945_x2_queue_used(const struct iwl_queue *q, int i)
124 {
125 return q->write_ptr > q->read_ptr ?
126 (i >= q->read_ptr && i < q->write_ptr) :
127 !(i < q->read_ptr && i >= q->write_ptr);
128 }
129
130 /**
131 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
132 */
133 static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
134 int count, int slots_num, u32 id)
135 {
136 q->n_bd = count;
137 q->n_window = slots_num;
138 q->id = id;
139
140 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
141 * and iwl_queue_dec_wrap are broken. */
142 BUG_ON(!is_power_of_2(count));
143
144 /* slots_num must be power-of-two size, otherwise
145 * get_cmd_index is broken. */
146 BUG_ON(!is_power_of_2(slots_num));
147
148 q->low_mark = q->n_window / 4;
149 if (q->low_mark < 4)
150 q->low_mark = 4;
151
152 q->high_mark = q->n_window / 8;
153 if (q->high_mark < 2)
154 q->high_mark = 2;
155
156 q->write_ptr = q->read_ptr = 0;
157
158 return 0;
159 }
160
161 /**
162 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
163 */
164 static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
165 struct iwl3945_tx_queue *txq, u32 id)
166 {
167 struct pci_dev *dev = priv->pci_dev;
168
169 /* Driver private data, only for Tx (not command) queues,
170 * not shared with device. */
171 if (id != IWL_CMD_QUEUE_NUM) {
172 txq->txb = kmalloc(sizeof(txq->txb[0]) *
173 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
174 if (!txq->txb) {
175 IWL_ERR(priv, "kmalloc for auxiliary BD "
176 "structures failed\n");
177 goto error;
178 }
179 } else
180 txq->txb = NULL;
181
182 /* Circular buffer of transmit frame descriptors (TFDs),
183 * shared with device */
184 txq->tfds = pci_alloc_consistent(dev,
185 sizeof(txq->tfds[0]) * TFD_QUEUE_SIZE_MAX,
186 &txq->q.dma_addr);
187
188 if (!txq->tfds) {
189 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
190 sizeof(txq->tfds[0]) * TFD_QUEUE_SIZE_MAX);
191 goto error;
192 }
193 txq->q.id = id;
194
195 return 0;
196
197 error:
198 kfree(txq->txb);
199 txq->txb = NULL;
200
201 return -ENOMEM;
202 }
203
204 /**
205 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
206 */
207 int iwl3945_tx_queue_init(struct iwl_priv *priv,
208 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
209 {
210 struct pci_dev *dev = priv->pci_dev;
211 int len;
212 int rc = 0;
213
214 /*
215 * Alloc buffer array for commands (Tx or other types of commands).
216 * For the command queue (#4), allocate command space + one big
217 * command for scan, since scan command is very huge; the system will
218 * not have two scans at the same time, so only one is needed.
219 * For data Tx queues (all other queues), no super-size command
220 * space is needed.
221 */
222 len = sizeof(struct iwl_cmd) * slots_num;
223 if (txq_id == IWL_CMD_QUEUE_NUM)
224 len += IWL_MAX_SCAN_SIZE;
225 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
226 if (!txq->cmd)
227 return -ENOMEM;
228
229 /* Alloc driver data array and TFD circular buffer */
230 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
231 if (rc) {
232 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
233
234 return -ENOMEM;
235 }
236 txq->need_update = 0;
237
238 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
239 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
240 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
241
242 /* Initialize queue high/low-water, head/tail indexes */
243 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
244
245 /* Tell device where to find queue, enable DMA channel. */
246 iwl3945_hw_tx_queue_init(priv, txq);
247
248 return 0;
249 }
250
251 /**
252 * iwl3945_tx_queue_free - Deallocate DMA queue.
253 * @txq: Transmit queue to deallocate.
254 *
255 * Empty queue by removing and destroying all BD's.
256 * Free all buffers.
257 * 0-fill, but do not free "txq" descriptor structure.
258 */
259 void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl3945_tx_queue *txq)
260 {
261 struct iwl_queue *q = &txq->q;
262 struct pci_dev *dev = priv->pci_dev;
263 int len;
264
265 if (q->n_bd == 0)
266 return;
267
268 /* first, empty all BD's */
269 for (; q->write_ptr != q->read_ptr;
270 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
271 iwl3945_hw_txq_free_tfd(priv, txq);
272
273 len = sizeof(struct iwl_cmd) * q->n_window;
274 if (q->id == IWL_CMD_QUEUE_NUM)
275 len += IWL_MAX_SCAN_SIZE;
276
277 /* De-alloc array of command/tx buffers */
278 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
279
280 /* De-alloc circular buffer of TFDs */
281 if (txq->q.n_bd)
282 pci_free_consistent(dev, sizeof(struct iwl3945_tfd) *
283 txq->q.n_bd, txq->tfds, txq->q.dma_addr);
284
285 /* De-alloc array of per-TFD driver data */
286 kfree(txq->txb);
287 txq->txb = NULL;
288
289 /* 0-fill queue descriptor structure */
290 memset(txq, 0, sizeof(*txq));
291 }
292
293 /*************** STATION TABLE MANAGEMENT ****
294 * mac80211 should be examined to determine if sta_info is duplicating
295 * the functionality provided here
296 */
297
298 /**************************************************************/
299 #if 0 /* temporary disable till we add real remove station */
300 /**
301 * iwl3945_remove_station - Remove driver's knowledge of station.
302 *
303 * NOTE: This does not remove station from device's station table.
304 */
305 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
306 {
307 int index = IWL_INVALID_STATION;
308 int i;
309 unsigned long flags;
310
311 spin_lock_irqsave(&priv->sta_lock, flags);
312
313 if (is_ap)
314 index = IWL_AP_ID;
315 else if (is_broadcast_ether_addr(addr))
316 index = priv->hw_params.bcast_sta_id;
317 else
318 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
319 if (priv->stations_39[i].used &&
320 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
321 addr)) {
322 index = i;
323 break;
324 }
325
326 if (unlikely(index == IWL_INVALID_STATION))
327 goto out;
328
329 if (priv->stations_39[index].used) {
330 priv->stations_39[index].used = 0;
331 priv->num_stations--;
332 }
333
334 BUG_ON(priv->num_stations < 0);
335
336 out:
337 spin_unlock_irqrestore(&priv->sta_lock, flags);
338 return 0;
339 }
340 #endif
341
342 /**
343 * iwl3945_clear_stations_table - Clear the driver's station table
344 *
345 * NOTE: This does not clear or otherwise alter the device's station table.
346 */
347 static void iwl3945_clear_stations_table(struct iwl_priv *priv)
348 {
349 unsigned long flags;
350
351 spin_lock_irqsave(&priv->sta_lock, flags);
352
353 priv->num_stations = 0;
354 memset(priv->stations_39, 0, sizeof(priv->stations_39));
355
356 spin_unlock_irqrestore(&priv->sta_lock, flags);
357 }
358
359 /**
360 * iwl3945_add_station - Add station to station tables in driver and device
361 */
362 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
363 {
364 int i;
365 int index = IWL_INVALID_STATION;
366 struct iwl3945_station_entry *station;
367 unsigned long flags_spin;
368 u8 rate;
369
370 spin_lock_irqsave(&priv->sta_lock, flags_spin);
371 if (is_ap)
372 index = IWL_AP_ID;
373 else if (is_broadcast_ether_addr(addr))
374 index = priv->hw_params.bcast_sta_id;
375 else
376 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
377 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
378 addr)) {
379 index = i;
380 break;
381 }
382
383 if (!priv->stations_39[i].used &&
384 index == IWL_INVALID_STATION)
385 index = i;
386 }
387
388 /* These two conditions has the same outcome but keep them separate
389 since they have different meaning */
390 if (unlikely(index == IWL_INVALID_STATION)) {
391 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
392 return index;
393 }
394
395 if (priv->stations_39[index].used &&
396 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
397 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
398 return index;
399 }
400
401 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
402 station = &priv->stations_39[index];
403 station->used = 1;
404 priv->num_stations++;
405
406 /* Set up the REPLY_ADD_STA command to send to device */
407 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
408 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
409 station->sta.mode = 0;
410 station->sta.sta.sta_id = index;
411 station->sta.station_flags = 0;
412
413 if (priv->band == IEEE80211_BAND_5GHZ)
414 rate = IWL_RATE_6M_PLCP;
415 else
416 rate = IWL_RATE_1M_PLCP;
417
418 /* Turn on both antennas for the station... */
419 station->sta.rate_n_flags =
420 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
421
422 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
423
424 /* Add station to device's station table */
425 iwl3945_send_add_station(priv, &station->sta, flags);
426 return index;
427
428 }
429
430
431 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
432
433 #define IWL_CMD(x) case x: return #x
434 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
435
436 /**
437 * iwl3945_enqueue_hcmd - enqueue a uCode command
438 * @priv: device private data point
439 * @cmd: a point to the ucode command structure
440 *
441 * The function returns < 0 values to indicate the operation is
442 * failed. On success, it turns the index (> 0) of command in the
443 * command queue.
444 */
445 static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
446 {
447 struct iwl3945_tx_queue *txq = &priv->txq39[IWL_CMD_QUEUE_NUM];
448 struct iwl_queue *q = &txq->q;
449 struct iwl3945_tfd *tfd;
450 struct iwl_cmd *out_cmd;
451 u32 idx;
452 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
453 dma_addr_t phys_addr;
454 int pad;
455 int ret;
456 unsigned long flags;
457
458 /* If any of the command structures end up being larger than
459 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
460 * we will need to increase the size of the TFD entries */
461 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
462 !(cmd->meta.flags & CMD_SIZE_HUGE));
463
464
465 if (iwl_is_rfkill(priv)) {
466 IWL_DEBUG_INFO("Not sending command - RF KILL");
467 return -EIO;
468 }
469
470 if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
471 IWL_ERR(priv, "No space for Tx\n");
472 return -ENOSPC;
473 }
474
475 spin_lock_irqsave(&priv->hcmd_lock, flags);
476
477 tfd = &txq->tfds[q->write_ptr];
478 memset(tfd, 0, sizeof(*tfd));
479
480 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
481 out_cmd = &txq->cmd[idx];
482
483 out_cmd->hdr.cmd = cmd->id;
484 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
485 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
486
487 /* At this point, the out_cmd now has all of the incoming cmd
488 * information */
489
490 out_cmd->hdr.flags = 0;
491 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
492 INDEX_TO_SEQ(q->write_ptr));
493 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
494 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
495
496 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
497 offsetof(struct iwl_cmd, hdr);
498 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
499
500 pad = U32_PAD(cmd->len);
501 tfd->control_flags |= cpu_to_le32(TFD_CTL_PAD_SET(pad));
502
503 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
504 "%d bytes at %d[%d]:%d\n",
505 get_cmd_string(out_cmd->hdr.cmd),
506 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
507 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
508
509 txq->need_update = 1;
510
511 /* Increment and update queue's write index */
512 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
513 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
514
515 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
516 return ret ? ret : idx;
517 }
518
519 static int iwl3945_send_cmd_async(struct iwl_priv *priv,
520 struct iwl_host_cmd *cmd)
521 {
522 int ret;
523
524 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
525
526 /* An asynchronous command can not expect an SKB to be set. */
527 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
528
529 /* An asynchronous command MUST have a callback. */
530 BUG_ON(!cmd->meta.u.callback);
531
532 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
533 return -EBUSY;
534
535 ret = iwl3945_enqueue_hcmd(priv, cmd);
536 if (ret < 0) {
537 IWL_ERR(priv,
538 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
539 get_cmd_string(cmd->id), ret);
540 return ret;
541 }
542 return 0;
543 }
544
545 static int iwl3945_send_cmd_sync(struct iwl_priv *priv,
546 struct iwl_host_cmd *cmd)
547 {
548 int cmd_idx;
549 int ret;
550
551 BUG_ON(cmd->meta.flags & CMD_ASYNC);
552
553 /* A synchronous command can not have a callback set. */
554 BUG_ON(cmd->meta.u.callback != NULL);
555
556 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
557 IWL_ERR(priv,
558 "Error sending %s: Already sending a host command\n",
559 get_cmd_string(cmd->id));
560 ret = -EBUSY;
561 goto out;
562 }
563
564 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
565
566 if (cmd->meta.flags & CMD_WANT_SKB)
567 cmd->meta.source = &cmd->meta;
568
569 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
570 if (cmd_idx < 0) {
571 ret = cmd_idx;
572 IWL_ERR(priv,
573 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
574 get_cmd_string(cmd->id), ret);
575 goto out;
576 }
577
578 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
579 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
580 HOST_COMPLETE_TIMEOUT);
581 if (!ret) {
582 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
583 IWL_ERR(priv, "Error sending %s: time out after %dms\n",
584 get_cmd_string(cmd->id),
585 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
586
587 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
588 ret = -ETIMEDOUT;
589 goto cancel;
590 }
591 }
592
593 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
594 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
595 get_cmd_string(cmd->id));
596 ret = -ECANCELED;
597 goto fail;
598 }
599 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
600 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
601 get_cmd_string(cmd->id));
602 ret = -EIO;
603 goto fail;
604 }
605 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
606 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
607 get_cmd_string(cmd->id));
608 ret = -EIO;
609 goto cancel;
610 }
611
612 ret = 0;
613 goto out;
614
615 cancel:
616 if (cmd->meta.flags & CMD_WANT_SKB) {
617 struct iwl_cmd *qcmd;
618
619 /* Cancel the CMD_WANT_SKB flag for the cmd in the
620 * TX cmd queue. Otherwise in case the cmd comes
621 * in later, it will possibly set an invalid
622 * address (cmd->meta.source). */
623 qcmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
624 qcmd->meta.flags &= ~CMD_WANT_SKB;
625 }
626 fail:
627 if (cmd->meta.u.skb) {
628 dev_kfree_skb_any(cmd->meta.u.skb);
629 cmd->meta.u.skb = NULL;
630 }
631 out:
632 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
633 return ret;
634 }
635
636 int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
637 {
638 if (cmd->meta.flags & CMD_ASYNC)
639 return iwl3945_send_cmd_async(priv, cmd);
640
641 return iwl3945_send_cmd_sync(priv, cmd);
642 }
643
644 int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
645 {
646 struct iwl_host_cmd cmd = {
647 .id = id,
648 .len = len,
649 .data = data,
650 };
651
652 return iwl3945_send_cmd_sync(priv, &cmd);
653 }
654
655 static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
656 {
657 struct iwl_host_cmd cmd = {
658 .id = id,
659 .len = sizeof(val),
660 .data = &val,
661 };
662
663 return iwl3945_send_cmd_sync(priv, &cmd);
664 }
665
666 int iwl3945_send_statistics_request(struct iwl_priv *priv)
667 {
668 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
669 }
670
671 /**
672 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
673 * @band: 2.4 or 5 GHz band
674 * @channel: Any channel valid for the requested band
675
676 * In addition to setting the staging RXON, priv->band is also set.
677 *
678 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
679 * in the staging RXON flag structure based on the band
680 */
681 static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
682 enum ieee80211_band band,
683 u16 channel)
684 {
685 if (!iwl3945_get_channel_info(priv, band, channel)) {
686 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
687 channel, band);
688 return -EINVAL;
689 }
690
691 if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
692 (priv->band == band))
693 return 0;
694
695 priv->staging39_rxon.channel = cpu_to_le16(channel);
696 if (band == IEEE80211_BAND_5GHZ)
697 priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
698 else
699 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
700
701 priv->band = band;
702
703 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
704
705 return 0;
706 }
707
708 /**
709 * iwl3945_check_rxon_cmd - validate RXON structure is valid
710 *
711 * NOTE: This is really only useful during development and can eventually
712 * be #ifdef'd out once the driver is stable and folks aren't actively
713 * making changes
714 */
715 static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
716 {
717 int error = 0;
718 int counter = 1;
719 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
720
721 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
722 error |= le32_to_cpu(rxon->flags &
723 (RXON_FLG_TGJ_NARROW_BAND_MSK |
724 RXON_FLG_RADAR_DETECT_MSK));
725 if (error)
726 IWL_WARN(priv, "check 24G fields %d | %d\n",
727 counter++, error);
728 } else {
729 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
730 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
731 if (error)
732 IWL_WARN(priv, "check 52 fields %d | %d\n",
733 counter++, error);
734 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
735 if (error)
736 IWL_WARN(priv, "check 52 CCK %d | %d\n",
737 counter++, error);
738 }
739 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
740 if (error)
741 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
742
743 /* make sure basic rates 6Mbps and 1Mbps are supported */
744 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
745 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
746 if (error)
747 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
748
749 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
750 if (error)
751 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
752
753 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
754 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
755 if (error)
756 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
757 counter++, error);
758
759 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
760 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
761 if (error)
762 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
763 counter++, error);
764
765 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
766 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
767 if (error)
768 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
769 counter++, error);
770
771 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
772 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
773 RXON_FLG_ANT_A_MSK)) == 0);
774 if (error)
775 IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
776
777 if (error)
778 IWL_WARN(priv, "Tuning to channel %d\n",
779 le16_to_cpu(rxon->channel));
780
781 if (error) {
782 IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
783 return -1;
784 }
785 return 0;
786 }
787
788 /**
789 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
790 * @priv: staging_rxon is compared to active_rxon
791 *
792 * If the RXON structure is changing enough to require a new tune,
793 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
794 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
795 */
796 static int iwl3945_full_rxon_required(struct iwl_priv *priv)
797 {
798
799 /* These items are only settable from the full RXON command */
800 if (!(iwl3945_is_associated(priv)) ||
801 compare_ether_addr(priv->staging39_rxon.bssid_addr,
802 priv->active39_rxon.bssid_addr) ||
803 compare_ether_addr(priv->staging39_rxon.node_addr,
804 priv->active39_rxon.node_addr) ||
805 compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
806 priv->active39_rxon.wlap_bssid_addr) ||
807 (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
808 (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
809 (priv->staging39_rxon.air_propagation !=
810 priv->active39_rxon.air_propagation) ||
811 (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
812 return 1;
813
814 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
815 * be updated with the RXON_ASSOC command -- however only some
816 * flag transitions are allowed using RXON_ASSOC */
817
818 /* Check if we are not switching bands */
819 if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
820 (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
821 return 1;
822
823 /* Check if we are switching association toggle */
824 if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
825 (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
826 return 1;
827
828 return 0;
829 }
830
831 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
832 {
833 int rc = 0;
834 struct iwl_rx_packet *res = NULL;
835 struct iwl3945_rxon_assoc_cmd rxon_assoc;
836 struct iwl_host_cmd cmd = {
837 .id = REPLY_RXON_ASSOC,
838 .len = sizeof(rxon_assoc),
839 .meta.flags = CMD_WANT_SKB,
840 .data = &rxon_assoc,
841 };
842 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
843 const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
844
845 if ((rxon1->flags == rxon2->flags) &&
846 (rxon1->filter_flags == rxon2->filter_flags) &&
847 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
848 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
849 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
850 return 0;
851 }
852
853 rxon_assoc.flags = priv->staging39_rxon.flags;
854 rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
855 rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
856 rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
857 rxon_assoc.reserved = 0;
858
859 rc = iwl3945_send_cmd_sync(priv, &cmd);
860 if (rc)
861 return rc;
862
863 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
864 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
865 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
866 rc = -EIO;
867 }
868
869 priv->alloc_rxb_skb--;
870 dev_kfree_skb_any(cmd.meta.u.skb);
871
872 return rc;
873 }
874
875 /**
876 * iwl3945_commit_rxon - commit staging_rxon to hardware
877 *
878 * The RXON command in staging_rxon is committed to the hardware and
879 * the active_rxon structure is updated with the new data. This
880 * function correctly transitions out of the RXON_ASSOC_MSK state if
881 * a HW tune is required based on the RXON structure changes.
882 */
883 static int iwl3945_commit_rxon(struct iwl_priv *priv)
884 {
885 /* cast away the const for active_rxon in this function */
886 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
887 int rc = 0;
888
889 if (!iwl_is_alive(priv))
890 return -1;
891
892 /* always get timestamp with Rx frame */
893 priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
894
895 /* select antenna */
896 priv->staging39_rxon.flags &=
897 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
898 priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
899
900 rc = iwl3945_check_rxon_cmd(priv);
901 if (rc) {
902 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
903 return -EINVAL;
904 }
905
906 /* If we don't need to send a full RXON, we can use
907 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
908 * and other flags for the current radio configuration. */
909 if (!iwl3945_full_rxon_required(priv)) {
910 rc = iwl3945_send_rxon_assoc(priv);
911 if (rc) {
912 IWL_ERR(priv, "Error setting RXON_ASSOC "
913 "configuration (%d).\n", rc);
914 return rc;
915 }
916
917 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
918
919 return 0;
920 }
921
922 /* If we are currently associated and the new config requires
923 * an RXON_ASSOC and the new config wants the associated mask enabled,
924 * we must clear the associated from the active configuration
925 * before we apply the new config */
926 if (iwl3945_is_associated(priv) &&
927 (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
928 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
929 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
930
931 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
932 sizeof(struct iwl3945_rxon_cmd),
933 &priv->active39_rxon);
934
935 /* If the mask clearing failed then we set
936 * active_rxon back to what it was previously */
937 if (rc) {
938 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
939 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
940 "configuration (%d).\n", rc);
941 return rc;
942 }
943 }
944
945 IWL_DEBUG_INFO("Sending RXON\n"
946 "* with%s RXON_FILTER_ASSOC_MSK\n"
947 "* channel = %d\n"
948 "* bssid = %pM\n",
949 ((priv->staging39_rxon.filter_flags &
950 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
951 le16_to_cpu(priv->staging39_rxon.channel),
952 priv->staging_rxon.bssid_addr);
953
954 /* Apply the new configuration */
955 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
956 sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
957 if (rc) {
958 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
959 return rc;
960 }
961
962 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
963
964 iwl3945_clear_stations_table(priv);
965
966 /* If we issue a new RXON command which required a tune then we must
967 * send a new TXPOWER command or we won't be able to Tx any frames */
968 rc = iwl3945_hw_reg_send_txpower(priv);
969 if (rc) {
970 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
971 return rc;
972 }
973
974 /* Add the broadcast address so we can send broadcast frames */
975 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
976 IWL_INVALID_STATION) {
977 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
978 return -EIO;
979 }
980
981 /* If we have set the ASSOC_MSK and we are in BSS mode then
982 * add the IWL_AP_ID to the station rate table */
983 if (iwl3945_is_associated(priv) &&
984 (priv->iw_mode == NL80211_IFTYPE_STATION))
985 if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
986 == IWL_INVALID_STATION) {
987 IWL_ERR(priv, "Error adding AP address for transmit\n");
988 return -EIO;
989 }
990
991 /* Init the hardware's rate fallback order based on the band */
992 rc = iwl3945_init_hw_rate_table(priv);
993 if (rc) {
994 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
995 return -EIO;
996 }
997
998 return 0;
999 }
1000
1001 static int iwl3945_send_bt_config(struct iwl_priv *priv)
1002 {
1003 struct iwl_bt_cmd bt_cmd = {
1004 .flags = 3,
1005 .lead_time = 0xAA,
1006 .max_kill = 1,
1007 .kill_ack_mask = 0,
1008 .kill_cts_mask = 0,
1009 };
1010
1011 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1012 sizeof(bt_cmd), &bt_cmd);
1013 }
1014
1015 static int iwl3945_send_scan_abort(struct iwl_priv *priv)
1016 {
1017 int rc = 0;
1018 struct iwl_rx_packet *res;
1019 struct iwl_host_cmd cmd = {
1020 .id = REPLY_SCAN_ABORT_CMD,
1021 .meta.flags = CMD_WANT_SKB,
1022 };
1023
1024 /* If there isn't a scan actively going on in the hardware
1025 * then we are in between scan bands and not actually
1026 * actively scanning, so don't send the abort command */
1027 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1028 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1029 return 0;
1030 }
1031
1032 rc = iwl3945_send_cmd_sync(priv, &cmd);
1033 if (rc) {
1034 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1035 return rc;
1036 }
1037
1038 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1039 if (res->u.status != CAN_ABORT_STATUS) {
1040 /* The scan abort will return 1 for success or
1041 * 2 for "failure". A failure condition can be
1042 * due to simply not being in an active scan which
1043 * can occur if we send the scan abort before we
1044 * the microcode has notified us that a scan is
1045 * completed. */
1046 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1047 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1048 clear_bit(STATUS_SCAN_HW, &priv->status);
1049 }
1050
1051 dev_kfree_skb_any(cmd.meta.u.skb);
1052
1053 return rc;
1054 }
1055
1056 static int iwl3945_card_state_sync_callback(struct iwl_priv *priv,
1057 struct iwl_cmd *cmd,
1058 struct sk_buff *skb)
1059 {
1060 return 1;
1061 }
1062
1063 /*
1064 * CARD_STATE_CMD
1065 *
1066 * Use: Sets the device's internal card state to enable, disable, or halt
1067 *
1068 * When in the 'enable' state the card operates as normal.
1069 * When in the 'disable' state, the card enters into a low power mode.
1070 * When in the 'halt' state, the card is shut down and must be fully
1071 * restarted to come back on.
1072 */
1073 static int iwl3945_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1074 {
1075 struct iwl_host_cmd cmd = {
1076 .id = REPLY_CARD_STATE_CMD,
1077 .len = sizeof(u32),
1078 .data = &flags,
1079 .meta.flags = meta_flag,
1080 };
1081
1082 if (meta_flag & CMD_ASYNC)
1083 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1084
1085 return iwl3945_send_cmd(priv, &cmd);
1086 }
1087
1088 static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
1089 struct iwl_cmd *cmd, struct sk_buff *skb)
1090 {
1091 struct iwl_rx_packet *res = NULL;
1092
1093 if (!skb) {
1094 IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
1095 return 1;
1096 }
1097
1098 res = (struct iwl_rx_packet *)skb->data;
1099 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1100 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1101 res->hdr.flags);
1102 return 1;
1103 }
1104
1105 switch (res->u.add_sta.status) {
1106 case ADD_STA_SUCCESS_MSK:
1107 break;
1108 default:
1109 break;
1110 }
1111
1112 /* We didn't cache the SKB; let the caller free it */
1113 return 1;
1114 }
1115
1116 int iwl3945_send_add_station(struct iwl_priv *priv,
1117 struct iwl3945_addsta_cmd *sta, u8 flags)
1118 {
1119 struct iwl_rx_packet *res = NULL;
1120 int rc = 0;
1121 struct iwl_host_cmd cmd = {
1122 .id = REPLY_ADD_STA,
1123 .len = sizeof(struct iwl3945_addsta_cmd),
1124 .meta.flags = flags,
1125 .data = sta,
1126 };
1127
1128 if (flags & CMD_ASYNC)
1129 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1130 else
1131 cmd.meta.flags |= CMD_WANT_SKB;
1132
1133 rc = iwl3945_send_cmd(priv, &cmd);
1134
1135 if (rc || (flags & CMD_ASYNC))
1136 return rc;
1137
1138 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1139 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1140 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1141 res->hdr.flags);
1142 rc = -EIO;
1143 }
1144
1145 if (rc == 0) {
1146 switch (res->u.add_sta.status) {
1147 case ADD_STA_SUCCESS_MSK:
1148 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1149 break;
1150 default:
1151 rc = -EIO;
1152 IWL_WARN(priv, "REPLY_ADD_STA failed\n");
1153 break;
1154 }
1155 }
1156
1157 priv->alloc_rxb_skb--;
1158 dev_kfree_skb_any(cmd.meta.u.skb);
1159
1160 return rc;
1161 }
1162
1163 static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
1164 struct ieee80211_key_conf *keyconf,
1165 u8 sta_id)
1166 {
1167 unsigned long flags;
1168 __le16 key_flags = 0;
1169
1170 switch (keyconf->alg) {
1171 case ALG_CCMP:
1172 key_flags |= STA_KEY_FLG_CCMP;
1173 key_flags |= cpu_to_le16(
1174 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1175 key_flags &= ~STA_KEY_FLG_INVALID;
1176 break;
1177 case ALG_TKIP:
1178 case ALG_WEP:
1179 default:
1180 return -EINVAL;
1181 }
1182 spin_lock_irqsave(&priv->sta_lock, flags);
1183 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
1184 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
1185 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
1186 keyconf->keylen);
1187
1188 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
1189 keyconf->keylen);
1190 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
1191 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1192 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1193
1194 spin_unlock_irqrestore(&priv->sta_lock, flags);
1195
1196 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1197 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1198 return 0;
1199 }
1200
1201 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
1202 {
1203 unsigned long flags;
1204
1205 spin_lock_irqsave(&priv->sta_lock, flags);
1206 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1207 memset(&priv->stations_39[sta_id].sta.key, 0,
1208 sizeof(struct iwl4965_keyinfo));
1209 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1210 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1211 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1212 spin_unlock_irqrestore(&priv->sta_lock, flags);
1213
1214 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1215 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1216 return 0;
1217 }
1218
1219 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
1220 {
1221 struct list_head *element;
1222
1223 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1224 priv->frames_count);
1225
1226 while (!list_empty(&priv->free_frames)) {
1227 element = priv->free_frames.next;
1228 list_del(element);
1229 kfree(list_entry(element, struct iwl3945_frame, list));
1230 priv->frames_count--;
1231 }
1232
1233 if (priv->frames_count) {
1234 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
1235 priv->frames_count);
1236 priv->frames_count = 0;
1237 }
1238 }
1239
1240 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
1241 {
1242 struct iwl3945_frame *frame;
1243 struct list_head *element;
1244 if (list_empty(&priv->free_frames)) {
1245 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1246 if (!frame) {
1247 IWL_ERR(priv, "Could not allocate frame!\n");
1248 return NULL;
1249 }
1250
1251 priv->frames_count++;
1252 return frame;
1253 }
1254
1255 element = priv->free_frames.next;
1256 list_del(element);
1257 return list_entry(element, struct iwl3945_frame, list);
1258 }
1259
1260 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
1261 {
1262 memset(frame, 0, sizeof(*frame));
1263 list_add(&frame->list, &priv->free_frames);
1264 }
1265
1266 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
1267 struct ieee80211_hdr *hdr,
1268 int left)
1269 {
1270
1271 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1272 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1273 (priv->iw_mode != NL80211_IFTYPE_AP)))
1274 return 0;
1275
1276 if (priv->ibss_beacon->len > left)
1277 return 0;
1278
1279 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1280
1281 return priv->ibss_beacon->len;
1282 }
1283
1284 static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
1285 {
1286 u8 i;
1287 int rate_mask;
1288
1289 /* Set rate mask*/
1290 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1291 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1292 else
1293 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1294
1295 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1296 i = iwl3945_rates[i].next_ieee) {
1297 if (rate_mask & (1 << i))
1298 return iwl3945_rates[i].plcp;
1299 }
1300
1301 /* No valid rate was found. Assign the lowest one */
1302 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1303 return IWL_RATE_1M_PLCP;
1304 else
1305 return IWL_RATE_6M_PLCP;
1306 }
1307
1308 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
1309 {
1310 struct iwl3945_frame *frame;
1311 unsigned int frame_size;
1312 int rc;
1313 u8 rate;
1314
1315 frame = iwl3945_get_free_frame(priv);
1316
1317 if (!frame) {
1318 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
1319 "command.\n");
1320 return -ENOMEM;
1321 }
1322
1323 rate = iwl3945_rate_get_lowest_plcp(priv);
1324
1325 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1326
1327 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1328 &frame->u.cmd[0]);
1329
1330 iwl3945_free_frame(priv, frame);
1331
1332 return rc;
1333 }
1334
1335 /******************************************************************************
1336 *
1337 * EEPROM related functions
1338 *
1339 ******************************************************************************/
1340
1341 static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
1342 {
1343 memcpy(mac, priv->eeprom39.mac_address, 6);
1344 }
1345
1346 /*
1347 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1348 * embedded controller) as EEPROM reader; each read is a series of pulses
1349 * to/from the EEPROM chip, not a single event, so even reads could conflict
1350 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1351 * simply claims ownership, which should be safe when this function is called
1352 * (i.e. before loading uCode!).
1353 */
1354 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
1355 {
1356 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1357 return 0;
1358 }
1359
1360 /**
1361 * iwl3945_eeprom_init - read EEPROM contents
1362 *
1363 * Load the EEPROM contents from adapter into priv->eeprom39
1364 *
1365 * NOTE: This routine uses the non-debug IO access functions.
1366 */
1367 int iwl3945_eeprom_init(struct iwl_priv *priv)
1368 {
1369 u16 *e = (u16 *)&priv->eeprom39;
1370 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
1371 int sz = sizeof(priv->eeprom39);
1372 int ret;
1373 u16 addr;
1374
1375 /* The EEPROM structure has several padding buffers within it
1376 * and when adding new EEPROM maps is subject to programmer errors
1377 * which may be very difficult to identify without explicitly
1378 * checking the resulting size of the eeprom map. */
1379 BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
1380
1381 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1382 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1383 return -ENOENT;
1384 }
1385
1386 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1387 ret = iwl3945_eeprom_acquire_semaphore(priv);
1388 if (ret < 0) {
1389 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
1390 return -ENOENT;
1391 }
1392
1393 /* eeprom is an array of 16bit values */
1394 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1395 u32 r;
1396
1397 _iwl_write32(priv, CSR_EEPROM_REG,
1398 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1399 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1400 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
1401 CSR_EEPROM_REG_READ_VALID_MSK,
1402 IWL_EEPROM_ACCESS_TIMEOUT);
1403 if (ret < 0) {
1404 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
1405 return ret;
1406 }
1407
1408 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
1409 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1410 }
1411
1412 return 0;
1413 }
1414
1415 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
1416 {
1417 if (priv->shared_virt)
1418 pci_free_consistent(priv->pci_dev,
1419 sizeof(struct iwl3945_shared),
1420 priv->shared_virt,
1421 priv->shared_phys);
1422 }
1423
1424 /**
1425 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1426 *
1427 * return : set the bit for each supported rate insert in ie
1428 */
1429 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1430 u16 basic_rate, int *left)
1431 {
1432 u16 ret_rates = 0, bit;
1433 int i;
1434 u8 *cnt = ie;
1435 u8 *rates = ie + 1;
1436
1437 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1438 if (bit & supported_rate) {
1439 ret_rates |= bit;
1440 rates[*cnt] = iwl3945_rates[i].ieee |
1441 ((bit & basic_rate) ? 0x80 : 0x00);
1442 (*cnt)++;
1443 (*left)--;
1444 if ((*left <= 0) ||
1445 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1446 break;
1447 }
1448 }
1449
1450 return ret_rates;
1451 }
1452
1453 /**
1454 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1455 */
1456 static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
1457 struct ieee80211_mgmt *frame,
1458 int left)
1459 {
1460 int len = 0;
1461 u8 *pos = NULL;
1462 u16 active_rates, ret_rates, cck_rates;
1463
1464 /* Make sure there is enough space for the probe request,
1465 * two mandatory IEs and the data */
1466 left -= 24;
1467 if (left < 0)
1468 return 0;
1469 len += 24;
1470
1471 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1472 memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
1473 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1474 memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
1475 frame->seq_ctrl = 0;
1476
1477 /* fill in our indirect SSID IE */
1478 /* ...next IE... */
1479
1480 left -= 2;
1481 if (left < 0)
1482 return 0;
1483 len += 2;
1484 pos = &(frame->u.probe_req.variable[0]);
1485 *pos++ = WLAN_EID_SSID;
1486 *pos++ = 0;
1487
1488 /* fill in supported rate */
1489 /* ...next IE... */
1490 left -= 2;
1491 if (left < 0)
1492 return 0;
1493
1494 /* ... fill it in... */
1495 *pos++ = WLAN_EID_SUPP_RATES;
1496 *pos = 0;
1497
1498 priv->active_rate = priv->rates_mask;
1499 active_rates = priv->active_rate;
1500 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1501
1502 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1503 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1504 priv->active_rate_basic, &left);
1505 active_rates &= ~ret_rates;
1506
1507 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1508 priv->active_rate_basic, &left);
1509 active_rates &= ~ret_rates;
1510
1511 len += 2 + *pos;
1512 pos += (*pos) + 1;
1513 if (active_rates == 0)
1514 goto fill_end;
1515
1516 /* fill in supported extended rate */
1517 /* ...next IE... */
1518 left -= 2;
1519 if (left < 0)
1520 return 0;
1521 /* ... fill it in... */
1522 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1523 *pos = 0;
1524 iwl3945_supported_rate_to_ie(pos, active_rates,
1525 priv->active_rate_basic, &left);
1526 if (*pos > 0)
1527 len += 2 + *pos;
1528
1529 fill_end:
1530 return (u16)len;
1531 }
1532
1533 /*
1534 * QoS support
1535 */
1536 static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
1537 struct iwl_qosparam_cmd *qos)
1538 {
1539
1540 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1541 sizeof(struct iwl_qosparam_cmd), qos);
1542 }
1543
1544 static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
1545 {
1546 unsigned long flags;
1547
1548 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1549 return;
1550
1551 spin_lock_irqsave(&priv->lock, flags);
1552 priv->qos_data.def_qos_parm.qos_flags = 0;
1553
1554 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1555 !priv->qos_data.qos_cap.q_AP.txop_request)
1556 priv->qos_data.def_qos_parm.qos_flags |=
1557 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1558
1559 if (priv->qos_data.qos_active)
1560 priv->qos_data.def_qos_parm.qos_flags |=
1561 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1562
1563 spin_unlock_irqrestore(&priv->lock, flags);
1564
1565 if (force || iwl3945_is_associated(priv)) {
1566 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1567 priv->qos_data.qos_active);
1568
1569 iwl3945_send_qos_params_command(priv,
1570 &(priv->qos_data.def_qos_parm));
1571 }
1572 }
1573
1574 /*
1575 * Power management (not Tx power!) functions
1576 */
1577 #define MSEC_TO_USEC 1024
1578
1579
1580 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1581 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1582 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1583 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1584 __constant_cpu_to_le32(X1), \
1585 __constant_cpu_to_le32(X2), \
1586 __constant_cpu_to_le32(X3), \
1587 __constant_cpu_to_le32(X4)}
1588
1589 /* default power management (not Tx power) table values */
1590 /* for TIM 0-10 */
1591 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1592 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1593 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1594 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1595 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1596 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1597 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1598 };
1599
1600 /* for TIM > 10 */
1601 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1602 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1603 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1604 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1605 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1606 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1607 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1608 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1609 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1610 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1611 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1612 };
1613
1614 int iwl3945_power_init_handle(struct iwl_priv *priv)
1615 {
1616 int rc = 0, i;
1617 struct iwl3945_power_mgr *pow_data;
1618 int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1619 u16 pci_pm;
1620
1621 IWL_DEBUG_POWER("Initialize power \n");
1622
1623 pow_data = &(priv->power_data_39);
1624
1625 memset(pow_data, 0, sizeof(*pow_data));
1626
1627 pow_data->active_index = IWL_POWER_RANGE_0;
1628 pow_data->dtim_val = 0xffff;
1629
1630 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1631 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1632
1633 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1634 if (rc != 0)
1635 return 0;
1636 else {
1637 struct iwl_powertable_cmd *cmd;
1638
1639 IWL_DEBUG_POWER("adjust power command flags\n");
1640
1641 for (i = 0; i < IWL39_POWER_AC; i++) {
1642 cmd = &pow_data->pwr_range_0[i].cmd;
1643
1644 if (pci_pm & 0x1)
1645 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1646 else
1647 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1648 }
1649 }
1650 return rc;
1651 }
1652
1653 static int iwl3945_update_power_cmd(struct iwl_priv *priv,
1654 struct iwl_powertable_cmd *cmd, u32 mode)
1655 {
1656 int rc = 0, i;
1657 u8 skip;
1658 u32 max_sleep = 0;
1659 struct iwl_power_vec_entry *range;
1660 u8 period = 0;
1661 struct iwl3945_power_mgr *pow_data;
1662
1663 if (mode > IWL_POWER_INDEX_5) {
1664 IWL_DEBUG_POWER("Error invalid power mode \n");
1665 return -1;
1666 }
1667 pow_data = &(priv->power_data_39);
1668
1669 if (pow_data->active_index == IWL_POWER_RANGE_0)
1670 range = &pow_data->pwr_range_0[0];
1671 else
1672 range = &pow_data->pwr_range_1[1];
1673
1674 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1675
1676 #ifdef IWL_MAC80211_DISABLE
1677 if (priv->assoc_network != NULL) {
1678 unsigned long flags;
1679
1680 period = priv->assoc_network->tim.tim_period;
1681 }
1682 #endif /*IWL_MAC80211_DISABLE */
1683 skip = range[mode].no_dtim;
1684
1685 if (period == 0) {
1686 period = 1;
1687 skip = 0;
1688 }
1689
1690 if (skip == 0) {
1691 max_sleep = period;
1692 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1693 } else {
1694 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1695 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1696 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1697 }
1698
1699 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1700 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1701 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1702 }
1703
1704 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1705 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1706 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1707 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1708 le32_to_cpu(cmd->sleep_interval[0]),
1709 le32_to_cpu(cmd->sleep_interval[1]),
1710 le32_to_cpu(cmd->sleep_interval[2]),
1711 le32_to_cpu(cmd->sleep_interval[3]),
1712 le32_to_cpu(cmd->sleep_interval[4]));
1713
1714 return rc;
1715 }
1716
1717 static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
1718 {
1719 u32 uninitialized_var(final_mode);
1720 int rc;
1721 struct iwl_powertable_cmd cmd;
1722
1723 /* If on battery, set to 3,
1724 * if plugged into AC power, set to CAM ("continuously aware mode"),
1725 * else user level */
1726 switch (mode) {
1727 case IWL39_POWER_BATTERY:
1728 final_mode = IWL_POWER_INDEX_3;
1729 break;
1730 case IWL39_POWER_AC:
1731 final_mode = IWL_POWER_MODE_CAM;
1732 break;
1733 default:
1734 final_mode = mode;
1735 break;
1736 }
1737
1738 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1739
1740 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1741 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1742 sizeof(struct iwl3945_powertable_cmd), &cmd);
1743
1744 if (final_mode == IWL_POWER_MODE_CAM)
1745 clear_bit(STATUS_POWER_PMI, &priv->status);
1746 else
1747 set_bit(STATUS_POWER_PMI, &priv->status);
1748
1749 return rc;
1750 }
1751
1752 /**
1753 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1754 *
1755 * NOTE: priv->mutex is not required before calling this function
1756 */
1757 static int iwl3945_scan_cancel(struct iwl_priv *priv)
1758 {
1759 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1760 clear_bit(STATUS_SCANNING, &priv->status);
1761 return 0;
1762 }
1763
1764 if (test_bit(STATUS_SCANNING, &priv->status)) {
1765 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1766 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1767 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1768 queue_work(priv->workqueue, &priv->abort_scan);
1769
1770 } else
1771 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1772
1773 return test_bit(STATUS_SCANNING, &priv->status);
1774 }
1775
1776 return 0;
1777 }
1778
1779 /**
1780 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
1781 * @ms: amount of time to wait (in milliseconds) for scan to abort
1782 *
1783 * NOTE: priv->mutex must be held before calling this function
1784 */
1785 static int iwl3945_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
1786 {
1787 unsigned long now = jiffies;
1788 int ret;
1789
1790 ret = iwl3945_scan_cancel(priv);
1791 if (ret && ms) {
1792 mutex_unlock(&priv->mutex);
1793 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1794 test_bit(STATUS_SCANNING, &priv->status))
1795 msleep(1);
1796 mutex_lock(&priv->mutex);
1797
1798 return test_bit(STATUS_SCANNING, &priv->status);
1799 }
1800
1801 return ret;
1802 }
1803
1804 #define MAX_UCODE_BEACON_INTERVAL 1024
1805 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1806
1807 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
1808 {
1809 u16 new_val = 0;
1810 u16 beacon_factor = 0;
1811
1812 beacon_factor =
1813 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1814 / MAX_UCODE_BEACON_INTERVAL;
1815 new_val = beacon_val / beacon_factor;
1816
1817 return cpu_to_le16(new_val);
1818 }
1819
1820 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
1821 {
1822 u64 interval_tm_unit;
1823 u64 tsf, result;
1824 unsigned long flags;
1825 struct ieee80211_conf *conf = NULL;
1826 u16 beacon_int = 0;
1827
1828 conf = ieee80211_get_hw_conf(priv->hw);
1829
1830 spin_lock_irqsave(&priv->lock, flags);
1831 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
1832 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1833
1834 tsf = priv->timestamp;
1835
1836 beacon_int = priv->beacon_int;
1837 spin_unlock_irqrestore(&priv->lock, flags);
1838
1839 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
1840 if (beacon_int == 0) {
1841 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1842 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1843 } else {
1844 priv->rxon_timing.beacon_interval =
1845 cpu_to_le16(beacon_int);
1846 priv->rxon_timing.beacon_interval =
1847 iwl3945_adjust_beacon_interval(
1848 le16_to_cpu(priv->rxon_timing.beacon_interval));
1849 }
1850
1851 priv->rxon_timing.atim_window = 0;
1852 } else {
1853 priv->rxon_timing.beacon_interval =
1854 iwl3945_adjust_beacon_interval(conf->beacon_int);
1855 /* TODO: we need to get atim_window from upper stack
1856 * for now we set to 0 */
1857 priv->rxon_timing.atim_window = 0;
1858 }
1859
1860 interval_tm_unit =
1861 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1862 result = do_div(tsf, interval_tm_unit);
1863 priv->rxon_timing.beacon_init_val =
1864 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1865
1866 IWL_DEBUG_ASSOC
1867 ("beacon interval %d beacon timer %d beacon tim %d\n",
1868 le16_to_cpu(priv->rxon_timing.beacon_interval),
1869 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1870 le16_to_cpu(priv->rxon_timing.atim_window));
1871 }
1872
1873 static int iwl3945_scan_initiate(struct iwl_priv *priv)
1874 {
1875 if (!iwl_is_ready_rf(priv)) {
1876 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1877 return -EIO;
1878 }
1879
1880 if (test_bit(STATUS_SCANNING, &priv->status)) {
1881 IWL_DEBUG_SCAN("Scan already in progress.\n");
1882 return -EAGAIN;
1883 }
1884
1885 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1886 IWL_DEBUG_SCAN("Scan request while abort pending. "
1887 "Queuing.\n");
1888 return -EAGAIN;
1889 }
1890
1891 IWL_DEBUG_INFO("Starting scan...\n");
1892 if (priv->cfg->sku & IWL_SKU_G)
1893 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
1894 if (priv->cfg->sku & IWL_SKU_A)
1895 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
1896 set_bit(STATUS_SCANNING, &priv->status);
1897 priv->scan_start = jiffies;
1898 priv->scan_pass_start = priv->scan_start;
1899
1900 queue_work(priv->workqueue, &priv->request_scan);
1901
1902 return 0;
1903 }
1904
1905 static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
1906 {
1907 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
1908
1909 if (hw_decrypt)
1910 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
1911 else
1912 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
1913
1914 return 0;
1915 }
1916
1917 static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
1918 enum ieee80211_band band)
1919 {
1920 if (band == IEEE80211_BAND_5GHZ) {
1921 priv->staging39_rxon.flags &=
1922 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
1923 | RXON_FLG_CCK_MSK);
1924 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1925 } else {
1926 /* Copied from iwl3945_bg_post_associate() */
1927 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
1928 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
1929 else
1930 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1931
1932 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
1933 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1934
1935 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
1936 priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
1937 priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
1938 }
1939 }
1940
1941 /*
1942 * initialize rxon structure with default values from eeprom
1943 */
1944 static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
1945 int mode)
1946 {
1947 const struct iwl_channel_info *ch_info;
1948
1949 memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
1950
1951 switch (mode) {
1952 case NL80211_IFTYPE_AP:
1953 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
1954 break;
1955
1956 case NL80211_IFTYPE_STATION:
1957 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
1958 priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
1959 break;
1960
1961 case NL80211_IFTYPE_ADHOC:
1962 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1963 priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1964 priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1965 RXON_FILTER_ACCEPT_GRP_MSK;
1966 break;
1967
1968 case NL80211_IFTYPE_MONITOR:
1969 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
1970 priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
1971 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
1972 break;
1973 default:
1974 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1975 break;
1976 }
1977
1978 #if 0
1979 /* TODO: Figure out when short_preamble would be set and cache from
1980 * that */
1981 if (!hw_to_local(priv->hw)->short_preamble)
1982 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1983 else
1984 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1985 #endif
1986
1987 ch_info = iwl3945_get_channel_info(priv, priv->band,
1988 le16_to_cpu(priv->active39_rxon.channel));
1989
1990 if (!ch_info)
1991 ch_info = &priv->channel_info[0];
1992
1993 /*
1994 * in some case A channels are all non IBSS
1995 * in this case force B/G channel
1996 */
1997 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
1998 ch_info = &priv->channel_info[0];
1999
2000 priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
2001 if (is_channel_a_band(ch_info))
2002 priv->band = IEEE80211_BAND_5GHZ;
2003 else
2004 priv->band = IEEE80211_BAND_2GHZ;
2005
2006 iwl3945_set_flags_for_phymode(priv, priv->band);
2007
2008 priv->staging39_rxon.ofdm_basic_rates =
2009 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2010 priv->staging39_rxon.cck_basic_rates =
2011 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2012 }
2013
2014 static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
2015 {
2016 if (mode == NL80211_IFTYPE_ADHOC) {
2017 const struct iwl_channel_info *ch_info;
2018
2019 ch_info = iwl3945_get_channel_info(priv,
2020 priv->band,
2021 le16_to_cpu(priv->staging39_rxon.channel));
2022
2023 if (!ch_info || !is_channel_ibss(ch_info)) {
2024 IWL_ERR(priv, "channel %d not IBSS channel\n",
2025 le16_to_cpu(priv->staging39_rxon.channel));
2026 return -EINVAL;
2027 }
2028 }
2029
2030 iwl3945_connection_init_rx_config(priv, mode);
2031 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2032
2033 iwl3945_clear_stations_table(priv);
2034
2035 /* don't commit rxon if rf-kill is on*/
2036 if (!iwl_is_ready_rf(priv))
2037 return -EAGAIN;
2038
2039 cancel_delayed_work(&priv->scan_check);
2040 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2041 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2042 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2043 return -EAGAIN;
2044 }
2045
2046 iwl3945_commit_rxon(priv);
2047
2048 return 0;
2049 }
2050
2051 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
2052 struct ieee80211_tx_info *info,
2053 struct iwl_cmd *cmd,
2054 struct sk_buff *skb_frag,
2055 int last_frag)
2056 {
2057 struct iwl3945_hw_key *keyinfo =
2058 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
2059
2060 switch (keyinfo->alg) {
2061 case ALG_CCMP:
2062 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2063 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2064 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2065 break;
2066
2067 case ALG_TKIP:
2068 #if 0
2069 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2070
2071 if (last_frag)
2072 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2073 8);
2074 else
2075 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2076 #endif
2077 break;
2078
2079 case ALG_WEP:
2080 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2081 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2082
2083 if (keyinfo->keylen == 13)
2084 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2085
2086 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2087
2088 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2089 "with key %d\n", info->control.hw_key->hw_key_idx);
2090 break;
2091
2092 default:
2093 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
2094 break;
2095 }
2096 }
2097
2098 /*
2099 * handle build REPLY_TX command notification.
2100 */
2101 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
2102 struct iwl_cmd *cmd,
2103 struct ieee80211_tx_info *info,
2104 struct ieee80211_hdr *hdr,
2105 int is_unicast, u8 std_id)
2106 {
2107 __le16 fc = hdr->frame_control;
2108 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2109 u8 rc_flags = info->control.rates[0].flags;
2110
2111 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2112 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2113 tx_flags |= TX_CMD_FLG_ACK_MSK;
2114 if (ieee80211_is_mgmt(fc))
2115 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2116 if (ieee80211_is_probe_resp(fc) &&
2117 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2118 tx_flags |= TX_CMD_FLG_TSF_MSK;
2119 } else {
2120 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2121 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2122 }
2123
2124 cmd->cmd.tx.sta_id = std_id;
2125 if (ieee80211_has_morefrags(fc))
2126 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2127
2128 if (ieee80211_is_data_qos(fc)) {
2129 u8 *qc = ieee80211_get_qos_ctl(hdr);
2130 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2131 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2132 } else {
2133 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2134 }
2135
2136 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2137 tx_flags |= TX_CMD_FLG_RTS_MSK;
2138 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2139 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2140 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2141 tx_flags |= TX_CMD_FLG_CTS_MSK;
2142 }
2143
2144 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2145 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2146
2147 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2148 if (ieee80211_is_mgmt(fc)) {
2149 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2150 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2151 else
2152 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2153 } else {
2154 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2155 #ifdef CONFIG_IWL3945_LEDS
2156 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2157 #endif
2158 }
2159
2160 cmd->cmd.tx.driver_txop = 0;
2161 cmd->cmd.tx.tx_flags = tx_flags;
2162 cmd->cmd.tx.next_frame_len = 0;
2163 }
2164
2165 /**
2166 * iwl3945_get_sta_id - Find station's index within station table
2167 */
2168 static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2169 {
2170 int sta_id;
2171 u16 fc = le16_to_cpu(hdr->frame_control);
2172
2173 /* If this frame is broadcast or management, use broadcast station id */
2174 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2175 is_multicast_ether_addr(hdr->addr1))
2176 return priv->hw_params.bcast_sta_id;
2177
2178 switch (priv->iw_mode) {
2179
2180 /* If we are a client station in a BSS network, use the special
2181 * AP station entry (that's the only station we communicate with) */
2182 case NL80211_IFTYPE_STATION:
2183 return IWL_AP_ID;
2184
2185 /* If we are an AP, then find the station, or use BCAST */
2186 case NL80211_IFTYPE_AP:
2187 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2188 if (sta_id != IWL_INVALID_STATION)
2189 return sta_id;
2190 return priv->hw_params.bcast_sta_id;
2191
2192 /* If this frame is going out to an IBSS network, find the station,
2193 * or create a new station table entry */
2194 case NL80211_IFTYPE_ADHOC: {
2195 /* Create new station table entry */
2196 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2197 if (sta_id != IWL_INVALID_STATION)
2198 return sta_id;
2199
2200 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2201
2202 if (sta_id != IWL_INVALID_STATION)
2203 return sta_id;
2204
2205 IWL_DEBUG_DROP("Station %pM not in station map. "
2206 "Defaulting to broadcast...\n",
2207 hdr->addr1);
2208 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2209 return priv->hw_params.bcast_sta_id;
2210 }
2211 /* If we are in monitor mode, use BCAST. This is required for
2212 * packet injection. */
2213 case NL80211_IFTYPE_MONITOR:
2214 return priv->hw_params.bcast_sta_id;
2215
2216 default:
2217 IWL_WARN(priv, "Unknown mode of operation: %d\n",
2218 priv->iw_mode);
2219 return priv->hw_params.bcast_sta_id;
2220 }
2221 }
2222
2223 /*
2224 * start REPLY_TX command process
2225 */
2226 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
2227 {
2228 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2229 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2230 struct iwl3945_tfd *tfd;
2231 int txq_id = skb_get_queue_mapping(skb);
2232 struct iwl3945_tx_queue *txq = NULL;
2233 struct iwl_queue *q = NULL;
2234 dma_addr_t phys_addr;
2235 dma_addr_t txcmd_phys;
2236 struct iwl_cmd *out_cmd = NULL;
2237 u16 len, idx, len_org, hdr_len;
2238 u8 id;
2239 u8 unicast;
2240 u8 sta_id;
2241 u8 tid = 0;
2242 u16 seq_number = 0;
2243 __le16 fc;
2244 u8 wait_write_ptr = 0;
2245 u8 *qc = NULL;
2246 unsigned long flags;
2247 int rc;
2248
2249 spin_lock_irqsave(&priv->lock, flags);
2250 if (iwl_is_rfkill(priv)) {
2251 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2252 goto drop_unlock;
2253 }
2254
2255 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2256 IWL_ERR(priv, "ERROR: No TX rate available.\n");
2257 goto drop_unlock;
2258 }
2259
2260 unicast = !is_multicast_ether_addr(hdr->addr1);
2261 id = 0;
2262
2263 fc = hdr->frame_control;
2264
2265 #ifdef CONFIG_IWL3945_DEBUG
2266 if (ieee80211_is_auth(fc))
2267 IWL_DEBUG_TX("Sending AUTH frame\n");
2268 else if (ieee80211_is_assoc_req(fc))
2269 IWL_DEBUG_TX("Sending ASSOC frame\n");
2270 else if (ieee80211_is_reassoc_req(fc))
2271 IWL_DEBUG_TX("Sending REASSOC frame\n");
2272 #endif
2273
2274 /* drop all data frame if we are not associated */
2275 if (ieee80211_is_data(fc) &&
2276 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2277 (!iwl3945_is_associated(priv) ||
2278 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2279 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2280 goto drop_unlock;
2281 }
2282
2283 spin_unlock_irqrestore(&priv->lock, flags);
2284
2285 hdr_len = ieee80211_hdrlen(fc);
2286
2287 /* Find (or create) index into station table for destination station */
2288 sta_id = iwl3945_get_sta_id(priv, hdr);
2289 if (sta_id == IWL_INVALID_STATION) {
2290 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2291 hdr->addr1);
2292 goto drop;
2293 }
2294
2295 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2296
2297 if (ieee80211_is_data_qos(fc)) {
2298 qc = ieee80211_get_qos_ctl(hdr);
2299 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2300 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
2301 IEEE80211_SCTL_SEQ;
2302 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2303 (hdr->seq_ctrl &
2304 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2305 seq_number += 0x10;
2306 }
2307
2308 /* Descriptor for chosen Tx queue */
2309 txq = &priv->txq39[txq_id];
2310 q = &txq->q;
2311
2312 spin_lock_irqsave(&priv->lock, flags);
2313
2314 /* Set up first empty TFD within this queue's circular TFD buffer */
2315 tfd = &txq->tfds[q->write_ptr];
2316 memset(tfd, 0, sizeof(*tfd));
2317 idx = get_cmd_index(q, q->write_ptr, 0);
2318
2319 /* Set up driver data for this TFD */
2320 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
2321 txq->txb[q->write_ptr].skb[0] = skb;
2322
2323 /* Init first empty entry in queue's array of Tx/cmd buffers */
2324 out_cmd = &txq->cmd[idx];
2325 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2326 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2327
2328 /*
2329 * Set up the Tx-command (not MAC!) header.
2330 * Store the chosen Tx queue and TFD index within the sequence field;
2331 * after Tx, uCode's Tx response will return this value so driver can
2332 * locate the frame within the tx queue and do post-tx processing.
2333 */
2334 out_cmd->hdr.cmd = REPLY_TX;
2335 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2336 INDEX_TO_SEQ(q->write_ptr)));
2337
2338 /* Copy MAC header from skb into command buffer */
2339 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2340
2341 /*
2342 * Use the first empty entry in this queue's command buffer array
2343 * to contain the Tx command and MAC header concatenated together
2344 * (payload data will be in another buffer).
2345 * Size of this varies, due to varying MAC header length.
2346 * If end is not dword aligned, we'll have 2 extra bytes at the end
2347 * of the MAC header (device reads on dword boundaries).
2348 * We'll tell device about this padding later.
2349 */
2350 len = sizeof(struct iwl3945_tx_cmd) +
2351 sizeof(struct iwl_cmd_header) + hdr_len;
2352
2353 len_org = len;
2354 len = (len + 3) & ~3;
2355
2356 if (len_org != len)
2357 len_org = 1;
2358 else
2359 len_org = 0;
2360
2361 /* Physical address of this Tx command's header (not MAC header!),
2362 * within command buffer array. */
2363 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2364 offsetof(struct iwl_cmd, hdr);
2365
2366 /* Add buffer containing Tx command and MAC(!) header to TFD's
2367 * first entry */
2368 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2369
2370 if (info->control.hw_key)
2371 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2372
2373 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2374 * if any (802.11 null frames have no payload). */
2375 len = skb->len - hdr_len;
2376 if (len) {
2377 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2378 len, PCI_DMA_TODEVICE);
2379 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2380 }
2381
2382 if (!len)
2383 /* If there is no payload, then we use only one Tx buffer */
2384 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(1));
2385 else
2386 /* Else use 2 buffers.
2387 * Tell 3945 about any padding after MAC header */
2388 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(2) |
2389 TFD_CTL_PAD_SET(U32_PAD(len)));
2390
2391 /* Total # bytes to be transmitted */
2392 len = (u16)skb->len;
2393 out_cmd->cmd.tx.len = cpu_to_le16(len);
2394
2395 /* TODO need this for burst mode later on */
2396 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2397
2398 /* set is_hcca to 0; it probably will never be implemented */
2399 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2400
2401 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2402 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2403
2404 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2405 txq->need_update = 1;
2406 if (qc)
2407 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
2408 } else {
2409 wait_write_ptr = 1;
2410 txq->need_update = 0;
2411 }
2412
2413 iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload,
2414 sizeof(out_cmd->cmd.tx));
2415
2416 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2417 ieee80211_hdrlen(fc));
2418
2419 /* Tell device the write index *just past* this latest filled TFD */
2420 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2421 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2422 spin_unlock_irqrestore(&priv->lock, flags);
2423
2424 if (rc)
2425 return rc;
2426
2427 if ((iwl_queue_space(q) < q->high_mark)
2428 && priv->mac80211_registered) {
2429 if (wait_write_ptr) {
2430 spin_lock_irqsave(&priv->lock, flags);
2431 txq->need_update = 1;
2432 iwl3945_tx_queue_update_write_ptr(priv, txq);
2433 spin_unlock_irqrestore(&priv->lock, flags);
2434 }
2435
2436 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2437 }
2438
2439 return 0;
2440
2441 drop_unlock:
2442 spin_unlock_irqrestore(&priv->lock, flags);
2443 drop:
2444 return -1;
2445 }
2446
2447 static void iwl3945_set_rate(struct iwl_priv *priv)
2448 {
2449 const struct ieee80211_supported_band *sband = NULL;
2450 struct ieee80211_rate *rate;
2451 int i;
2452
2453 sband = iwl_get_hw_mode(priv, priv->band);
2454 if (!sband) {
2455 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
2456 return;
2457 }
2458
2459 priv->active_rate = 0;
2460 priv->active_rate_basic = 0;
2461
2462 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2463 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2464
2465 for (i = 0; i < sband->n_bitrates; i++) {
2466 rate = &sband->bitrates[i];
2467 if ((rate->hw_value < IWL_RATE_COUNT) &&
2468 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2469 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2470 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2471 priv->active_rate |= (1 << rate->hw_value);
2472 }
2473 }
2474
2475 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2476 priv->active_rate, priv->active_rate_basic);
2477
2478 /*
2479 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2480 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2481 * OFDM
2482 */
2483 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2484 priv->staging39_rxon.cck_basic_rates =
2485 ((priv->active_rate_basic &
2486 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2487 else
2488 priv->staging39_rxon.cck_basic_rates =
2489 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2490
2491 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2492 priv->staging39_rxon.ofdm_basic_rates =
2493 ((priv->active_rate_basic &
2494 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2495 IWL_FIRST_OFDM_RATE) & 0xFF;
2496 else
2497 priv->staging39_rxon.ofdm_basic_rates =
2498 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2499 }
2500
2501 static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2502 {
2503 unsigned long flags;
2504
2505 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2506 return;
2507
2508 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2509 disable_radio ? "OFF" : "ON");
2510
2511 if (disable_radio) {
2512 iwl3945_scan_cancel(priv);
2513 /* FIXME: This is a workaround for AP */
2514 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2515 spin_lock_irqsave(&priv->lock, flags);
2516 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2517 CSR_UCODE_SW_BIT_RFKILL);
2518 spin_unlock_irqrestore(&priv->lock, flags);
2519 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2520 set_bit(STATUS_RF_KILL_SW, &priv->status);
2521 }
2522 return;
2523 }
2524
2525 spin_lock_irqsave(&priv->lock, flags);
2526 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2527
2528 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2529 spin_unlock_irqrestore(&priv->lock, flags);
2530
2531 /* wake up ucode */
2532 msleep(10);
2533
2534 spin_lock_irqsave(&priv->lock, flags);
2535 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2536 if (!iwl_grab_nic_access(priv))
2537 iwl_release_nic_access(priv);
2538 spin_unlock_irqrestore(&priv->lock, flags);
2539
2540 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2541 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2542 "disabled by HW switch\n");
2543 return;
2544 }
2545
2546 if (priv->is_open)
2547 queue_work(priv->workqueue, &priv->restart);
2548 return;
2549 }
2550
2551 void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
2552 u32 decrypt_res, struct ieee80211_rx_status *stats)
2553 {
2554 u16 fc =
2555 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2556
2557 if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2558 return;
2559
2560 if (!(fc & IEEE80211_FCTL_PROTECTED))
2561 return;
2562
2563 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2564 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2565 case RX_RES_STATUS_SEC_TYPE_TKIP:
2566 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2567 RX_RES_STATUS_BAD_ICV_MIC)
2568 stats->flag |= RX_FLAG_MMIC_ERROR;
2569 case RX_RES_STATUS_SEC_TYPE_WEP:
2570 case RX_RES_STATUS_SEC_TYPE_CCMP:
2571 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2572 RX_RES_STATUS_DECRYPT_OK) {
2573 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2574 stats->flag |= RX_FLAG_DECRYPTED;
2575 }
2576 break;
2577
2578 default:
2579 break;
2580 }
2581 }
2582
2583 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2584
2585 #include "iwl-spectrum.h"
2586
2587 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2588 #define BEACON_TIME_MASK_HIGH 0xFF000000
2589 #define TIME_UNIT 1024
2590
2591 /*
2592 * extended beacon time format
2593 * time in usec will be changed into a 32-bit value in 8:24 format
2594 * the high 1 byte is the beacon counts
2595 * the lower 3 bytes is the time in usec within one beacon interval
2596 */
2597
2598 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2599 {
2600 u32 quot;
2601 u32 rem;
2602 u32 interval = beacon_interval * 1024;
2603
2604 if (!interval || !usec)
2605 return 0;
2606
2607 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2608 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2609
2610 return (quot << 24) + rem;
2611 }
2612
2613 /* base is usually what we get from ucode with each received frame,
2614 * the same as HW timer counter counting down
2615 */
2616
2617 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2618 {
2619 u32 base_low = base & BEACON_TIME_MASK_LOW;
2620 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2621 u32 interval = beacon_interval * TIME_UNIT;
2622 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2623 (addon & BEACON_TIME_MASK_HIGH);
2624
2625 if (base_low > addon_low)
2626 res += base_low - addon_low;
2627 else if (base_low < addon_low) {
2628 res += interval + base_low - addon_low;
2629 res += (1 << 24);
2630 } else
2631 res += (1 << 24);
2632
2633 return cpu_to_le32(res);
2634 }
2635
2636 static int iwl3945_get_measurement(struct iwl_priv *priv,
2637 struct ieee80211_measurement_params *params,
2638 u8 type)
2639 {
2640 struct iwl_spectrum_cmd spectrum;
2641 struct iwl_rx_packet *res;
2642 struct iwl_host_cmd cmd = {
2643 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2644 .data = (void *)&spectrum,
2645 .meta.flags = CMD_WANT_SKB,
2646 };
2647 u32 add_time = le64_to_cpu(params->start_time);
2648 int rc;
2649 int spectrum_resp_status;
2650 int duration = le16_to_cpu(params->duration);
2651
2652 if (iwl3945_is_associated(priv))
2653 add_time =
2654 iwl3945_usecs_to_beacons(
2655 le64_to_cpu(params->start_time) - priv->last_tsf,
2656 le16_to_cpu(priv->rxon_timing.beacon_interval));
2657
2658 memset(&spectrum, 0, sizeof(spectrum));
2659
2660 spectrum.channel_count = cpu_to_le16(1);
2661 spectrum.flags =
2662 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2663 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2664 cmd.len = sizeof(spectrum);
2665 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2666
2667 if (iwl3945_is_associated(priv))
2668 spectrum.start_time =
2669 iwl3945_add_beacon_time(priv->last_beacon_time,
2670 add_time,
2671 le16_to_cpu(priv->rxon_timing.beacon_interval));
2672 else
2673 spectrum.start_time = 0;
2674
2675 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2676 spectrum.channels[0].channel = params->channel;
2677 spectrum.channels[0].type = type;
2678 if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
2679 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2680 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2681
2682 rc = iwl3945_send_cmd_sync(priv, &cmd);
2683 if (rc)
2684 return rc;
2685
2686 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2687 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2688 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
2689 rc = -EIO;
2690 }
2691
2692 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2693 switch (spectrum_resp_status) {
2694 case 0: /* Command will be handled */
2695 if (res->u.spectrum.id != 0xff) {
2696 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2697 res->u.spectrum.id);
2698 priv->measurement_status &= ~MEASUREMENT_READY;
2699 }
2700 priv->measurement_status |= MEASUREMENT_ACTIVE;
2701 rc = 0;
2702 break;
2703
2704 case 1: /* Command will not be handled */
2705 rc = -EAGAIN;
2706 break;
2707 }
2708
2709 dev_kfree_skb_any(cmd.meta.u.skb);
2710
2711 return rc;
2712 }
2713 #endif
2714
2715 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
2716 struct iwl_rx_mem_buffer *rxb)
2717 {
2718 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2719 struct iwl_alive_resp *palive;
2720 struct delayed_work *pwork;
2721
2722 palive = &pkt->u.alive_frame;
2723
2724 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2725 "0x%01X 0x%01X\n",
2726 palive->is_valid, palive->ver_type,
2727 palive->ver_subtype);
2728
2729 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2730 IWL_DEBUG_INFO("Initialization Alive received.\n");
2731 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2732 sizeof(struct iwl_alive_resp));
2733 pwork = &priv->init_alive_start;
2734 } else {
2735 IWL_DEBUG_INFO("Runtime Alive received.\n");
2736 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2737 sizeof(struct iwl_alive_resp));
2738 pwork = &priv->alive_start;
2739 iwl3945_disable_events(priv);
2740 }
2741
2742 /* We delay the ALIVE response by 5ms to
2743 * give the HW RF Kill time to activate... */
2744 if (palive->is_valid == UCODE_VALID_OK)
2745 queue_delayed_work(priv->workqueue, pwork,
2746 msecs_to_jiffies(5));
2747 else
2748 IWL_WARN(priv, "uCode did not respond OK.\n");
2749 }
2750
2751 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
2752 struct iwl_rx_mem_buffer *rxb)
2753 {
2754 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2755
2756 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2757 return;
2758 }
2759
2760 static void iwl3945_rx_reply_error(struct iwl_priv *priv,
2761 struct iwl_rx_mem_buffer *rxb)
2762 {
2763 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2764
2765 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2766 "seq 0x%04X ser 0x%08X\n",
2767 le32_to_cpu(pkt->u.err_resp.error_type),
2768 get_cmd_string(pkt->u.err_resp.cmd_id),
2769 pkt->u.err_resp.cmd_id,
2770 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2771 le32_to_cpu(pkt->u.err_resp.error_info));
2772 }
2773
2774 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2775
2776 static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
2777 {
2778 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2779 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
2780 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
2781 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2782 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2783 rxon->channel = csa->channel;
2784 priv->staging39_rxon.channel = csa->channel;
2785 }
2786
2787 static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
2788 struct iwl_rx_mem_buffer *rxb)
2789 {
2790 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2791 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2792 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
2793
2794 if (!report->state) {
2795 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2796 "Spectrum Measure Notification: Start\n");
2797 return;
2798 }
2799
2800 memcpy(&priv->measure_report, report, sizeof(*report));
2801 priv->measurement_status |= MEASUREMENT_READY;
2802 #endif
2803 }
2804
2805 static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
2806 struct iwl_rx_mem_buffer *rxb)
2807 {
2808 #ifdef CONFIG_IWL3945_DEBUG
2809 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2810 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2811 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2812 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2813 #endif
2814 }
2815
2816 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2817 struct iwl_rx_mem_buffer *rxb)
2818 {
2819 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2820 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2821 "notification for %s:\n",
2822 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2823 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
2824 le32_to_cpu(pkt->len));
2825 }
2826
2827 static void iwl3945_bg_beacon_update(struct work_struct *work)
2828 {
2829 struct iwl_priv *priv =
2830 container_of(work, struct iwl_priv, beacon_update);
2831 struct sk_buff *beacon;
2832
2833 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
2834 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
2835
2836 if (!beacon) {
2837 IWL_ERR(priv, "update beacon failed\n");
2838 return;
2839 }
2840
2841 mutex_lock(&priv->mutex);
2842 /* new beacon skb is allocated every time; dispose previous.*/
2843 if (priv->ibss_beacon)
2844 dev_kfree_skb(priv->ibss_beacon);
2845
2846 priv->ibss_beacon = beacon;
2847 mutex_unlock(&priv->mutex);
2848
2849 iwl3945_send_beacon_cmd(priv);
2850 }
2851
2852 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
2853 struct iwl_rx_mem_buffer *rxb)
2854 {
2855 #ifdef CONFIG_IWL3945_DEBUG
2856 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2857 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
2858 u8 rate = beacon->beacon_notify_hdr.rate;
2859
2860 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
2861 "tsf %d %d rate %d\n",
2862 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
2863 beacon->beacon_notify_hdr.failure_frame,
2864 le32_to_cpu(beacon->ibss_mgr_status),
2865 le32_to_cpu(beacon->high_tsf),
2866 le32_to_cpu(beacon->low_tsf), rate);
2867 #endif
2868
2869 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
2870 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
2871 queue_work(priv->workqueue, &priv->beacon_update);
2872 }
2873
2874 /* Service response to REPLY_SCAN_CMD (0x80) */
2875 static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
2876 struct iwl_rx_mem_buffer *rxb)
2877 {
2878 #ifdef CONFIG_IWL3945_DEBUG
2879 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2880 struct iwl_scanreq_notification *notif =
2881 (struct iwl_scanreq_notification *)pkt->u.raw;
2882
2883 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
2884 #endif
2885 }
2886
2887 /* Service SCAN_START_NOTIFICATION (0x82) */
2888 static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
2889 struct iwl_rx_mem_buffer *rxb)
2890 {
2891 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2892 struct iwl_scanstart_notification *notif =
2893 (struct iwl_scanstart_notification *)pkt->u.raw;
2894 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
2895 IWL_DEBUG_SCAN("Scan start: "
2896 "%d [802.11%s] "
2897 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
2898 notif->channel,
2899 notif->band ? "bg" : "a",
2900 notif->tsf_high,
2901 notif->tsf_low, notif->status, notif->beacon_timer);
2902 }
2903
2904 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
2905 static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
2906 struct iwl_rx_mem_buffer *rxb)
2907 {
2908 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2909 struct iwl_scanresults_notification *notif =
2910 (struct iwl_scanresults_notification *)pkt->u.raw;
2911
2912 IWL_DEBUG_SCAN("Scan ch.res: "
2913 "%d [802.11%s] "
2914 "(TSF: 0x%08X:%08X) - %d "
2915 "elapsed=%lu usec (%dms since last)\n",
2916 notif->channel,
2917 notif->band ? "bg" : "a",
2918 le32_to_cpu(notif->tsf_high),
2919 le32_to_cpu(notif->tsf_low),
2920 le32_to_cpu(notif->statistics[0]),
2921 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
2922 jiffies_to_msecs(elapsed_jiffies
2923 (priv->last_scan_jiffies, jiffies)));
2924
2925 priv->last_scan_jiffies = jiffies;
2926 priv->next_scan_jiffies = 0;
2927 }
2928
2929 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
2930 static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
2931 struct iwl_rx_mem_buffer *rxb)
2932 {
2933 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2934 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
2935
2936 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
2937 scan_notif->scanned_channels,
2938 scan_notif->tsf_low,
2939 scan_notif->tsf_high, scan_notif->status);
2940
2941 /* The HW is no longer scanning */
2942 clear_bit(STATUS_SCAN_HW, &priv->status);
2943
2944 /* The scan completion notification came in, so kill that timer... */
2945 cancel_delayed_work(&priv->scan_check);
2946
2947 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
2948 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
2949 "2.4" : "5.2",
2950 jiffies_to_msecs(elapsed_jiffies
2951 (priv->scan_pass_start, jiffies)));
2952
2953 /* Remove this scanned band from the list of pending
2954 * bands to scan, band G precedes A in order of scanning
2955 * as seen in iwl3945_bg_request_scan */
2956 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
2957 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
2958 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
2959 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
2960
2961 /* If a request to abort was given, or the scan did not succeed
2962 * then we reset the scan state machine and terminate,
2963 * re-queuing another scan if one has been requested */
2964 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2965 IWL_DEBUG_INFO("Aborted scan completed.\n");
2966 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
2967 } else {
2968 /* If there are more bands on this scan pass reschedule */
2969 if (priv->scan_bands > 0)
2970 goto reschedule;
2971 }
2972
2973 priv->last_scan_jiffies = jiffies;
2974 priv->next_scan_jiffies = 0;
2975 IWL_DEBUG_INFO("Setting scan to off\n");
2976
2977 clear_bit(STATUS_SCANNING, &priv->status);
2978
2979 IWL_DEBUG_INFO("Scan took %dms\n",
2980 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
2981
2982 queue_work(priv->workqueue, &priv->scan_completed);
2983
2984 return;
2985
2986 reschedule:
2987 priv->scan_pass_start = jiffies;
2988 queue_work(priv->workqueue, &priv->request_scan);
2989 }
2990
2991 /* Handle notification from uCode that card's power state is changing
2992 * due to software, hardware, or critical temperature RFKILL */
2993 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
2994 struct iwl_rx_mem_buffer *rxb)
2995 {
2996 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2997 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
2998 unsigned long status = priv->status;
2999
3000 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3001 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3002 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3003
3004 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
3005 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3006
3007 if (flags & HW_CARD_DISABLED)
3008 set_bit(STATUS_RF_KILL_HW, &priv->status);
3009 else
3010 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3011
3012
3013 if (flags & SW_CARD_DISABLED)
3014 set_bit(STATUS_RF_KILL_SW, &priv->status);
3015 else
3016 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3017
3018 iwl3945_scan_cancel(priv);
3019
3020 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3021 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3022 (test_bit(STATUS_RF_KILL_SW, &status) !=
3023 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3024 queue_work(priv->workqueue, &priv->rf_kill);
3025 else
3026 wake_up_interruptible(&priv->wait_command_queue);
3027 }
3028
3029 /**
3030 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3031 *
3032 * Setup the RX handlers for each of the reply types sent from the uCode
3033 * to the host.
3034 *
3035 * This function chains into the hardware specific files for them to setup
3036 * any hardware specific handlers as well.
3037 */
3038 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
3039 {
3040 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3041 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3042 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3043 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3044 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3045 iwl3945_rx_spectrum_measure_notif;
3046 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3047 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3048 iwl3945_rx_pm_debug_statistics_notif;
3049 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3050
3051 /*
3052 * The same handler is used for both the REPLY to a discrete
3053 * statistics request from the host as well as for the periodic
3054 * statistics notifications (after received beacons) from the uCode.
3055 */
3056 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3057 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3058
3059 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3060 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3061 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3062 iwl3945_rx_scan_results_notif;
3063 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3064 iwl3945_rx_scan_complete_notif;
3065 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3066
3067 /* Set up hardware specific Rx handlers */
3068 iwl3945_hw_rx_handler_setup(priv);
3069 }
3070
3071 /**
3072 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3073 * When FW advances 'R' index, all entries between old and new 'R' index
3074 * need to be reclaimed.
3075 */
3076 static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
3077 int txq_id, int index)
3078 {
3079 struct iwl3945_tx_queue *txq = &priv->txq39[txq_id];
3080 struct iwl_queue *q = &txq->q;
3081 int nfreed = 0;
3082
3083 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3084 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
3085 "is out of range [0-%d] %d %d.\n", txq_id,
3086 index, q->n_bd, q->write_ptr, q->read_ptr);
3087 return;
3088 }
3089
3090 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3091 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3092 if (nfreed > 1) {
3093 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
3094 q->write_ptr, q->read_ptr);
3095 queue_work(priv->workqueue, &priv->restart);
3096 break;
3097 }
3098 nfreed++;
3099 }
3100 }
3101
3102
3103 /**
3104 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3105 * @rxb: Rx buffer to reclaim
3106 *
3107 * If an Rx buffer has an async callback associated with it the callback
3108 * will be executed. The attached skb (if present) will only be freed
3109 * if the callback returns 1
3110 */
3111 static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
3112 struct iwl_rx_mem_buffer *rxb)
3113 {
3114 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3115 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3116 int txq_id = SEQ_TO_QUEUE(sequence);
3117 int index = SEQ_TO_INDEX(sequence);
3118 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3119 int cmd_index;
3120 struct iwl_cmd *cmd;
3121
3122 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3123
3124 cmd_index = get_cmd_index(&priv->txq39[IWL_CMD_QUEUE_NUM].q, index, huge);
3125 cmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3126
3127 /* Input error checking is done when commands are added to queue. */
3128 if (cmd->meta.flags & CMD_WANT_SKB) {
3129 cmd->meta.source->u.skb = rxb->skb;
3130 rxb->skb = NULL;
3131 } else if (cmd->meta.u.callback &&
3132 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3133 rxb->skb = NULL;
3134
3135 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3136
3137 if (!(cmd->meta.flags & CMD_ASYNC)) {
3138 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3139 wake_up_interruptible(&priv->wait_command_queue);
3140 }
3141 }
3142
3143 /************************** RX-FUNCTIONS ****************************/
3144 /*
3145 * Rx theory of operation
3146 *
3147 * The host allocates 32 DMA target addresses and passes the host address
3148 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3149 * 0 to 31
3150 *
3151 * Rx Queue Indexes
3152 * The host/firmware share two index registers for managing the Rx buffers.
3153 *
3154 * The READ index maps to the first position that the firmware may be writing
3155 * to -- the driver can read up to (but not including) this position and get
3156 * good data.
3157 * The READ index is managed by the firmware once the card is enabled.
3158 *
3159 * The WRITE index maps to the last position the driver has read from -- the
3160 * position preceding WRITE is the last slot the firmware can place a packet.
3161 *
3162 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3163 * WRITE = READ.
3164 *
3165 * During initialization, the host sets up the READ queue position to the first
3166 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3167 *
3168 * When the firmware places a packet in a buffer, it will advance the READ index
3169 * and fire the RX interrupt. The driver can then query the READ index and
3170 * process as many packets as possible, moving the WRITE index forward as it
3171 * resets the Rx queue buffers with new memory.
3172 *
3173 * The management in the driver is as follows:
3174 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3175 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3176 * to replenish the iwl->rxq->rx_free.
3177 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3178 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3179 * 'processed' and 'read' driver indexes as well)
3180 * + A received packet is processed and handed to the kernel network stack,
3181 * detached from the iwl->rxq. The driver 'processed' index is updated.
3182 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3183 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3184 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3185 * were enough free buffers and RX_STALLED is set it is cleared.
3186 *
3187 *
3188 * Driver sequence:
3189 *
3190 * iwl3945_rx_queue_alloc() Allocates rx_free
3191 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3192 * iwl3945_rx_queue_restock
3193 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3194 * queue, updates firmware pointers, and updates
3195 * the WRITE index. If insufficient rx_free buffers
3196 * are available, schedules iwl3945_rx_replenish
3197 *
3198 * -- enable interrupts --
3199 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
3200 * READ INDEX, detaching the SKB from the pool.
3201 * Moves the packet buffer from queue to rx_used.
3202 * Calls iwl3945_rx_queue_restock to refill any empty
3203 * slots.
3204 * ...
3205 *
3206 */
3207
3208 /**
3209 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3210 */
3211 static int iwl3945_rx_queue_space(const struct iwl_rx_queue *q)
3212 {
3213 int s = q->read - q->write;
3214 if (s <= 0)
3215 s += RX_QUEUE_SIZE;
3216 /* keep some buffer to not confuse full and empty queue */
3217 s -= 2;
3218 if (s < 0)
3219 s = 0;
3220 return s;
3221 }
3222
3223 /**
3224 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3225 */
3226 int iwl3945_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
3227 {
3228 u32 reg = 0;
3229 int rc = 0;
3230 unsigned long flags;
3231
3232 spin_lock_irqsave(&q->lock, flags);
3233
3234 if (q->need_update == 0)
3235 goto exit_unlock;
3236
3237 /* If power-saving is in use, make sure device is awake */
3238 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3239 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3240
3241 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3242 iwl_set_bit(priv, CSR_GP_CNTRL,
3243 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3244 goto exit_unlock;
3245 }
3246
3247 rc = iwl_grab_nic_access(priv);
3248 if (rc)
3249 goto exit_unlock;
3250
3251 /* Device expects a multiple of 8 */
3252 iwl_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3253 q->write & ~0x7);
3254 iwl_release_nic_access(priv);
3255
3256 /* Else device is assumed to be awake */
3257 } else
3258 /* Device expects a multiple of 8 */
3259 iwl_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3260
3261
3262 q->need_update = 0;
3263
3264 exit_unlock:
3265 spin_unlock_irqrestore(&q->lock, flags);
3266 return rc;
3267 }
3268
3269 /**
3270 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3271 */
3272 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
3273 dma_addr_t dma_addr)
3274 {
3275 return cpu_to_le32((u32)dma_addr);
3276 }
3277
3278 /**
3279 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3280 *
3281 * If there are slots in the RX queue that need to be restocked,
3282 * and we have free pre-allocated buffers, fill the ranks as much
3283 * as we can, pulling from rx_free.
3284 *
3285 * This moves the 'write' index forward to catch up with 'processed', and
3286 * also updates the memory address in the firmware to reference the new
3287 * target buffer.
3288 */
3289 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
3290 {
3291 struct iwl_rx_queue *rxq = &priv->rxq;
3292 struct list_head *element;
3293 struct iwl_rx_mem_buffer *rxb;
3294 unsigned long flags;
3295 int write, rc;
3296
3297 spin_lock_irqsave(&rxq->lock, flags);
3298 write = rxq->write & ~0x7;
3299 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3300 /* Get next free Rx buffer, remove from free list */
3301 element = rxq->rx_free.next;
3302 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3303 list_del(element);
3304
3305 /* Point to Rx buffer via next RBD in circular buffer */
3306 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
3307 rxq->queue[rxq->write] = rxb;
3308 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3309 rxq->free_count--;
3310 }
3311 spin_unlock_irqrestore(&rxq->lock, flags);
3312 /* If the pre-allocated buffer pool is dropping low, schedule to
3313 * refill it */
3314 if (rxq->free_count <= RX_LOW_WATERMARK)
3315 queue_work(priv->workqueue, &priv->rx_replenish);
3316
3317
3318 /* If we've added more space for the firmware to place data, tell it.
3319 * Increment device's write pointer in multiples of 8. */
3320 if ((write != (rxq->write & ~0x7))
3321 || (abs(rxq->write - rxq->read) > 7)) {
3322 spin_lock_irqsave(&rxq->lock, flags);
3323 rxq->need_update = 1;
3324 spin_unlock_irqrestore(&rxq->lock, flags);
3325 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3326 if (rc)
3327 return rc;
3328 }
3329
3330 return 0;
3331 }
3332
3333 /**
3334 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3335 *
3336 * When moving to rx_free an SKB is allocated for the slot.
3337 *
3338 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3339 * This is called as a scheduled work item (except for during initialization)
3340 */
3341 static void iwl3945_rx_allocate(struct iwl_priv *priv)
3342 {
3343 struct iwl_rx_queue *rxq = &priv->rxq;
3344 struct list_head *element;
3345 struct iwl_rx_mem_buffer *rxb;
3346 unsigned long flags;
3347 spin_lock_irqsave(&rxq->lock, flags);
3348 while (!list_empty(&rxq->rx_used)) {
3349 element = rxq->rx_used.next;
3350 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3351
3352 /* Alloc a new receive buffer */
3353 rxb->skb =
3354 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3355 if (!rxb->skb) {
3356 if (net_ratelimit())
3357 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
3358 /* We don't reschedule replenish work here -- we will
3359 * call the restock method and if it still needs
3360 * more buffers it will schedule replenish */
3361 break;
3362 }
3363
3364 /* If radiotap head is required, reserve some headroom here.
3365 * The physical head count is a variable rx_stats->phy_count.
3366 * We reserve 4 bytes here. Plus these extra bytes, the
3367 * headroom of the physical head should be enough for the
3368 * radiotap head that iwl3945 supported. See iwl3945_rt.
3369 */
3370 skb_reserve(rxb->skb, 4);
3371
3372 priv->alloc_rxb_skb++;
3373 list_del(element);
3374
3375 /* Get physical address of RB/SKB */
3376 rxb->real_dma_addr =
3377 pci_map_single(priv->pci_dev, rxb->skb->data,
3378 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3379 list_add_tail(&rxb->list, &rxq->rx_free);
3380 rxq->free_count++;
3381 }
3382 spin_unlock_irqrestore(&rxq->lock, flags);
3383 }
3384
3385 /*
3386 * this should be called while priv->lock is locked
3387 */
3388 static void __iwl3945_rx_replenish(void *data)
3389 {
3390 struct iwl_priv *priv = data;
3391
3392 iwl3945_rx_allocate(priv);
3393 iwl3945_rx_queue_restock(priv);
3394 }
3395
3396
3397 void iwl3945_rx_replenish(void *data)
3398 {
3399 struct iwl_priv *priv = data;
3400 unsigned long flags;
3401
3402 iwl3945_rx_allocate(priv);
3403
3404 spin_lock_irqsave(&priv->lock, flags);
3405 iwl3945_rx_queue_restock(priv);
3406 spin_unlock_irqrestore(&priv->lock, flags);
3407 }
3408
3409 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3410 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3411 * This free routine walks the list of POOL entries and if SKB is set to
3412 * non NULL it is unmapped and freed
3413 */
3414 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3415 {
3416 int i;
3417 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3418 if (rxq->pool[i].skb != NULL) {
3419 pci_unmap_single(priv->pci_dev,
3420 rxq->pool[i].real_dma_addr,
3421 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3422 dev_kfree_skb(rxq->pool[i].skb);
3423 }
3424 }
3425
3426 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3427 rxq->dma_addr);
3428 rxq->bd = NULL;
3429 }
3430
3431 int iwl3945_rx_queue_alloc(struct iwl_priv *priv)
3432 {
3433 struct iwl_rx_queue *rxq = &priv->rxq;
3434 struct pci_dev *dev = priv->pci_dev;
3435 int i;
3436
3437 spin_lock_init(&rxq->lock);
3438 INIT_LIST_HEAD(&rxq->rx_free);
3439 INIT_LIST_HEAD(&rxq->rx_used);
3440
3441 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3442 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3443 if (!rxq->bd)
3444 return -ENOMEM;
3445
3446 /* Fill the rx_used queue with _all_ of the Rx buffers */
3447 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3448 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3449
3450 /* Set us so that we have processed and used all buffers, but have
3451 * not restocked the Rx queue with fresh buffers */
3452 rxq->read = rxq->write = 0;
3453 rxq->free_count = 0;
3454 rxq->need_update = 0;
3455 return 0;
3456 }
3457
3458 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3459 {
3460 unsigned long flags;
3461 int i;
3462 spin_lock_irqsave(&rxq->lock, flags);
3463 INIT_LIST_HEAD(&rxq->rx_free);
3464 INIT_LIST_HEAD(&rxq->rx_used);
3465 /* Fill the rx_used queue with _all_ of the Rx buffers */
3466 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3467 /* In the reset function, these buffers may have been allocated
3468 * to an SKB, so we need to unmap and free potential storage */
3469 if (rxq->pool[i].skb != NULL) {
3470 pci_unmap_single(priv->pci_dev,
3471 rxq->pool[i].real_dma_addr,
3472 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3473 priv->alloc_rxb_skb--;
3474 dev_kfree_skb(rxq->pool[i].skb);
3475 rxq->pool[i].skb = NULL;
3476 }
3477 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3478 }
3479
3480 /* Set us so that we have processed and used all buffers, but have
3481 * not restocked the Rx queue with fresh buffers */
3482 rxq->read = rxq->write = 0;
3483 rxq->free_count = 0;
3484 spin_unlock_irqrestore(&rxq->lock, flags);
3485 }
3486
3487 /* Convert linear signal-to-noise ratio into dB */
3488 static u8 ratio2dB[100] = {
3489 /* 0 1 2 3 4 5 6 7 8 9 */
3490 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3491 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3492 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3493 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3494 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3495 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3496 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3497 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3498 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3499 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3500 };
3501
3502 /* Calculates a relative dB value from a ratio of linear
3503 * (i.e. not dB) signal levels.
3504 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3505 int iwl3945_calc_db_from_ratio(int sig_ratio)
3506 {
3507 /* 1000:1 or higher just report as 60 dB */
3508 if (sig_ratio >= 1000)
3509 return 60;
3510
3511 /* 100:1 or higher, divide by 10 and use table,
3512 * add 20 dB to make up for divide by 10 */
3513 if (sig_ratio >= 100)
3514 return 20 + (int)ratio2dB[sig_ratio/10];
3515
3516 /* We shouldn't see this */
3517 if (sig_ratio < 1)
3518 return 0;
3519
3520 /* Use table for ratios 1:1 - 99:1 */
3521 return (int)ratio2dB[sig_ratio];
3522 }
3523
3524 #define PERFECT_RSSI (-20) /* dBm */
3525 #define WORST_RSSI (-95) /* dBm */
3526 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3527
3528 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3529 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3530 * about formulas used below. */
3531 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3532 {
3533 int sig_qual;
3534 int degradation = PERFECT_RSSI - rssi_dbm;
3535
3536 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3537 * as indicator; formula is (signal dbm - noise dbm).
3538 * SNR at or above 40 is a great signal (100%).
3539 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3540 * Weakest usable signal is usually 10 - 15 dB SNR. */
3541 if (noise_dbm) {
3542 if (rssi_dbm - noise_dbm >= 40)
3543 return 100;
3544 else if (rssi_dbm < noise_dbm)
3545 return 0;
3546 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3547
3548 /* Else use just the signal level.
3549 * This formula is a least squares fit of data points collected and
3550 * compared with a reference system that had a percentage (%) display
3551 * for signal quality. */
3552 } else
3553 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3554 (15 * RSSI_RANGE + 62 * degradation)) /
3555 (RSSI_RANGE * RSSI_RANGE);
3556
3557 if (sig_qual > 100)
3558 sig_qual = 100;
3559 else if (sig_qual < 1)
3560 sig_qual = 0;
3561
3562 return sig_qual;
3563 }
3564
3565 /**
3566 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3567 *
3568 * Uses the priv->rx_handlers callback function array to invoke
3569 * the appropriate handlers, including command responses,
3570 * frame-received notifications, and other notifications.
3571 */
3572 static void iwl3945_rx_handle(struct iwl_priv *priv)
3573 {
3574 struct iwl_rx_mem_buffer *rxb;
3575 struct iwl_rx_packet *pkt;
3576 struct iwl_rx_queue *rxq = &priv->rxq;
3577 u32 r, i;
3578 int reclaim;
3579 unsigned long flags;
3580 u8 fill_rx = 0;
3581 u32 count = 8;
3582
3583 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3584 * buffer that the driver may process (last buffer filled by ucode). */
3585 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
3586 i = rxq->read;
3587
3588 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3589 fill_rx = 1;
3590 /* Rx interrupt, but nothing sent from uCode */
3591 if (i == r)
3592 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3593
3594 while (i != r) {
3595 rxb = rxq->queue[i];
3596
3597 /* If an RXB doesn't have a Rx queue slot associated with it,
3598 * then a bug has been introduced in the queue refilling
3599 * routines -- catch it here */
3600 BUG_ON(rxb == NULL);
3601
3602 rxq->queue[i] = NULL;
3603
3604 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
3605 IWL_RX_BUF_SIZE,
3606 PCI_DMA_FROMDEVICE);
3607 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3608
3609 /* Reclaim a command buffer only if this packet is a response
3610 * to a (driver-originated) command.
3611 * If the packet (e.g. Rx frame) originated from uCode,
3612 * there is no command buffer to reclaim.
3613 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3614 * but apparently a few don't get set; catch them here. */
3615 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3616 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3617 (pkt->hdr.cmd != REPLY_TX);
3618
3619 /* Based on type of command response or notification,
3620 * handle those that need handling via function in
3621 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3622 if (priv->rx_handlers[pkt->hdr.cmd]) {
3623 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3624 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3625 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3626 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3627 } else {
3628 /* No handling needed */
3629 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3630 "r %d i %d No handler needed for %s, 0x%02x\n",
3631 r, i, get_cmd_string(pkt->hdr.cmd),
3632 pkt->hdr.cmd);
3633 }
3634
3635 if (reclaim) {
3636 /* Invoke any callbacks, transfer the skb to caller, and
3637 * fire off the (possibly) blocking iwl3945_send_cmd()
3638 * as we reclaim the driver command queue */
3639 if (rxb && rxb->skb)
3640 iwl3945_tx_cmd_complete(priv, rxb);
3641 else
3642 IWL_WARN(priv, "Claim null rxb?\n");
3643 }
3644
3645 /* For now we just don't re-use anything. We can tweak this
3646 * later to try and re-use notification packets and SKBs that
3647 * fail to Rx correctly */
3648 if (rxb->skb != NULL) {
3649 priv->alloc_rxb_skb--;
3650 dev_kfree_skb_any(rxb->skb);
3651 rxb->skb = NULL;
3652 }
3653
3654 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
3655 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3656 spin_lock_irqsave(&rxq->lock, flags);
3657 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3658 spin_unlock_irqrestore(&rxq->lock, flags);
3659 i = (i + 1) & RX_QUEUE_MASK;
3660 /* If there are a lot of unused frames,
3661 * restock the Rx queue so ucode won't assert. */
3662 if (fill_rx) {
3663 count++;
3664 if (count >= 8) {
3665 priv->rxq.read = i;
3666 __iwl3945_rx_replenish(priv);
3667 count = 0;
3668 }
3669 }
3670 }
3671
3672 /* Backtrack one entry */
3673 priv->rxq.read = i;
3674 iwl3945_rx_queue_restock(priv);
3675 }
3676
3677 /**
3678 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3679 */
3680 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
3681 struct iwl3945_tx_queue *txq)
3682 {
3683 u32 reg = 0;
3684 int rc = 0;
3685 int txq_id = txq->q.id;
3686
3687 if (txq->need_update == 0)
3688 return rc;
3689
3690 /* if we're trying to save power */
3691 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3692 /* wake up nic if it's powered down ...
3693 * uCode will wake up, and interrupt us again, so next
3694 * time we'll skip this part. */
3695 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3696
3697 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3698 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3699 iwl_set_bit(priv, CSR_GP_CNTRL,
3700 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3701 return rc;
3702 }
3703
3704 /* restore this queue's parameters in nic hardware. */
3705 rc = iwl_grab_nic_access(priv);
3706 if (rc)
3707 return rc;
3708 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
3709 txq->q.write_ptr | (txq_id << 8));
3710 iwl_release_nic_access(priv);
3711
3712 /* else not in power-save mode, uCode will never sleep when we're
3713 * trying to tx (during RFKILL, we're not trying to tx). */
3714 } else
3715 iwl_write32(priv, HBUS_TARG_WRPTR,
3716 txq->q.write_ptr | (txq_id << 8));
3717
3718 txq->need_update = 0;
3719
3720 return rc;
3721 }
3722
3723 #ifdef CONFIG_IWL3945_DEBUG
3724 static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
3725 struct iwl3945_rxon_cmd *rxon)
3726 {
3727 IWL_DEBUG_RADIO("RX CONFIG:\n");
3728 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3729 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3730 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3731 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3732 le32_to_cpu(rxon->filter_flags));
3733 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3734 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3735 rxon->ofdm_basic_rates);
3736 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3737 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3738 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3739 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3740 }
3741 #endif
3742
3743 static void iwl3945_enable_interrupts(struct iwl_priv *priv)
3744 {
3745 IWL_DEBUG_ISR("Enabling interrupts\n");
3746 set_bit(STATUS_INT_ENABLED, &priv->status);
3747 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3748 }
3749
3750
3751 /* call this function to flush any scheduled tasklet */
3752 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3753 {
3754 /* wait to make sure we flush pending tasklet*/
3755 synchronize_irq(priv->pci_dev->irq);
3756 tasklet_kill(&priv->irq_tasklet);
3757 }
3758
3759
3760 static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
3761 {
3762 clear_bit(STATUS_INT_ENABLED, &priv->status);
3763
3764 /* disable interrupts from uCode/NIC to host */
3765 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3766
3767 /* acknowledge/clear/reset any interrupts still pending
3768 * from uCode or flow handler (Rx/Tx DMA) */
3769 iwl_write32(priv, CSR_INT, 0xffffffff);
3770 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
3771 IWL_DEBUG_ISR("Disabled interrupts\n");
3772 }
3773
3774 static const char *desc_lookup(int i)
3775 {
3776 switch (i) {
3777 case 1:
3778 return "FAIL";
3779 case 2:
3780 return "BAD_PARAM";
3781 case 3:
3782 return "BAD_CHECKSUM";
3783 case 4:
3784 return "NMI_INTERRUPT";
3785 case 5:
3786 return "SYSASSERT";
3787 case 6:
3788 return "FATAL_ERROR";
3789 }
3790
3791 return "UNKNOWN";
3792 }
3793
3794 #define ERROR_START_OFFSET (1 * sizeof(u32))
3795 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
3796
3797 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
3798 {
3799 u32 i;
3800 u32 desc, time, count, base, data1;
3801 u32 blink1, blink2, ilink1, ilink2;
3802 int rc;
3803
3804 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3805
3806 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3807 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
3808 return;
3809 }
3810
3811 rc = iwl_grab_nic_access(priv);
3812 if (rc) {
3813 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3814 return;
3815 }
3816
3817 count = iwl_read_targ_mem(priv, base);
3818
3819 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3820 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
3821 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
3822 priv->status, count);
3823 }
3824
3825 IWL_ERR(priv, "Desc Time asrtPC blink2 "
3826 "ilink1 nmiPC Line\n");
3827 for (i = ERROR_START_OFFSET;
3828 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
3829 i += ERROR_ELEM_SIZE) {
3830 desc = iwl_read_targ_mem(priv, base + i);
3831 time =
3832 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
3833 blink1 =
3834 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
3835 blink2 =
3836 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
3837 ilink1 =
3838 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
3839 ilink2 =
3840 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
3841 data1 =
3842 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
3843
3844 IWL_ERR(priv,
3845 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
3846 desc_lookup(desc), desc, time, blink1, blink2,
3847 ilink1, ilink2, data1);
3848 }
3849
3850 iwl_release_nic_access(priv);
3851
3852 }
3853
3854 #define EVENT_START_OFFSET (6 * sizeof(u32))
3855
3856 /**
3857 * iwl3945_print_event_log - Dump error event log to syslog
3858 *
3859 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
3860 */
3861 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
3862 u32 num_events, u32 mode)
3863 {
3864 u32 i;
3865 u32 base; /* SRAM byte address of event log header */
3866 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
3867 u32 ptr; /* SRAM byte address of log data */
3868 u32 ev, time, data; /* event log data */
3869
3870 if (num_events == 0)
3871 return;
3872
3873 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3874
3875 if (mode == 0)
3876 event_size = 2 * sizeof(u32);
3877 else
3878 event_size = 3 * sizeof(u32);
3879
3880 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
3881
3882 /* "time" is actually "data" for mode 0 (no timestamp).
3883 * place event id # at far right for easier visual parsing. */
3884 for (i = 0; i < num_events; i++) {
3885 ev = iwl_read_targ_mem(priv, ptr);
3886 ptr += sizeof(u32);
3887 time = iwl_read_targ_mem(priv, ptr);
3888 ptr += sizeof(u32);
3889 if (mode == 0) {
3890 /* data, ev */
3891 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
3892 } else {
3893 data = iwl_read_targ_mem(priv, ptr);
3894 ptr += sizeof(u32);
3895 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
3896 }
3897 }
3898 }
3899
3900 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
3901 {
3902 int rc;
3903 u32 base; /* SRAM byte address of event log header */
3904 u32 capacity; /* event log capacity in # entries */
3905 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
3906 u32 num_wraps; /* # times uCode wrapped to top of log */
3907 u32 next_entry; /* index of next entry to be written by uCode */
3908 u32 size; /* # entries that we'll print */
3909
3910 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
3911 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3912 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
3913 return;
3914 }
3915
3916 rc = iwl_grab_nic_access(priv);
3917 if (rc) {
3918 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3919 return;
3920 }
3921
3922 /* event log header */
3923 capacity = iwl_read_targ_mem(priv, base);
3924 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
3925 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
3926 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
3927
3928 size = num_wraps ? capacity : next_entry;
3929
3930 /* bail out if nothing in log */
3931 if (size == 0) {
3932 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
3933 iwl_release_nic_access(priv);
3934 return;
3935 }
3936
3937 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
3938 size, num_wraps);
3939
3940 /* if uCode has wrapped back to top of log, start at the oldest entry,
3941 * i.e the next one that uCode would fill. */
3942 if (num_wraps)
3943 iwl3945_print_event_log(priv, next_entry,
3944 capacity - next_entry, mode);
3945
3946 /* (then/else) start at top of log */
3947 iwl3945_print_event_log(priv, 0, next_entry, mode);
3948
3949 iwl_release_nic_access(priv);
3950 }
3951
3952 /**
3953 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
3954 */
3955 static void iwl3945_irq_handle_error(struct iwl_priv *priv)
3956 {
3957 /* Set the FW error flag -- cleared on iwl3945_down */
3958 set_bit(STATUS_FW_ERROR, &priv->status);
3959
3960 /* Cancel currently queued command. */
3961 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3962
3963 #ifdef CONFIG_IWL3945_DEBUG
3964 if (priv->debug_level & IWL_DL_FW_ERRORS) {
3965 iwl3945_dump_nic_error_log(priv);
3966 iwl3945_dump_nic_event_log(priv);
3967 iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
3968 }
3969 #endif
3970
3971 wake_up_interruptible(&priv->wait_command_queue);
3972
3973 /* Keep the restart process from trying to send host
3974 * commands by clearing the INIT status bit */
3975 clear_bit(STATUS_READY, &priv->status);
3976
3977 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3978 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
3979 "Restarting adapter due to uCode error.\n");
3980
3981 if (iwl3945_is_associated(priv)) {
3982 memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
3983 sizeof(priv->recovery39_rxon));
3984 priv->error_recovering = 1;
3985 }
3986 queue_work(priv->workqueue, &priv->restart);
3987 }
3988 }
3989
3990 static void iwl3945_error_recovery(struct iwl_priv *priv)
3991 {
3992 unsigned long flags;
3993
3994 memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
3995 sizeof(priv->staging39_rxon));
3996 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3997 iwl3945_commit_rxon(priv);
3998
3999 iwl3945_add_station(priv, priv->bssid, 1, 0);
4000
4001 spin_lock_irqsave(&priv->lock, flags);
4002 priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
4003 priv->error_recovering = 0;
4004 spin_unlock_irqrestore(&priv->lock, flags);
4005 }
4006
4007 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
4008 {
4009 u32 inta, handled = 0;
4010 u32 inta_fh;
4011 unsigned long flags;
4012 #ifdef CONFIG_IWL3945_DEBUG
4013 u32 inta_mask;
4014 #endif
4015
4016 spin_lock_irqsave(&priv->lock, flags);
4017
4018 /* Ack/clear/reset pending uCode interrupts.
4019 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4020 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4021 inta = iwl_read32(priv, CSR_INT);
4022 iwl_write32(priv, CSR_INT, inta);
4023
4024 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4025 * Any new interrupts that happen after this, either while we're
4026 * in this tasklet, or later, will show up in next ISR/tasklet. */
4027 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4028 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4029
4030 #ifdef CONFIG_IWL3945_DEBUG
4031 if (priv->debug_level & IWL_DL_ISR) {
4032 /* just for debug */
4033 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4034 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4035 inta, inta_mask, inta_fh);
4036 }
4037 #endif
4038
4039 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4040 * atomic, make sure that inta covers all the interrupts that
4041 * we've discovered, even if FH interrupt came in just after
4042 * reading CSR_INT. */
4043 if (inta_fh & CSR39_FH_INT_RX_MASK)
4044 inta |= CSR_INT_BIT_FH_RX;
4045 if (inta_fh & CSR39_FH_INT_TX_MASK)
4046 inta |= CSR_INT_BIT_FH_TX;
4047
4048 /* Now service all interrupt bits discovered above. */
4049 if (inta & CSR_INT_BIT_HW_ERR) {
4050 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
4051
4052 /* Tell the device to stop sending interrupts */
4053 iwl3945_disable_interrupts(priv);
4054
4055 iwl3945_irq_handle_error(priv);
4056
4057 handled |= CSR_INT_BIT_HW_ERR;
4058
4059 spin_unlock_irqrestore(&priv->lock, flags);
4060
4061 return;
4062 }
4063
4064 #ifdef CONFIG_IWL3945_DEBUG
4065 if (priv->debug_level & (IWL_DL_ISR)) {
4066 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4067 if (inta & CSR_INT_BIT_SCD)
4068 IWL_DEBUG_ISR("Scheduler finished to transmit "
4069 "the frame/frames.\n");
4070
4071 /* Alive notification via Rx interrupt will do the real work */
4072 if (inta & CSR_INT_BIT_ALIVE)
4073 IWL_DEBUG_ISR("Alive interrupt\n");
4074 }
4075 #endif
4076 /* Safely ignore these bits for debug checks below */
4077 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4078
4079 /* Error detected by uCode */
4080 if (inta & CSR_INT_BIT_SW_ERR) {
4081 IWL_ERR(priv, "Microcode SW error detected. "
4082 "Restarting 0x%X.\n", inta);
4083 iwl3945_irq_handle_error(priv);
4084 handled |= CSR_INT_BIT_SW_ERR;
4085 }
4086
4087 /* uCode wakes up after power-down sleep */
4088 if (inta & CSR_INT_BIT_WAKEUP) {
4089 IWL_DEBUG_ISR("Wakeup interrupt\n");
4090 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4091 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[0]);
4092 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[1]);
4093 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[2]);
4094 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[3]);
4095 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[4]);
4096 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[5]);
4097
4098 handled |= CSR_INT_BIT_WAKEUP;
4099 }
4100
4101 /* All uCode command responses, including Tx command responses,
4102 * Rx "responses" (frame-received notification), and other
4103 * notifications from uCode come through here*/
4104 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4105 iwl3945_rx_handle(priv);
4106 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4107 }
4108
4109 if (inta & CSR_INT_BIT_FH_TX) {
4110 IWL_DEBUG_ISR("Tx interrupt\n");
4111
4112 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4113 if (!iwl_grab_nic_access(priv)) {
4114 iwl_write_direct32(priv, FH39_TCSR_CREDIT
4115 (FH39_SRVC_CHNL), 0x0);
4116 iwl_release_nic_access(priv);
4117 }
4118 handled |= CSR_INT_BIT_FH_TX;
4119 }
4120
4121 if (inta & ~handled)
4122 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
4123
4124 if (inta & ~CSR_INI_SET_MASK) {
4125 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
4126 inta & ~CSR_INI_SET_MASK);
4127 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
4128 }
4129
4130 /* Re-enable all interrupts */
4131 /* only Re-enable if disabled by irq */
4132 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4133 iwl3945_enable_interrupts(priv);
4134
4135 #ifdef CONFIG_IWL3945_DEBUG
4136 if (priv->debug_level & (IWL_DL_ISR)) {
4137 inta = iwl_read32(priv, CSR_INT);
4138 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4139 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4140 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4141 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4142 }
4143 #endif
4144 spin_unlock_irqrestore(&priv->lock, flags);
4145 }
4146
4147 static irqreturn_t iwl3945_isr(int irq, void *data)
4148 {
4149 struct iwl_priv *priv = data;
4150 u32 inta, inta_mask;
4151 u32 inta_fh;
4152 if (!priv)
4153 return IRQ_NONE;
4154
4155 spin_lock(&priv->lock);
4156
4157 /* Disable (but don't clear!) interrupts here to avoid
4158 * back-to-back ISRs and sporadic interrupts from our NIC.
4159 * If we have something to service, the tasklet will re-enable ints.
4160 * If we *don't* have something, we'll re-enable before leaving here. */
4161 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4162 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4163
4164 /* Discover which interrupts are active/pending */
4165 inta = iwl_read32(priv, CSR_INT);
4166 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4167
4168 /* Ignore interrupt if there's nothing in NIC to service.
4169 * This may be due to IRQ shared with another device,
4170 * or due to sporadic interrupts thrown from our NIC. */
4171 if (!inta && !inta_fh) {
4172 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4173 goto none;
4174 }
4175
4176 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4177 /* Hardware disappeared */
4178 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
4179 goto unplugged;
4180 }
4181
4182 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4183 inta, inta_mask, inta_fh);
4184
4185 inta &= ~CSR_INT_BIT_SCD;
4186
4187 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4188 if (likely(inta || inta_fh))
4189 tasklet_schedule(&priv->irq_tasklet);
4190 unplugged:
4191 spin_unlock(&priv->lock);
4192
4193 return IRQ_HANDLED;
4194
4195 none:
4196 /* re-enable interrupts here since we don't have anything to service. */
4197 /* only Re-enable if disabled by irq */
4198 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4199 iwl3945_enable_interrupts(priv);
4200 spin_unlock(&priv->lock);
4201 return IRQ_NONE;
4202 }
4203
4204 /************************** EEPROM BANDS ****************************
4205 *
4206 * The iwl3945_eeprom_band definitions below provide the mapping from the
4207 * EEPROM contents to the specific channel number supported for each
4208 * band.
4209 *
4210 * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
4211 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4212 * The specific geography and calibration information for that channel
4213 * is contained in the eeprom map itself.
4214 *
4215 * During init, we copy the eeprom information and channel map
4216 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4217 *
4218 * channel_map_24/52 provides the index in the channel_info array for a
4219 * given channel. We have to have two separate maps as there is channel
4220 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4221 * band_2
4222 *
4223 * A value of 0xff stored in the channel_map indicates that the channel
4224 * is not supported by the hardware at all.
4225 *
4226 * A value of 0xfe in the channel_map indicates that the channel is not
4227 * valid for Tx with the current hardware. This means that
4228 * while the system can tune and receive on a given channel, it may not
4229 * be able to associate or transmit any frames on that
4230 * channel. There is no corresponding channel information for that
4231 * entry.
4232 *
4233 *********************************************************************/
4234
4235 /* 2.4 GHz */
4236 static const u8 iwl3945_eeprom_band_1[14] = {
4237 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4238 };
4239
4240 /* 5.2 GHz bands */
4241 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4242 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4243 };
4244
4245 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4246 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4247 };
4248
4249 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4250 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4251 };
4252
4253 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4254 145, 149, 153, 157, 161, 165
4255 };
4256
4257 static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
4258 int *eeprom_ch_count,
4259 const struct iwl_eeprom_channel
4260 **eeprom_ch_info,
4261 const u8 **eeprom_ch_index)
4262 {
4263 switch (band) {
4264 case 1: /* 2.4GHz band */
4265 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4266 *eeprom_ch_info = priv->eeprom39.band_1_channels;
4267 *eeprom_ch_index = iwl3945_eeprom_band_1;
4268 break;
4269 case 2: /* 4.9GHz band */
4270 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4271 *eeprom_ch_info = priv->eeprom39.band_2_channels;
4272 *eeprom_ch_index = iwl3945_eeprom_band_2;
4273 break;
4274 case 3: /* 5.2GHz band */
4275 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4276 *eeprom_ch_info = priv->eeprom39.band_3_channels;
4277 *eeprom_ch_index = iwl3945_eeprom_band_3;
4278 break;
4279 case 4: /* 5.5GHz band */
4280 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4281 *eeprom_ch_info = priv->eeprom39.band_4_channels;
4282 *eeprom_ch_index = iwl3945_eeprom_band_4;
4283 break;
4284 case 5: /* 5.7GHz band */
4285 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4286 *eeprom_ch_info = priv->eeprom39.band_5_channels;
4287 *eeprom_ch_index = iwl3945_eeprom_band_5;
4288 break;
4289 default:
4290 BUG();
4291 return;
4292 }
4293 }
4294
4295 /**
4296 * iwl3945_get_channel_info - Find driver's private channel info
4297 *
4298 * Based on band and channel number.
4299 */
4300 const struct iwl_channel_info *
4301 iwl3945_get_channel_info(const struct iwl_priv *priv,
4302 enum ieee80211_band band, u16 channel)
4303 {
4304 int i;
4305
4306 switch (band) {
4307 case IEEE80211_BAND_5GHZ:
4308 for (i = 14; i < priv->channel_count; i++) {
4309 if (priv->channel_info[i].channel == channel)
4310 return &priv->channel_info[i];
4311 }
4312 break;
4313
4314 case IEEE80211_BAND_2GHZ:
4315 if (channel >= 1 && channel <= 14)
4316 return &priv->channel_info[channel - 1];
4317 break;
4318 case IEEE80211_NUM_BANDS:
4319 WARN_ON(1);
4320 }
4321
4322 return NULL;
4323 }
4324
4325 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4326 ? # x " " : "")
4327
4328 /**
4329 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4330 */
4331 static int iwl3945_init_channel_map(struct iwl_priv *priv)
4332 {
4333 int eeprom_ch_count = 0;
4334 const u8 *eeprom_ch_index = NULL;
4335 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4336 int band, ch;
4337 struct iwl_channel_info *ch_info;
4338
4339 if (priv->channel_count) {
4340 IWL_DEBUG_INFO("Channel map already initialized.\n");
4341 return 0;
4342 }
4343
4344 if (priv->eeprom39.version < 0x2f) {
4345 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4346 priv->eeprom39.version);
4347 return -EINVAL;
4348 }
4349
4350 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4351
4352 priv->channel_count =
4353 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4354 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4355 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4356 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4357 ARRAY_SIZE(iwl3945_eeprom_band_5);
4358
4359 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4360
4361 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
4362 priv->channel_count, GFP_KERNEL);
4363 if (!priv->channel_info) {
4364 IWL_ERR(priv, "Could not allocate channel_info\n");
4365 priv->channel_count = 0;
4366 return -ENOMEM;
4367 }
4368
4369 ch_info = priv->channel_info;
4370
4371 /* Loop through the 5 EEPROM bands adding them in order to the
4372 * channel map we maintain (that contains additional information than
4373 * what just in the EEPROM) */
4374 for (band = 1; band <= 5; band++) {
4375
4376 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4377 &eeprom_ch_info, &eeprom_ch_index);
4378
4379 /* Loop through each band adding each of the channels */
4380 for (ch = 0; ch < eeprom_ch_count; ch++) {
4381 ch_info->channel = eeprom_ch_index[ch];
4382 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4383 IEEE80211_BAND_5GHZ;
4384
4385 /* permanently store EEPROM's channel regulatory flags
4386 * and max power in channel info database. */
4387 ch_info->eeprom = eeprom_ch_info[ch];
4388
4389 /* Copy the run-time flags so they are there even on
4390 * invalid channels */
4391 ch_info->flags = eeprom_ch_info[ch].flags;
4392
4393 if (!(is_channel_valid(ch_info))) {
4394 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4395 "No traffic\n",
4396 ch_info->channel,
4397 ch_info->flags,
4398 is_channel_a_band(ch_info) ?
4399 "5.2" : "2.4");
4400 ch_info++;
4401 continue;
4402 }
4403
4404 /* Initialize regulatory-based run-time data */
4405 ch_info->max_power_avg = ch_info->curr_txpow =
4406 eeprom_ch_info[ch].max_power_avg;
4407 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4408 ch_info->min_power = 0;
4409
4410 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4411 " %ddBm): Ad-Hoc %ssupported\n",
4412 ch_info->channel,
4413 is_channel_a_band(ch_info) ?
4414 "5.2" : "2.4",
4415 CHECK_AND_PRINT(VALID),
4416 CHECK_AND_PRINT(IBSS),
4417 CHECK_AND_PRINT(ACTIVE),
4418 CHECK_AND_PRINT(RADAR),
4419 CHECK_AND_PRINT(WIDE),
4420 CHECK_AND_PRINT(DFS),
4421 eeprom_ch_info[ch].flags,
4422 eeprom_ch_info[ch].max_power_avg,
4423 ((eeprom_ch_info[ch].
4424 flags & EEPROM_CHANNEL_IBSS)
4425 && !(eeprom_ch_info[ch].
4426 flags & EEPROM_CHANNEL_RADAR))
4427 ? "" : "not ");
4428
4429 /* Set the user_txpower_limit to the highest power
4430 * supported by any channel */
4431 if (eeprom_ch_info[ch].max_power_avg >
4432 priv->user_txpower_limit)
4433 priv->user_txpower_limit =
4434 eeprom_ch_info[ch].max_power_avg;
4435
4436 ch_info++;
4437 }
4438 }
4439
4440 /* Set up txpower settings in driver for all channels */
4441 if (iwl3945_txpower_set_from_eeprom(priv))
4442 return -EIO;
4443
4444 return 0;
4445 }
4446
4447 /*
4448 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4449 */
4450 static void iwl3945_free_channel_map(struct iwl_priv *priv)
4451 {
4452 kfree(priv->channel_info);
4453 priv->channel_count = 0;
4454 }
4455
4456 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4457 * sending probe req. This should be set long enough to hear probe responses
4458 * from more than one AP. */
4459 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4460 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4461
4462 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4463 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4464
4465 /* For faster active scanning, scan will move to the next channel if fewer than
4466 * PLCP_QUIET_THRESH packets are heard on this channel within
4467 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4468 * time if it's a quiet channel (nothing responded to our probe, and there's
4469 * no other traffic).
4470 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4471 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4472 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4473
4474 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4475 * Must be set longer than active dwell time.
4476 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4477 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4478 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4479 #define IWL_PASSIVE_DWELL_BASE (100)
4480 #define IWL_CHANNEL_TUNE_TIME 5
4481
4482 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4483
4484 static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
4485 enum ieee80211_band band,
4486 u8 n_probes)
4487 {
4488 if (band == IEEE80211_BAND_5GHZ)
4489 return IWL_ACTIVE_DWELL_TIME_52 +
4490 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4491 else
4492 return IWL_ACTIVE_DWELL_TIME_24 +
4493 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4494 }
4495
4496 static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
4497 enum ieee80211_band band)
4498 {
4499 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4500 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4501 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4502
4503 if (iwl3945_is_associated(priv)) {
4504 /* If we're associated, we clamp the maximum passive
4505 * dwell time to be 98% of the beacon interval (minus
4506 * 2 * channel tune time) */
4507 passive = priv->beacon_int;
4508 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4509 passive = IWL_PASSIVE_DWELL_BASE;
4510 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4511 }
4512
4513 return passive;
4514 }
4515
4516 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
4517 enum ieee80211_band band,
4518 u8 is_active, u8 n_probes,
4519 struct iwl3945_scan_channel *scan_ch)
4520 {
4521 const struct ieee80211_channel *channels = NULL;
4522 const struct ieee80211_supported_band *sband;
4523 const struct iwl_channel_info *ch_info;
4524 u16 passive_dwell = 0;
4525 u16 active_dwell = 0;
4526 int added, i;
4527
4528 sband = iwl_get_hw_mode(priv, band);
4529 if (!sband)
4530 return 0;
4531
4532 channels = sband->channels;
4533
4534 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4535 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4536
4537 if (passive_dwell <= active_dwell)
4538 passive_dwell = active_dwell + 1;
4539
4540 for (i = 0, added = 0; i < sband->n_channels; i++) {
4541 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4542 continue;
4543
4544 scan_ch->channel = channels[i].hw_value;
4545
4546 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4547 if (!is_channel_valid(ch_info)) {
4548 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4549 scan_ch->channel);
4550 continue;
4551 }
4552
4553 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4554 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4555 /* If passive , set up for auto-switch
4556 * and use long active_dwell time.
4557 */
4558 if (!is_active || is_channel_passive(ch_info) ||
4559 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4560 scan_ch->type = 0; /* passive */
4561 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4562 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4563 } else {
4564 scan_ch->type = 1; /* active */
4565 }
4566
4567 /* Set direct probe bits. These may be used both for active
4568 * scan channels (probes gets sent right away),
4569 * or for passive channels (probes get se sent only after
4570 * hearing clear Rx packet).*/
4571 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4572 if (n_probes)
4573 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4574 } else {
4575 /* uCode v1 does not allow setting direct probe bits on
4576 * passive channel. */
4577 if ((scan_ch->type & 1) && n_probes)
4578 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4579 }
4580
4581 /* Set txpower levels to defaults */
4582 scan_ch->tpc.dsp_atten = 110;
4583 /* scan_pwr_info->tpc.dsp_atten; */
4584
4585 /*scan_pwr_info->tpc.tx_gain; */
4586 if (band == IEEE80211_BAND_5GHZ)
4587 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4588 else {
4589 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4590 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4591 * power level:
4592 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4593 */
4594 }
4595
4596 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4597 scan_ch->channel,
4598 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4599 (scan_ch->type & 1) ?
4600 active_dwell : passive_dwell);
4601
4602 scan_ch++;
4603 added++;
4604 }
4605
4606 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4607 return added;
4608 }
4609
4610 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
4611 struct ieee80211_rate *rates)
4612 {
4613 int i;
4614
4615 for (i = 0; i < IWL_RATE_COUNT; i++) {
4616 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4617 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4618 rates[i].hw_value_short = i;
4619 rates[i].flags = 0;
4620 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4621 /*
4622 * If CCK != 1M then set short preamble rate flag.
4623 */
4624 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4625 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4626 }
4627 }
4628 }
4629
4630 /**
4631 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4632 */
4633 static int iwl3945_init_geos(struct iwl_priv *priv)
4634 {
4635 struct iwl_channel_info *ch;
4636 struct ieee80211_supported_band *sband;
4637 struct ieee80211_channel *channels;
4638 struct ieee80211_channel *geo_ch;
4639 struct ieee80211_rate *rates;
4640 int i = 0;
4641
4642 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4643 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4644 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4645 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4646 return 0;
4647 }
4648
4649 channels = kzalloc(sizeof(struct ieee80211_channel) *
4650 priv->channel_count, GFP_KERNEL);
4651 if (!channels)
4652 return -ENOMEM;
4653
4654 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4655 GFP_KERNEL);
4656 if (!rates) {
4657 kfree(channels);
4658 return -ENOMEM;
4659 }
4660
4661 /* 5.2GHz channels start after the 2.4GHz channels */
4662 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4663 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4664 /* just OFDM */
4665 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4666 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4667
4668 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4669 sband->channels = channels;
4670 /* OFDM & CCK */
4671 sband->bitrates = rates;
4672 sband->n_bitrates = IWL_RATE_COUNT;
4673
4674 priv->ieee_channels = channels;
4675 priv->ieee_rates = rates;
4676
4677 iwl3945_init_hw_rates(priv, rates);
4678
4679 for (i = 0; i < priv->channel_count; i++) {
4680 ch = &priv->channel_info[i];
4681
4682 /* FIXME: might be removed if scan is OK*/
4683 if (!is_channel_valid(ch))
4684 continue;
4685
4686 if (is_channel_a_band(ch))
4687 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4688 else
4689 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4690
4691 geo_ch = &sband->channels[sband->n_channels++];
4692
4693 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4694 geo_ch->max_power = ch->max_power_avg;
4695 geo_ch->max_antenna_gain = 0xff;
4696 geo_ch->hw_value = ch->channel;
4697
4698 if (is_channel_valid(ch)) {
4699 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4700 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4701
4702 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4703 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4704
4705 if (ch->flags & EEPROM_CHANNEL_RADAR)
4706 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4707
4708 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4709 priv->max_channel_txpower_limit =
4710 ch->max_power_avg;
4711 } else {
4712 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4713 }
4714
4715 /* Save flags for reg domain usage */
4716 geo_ch->orig_flags = geo_ch->flags;
4717
4718 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4719 ch->channel, geo_ch->center_freq,
4720 is_channel_a_band(ch) ? "5.2" : "2.4",
4721 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4722 "restricted" : "valid",
4723 geo_ch->flags);
4724 }
4725
4726 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4727 priv->cfg->sku & IWL_SKU_A) {
4728 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
4729 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
4730 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4731 priv->cfg->sku &= ~IWL_SKU_A;
4732 }
4733
4734 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4735 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4736 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4737
4738 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4739 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4740 &priv->bands[IEEE80211_BAND_2GHZ];
4741 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4742 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4743 &priv->bands[IEEE80211_BAND_5GHZ];
4744
4745 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4746
4747 return 0;
4748 }
4749
4750 /*
4751 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4752 */
4753 static void iwl3945_free_geos(struct iwl_priv *priv)
4754 {
4755 kfree(priv->ieee_channels);
4756 kfree(priv->ieee_rates);
4757 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4758 }
4759
4760 /******************************************************************************
4761 *
4762 * uCode download functions
4763 *
4764 ******************************************************************************/
4765
4766 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
4767 {
4768 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4769 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4770 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4771 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4772 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4773 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
4774 }
4775
4776 /**
4777 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
4778 * looking at all data.
4779 */
4780 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
4781 {
4782 u32 val;
4783 u32 save_len = len;
4784 int rc = 0;
4785 u32 errcnt;
4786
4787 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4788
4789 rc = iwl_grab_nic_access(priv);
4790 if (rc)
4791 return rc;
4792
4793 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4794 IWL39_RTC_INST_LOWER_BOUND);
4795
4796 errcnt = 0;
4797 for (; len > 0; len -= sizeof(u32), image++) {
4798 /* read data comes through single port, auto-incr addr */
4799 /* NOTE: Use the debugless read so we don't flood kernel log
4800 * if IWL_DL_IO is set */
4801 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4802 if (val != le32_to_cpu(*image)) {
4803 IWL_ERR(priv, "uCode INST section is invalid at "
4804 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4805 save_len - len, val, le32_to_cpu(*image));
4806 rc = -EIO;
4807 errcnt++;
4808 if (errcnt >= 20)
4809 break;
4810 }
4811 }
4812
4813 iwl_release_nic_access(priv);
4814
4815 if (!errcnt)
4816 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
4817
4818 return rc;
4819 }
4820
4821
4822 /**
4823 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
4824 * using sample data 100 bytes apart. If these sample points are good,
4825 * it's a pretty good bet that everything between them is good, too.
4826 */
4827 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
4828 {
4829 u32 val;
4830 int rc = 0;
4831 u32 errcnt = 0;
4832 u32 i;
4833
4834 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4835
4836 rc = iwl_grab_nic_access(priv);
4837 if (rc)
4838 return rc;
4839
4840 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4841 /* read data comes through single port, auto-incr addr */
4842 /* NOTE: Use the debugless read so we don't flood kernel log
4843 * if IWL_DL_IO is set */
4844 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4845 i + IWL39_RTC_INST_LOWER_BOUND);
4846 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4847 if (val != le32_to_cpu(*image)) {
4848 #if 0 /* Enable this if you want to see details */
4849 IWL_ERR(priv, "uCode INST section is invalid at "
4850 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4851 i, val, *image);
4852 #endif
4853 rc = -EIO;
4854 errcnt++;
4855 if (errcnt >= 3)
4856 break;
4857 }
4858 }
4859
4860 iwl_release_nic_access(priv);
4861
4862 return rc;
4863 }
4864
4865
4866 /**
4867 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
4868 * and verify its contents
4869 */
4870 static int iwl3945_verify_ucode(struct iwl_priv *priv)
4871 {
4872 __le32 *image;
4873 u32 len;
4874 int rc = 0;
4875
4876 /* Try bootstrap */
4877 image = (__le32 *)priv->ucode_boot.v_addr;
4878 len = priv->ucode_boot.len;
4879 rc = iwl3945_verify_inst_sparse(priv, image, len);
4880 if (rc == 0) {
4881 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
4882 return 0;
4883 }
4884
4885 /* Try initialize */
4886 image = (__le32 *)priv->ucode_init.v_addr;
4887 len = priv->ucode_init.len;
4888 rc = iwl3945_verify_inst_sparse(priv, image, len);
4889 if (rc == 0) {
4890 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
4891 return 0;
4892 }
4893
4894 /* Try runtime/protocol */
4895 image = (__le32 *)priv->ucode_code.v_addr;
4896 len = priv->ucode_code.len;
4897 rc = iwl3945_verify_inst_sparse(priv, image, len);
4898 if (rc == 0) {
4899 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
4900 return 0;
4901 }
4902
4903 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
4904
4905 /* Since nothing seems to match, show first several data entries in
4906 * instruction SRAM, so maybe visual inspection will give a clue.
4907 * Selection of bootstrap image (vs. other images) is arbitrary. */
4908 image = (__le32 *)priv->ucode_boot.v_addr;
4909 len = priv->ucode_boot.len;
4910 rc = iwl3945_verify_inst_full(priv, image, len);
4911
4912 return rc;
4913 }
4914
4915 static void iwl3945_nic_start(struct iwl_priv *priv)
4916 {
4917 /* Remove all resets to allow NIC to operate */
4918 iwl_write32(priv, CSR_RESET, 0);
4919 }
4920
4921 /**
4922 * iwl3945_read_ucode - Read uCode images from disk file.
4923 *
4924 * Copy into buffers for card to fetch via bus-mastering
4925 */
4926 static int iwl3945_read_ucode(struct iwl_priv *priv)
4927 {
4928 struct iwl_ucode *ucode;
4929 int ret = -EINVAL, index;
4930 const struct firmware *ucode_raw;
4931 /* firmware file name contains uCode/driver compatibility version */
4932 const char *name_pre = priv->cfg->fw_name_pre;
4933 const unsigned int api_max = priv->cfg->ucode_api_max;
4934 const unsigned int api_min = priv->cfg->ucode_api_min;
4935 char buf[25];
4936 u8 *src;
4937 size_t len;
4938 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
4939
4940 /* Ask kernel firmware_class module to get the boot firmware off disk.
4941 * request_firmware() is synchronous, file is in memory on return. */
4942 for (index = api_max; index >= api_min; index--) {
4943 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
4944 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
4945 if (ret < 0) {
4946 IWL_ERR(priv, "%s firmware file req failed: %d\n",
4947 buf, ret);
4948 if (ret == -ENOENT)
4949 continue;
4950 else
4951 goto error;
4952 } else {
4953 if (index < api_max)
4954 IWL_ERR(priv, "Loaded firmware %s, "
4955 "which is deprecated. "
4956 " Please use API v%u instead.\n",
4957 buf, api_max);
4958 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
4959 buf, ucode_raw->size);
4960 break;
4961 }
4962 }
4963
4964 if (ret < 0)
4965 goto error;
4966
4967 /* Make sure that we got at least our header! */
4968 if (ucode_raw->size < sizeof(*ucode)) {
4969 IWL_ERR(priv, "File size way too small!\n");
4970 ret = -EINVAL;
4971 goto err_release;
4972 }
4973
4974 /* Data from ucode file: header followed by uCode images */
4975 ucode = (void *)ucode_raw->data;
4976
4977 priv->ucode_ver = le32_to_cpu(ucode->ver);
4978 api_ver = IWL_UCODE_API(priv->ucode_ver);
4979 inst_size = le32_to_cpu(ucode->inst_size);
4980 data_size = le32_to_cpu(ucode->data_size);
4981 init_size = le32_to_cpu(ucode->init_size);
4982 init_data_size = le32_to_cpu(ucode->init_data_size);
4983 boot_size = le32_to_cpu(ucode->boot_size);
4984
4985 /* api_ver should match the api version forming part of the
4986 * firmware filename ... but we don't check for that and only rely
4987 * on the API version read from firware header from here on forward */
4988
4989 if (api_ver < api_min || api_ver > api_max) {
4990 IWL_ERR(priv, "Driver unable to support your firmware API. "
4991 "Driver supports v%u, firmware is v%u.\n",
4992 api_max, api_ver);
4993 priv->ucode_ver = 0;
4994 ret = -EINVAL;
4995 goto err_release;
4996 }
4997 if (api_ver != api_max)
4998 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
4999 "got %u. New firmware can be obtained "
5000 "from http://www.intellinuxwireless.org.\n",
5001 api_max, api_ver);
5002
5003 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
5004 IWL_UCODE_MAJOR(priv->ucode_ver),
5005 IWL_UCODE_MINOR(priv->ucode_ver),
5006 IWL_UCODE_API(priv->ucode_ver),
5007 IWL_UCODE_SERIAL(priv->ucode_ver));
5008
5009 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5010 priv->ucode_ver);
5011 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5012 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5013 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5014 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5015 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5016
5017
5018 /* Verify size of file vs. image size info in file's header */
5019 if (ucode_raw->size < sizeof(*ucode) +
5020 inst_size + data_size + init_size +
5021 init_data_size + boot_size) {
5022
5023 IWL_DEBUG_INFO("uCode file size %d too small\n",
5024 (int)ucode_raw->size);
5025 ret = -EINVAL;
5026 goto err_release;
5027 }
5028
5029 /* Verify that uCode images will fit in card's SRAM */
5030 if (inst_size > IWL39_MAX_INST_SIZE) {
5031 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5032 inst_size);
5033 ret = -EINVAL;
5034 goto err_release;
5035 }
5036
5037 if (data_size > IWL39_MAX_DATA_SIZE) {
5038 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5039 data_size);
5040 ret = -EINVAL;
5041 goto err_release;
5042 }
5043 if (init_size > IWL39_MAX_INST_SIZE) {
5044 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5045 init_size);
5046 ret = -EINVAL;
5047 goto err_release;
5048 }
5049 if (init_data_size > IWL39_MAX_DATA_SIZE) {
5050 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5051 init_data_size);
5052 ret = -EINVAL;
5053 goto err_release;
5054 }
5055 if (boot_size > IWL39_MAX_BSM_SIZE) {
5056 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5057 boot_size);
5058 ret = -EINVAL;
5059 goto err_release;
5060 }
5061
5062 /* Allocate ucode buffers for card's bus-master loading ... */
5063
5064 /* Runtime instructions and 2 copies of data:
5065 * 1) unmodified from disk
5066 * 2) backup cache for save/restore during power-downs */
5067 priv->ucode_code.len = inst_size;
5068 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5069
5070 priv->ucode_data.len = data_size;
5071 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5072
5073 priv->ucode_data_backup.len = data_size;
5074 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5075
5076 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5077 !priv->ucode_data_backup.v_addr)
5078 goto err_pci_alloc;
5079
5080 /* Initialization instructions and data */
5081 if (init_size && init_data_size) {
5082 priv->ucode_init.len = init_size;
5083 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5084
5085 priv->ucode_init_data.len = init_data_size;
5086 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5087
5088 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5089 goto err_pci_alloc;
5090 }
5091
5092 /* Bootstrap (instructions only, no data) */
5093 if (boot_size) {
5094 priv->ucode_boot.len = boot_size;
5095 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5096
5097 if (!priv->ucode_boot.v_addr)
5098 goto err_pci_alloc;
5099 }
5100
5101 /* Copy images into buffers for card's bus-master reads ... */
5102
5103 /* Runtime instructions (first block of data in file) */
5104 src = &ucode->data[0];
5105 len = priv->ucode_code.len;
5106 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5107 memcpy(priv->ucode_code.v_addr, src, len);
5108 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5109 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5110
5111 /* Runtime data (2nd block)
5112 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5113 src = &ucode->data[inst_size];
5114 len = priv->ucode_data.len;
5115 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5116 memcpy(priv->ucode_data.v_addr, src, len);
5117 memcpy(priv->ucode_data_backup.v_addr, src, len);
5118
5119 /* Initialization instructions (3rd block) */
5120 if (init_size) {
5121 src = &ucode->data[inst_size + data_size];
5122 len = priv->ucode_init.len;
5123 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5124 len);
5125 memcpy(priv->ucode_init.v_addr, src, len);
5126 }
5127
5128 /* Initialization data (4th block) */
5129 if (init_data_size) {
5130 src = &ucode->data[inst_size + data_size + init_size];
5131 len = priv->ucode_init_data.len;
5132 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5133 (int)len);
5134 memcpy(priv->ucode_init_data.v_addr, src, len);
5135 }
5136
5137 /* Bootstrap instructions (5th block) */
5138 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5139 len = priv->ucode_boot.len;
5140 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5141 (int)len);
5142 memcpy(priv->ucode_boot.v_addr, src, len);
5143
5144 /* We have our copies now, allow OS release its copies */
5145 release_firmware(ucode_raw);
5146 return 0;
5147
5148 err_pci_alloc:
5149 IWL_ERR(priv, "failed to allocate pci memory\n");
5150 ret = -ENOMEM;
5151 iwl3945_dealloc_ucode_pci(priv);
5152
5153 err_release:
5154 release_firmware(ucode_raw);
5155
5156 error:
5157 return ret;
5158 }
5159
5160
5161 /**
5162 * iwl3945_set_ucode_ptrs - Set uCode address location
5163 *
5164 * Tell initialization uCode where to find runtime uCode.
5165 *
5166 * BSM registers initially contain pointers to initialization uCode.
5167 * We need to replace them to load runtime uCode inst and data,
5168 * and to save runtime data when powering down.
5169 */
5170 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
5171 {
5172 dma_addr_t pinst;
5173 dma_addr_t pdata;
5174 int rc = 0;
5175 unsigned long flags;
5176
5177 /* bits 31:0 for 3945 */
5178 pinst = priv->ucode_code.p_addr;
5179 pdata = priv->ucode_data_backup.p_addr;
5180
5181 spin_lock_irqsave(&priv->lock, flags);
5182 rc = iwl_grab_nic_access(priv);
5183 if (rc) {
5184 spin_unlock_irqrestore(&priv->lock, flags);
5185 return rc;
5186 }
5187
5188 /* Tell bootstrap uCode where to find image to load */
5189 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5190 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5191 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5192 priv->ucode_data.len);
5193
5194 /* Inst byte count must be last to set up, bit 31 signals uCode
5195 * that all new ptr/size info is in place */
5196 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5197 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5198
5199 iwl_release_nic_access(priv);
5200
5201 spin_unlock_irqrestore(&priv->lock, flags);
5202
5203 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5204
5205 return rc;
5206 }
5207
5208 /**
5209 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5210 *
5211 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5212 *
5213 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5214 */
5215 static void iwl3945_init_alive_start(struct iwl_priv *priv)
5216 {
5217 /* Check alive response for "valid" sign from uCode */
5218 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5219 /* We had an error bringing up the hardware, so take it
5220 * all the way back down so we can try again */
5221 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5222 goto restart;
5223 }
5224
5225 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5226 * This is a paranoid check, because we would not have gotten the
5227 * "initialize" alive if code weren't properly loaded. */
5228 if (iwl3945_verify_ucode(priv)) {
5229 /* Runtime instruction load was bad;
5230 * take it all the way back down so we can try again */
5231 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5232 goto restart;
5233 }
5234
5235 /* Send pointers to protocol/runtime uCode image ... init code will
5236 * load and launch runtime uCode, which will send us another "Alive"
5237 * notification. */
5238 IWL_DEBUG_INFO("Initialization Alive received.\n");
5239 if (iwl3945_set_ucode_ptrs(priv)) {
5240 /* Runtime instruction load won't happen;
5241 * take it all the way back down so we can try again */
5242 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5243 goto restart;
5244 }
5245 return;
5246
5247 restart:
5248 queue_work(priv->workqueue, &priv->restart);
5249 }
5250
5251
5252 /* temporary */
5253 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5254 struct sk_buff *skb);
5255
5256 /**
5257 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5258 * from protocol/runtime uCode (initialization uCode's
5259 * Alive gets handled by iwl3945_init_alive_start()).
5260 */
5261 static void iwl3945_alive_start(struct iwl_priv *priv)
5262 {
5263 int rc = 0;
5264 int thermal_spin = 0;
5265 u32 rfkill;
5266
5267 IWL_DEBUG_INFO("Runtime Alive received.\n");
5268
5269 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5270 /* We had an error bringing up the hardware, so take it
5271 * all the way back down so we can try again */
5272 IWL_DEBUG_INFO("Alive failed.\n");
5273 goto restart;
5274 }
5275
5276 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5277 * This is a paranoid check, because we would not have gotten the
5278 * "runtime" alive if code weren't properly loaded. */
5279 if (iwl3945_verify_ucode(priv)) {
5280 /* Runtime instruction load was bad;
5281 * take it all the way back down so we can try again */
5282 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5283 goto restart;
5284 }
5285
5286 iwl3945_clear_stations_table(priv);
5287
5288 rc = iwl_grab_nic_access(priv);
5289 if (rc) {
5290 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
5291 return;
5292 }
5293
5294 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
5295 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5296 iwl_release_nic_access(priv);
5297
5298 if (rfkill & 0x1) {
5299 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5300 /* if RFKILL is not on, then wait for thermal
5301 * sensor in adapter to kick in */
5302 while (iwl3945_hw_get_temperature(priv) == 0) {
5303 thermal_spin++;
5304 udelay(10);
5305 }
5306
5307 if (thermal_spin)
5308 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5309 thermal_spin * 10);
5310 } else
5311 set_bit(STATUS_RF_KILL_HW, &priv->status);
5312
5313 /* After the ALIVE response, we can send commands to 3945 uCode */
5314 set_bit(STATUS_ALIVE, &priv->status);
5315
5316 /* Clear out the uCode error bit if it is set */
5317 clear_bit(STATUS_FW_ERROR, &priv->status);
5318
5319 if (iwl_is_rfkill(priv))
5320 return;
5321
5322 ieee80211_wake_queues(priv->hw);
5323
5324 priv->active_rate = priv->rates_mask;
5325 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5326
5327 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5328
5329 if (iwl3945_is_associated(priv)) {
5330 struct iwl3945_rxon_cmd *active_rxon =
5331 (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
5332
5333 memcpy(&priv->staging39_rxon, &priv->active39_rxon,
5334 sizeof(priv->staging39_rxon));
5335 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5336 } else {
5337 /* Initialize our rx_config data */
5338 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5339 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5340 }
5341
5342 /* Configure Bluetooth device coexistence support */
5343 iwl3945_send_bt_config(priv);
5344
5345 /* Configure the adapter for unassociated operation */
5346 iwl3945_commit_rxon(priv);
5347
5348 iwl3945_reg_txpower_periodic(priv);
5349
5350 iwl3945_led_register(priv);
5351
5352 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5353 set_bit(STATUS_READY, &priv->status);
5354 wake_up_interruptible(&priv->wait_command_queue);
5355
5356 if (priv->error_recovering)
5357 iwl3945_error_recovery(priv);
5358
5359 /* reassociate for ADHOC mode */
5360 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5361 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5362 priv->vif);
5363 if (beacon)
5364 iwl3945_mac_beacon_update(priv->hw, beacon);
5365 }
5366
5367 return;
5368
5369 restart:
5370 queue_work(priv->workqueue, &priv->restart);
5371 }
5372
5373 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
5374
5375 static void __iwl3945_down(struct iwl_priv *priv)
5376 {
5377 unsigned long flags;
5378 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5379 struct ieee80211_conf *conf = NULL;
5380
5381 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5382
5383 conf = ieee80211_get_hw_conf(priv->hw);
5384
5385 if (!exit_pending)
5386 set_bit(STATUS_EXIT_PENDING, &priv->status);
5387
5388 iwl3945_led_unregister(priv);
5389 iwl3945_clear_stations_table(priv);
5390
5391 /* Unblock any waiting calls */
5392 wake_up_interruptible_all(&priv->wait_command_queue);
5393
5394 /* Wipe out the EXIT_PENDING status bit if we are not actually
5395 * exiting the module */
5396 if (!exit_pending)
5397 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5398
5399 /* stop and reset the on-board processor */
5400 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5401
5402 /* tell the device to stop sending interrupts */
5403 spin_lock_irqsave(&priv->lock, flags);
5404 iwl3945_disable_interrupts(priv);
5405 spin_unlock_irqrestore(&priv->lock, flags);
5406 iwl_synchronize_irq(priv);
5407
5408 if (priv->mac80211_registered)
5409 ieee80211_stop_queues(priv->hw);
5410
5411 /* If we have not previously called iwl3945_init() then
5412 * clear all bits but the RF Kill and SUSPEND bits and return */
5413 if (!iwl_is_init(priv)) {
5414 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5415 STATUS_RF_KILL_HW |
5416 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5417 STATUS_RF_KILL_SW |
5418 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5419 STATUS_GEO_CONFIGURED |
5420 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5421 STATUS_IN_SUSPEND |
5422 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5423 STATUS_EXIT_PENDING;
5424 goto exit;
5425 }
5426
5427 /* ...otherwise clear out all the status bits but the RF Kill and
5428 * SUSPEND bits and continue taking the NIC down. */
5429 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5430 STATUS_RF_KILL_HW |
5431 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5432 STATUS_RF_KILL_SW |
5433 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5434 STATUS_GEO_CONFIGURED |
5435 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5436 STATUS_IN_SUSPEND |
5437 test_bit(STATUS_FW_ERROR, &priv->status) <<
5438 STATUS_FW_ERROR |
5439 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5440 STATUS_EXIT_PENDING;
5441
5442 spin_lock_irqsave(&priv->lock, flags);
5443 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5444 spin_unlock_irqrestore(&priv->lock, flags);
5445
5446 iwl3945_hw_txq_ctx_stop(priv);
5447 iwl3945_hw_rxq_stop(priv);
5448
5449 spin_lock_irqsave(&priv->lock, flags);
5450 if (!iwl_grab_nic_access(priv)) {
5451 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5452 APMG_CLK_VAL_DMA_CLK_RQT);
5453 iwl_release_nic_access(priv);
5454 }
5455 spin_unlock_irqrestore(&priv->lock, flags);
5456
5457 udelay(5);
5458
5459 priv->cfg->ops->lib->apm_ops.reset(priv);
5460 exit:
5461 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5462
5463 if (priv->ibss_beacon)
5464 dev_kfree_skb(priv->ibss_beacon);
5465 priv->ibss_beacon = NULL;
5466
5467 /* clear out any free frames */
5468 iwl3945_clear_free_frames(priv);
5469 }
5470
5471 static void iwl3945_down(struct iwl_priv *priv)
5472 {
5473 mutex_lock(&priv->mutex);
5474 __iwl3945_down(priv);
5475 mutex_unlock(&priv->mutex);
5476
5477 iwl3945_cancel_deferred_work(priv);
5478 }
5479
5480 #define MAX_HW_RESTARTS 5
5481
5482 static int __iwl3945_up(struct iwl_priv *priv)
5483 {
5484 int rc, i;
5485
5486 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5487 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
5488 return -EIO;
5489 }
5490
5491 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5492 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
5493 "parameter)\n");
5494 return -ENODEV;
5495 }
5496
5497 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5498 IWL_ERR(priv, "ucode not available for device bring up\n");
5499 return -EIO;
5500 }
5501
5502 /* If platform's RF_KILL switch is NOT set to KILL */
5503 if (iwl_read32(priv, CSR_GP_CNTRL) &
5504 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5505 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5506 else {
5507 set_bit(STATUS_RF_KILL_HW, &priv->status);
5508 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5509 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
5510 return -ENODEV;
5511 }
5512 }
5513
5514 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5515
5516 rc = iwl3945_hw_nic_init(priv);
5517 if (rc) {
5518 IWL_ERR(priv, "Unable to int nic\n");
5519 return rc;
5520 }
5521
5522 /* make sure rfkill handshake bits are cleared */
5523 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5524 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5525 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5526
5527 /* clear (again), then enable host interrupts */
5528 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5529 iwl3945_enable_interrupts(priv);
5530
5531 /* really make sure rfkill handshake bits are cleared */
5532 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5533 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5534
5535 /* Copy original ucode data image from disk into backup cache.
5536 * This will be used to initialize the on-board processor's
5537 * data SRAM for a clean start when the runtime program first loads. */
5538 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5539 priv->ucode_data.len);
5540
5541 /* We return success when we resume from suspend and rf_kill is on. */
5542 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5543 return 0;
5544
5545 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5546
5547 iwl3945_clear_stations_table(priv);
5548
5549 /* load bootstrap state machine,
5550 * load bootstrap program into processor's memory,
5551 * prepare to load the "initialize" uCode */
5552 priv->cfg->ops->lib->load_ucode(priv);
5553
5554 if (rc) {
5555 IWL_ERR(priv,
5556 "Unable to set up bootstrap uCode: %d\n", rc);
5557 continue;
5558 }
5559
5560 /* start card; "initialize" will load runtime ucode */
5561 iwl3945_nic_start(priv);
5562
5563 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5564
5565 return 0;
5566 }
5567
5568 set_bit(STATUS_EXIT_PENDING, &priv->status);
5569 __iwl3945_down(priv);
5570 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5571
5572 /* tried to restart and config the device for as long as our
5573 * patience could withstand */
5574 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
5575 return -EIO;
5576 }
5577
5578
5579 /*****************************************************************************
5580 *
5581 * Workqueue callbacks
5582 *
5583 *****************************************************************************/
5584
5585 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5586 {
5587 struct iwl_priv *priv =
5588 container_of(data, struct iwl_priv, init_alive_start.work);
5589
5590 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5591 return;
5592
5593 mutex_lock(&priv->mutex);
5594 iwl3945_init_alive_start(priv);
5595 mutex_unlock(&priv->mutex);
5596 }
5597
5598 static void iwl3945_bg_alive_start(struct work_struct *data)
5599 {
5600 struct iwl_priv *priv =
5601 container_of(data, struct iwl_priv, alive_start.work);
5602
5603 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5604 return;
5605
5606 mutex_lock(&priv->mutex);
5607 iwl3945_alive_start(priv);
5608 mutex_unlock(&priv->mutex);
5609 }
5610
5611 static void iwl3945_bg_rf_kill(struct work_struct *work)
5612 {
5613 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
5614
5615 wake_up_interruptible(&priv->wait_command_queue);
5616
5617 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5618 return;
5619
5620 mutex_lock(&priv->mutex);
5621
5622 if (!iwl_is_rfkill(priv)) {
5623 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5624 "HW and/or SW RF Kill no longer active, restarting "
5625 "device\n");
5626 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5627 queue_work(priv->workqueue, &priv->restart);
5628 } else {
5629
5630 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5631 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5632 "disabled by SW switch\n");
5633 else
5634 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
5635 "Kill switch must be turned off for "
5636 "wireless networking to work.\n");
5637 }
5638
5639 mutex_unlock(&priv->mutex);
5640 iwl3945_rfkill_set_hw_state(priv);
5641 }
5642
5643 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5644
5645 static void iwl3945_bg_scan_check(struct work_struct *data)
5646 {
5647 struct iwl_priv *priv =
5648 container_of(data, struct iwl_priv, scan_check.work);
5649
5650 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5651 return;
5652
5653 mutex_lock(&priv->mutex);
5654 if (test_bit(STATUS_SCANNING, &priv->status) ||
5655 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5656 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5657 "Scan completion watchdog resetting adapter (%dms)\n",
5658 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
5659
5660 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5661 iwl3945_send_scan_abort(priv);
5662 }
5663 mutex_unlock(&priv->mutex);
5664 }
5665
5666 static void iwl3945_bg_request_scan(struct work_struct *data)
5667 {
5668 struct iwl_priv *priv =
5669 container_of(data, struct iwl_priv, request_scan);
5670 struct iwl_host_cmd cmd = {
5671 .id = REPLY_SCAN_CMD,
5672 .len = sizeof(struct iwl3945_scan_cmd),
5673 .meta.flags = CMD_SIZE_HUGE,
5674 };
5675 int rc = 0;
5676 struct iwl3945_scan_cmd *scan;
5677 struct ieee80211_conf *conf = NULL;
5678 u8 n_probes = 2;
5679 enum ieee80211_band band;
5680 DECLARE_SSID_BUF(ssid);
5681
5682 conf = ieee80211_get_hw_conf(priv->hw);
5683
5684 mutex_lock(&priv->mutex);
5685
5686 if (!iwl_is_ready(priv)) {
5687 IWL_WARN(priv, "request scan called when driver not ready.\n");
5688 goto done;
5689 }
5690
5691 /* Make sure the scan wasn't canceled before this queued work
5692 * was given the chance to run... */
5693 if (!test_bit(STATUS_SCANNING, &priv->status))
5694 goto done;
5695
5696 /* This should never be called or scheduled if there is currently
5697 * a scan active in the hardware. */
5698 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
5699 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
5700 "Ignoring second request.\n");
5701 rc = -EIO;
5702 goto done;
5703 }
5704
5705 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5706 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
5707 goto done;
5708 }
5709
5710 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5711 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
5712 goto done;
5713 }
5714
5715 if (iwl_is_rfkill(priv)) {
5716 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
5717 goto done;
5718 }
5719
5720 if (!test_bit(STATUS_READY, &priv->status)) {
5721 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
5722 goto done;
5723 }
5724
5725 if (!priv->scan_bands) {
5726 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
5727 goto done;
5728 }
5729
5730 if (!priv->scan39) {
5731 priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
5732 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
5733 if (!priv->scan39) {
5734 rc = -ENOMEM;
5735 goto done;
5736 }
5737 }
5738 scan = priv->scan39;
5739 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
5740
5741 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
5742 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
5743
5744 if (iwl3945_is_associated(priv)) {
5745 u16 interval = 0;
5746 u32 extra;
5747 u32 suspend_time = 100;
5748 u32 scan_suspend_time = 100;
5749 unsigned long flags;
5750
5751 IWL_DEBUG_INFO("Scanning while associated...\n");
5752
5753 spin_lock_irqsave(&priv->lock, flags);
5754 interval = priv->beacon_int;
5755 spin_unlock_irqrestore(&priv->lock, flags);
5756
5757 scan->suspend_time = 0;
5758 scan->max_out_time = cpu_to_le32(200 * 1024);
5759 if (!interval)
5760 interval = suspend_time;
5761 /*
5762 * suspend time format:
5763 * 0-19: beacon interval in usec (time before exec.)
5764 * 20-23: 0
5765 * 24-31: number of beacons (suspend between channels)
5766 */
5767
5768 extra = (suspend_time / interval) << 24;
5769 scan_suspend_time = 0xFF0FFFFF &
5770 (extra | ((suspend_time % interval) * 1024));
5771
5772 scan->suspend_time = cpu_to_le32(scan_suspend_time);
5773 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
5774 scan_suspend_time, interval);
5775 }
5776
5777 /* We should add the ability for user to lock to PASSIVE ONLY */
5778 if (priv->one_direct_scan) {
5779 IWL_DEBUG_SCAN
5780 ("Kicking off one direct scan for '%s'\n",
5781 print_ssid(ssid, priv->direct_ssid,
5782 priv->direct_ssid_len));
5783 scan->direct_scan[0].id = WLAN_EID_SSID;
5784 scan->direct_scan[0].len = priv->direct_ssid_len;
5785 memcpy(scan->direct_scan[0].ssid,
5786 priv->direct_ssid, priv->direct_ssid_len);
5787 n_probes++;
5788 } else
5789 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
5790
5791 /* We don't build a direct scan probe request; the uCode will do
5792 * that based on the direct_mask added to each channel entry */
5793 scan->tx_cmd.len = cpu_to_le16(
5794 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
5795 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
5796 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
5797 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
5798 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
5799
5800 /* flags + rate selection */
5801
5802 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
5803 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
5804 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
5805 scan->good_CRC_th = 0;
5806 band = IEEE80211_BAND_2GHZ;
5807 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
5808 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
5809 scan->good_CRC_th = IWL_GOOD_CRC_TH;
5810 band = IEEE80211_BAND_5GHZ;
5811 } else {
5812 IWL_WARN(priv, "Invalid scan band count\n");
5813 goto done;
5814 }
5815
5816 /* select Rx antennas */
5817 scan->flags |= iwl3945_get_antenna_flags(priv);
5818
5819 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
5820 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
5821
5822 scan->channel_count =
5823 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
5824 n_probes,
5825 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
5826
5827 if (scan->channel_count == 0) {
5828 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
5829 goto done;
5830 }
5831
5832 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
5833 scan->channel_count * sizeof(struct iwl3945_scan_channel);
5834 cmd.data = scan;
5835 scan->len = cpu_to_le16(cmd.len);
5836
5837 set_bit(STATUS_SCAN_HW, &priv->status);
5838 rc = iwl3945_send_cmd_sync(priv, &cmd);
5839 if (rc)
5840 goto done;
5841
5842 queue_delayed_work(priv->workqueue, &priv->scan_check,
5843 IWL_SCAN_CHECK_WATCHDOG);
5844
5845 mutex_unlock(&priv->mutex);
5846 return;
5847
5848 done:
5849 /* can not perform scan make sure we clear scanning
5850 * bits from status so next scan request can be performed.
5851 * if we dont clear scanning status bit here all next scan
5852 * will fail
5853 */
5854 clear_bit(STATUS_SCAN_HW, &priv->status);
5855 clear_bit(STATUS_SCANNING, &priv->status);
5856
5857 /* inform mac80211 scan aborted */
5858 queue_work(priv->workqueue, &priv->scan_completed);
5859 mutex_unlock(&priv->mutex);
5860 }
5861
5862 static void iwl3945_bg_up(struct work_struct *data)
5863 {
5864 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
5865
5866 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5867 return;
5868
5869 mutex_lock(&priv->mutex);
5870 __iwl3945_up(priv);
5871 mutex_unlock(&priv->mutex);
5872 iwl3945_rfkill_set_hw_state(priv);
5873 }
5874
5875 static void iwl3945_bg_restart(struct work_struct *data)
5876 {
5877 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
5878
5879 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5880 return;
5881
5882 iwl3945_down(priv);
5883 queue_work(priv->workqueue, &priv->up);
5884 }
5885
5886 static void iwl3945_bg_rx_replenish(struct work_struct *data)
5887 {
5888 struct iwl_priv *priv =
5889 container_of(data, struct iwl_priv, rx_replenish);
5890
5891 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5892 return;
5893
5894 mutex_lock(&priv->mutex);
5895 iwl3945_rx_replenish(priv);
5896 mutex_unlock(&priv->mutex);
5897 }
5898
5899 #define IWL_DELAY_NEXT_SCAN (HZ*2)
5900
5901 static void iwl3945_post_associate(struct iwl_priv *priv)
5902 {
5903 int rc = 0;
5904 struct ieee80211_conf *conf = NULL;
5905
5906 if (priv->iw_mode == NL80211_IFTYPE_AP) {
5907 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
5908 return;
5909 }
5910
5911
5912 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
5913 priv->assoc_id, priv->active39_rxon.bssid_addr);
5914
5915 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5916 return;
5917
5918 if (!priv->vif || !priv->is_open)
5919 return;
5920
5921 iwl3945_scan_cancel_timeout(priv, 200);
5922
5923 conf = ieee80211_get_hw_conf(priv->hw);
5924
5925 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5926 iwl3945_commit_rxon(priv);
5927
5928 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
5929 iwl3945_setup_rxon_timing(priv);
5930 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
5931 sizeof(priv->rxon_timing), &priv->rxon_timing);
5932 if (rc)
5933 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
5934 "Attempting to continue.\n");
5935
5936 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
5937
5938 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
5939
5940 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
5941 priv->assoc_id, priv->beacon_int);
5942
5943 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
5944 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5945 else
5946 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5947
5948 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
5949 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
5950 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
5951 else
5952 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5953
5954 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
5955 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
5956
5957 }
5958
5959 iwl3945_commit_rxon(priv);
5960
5961 switch (priv->iw_mode) {
5962 case NL80211_IFTYPE_STATION:
5963 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
5964 break;
5965
5966 case NL80211_IFTYPE_ADHOC:
5967
5968 priv->assoc_id = 1;
5969 iwl3945_add_station(priv, priv->bssid, 0, 0);
5970 iwl3945_sync_sta(priv, IWL_STA_ID,
5971 (priv->band == IEEE80211_BAND_5GHZ) ?
5972 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
5973 CMD_ASYNC);
5974 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
5975 iwl3945_send_beacon_cmd(priv);
5976
5977 break;
5978
5979 default:
5980 IWL_ERR(priv, "%s Should not be called in %d mode\n",
5981 __func__, priv->iw_mode);
5982 break;
5983 }
5984
5985 iwl3945_activate_qos(priv, 0);
5986
5987 /* we have just associated, don't start scan too early */
5988 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
5989 }
5990
5991 static void iwl3945_bg_abort_scan(struct work_struct *work)
5992 {
5993 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
5994
5995 if (!iwl_is_ready(priv))
5996 return;
5997
5998 mutex_lock(&priv->mutex);
5999
6000 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6001 iwl3945_send_scan_abort(priv);
6002
6003 mutex_unlock(&priv->mutex);
6004 }
6005
6006 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6007
6008 static void iwl3945_bg_scan_completed(struct work_struct *work)
6009 {
6010 struct iwl_priv *priv =
6011 container_of(work, struct iwl_priv, scan_completed);
6012
6013 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6014
6015 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6016 return;
6017
6018 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6019 iwl3945_mac_config(priv->hw, 0);
6020
6021 ieee80211_scan_completed(priv->hw);
6022
6023 /* Since setting the TXPOWER may have been deferred while
6024 * performing the scan, fire one off */
6025 mutex_lock(&priv->mutex);
6026 iwl3945_hw_reg_send_txpower(priv);
6027 mutex_unlock(&priv->mutex);
6028 }
6029
6030 /*****************************************************************************
6031 *
6032 * mac80211 entry point functions
6033 *
6034 *****************************************************************************/
6035
6036 #define UCODE_READY_TIMEOUT (2 * HZ)
6037
6038 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6039 {
6040 struct iwl_priv *priv = hw->priv;
6041 int ret;
6042
6043 IWL_DEBUG_MAC80211("enter\n");
6044
6045 if (pci_enable_device(priv->pci_dev)) {
6046 IWL_ERR(priv, "Fail to pci_enable_device\n");
6047 return -ENODEV;
6048 }
6049 pci_restore_state(priv->pci_dev);
6050 pci_enable_msi(priv->pci_dev);
6051
6052 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6053 DRV_NAME, priv);
6054 if (ret) {
6055 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
6056 goto out_disable_msi;
6057 }
6058
6059 /* we should be verifying the device is ready to be opened */
6060 mutex_lock(&priv->mutex);
6061
6062 memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6063 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6064 * ucode filename and max sizes are card-specific. */
6065
6066 if (!priv->ucode_code.len) {
6067 ret = iwl3945_read_ucode(priv);
6068 if (ret) {
6069 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
6070 mutex_unlock(&priv->mutex);
6071 goto out_release_irq;
6072 }
6073 }
6074
6075 ret = __iwl3945_up(priv);
6076
6077 mutex_unlock(&priv->mutex);
6078
6079 iwl3945_rfkill_set_hw_state(priv);
6080
6081 if (ret)
6082 goto out_release_irq;
6083
6084 IWL_DEBUG_INFO("Start UP work.\n");
6085
6086 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6087 return 0;
6088
6089 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6090 * mac80211 will not be run successfully. */
6091 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6092 test_bit(STATUS_READY, &priv->status),
6093 UCODE_READY_TIMEOUT);
6094 if (!ret) {
6095 if (!test_bit(STATUS_READY, &priv->status)) {
6096 IWL_ERR(priv,
6097 "Wait for START_ALIVE timeout after %dms.\n",
6098 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6099 ret = -ETIMEDOUT;
6100 goto out_release_irq;
6101 }
6102 }
6103
6104 priv->is_open = 1;
6105 IWL_DEBUG_MAC80211("leave\n");
6106 return 0;
6107
6108 out_release_irq:
6109 free_irq(priv->pci_dev->irq, priv);
6110 out_disable_msi:
6111 pci_disable_msi(priv->pci_dev);
6112 pci_disable_device(priv->pci_dev);
6113 priv->is_open = 0;
6114 IWL_DEBUG_MAC80211("leave - failed\n");
6115 return ret;
6116 }
6117
6118 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6119 {
6120 struct iwl_priv *priv = hw->priv;
6121
6122 IWL_DEBUG_MAC80211("enter\n");
6123
6124 if (!priv->is_open) {
6125 IWL_DEBUG_MAC80211("leave - skip\n");
6126 return;
6127 }
6128
6129 priv->is_open = 0;
6130
6131 if (iwl_is_ready_rf(priv)) {
6132 /* stop mac, cancel any scan request and clear
6133 * RXON_FILTER_ASSOC_MSK BIT
6134 */
6135 mutex_lock(&priv->mutex);
6136 iwl3945_scan_cancel_timeout(priv, 100);
6137 mutex_unlock(&priv->mutex);
6138 }
6139
6140 iwl3945_down(priv);
6141
6142 flush_workqueue(priv->workqueue);
6143 free_irq(priv->pci_dev->irq, priv);
6144 pci_disable_msi(priv->pci_dev);
6145 pci_save_state(priv->pci_dev);
6146 pci_disable_device(priv->pci_dev);
6147
6148 IWL_DEBUG_MAC80211("leave\n");
6149 }
6150
6151 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6152 {
6153 struct iwl_priv *priv = hw->priv;
6154
6155 IWL_DEBUG_MAC80211("enter\n");
6156
6157 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6158 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6159
6160 if (iwl3945_tx_skb(priv, skb))
6161 dev_kfree_skb_any(skb);
6162
6163 IWL_DEBUG_MAC80211("leave\n");
6164 return NETDEV_TX_OK;
6165 }
6166
6167 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6168 struct ieee80211_if_init_conf *conf)
6169 {
6170 struct iwl_priv *priv = hw->priv;
6171 unsigned long flags;
6172
6173 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6174
6175 if (priv->vif) {
6176 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6177 return -EOPNOTSUPP;
6178 }
6179
6180 spin_lock_irqsave(&priv->lock, flags);
6181 priv->vif = conf->vif;
6182 priv->iw_mode = conf->type;
6183
6184 spin_unlock_irqrestore(&priv->lock, flags);
6185
6186 mutex_lock(&priv->mutex);
6187
6188 if (conf->mac_addr) {
6189 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6190 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6191 }
6192
6193 if (iwl_is_ready(priv))
6194 iwl3945_set_mode(priv, conf->type);
6195
6196 mutex_unlock(&priv->mutex);
6197
6198 IWL_DEBUG_MAC80211("leave\n");
6199 return 0;
6200 }
6201
6202 /**
6203 * iwl3945_mac_config - mac80211 config callback
6204 *
6205 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6206 * be set inappropriately and the driver currently sets the hardware up to
6207 * use it whenever needed.
6208 */
6209 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6210 {
6211 struct iwl_priv *priv = hw->priv;
6212 const struct iwl_channel_info *ch_info;
6213 struct ieee80211_conf *conf = &hw->conf;
6214 unsigned long flags;
6215 int ret = 0;
6216
6217 mutex_lock(&priv->mutex);
6218 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6219
6220 if (!iwl_is_ready(priv)) {
6221 IWL_DEBUG_MAC80211("leave - not ready\n");
6222 ret = -EIO;
6223 goto out;
6224 }
6225
6226 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
6227 test_bit(STATUS_SCANNING, &priv->status))) {
6228 IWL_DEBUG_MAC80211("leave - scanning\n");
6229 set_bit(STATUS_CONF_PENDING, &priv->status);
6230 mutex_unlock(&priv->mutex);
6231 return 0;
6232 }
6233
6234 spin_lock_irqsave(&priv->lock, flags);
6235
6236 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6237 conf->channel->hw_value);
6238 if (!is_channel_valid(ch_info)) {
6239 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6240 conf->channel->hw_value, conf->channel->band);
6241 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6242 spin_unlock_irqrestore(&priv->lock, flags);
6243 ret = -EINVAL;
6244 goto out;
6245 }
6246
6247 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6248
6249 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6250
6251 /* The list of supported rates and rate mask can be different
6252 * for each phymode; since the phymode may have changed, reset
6253 * the rate mask to what mac80211 lists */
6254 iwl3945_set_rate(priv);
6255
6256 spin_unlock_irqrestore(&priv->lock, flags);
6257
6258 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6259 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6260 iwl3945_hw_channel_switch(priv, conf->channel);
6261 goto out;
6262 }
6263 #endif
6264
6265 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6266
6267 if (!conf->radio_enabled) {
6268 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6269 goto out;
6270 }
6271
6272 if (iwl_is_rfkill(priv)) {
6273 IWL_DEBUG_MAC80211("leave - RF kill\n");
6274 ret = -EIO;
6275 goto out;
6276 }
6277
6278 iwl3945_set_rate(priv);
6279
6280 if (memcmp(&priv->active39_rxon,
6281 &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
6282 iwl3945_commit_rxon(priv);
6283 else
6284 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6285
6286 IWL_DEBUG_MAC80211("leave\n");
6287
6288 out:
6289 clear_bit(STATUS_CONF_PENDING, &priv->status);
6290 mutex_unlock(&priv->mutex);
6291 return ret;
6292 }
6293
6294 static void iwl3945_config_ap(struct iwl_priv *priv)
6295 {
6296 int rc = 0;
6297
6298 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6299 return;
6300
6301 /* The following should be done only at AP bring up */
6302 if (!(iwl3945_is_associated(priv))) {
6303
6304 /* RXON - unassoc (to set timing command) */
6305 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6306 iwl3945_commit_rxon(priv);
6307
6308 /* RXON Timing */
6309 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6310 iwl3945_setup_rxon_timing(priv);
6311 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6312 sizeof(priv->rxon_timing), &priv->rxon_timing);
6313 if (rc)
6314 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6315 "Attempting to continue.\n");
6316
6317 /* FIXME: what should be the assoc_id for AP? */
6318 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6319 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6320 priv->staging39_rxon.flags |=
6321 RXON_FLG_SHORT_PREAMBLE_MSK;
6322 else
6323 priv->staging39_rxon.flags &=
6324 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6325
6326 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6327 if (priv->assoc_capability &
6328 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6329 priv->staging39_rxon.flags |=
6330 RXON_FLG_SHORT_SLOT_MSK;
6331 else
6332 priv->staging39_rxon.flags &=
6333 ~RXON_FLG_SHORT_SLOT_MSK;
6334
6335 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6336 priv->staging39_rxon.flags &=
6337 ~RXON_FLG_SHORT_SLOT_MSK;
6338 }
6339 /* restore RXON assoc */
6340 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6341 iwl3945_commit_rxon(priv);
6342 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
6343 }
6344 iwl3945_send_beacon_cmd(priv);
6345
6346 /* FIXME - we need to add code here to detect a totally new
6347 * configuration, reset the AP, unassoc, rxon timing, assoc,
6348 * clear sta table, add BCAST sta... */
6349 }
6350
6351 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6352 struct ieee80211_vif *vif,
6353 struct ieee80211_if_conf *conf)
6354 {
6355 struct iwl_priv *priv = hw->priv;
6356 int rc;
6357
6358 if (conf == NULL)
6359 return -EIO;
6360
6361 if (priv->vif != vif) {
6362 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6363 return 0;
6364 }
6365
6366 /* handle this temporarily here */
6367 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6368 conf->changed & IEEE80211_IFCC_BEACON) {
6369 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6370 if (!beacon)
6371 return -ENOMEM;
6372 mutex_lock(&priv->mutex);
6373 rc = iwl3945_mac_beacon_update(hw, beacon);
6374 mutex_unlock(&priv->mutex);
6375 if (rc)
6376 return rc;
6377 }
6378
6379 if (!iwl_is_alive(priv))
6380 return -EAGAIN;
6381
6382 mutex_lock(&priv->mutex);
6383
6384 if (conf->bssid)
6385 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6386
6387 /*
6388 * very dubious code was here; the probe filtering flag is never set:
6389 *
6390 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6391 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6392 */
6393
6394 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6395 if (!conf->bssid) {
6396 conf->bssid = priv->mac_addr;
6397 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6398 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6399 conf->bssid);
6400 }
6401 if (priv->ibss_beacon)
6402 dev_kfree_skb(priv->ibss_beacon);
6403
6404 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6405 }
6406
6407 if (iwl_is_rfkill(priv))
6408 goto done;
6409
6410 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6411 !is_multicast_ether_addr(conf->bssid)) {
6412 /* If there is currently a HW scan going on in the background
6413 * then we need to cancel it else the RXON below will fail. */
6414 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6415 IWL_WARN(priv, "Aborted scan still in progress "
6416 "after 100ms\n");
6417 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6418 mutex_unlock(&priv->mutex);
6419 return -EAGAIN;
6420 }
6421 memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6422
6423 /* TODO: Audit driver for usage of these members and see
6424 * if mac80211 deprecates them (priv->bssid looks like it
6425 * shouldn't be there, but I haven't scanned the IBSS code
6426 * to verify) - jpk */
6427 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6428
6429 if (priv->iw_mode == NL80211_IFTYPE_AP)
6430 iwl3945_config_ap(priv);
6431 else {
6432 rc = iwl3945_commit_rxon(priv);
6433 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6434 iwl3945_add_station(priv,
6435 priv->active39_rxon.bssid_addr, 1, 0);
6436 }
6437
6438 } else {
6439 iwl3945_scan_cancel_timeout(priv, 100);
6440 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6441 iwl3945_commit_rxon(priv);
6442 }
6443
6444 done:
6445 IWL_DEBUG_MAC80211("leave\n");
6446 mutex_unlock(&priv->mutex);
6447
6448 return 0;
6449 }
6450
6451 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6452 unsigned int changed_flags,
6453 unsigned int *total_flags,
6454 int mc_count, struct dev_addr_list *mc_list)
6455 {
6456 struct iwl_priv *priv = hw->priv;
6457 __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
6458
6459 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6460 changed_flags, *total_flags);
6461
6462 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6463 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6464 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6465 else
6466 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6467 }
6468 if (changed_flags & FIF_ALLMULTI) {
6469 if (*total_flags & FIF_ALLMULTI)
6470 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6471 else
6472 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6473 }
6474 if (changed_flags & FIF_CONTROL) {
6475 if (*total_flags & FIF_CONTROL)
6476 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6477 else
6478 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6479 }
6480 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6481 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6482 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6483 else
6484 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6485 }
6486
6487 /* We avoid iwl_commit_rxon here to commit the new filter flags
6488 * since mac80211 will call ieee80211_hw_config immediately.
6489 * (mc_list is not supported at this time). Otherwise, we need to
6490 * queue a background iwl_commit_rxon work.
6491 */
6492
6493 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6494 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6495 }
6496
6497 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6498 struct ieee80211_if_init_conf *conf)
6499 {
6500 struct iwl_priv *priv = hw->priv;
6501
6502 IWL_DEBUG_MAC80211("enter\n");
6503
6504 mutex_lock(&priv->mutex);
6505
6506 if (iwl_is_ready_rf(priv)) {
6507 iwl3945_scan_cancel_timeout(priv, 100);
6508 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6509 iwl3945_commit_rxon(priv);
6510 }
6511 if (priv->vif == conf->vif) {
6512 priv->vif = NULL;
6513 memset(priv->bssid, 0, ETH_ALEN);
6514 }
6515 mutex_unlock(&priv->mutex);
6516
6517 IWL_DEBUG_MAC80211("leave\n");
6518 }
6519
6520 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6521
6522 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6523 struct ieee80211_vif *vif,
6524 struct ieee80211_bss_conf *bss_conf,
6525 u32 changes)
6526 {
6527 struct iwl_priv *priv = hw->priv;
6528
6529 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6530
6531 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6532 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6533 bss_conf->use_short_preamble);
6534 if (bss_conf->use_short_preamble)
6535 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6536 else
6537 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6538 }
6539
6540 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6541 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6542 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6543 priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6544 else
6545 priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6546 }
6547
6548 if (changes & BSS_CHANGED_ASSOC) {
6549 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6550 /* This should never happen as this function should
6551 * never be called from interrupt context. */
6552 if (WARN_ON_ONCE(in_interrupt()))
6553 return;
6554 if (bss_conf->assoc) {
6555 priv->assoc_id = bss_conf->aid;
6556 priv->beacon_int = bss_conf->beacon_int;
6557 priv->timestamp = bss_conf->timestamp;
6558 priv->assoc_capability = bss_conf->assoc_capability;
6559 priv->next_scan_jiffies = jiffies +
6560 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6561 mutex_lock(&priv->mutex);
6562 iwl3945_post_associate(priv);
6563 mutex_unlock(&priv->mutex);
6564 } else {
6565 priv->assoc_id = 0;
6566 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6567 }
6568 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6569 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6570 iwl3945_send_rxon_assoc(priv);
6571 }
6572
6573 }
6574
6575 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6576 {
6577 int rc = 0;
6578 unsigned long flags;
6579 struct iwl_priv *priv = hw->priv;
6580 DECLARE_SSID_BUF(ssid_buf);
6581
6582 IWL_DEBUG_MAC80211("enter\n");
6583
6584 mutex_lock(&priv->mutex);
6585 spin_lock_irqsave(&priv->lock, flags);
6586
6587 if (!iwl_is_ready_rf(priv)) {
6588 rc = -EIO;
6589 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6590 goto out_unlock;
6591 }
6592
6593 /* we don't schedule scan within next_scan_jiffies period */
6594 if (priv->next_scan_jiffies &&
6595 time_after(priv->next_scan_jiffies, jiffies)) {
6596 rc = -EAGAIN;
6597 goto out_unlock;
6598 }
6599 /* if we just finished scan ask for delay for a broadcast scan */
6600 if ((len == 0) && priv->last_scan_jiffies &&
6601 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6602 jiffies)) {
6603 rc = -EAGAIN;
6604 goto out_unlock;
6605 }
6606 if (len) {
6607 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6608 print_ssid(ssid_buf, ssid, len), (int)len);
6609
6610 priv->one_direct_scan = 1;
6611 priv->direct_ssid_len = (u8)
6612 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6613 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6614 } else
6615 priv->one_direct_scan = 0;
6616
6617 rc = iwl3945_scan_initiate(priv);
6618
6619 IWL_DEBUG_MAC80211("leave\n");
6620
6621 out_unlock:
6622 spin_unlock_irqrestore(&priv->lock, flags);
6623 mutex_unlock(&priv->mutex);
6624
6625 return rc;
6626 }
6627
6628 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
6629 const u8 *local_addr, const u8 *addr,
6630 struct ieee80211_key_conf *key)
6631 {
6632 struct iwl_priv *priv = hw->priv;
6633 int rc = 0;
6634 u8 sta_id;
6635
6636 IWL_DEBUG_MAC80211("enter\n");
6637
6638 if (iwl3945_mod_params.sw_crypto) {
6639 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6640 return -EOPNOTSUPP;
6641 }
6642
6643 if (is_zero_ether_addr(addr))
6644 /* only support pairwise keys */
6645 return -EOPNOTSUPP;
6646
6647 sta_id = iwl3945_hw_find_station(priv, addr);
6648 if (sta_id == IWL_INVALID_STATION) {
6649 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
6650 addr);
6651 return -EINVAL;
6652 }
6653
6654 mutex_lock(&priv->mutex);
6655
6656 iwl3945_scan_cancel_timeout(priv, 100);
6657
6658 switch (cmd) {
6659 case SET_KEY:
6660 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
6661 if (!rc) {
6662 iwl3945_set_rxon_hwcrypto(priv, 1);
6663 iwl3945_commit_rxon(priv);
6664 key->hw_key_idx = sta_id;
6665 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
6666 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
6667 }
6668 break;
6669 case DISABLE_KEY:
6670 rc = iwl3945_clear_sta_key_info(priv, sta_id);
6671 if (!rc) {
6672 iwl3945_set_rxon_hwcrypto(priv, 0);
6673 iwl3945_commit_rxon(priv);
6674 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
6675 }
6676 break;
6677 default:
6678 rc = -EINVAL;
6679 }
6680
6681 IWL_DEBUG_MAC80211("leave\n");
6682 mutex_unlock(&priv->mutex);
6683
6684 return rc;
6685 }
6686
6687 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
6688 const struct ieee80211_tx_queue_params *params)
6689 {
6690 struct iwl_priv *priv = hw->priv;
6691 unsigned long flags;
6692 int q;
6693
6694 IWL_DEBUG_MAC80211("enter\n");
6695
6696 if (!iwl_is_ready_rf(priv)) {
6697 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6698 return -EIO;
6699 }
6700
6701 if (queue >= AC_NUM) {
6702 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
6703 return 0;
6704 }
6705
6706 q = AC_NUM - 1 - queue;
6707
6708 spin_lock_irqsave(&priv->lock, flags);
6709
6710 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
6711 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
6712 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
6713 priv->qos_data.def_qos_parm.ac[q].edca_txop =
6714 cpu_to_le16((params->txop * 32));
6715
6716 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
6717 priv->qos_data.qos_active = 1;
6718
6719 spin_unlock_irqrestore(&priv->lock, flags);
6720
6721 mutex_lock(&priv->mutex);
6722 if (priv->iw_mode == NL80211_IFTYPE_AP)
6723 iwl3945_activate_qos(priv, 1);
6724 else if (priv->assoc_id && iwl3945_is_associated(priv))
6725 iwl3945_activate_qos(priv, 0);
6726
6727 mutex_unlock(&priv->mutex);
6728
6729 IWL_DEBUG_MAC80211("leave\n");
6730 return 0;
6731 }
6732
6733 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
6734 struct ieee80211_tx_queue_stats *stats)
6735 {
6736 struct iwl_priv *priv = hw->priv;
6737 int i, avail;
6738 struct iwl3945_tx_queue *txq;
6739 struct iwl_queue *q;
6740 unsigned long flags;
6741
6742 IWL_DEBUG_MAC80211("enter\n");
6743
6744 if (!iwl_is_ready_rf(priv)) {
6745 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6746 return -EIO;
6747 }
6748
6749 spin_lock_irqsave(&priv->lock, flags);
6750
6751 for (i = 0; i < AC_NUM; i++) {
6752 txq = &priv->txq39[i];
6753 q = &txq->q;
6754 avail = iwl_queue_space(q);
6755
6756 stats[i].len = q->n_window - avail;
6757 stats[i].limit = q->n_window - q->high_mark;
6758 stats[i].count = q->n_window;
6759
6760 }
6761 spin_unlock_irqrestore(&priv->lock, flags);
6762
6763 IWL_DEBUG_MAC80211("leave\n");
6764
6765 return 0;
6766 }
6767
6768 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
6769 {
6770 struct iwl_priv *priv = hw->priv;
6771 unsigned long flags;
6772
6773 mutex_lock(&priv->mutex);
6774 IWL_DEBUG_MAC80211("enter\n");
6775
6776 iwl_reset_qos(priv);
6777
6778 spin_lock_irqsave(&priv->lock, flags);
6779 priv->assoc_id = 0;
6780 priv->assoc_capability = 0;
6781 priv->call_post_assoc_from_beacon = 0;
6782
6783 /* new association get rid of ibss beacon skb */
6784 if (priv->ibss_beacon)
6785 dev_kfree_skb(priv->ibss_beacon);
6786
6787 priv->ibss_beacon = NULL;
6788
6789 priv->beacon_int = priv->hw->conf.beacon_int;
6790 priv->timestamp = 0;
6791 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
6792 priv->beacon_int = 0;
6793
6794 spin_unlock_irqrestore(&priv->lock, flags);
6795
6796 if (!iwl_is_ready_rf(priv)) {
6797 IWL_DEBUG_MAC80211("leave - not ready\n");
6798 mutex_unlock(&priv->mutex);
6799 return;
6800 }
6801
6802 /* we are restarting association process
6803 * clear RXON_FILTER_ASSOC_MSK bit
6804 */
6805 if (priv->iw_mode != NL80211_IFTYPE_AP) {
6806 iwl3945_scan_cancel_timeout(priv, 100);
6807 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6808 iwl3945_commit_rxon(priv);
6809 }
6810
6811 /* Per mac80211.h: This is only used in IBSS mode... */
6812 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
6813
6814 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
6815 mutex_unlock(&priv->mutex);
6816 return;
6817 }
6818
6819 iwl3945_set_rate(priv);
6820
6821 mutex_unlock(&priv->mutex);
6822
6823 IWL_DEBUG_MAC80211("leave\n");
6824
6825 }
6826
6827 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
6828 {
6829 struct iwl_priv *priv = hw->priv;
6830 unsigned long flags;
6831
6832 IWL_DEBUG_MAC80211("enter\n");
6833
6834 if (!iwl_is_ready_rf(priv)) {
6835 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6836 return -EIO;
6837 }
6838
6839 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
6840 IWL_DEBUG_MAC80211("leave - not IBSS\n");
6841 return -EIO;
6842 }
6843
6844 spin_lock_irqsave(&priv->lock, flags);
6845
6846 if (priv->ibss_beacon)
6847 dev_kfree_skb(priv->ibss_beacon);
6848
6849 priv->ibss_beacon = skb;
6850
6851 priv->assoc_id = 0;
6852
6853 IWL_DEBUG_MAC80211("leave\n");
6854 spin_unlock_irqrestore(&priv->lock, flags);
6855
6856 iwl_reset_qos(priv);
6857
6858 iwl3945_post_associate(priv);
6859
6860
6861 return 0;
6862 }
6863
6864 /*****************************************************************************
6865 *
6866 * sysfs attributes
6867 *
6868 *****************************************************************************/
6869
6870 #ifdef CONFIG_IWL3945_DEBUG
6871
6872 /*
6873 * The following adds a new attribute to the sysfs representation
6874 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
6875 * used for controlling the debug level.
6876 *
6877 * See the level definitions in iwl for details.
6878 */
6879 static ssize_t show_debug_level(struct device *d,
6880 struct device_attribute *attr, char *buf)
6881 {
6882 struct iwl_priv *priv = d->driver_data;
6883
6884 return sprintf(buf, "0x%08X\n", priv->debug_level);
6885 }
6886 static ssize_t store_debug_level(struct device *d,
6887 struct device_attribute *attr,
6888 const char *buf, size_t count)
6889 {
6890 struct iwl_priv *priv = d->driver_data;
6891 unsigned long val;
6892 int ret;
6893
6894 ret = strict_strtoul(buf, 0, &val);
6895 if (ret)
6896 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
6897 else
6898 priv->debug_level = val;
6899
6900 return strnlen(buf, count);
6901 }
6902
6903 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
6904 show_debug_level, store_debug_level);
6905
6906 #endif /* CONFIG_IWL3945_DEBUG */
6907
6908 static ssize_t show_temperature(struct device *d,
6909 struct device_attribute *attr, char *buf)
6910 {
6911 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6912
6913 if (!iwl_is_alive(priv))
6914 return -EAGAIN;
6915
6916 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
6917 }
6918
6919 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
6920
6921 static ssize_t show_tx_power(struct device *d,
6922 struct device_attribute *attr, char *buf)
6923 {
6924 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6925 return sprintf(buf, "%d\n", priv->user_txpower_limit);
6926 }
6927
6928 static ssize_t store_tx_power(struct device *d,
6929 struct device_attribute *attr,
6930 const char *buf, size_t count)
6931 {
6932 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6933 char *p = (char *)buf;
6934 u32 val;
6935
6936 val = simple_strtoul(p, &p, 10);
6937 if (p == buf)
6938 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
6939 else
6940 iwl3945_hw_reg_set_txpower(priv, val);
6941
6942 return count;
6943 }
6944
6945 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
6946
6947 static ssize_t show_flags(struct device *d,
6948 struct device_attribute *attr, char *buf)
6949 {
6950 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6951
6952 return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
6953 }
6954
6955 static ssize_t store_flags(struct device *d,
6956 struct device_attribute *attr,
6957 const char *buf, size_t count)
6958 {
6959 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6960 u32 flags = simple_strtoul(buf, NULL, 0);
6961
6962 mutex_lock(&priv->mutex);
6963 if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
6964 /* Cancel any currently running scans... */
6965 if (iwl3945_scan_cancel_timeout(priv, 100))
6966 IWL_WARN(priv, "Could not cancel scan.\n");
6967 else {
6968 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
6969 flags);
6970 priv->staging39_rxon.flags = cpu_to_le32(flags);
6971 iwl3945_commit_rxon(priv);
6972 }
6973 }
6974 mutex_unlock(&priv->mutex);
6975
6976 return count;
6977 }
6978
6979 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
6980
6981 static ssize_t show_filter_flags(struct device *d,
6982 struct device_attribute *attr, char *buf)
6983 {
6984 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6985
6986 return sprintf(buf, "0x%04X\n",
6987 le32_to_cpu(priv->active39_rxon.filter_flags));
6988 }
6989
6990 static ssize_t store_filter_flags(struct device *d,
6991 struct device_attribute *attr,
6992 const char *buf, size_t count)
6993 {
6994 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
6995 u32 filter_flags = simple_strtoul(buf, NULL, 0);
6996
6997 mutex_lock(&priv->mutex);
6998 if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
6999 /* Cancel any currently running scans... */
7000 if (iwl3945_scan_cancel_timeout(priv, 100))
7001 IWL_WARN(priv, "Could not cancel scan.\n");
7002 else {
7003 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7004 "0x%04X\n", filter_flags);
7005 priv->staging39_rxon.filter_flags =
7006 cpu_to_le32(filter_flags);
7007 iwl3945_commit_rxon(priv);
7008 }
7009 }
7010 mutex_unlock(&priv->mutex);
7011
7012 return count;
7013 }
7014
7015 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7016 store_filter_flags);
7017
7018 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7019
7020 static ssize_t show_measurement(struct device *d,
7021 struct device_attribute *attr, char *buf)
7022 {
7023 struct iwl_priv *priv = dev_get_drvdata(d);
7024 struct iwl_spectrum_notification measure_report;
7025 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7026 u8 *data = (u8 *)&measure_report;
7027 unsigned long flags;
7028
7029 spin_lock_irqsave(&priv->lock, flags);
7030 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7031 spin_unlock_irqrestore(&priv->lock, flags);
7032 return 0;
7033 }
7034 memcpy(&measure_report, &priv->measure_report, size);
7035 priv->measurement_status = 0;
7036 spin_unlock_irqrestore(&priv->lock, flags);
7037
7038 while (size && (PAGE_SIZE - len)) {
7039 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7040 PAGE_SIZE - len, 1);
7041 len = strlen(buf);
7042 if (PAGE_SIZE - len)
7043 buf[len++] = '\n';
7044
7045 ofs += 16;
7046 size -= min(size, 16U);
7047 }
7048
7049 return len;
7050 }
7051
7052 static ssize_t store_measurement(struct device *d,
7053 struct device_attribute *attr,
7054 const char *buf, size_t count)
7055 {
7056 struct iwl_priv *priv = dev_get_drvdata(d);
7057 struct ieee80211_measurement_params params = {
7058 .channel = le16_to_cpu(priv->active39_rxon.channel),
7059 .start_time = cpu_to_le64(priv->last_tsf),
7060 .duration = cpu_to_le16(1),
7061 };
7062 u8 type = IWL_MEASURE_BASIC;
7063 u8 buffer[32];
7064 u8 channel;
7065
7066 if (count) {
7067 char *p = buffer;
7068 strncpy(buffer, buf, min(sizeof(buffer), count));
7069 channel = simple_strtoul(p, NULL, 0);
7070 if (channel)
7071 params.channel = channel;
7072
7073 p = buffer;
7074 while (*p && *p != ' ')
7075 p++;
7076 if (*p)
7077 type = simple_strtoul(p + 1, NULL, 0);
7078 }
7079
7080 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7081 "channel %d (for '%s')\n", type, params.channel, buf);
7082 iwl3945_get_measurement(priv, &params, type);
7083
7084 return count;
7085 }
7086
7087 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7088 show_measurement, store_measurement);
7089 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7090
7091 static ssize_t store_retry_rate(struct device *d,
7092 struct device_attribute *attr,
7093 const char *buf, size_t count)
7094 {
7095 struct iwl_priv *priv = dev_get_drvdata(d);
7096
7097 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7098 if (priv->retry_rate <= 0)
7099 priv->retry_rate = 1;
7100
7101 return count;
7102 }
7103
7104 static ssize_t show_retry_rate(struct device *d,
7105 struct device_attribute *attr, char *buf)
7106 {
7107 struct iwl_priv *priv = dev_get_drvdata(d);
7108 return sprintf(buf, "%d", priv->retry_rate);
7109 }
7110
7111 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7112 store_retry_rate);
7113
7114 static ssize_t store_power_level(struct device *d,
7115 struct device_attribute *attr,
7116 const char *buf, size_t count)
7117 {
7118 struct iwl_priv *priv = dev_get_drvdata(d);
7119 int rc;
7120 int mode;
7121
7122 mode = simple_strtoul(buf, NULL, 0);
7123 mutex_lock(&priv->mutex);
7124
7125 if (!iwl_is_ready(priv)) {
7126 rc = -EAGAIN;
7127 goto out;
7128 }
7129
7130 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
7131 (mode == IWL39_POWER_AC))
7132 mode = IWL39_POWER_AC;
7133 else
7134 mode |= IWL_POWER_ENABLED;
7135
7136 if (mode != priv->power_mode) {
7137 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7138 if (rc) {
7139 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7140 goto out;
7141 }
7142 priv->power_mode = mode;
7143 }
7144
7145 rc = count;
7146
7147 out:
7148 mutex_unlock(&priv->mutex);
7149 return rc;
7150 }
7151
7152 #define MAX_WX_STRING 80
7153
7154 /* Values are in microsecond */
7155 static const s32 timeout_duration[] = {
7156 350000,
7157 250000,
7158 75000,
7159 37000,
7160 25000,
7161 };
7162 static const s32 period_duration[] = {
7163 400000,
7164 700000,
7165 1000000,
7166 1000000,
7167 1000000
7168 };
7169
7170 static ssize_t show_power_level(struct device *d,
7171 struct device_attribute *attr, char *buf)
7172 {
7173 struct iwl_priv *priv = dev_get_drvdata(d);
7174 int level = IWL_POWER_LEVEL(priv->power_mode);
7175 char *p = buf;
7176
7177 p += sprintf(p, "%d ", level);
7178 switch (level) {
7179 case IWL_POWER_MODE_CAM:
7180 case IWL39_POWER_AC:
7181 p += sprintf(p, "(AC)");
7182 break;
7183 case IWL39_POWER_BATTERY:
7184 p += sprintf(p, "(BATTERY)");
7185 break;
7186 default:
7187 p += sprintf(p,
7188 "(Timeout %dms, Period %dms)",
7189 timeout_duration[level - 1] / 1000,
7190 period_duration[level - 1] / 1000);
7191 }
7192
7193 if (!(priv->power_mode & IWL_POWER_ENABLED))
7194 p += sprintf(p, " OFF\n");
7195 else
7196 p += sprintf(p, " \n");
7197
7198 return p - buf + 1;
7199
7200 }
7201
7202 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7203 store_power_level);
7204
7205 static ssize_t show_channels(struct device *d,
7206 struct device_attribute *attr, char *buf)
7207 {
7208 /* all this shit doesn't belong into sysfs anyway */
7209 return 0;
7210 }
7211
7212 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7213
7214 static ssize_t show_statistics(struct device *d,
7215 struct device_attribute *attr, char *buf)
7216 {
7217 struct iwl_priv *priv = dev_get_drvdata(d);
7218 u32 size = sizeof(struct iwl3945_notif_statistics);
7219 u32 len = 0, ofs = 0;
7220 u8 *data = (u8 *)&priv->statistics_39;
7221 int rc = 0;
7222
7223 if (!iwl_is_alive(priv))
7224 return -EAGAIN;
7225
7226 mutex_lock(&priv->mutex);
7227 rc = iwl3945_send_statistics_request(priv);
7228 mutex_unlock(&priv->mutex);
7229
7230 if (rc) {
7231 len = sprintf(buf,
7232 "Error sending statistics request: 0x%08X\n", rc);
7233 return len;
7234 }
7235
7236 while (size && (PAGE_SIZE - len)) {
7237 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7238 PAGE_SIZE - len, 1);
7239 len = strlen(buf);
7240 if (PAGE_SIZE - len)
7241 buf[len++] = '\n';
7242
7243 ofs += 16;
7244 size -= min(size, 16U);
7245 }
7246
7247 return len;
7248 }
7249
7250 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7251
7252 static ssize_t show_antenna(struct device *d,
7253 struct device_attribute *attr, char *buf)
7254 {
7255 struct iwl_priv *priv = dev_get_drvdata(d);
7256
7257 if (!iwl_is_alive(priv))
7258 return -EAGAIN;
7259
7260 return sprintf(buf, "%d\n", priv->antenna);
7261 }
7262
7263 static ssize_t store_antenna(struct device *d,
7264 struct device_attribute *attr,
7265 const char *buf, size_t count)
7266 {
7267 int ant;
7268 struct iwl_priv *priv = dev_get_drvdata(d);
7269
7270 if (count == 0)
7271 return 0;
7272
7273 if (sscanf(buf, "%1i", &ant) != 1) {
7274 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7275 return count;
7276 }
7277
7278 if ((ant >= 0) && (ant <= 2)) {
7279 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7280 priv->antenna = (enum iwl3945_antenna)ant;
7281 } else
7282 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7283
7284
7285 return count;
7286 }
7287
7288 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7289
7290 static ssize_t show_status(struct device *d,
7291 struct device_attribute *attr, char *buf)
7292 {
7293 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7294 if (!iwl_is_alive(priv))
7295 return -EAGAIN;
7296 return sprintf(buf, "0x%08x\n", (int)priv->status);
7297 }
7298
7299 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7300
7301 static ssize_t dump_error_log(struct device *d,
7302 struct device_attribute *attr,
7303 const char *buf, size_t count)
7304 {
7305 char *p = (char *)buf;
7306
7307 if (p[0] == '1')
7308 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
7309
7310 return strnlen(buf, count);
7311 }
7312
7313 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7314
7315 static ssize_t dump_event_log(struct device *d,
7316 struct device_attribute *attr,
7317 const char *buf, size_t count)
7318 {
7319 char *p = (char *)buf;
7320
7321 if (p[0] == '1')
7322 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
7323
7324 return strnlen(buf, count);
7325 }
7326
7327 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7328
7329 /*****************************************************************************
7330 *
7331 * driver setup and tear down
7332 *
7333 *****************************************************************************/
7334
7335 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
7336 {
7337 priv->workqueue = create_workqueue(DRV_NAME);
7338
7339 init_waitqueue_head(&priv->wait_command_queue);
7340
7341 INIT_WORK(&priv->up, iwl3945_bg_up);
7342 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7343 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7344 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7345 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7346 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7347 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7348 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7349 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7350 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7351 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7352
7353 iwl3945_hw_setup_deferred_work(priv);
7354
7355 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7356 iwl3945_irq_tasklet, (unsigned long)priv);
7357 }
7358
7359 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
7360 {
7361 iwl3945_hw_cancel_deferred_work(priv);
7362
7363 cancel_delayed_work_sync(&priv->init_alive_start);
7364 cancel_delayed_work(&priv->scan_check);
7365 cancel_delayed_work(&priv->alive_start);
7366 cancel_work_sync(&priv->beacon_update);
7367 }
7368
7369 static struct attribute *iwl3945_sysfs_entries[] = {
7370 &dev_attr_antenna.attr,
7371 &dev_attr_channels.attr,
7372 &dev_attr_dump_errors.attr,
7373 &dev_attr_dump_events.attr,
7374 &dev_attr_flags.attr,
7375 &dev_attr_filter_flags.attr,
7376 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7377 &dev_attr_measurement.attr,
7378 #endif
7379 &dev_attr_power_level.attr,
7380 &dev_attr_retry_rate.attr,
7381 &dev_attr_statistics.attr,
7382 &dev_attr_status.attr,
7383 &dev_attr_temperature.attr,
7384 &dev_attr_tx_power.attr,
7385 #ifdef CONFIG_IWL3945_DEBUG
7386 &dev_attr_debug_level.attr,
7387 #endif
7388 NULL
7389 };
7390
7391 static struct attribute_group iwl3945_attribute_group = {
7392 .name = NULL, /* put in device directory */
7393 .attrs = iwl3945_sysfs_entries,
7394 };
7395
7396 static struct ieee80211_ops iwl3945_hw_ops = {
7397 .tx = iwl3945_mac_tx,
7398 .start = iwl3945_mac_start,
7399 .stop = iwl3945_mac_stop,
7400 .add_interface = iwl3945_mac_add_interface,
7401 .remove_interface = iwl3945_mac_remove_interface,
7402 .config = iwl3945_mac_config,
7403 .config_interface = iwl3945_mac_config_interface,
7404 .configure_filter = iwl3945_configure_filter,
7405 .set_key = iwl3945_mac_set_key,
7406 .get_tx_stats = iwl3945_mac_get_tx_stats,
7407 .conf_tx = iwl3945_mac_conf_tx,
7408 .reset_tsf = iwl3945_mac_reset_tsf,
7409 .bss_info_changed = iwl3945_bss_info_changed,
7410 .hw_scan = iwl3945_mac_hw_scan
7411 };
7412
7413 int iwl3945_init_drv(struct iwl_priv *priv)
7414 {
7415 int ret;
7416
7417 priv->retry_rate = 1;
7418 priv->ibss_beacon = NULL;
7419
7420 spin_lock_init(&priv->lock);
7421 spin_lock_init(&priv->power_data.lock);
7422 spin_lock_init(&priv->sta_lock);
7423 spin_lock_init(&priv->hcmd_lock);
7424
7425 INIT_LIST_HEAD(&priv->free_frames);
7426
7427 mutex_init(&priv->mutex);
7428
7429 /* Clear the driver's (not device's) station table */
7430 iwl3945_clear_stations_table(priv);
7431
7432 priv->data_retry_limit = -1;
7433 priv->ieee_channels = NULL;
7434 priv->ieee_rates = NULL;
7435 priv->band = IEEE80211_BAND_2GHZ;
7436
7437 priv->iw_mode = NL80211_IFTYPE_STATION;
7438
7439 iwl_reset_qos(priv);
7440
7441 priv->qos_data.qos_active = 0;
7442 priv->qos_data.qos_cap.val = 0;
7443
7444 priv->rates_mask = IWL_RATES_MASK;
7445 /* If power management is turned on, default to AC mode */
7446 priv->power_mode = IWL_POWER_AC;
7447 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7448
7449 ret = iwl3945_init_channel_map(priv);
7450 if (ret) {
7451 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
7452 goto err;
7453 }
7454
7455 ret = iwl3945_init_geos(priv);
7456 if (ret) {
7457 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
7458 goto err_free_channel_map;
7459 }
7460
7461 return 0;
7462
7463 err_free_channel_map:
7464 iwl3945_free_channel_map(priv);
7465 err:
7466 return ret;
7467 }
7468
7469 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7470 {
7471 int err = 0;
7472 struct iwl_priv *priv;
7473 struct ieee80211_hw *hw;
7474 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
7475 unsigned long flags;
7476
7477 /***********************
7478 * 1. Allocating HW data
7479 * ********************/
7480
7481 /* mac80211 allocates memory for this device instance, including
7482 * space for this driver's private structure */
7483 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
7484 if (hw == NULL) {
7485 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7486 err = -ENOMEM;
7487 goto out;
7488 }
7489 priv = hw->priv;
7490 SET_IEEE80211_DEV(hw, &pdev->dev);
7491
7492 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
7493 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
7494 IWL_ERR(priv,
7495 "invalid queues_num, should be between %d and %d\n",
7496 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7497 err = -EINVAL;
7498 goto out;
7499 }
7500
7501 /*
7502 * Disabling hardware scan means that mac80211 will perform scans
7503 * "the hard way", rather than using device's scan.
7504 */
7505 if (iwl3945_mod_params.disable_hw_scan) {
7506 IWL_DEBUG_INFO("Disabling hw_scan\n");
7507 iwl3945_hw_ops.hw_scan = NULL;
7508 }
7509
7510
7511 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7512 priv->cfg = cfg;
7513 priv->pci_dev = pdev;
7514
7515 #ifdef CONFIG_IWL3945_DEBUG
7516 priv->debug_level = iwl3945_mod_params.debug;
7517 atomic_set(&priv->restrict_refcnt, 0);
7518 #endif
7519 hw->rate_control_algorithm = "iwl-3945-rs";
7520 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7521
7522 /* Select antenna (may be helpful if only one antenna is connected) */
7523 priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
7524
7525 /* Tell mac80211 our characteristics */
7526 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7527 IEEE80211_HW_NOISE_DBM;
7528
7529 hw->wiphy->interface_modes =
7530 BIT(NL80211_IFTYPE_STATION) |
7531 BIT(NL80211_IFTYPE_ADHOC);
7532
7533 hw->wiphy->fw_handles_regulatory = true;
7534
7535 /* 4 EDCA QOS priorities */
7536 hw->queues = 4;
7537
7538 /***************************
7539 * 2. Initializing PCI bus
7540 * *************************/
7541 if (pci_enable_device(pdev)) {
7542 err = -ENODEV;
7543 goto out_ieee80211_free_hw;
7544 }
7545
7546 pci_set_master(pdev);
7547
7548 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7549 if (!err)
7550 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7551 if (err) {
7552 IWL_WARN(priv, "No suitable DMA available.\n");
7553 goto out_pci_disable_device;
7554 }
7555
7556 pci_set_drvdata(pdev, priv);
7557 err = pci_request_regions(pdev, DRV_NAME);
7558 if (err)
7559 goto out_pci_disable_device;
7560
7561 /***********************
7562 * 3. Read REV Register
7563 * ********************/
7564 priv->hw_base = pci_iomap(pdev, 0, 0);
7565 if (!priv->hw_base) {
7566 err = -ENODEV;
7567 goto out_pci_release_regions;
7568 }
7569
7570 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7571 (unsigned long long) pci_resource_len(pdev, 0));
7572 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7573
7574 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7575 * PCI Tx retries from interfering with C3 CPU state */
7576 pci_write_config_byte(pdev, 0x41, 0x00);
7577
7578 /* amp init */
7579 err = priv->cfg->ops->lib->apm_ops.init(priv);
7580 if (err < 0) {
7581 IWL_DEBUG_INFO("Failed to init APMG\n");
7582 goto out_iounmap;
7583 }
7584
7585 /***********************
7586 * 4. Read EEPROM
7587 * ********************/
7588
7589 /* Read the EEPROM */
7590 err = iwl3945_eeprom_init(priv);
7591 if (err) {
7592 IWL_ERR(priv, "Unable to init EEPROM\n");
7593 goto out_remove_sysfs;
7594 }
7595 /* MAC Address location in EEPROM same for 3945/4965 */
7596 get_eeprom_mac(priv, priv->mac_addr);
7597 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7598 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7599
7600 /***********************
7601 * 5. Setup HW Constants
7602 * ********************/
7603 /* Device-specific setup */
7604 if (iwl3945_hw_set_hw_params(priv)) {
7605 IWL_ERR(priv, "failed to set hw settings\n");
7606 goto out_iounmap;
7607 }
7608
7609 /***********************
7610 * 6. Setup priv
7611 * ********************/
7612
7613 err = iwl3945_init_drv(priv);
7614 if (err) {
7615 IWL_ERR(priv, "initializing driver failed\n");
7616 goto out_free_geos;
7617 }
7618
7619 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
7620 priv->cfg->name);
7621
7622 /***********************************
7623 * 7. Initialize Module Parameters
7624 * **********************************/
7625
7626 /* Initialize module parameter values here */
7627 /* Disable radio (SW RF KILL) via parameter when loading driver */
7628 if (iwl3945_mod_params.disable) {
7629 set_bit(STATUS_RF_KILL_SW, &priv->status);
7630 IWL_DEBUG_INFO("Radio disabled.\n");
7631 }
7632
7633
7634 /***********************
7635 * 8. Setup Services
7636 * ********************/
7637
7638 spin_lock_irqsave(&priv->lock, flags);
7639 iwl3945_disable_interrupts(priv);
7640 spin_unlock_irqrestore(&priv->lock, flags);
7641
7642 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7643 if (err) {
7644 IWL_ERR(priv, "failed to create sysfs device attributes\n");
7645 goto out_release_irq;
7646 }
7647
7648 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7649 iwl3945_setup_deferred_work(priv);
7650 iwl3945_setup_rx_handlers(priv);
7651
7652 /***********************
7653 * 9. Conclude
7654 * ********************/
7655 pci_save_state(pdev);
7656 pci_disable_device(pdev);
7657
7658 /*********************************
7659 * 10. Setup and Register mac80211
7660 * *******************************/
7661
7662 err = ieee80211_register_hw(priv->hw);
7663 if (err) {
7664 IWL_ERR(priv, "Failed to register network device: %d\n", err);
7665 goto out_remove_sysfs;
7666 }
7667
7668 priv->hw->conf.beacon_int = 100;
7669 priv->mac80211_registered = 1;
7670
7671 err = iwl3945_rfkill_init(priv);
7672 if (err)
7673 IWL_ERR(priv, "Unable to initialize RFKILL system. "
7674 "Ignoring error: %d\n", err);
7675
7676 return 0;
7677
7678 out_remove_sysfs:
7679 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7680 out_free_geos:
7681 iwl3945_free_geos(priv);
7682
7683 out_release_irq:
7684 destroy_workqueue(priv->workqueue);
7685 priv->workqueue = NULL;
7686 iwl3945_unset_hw_params(priv);
7687
7688 out_iounmap:
7689 pci_iounmap(pdev, priv->hw_base);
7690 out_pci_release_regions:
7691 pci_release_regions(pdev);
7692 out_pci_disable_device:
7693 pci_disable_device(pdev);
7694 pci_set_drvdata(pdev, NULL);
7695 out_ieee80211_free_hw:
7696 ieee80211_free_hw(priv->hw);
7697 out:
7698 return err;
7699 }
7700
7701 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
7702 {
7703 struct iwl_priv *priv = pci_get_drvdata(pdev);
7704 unsigned long flags;
7705
7706 if (!priv)
7707 return;
7708
7709 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7710
7711 set_bit(STATUS_EXIT_PENDING, &priv->status);
7712
7713 if (priv->mac80211_registered) {
7714 ieee80211_unregister_hw(priv->hw);
7715 priv->mac80211_registered = 0;
7716 } else {
7717 iwl3945_down(priv);
7718 }
7719
7720 /* make sure we flush any pending irq or
7721 * tasklet for the driver
7722 */
7723 spin_lock_irqsave(&priv->lock, flags);
7724 iwl3945_disable_interrupts(priv);
7725 spin_unlock_irqrestore(&priv->lock, flags);
7726
7727 iwl_synchronize_irq(priv);
7728
7729 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7730
7731 iwl3945_rfkill_unregister(priv);
7732 iwl3945_dealloc_ucode_pci(priv);
7733
7734 if (priv->rxq.bd)
7735 iwl3945_rx_queue_free(priv, &priv->rxq);
7736 iwl3945_hw_txq_ctx_free(priv);
7737
7738 iwl3945_unset_hw_params(priv);
7739 iwl3945_clear_stations_table(priv);
7740
7741 /*netif_stop_queue(dev); */
7742 flush_workqueue(priv->workqueue);
7743
7744 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
7745 * priv->workqueue... so we can't take down the workqueue
7746 * until now... */
7747 destroy_workqueue(priv->workqueue);
7748 priv->workqueue = NULL;
7749
7750 pci_iounmap(pdev, priv->hw_base);
7751 pci_release_regions(pdev);
7752 pci_disable_device(pdev);
7753 pci_set_drvdata(pdev, NULL);
7754
7755 iwl3945_free_channel_map(priv);
7756 iwl3945_free_geos(priv);
7757 kfree(priv->scan39);
7758 if (priv->ibss_beacon)
7759 dev_kfree_skb(priv->ibss_beacon);
7760
7761 ieee80211_free_hw(priv->hw);
7762 }
7763
7764 #ifdef CONFIG_PM
7765
7766 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
7767 {
7768 struct iwl_priv *priv = pci_get_drvdata(pdev);
7769
7770 if (priv->is_open) {
7771 set_bit(STATUS_IN_SUSPEND, &priv->status);
7772 iwl3945_mac_stop(priv->hw);
7773 priv->is_open = 1;
7774 }
7775
7776 pci_set_power_state(pdev, PCI_D3hot);
7777
7778 return 0;
7779 }
7780
7781 static int iwl3945_pci_resume(struct pci_dev *pdev)
7782 {
7783 struct iwl_priv *priv = pci_get_drvdata(pdev);
7784
7785 pci_set_power_state(pdev, PCI_D0);
7786
7787 if (priv->is_open)
7788 iwl3945_mac_start(priv->hw);
7789
7790 clear_bit(STATUS_IN_SUSPEND, &priv->status);
7791 return 0;
7792 }
7793
7794 #endif /* CONFIG_PM */
7795
7796 /*************** RFKILL FUNCTIONS **********/
7797 #ifdef CONFIG_IWL3945_RFKILL
7798 /* software rf-kill from user */
7799 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
7800 {
7801 struct iwl_priv *priv = data;
7802 int err = 0;
7803
7804 if (!priv->rfkill)
7805 return 0;
7806
7807 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7808 return 0;
7809
7810 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
7811 mutex_lock(&priv->mutex);
7812
7813 switch (state) {
7814 case RFKILL_STATE_UNBLOCKED:
7815 if (iwl_is_rfkill_hw(priv)) {
7816 err = -EBUSY;
7817 goto out_unlock;
7818 }
7819 iwl3945_radio_kill_sw(priv, 0);
7820 break;
7821 case RFKILL_STATE_SOFT_BLOCKED:
7822 iwl3945_radio_kill_sw(priv, 1);
7823 break;
7824 default:
7825 IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
7826 break;
7827 }
7828 out_unlock:
7829 mutex_unlock(&priv->mutex);
7830
7831 return err;
7832 }
7833
7834 int iwl3945_rfkill_init(struct iwl_priv *priv)
7835 {
7836 struct device *device = wiphy_dev(priv->hw->wiphy);
7837 int ret = 0;
7838
7839 BUG_ON(device == NULL);
7840
7841 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
7842 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
7843 if (!priv->rfkill) {
7844 IWL_ERR(priv, "Unable to allocate rfkill device.\n");
7845 ret = -ENOMEM;
7846 goto error;
7847 }
7848
7849 priv->rfkill->name = priv->cfg->name;
7850 priv->rfkill->data = priv;
7851 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
7852 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
7853 priv->rfkill->user_claim_unsupported = 1;
7854
7855 priv->rfkill->dev.class->suspend = NULL;
7856 priv->rfkill->dev.class->resume = NULL;
7857
7858 ret = rfkill_register(priv->rfkill);
7859 if (ret) {
7860 IWL_ERR(priv, "Unable to register rfkill: %d\n", ret);
7861 goto freed_rfkill;
7862 }
7863
7864 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
7865 return ret;
7866
7867 freed_rfkill:
7868 if (priv->rfkill != NULL)
7869 rfkill_free(priv->rfkill);
7870 priv->rfkill = NULL;
7871
7872 error:
7873 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
7874 return ret;
7875 }
7876
7877 void iwl3945_rfkill_unregister(struct iwl_priv *priv)
7878 {
7879 if (priv->rfkill)
7880 rfkill_unregister(priv->rfkill);
7881
7882 priv->rfkill = NULL;
7883 }
7884
7885 /* set rf-kill to the right state. */
7886 void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
7887 {
7888
7889 if (!priv->rfkill)
7890 return;
7891
7892 if (iwl_is_rfkill_hw(priv)) {
7893 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
7894 return;
7895 }
7896
7897 if (!iwl_is_rfkill_sw(priv))
7898 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
7899 else
7900 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
7901 }
7902 #endif
7903
7904 /*****************************************************************************
7905 *
7906 * driver and module entry point
7907 *
7908 *****************************************************************************/
7909
7910 static struct pci_driver iwl3945_driver = {
7911 .name = DRV_NAME,
7912 .id_table = iwl3945_hw_card_ids,
7913 .probe = iwl3945_pci_probe,
7914 .remove = __devexit_p(iwl3945_pci_remove),
7915 #ifdef CONFIG_PM
7916 .suspend = iwl3945_pci_suspend,
7917 .resume = iwl3945_pci_resume,
7918 #endif
7919 };
7920
7921 static int __init iwl3945_init(void)
7922 {
7923
7924 int ret;
7925 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
7926 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
7927
7928 ret = iwl3945_rate_control_register();
7929 if (ret) {
7930 printk(KERN_ERR DRV_NAME
7931 "Unable to register rate control algorithm: %d\n", ret);
7932 return ret;
7933 }
7934
7935 ret = pci_register_driver(&iwl3945_driver);
7936 if (ret) {
7937 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
7938 goto error_register;
7939 }
7940
7941 return ret;
7942
7943 error_register:
7944 iwl3945_rate_control_unregister();
7945 return ret;
7946 }
7947
7948 static void __exit iwl3945_exit(void)
7949 {
7950 pci_unregister_driver(&iwl3945_driver);
7951 iwl3945_rate_control_unregister();
7952 }
7953
7954 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
7955
7956 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
7957 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
7958 module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
7959 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
7960 module_param_named(hwcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
7961 MODULE_PARM_DESC(hwcrypto,
7962 "using hardware crypto engine (default 0 [software])\n");
7963 module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
7964 MODULE_PARM_DESC(debug, "debug output mask");
7965 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
7966 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
7967
7968 module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
7969 MODULE_PARM_DESC(queues_num, "number of hw queues.");
7970
7971 module_exit(iwl3945_exit);
7972 module_init(iwl3945_init);
Linux kernel - Deliverables
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