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[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/ieee80211_radiotap.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-fh.h"
52 #include "iwl-3945-fh.h"
53 #include "iwl-commands.h"
54 #include "iwl-sta.h"
55 #include "iwl-3945.h"
56 #include "iwl-core.h"
57 #include "iwl-helpers.h"
58 #include "iwl-dev.h"
59 #include "iwl-spectrum.h"
60
61 /*
62 * module name, copyright, version, etc.
63 */
64
65 #define DRV_DESCRIPTION \
66 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
67
68 #ifdef CONFIG_IWLWIFI_DEBUG
69 #define VD "d"
70 #else
71 #define VD
72 #endif
73
74 /*
75 * add "s" to indicate spectrum measurement included.
76 * we add it here to be consistent with previous releases in which
77 * this was configurable.
78 */
79 #define DRV_VERSION IWLWIFI_VERSION VD "s"
80 #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
81 #define DRV_AUTHOR "<ilw@linux.intel.com>"
82
83 MODULE_DESCRIPTION(DRV_DESCRIPTION);
84 MODULE_VERSION(DRV_VERSION);
85 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
86 MODULE_LICENSE("GPL");
87
88 /* module parameters */
89 struct iwl_mod_params iwl3945_mod_params = {
90 .sw_crypto = 1,
91 .restart_fw = 1,
92 /* the rest are 0 by default */
93 };
94
95 /**
96 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
97 * @priv: eeprom and antenna fields are used to determine antenna flags
98 *
99 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
100 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
101 *
102 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
103 * IWL_ANTENNA_MAIN - Force MAIN antenna
104 * IWL_ANTENNA_AUX - Force AUX antenna
105 */
106 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
107 {
108 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
109
110 switch (iwl3945_mod_params.antenna) {
111 case IWL_ANTENNA_DIVERSITY:
112 return 0;
113
114 case IWL_ANTENNA_MAIN:
115 if (eeprom->antenna_switch_type)
116 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
117 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
118
119 case IWL_ANTENNA_AUX:
120 if (eeprom->antenna_switch_type)
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
122 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
123 }
124
125 /* bad antenna selector value */
126 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
127 iwl3945_mod_params.antenna);
128
129 return 0; /* "diversity" is default if error */
130 }
131
132 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
133 struct ieee80211_key_conf *keyconf,
134 u8 sta_id)
135 {
136 unsigned long flags;
137 __le16 key_flags = 0;
138 int ret;
139
140 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
141 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
142
143 if (sta_id == priv->hw_params.bcast_sta_id)
144 key_flags |= STA_KEY_MULTICAST_MSK;
145
146 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
147 keyconf->hw_key_idx = keyconf->keyidx;
148 key_flags &= ~STA_KEY_FLG_INVALID;
149
150 spin_lock_irqsave(&priv->sta_lock, flags);
151 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
152 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
153 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
154 keyconf->keylen);
155
156 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
157 keyconf->keylen);
158
159 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
160 == STA_KEY_FLG_NO_ENC)
161 priv->stations[sta_id].sta.key.key_offset =
162 iwl_get_free_ucode_key_index(priv);
163 /* else, we are overriding an existing key => no need to allocated room
164 * in uCode. */
165
166 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
167 "no space for a new key");
168
169 priv->stations[sta_id].sta.key.key_flags = key_flags;
170 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
171 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
172
173 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
174
175 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
176
177 spin_unlock_irqrestore(&priv->sta_lock, flags);
178
179 return ret;
180 }
181
182 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
183 struct ieee80211_key_conf *keyconf,
184 u8 sta_id)
185 {
186 return -EOPNOTSUPP;
187 }
188
189 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
190 struct ieee80211_key_conf *keyconf,
191 u8 sta_id)
192 {
193 return -EOPNOTSUPP;
194 }
195
196 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
197 {
198 unsigned long flags;
199
200 spin_lock_irqsave(&priv->sta_lock, flags);
201 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
202 memset(&priv->stations[sta_id].sta.key, 0,
203 sizeof(struct iwl4965_keyinfo));
204 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
205 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
206 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
207 spin_unlock_irqrestore(&priv->sta_lock, flags);
208
209 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
210 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
211 return 0;
212 }
213
214 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
215 struct ieee80211_key_conf *keyconf, u8 sta_id)
216 {
217 int ret = 0;
218
219 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
220
221 switch (keyconf->alg) {
222 case ALG_CCMP:
223 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
224 break;
225 case ALG_TKIP:
226 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
227 break;
228 case ALG_WEP:
229 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
230 break;
231 default:
232 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
233 ret = -EINVAL;
234 }
235
236 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
237 keyconf->alg, keyconf->keylen, keyconf->keyidx,
238 sta_id, ret);
239
240 return ret;
241 }
242
243 static int iwl3945_remove_static_key(struct iwl_priv *priv)
244 {
245 int ret = -EOPNOTSUPP;
246
247 return ret;
248 }
249
250 static int iwl3945_set_static_key(struct iwl_priv *priv,
251 struct ieee80211_key_conf *key)
252 {
253 if (key->alg == ALG_WEP)
254 return -EOPNOTSUPP;
255
256 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
257 return -EINVAL;
258 }
259
260 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
261 {
262 struct list_head *element;
263
264 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
265 priv->frames_count);
266
267 while (!list_empty(&priv->free_frames)) {
268 element = priv->free_frames.next;
269 list_del(element);
270 kfree(list_entry(element, struct iwl3945_frame, list));
271 priv->frames_count--;
272 }
273
274 if (priv->frames_count) {
275 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
276 priv->frames_count);
277 priv->frames_count = 0;
278 }
279 }
280
281 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
282 {
283 struct iwl3945_frame *frame;
284 struct list_head *element;
285 if (list_empty(&priv->free_frames)) {
286 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
287 if (!frame) {
288 IWL_ERR(priv, "Could not allocate frame!\n");
289 return NULL;
290 }
291
292 priv->frames_count++;
293 return frame;
294 }
295
296 element = priv->free_frames.next;
297 list_del(element);
298 return list_entry(element, struct iwl3945_frame, list);
299 }
300
301 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
302 {
303 memset(frame, 0, sizeof(*frame));
304 list_add(&frame->list, &priv->free_frames);
305 }
306
307 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
308 struct ieee80211_hdr *hdr,
309 int left)
310 {
311
312 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
313 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
314 (priv->iw_mode != NL80211_IFTYPE_AP)))
315 return 0;
316
317 if (priv->ibss_beacon->len > left)
318 return 0;
319
320 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
321
322 return priv->ibss_beacon->len;
323 }
324
325 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
326 {
327 struct iwl3945_frame *frame;
328 unsigned int frame_size;
329 int rc;
330 u8 rate;
331
332 frame = iwl3945_get_free_frame(priv);
333
334 if (!frame) {
335 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
336 "command.\n");
337 return -ENOMEM;
338 }
339
340 rate = iwl_rate_get_lowest_plcp(priv);
341
342 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
343
344 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
345 &frame->u.cmd[0]);
346
347 iwl3945_free_frame(priv, frame);
348
349 return rc;
350 }
351
352 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
353 {
354 if (priv->_3945.shared_virt)
355 dma_free_coherent(&priv->pci_dev->dev,
356 sizeof(struct iwl3945_shared),
357 priv->_3945.shared_virt,
358 priv->_3945.shared_phys);
359 }
360
361 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
362 struct ieee80211_tx_info *info,
363 struct iwl_device_cmd *cmd,
364 struct sk_buff *skb_frag,
365 int sta_id)
366 {
367 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
368 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
369
370 switch (keyinfo->alg) {
371 case ALG_CCMP:
372 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
373 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
374 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
375 break;
376
377 case ALG_TKIP:
378 break;
379
380 case ALG_WEP:
381 tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
382 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
383
384 if (keyinfo->keylen == 13)
385 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
386
387 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
388
389 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
390 "with key %d\n", info->control.hw_key->hw_key_idx);
391 break;
392
393 default:
394 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
395 break;
396 }
397 }
398
399 /*
400 * handle build REPLY_TX command notification.
401 */
402 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
403 struct iwl_device_cmd *cmd,
404 struct ieee80211_tx_info *info,
405 struct ieee80211_hdr *hdr, u8 std_id)
406 {
407 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
408 __le32 tx_flags = tx_cmd->tx_flags;
409 __le16 fc = hdr->frame_control;
410
411 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
412 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
413 tx_flags |= TX_CMD_FLG_ACK_MSK;
414 if (ieee80211_is_mgmt(fc))
415 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
416 if (ieee80211_is_probe_resp(fc) &&
417 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
418 tx_flags |= TX_CMD_FLG_TSF_MSK;
419 } else {
420 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
421 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
422 }
423
424 tx_cmd->sta_id = std_id;
425 if (ieee80211_has_morefrags(fc))
426 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
427
428 if (ieee80211_is_data_qos(fc)) {
429 u8 *qc = ieee80211_get_qos_ctl(hdr);
430 tx_cmd->tid_tspec = qc[0] & 0xf;
431 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
432 } else {
433 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
434 }
435
436 priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
437
438 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
439 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
440
441 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
442 if (ieee80211_is_mgmt(fc)) {
443 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
444 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
445 else
446 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
447 } else {
448 tx_cmd->timeout.pm_frame_timeout = 0;
449 }
450
451 tx_cmd->driver_txop = 0;
452 tx_cmd->tx_flags = tx_flags;
453 tx_cmd->next_frame_len = 0;
454 }
455
456 /*
457 * start REPLY_TX command process
458 */
459 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
460 {
461 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
462 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
463 struct iwl3945_tx_cmd *tx_cmd;
464 struct iwl_tx_queue *txq = NULL;
465 struct iwl_queue *q = NULL;
466 struct iwl_device_cmd *out_cmd;
467 struct iwl_cmd_meta *out_meta;
468 dma_addr_t phys_addr;
469 dma_addr_t txcmd_phys;
470 int txq_id = skb_get_queue_mapping(skb);
471 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
472 u8 id;
473 u8 unicast;
474 u8 sta_id;
475 u8 tid = 0;
476 u16 seq_number = 0;
477 __le16 fc;
478 u8 wait_write_ptr = 0;
479 u8 *qc = NULL;
480 unsigned long flags;
481
482 spin_lock_irqsave(&priv->lock, flags);
483 if (iwl_is_rfkill(priv)) {
484 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
485 goto drop_unlock;
486 }
487
488 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
489 IWL_ERR(priv, "ERROR: No TX rate available.\n");
490 goto drop_unlock;
491 }
492
493 unicast = !is_multicast_ether_addr(hdr->addr1);
494 id = 0;
495
496 fc = hdr->frame_control;
497
498 #ifdef CONFIG_IWLWIFI_DEBUG
499 if (ieee80211_is_auth(fc))
500 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
501 else if (ieee80211_is_assoc_req(fc))
502 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
503 else if (ieee80211_is_reassoc_req(fc))
504 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
505 #endif
506
507 spin_unlock_irqrestore(&priv->lock, flags);
508
509 hdr_len = ieee80211_hdrlen(fc);
510
511 /* Find (or create) index into station table for destination station */
512 if (info->flags & IEEE80211_TX_CTL_INJECTED)
513 sta_id = priv->hw_params.bcast_sta_id;
514 else
515 sta_id = iwl_get_sta_id(priv, hdr);
516 if (sta_id == IWL_INVALID_STATION) {
517 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
518 hdr->addr1);
519 goto drop;
520 }
521
522 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
523
524 if (ieee80211_is_data_qos(fc)) {
525 qc = ieee80211_get_qos_ctl(hdr);
526 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
527 if (unlikely(tid >= MAX_TID_COUNT))
528 goto drop;
529 seq_number = priv->stations[sta_id].tid[tid].seq_number &
530 IEEE80211_SCTL_SEQ;
531 hdr->seq_ctrl = cpu_to_le16(seq_number) |
532 (hdr->seq_ctrl &
533 cpu_to_le16(IEEE80211_SCTL_FRAG));
534 seq_number += 0x10;
535 }
536
537 /* Descriptor for chosen Tx queue */
538 txq = &priv->txq[txq_id];
539 q = &txq->q;
540
541 if ((iwl_queue_space(q) < q->high_mark))
542 goto drop;
543
544 spin_lock_irqsave(&priv->lock, flags);
545
546 idx = get_cmd_index(q, q->write_ptr, 0);
547
548 /* Set up driver data for this TFD */
549 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
550 txq->txb[q->write_ptr].skb[0] = skb;
551
552 /* Init first empty entry in queue's array of Tx/cmd buffers */
553 out_cmd = txq->cmd[idx];
554 out_meta = &txq->meta[idx];
555 tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
556 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
557 memset(tx_cmd, 0, sizeof(*tx_cmd));
558
559 /*
560 * Set up the Tx-command (not MAC!) header.
561 * Store the chosen Tx queue and TFD index within the sequence field;
562 * after Tx, uCode's Tx response will return this value so driver can
563 * locate the frame within the tx queue and do post-tx processing.
564 */
565 out_cmd->hdr.cmd = REPLY_TX;
566 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
567 INDEX_TO_SEQ(q->write_ptr)));
568
569 /* Copy MAC header from skb into command buffer */
570 memcpy(tx_cmd->hdr, hdr, hdr_len);
571
572
573 if (info->control.hw_key)
574 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
575
576 /* TODO need this for burst mode later on */
577 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
578
579 /* set is_hcca to 0; it probably will never be implemented */
580 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
581
582 /* Total # bytes to be transmitted */
583 len = (u16)skb->len;
584 tx_cmd->len = cpu_to_le16(len);
585
586 iwl_dbg_log_tx_data_frame(priv, len, hdr);
587 iwl_update_stats(priv, true, fc, len);
588 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
589 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
590
591 if (!ieee80211_has_morefrags(hdr->frame_control)) {
592 txq->need_update = 1;
593 if (qc)
594 priv->stations[sta_id].tid[tid].seq_number = seq_number;
595 } else {
596 wait_write_ptr = 1;
597 txq->need_update = 0;
598 }
599
600 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
601 le16_to_cpu(out_cmd->hdr.sequence));
602 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
603 iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
604 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
605 ieee80211_hdrlen(fc));
606
607 /*
608 * Use the first empty entry in this queue's command buffer array
609 * to contain the Tx command and MAC header concatenated together
610 * (payload data will be in another buffer).
611 * Size of this varies, due to varying MAC header length.
612 * If end is not dword aligned, we'll have 2 extra bytes at the end
613 * of the MAC header (device reads on dword boundaries).
614 * We'll tell device about this padding later.
615 */
616 len = sizeof(struct iwl3945_tx_cmd) +
617 sizeof(struct iwl_cmd_header) + hdr_len;
618
619 len_org = len;
620 len = (len + 3) & ~3;
621
622 if (len_org != len)
623 len_org = 1;
624 else
625 len_org = 0;
626
627 /* Physical address of this Tx command's header (not MAC header!),
628 * within command buffer array. */
629 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
630 len, PCI_DMA_TODEVICE);
631 /* we do not map meta data ... so we can safely access address to
632 * provide to unmap command*/
633 pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
634 pci_unmap_len_set(out_meta, len, len);
635
636 /* Add buffer containing Tx command and MAC(!) header to TFD's
637 * first entry */
638 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
639 txcmd_phys, len, 1, 0);
640
641
642 /* Set up TFD's 2nd entry to point directly to remainder of skb,
643 * if any (802.11 null frames have no payload). */
644 len = skb->len - hdr_len;
645 if (len) {
646 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
647 len, PCI_DMA_TODEVICE);
648 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
649 phys_addr, len,
650 0, U32_PAD(len));
651 }
652
653
654 /* Tell device the write index *just past* this latest filled TFD */
655 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
656 iwl_txq_update_write_ptr(priv, txq);
657 spin_unlock_irqrestore(&priv->lock, flags);
658
659 if ((iwl_queue_space(q) < q->high_mark)
660 && priv->mac80211_registered) {
661 if (wait_write_ptr) {
662 spin_lock_irqsave(&priv->lock, flags);
663 txq->need_update = 1;
664 iwl_txq_update_write_ptr(priv, txq);
665 spin_unlock_irqrestore(&priv->lock, flags);
666 }
667
668 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
669 }
670
671 return 0;
672
673 drop_unlock:
674 spin_unlock_irqrestore(&priv->lock, flags);
675 drop:
676 return -1;
677 }
678
679 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
680 #define BEACON_TIME_MASK_HIGH 0xFF000000
681 #define TIME_UNIT 1024
682
683 /*
684 * extended beacon time format
685 * time in usec will be changed into a 32-bit value in 8:24 format
686 * the high 1 byte is the beacon counts
687 * the lower 3 bytes is the time in usec within one beacon interval
688 */
689
690 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
691 {
692 u32 quot;
693 u32 rem;
694 u32 interval = beacon_interval * 1024;
695
696 if (!interval || !usec)
697 return 0;
698
699 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
700 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
701
702 return (quot << 24) + rem;
703 }
704
705 /* base is usually what we get from ucode with each received frame,
706 * the same as HW timer counter counting down
707 */
708
709 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
710 {
711 u32 base_low = base & BEACON_TIME_MASK_LOW;
712 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
713 u32 interval = beacon_interval * TIME_UNIT;
714 u32 res = (base & BEACON_TIME_MASK_HIGH) +
715 (addon & BEACON_TIME_MASK_HIGH);
716
717 if (base_low > addon_low)
718 res += base_low - addon_low;
719 else if (base_low < addon_low) {
720 res += interval + base_low - addon_low;
721 res += (1 << 24);
722 } else
723 res += (1 << 24);
724
725 return cpu_to_le32(res);
726 }
727
728 static int iwl3945_get_measurement(struct iwl_priv *priv,
729 struct ieee80211_measurement_params *params,
730 u8 type)
731 {
732 struct iwl_spectrum_cmd spectrum;
733 struct iwl_rx_packet *pkt;
734 struct iwl_host_cmd cmd = {
735 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
736 .data = (void *)&spectrum,
737 .flags = CMD_WANT_SKB,
738 };
739 u32 add_time = le64_to_cpu(params->start_time);
740 int rc;
741 int spectrum_resp_status;
742 int duration = le16_to_cpu(params->duration);
743
744 if (iwl_is_associated(priv))
745 add_time =
746 iwl3945_usecs_to_beacons(
747 le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
748 le16_to_cpu(priv->rxon_timing.beacon_interval));
749
750 memset(&spectrum, 0, sizeof(spectrum));
751
752 spectrum.channel_count = cpu_to_le16(1);
753 spectrum.flags =
754 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
755 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
756 cmd.len = sizeof(spectrum);
757 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
758
759 if (iwl_is_associated(priv))
760 spectrum.start_time =
761 iwl3945_add_beacon_time(priv->_3945.last_beacon_time,
762 add_time,
763 le16_to_cpu(priv->rxon_timing.beacon_interval));
764 else
765 spectrum.start_time = 0;
766
767 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
768 spectrum.channels[0].channel = params->channel;
769 spectrum.channels[0].type = type;
770 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
771 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
772 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
773
774 rc = iwl_send_cmd_sync(priv, &cmd);
775 if (rc)
776 return rc;
777
778 pkt = (struct iwl_rx_packet *)cmd.reply_page;
779 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
780 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
781 rc = -EIO;
782 }
783
784 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
785 switch (spectrum_resp_status) {
786 case 0: /* Command will be handled */
787 if (pkt->u.spectrum.id != 0xff) {
788 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
789 pkt->u.spectrum.id);
790 priv->measurement_status &= ~MEASUREMENT_READY;
791 }
792 priv->measurement_status |= MEASUREMENT_ACTIVE;
793 rc = 0;
794 break;
795
796 case 1: /* Command will not be handled */
797 rc = -EAGAIN;
798 break;
799 }
800
801 iwl_free_pages(priv, cmd.reply_page);
802
803 return rc;
804 }
805
806 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
807 struct iwl_rx_mem_buffer *rxb)
808 {
809 struct iwl_rx_packet *pkt = rxb_addr(rxb);
810 struct iwl_alive_resp *palive;
811 struct delayed_work *pwork;
812
813 palive = &pkt->u.alive_frame;
814
815 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
816 "0x%01X 0x%01X\n",
817 palive->is_valid, palive->ver_type,
818 palive->ver_subtype);
819
820 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
821 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
822 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
823 sizeof(struct iwl_alive_resp));
824 pwork = &priv->init_alive_start;
825 } else {
826 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
827 memcpy(&priv->card_alive, &pkt->u.alive_frame,
828 sizeof(struct iwl_alive_resp));
829 pwork = &priv->alive_start;
830 iwl3945_disable_events(priv);
831 }
832
833 /* We delay the ALIVE response by 5ms to
834 * give the HW RF Kill time to activate... */
835 if (palive->is_valid == UCODE_VALID_OK)
836 queue_delayed_work(priv->workqueue, pwork,
837 msecs_to_jiffies(5));
838 else
839 IWL_WARN(priv, "uCode did not respond OK.\n");
840 }
841
842 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
843 struct iwl_rx_mem_buffer *rxb)
844 {
845 #ifdef CONFIG_IWLWIFI_DEBUG
846 struct iwl_rx_packet *pkt = rxb_addr(rxb);
847 #endif
848
849 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
850 return;
851 }
852
853 static void iwl3945_bg_beacon_update(struct work_struct *work)
854 {
855 struct iwl_priv *priv =
856 container_of(work, struct iwl_priv, beacon_update);
857 struct sk_buff *beacon;
858
859 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
860 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
861
862 if (!beacon) {
863 IWL_ERR(priv, "update beacon failed\n");
864 return;
865 }
866
867 mutex_lock(&priv->mutex);
868 /* new beacon skb is allocated every time; dispose previous.*/
869 if (priv->ibss_beacon)
870 dev_kfree_skb(priv->ibss_beacon);
871
872 priv->ibss_beacon = beacon;
873 mutex_unlock(&priv->mutex);
874
875 iwl3945_send_beacon_cmd(priv);
876 }
877
878 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
879 struct iwl_rx_mem_buffer *rxb)
880 {
881 #ifdef CONFIG_IWLWIFI_DEBUG
882 struct iwl_rx_packet *pkt = rxb_addr(rxb);
883 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
884 u8 rate = beacon->beacon_notify_hdr.rate;
885
886 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
887 "tsf %d %d rate %d\n",
888 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
889 beacon->beacon_notify_hdr.failure_frame,
890 le32_to_cpu(beacon->ibss_mgr_status),
891 le32_to_cpu(beacon->high_tsf),
892 le32_to_cpu(beacon->low_tsf), rate);
893 #endif
894
895 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
896 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
897 queue_work(priv->workqueue, &priv->beacon_update);
898 }
899
900 /* Handle notification from uCode that card's power state is changing
901 * due to software, hardware, or critical temperature RFKILL */
902 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
903 struct iwl_rx_mem_buffer *rxb)
904 {
905 struct iwl_rx_packet *pkt = rxb_addr(rxb);
906 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
907 unsigned long status = priv->status;
908
909 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
910 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
911 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
912
913 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
914 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
915
916 if (flags & HW_CARD_DISABLED)
917 set_bit(STATUS_RF_KILL_HW, &priv->status);
918 else
919 clear_bit(STATUS_RF_KILL_HW, &priv->status);
920
921
922 iwl_scan_cancel(priv);
923
924 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
925 test_bit(STATUS_RF_KILL_HW, &priv->status)))
926 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
927 test_bit(STATUS_RF_KILL_HW, &priv->status));
928 else
929 wake_up_interruptible(&priv->wait_command_queue);
930 }
931
932 /**
933 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
934 *
935 * Setup the RX handlers for each of the reply types sent from the uCode
936 * to the host.
937 *
938 * This function chains into the hardware specific files for them to setup
939 * any hardware specific handlers as well.
940 */
941 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
942 {
943 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
944 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
945 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
946 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
947 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
948 iwl_rx_spectrum_measure_notif;
949 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
950 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
951 iwl_rx_pm_debug_statistics_notif;
952 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
953
954 /*
955 * The same handler is used for both the REPLY to a discrete
956 * statistics request from the host as well as for the periodic
957 * statistics notifications (after received beacons) from the uCode.
958 */
959 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
960 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
961
962 iwl_setup_rx_scan_handlers(priv);
963 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
964
965 /* Set up hardware specific Rx handlers */
966 iwl3945_hw_rx_handler_setup(priv);
967 }
968
969 /************************** RX-FUNCTIONS ****************************/
970 /*
971 * Rx theory of operation
972 *
973 * The host allocates 32 DMA target addresses and passes the host address
974 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
975 * 0 to 31
976 *
977 * Rx Queue Indexes
978 * The host/firmware share two index registers for managing the Rx buffers.
979 *
980 * The READ index maps to the first position that the firmware may be writing
981 * to -- the driver can read up to (but not including) this position and get
982 * good data.
983 * The READ index is managed by the firmware once the card is enabled.
984 *
985 * The WRITE index maps to the last position the driver has read from -- the
986 * position preceding WRITE is the last slot the firmware can place a packet.
987 *
988 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
989 * WRITE = READ.
990 *
991 * During initialization, the host sets up the READ queue position to the first
992 * INDEX position, and WRITE to the last (READ - 1 wrapped)
993 *
994 * When the firmware places a packet in a buffer, it will advance the READ index
995 * and fire the RX interrupt. The driver can then query the READ index and
996 * process as many packets as possible, moving the WRITE index forward as it
997 * resets the Rx queue buffers with new memory.
998 *
999 * The management in the driver is as follows:
1000 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1001 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1002 * to replenish the iwl->rxq->rx_free.
1003 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1004 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1005 * 'processed' and 'read' driver indexes as well)
1006 * + A received packet is processed and handed to the kernel network stack,
1007 * detached from the iwl->rxq. The driver 'processed' index is updated.
1008 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1009 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1010 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1011 * were enough free buffers and RX_STALLED is set it is cleared.
1012 *
1013 *
1014 * Driver sequence:
1015 *
1016 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
1017 * iwl3945_rx_queue_restock
1018 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1019 * queue, updates firmware pointers, and updates
1020 * the WRITE index. If insufficient rx_free buffers
1021 * are available, schedules iwl3945_rx_replenish
1022 *
1023 * -- enable interrupts --
1024 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
1025 * READ INDEX, detaching the SKB from the pool.
1026 * Moves the packet buffer from queue to rx_used.
1027 * Calls iwl3945_rx_queue_restock to refill any empty
1028 * slots.
1029 * ...
1030 *
1031 */
1032
1033 /**
1034 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1035 */
1036 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1037 dma_addr_t dma_addr)
1038 {
1039 return cpu_to_le32((u32)dma_addr);
1040 }
1041
1042 /**
1043 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1044 *
1045 * If there are slots in the RX queue that need to be restocked,
1046 * and we have free pre-allocated buffers, fill the ranks as much
1047 * as we can, pulling from rx_free.
1048 *
1049 * This moves the 'write' index forward to catch up with 'processed', and
1050 * also updates the memory address in the firmware to reference the new
1051 * target buffer.
1052 */
1053 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
1054 {
1055 struct iwl_rx_queue *rxq = &priv->rxq;
1056 struct list_head *element;
1057 struct iwl_rx_mem_buffer *rxb;
1058 unsigned long flags;
1059 int write;
1060
1061 spin_lock_irqsave(&rxq->lock, flags);
1062 write = rxq->write & ~0x7;
1063 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1064 /* Get next free Rx buffer, remove from free list */
1065 element = rxq->rx_free.next;
1066 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1067 list_del(element);
1068
1069 /* Point to Rx buffer via next RBD in circular buffer */
1070 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1071 rxq->queue[rxq->write] = rxb;
1072 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1073 rxq->free_count--;
1074 }
1075 spin_unlock_irqrestore(&rxq->lock, flags);
1076 /* If the pre-allocated buffer pool is dropping low, schedule to
1077 * refill it */
1078 if (rxq->free_count <= RX_LOW_WATERMARK)
1079 queue_work(priv->workqueue, &priv->rx_replenish);
1080
1081
1082 /* If we've added more space for the firmware to place data, tell it.
1083 * Increment device's write pointer in multiples of 8. */
1084 if ((rxq->write_actual != (rxq->write & ~0x7))
1085 || (abs(rxq->write - rxq->read) > 7)) {
1086 spin_lock_irqsave(&rxq->lock, flags);
1087 rxq->need_update = 1;
1088 spin_unlock_irqrestore(&rxq->lock, flags);
1089 iwl_rx_queue_update_write_ptr(priv, rxq);
1090 }
1091 }
1092
1093 /**
1094 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1095 *
1096 * When moving to rx_free an SKB is allocated for the slot.
1097 *
1098 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1099 * This is called as a scheduled work item (except for during initialization)
1100 */
1101 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1102 {
1103 struct iwl_rx_queue *rxq = &priv->rxq;
1104 struct list_head *element;
1105 struct iwl_rx_mem_buffer *rxb;
1106 struct page *page;
1107 unsigned long flags;
1108 gfp_t gfp_mask = priority;
1109
1110 while (1) {
1111 spin_lock_irqsave(&rxq->lock, flags);
1112
1113 if (list_empty(&rxq->rx_used)) {
1114 spin_unlock_irqrestore(&rxq->lock, flags);
1115 return;
1116 }
1117 spin_unlock_irqrestore(&rxq->lock, flags);
1118
1119 if (rxq->free_count > RX_LOW_WATERMARK)
1120 gfp_mask |= __GFP_NOWARN;
1121
1122 if (priv->hw_params.rx_page_order > 0)
1123 gfp_mask |= __GFP_COMP;
1124
1125 /* Alloc a new receive buffer */
1126 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1127 if (!page) {
1128 if (net_ratelimit())
1129 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1130 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1131 net_ratelimit())
1132 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1133 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1134 rxq->free_count);
1135 /* We don't reschedule replenish work here -- we will
1136 * call the restock method and if it still needs
1137 * more buffers it will schedule replenish */
1138 break;
1139 }
1140
1141 spin_lock_irqsave(&rxq->lock, flags);
1142 if (list_empty(&rxq->rx_used)) {
1143 spin_unlock_irqrestore(&rxq->lock, flags);
1144 __free_pages(page, priv->hw_params.rx_page_order);
1145 return;
1146 }
1147 element = rxq->rx_used.next;
1148 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1149 list_del(element);
1150 spin_unlock_irqrestore(&rxq->lock, flags);
1151
1152 rxb->page = page;
1153 /* Get physical address of RB/SKB */
1154 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1155 PAGE_SIZE << priv->hw_params.rx_page_order,
1156 PCI_DMA_FROMDEVICE);
1157
1158 spin_lock_irqsave(&rxq->lock, flags);
1159
1160 list_add_tail(&rxb->list, &rxq->rx_free);
1161 rxq->free_count++;
1162 priv->alloc_rxb_page++;
1163
1164 spin_unlock_irqrestore(&rxq->lock, flags);
1165 }
1166 }
1167
1168 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1169 {
1170 unsigned long flags;
1171 int i;
1172 spin_lock_irqsave(&rxq->lock, flags);
1173 INIT_LIST_HEAD(&rxq->rx_free);
1174 INIT_LIST_HEAD(&rxq->rx_used);
1175 /* Fill the rx_used queue with _all_ of the Rx buffers */
1176 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1177 /* In the reset function, these buffers may have been allocated
1178 * to an SKB, so we need to unmap and free potential storage */
1179 if (rxq->pool[i].page != NULL) {
1180 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1181 PAGE_SIZE << priv->hw_params.rx_page_order,
1182 PCI_DMA_FROMDEVICE);
1183 __iwl_free_pages(priv, rxq->pool[i].page);
1184 rxq->pool[i].page = NULL;
1185 }
1186 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1187 }
1188
1189 /* Set us so that we have processed and used all buffers, but have
1190 * not restocked the Rx queue with fresh buffers */
1191 rxq->read = rxq->write = 0;
1192 rxq->write_actual = 0;
1193 rxq->free_count = 0;
1194 spin_unlock_irqrestore(&rxq->lock, flags);
1195 }
1196
1197 void iwl3945_rx_replenish(void *data)
1198 {
1199 struct iwl_priv *priv = data;
1200 unsigned long flags;
1201
1202 iwl3945_rx_allocate(priv, GFP_KERNEL);
1203
1204 spin_lock_irqsave(&priv->lock, flags);
1205 iwl3945_rx_queue_restock(priv);
1206 spin_unlock_irqrestore(&priv->lock, flags);
1207 }
1208
1209 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1210 {
1211 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1212
1213 iwl3945_rx_queue_restock(priv);
1214 }
1215
1216
1217 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1218 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1219 * This free routine walks the list of POOL entries and if SKB is set to
1220 * non NULL it is unmapped and freed
1221 */
1222 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1223 {
1224 int i;
1225 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1226 if (rxq->pool[i].page != NULL) {
1227 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1228 PAGE_SIZE << priv->hw_params.rx_page_order,
1229 PCI_DMA_FROMDEVICE);
1230 __iwl_free_pages(priv, rxq->pool[i].page);
1231 rxq->pool[i].page = NULL;
1232 }
1233 }
1234
1235 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1236 rxq->dma_addr);
1237 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1238 rxq->rb_stts, rxq->rb_stts_dma);
1239 rxq->bd = NULL;
1240 rxq->rb_stts = NULL;
1241 }
1242
1243
1244 /* Convert linear signal-to-noise ratio into dB */
1245 static u8 ratio2dB[100] = {
1246 /* 0 1 2 3 4 5 6 7 8 9 */
1247 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1248 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1249 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1250 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1251 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1252 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1253 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1254 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1255 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1256 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1257 };
1258
1259 /* Calculates a relative dB value from a ratio of linear
1260 * (i.e. not dB) signal levels.
1261 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1262 int iwl3945_calc_db_from_ratio(int sig_ratio)
1263 {
1264 /* 1000:1 or higher just report as 60 dB */
1265 if (sig_ratio >= 1000)
1266 return 60;
1267
1268 /* 100:1 or higher, divide by 10 and use table,
1269 * add 20 dB to make up for divide by 10 */
1270 if (sig_ratio >= 100)
1271 return 20 + (int)ratio2dB[sig_ratio/10];
1272
1273 /* We shouldn't see this */
1274 if (sig_ratio < 1)
1275 return 0;
1276
1277 /* Use table for ratios 1:1 - 99:1 */
1278 return (int)ratio2dB[sig_ratio];
1279 }
1280
1281 /**
1282 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1283 *
1284 * Uses the priv->rx_handlers callback function array to invoke
1285 * the appropriate handlers, including command responses,
1286 * frame-received notifications, and other notifications.
1287 */
1288 static void iwl3945_rx_handle(struct iwl_priv *priv)
1289 {
1290 struct iwl_rx_mem_buffer *rxb;
1291 struct iwl_rx_packet *pkt;
1292 struct iwl_rx_queue *rxq = &priv->rxq;
1293 u32 r, i;
1294 int reclaim;
1295 unsigned long flags;
1296 u8 fill_rx = 0;
1297 u32 count = 8;
1298 int total_empty = 0;
1299
1300 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1301 * buffer that the driver may process (last buffer filled by ucode). */
1302 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1303 i = rxq->read;
1304
1305 /* calculate total frames need to be restock after handling RX */
1306 total_empty = r - rxq->write_actual;
1307 if (total_empty < 0)
1308 total_empty += RX_QUEUE_SIZE;
1309
1310 if (total_empty > (RX_QUEUE_SIZE / 2))
1311 fill_rx = 1;
1312 /* Rx interrupt, but nothing sent from uCode */
1313 if (i == r)
1314 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1315
1316 while (i != r) {
1317 rxb = rxq->queue[i];
1318
1319 /* If an RXB doesn't have a Rx queue slot associated with it,
1320 * then a bug has been introduced in the queue refilling
1321 * routines -- catch it here */
1322 BUG_ON(rxb == NULL);
1323
1324 rxq->queue[i] = NULL;
1325
1326 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1327 PAGE_SIZE << priv->hw_params.rx_page_order,
1328 PCI_DMA_FROMDEVICE);
1329 pkt = rxb_addr(rxb);
1330
1331 trace_iwlwifi_dev_rx(priv, pkt,
1332 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
1333
1334 /* Reclaim a command buffer only if this packet is a response
1335 * to a (driver-originated) command.
1336 * If the packet (e.g. Rx frame) originated from uCode,
1337 * there is no command buffer to reclaim.
1338 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1339 * but apparently a few don't get set; catch them here. */
1340 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1341 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1342 (pkt->hdr.cmd != REPLY_TX);
1343
1344 /* Based on type of command response or notification,
1345 * handle those that need handling via function in
1346 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1347 if (priv->rx_handlers[pkt->hdr.cmd]) {
1348 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1349 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1350 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1351 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1352 } else {
1353 /* No handling needed */
1354 IWL_DEBUG_RX(priv,
1355 "r %d i %d No handler needed for %s, 0x%02x\n",
1356 r, i, get_cmd_string(pkt->hdr.cmd),
1357 pkt->hdr.cmd);
1358 }
1359
1360 /*
1361 * XXX: After here, we should always check rxb->page
1362 * against NULL before touching it or its virtual
1363 * memory (pkt). Because some rx_handler might have
1364 * already taken or freed the pages.
1365 */
1366
1367 if (reclaim) {
1368 /* Invoke any callbacks, transfer the buffer to caller,
1369 * and fire off the (possibly) blocking iwl_send_cmd()
1370 * as we reclaim the driver command queue */
1371 if (rxb->page)
1372 iwl_tx_cmd_complete(priv, rxb);
1373 else
1374 IWL_WARN(priv, "Claim null rxb?\n");
1375 }
1376
1377 /* Reuse the page if possible. For notification packets and
1378 * SKBs that fail to Rx correctly, add them back into the
1379 * rx_free list for reuse later. */
1380 spin_lock_irqsave(&rxq->lock, flags);
1381 if (rxb->page != NULL) {
1382 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1383 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1384 PCI_DMA_FROMDEVICE);
1385 list_add_tail(&rxb->list, &rxq->rx_free);
1386 rxq->free_count++;
1387 } else
1388 list_add_tail(&rxb->list, &rxq->rx_used);
1389
1390 spin_unlock_irqrestore(&rxq->lock, flags);
1391
1392 i = (i + 1) & RX_QUEUE_MASK;
1393 /* If there are a lot of unused frames,
1394 * restock the Rx queue so ucode won't assert. */
1395 if (fill_rx) {
1396 count++;
1397 if (count >= 8) {
1398 rxq->read = i;
1399 iwl3945_rx_replenish_now(priv);
1400 count = 0;
1401 }
1402 }
1403 }
1404
1405 /* Backtrack one entry */
1406 rxq->read = i;
1407 if (fill_rx)
1408 iwl3945_rx_replenish_now(priv);
1409 else
1410 iwl3945_rx_queue_restock(priv);
1411 }
1412
1413 /* call this function to flush any scheduled tasklet */
1414 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1415 {
1416 /* wait to make sure we flush pending tasklet*/
1417 synchronize_irq(priv->pci_dev->irq);
1418 tasklet_kill(&priv->irq_tasklet);
1419 }
1420
1421 static const char *desc_lookup(int i)
1422 {
1423 switch (i) {
1424 case 1:
1425 return "FAIL";
1426 case 2:
1427 return "BAD_PARAM";
1428 case 3:
1429 return "BAD_CHECKSUM";
1430 case 4:
1431 return "NMI_INTERRUPT";
1432 case 5:
1433 return "SYSASSERT";
1434 case 6:
1435 return "FATAL_ERROR";
1436 }
1437
1438 return "UNKNOWN";
1439 }
1440
1441 #define ERROR_START_OFFSET (1 * sizeof(u32))
1442 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1443
1444 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1445 {
1446 u32 i;
1447 u32 desc, time, count, base, data1;
1448 u32 blink1, blink2, ilink1, ilink2;
1449
1450 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1451
1452 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1453 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1454 return;
1455 }
1456
1457
1458 count = iwl_read_targ_mem(priv, base);
1459
1460 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1461 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1462 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1463 priv->status, count);
1464 }
1465
1466 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1467 "ilink1 nmiPC Line\n");
1468 for (i = ERROR_START_OFFSET;
1469 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1470 i += ERROR_ELEM_SIZE) {
1471 desc = iwl_read_targ_mem(priv, base + i);
1472 time =
1473 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1474 blink1 =
1475 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1476 blink2 =
1477 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1478 ilink1 =
1479 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1480 ilink2 =
1481 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1482 data1 =
1483 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1484
1485 IWL_ERR(priv,
1486 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1487 desc_lookup(desc), desc, time, blink1, blink2,
1488 ilink1, ilink2, data1);
1489 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1490 0, blink1, blink2, ilink1, ilink2);
1491 }
1492 }
1493
1494 #define EVENT_START_OFFSET (6 * sizeof(u32))
1495
1496 /**
1497 * iwl3945_print_event_log - Dump error event log to syslog
1498 *
1499 */
1500 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1501 u32 num_events, u32 mode,
1502 int pos, char **buf, size_t bufsz)
1503 {
1504 u32 i;
1505 u32 base; /* SRAM byte address of event log header */
1506 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1507 u32 ptr; /* SRAM byte address of log data */
1508 u32 ev, time, data; /* event log data */
1509 unsigned long reg_flags;
1510
1511 if (num_events == 0)
1512 return pos;
1513
1514 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1515
1516 if (mode == 0)
1517 event_size = 2 * sizeof(u32);
1518 else
1519 event_size = 3 * sizeof(u32);
1520
1521 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1522
1523 /* Make sure device is powered up for SRAM reads */
1524 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1525 iwl_grab_nic_access(priv);
1526
1527 /* Set starting address; reads will auto-increment */
1528 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1529 rmb();
1530
1531 /* "time" is actually "data" for mode 0 (no timestamp).
1532 * place event id # at far right for easier visual parsing. */
1533 for (i = 0; i < num_events; i++) {
1534 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1535 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1536 if (mode == 0) {
1537 /* data, ev */
1538 if (bufsz) {
1539 pos += scnprintf(*buf + pos, bufsz - pos,
1540 "0x%08x:%04u\n",
1541 time, ev);
1542 } else {
1543 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1544 trace_iwlwifi_dev_ucode_event(priv, 0,
1545 time, ev);
1546 }
1547 } else {
1548 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1549 if (bufsz) {
1550 pos += scnprintf(*buf + pos, bufsz - pos,
1551 "%010u:0x%08x:%04u\n",
1552 time, data, ev);
1553 } else {
1554 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1555 time, data, ev);
1556 trace_iwlwifi_dev_ucode_event(priv, time,
1557 data, ev);
1558 }
1559 }
1560 }
1561
1562 /* Allow device to power down */
1563 iwl_release_nic_access(priv);
1564 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1565 return pos;
1566 }
1567
1568 /**
1569 * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1570 */
1571 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1572 u32 num_wraps, u32 next_entry,
1573 u32 size, u32 mode,
1574 int pos, char **buf, size_t bufsz)
1575 {
1576 /*
1577 * display the newest DEFAULT_LOG_ENTRIES entries
1578 * i.e the entries just before the next ont that uCode would fill.
1579 */
1580 if (num_wraps) {
1581 if (next_entry < size) {
1582 pos = iwl3945_print_event_log(priv,
1583 capacity - (size - next_entry),
1584 size - next_entry, mode,
1585 pos, buf, bufsz);
1586 pos = iwl3945_print_event_log(priv, 0,
1587 next_entry, mode,
1588 pos, buf, bufsz);
1589 } else
1590 pos = iwl3945_print_event_log(priv, next_entry - size,
1591 size, mode,
1592 pos, buf, bufsz);
1593 } else {
1594 if (next_entry < size)
1595 pos = iwl3945_print_event_log(priv, 0,
1596 next_entry, mode,
1597 pos, buf, bufsz);
1598 else
1599 pos = iwl3945_print_event_log(priv, next_entry - size,
1600 size, mode,
1601 pos, buf, bufsz);
1602 }
1603 return pos;
1604 }
1605
1606 /* For sanity check only. Actual size is determined by uCode, typ. 512 */
1607 #define IWL3945_MAX_EVENT_LOG_SIZE (512)
1608
1609 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1610
1611 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1612 char **buf, bool display)
1613 {
1614 u32 base; /* SRAM byte address of event log header */
1615 u32 capacity; /* event log capacity in # entries */
1616 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1617 u32 num_wraps; /* # times uCode wrapped to top of log */
1618 u32 next_entry; /* index of next entry to be written by uCode */
1619 u32 size; /* # entries that we'll print */
1620 int pos = 0;
1621 size_t bufsz = 0;
1622
1623 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1624 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1625 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1626 return -EINVAL;
1627 }
1628
1629 /* event log header */
1630 capacity = iwl_read_targ_mem(priv, base);
1631 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1632 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1633 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1634
1635 if (capacity > IWL3945_MAX_EVENT_LOG_SIZE) {
1636 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1637 capacity, IWL3945_MAX_EVENT_LOG_SIZE);
1638 capacity = IWL3945_MAX_EVENT_LOG_SIZE;
1639 }
1640
1641 if (next_entry > IWL3945_MAX_EVENT_LOG_SIZE) {
1642 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1643 next_entry, IWL3945_MAX_EVENT_LOG_SIZE);
1644 next_entry = IWL3945_MAX_EVENT_LOG_SIZE;
1645 }
1646
1647 size = num_wraps ? capacity : next_entry;
1648
1649 /* bail out if nothing in log */
1650 if (size == 0) {
1651 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1652 return pos;
1653 }
1654
1655 #ifdef CONFIG_IWLWIFI_DEBUG
1656 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1657 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1658 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1659 #else
1660 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1661 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1662 #endif
1663
1664 IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1665 size);
1666
1667 #ifdef CONFIG_IWLWIFI_DEBUG
1668 if (display) {
1669 if (full_log)
1670 bufsz = capacity * 48;
1671 else
1672 bufsz = size * 48;
1673 *buf = kmalloc(bufsz, GFP_KERNEL);
1674 if (!*buf)
1675 return -ENOMEM;
1676 }
1677 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1678 /* if uCode has wrapped back to top of log,
1679 * start at the oldest entry,
1680 * i.e the next one that uCode would fill.
1681 */
1682 if (num_wraps)
1683 pos = iwl3945_print_event_log(priv, next_entry,
1684 capacity - next_entry, mode,
1685 pos, buf, bufsz);
1686
1687 /* (then/else) start at top of log */
1688 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1689 pos, buf, bufsz);
1690 } else
1691 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1692 next_entry, size, mode,
1693 pos, buf, bufsz);
1694 #else
1695 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1696 next_entry, size, mode,
1697 pos, buf, bufsz);
1698 #endif
1699 return pos;
1700 }
1701
1702 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1703 {
1704 u32 inta, handled = 0;
1705 u32 inta_fh;
1706 unsigned long flags;
1707 #ifdef CONFIG_IWLWIFI_DEBUG
1708 u32 inta_mask;
1709 #endif
1710
1711 spin_lock_irqsave(&priv->lock, flags);
1712
1713 /* Ack/clear/reset pending uCode interrupts.
1714 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1715 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1716 inta = iwl_read32(priv, CSR_INT);
1717 iwl_write32(priv, CSR_INT, inta);
1718
1719 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1720 * Any new interrupts that happen after this, either while we're
1721 * in this tasklet, or later, will show up in next ISR/tasklet. */
1722 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1723 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1724
1725 #ifdef CONFIG_IWLWIFI_DEBUG
1726 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1727 /* just for debug */
1728 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1729 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1730 inta, inta_mask, inta_fh);
1731 }
1732 #endif
1733
1734 spin_unlock_irqrestore(&priv->lock, flags);
1735
1736 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1737 * atomic, make sure that inta covers all the interrupts that
1738 * we've discovered, even if FH interrupt came in just after
1739 * reading CSR_INT. */
1740 if (inta_fh & CSR39_FH_INT_RX_MASK)
1741 inta |= CSR_INT_BIT_FH_RX;
1742 if (inta_fh & CSR39_FH_INT_TX_MASK)
1743 inta |= CSR_INT_BIT_FH_TX;
1744
1745 /* Now service all interrupt bits discovered above. */
1746 if (inta & CSR_INT_BIT_HW_ERR) {
1747 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1748
1749 /* Tell the device to stop sending interrupts */
1750 iwl_disable_interrupts(priv);
1751
1752 priv->isr_stats.hw++;
1753 iwl_irq_handle_error(priv);
1754
1755 handled |= CSR_INT_BIT_HW_ERR;
1756
1757 return;
1758 }
1759
1760 #ifdef CONFIG_IWLWIFI_DEBUG
1761 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1762 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1763 if (inta & CSR_INT_BIT_SCD) {
1764 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1765 "the frame/frames.\n");
1766 priv->isr_stats.sch++;
1767 }
1768
1769 /* Alive notification via Rx interrupt will do the real work */
1770 if (inta & CSR_INT_BIT_ALIVE) {
1771 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1772 priv->isr_stats.alive++;
1773 }
1774 }
1775 #endif
1776 /* Safely ignore these bits for debug checks below */
1777 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1778
1779 /* Error detected by uCode */
1780 if (inta & CSR_INT_BIT_SW_ERR) {
1781 IWL_ERR(priv, "Microcode SW error detected. "
1782 "Restarting 0x%X.\n", inta);
1783 priv->isr_stats.sw++;
1784 priv->isr_stats.sw_err = inta;
1785 iwl_irq_handle_error(priv);
1786 handled |= CSR_INT_BIT_SW_ERR;
1787 }
1788
1789 /* uCode wakes up after power-down sleep */
1790 if (inta & CSR_INT_BIT_WAKEUP) {
1791 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1792 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1793 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1794 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1795 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1796 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1797 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1798 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1799
1800 priv->isr_stats.wakeup++;
1801 handled |= CSR_INT_BIT_WAKEUP;
1802 }
1803
1804 /* All uCode command responses, including Tx command responses,
1805 * Rx "responses" (frame-received notification), and other
1806 * notifications from uCode come through here*/
1807 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1808 iwl3945_rx_handle(priv);
1809 priv->isr_stats.rx++;
1810 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1811 }
1812
1813 if (inta & CSR_INT_BIT_FH_TX) {
1814 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1815 priv->isr_stats.tx++;
1816
1817 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1818 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1819 (FH39_SRVC_CHNL), 0x0);
1820 handled |= CSR_INT_BIT_FH_TX;
1821 }
1822
1823 if (inta & ~handled) {
1824 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1825 priv->isr_stats.unhandled++;
1826 }
1827
1828 if (inta & ~priv->inta_mask) {
1829 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1830 inta & ~priv->inta_mask);
1831 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1832 }
1833
1834 /* Re-enable all interrupts */
1835 /* only Re-enable if disabled by irq */
1836 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1837 iwl_enable_interrupts(priv);
1838
1839 #ifdef CONFIG_IWLWIFI_DEBUG
1840 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1841 inta = iwl_read32(priv, CSR_INT);
1842 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1843 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1844 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1845 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1846 }
1847 #endif
1848 }
1849
1850 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1851 enum ieee80211_band band,
1852 u8 is_active, u8 n_probes,
1853 struct iwl3945_scan_channel *scan_ch)
1854 {
1855 struct ieee80211_channel *chan;
1856 const struct ieee80211_supported_band *sband;
1857 const struct iwl_channel_info *ch_info;
1858 u16 passive_dwell = 0;
1859 u16 active_dwell = 0;
1860 int added, i;
1861
1862 sband = iwl_get_hw_mode(priv, band);
1863 if (!sband)
1864 return 0;
1865
1866 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1867 passive_dwell = iwl_get_passive_dwell_time(priv, band);
1868
1869 if (passive_dwell <= active_dwell)
1870 passive_dwell = active_dwell + 1;
1871
1872 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1873 chan = priv->scan_request->channels[i];
1874
1875 if (chan->band != band)
1876 continue;
1877
1878 scan_ch->channel = chan->hw_value;
1879
1880 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1881 if (!is_channel_valid(ch_info)) {
1882 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1883 scan_ch->channel);
1884 continue;
1885 }
1886
1887 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1888 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1889 /* If passive , set up for auto-switch
1890 * and use long active_dwell time.
1891 */
1892 if (!is_active || is_channel_passive(ch_info) ||
1893 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1894 scan_ch->type = 0; /* passive */
1895 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1896 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1897 } else {
1898 scan_ch->type = 1; /* active */
1899 }
1900
1901 /* Set direct probe bits. These may be used both for active
1902 * scan channels (probes gets sent right away),
1903 * or for passive channels (probes get se sent only after
1904 * hearing clear Rx packet).*/
1905 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1906 if (n_probes)
1907 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1908 } else {
1909 /* uCode v1 does not allow setting direct probe bits on
1910 * passive channel. */
1911 if ((scan_ch->type & 1) && n_probes)
1912 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1913 }
1914
1915 /* Set txpower levels to defaults */
1916 scan_ch->tpc.dsp_atten = 110;
1917 /* scan_pwr_info->tpc.dsp_atten; */
1918
1919 /*scan_pwr_info->tpc.tx_gain; */
1920 if (band == IEEE80211_BAND_5GHZ)
1921 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1922 else {
1923 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1924 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1925 * power level:
1926 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1927 */
1928 }
1929
1930 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1931 scan_ch->channel,
1932 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1933 (scan_ch->type & 1) ?
1934 active_dwell : passive_dwell);
1935
1936 scan_ch++;
1937 added++;
1938 }
1939
1940 IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1941 return added;
1942 }
1943
1944 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1945 struct ieee80211_rate *rates)
1946 {
1947 int i;
1948
1949 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1950 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1951 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1952 rates[i].hw_value_short = i;
1953 rates[i].flags = 0;
1954 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1955 /*
1956 * If CCK != 1M then set short preamble rate flag.
1957 */
1958 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1959 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1960 }
1961 }
1962 }
1963
1964 /******************************************************************************
1965 *
1966 * uCode download functions
1967 *
1968 ******************************************************************************/
1969
1970 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1971 {
1972 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1973 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1974 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1975 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1976 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1977 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1978 }
1979
1980 /**
1981 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1982 * looking at all data.
1983 */
1984 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1985 {
1986 u32 val;
1987 u32 save_len = len;
1988 int rc = 0;
1989 u32 errcnt;
1990
1991 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1992
1993 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1994 IWL39_RTC_INST_LOWER_BOUND);
1995
1996 errcnt = 0;
1997 for (; len > 0; len -= sizeof(u32), image++) {
1998 /* read data comes through single port, auto-incr addr */
1999 /* NOTE: Use the debugless read so we don't flood kernel log
2000 * if IWL_DL_IO is set */
2001 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2002 if (val != le32_to_cpu(*image)) {
2003 IWL_ERR(priv, "uCode INST section is invalid at "
2004 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2005 save_len - len, val, le32_to_cpu(*image));
2006 rc = -EIO;
2007 errcnt++;
2008 if (errcnt >= 20)
2009 break;
2010 }
2011 }
2012
2013
2014 if (!errcnt)
2015 IWL_DEBUG_INFO(priv,
2016 "ucode image in INSTRUCTION memory is good\n");
2017
2018 return rc;
2019 }
2020
2021
2022 /**
2023 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2024 * using sample data 100 bytes apart. If these sample points are good,
2025 * it's a pretty good bet that everything between them is good, too.
2026 */
2027 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2028 {
2029 u32 val;
2030 int rc = 0;
2031 u32 errcnt = 0;
2032 u32 i;
2033
2034 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2035
2036 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2037 /* read data comes through single port, auto-incr addr */
2038 /* NOTE: Use the debugless read so we don't flood kernel log
2039 * if IWL_DL_IO is set */
2040 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2041 i + IWL39_RTC_INST_LOWER_BOUND);
2042 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2043 if (val != le32_to_cpu(*image)) {
2044 #if 0 /* Enable this if you want to see details */
2045 IWL_ERR(priv, "uCode INST section is invalid at "
2046 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2047 i, val, *image);
2048 #endif
2049 rc = -EIO;
2050 errcnt++;
2051 if (errcnt >= 3)
2052 break;
2053 }
2054 }
2055
2056 return rc;
2057 }
2058
2059
2060 /**
2061 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2062 * and verify its contents
2063 */
2064 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2065 {
2066 __le32 *image;
2067 u32 len;
2068 int rc = 0;
2069
2070 /* Try bootstrap */
2071 image = (__le32 *)priv->ucode_boot.v_addr;
2072 len = priv->ucode_boot.len;
2073 rc = iwl3945_verify_inst_sparse(priv, image, len);
2074 if (rc == 0) {
2075 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2076 return 0;
2077 }
2078
2079 /* Try initialize */
2080 image = (__le32 *)priv->ucode_init.v_addr;
2081 len = priv->ucode_init.len;
2082 rc = iwl3945_verify_inst_sparse(priv, image, len);
2083 if (rc == 0) {
2084 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2085 return 0;
2086 }
2087
2088 /* Try runtime/protocol */
2089 image = (__le32 *)priv->ucode_code.v_addr;
2090 len = priv->ucode_code.len;
2091 rc = iwl3945_verify_inst_sparse(priv, image, len);
2092 if (rc == 0) {
2093 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2094 return 0;
2095 }
2096
2097 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2098
2099 /* Since nothing seems to match, show first several data entries in
2100 * instruction SRAM, so maybe visual inspection will give a clue.
2101 * Selection of bootstrap image (vs. other images) is arbitrary. */
2102 image = (__le32 *)priv->ucode_boot.v_addr;
2103 len = priv->ucode_boot.len;
2104 rc = iwl3945_verify_inst_full(priv, image, len);
2105
2106 return rc;
2107 }
2108
2109 static void iwl3945_nic_start(struct iwl_priv *priv)
2110 {
2111 /* Remove all resets to allow NIC to operate */
2112 iwl_write32(priv, CSR_RESET, 0);
2113 }
2114
2115 /**
2116 * iwl3945_read_ucode - Read uCode images from disk file.
2117 *
2118 * Copy into buffers for card to fetch via bus-mastering
2119 */
2120 static int iwl3945_read_ucode(struct iwl_priv *priv)
2121 {
2122 const struct iwl_ucode_header *ucode;
2123 int ret = -EINVAL, index;
2124 const struct firmware *ucode_raw;
2125 /* firmware file name contains uCode/driver compatibility version */
2126 const char *name_pre = priv->cfg->fw_name_pre;
2127 const unsigned int api_max = priv->cfg->ucode_api_max;
2128 const unsigned int api_min = priv->cfg->ucode_api_min;
2129 char buf[25];
2130 u8 *src;
2131 size_t len;
2132 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2133
2134 /* Ask kernel firmware_class module to get the boot firmware off disk.
2135 * request_firmware() is synchronous, file is in memory on return. */
2136 for (index = api_max; index >= api_min; index--) {
2137 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2138 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2139 if (ret < 0) {
2140 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2141 buf, ret);
2142 if (ret == -ENOENT)
2143 continue;
2144 else
2145 goto error;
2146 } else {
2147 if (index < api_max)
2148 IWL_ERR(priv, "Loaded firmware %s, "
2149 "which is deprecated. "
2150 " Please use API v%u instead.\n",
2151 buf, api_max);
2152 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2153 "(%zd bytes) from disk\n",
2154 buf, ucode_raw->size);
2155 break;
2156 }
2157 }
2158
2159 if (ret < 0)
2160 goto error;
2161
2162 /* Make sure that we got at least our header! */
2163 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
2164 IWL_ERR(priv, "File size way too small!\n");
2165 ret = -EINVAL;
2166 goto err_release;
2167 }
2168
2169 /* Data from ucode file: header followed by uCode images */
2170 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2171
2172 priv->ucode_ver = le32_to_cpu(ucode->ver);
2173 api_ver = IWL_UCODE_API(priv->ucode_ver);
2174 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
2175 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
2176 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
2177 init_data_size =
2178 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
2179 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
2180 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
2181
2182 /* api_ver should match the api version forming part of the
2183 * firmware filename ... but we don't check for that and only rely
2184 * on the API version read from firmware header from here on forward */
2185
2186 if (api_ver < api_min || api_ver > api_max) {
2187 IWL_ERR(priv, "Driver unable to support your firmware API. "
2188 "Driver supports v%u, firmware is v%u.\n",
2189 api_max, api_ver);
2190 priv->ucode_ver = 0;
2191 ret = -EINVAL;
2192 goto err_release;
2193 }
2194 if (api_ver != api_max)
2195 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2196 "got %u. New firmware can be obtained "
2197 "from http://www.intellinuxwireless.org.\n",
2198 api_max, api_ver);
2199
2200 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2201 IWL_UCODE_MAJOR(priv->ucode_ver),
2202 IWL_UCODE_MINOR(priv->ucode_ver),
2203 IWL_UCODE_API(priv->ucode_ver),
2204 IWL_UCODE_SERIAL(priv->ucode_ver));
2205
2206 snprintf(priv->hw->wiphy->fw_version,
2207 sizeof(priv->hw->wiphy->fw_version),
2208 "%u.%u.%u.%u",
2209 IWL_UCODE_MAJOR(priv->ucode_ver),
2210 IWL_UCODE_MINOR(priv->ucode_ver),
2211 IWL_UCODE_API(priv->ucode_ver),
2212 IWL_UCODE_SERIAL(priv->ucode_ver));
2213
2214 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2215 priv->ucode_ver);
2216 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2217 inst_size);
2218 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2219 data_size);
2220 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2221 init_size);
2222 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2223 init_data_size);
2224 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2225 boot_size);
2226
2227
2228 /* Verify size of file vs. image size info in file's header */
2229 if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
2230 inst_size + data_size + init_size +
2231 init_data_size + boot_size) {
2232
2233 IWL_DEBUG_INFO(priv,
2234 "uCode file size %zd does not match expected size\n",
2235 ucode_raw->size);
2236 ret = -EINVAL;
2237 goto err_release;
2238 }
2239
2240 /* Verify that uCode images will fit in card's SRAM */
2241 if (inst_size > IWL39_MAX_INST_SIZE) {
2242 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2243 inst_size);
2244 ret = -EINVAL;
2245 goto err_release;
2246 }
2247
2248 if (data_size > IWL39_MAX_DATA_SIZE) {
2249 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2250 data_size);
2251 ret = -EINVAL;
2252 goto err_release;
2253 }
2254 if (init_size > IWL39_MAX_INST_SIZE) {
2255 IWL_DEBUG_INFO(priv,
2256 "uCode init instr len %d too large to fit in\n",
2257 init_size);
2258 ret = -EINVAL;
2259 goto err_release;
2260 }
2261 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2262 IWL_DEBUG_INFO(priv,
2263 "uCode init data len %d too large to fit in\n",
2264 init_data_size);
2265 ret = -EINVAL;
2266 goto err_release;
2267 }
2268 if (boot_size > IWL39_MAX_BSM_SIZE) {
2269 IWL_DEBUG_INFO(priv,
2270 "uCode boot instr len %d too large to fit in\n",
2271 boot_size);
2272 ret = -EINVAL;
2273 goto err_release;
2274 }
2275
2276 /* Allocate ucode buffers for card's bus-master loading ... */
2277
2278 /* Runtime instructions and 2 copies of data:
2279 * 1) unmodified from disk
2280 * 2) backup cache for save/restore during power-downs */
2281 priv->ucode_code.len = inst_size;
2282 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2283
2284 priv->ucode_data.len = data_size;
2285 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2286
2287 priv->ucode_data_backup.len = data_size;
2288 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2289
2290 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2291 !priv->ucode_data_backup.v_addr)
2292 goto err_pci_alloc;
2293
2294 /* Initialization instructions and data */
2295 if (init_size && init_data_size) {
2296 priv->ucode_init.len = init_size;
2297 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2298
2299 priv->ucode_init_data.len = init_data_size;
2300 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2301
2302 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2303 goto err_pci_alloc;
2304 }
2305
2306 /* Bootstrap (instructions only, no data) */
2307 if (boot_size) {
2308 priv->ucode_boot.len = boot_size;
2309 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2310
2311 if (!priv->ucode_boot.v_addr)
2312 goto err_pci_alloc;
2313 }
2314
2315 /* Copy images into buffers for card's bus-master reads ... */
2316
2317 /* Runtime instructions (first block of data in file) */
2318 len = inst_size;
2319 IWL_DEBUG_INFO(priv,
2320 "Copying (but not loading) uCode instr len %zd\n", len);
2321 memcpy(priv->ucode_code.v_addr, src, len);
2322 src += len;
2323
2324 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2325 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2326
2327 /* Runtime data (2nd block)
2328 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2329 len = data_size;
2330 IWL_DEBUG_INFO(priv,
2331 "Copying (but not loading) uCode data len %zd\n", len);
2332 memcpy(priv->ucode_data.v_addr, src, len);
2333 memcpy(priv->ucode_data_backup.v_addr, src, len);
2334 src += len;
2335
2336 /* Initialization instructions (3rd block) */
2337 if (init_size) {
2338 len = init_size;
2339 IWL_DEBUG_INFO(priv,
2340 "Copying (but not loading) init instr len %zd\n", len);
2341 memcpy(priv->ucode_init.v_addr, src, len);
2342 src += len;
2343 }
2344
2345 /* Initialization data (4th block) */
2346 if (init_data_size) {
2347 len = init_data_size;
2348 IWL_DEBUG_INFO(priv,
2349 "Copying (but not loading) init data len %zd\n", len);
2350 memcpy(priv->ucode_init_data.v_addr, src, len);
2351 src += len;
2352 }
2353
2354 /* Bootstrap instructions (5th block) */
2355 len = boot_size;
2356 IWL_DEBUG_INFO(priv,
2357 "Copying (but not loading) boot instr len %zd\n", len);
2358 memcpy(priv->ucode_boot.v_addr, src, len);
2359
2360 /* We have our copies now, allow OS release its copies */
2361 release_firmware(ucode_raw);
2362 return 0;
2363
2364 err_pci_alloc:
2365 IWL_ERR(priv, "failed to allocate pci memory\n");
2366 ret = -ENOMEM;
2367 iwl3945_dealloc_ucode_pci(priv);
2368
2369 err_release:
2370 release_firmware(ucode_raw);
2371
2372 error:
2373 return ret;
2374 }
2375
2376
2377 /**
2378 * iwl3945_set_ucode_ptrs - Set uCode address location
2379 *
2380 * Tell initialization uCode where to find runtime uCode.
2381 *
2382 * BSM registers initially contain pointers to initialization uCode.
2383 * We need to replace them to load runtime uCode inst and data,
2384 * and to save runtime data when powering down.
2385 */
2386 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2387 {
2388 dma_addr_t pinst;
2389 dma_addr_t pdata;
2390
2391 /* bits 31:0 for 3945 */
2392 pinst = priv->ucode_code.p_addr;
2393 pdata = priv->ucode_data_backup.p_addr;
2394
2395 /* Tell bootstrap uCode where to find image to load */
2396 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2397 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2398 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2399 priv->ucode_data.len);
2400
2401 /* Inst byte count must be last to set up, bit 31 signals uCode
2402 * that all new ptr/size info is in place */
2403 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2404 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2405
2406 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2407
2408 return 0;
2409 }
2410
2411 /**
2412 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2413 *
2414 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2415 *
2416 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2417 */
2418 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2419 {
2420 /* Check alive response for "valid" sign from uCode */
2421 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2422 /* We had an error bringing up the hardware, so take it
2423 * all the way back down so we can try again */
2424 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2425 goto restart;
2426 }
2427
2428 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2429 * This is a paranoid check, because we would not have gotten the
2430 * "initialize" alive if code weren't properly loaded. */
2431 if (iwl3945_verify_ucode(priv)) {
2432 /* Runtime instruction load was bad;
2433 * take it all the way back down so we can try again */
2434 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2435 goto restart;
2436 }
2437
2438 /* Send pointers to protocol/runtime uCode image ... init code will
2439 * load and launch runtime uCode, which will send us another "Alive"
2440 * notification. */
2441 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2442 if (iwl3945_set_ucode_ptrs(priv)) {
2443 /* Runtime instruction load won't happen;
2444 * take it all the way back down so we can try again */
2445 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2446 goto restart;
2447 }
2448 return;
2449
2450 restart:
2451 queue_work(priv->workqueue, &priv->restart);
2452 }
2453
2454 /**
2455 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2456 * from protocol/runtime uCode (initialization uCode's
2457 * Alive gets handled by iwl3945_init_alive_start()).
2458 */
2459 static void iwl3945_alive_start(struct iwl_priv *priv)
2460 {
2461 int thermal_spin = 0;
2462 u32 rfkill;
2463
2464 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2465
2466 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2467 /* We had an error bringing up the hardware, so take it
2468 * all the way back down so we can try again */
2469 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2470 goto restart;
2471 }
2472
2473 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2474 * This is a paranoid check, because we would not have gotten the
2475 * "runtime" alive if code weren't properly loaded. */
2476 if (iwl3945_verify_ucode(priv)) {
2477 /* Runtime instruction load was bad;
2478 * take it all the way back down so we can try again */
2479 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2480 goto restart;
2481 }
2482
2483 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2484 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2485
2486 if (rfkill & 0x1) {
2487 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2488 /* if RFKILL is not on, then wait for thermal
2489 * sensor in adapter to kick in */
2490 while (iwl3945_hw_get_temperature(priv) == 0) {
2491 thermal_spin++;
2492 udelay(10);
2493 }
2494
2495 if (thermal_spin)
2496 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2497 thermal_spin * 10);
2498 } else
2499 set_bit(STATUS_RF_KILL_HW, &priv->status);
2500
2501 /* After the ALIVE response, we can send commands to 3945 uCode */
2502 set_bit(STATUS_ALIVE, &priv->status);
2503
2504 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2505 /* Enable timer to monitor the driver queues */
2506 mod_timer(&priv->monitor_recover,
2507 jiffies +
2508 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2509 }
2510
2511 if (iwl_is_rfkill(priv))
2512 return;
2513
2514 ieee80211_wake_queues(priv->hw);
2515
2516 priv->active_rate = IWL_RATES_MASK;
2517
2518 iwl_power_update_mode(priv, true);
2519
2520 if (iwl_is_associated(priv)) {
2521 struct iwl3945_rxon_cmd *active_rxon =
2522 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2523
2524 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2525 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2526 } else {
2527 /* Initialize our rx_config data */
2528 iwl_connection_init_rx_config(priv, priv->iw_mode);
2529 }
2530
2531 /* Configure Bluetooth device coexistence support */
2532 iwl_send_bt_config(priv);
2533
2534 /* Configure the adapter for unassociated operation */
2535 iwlcore_commit_rxon(priv);
2536
2537 iwl3945_reg_txpower_periodic(priv);
2538
2539 iwl_leds_init(priv);
2540
2541 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2542 set_bit(STATUS_READY, &priv->status);
2543 wake_up_interruptible(&priv->wait_command_queue);
2544
2545 return;
2546
2547 restart:
2548 queue_work(priv->workqueue, &priv->restart);
2549 }
2550
2551 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2552
2553 static void __iwl3945_down(struct iwl_priv *priv)
2554 {
2555 unsigned long flags;
2556 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2557 struct ieee80211_conf *conf = NULL;
2558
2559 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2560
2561 conf = ieee80211_get_hw_conf(priv->hw);
2562
2563 if (!exit_pending)
2564 set_bit(STATUS_EXIT_PENDING, &priv->status);
2565
2566 /* Station information will now be cleared in device */
2567 iwl_clear_ucode_stations(priv, true);
2568
2569 /* Unblock any waiting calls */
2570 wake_up_interruptible_all(&priv->wait_command_queue);
2571
2572 /* Wipe out the EXIT_PENDING status bit if we are not actually
2573 * exiting the module */
2574 if (!exit_pending)
2575 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2576
2577 /* stop and reset the on-board processor */
2578 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2579
2580 /* tell the device to stop sending interrupts */
2581 spin_lock_irqsave(&priv->lock, flags);
2582 iwl_disable_interrupts(priv);
2583 spin_unlock_irqrestore(&priv->lock, flags);
2584 iwl_synchronize_irq(priv);
2585
2586 if (priv->mac80211_registered)
2587 ieee80211_stop_queues(priv->hw);
2588
2589 /* If we have not previously called iwl3945_init() then
2590 * clear all bits but the RF Kill bits and return */
2591 if (!iwl_is_init(priv)) {
2592 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2593 STATUS_RF_KILL_HW |
2594 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2595 STATUS_GEO_CONFIGURED |
2596 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2597 STATUS_EXIT_PENDING;
2598 goto exit;
2599 }
2600
2601 /* ...otherwise clear out all the status bits but the RF Kill
2602 * bit and continue taking the NIC down. */
2603 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2604 STATUS_RF_KILL_HW |
2605 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2606 STATUS_GEO_CONFIGURED |
2607 test_bit(STATUS_FW_ERROR, &priv->status) <<
2608 STATUS_FW_ERROR |
2609 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2610 STATUS_EXIT_PENDING;
2611
2612 iwl3945_hw_txq_ctx_stop(priv);
2613 iwl3945_hw_rxq_stop(priv);
2614
2615 /* Power-down device's busmaster DMA clocks */
2616 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2617 udelay(5);
2618
2619 /* Stop the device, and put it in low power state */
2620 priv->cfg->ops->lib->apm_ops.stop(priv);
2621
2622 exit:
2623 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2624
2625 if (priv->ibss_beacon)
2626 dev_kfree_skb(priv->ibss_beacon);
2627 priv->ibss_beacon = NULL;
2628
2629 /* clear out any free frames */
2630 iwl3945_clear_free_frames(priv);
2631 }
2632
2633 static void iwl3945_down(struct iwl_priv *priv)
2634 {
2635 mutex_lock(&priv->mutex);
2636 __iwl3945_down(priv);
2637 mutex_unlock(&priv->mutex);
2638
2639 iwl3945_cancel_deferred_work(priv);
2640 }
2641
2642 #define MAX_HW_RESTARTS 5
2643
2644 static int __iwl3945_up(struct iwl_priv *priv)
2645 {
2646 int rc, i;
2647
2648 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2649 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2650 return -EIO;
2651 }
2652
2653 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2654 IWL_ERR(priv, "ucode not available for device bring up\n");
2655 return -EIO;
2656 }
2657
2658 /* If platform's RF_KILL switch is NOT set to KILL */
2659 if (iwl_read32(priv, CSR_GP_CNTRL) &
2660 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2661 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2662 else {
2663 set_bit(STATUS_RF_KILL_HW, &priv->status);
2664 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2665 return -ENODEV;
2666 }
2667
2668 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2669
2670 rc = iwl3945_hw_nic_init(priv);
2671 if (rc) {
2672 IWL_ERR(priv, "Unable to int nic\n");
2673 return rc;
2674 }
2675
2676 /* make sure rfkill handshake bits are cleared */
2677 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2678 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2679 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2680
2681 /* clear (again), then enable host interrupts */
2682 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2683 iwl_enable_interrupts(priv);
2684
2685 /* really make sure rfkill handshake bits are cleared */
2686 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2687 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2688
2689 /* Copy original ucode data image from disk into backup cache.
2690 * This will be used to initialize the on-board processor's
2691 * data SRAM for a clean start when the runtime program first loads. */
2692 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2693 priv->ucode_data.len);
2694
2695 /* We return success when we resume from suspend and rf_kill is on. */
2696 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2697 return 0;
2698
2699 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2700
2701 /* load bootstrap state machine,
2702 * load bootstrap program into processor's memory,
2703 * prepare to load the "initialize" uCode */
2704 rc = priv->cfg->ops->lib->load_ucode(priv);
2705
2706 if (rc) {
2707 IWL_ERR(priv,
2708 "Unable to set up bootstrap uCode: %d\n", rc);
2709 continue;
2710 }
2711
2712 /* start card; "initialize" will load runtime ucode */
2713 iwl3945_nic_start(priv);
2714
2715 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2716
2717 return 0;
2718 }
2719
2720 set_bit(STATUS_EXIT_PENDING, &priv->status);
2721 __iwl3945_down(priv);
2722 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2723
2724 /* tried to restart and config the device for as long as our
2725 * patience could withstand */
2726 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2727 return -EIO;
2728 }
2729
2730
2731 /*****************************************************************************
2732 *
2733 * Workqueue callbacks
2734 *
2735 *****************************************************************************/
2736
2737 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2738 {
2739 struct iwl_priv *priv =
2740 container_of(data, struct iwl_priv, init_alive_start.work);
2741
2742 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2743 return;
2744
2745 mutex_lock(&priv->mutex);
2746 iwl3945_init_alive_start(priv);
2747 mutex_unlock(&priv->mutex);
2748 }
2749
2750 static void iwl3945_bg_alive_start(struct work_struct *data)
2751 {
2752 struct iwl_priv *priv =
2753 container_of(data, struct iwl_priv, alive_start.work);
2754
2755 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2756 return;
2757
2758 mutex_lock(&priv->mutex);
2759 iwl3945_alive_start(priv);
2760 mutex_unlock(&priv->mutex);
2761 }
2762
2763 /*
2764 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2765 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2766 * *is* readable even when device has been SW_RESET into low power mode
2767 * (e.g. during RF KILL).
2768 */
2769 static void iwl3945_rfkill_poll(struct work_struct *data)
2770 {
2771 struct iwl_priv *priv =
2772 container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2773 bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2774 bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2775 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2776
2777 if (new_rfkill != old_rfkill) {
2778 if (new_rfkill)
2779 set_bit(STATUS_RF_KILL_HW, &priv->status);
2780 else
2781 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2782
2783 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2784
2785 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2786 new_rfkill ? "disable radio" : "enable radio");
2787 }
2788
2789 /* Keep this running, even if radio now enabled. This will be
2790 * cancelled in mac_start() if system decides to start again */
2791 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2792 round_jiffies_relative(2 * HZ));
2793
2794 }
2795
2796 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
2797 static void iwl3945_bg_request_scan(struct work_struct *data)
2798 {
2799 struct iwl_priv *priv =
2800 container_of(data, struct iwl_priv, request_scan);
2801 struct iwl_host_cmd cmd = {
2802 .id = REPLY_SCAN_CMD,
2803 .len = sizeof(struct iwl3945_scan_cmd),
2804 .flags = CMD_SIZE_HUGE,
2805 };
2806 struct iwl3945_scan_cmd *scan;
2807 struct ieee80211_conf *conf = NULL;
2808 u8 n_probes = 0;
2809 enum ieee80211_band band;
2810 bool is_active = false;
2811
2812 conf = ieee80211_get_hw_conf(priv->hw);
2813
2814 mutex_lock(&priv->mutex);
2815
2816 cancel_delayed_work(&priv->scan_check);
2817
2818 if (!iwl_is_ready(priv)) {
2819 IWL_WARN(priv, "request scan called when driver not ready.\n");
2820 goto done;
2821 }
2822
2823 /* Make sure the scan wasn't canceled before this queued work
2824 * was given the chance to run... */
2825 if (!test_bit(STATUS_SCANNING, &priv->status))
2826 goto done;
2827
2828 /* This should never be called or scheduled if there is currently
2829 * a scan active in the hardware. */
2830 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2831 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2832 "Ignoring second request.\n");
2833 goto done;
2834 }
2835
2836 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2837 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2838 goto done;
2839 }
2840
2841 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2842 IWL_DEBUG_HC(priv,
2843 "Scan request while abort pending. Queuing.\n");
2844 goto done;
2845 }
2846
2847 if (iwl_is_rfkill(priv)) {
2848 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2849 goto done;
2850 }
2851
2852 if (!test_bit(STATUS_READY, &priv->status)) {
2853 IWL_DEBUG_HC(priv,
2854 "Scan request while uninitialized. Queuing.\n");
2855 goto done;
2856 }
2857
2858 if (!priv->scan_bands) {
2859 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
2860 goto done;
2861 }
2862
2863 if (!priv->scan) {
2864 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2865 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2866 if (!priv->scan) {
2867 IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2868 goto done;
2869 }
2870 }
2871 scan = priv->scan;
2872 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2873
2874 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2875 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2876
2877 if (iwl_is_associated(priv)) {
2878 u16 interval = 0;
2879 u32 extra;
2880 u32 suspend_time = 100;
2881 u32 scan_suspend_time = 100;
2882 unsigned long flags;
2883
2884 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2885
2886 spin_lock_irqsave(&priv->lock, flags);
2887 interval = priv->beacon_int;
2888 spin_unlock_irqrestore(&priv->lock, flags);
2889
2890 scan->suspend_time = 0;
2891 scan->max_out_time = cpu_to_le32(200 * 1024);
2892 if (!interval)
2893 interval = suspend_time;
2894 /*
2895 * suspend time format:
2896 * 0-19: beacon interval in usec (time before exec.)
2897 * 20-23: 0
2898 * 24-31: number of beacons (suspend between channels)
2899 */
2900
2901 extra = (suspend_time / interval) << 24;
2902 scan_suspend_time = 0xFF0FFFFF &
2903 (extra | ((suspend_time % interval) * 1024));
2904
2905 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2906 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2907 scan_suspend_time, interval);
2908 }
2909
2910 if (priv->is_internal_short_scan) {
2911 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
2912 } else if (priv->scan_request->n_ssids) {
2913 int i, p = 0;
2914 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2915 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2916 /* always does wildcard anyway */
2917 if (!priv->scan_request->ssids[i].ssid_len)
2918 continue;
2919 scan->direct_scan[p].id = WLAN_EID_SSID;
2920 scan->direct_scan[p].len =
2921 priv->scan_request->ssids[i].ssid_len;
2922 memcpy(scan->direct_scan[p].ssid,
2923 priv->scan_request->ssids[i].ssid,
2924 priv->scan_request->ssids[i].ssid_len);
2925 n_probes++;
2926 p++;
2927 }
2928 is_active = true;
2929 } else
2930 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2931
2932 /* We don't build a direct scan probe request; the uCode will do
2933 * that based on the direct_mask added to each channel entry */
2934 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2935 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2936 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2937
2938 /* flags + rate selection */
2939
2940 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
2941 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2942 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2943 scan->good_CRC_th = 0;
2944 band = IEEE80211_BAND_2GHZ;
2945 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
2946 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2947 /*
2948 * If active scaning is requested but a certain channel
2949 * is marked passive, we can do active scanning if we
2950 * detect transmissions.
2951 */
2952 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
2953 band = IEEE80211_BAND_5GHZ;
2954 } else {
2955 IWL_WARN(priv, "Invalid scan band count\n");
2956 goto done;
2957 }
2958
2959 if (!priv->is_internal_short_scan) {
2960 scan->tx_cmd.len = cpu_to_le16(
2961 iwl_fill_probe_req(priv,
2962 (struct ieee80211_mgmt *)scan->data,
2963 priv->scan_request->ie,
2964 priv->scan_request->ie_len,
2965 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2966 } else {
2967 scan->tx_cmd.len = cpu_to_le16(
2968 iwl_fill_probe_req(priv,
2969 (struct ieee80211_mgmt *)scan->data,
2970 NULL, 0,
2971 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2972 }
2973 /* select Rx antennas */
2974 scan->flags |= iwl3945_get_antenna_flags(priv);
2975
2976 if (iwl_is_monitor_mode(priv))
2977 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
2978
2979 scan->channel_count =
2980 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2981 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
2982
2983 if (scan->channel_count == 0) {
2984 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2985 goto done;
2986 }
2987
2988 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2989 scan->channel_count * sizeof(struct iwl3945_scan_channel);
2990 cmd.data = scan;
2991 scan->len = cpu_to_le16(cmd.len);
2992
2993 set_bit(STATUS_SCAN_HW, &priv->status);
2994 if (iwl_send_cmd_sync(priv, &cmd))
2995 goto done;
2996
2997 queue_delayed_work(priv->workqueue, &priv->scan_check,
2998 IWL_SCAN_CHECK_WATCHDOG);
2999
3000 mutex_unlock(&priv->mutex);
3001 return;
3002
3003 done:
3004 /* can not perform scan make sure we clear scanning
3005 * bits from status so next scan request can be performed.
3006 * if we dont clear scanning status bit here all next scan
3007 * will fail
3008 */
3009 clear_bit(STATUS_SCAN_HW, &priv->status);
3010 clear_bit(STATUS_SCANNING, &priv->status);
3011
3012 /* inform mac80211 scan aborted */
3013 queue_work(priv->workqueue, &priv->scan_completed);
3014 mutex_unlock(&priv->mutex);
3015 }
3016
3017 static void iwl3945_bg_restart(struct work_struct *data)
3018 {
3019 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3020
3021 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3022 return;
3023
3024 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3025 mutex_lock(&priv->mutex);
3026 priv->vif = NULL;
3027 priv->is_open = 0;
3028 mutex_unlock(&priv->mutex);
3029 iwl3945_down(priv);
3030 ieee80211_restart_hw(priv->hw);
3031 } else {
3032 iwl3945_down(priv);
3033
3034 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3035 return;
3036
3037 mutex_lock(&priv->mutex);
3038 __iwl3945_up(priv);
3039 mutex_unlock(&priv->mutex);
3040 }
3041 }
3042
3043 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3044 {
3045 struct iwl_priv *priv =
3046 container_of(data, struct iwl_priv, rx_replenish);
3047
3048 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3049 return;
3050
3051 mutex_lock(&priv->mutex);
3052 iwl3945_rx_replenish(priv);
3053 mutex_unlock(&priv->mutex);
3054 }
3055
3056 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3057
3058 void iwl3945_post_associate(struct iwl_priv *priv)
3059 {
3060 int rc = 0;
3061 struct ieee80211_conf *conf = NULL;
3062
3063 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3064 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3065 return;
3066 }
3067
3068
3069 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3070 priv->assoc_id, priv->active_rxon.bssid_addr);
3071
3072 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3073 return;
3074
3075 if (!priv->vif || !priv->is_open)
3076 return;
3077
3078 iwl_scan_cancel_timeout(priv, 200);
3079
3080 conf = ieee80211_get_hw_conf(priv->hw);
3081
3082 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3083 iwlcore_commit_rxon(priv);
3084
3085 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3086 iwl_setup_rxon_timing(priv);
3087 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3088 sizeof(priv->rxon_timing), &priv->rxon_timing);
3089 if (rc)
3090 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3091 "Attempting to continue.\n");
3092
3093 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3094
3095 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3096
3097 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3098 priv->assoc_id, priv->beacon_int);
3099
3100 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3101 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3102 else
3103 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3104
3105 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3106 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
3107 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3108 else
3109 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3110
3111 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3112 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3113
3114 }
3115
3116 iwlcore_commit_rxon(priv);
3117
3118 switch (priv->iw_mode) {
3119 case NL80211_IFTYPE_STATION:
3120 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3121 break;
3122
3123 case NL80211_IFTYPE_ADHOC:
3124
3125 priv->assoc_id = 1;
3126 iwl_add_local_station(priv, priv->bssid, false);
3127 iwl3945_sync_sta(priv, IWL_STA_ID,
3128 (priv->band == IEEE80211_BAND_5GHZ) ?
3129 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3130 CMD_ASYNC);
3131 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3132
3133 iwl3945_send_beacon_cmd(priv);
3134
3135 break;
3136
3137 default:
3138 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3139 __func__, priv->iw_mode);
3140 break;
3141 }
3142
3143 /* we have just associated, don't start scan too early */
3144 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
3145 }
3146
3147 /*****************************************************************************
3148 *
3149 * mac80211 entry point functions
3150 *
3151 *****************************************************************************/
3152
3153 #define UCODE_READY_TIMEOUT (2 * HZ)
3154
3155 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3156 {
3157 struct iwl_priv *priv = hw->priv;
3158 int ret;
3159
3160 IWL_DEBUG_MAC80211(priv, "enter\n");
3161
3162 /* we should be verifying the device is ready to be opened */
3163 mutex_lock(&priv->mutex);
3164
3165 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3166 * ucode filename and max sizes are card-specific. */
3167
3168 if (!priv->ucode_code.len) {
3169 ret = iwl3945_read_ucode(priv);
3170 if (ret) {
3171 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3172 mutex_unlock(&priv->mutex);
3173 goto out_release_irq;
3174 }
3175 }
3176
3177 ret = __iwl3945_up(priv);
3178
3179 mutex_unlock(&priv->mutex);
3180
3181 if (ret)
3182 goto out_release_irq;
3183
3184 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3185
3186 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3187 * mac80211 will not be run successfully. */
3188 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3189 test_bit(STATUS_READY, &priv->status),
3190 UCODE_READY_TIMEOUT);
3191 if (!ret) {
3192 if (!test_bit(STATUS_READY, &priv->status)) {
3193 IWL_ERR(priv,
3194 "Wait for START_ALIVE timeout after %dms.\n",
3195 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3196 ret = -ETIMEDOUT;
3197 goto out_release_irq;
3198 }
3199 }
3200
3201 /* ucode is running and will send rfkill notifications,
3202 * no need to poll the killswitch state anymore */
3203 cancel_delayed_work(&priv->_3945.rfkill_poll);
3204
3205 iwl_led_start(priv);
3206
3207 priv->is_open = 1;
3208 IWL_DEBUG_MAC80211(priv, "leave\n");
3209 return 0;
3210
3211 out_release_irq:
3212 priv->is_open = 0;
3213 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3214 return ret;
3215 }
3216
3217 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3218 {
3219 struct iwl_priv *priv = hw->priv;
3220
3221 IWL_DEBUG_MAC80211(priv, "enter\n");
3222
3223 if (!priv->is_open) {
3224 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3225 return;
3226 }
3227
3228 priv->is_open = 0;
3229
3230 if (iwl_is_ready_rf(priv)) {
3231 /* stop mac, cancel any scan request and clear
3232 * RXON_FILTER_ASSOC_MSK BIT
3233 */
3234 mutex_lock(&priv->mutex);
3235 iwl_scan_cancel_timeout(priv, 100);
3236 mutex_unlock(&priv->mutex);
3237 }
3238
3239 iwl3945_down(priv);
3240
3241 flush_workqueue(priv->workqueue);
3242
3243 /* start polling the killswitch state again */
3244 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
3245 round_jiffies_relative(2 * HZ));
3246
3247 IWL_DEBUG_MAC80211(priv, "leave\n");
3248 }
3249
3250 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3251 {
3252 struct iwl_priv *priv = hw->priv;
3253
3254 IWL_DEBUG_MAC80211(priv, "enter\n");
3255
3256 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3257 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3258
3259 if (iwl3945_tx_skb(priv, skb))
3260 dev_kfree_skb_any(skb);
3261
3262 IWL_DEBUG_MAC80211(priv, "leave\n");
3263 return NETDEV_TX_OK;
3264 }
3265
3266 void iwl3945_config_ap(struct iwl_priv *priv)
3267 {
3268 int rc = 0;
3269
3270 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3271 return;
3272
3273 /* The following should be done only at AP bring up */
3274 if (!(iwl_is_associated(priv))) {
3275
3276 /* RXON - unassoc (to set timing command) */
3277 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3278 iwlcore_commit_rxon(priv);
3279
3280 /* RXON Timing */
3281 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3282 iwl_setup_rxon_timing(priv);
3283 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3284 sizeof(priv->rxon_timing),
3285 &priv->rxon_timing);
3286 if (rc)
3287 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3288 "Attempting to continue.\n");
3289
3290 /* FIXME: what should be the assoc_id for AP? */
3291 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3292 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3293 priv->staging_rxon.flags |=
3294 RXON_FLG_SHORT_PREAMBLE_MSK;
3295 else
3296 priv->staging_rxon.flags &=
3297 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3298
3299 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3300 if (priv->assoc_capability &
3301 WLAN_CAPABILITY_SHORT_SLOT_TIME)
3302 priv->staging_rxon.flags |=
3303 RXON_FLG_SHORT_SLOT_MSK;
3304 else
3305 priv->staging_rxon.flags &=
3306 ~RXON_FLG_SHORT_SLOT_MSK;
3307
3308 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3309 priv->staging_rxon.flags &=
3310 ~RXON_FLG_SHORT_SLOT_MSK;
3311 }
3312 /* restore RXON assoc */
3313 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3314 iwlcore_commit_rxon(priv);
3315 iwl_add_local_station(priv, iwl_bcast_addr, false);
3316 }
3317 iwl3945_send_beacon_cmd(priv);
3318
3319 /* FIXME - we need to add code here to detect a totally new
3320 * configuration, reset the AP, unassoc, rxon timing, assoc,
3321 * clear sta table, add BCAST sta... */
3322 }
3323
3324 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3325 struct ieee80211_vif *vif,
3326 struct ieee80211_sta *sta,
3327 struct ieee80211_key_conf *key)
3328 {
3329 struct iwl_priv *priv = hw->priv;
3330 const u8 *addr;
3331 int ret = 0;
3332 u8 sta_id = IWL_INVALID_STATION;
3333 u8 static_key;
3334
3335 IWL_DEBUG_MAC80211(priv, "enter\n");
3336
3337 if (iwl3945_mod_params.sw_crypto) {
3338 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3339 return -EOPNOTSUPP;
3340 }
3341
3342 addr = sta ? sta->addr : iwl_bcast_addr;
3343 static_key = !iwl_is_associated(priv);
3344
3345 if (!static_key) {
3346 sta_id = iwl_find_station(priv, addr);
3347 if (sta_id == IWL_INVALID_STATION) {
3348 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
3349 addr);
3350 return -EINVAL;
3351 }
3352 }
3353
3354 mutex_lock(&priv->mutex);
3355 iwl_scan_cancel_timeout(priv, 100);
3356
3357 switch (cmd) {
3358 case SET_KEY:
3359 if (static_key)
3360 ret = iwl3945_set_static_key(priv, key);
3361 else
3362 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3363 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3364 break;
3365 case DISABLE_KEY:
3366 if (static_key)
3367 ret = iwl3945_remove_static_key(priv);
3368 else
3369 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3370 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3371 break;
3372 default:
3373 ret = -EINVAL;
3374 }
3375
3376 mutex_unlock(&priv->mutex);
3377 IWL_DEBUG_MAC80211(priv, "leave\n");
3378
3379 return ret;
3380 }
3381
3382 static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
3383 struct ieee80211_vif *vif,
3384 struct ieee80211_sta *sta)
3385 {
3386 struct iwl_priv *priv = hw->priv;
3387 int ret;
3388 bool is_ap = priv->iw_mode == NL80211_IFTYPE_STATION;
3389 u8 sta_id;
3390
3391 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3392 sta->addr);
3393
3394 ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3395 &sta_id);
3396 if (ret) {
3397 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3398 sta->addr, ret);
3399 /* Should we return success if return code is EEXIST ? */
3400 return ret;
3401 }
3402
3403 /* Initialize rate scaling */
3404 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3405 sta->addr);
3406 iwl3945_rs_rate_init(priv, sta, sta_id);
3407
3408 return 0;
3409
3410
3411
3412 return ret;
3413 }
3414 /*****************************************************************************
3415 *
3416 * sysfs attributes
3417 *
3418 *****************************************************************************/
3419
3420 #ifdef CONFIG_IWLWIFI_DEBUG
3421
3422 /*
3423 * The following adds a new attribute to the sysfs representation
3424 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3425 * used for controlling the debug level.
3426 *
3427 * See the level definitions in iwl for details.
3428 *
3429 * The debug_level being managed using sysfs below is a per device debug
3430 * level that is used instead of the global debug level if it (the per
3431 * device debug level) is set.
3432 */
3433 static ssize_t show_debug_level(struct device *d,
3434 struct device_attribute *attr, char *buf)
3435 {
3436 struct iwl_priv *priv = dev_get_drvdata(d);
3437 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3438 }
3439 static ssize_t store_debug_level(struct device *d,
3440 struct device_attribute *attr,
3441 const char *buf, size_t count)
3442 {
3443 struct iwl_priv *priv = dev_get_drvdata(d);
3444 unsigned long val;
3445 int ret;
3446
3447 ret = strict_strtoul(buf, 0, &val);
3448 if (ret)
3449 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3450 else {
3451 priv->debug_level = val;
3452 if (iwl_alloc_traffic_mem(priv))
3453 IWL_ERR(priv,
3454 "Not enough memory to generate traffic log\n");
3455 }
3456 return strnlen(buf, count);
3457 }
3458
3459 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3460 show_debug_level, store_debug_level);
3461
3462 #endif /* CONFIG_IWLWIFI_DEBUG */
3463
3464 static ssize_t show_temperature(struct device *d,
3465 struct device_attribute *attr, char *buf)
3466 {
3467 struct iwl_priv *priv = dev_get_drvdata(d);
3468
3469 if (!iwl_is_alive(priv))
3470 return -EAGAIN;
3471
3472 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3473 }
3474
3475 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3476
3477 static ssize_t show_tx_power(struct device *d,
3478 struct device_attribute *attr, char *buf)
3479 {
3480 struct iwl_priv *priv = dev_get_drvdata(d);
3481 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3482 }
3483
3484 static ssize_t store_tx_power(struct device *d,
3485 struct device_attribute *attr,
3486 const char *buf, size_t count)
3487 {
3488 struct iwl_priv *priv = dev_get_drvdata(d);
3489 char *p = (char *)buf;
3490 u32 val;
3491
3492 val = simple_strtoul(p, &p, 10);
3493 if (p == buf)
3494 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3495 else
3496 iwl3945_hw_reg_set_txpower(priv, val);
3497
3498 return count;
3499 }
3500
3501 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3502
3503 static ssize_t show_flags(struct device *d,
3504 struct device_attribute *attr, char *buf)
3505 {
3506 struct iwl_priv *priv = dev_get_drvdata(d);
3507
3508 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3509 }
3510
3511 static ssize_t store_flags(struct device *d,
3512 struct device_attribute *attr,
3513 const char *buf, size_t count)
3514 {
3515 struct iwl_priv *priv = dev_get_drvdata(d);
3516 u32 flags = simple_strtoul(buf, NULL, 0);
3517
3518 mutex_lock(&priv->mutex);
3519 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3520 /* Cancel any currently running scans... */
3521 if (iwl_scan_cancel_timeout(priv, 100))
3522 IWL_WARN(priv, "Could not cancel scan.\n");
3523 else {
3524 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3525 flags);
3526 priv->staging_rxon.flags = cpu_to_le32(flags);
3527 iwlcore_commit_rxon(priv);
3528 }
3529 }
3530 mutex_unlock(&priv->mutex);
3531
3532 return count;
3533 }
3534
3535 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3536
3537 static ssize_t show_filter_flags(struct device *d,
3538 struct device_attribute *attr, char *buf)
3539 {
3540 struct iwl_priv *priv = dev_get_drvdata(d);
3541
3542 return sprintf(buf, "0x%04X\n",
3543 le32_to_cpu(priv->active_rxon.filter_flags));
3544 }
3545
3546 static ssize_t store_filter_flags(struct device *d,
3547 struct device_attribute *attr,
3548 const char *buf, size_t count)
3549 {
3550 struct iwl_priv *priv = dev_get_drvdata(d);
3551 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3552
3553 mutex_lock(&priv->mutex);
3554 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3555 /* Cancel any currently running scans... */
3556 if (iwl_scan_cancel_timeout(priv, 100))
3557 IWL_WARN(priv, "Could not cancel scan.\n");
3558 else {
3559 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3560 "0x%04X\n", filter_flags);
3561 priv->staging_rxon.filter_flags =
3562 cpu_to_le32(filter_flags);
3563 iwlcore_commit_rxon(priv);
3564 }
3565 }
3566 mutex_unlock(&priv->mutex);
3567
3568 return count;
3569 }
3570
3571 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3572 store_filter_flags);
3573
3574 static ssize_t show_measurement(struct device *d,
3575 struct device_attribute *attr, char *buf)
3576 {
3577 struct iwl_priv *priv = dev_get_drvdata(d);
3578 struct iwl_spectrum_notification measure_report;
3579 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3580 u8 *data = (u8 *)&measure_report;
3581 unsigned long flags;
3582
3583 spin_lock_irqsave(&priv->lock, flags);
3584 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3585 spin_unlock_irqrestore(&priv->lock, flags);
3586 return 0;
3587 }
3588 memcpy(&measure_report, &priv->measure_report, size);
3589 priv->measurement_status = 0;
3590 spin_unlock_irqrestore(&priv->lock, flags);
3591
3592 while (size && (PAGE_SIZE - len)) {
3593 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3594 PAGE_SIZE - len, 1);
3595 len = strlen(buf);
3596 if (PAGE_SIZE - len)
3597 buf[len++] = '\n';
3598
3599 ofs += 16;
3600 size -= min(size, 16U);
3601 }
3602
3603 return len;
3604 }
3605
3606 static ssize_t store_measurement(struct device *d,
3607 struct device_attribute *attr,
3608 const char *buf, size_t count)
3609 {
3610 struct iwl_priv *priv = dev_get_drvdata(d);
3611 struct ieee80211_measurement_params params = {
3612 .channel = le16_to_cpu(priv->active_rxon.channel),
3613 .start_time = cpu_to_le64(priv->_3945.last_tsf),
3614 .duration = cpu_to_le16(1),
3615 };
3616 u8 type = IWL_MEASURE_BASIC;
3617 u8 buffer[32];
3618 u8 channel;
3619
3620 if (count) {
3621 char *p = buffer;
3622 strncpy(buffer, buf, min(sizeof(buffer), count));
3623 channel = simple_strtoul(p, NULL, 0);
3624 if (channel)
3625 params.channel = channel;
3626
3627 p = buffer;
3628 while (*p && *p != ' ')
3629 p++;
3630 if (*p)
3631 type = simple_strtoul(p + 1, NULL, 0);
3632 }
3633
3634 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3635 "channel %d (for '%s')\n", type, params.channel, buf);
3636 iwl3945_get_measurement(priv, &params, type);
3637
3638 return count;
3639 }
3640
3641 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3642 show_measurement, store_measurement);
3643
3644 static ssize_t store_retry_rate(struct device *d,
3645 struct device_attribute *attr,
3646 const char *buf, size_t count)
3647 {
3648 struct iwl_priv *priv = dev_get_drvdata(d);
3649
3650 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3651 if (priv->retry_rate <= 0)
3652 priv->retry_rate = 1;
3653
3654 return count;
3655 }
3656
3657 static ssize_t show_retry_rate(struct device *d,
3658 struct device_attribute *attr, char *buf)
3659 {
3660 struct iwl_priv *priv = dev_get_drvdata(d);
3661 return sprintf(buf, "%d", priv->retry_rate);
3662 }
3663
3664 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3665 store_retry_rate);
3666
3667
3668 static ssize_t show_channels(struct device *d,
3669 struct device_attribute *attr, char *buf)
3670 {
3671 /* all this shit doesn't belong into sysfs anyway */
3672 return 0;
3673 }
3674
3675 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3676
3677 static ssize_t show_statistics(struct device *d,
3678 struct device_attribute *attr, char *buf)
3679 {
3680 struct iwl_priv *priv = dev_get_drvdata(d);
3681 u32 size = sizeof(struct iwl3945_notif_statistics);
3682 u32 len = 0, ofs = 0;
3683 u8 *data = (u8 *)&priv->_3945.statistics;
3684 int rc = 0;
3685
3686 if (!iwl_is_alive(priv))
3687 return -EAGAIN;
3688
3689 mutex_lock(&priv->mutex);
3690 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3691 mutex_unlock(&priv->mutex);
3692
3693 if (rc) {
3694 len = sprintf(buf,
3695 "Error sending statistics request: 0x%08X\n", rc);
3696 return len;
3697 }
3698
3699 while (size && (PAGE_SIZE - len)) {
3700 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3701 PAGE_SIZE - len, 1);
3702 len = strlen(buf);
3703 if (PAGE_SIZE - len)
3704 buf[len++] = '\n';
3705
3706 ofs += 16;
3707 size -= min(size, 16U);
3708 }
3709
3710 return len;
3711 }
3712
3713 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3714
3715 static ssize_t show_antenna(struct device *d,
3716 struct device_attribute *attr, char *buf)
3717 {
3718 struct iwl_priv *priv = dev_get_drvdata(d);
3719
3720 if (!iwl_is_alive(priv))
3721 return -EAGAIN;
3722
3723 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3724 }
3725
3726 static ssize_t store_antenna(struct device *d,
3727 struct device_attribute *attr,
3728 const char *buf, size_t count)
3729 {
3730 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3731 int ant;
3732
3733 if (count == 0)
3734 return 0;
3735
3736 if (sscanf(buf, "%1i", &ant) != 1) {
3737 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3738 return count;
3739 }
3740
3741 if ((ant >= 0) && (ant <= 2)) {
3742 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3743 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3744 } else
3745 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3746
3747
3748 return count;
3749 }
3750
3751 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3752
3753 static ssize_t show_status(struct device *d,
3754 struct device_attribute *attr, char *buf)
3755 {
3756 struct iwl_priv *priv = dev_get_drvdata(d);
3757 if (!iwl_is_alive(priv))
3758 return -EAGAIN;
3759 return sprintf(buf, "0x%08x\n", (int)priv->status);
3760 }
3761
3762 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3763
3764 static ssize_t dump_error_log(struct device *d,
3765 struct device_attribute *attr,
3766 const char *buf, size_t count)
3767 {
3768 struct iwl_priv *priv = dev_get_drvdata(d);
3769 char *p = (char *)buf;
3770
3771 if (p[0] == '1')
3772 iwl3945_dump_nic_error_log(priv);
3773
3774 return strnlen(buf, count);
3775 }
3776
3777 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3778
3779 /*****************************************************************************
3780 *
3781 * driver setup and tear down
3782 *
3783 *****************************************************************************/
3784
3785 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3786 {
3787 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3788
3789 init_waitqueue_head(&priv->wait_command_queue);
3790
3791 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3792 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3793 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3794 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3795 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3796 INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
3797 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3798 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
3799 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3800 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
3801
3802 iwl3945_hw_setup_deferred_work(priv);
3803
3804 if (priv->cfg->ops->lib->recover_from_tx_stall) {
3805 init_timer(&priv->monitor_recover);
3806 priv->monitor_recover.data = (unsigned long)priv;
3807 priv->monitor_recover.function =
3808 priv->cfg->ops->lib->recover_from_tx_stall;
3809 }
3810
3811 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3812 iwl3945_irq_tasklet, (unsigned long)priv);
3813 }
3814
3815 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3816 {
3817 iwl3945_hw_cancel_deferred_work(priv);
3818
3819 cancel_delayed_work_sync(&priv->init_alive_start);
3820 cancel_delayed_work(&priv->scan_check);
3821 cancel_delayed_work(&priv->alive_start);
3822 cancel_work_sync(&priv->beacon_update);
3823 if (priv->cfg->ops->lib->recover_from_tx_stall)
3824 del_timer_sync(&priv->monitor_recover);
3825 }
3826
3827 static struct attribute *iwl3945_sysfs_entries[] = {
3828 &dev_attr_antenna.attr,
3829 &dev_attr_channels.attr,
3830 &dev_attr_dump_errors.attr,
3831 &dev_attr_flags.attr,
3832 &dev_attr_filter_flags.attr,
3833 &dev_attr_measurement.attr,
3834 &dev_attr_retry_rate.attr,
3835 &dev_attr_statistics.attr,
3836 &dev_attr_status.attr,
3837 &dev_attr_temperature.attr,
3838 &dev_attr_tx_power.attr,
3839 #ifdef CONFIG_IWLWIFI_DEBUG
3840 &dev_attr_debug_level.attr,
3841 #endif
3842 NULL
3843 };
3844
3845 static struct attribute_group iwl3945_attribute_group = {
3846 .name = NULL, /* put in device directory */
3847 .attrs = iwl3945_sysfs_entries,
3848 };
3849
3850 static struct ieee80211_ops iwl3945_hw_ops = {
3851 .tx = iwl3945_mac_tx,
3852 .start = iwl3945_mac_start,
3853 .stop = iwl3945_mac_stop,
3854 .add_interface = iwl_mac_add_interface,
3855 .remove_interface = iwl_mac_remove_interface,
3856 .config = iwl_mac_config,
3857 .configure_filter = iwl_configure_filter,
3858 .set_key = iwl3945_mac_set_key,
3859 .conf_tx = iwl_mac_conf_tx,
3860 .reset_tsf = iwl_mac_reset_tsf,
3861 .bss_info_changed = iwl_bss_info_changed,
3862 .hw_scan = iwl_mac_hw_scan,
3863 .sta_add = iwl3945_mac_sta_add,
3864 .sta_remove = iwl_mac_sta_remove,
3865 };
3866
3867 static int iwl3945_init_drv(struct iwl_priv *priv)
3868 {
3869 int ret;
3870 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3871
3872 priv->retry_rate = 1;
3873 priv->ibss_beacon = NULL;
3874
3875 spin_lock_init(&priv->sta_lock);
3876 spin_lock_init(&priv->hcmd_lock);
3877
3878 INIT_LIST_HEAD(&priv->free_frames);
3879
3880 mutex_init(&priv->mutex);
3881 mutex_init(&priv->sync_cmd_mutex);
3882
3883 priv->ieee_channels = NULL;
3884 priv->ieee_rates = NULL;
3885 priv->band = IEEE80211_BAND_2GHZ;
3886
3887 priv->iw_mode = NL80211_IFTYPE_STATION;
3888 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3889
3890 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3891
3892 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3893 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3894 eeprom->version);
3895 ret = -EINVAL;
3896 goto err;
3897 }
3898 ret = iwl_init_channel_map(priv);
3899 if (ret) {
3900 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3901 goto err;
3902 }
3903
3904 /* Set up txpower settings in driver for all channels */
3905 if (iwl3945_txpower_set_from_eeprom(priv)) {
3906 ret = -EIO;
3907 goto err_free_channel_map;
3908 }
3909
3910 ret = iwlcore_init_geos(priv);
3911 if (ret) {
3912 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3913 goto err_free_channel_map;
3914 }
3915 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3916
3917 return 0;
3918
3919 err_free_channel_map:
3920 iwl_free_channel_map(priv);
3921 err:
3922 return ret;
3923 }
3924
3925 static int iwl3945_setup_mac(struct iwl_priv *priv)
3926 {
3927 int ret;
3928 struct ieee80211_hw *hw = priv->hw;
3929
3930 hw->rate_control_algorithm = "iwl-3945-rs";
3931 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3932
3933 /* Tell mac80211 our characteristics */
3934 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3935 IEEE80211_HW_NOISE_DBM |
3936 IEEE80211_HW_SPECTRUM_MGMT;
3937
3938 if (!priv->cfg->broken_powersave)
3939 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3940 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3941
3942 hw->wiphy->interface_modes =
3943 BIT(NL80211_IFTYPE_STATION) |
3944 BIT(NL80211_IFTYPE_ADHOC);
3945
3946 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3947 WIPHY_FLAG_DISABLE_BEACON_HINTS;
3948
3949 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3950 /* we create the 802.11 header and a zero-length SSID element */
3951 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
3952
3953 /* Default value; 4 EDCA QOS priorities */
3954 hw->queues = 4;
3955
3956 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3957 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3958 &priv->bands[IEEE80211_BAND_2GHZ];
3959
3960 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3961 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3962 &priv->bands[IEEE80211_BAND_5GHZ];
3963
3964 ret = ieee80211_register_hw(priv->hw);
3965 if (ret) {
3966 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3967 return ret;
3968 }
3969 priv->mac80211_registered = 1;
3970
3971 return 0;
3972 }
3973
3974 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3975 {
3976 int err = 0;
3977 struct iwl_priv *priv;
3978 struct ieee80211_hw *hw;
3979 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3980 struct iwl3945_eeprom *eeprom;
3981 unsigned long flags;
3982
3983 /***********************
3984 * 1. Allocating HW data
3985 * ********************/
3986
3987 /* mac80211 allocates memory for this device instance, including
3988 * space for this driver's private structure */
3989 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
3990 if (hw == NULL) {
3991 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
3992 err = -ENOMEM;
3993 goto out;
3994 }
3995 priv = hw->priv;
3996 SET_IEEE80211_DEV(hw, &pdev->dev);
3997
3998 /*
3999 * Disabling hardware scan means that mac80211 will perform scans
4000 * "the hard way", rather than using device's scan.
4001 */
4002 if (iwl3945_mod_params.disable_hw_scan) {
4003 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
4004 iwl3945_hw_ops.hw_scan = NULL;
4005 }
4006
4007
4008 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4009 priv->cfg = cfg;
4010 priv->pci_dev = pdev;
4011 priv->inta_mask = CSR_INI_SET_MASK;
4012
4013 #ifdef CONFIG_IWLWIFI_DEBUG
4014 atomic_set(&priv->restrict_refcnt, 0);
4015 #endif
4016 if (iwl_alloc_traffic_mem(priv))
4017 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4018
4019 /***************************
4020 * 2. Initializing PCI bus
4021 * *************************/
4022 if (pci_enable_device(pdev)) {
4023 err = -ENODEV;
4024 goto out_ieee80211_free_hw;
4025 }
4026
4027 pci_set_master(pdev);
4028
4029 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4030 if (!err)
4031 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4032 if (err) {
4033 IWL_WARN(priv, "No suitable DMA available.\n");
4034 goto out_pci_disable_device;
4035 }
4036
4037 pci_set_drvdata(pdev, priv);
4038 err = pci_request_regions(pdev, DRV_NAME);
4039 if (err)
4040 goto out_pci_disable_device;
4041
4042 /***********************
4043 * 3. Read REV Register
4044 * ********************/
4045 priv->hw_base = pci_iomap(pdev, 0, 0);
4046 if (!priv->hw_base) {
4047 err = -ENODEV;
4048 goto out_pci_release_regions;
4049 }
4050
4051 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4052 (unsigned long long) pci_resource_len(pdev, 0));
4053 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4054
4055 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4056 * PCI Tx retries from interfering with C3 CPU state */
4057 pci_write_config_byte(pdev, 0x41, 0x00);
4058
4059 /* these spin locks will be used in apm_ops.init and EEPROM access
4060 * we should init now
4061 */
4062 spin_lock_init(&priv->reg_lock);
4063 spin_lock_init(&priv->lock);
4064
4065 /*
4066 * stop and reset the on-board processor just in case it is in a
4067 * strange state ... like being left stranded by a primary kernel
4068 * and this is now the kdump kernel trying to start up
4069 */
4070 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4071
4072 /***********************
4073 * 4. Read EEPROM
4074 * ********************/
4075
4076 /* Read the EEPROM */
4077 err = iwl_eeprom_init(priv);
4078 if (err) {
4079 IWL_ERR(priv, "Unable to init EEPROM\n");
4080 goto out_iounmap;
4081 }
4082 /* MAC Address location in EEPROM same for 3945/4965 */
4083 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4084 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
4085 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
4086 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4087
4088 /***********************
4089 * 5. Setup HW Constants
4090 * ********************/
4091 /* Device-specific setup */
4092 if (iwl3945_hw_set_hw_params(priv)) {
4093 IWL_ERR(priv, "failed to set hw settings\n");
4094 goto out_eeprom_free;
4095 }
4096
4097 /***********************
4098 * 6. Setup priv
4099 * ********************/
4100
4101 err = iwl3945_init_drv(priv);
4102 if (err) {
4103 IWL_ERR(priv, "initializing driver failed\n");
4104 goto out_unset_hw_params;
4105 }
4106
4107 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4108 priv->cfg->name);
4109
4110 /***********************
4111 * 7. Setup Services
4112 * ********************/
4113
4114 spin_lock_irqsave(&priv->lock, flags);
4115 iwl_disable_interrupts(priv);
4116 spin_unlock_irqrestore(&priv->lock, flags);
4117
4118 pci_enable_msi(priv->pci_dev);
4119
4120 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4121 IRQF_SHARED, DRV_NAME, priv);
4122 if (err) {
4123 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4124 goto out_disable_msi;
4125 }
4126
4127 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4128 if (err) {
4129 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4130 goto out_release_irq;
4131 }
4132
4133 iwl_set_rxon_channel(priv,
4134 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4135 iwl3945_setup_deferred_work(priv);
4136 iwl3945_setup_rx_handlers(priv);
4137 iwl_power_initialize(priv);
4138
4139 /*********************************
4140 * 8. Setup and Register mac80211
4141 * *******************************/
4142
4143 iwl_enable_interrupts(priv);
4144
4145 err = iwl3945_setup_mac(priv);
4146 if (err)
4147 goto out_remove_sysfs;
4148
4149 err = iwl_dbgfs_register(priv, DRV_NAME);
4150 if (err)
4151 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4152
4153 /* Start monitoring the killswitch */
4154 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
4155 2 * HZ);
4156
4157 return 0;
4158
4159 out_remove_sysfs:
4160 destroy_workqueue(priv->workqueue);
4161 priv->workqueue = NULL;
4162 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4163 out_release_irq:
4164 free_irq(priv->pci_dev->irq, priv);
4165 out_disable_msi:
4166 pci_disable_msi(priv->pci_dev);
4167 iwlcore_free_geos(priv);
4168 iwl_free_channel_map(priv);
4169 out_unset_hw_params:
4170 iwl3945_unset_hw_params(priv);
4171 out_eeprom_free:
4172 iwl_eeprom_free(priv);
4173 out_iounmap:
4174 pci_iounmap(pdev, priv->hw_base);
4175 out_pci_release_regions:
4176 pci_release_regions(pdev);
4177 out_pci_disable_device:
4178 pci_set_drvdata(pdev, NULL);
4179 pci_disable_device(pdev);
4180 out_ieee80211_free_hw:
4181 iwl_free_traffic_mem(priv);
4182 ieee80211_free_hw(priv->hw);
4183 out:
4184 return err;
4185 }
4186
4187 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4188 {
4189 struct iwl_priv *priv = pci_get_drvdata(pdev);
4190 unsigned long flags;
4191
4192 if (!priv)
4193 return;
4194
4195 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4196
4197 iwl_dbgfs_unregister(priv);
4198
4199 set_bit(STATUS_EXIT_PENDING, &priv->status);
4200
4201 if (priv->mac80211_registered) {
4202 ieee80211_unregister_hw(priv->hw);
4203 priv->mac80211_registered = 0;
4204 } else {
4205 iwl3945_down(priv);
4206 }
4207
4208 /*
4209 * Make sure device is reset to low power before unloading driver.
4210 * This may be redundant with iwl_down(), but there are paths to
4211 * run iwl_down() without calling apm_ops.stop(), and there are
4212 * paths to avoid running iwl_down() at all before leaving driver.
4213 * This (inexpensive) call *makes sure* device is reset.
4214 */
4215 priv->cfg->ops->lib->apm_ops.stop(priv);
4216
4217 /* make sure we flush any pending irq or
4218 * tasklet for the driver
4219 */
4220 spin_lock_irqsave(&priv->lock, flags);
4221 iwl_disable_interrupts(priv);
4222 spin_unlock_irqrestore(&priv->lock, flags);
4223
4224 iwl_synchronize_irq(priv);
4225
4226 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4227
4228 cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
4229
4230 iwl3945_dealloc_ucode_pci(priv);
4231
4232 if (priv->rxq.bd)
4233 iwl3945_rx_queue_free(priv, &priv->rxq);
4234 iwl3945_hw_txq_ctx_free(priv);
4235
4236 iwl3945_unset_hw_params(priv);
4237
4238 /*netif_stop_queue(dev); */
4239 flush_workqueue(priv->workqueue);
4240
4241 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4242 * priv->workqueue... so we can't take down the workqueue
4243 * until now... */
4244 destroy_workqueue(priv->workqueue);
4245 priv->workqueue = NULL;
4246 iwl_free_traffic_mem(priv);
4247
4248 free_irq(pdev->irq, priv);
4249 pci_disable_msi(pdev);
4250
4251 pci_iounmap(pdev, priv->hw_base);
4252 pci_release_regions(pdev);
4253 pci_disable_device(pdev);
4254 pci_set_drvdata(pdev, NULL);
4255
4256 iwl_free_channel_map(priv);
4257 iwlcore_free_geos(priv);
4258 kfree(priv->scan);
4259 if (priv->ibss_beacon)
4260 dev_kfree_skb(priv->ibss_beacon);
4261
4262 ieee80211_free_hw(priv->hw);
4263 }
4264
4265
4266 /*****************************************************************************
4267 *
4268 * driver and module entry point
4269 *
4270 *****************************************************************************/
4271
4272 static struct pci_driver iwl3945_driver = {
4273 .name = DRV_NAME,
4274 .id_table = iwl3945_hw_card_ids,
4275 .probe = iwl3945_pci_probe,
4276 .remove = __devexit_p(iwl3945_pci_remove),
4277 #ifdef CONFIG_PM
4278 .suspend = iwl_pci_suspend,
4279 .resume = iwl_pci_resume,
4280 #endif
4281 };
4282
4283 static int __init iwl3945_init(void)
4284 {
4285
4286 int ret;
4287 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4288 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4289
4290 ret = iwl3945_rate_control_register();
4291 if (ret) {
4292 printk(KERN_ERR DRV_NAME
4293 "Unable to register rate control algorithm: %d\n", ret);
4294 return ret;
4295 }
4296
4297 ret = pci_register_driver(&iwl3945_driver);
4298 if (ret) {
4299 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4300 goto error_register;
4301 }
4302
4303 return ret;
4304
4305 error_register:
4306 iwl3945_rate_control_unregister();
4307 return ret;
4308 }
4309
4310 static void __exit iwl3945_exit(void)
4311 {
4312 pci_unregister_driver(&iwl3945_driver);
4313 iwl3945_rate_control_unregister();
4314 }
4315
4316 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4317
4318 module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
4319 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4320 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
4321 MODULE_PARM_DESC(swcrypto,
4322 "using software crypto (default 1 [software])\n");
4323 #ifdef CONFIG_IWLWIFI_DEBUG
4324 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4325 MODULE_PARM_DESC(debug, "debug output mask");
4326 #endif
4327 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
4328 int, S_IRUGO);
4329 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4330 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
4331 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4332
4333 module_exit(iwl3945_exit);
4334 module_init(iwl3945_init);
Linux kernel - Deliverables
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