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iwlwifi: use virtual interface address for scan
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/slab.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/sched.h>
38 #include <linux/skbuff.h>
39 #include <linux/netdevice.h>
40 #include <linux/wireless.h>
41 #include <linux/firmware.h>
42 #include <linux/etherdevice.h>
43 #include <linux/if_arp.h>
44
45 #include <net/ieee80211_radiotap.h>
46 #include <net/mac80211.h>
47
48 #include <asm/div64.h>
49
50 #define DRV_NAME "iwl3945"
51
52 #include "iwl-fh.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-commands.h"
55 #include "iwl-sta.h"
56 #include "iwl-3945.h"
57 #include "iwl-core.h"
58 #include "iwl-helpers.h"
59 #include "iwl-dev.h"
60 #include "iwl-spectrum.h"
61
62 /*
63 * module name, copyright, version, etc.
64 */
65
66 #define DRV_DESCRIPTION \
67 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 /*
76 * add "s" to indicate spectrum measurement included.
77 * we add it here to be consistent with previous releases in which
78 * this was configurable.
79 */
80 #define DRV_VERSION IWLWIFI_VERSION VD "s"
81 #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
82 #define DRV_AUTHOR "<ilw@linux.intel.com>"
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88
89 /* module parameters */
90 struct iwl_mod_params iwl3945_mod_params = {
91 .sw_crypto = 1,
92 .restart_fw = 1,
93 /* the rest are 0 by default */
94 };
95
96 /**
97 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
98 * @priv: eeprom and antenna fields are used to determine antenna flags
99 *
100 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
101 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
102 *
103 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
104 * IWL_ANTENNA_MAIN - Force MAIN antenna
105 * IWL_ANTENNA_AUX - Force AUX antenna
106 */
107 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
108 {
109 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
110
111 switch (iwl3945_mod_params.antenna) {
112 case IWL_ANTENNA_DIVERSITY:
113 return 0;
114
115 case IWL_ANTENNA_MAIN:
116 if (eeprom->antenna_switch_type)
117 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
118 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
119
120 case IWL_ANTENNA_AUX:
121 if (eeprom->antenna_switch_type)
122 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
123 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
124 }
125
126 /* bad antenna selector value */
127 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
128 iwl3945_mod_params.antenna);
129
130 return 0; /* "diversity" is default if error */
131 }
132
133 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
134 struct ieee80211_key_conf *keyconf,
135 u8 sta_id)
136 {
137 unsigned long flags;
138 __le16 key_flags = 0;
139 int ret;
140
141 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
142 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
143
144 if (sta_id == priv->hw_params.bcast_sta_id)
145 key_flags |= STA_KEY_MULTICAST_MSK;
146
147 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
148 keyconf->hw_key_idx = keyconf->keyidx;
149 key_flags &= ~STA_KEY_FLG_INVALID;
150
151 spin_lock_irqsave(&priv->sta_lock, flags);
152 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
153 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
154 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
155 keyconf->keylen);
156
157 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
158 keyconf->keylen);
159
160 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
161 == STA_KEY_FLG_NO_ENC)
162 priv->stations[sta_id].sta.key.key_offset =
163 iwl_get_free_ucode_key_index(priv);
164 /* else, we are overriding an existing key => no need to allocated room
165 * in uCode. */
166
167 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
168 "no space for a new key");
169
170 priv->stations[sta_id].sta.key.key_flags = key_flags;
171 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
172 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
173
174 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
175
176 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
177
178 spin_unlock_irqrestore(&priv->sta_lock, flags);
179
180 return ret;
181 }
182
183 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
184 struct ieee80211_key_conf *keyconf,
185 u8 sta_id)
186 {
187 return -EOPNOTSUPP;
188 }
189
190 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
191 struct ieee80211_key_conf *keyconf,
192 u8 sta_id)
193 {
194 return -EOPNOTSUPP;
195 }
196
197 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
198 {
199 unsigned long flags;
200 struct iwl_addsta_cmd sta_cmd;
201
202 spin_lock_irqsave(&priv->sta_lock, flags);
203 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
204 memset(&priv->stations[sta_id].sta.key, 0,
205 sizeof(struct iwl4965_keyinfo));
206 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
207 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
208 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
209 memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
210 spin_unlock_irqrestore(&priv->sta_lock, flags);
211
212 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
213 return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
214 }
215
216 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
217 struct ieee80211_key_conf *keyconf, u8 sta_id)
218 {
219 int ret = 0;
220
221 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
222
223 switch (keyconf->alg) {
224 case ALG_CCMP:
225 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
226 break;
227 case ALG_TKIP:
228 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
229 break;
230 case ALG_WEP:
231 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
232 break;
233 default:
234 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
235 ret = -EINVAL;
236 }
237
238 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
239 keyconf->alg, keyconf->keylen, keyconf->keyidx,
240 sta_id, ret);
241
242 return ret;
243 }
244
245 static int iwl3945_remove_static_key(struct iwl_priv *priv)
246 {
247 int ret = -EOPNOTSUPP;
248
249 return ret;
250 }
251
252 static int iwl3945_set_static_key(struct iwl_priv *priv,
253 struct ieee80211_key_conf *key)
254 {
255 if (key->alg == ALG_WEP)
256 return -EOPNOTSUPP;
257
258 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
259 return -EINVAL;
260 }
261
262 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
263 {
264 struct list_head *element;
265
266 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
267 priv->frames_count);
268
269 while (!list_empty(&priv->free_frames)) {
270 element = priv->free_frames.next;
271 list_del(element);
272 kfree(list_entry(element, struct iwl3945_frame, list));
273 priv->frames_count--;
274 }
275
276 if (priv->frames_count) {
277 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
278 priv->frames_count);
279 priv->frames_count = 0;
280 }
281 }
282
283 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
284 {
285 struct iwl3945_frame *frame;
286 struct list_head *element;
287 if (list_empty(&priv->free_frames)) {
288 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
289 if (!frame) {
290 IWL_ERR(priv, "Could not allocate frame!\n");
291 return NULL;
292 }
293
294 priv->frames_count++;
295 return frame;
296 }
297
298 element = priv->free_frames.next;
299 list_del(element);
300 return list_entry(element, struct iwl3945_frame, list);
301 }
302
303 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
304 {
305 memset(frame, 0, sizeof(*frame));
306 list_add(&frame->list, &priv->free_frames);
307 }
308
309 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
310 struct ieee80211_hdr *hdr,
311 int left)
312 {
313
314 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
315 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
316 (priv->iw_mode != NL80211_IFTYPE_AP)))
317 return 0;
318
319 if (priv->ibss_beacon->len > left)
320 return 0;
321
322 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
323
324 return priv->ibss_beacon->len;
325 }
326
327 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
328 {
329 struct iwl3945_frame *frame;
330 unsigned int frame_size;
331 int rc;
332 u8 rate;
333
334 frame = iwl3945_get_free_frame(priv);
335
336 if (!frame) {
337 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
338 "command.\n");
339 return -ENOMEM;
340 }
341
342 rate = iwl_rate_get_lowest_plcp(priv);
343
344 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
345
346 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
347 &frame->u.cmd[0]);
348
349 iwl3945_free_frame(priv, frame);
350
351 return rc;
352 }
353
354 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
355 {
356 if (priv->_3945.shared_virt)
357 dma_free_coherent(&priv->pci_dev->dev,
358 sizeof(struct iwl3945_shared),
359 priv->_3945.shared_virt,
360 priv->_3945.shared_phys);
361 }
362
363 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
364 struct ieee80211_tx_info *info,
365 struct iwl_device_cmd *cmd,
366 struct sk_buff *skb_frag,
367 int sta_id)
368 {
369 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
370 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
371
372 switch (keyinfo->alg) {
373 case ALG_CCMP:
374 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
375 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
376 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
377 break;
378
379 case ALG_TKIP:
380 break;
381
382 case ALG_WEP:
383 tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
384 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
385
386 if (keyinfo->keylen == 13)
387 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
388
389 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
390
391 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
392 "with key %d\n", info->control.hw_key->hw_key_idx);
393 break;
394
395 default:
396 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
397 break;
398 }
399 }
400
401 /*
402 * handle build REPLY_TX command notification.
403 */
404 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
405 struct iwl_device_cmd *cmd,
406 struct ieee80211_tx_info *info,
407 struct ieee80211_hdr *hdr, u8 std_id)
408 {
409 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
410 __le32 tx_flags = tx_cmd->tx_flags;
411 __le16 fc = hdr->frame_control;
412
413 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
414 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
415 tx_flags |= TX_CMD_FLG_ACK_MSK;
416 if (ieee80211_is_mgmt(fc))
417 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
418 if (ieee80211_is_probe_resp(fc) &&
419 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
420 tx_flags |= TX_CMD_FLG_TSF_MSK;
421 } else {
422 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
423 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
424 }
425
426 tx_cmd->sta_id = std_id;
427 if (ieee80211_has_morefrags(fc))
428 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
429
430 if (ieee80211_is_data_qos(fc)) {
431 u8 *qc = ieee80211_get_qos_ctl(hdr);
432 tx_cmd->tid_tspec = qc[0] & 0xf;
433 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
434 } else {
435 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
436 }
437
438 priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
439
440 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
441 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
442
443 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
444 if (ieee80211_is_mgmt(fc)) {
445 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
446 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
447 else
448 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
449 } else {
450 tx_cmd->timeout.pm_frame_timeout = 0;
451 }
452
453 tx_cmd->driver_txop = 0;
454 tx_cmd->tx_flags = tx_flags;
455 tx_cmd->next_frame_len = 0;
456 }
457
458 /*
459 * start REPLY_TX command process
460 */
461 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
462 {
463 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
464 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
465 struct iwl3945_tx_cmd *tx_cmd;
466 struct iwl_tx_queue *txq = NULL;
467 struct iwl_queue *q = NULL;
468 struct iwl_device_cmd *out_cmd;
469 struct iwl_cmd_meta *out_meta;
470 dma_addr_t phys_addr;
471 dma_addr_t txcmd_phys;
472 int txq_id = skb_get_queue_mapping(skb);
473 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
474 u8 id;
475 u8 unicast;
476 u8 sta_id;
477 u8 tid = 0;
478 __le16 fc;
479 u8 wait_write_ptr = 0;
480 unsigned long flags;
481
482 spin_lock_irqsave(&priv->lock, flags);
483 if (iwl_is_rfkill(priv)) {
484 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
485 goto drop_unlock;
486 }
487
488 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
489 IWL_ERR(priv, "ERROR: No TX rate available.\n");
490 goto drop_unlock;
491 }
492
493 unicast = !is_multicast_ether_addr(hdr->addr1);
494 id = 0;
495
496 fc = hdr->frame_control;
497
498 #ifdef CONFIG_IWLWIFI_DEBUG
499 if (ieee80211_is_auth(fc))
500 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
501 else if (ieee80211_is_assoc_req(fc))
502 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
503 else if (ieee80211_is_reassoc_req(fc))
504 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
505 #endif
506
507 spin_unlock_irqrestore(&priv->lock, flags);
508
509 hdr_len = ieee80211_hdrlen(fc);
510
511 /* Find index into station table for destination station */
512 sta_id = iwl_sta_id_or_broadcast(priv, info->control.sta);
513 if (sta_id == IWL_INVALID_STATION) {
514 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
515 hdr->addr1);
516 goto drop;
517 }
518
519 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
520
521 if (ieee80211_is_data_qos(fc)) {
522 u8 *qc = ieee80211_get_qos_ctl(hdr);
523 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
524 if (unlikely(tid >= MAX_TID_COUNT))
525 goto drop;
526 }
527
528 /* Descriptor for chosen Tx queue */
529 txq = &priv->txq[txq_id];
530 q = &txq->q;
531
532 if ((iwl_queue_space(q) < q->high_mark))
533 goto drop;
534
535 spin_lock_irqsave(&priv->lock, flags);
536
537 idx = get_cmd_index(q, q->write_ptr, 0);
538
539 /* Set up driver data for this TFD */
540 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
541 txq->txb[q->write_ptr].skb[0] = skb;
542
543 /* Init first empty entry in queue's array of Tx/cmd buffers */
544 out_cmd = txq->cmd[idx];
545 out_meta = &txq->meta[idx];
546 tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
547 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
548 memset(tx_cmd, 0, sizeof(*tx_cmd));
549
550 /*
551 * Set up the Tx-command (not MAC!) header.
552 * Store the chosen Tx queue and TFD index within the sequence field;
553 * after Tx, uCode's Tx response will return this value so driver can
554 * locate the frame within the tx queue and do post-tx processing.
555 */
556 out_cmd->hdr.cmd = REPLY_TX;
557 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
558 INDEX_TO_SEQ(q->write_ptr)));
559
560 /* Copy MAC header from skb into command buffer */
561 memcpy(tx_cmd->hdr, hdr, hdr_len);
562
563
564 if (info->control.hw_key)
565 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
566
567 /* TODO need this for burst mode later on */
568 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
569
570 /* set is_hcca to 0; it probably will never be implemented */
571 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
572
573 /* Total # bytes to be transmitted */
574 len = (u16)skb->len;
575 tx_cmd->len = cpu_to_le16(len);
576
577 iwl_dbg_log_tx_data_frame(priv, len, hdr);
578 iwl_update_stats(priv, true, fc, len);
579 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
580 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
581
582 if (!ieee80211_has_morefrags(hdr->frame_control)) {
583 txq->need_update = 1;
584 } else {
585 wait_write_ptr = 1;
586 txq->need_update = 0;
587 }
588
589 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
590 le16_to_cpu(out_cmd->hdr.sequence));
591 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
592 iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
593 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
594 ieee80211_hdrlen(fc));
595
596 /*
597 * Use the first empty entry in this queue's command buffer array
598 * to contain the Tx command and MAC header concatenated together
599 * (payload data will be in another buffer).
600 * Size of this varies, due to varying MAC header length.
601 * If end is not dword aligned, we'll have 2 extra bytes at the end
602 * of the MAC header (device reads on dword boundaries).
603 * We'll tell device about this padding later.
604 */
605 len = sizeof(struct iwl3945_tx_cmd) +
606 sizeof(struct iwl_cmd_header) + hdr_len;
607
608 len_org = len;
609 len = (len + 3) & ~3;
610
611 if (len_org != len)
612 len_org = 1;
613 else
614 len_org = 0;
615
616 /* Physical address of this Tx command's header (not MAC header!),
617 * within command buffer array. */
618 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
619 len, PCI_DMA_TODEVICE);
620 /* we do not map meta data ... so we can safely access address to
621 * provide to unmap command*/
622 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
623 dma_unmap_len_set(out_meta, len, len);
624
625 /* Add buffer containing Tx command and MAC(!) header to TFD's
626 * first entry */
627 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
628 txcmd_phys, len, 1, 0);
629
630
631 /* Set up TFD's 2nd entry to point directly to remainder of skb,
632 * if any (802.11 null frames have no payload). */
633 len = skb->len - hdr_len;
634 if (len) {
635 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
636 len, PCI_DMA_TODEVICE);
637 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
638 phys_addr, len,
639 0, U32_PAD(len));
640 }
641
642
643 /* Tell device the write index *just past* this latest filled TFD */
644 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
645 iwl_txq_update_write_ptr(priv, txq);
646 spin_unlock_irqrestore(&priv->lock, flags);
647
648 if ((iwl_queue_space(q) < q->high_mark)
649 && priv->mac80211_registered) {
650 if (wait_write_ptr) {
651 spin_lock_irqsave(&priv->lock, flags);
652 txq->need_update = 1;
653 iwl_txq_update_write_ptr(priv, txq);
654 spin_unlock_irqrestore(&priv->lock, flags);
655 }
656
657 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
658 }
659
660 return 0;
661
662 drop_unlock:
663 spin_unlock_irqrestore(&priv->lock, flags);
664 drop:
665 return -1;
666 }
667
668 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
669 #define BEACON_TIME_MASK_HIGH 0xFF000000
670 #define TIME_UNIT 1024
671
672 /*
673 * extended beacon time format
674 * time in usec will be changed into a 32-bit value in 8:24 format
675 * the high 1 byte is the beacon counts
676 * the lower 3 bytes is the time in usec within one beacon interval
677 */
678
679 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
680 {
681 u32 quot;
682 u32 rem;
683 u32 interval = beacon_interval * 1024;
684
685 if (!interval || !usec)
686 return 0;
687
688 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
689 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
690
691 return (quot << 24) + rem;
692 }
693
694 /* base is usually what we get from ucode with each received frame,
695 * the same as HW timer counter counting down
696 */
697
698 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
699 {
700 u32 base_low = base & BEACON_TIME_MASK_LOW;
701 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
702 u32 interval = beacon_interval * TIME_UNIT;
703 u32 res = (base & BEACON_TIME_MASK_HIGH) +
704 (addon & BEACON_TIME_MASK_HIGH);
705
706 if (base_low > addon_low)
707 res += base_low - addon_low;
708 else if (base_low < addon_low) {
709 res += interval + base_low - addon_low;
710 res += (1 << 24);
711 } else
712 res += (1 << 24);
713
714 return cpu_to_le32(res);
715 }
716
717 static int iwl3945_get_measurement(struct iwl_priv *priv,
718 struct ieee80211_measurement_params *params,
719 u8 type)
720 {
721 struct iwl_spectrum_cmd spectrum;
722 struct iwl_rx_packet *pkt;
723 struct iwl_host_cmd cmd = {
724 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
725 .data = (void *)&spectrum,
726 .flags = CMD_WANT_SKB,
727 };
728 u32 add_time = le64_to_cpu(params->start_time);
729 int rc;
730 int spectrum_resp_status;
731 int duration = le16_to_cpu(params->duration);
732
733 if (iwl_is_associated(priv))
734 add_time =
735 iwl3945_usecs_to_beacons(
736 le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
737 le16_to_cpu(priv->rxon_timing.beacon_interval));
738
739 memset(&spectrum, 0, sizeof(spectrum));
740
741 spectrum.channel_count = cpu_to_le16(1);
742 spectrum.flags =
743 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
744 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
745 cmd.len = sizeof(spectrum);
746 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
747
748 if (iwl_is_associated(priv))
749 spectrum.start_time =
750 iwl3945_add_beacon_time(priv->_3945.last_beacon_time,
751 add_time,
752 le16_to_cpu(priv->rxon_timing.beacon_interval));
753 else
754 spectrum.start_time = 0;
755
756 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
757 spectrum.channels[0].channel = params->channel;
758 spectrum.channels[0].type = type;
759 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
760 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
761 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
762
763 rc = iwl_send_cmd_sync(priv, &cmd);
764 if (rc)
765 return rc;
766
767 pkt = (struct iwl_rx_packet *)cmd.reply_page;
768 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
769 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
770 rc = -EIO;
771 }
772
773 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
774 switch (spectrum_resp_status) {
775 case 0: /* Command will be handled */
776 if (pkt->u.spectrum.id != 0xff) {
777 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
778 pkt->u.spectrum.id);
779 priv->measurement_status &= ~MEASUREMENT_READY;
780 }
781 priv->measurement_status |= MEASUREMENT_ACTIVE;
782 rc = 0;
783 break;
784
785 case 1: /* Command will not be handled */
786 rc = -EAGAIN;
787 break;
788 }
789
790 iwl_free_pages(priv, cmd.reply_page);
791
792 return rc;
793 }
794
795 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
796 struct iwl_rx_mem_buffer *rxb)
797 {
798 struct iwl_rx_packet *pkt = rxb_addr(rxb);
799 struct iwl_alive_resp *palive;
800 struct delayed_work *pwork;
801
802 palive = &pkt->u.alive_frame;
803
804 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
805 "0x%01X 0x%01X\n",
806 palive->is_valid, palive->ver_type,
807 palive->ver_subtype);
808
809 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
810 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
811 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
812 sizeof(struct iwl_alive_resp));
813 pwork = &priv->init_alive_start;
814 } else {
815 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
816 memcpy(&priv->card_alive, &pkt->u.alive_frame,
817 sizeof(struct iwl_alive_resp));
818 pwork = &priv->alive_start;
819 iwl3945_disable_events(priv);
820 }
821
822 /* We delay the ALIVE response by 5ms to
823 * give the HW RF Kill time to activate... */
824 if (palive->is_valid == UCODE_VALID_OK)
825 queue_delayed_work(priv->workqueue, pwork,
826 msecs_to_jiffies(5));
827 else
828 IWL_WARN(priv, "uCode did not respond OK.\n");
829 }
830
831 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
832 struct iwl_rx_mem_buffer *rxb)
833 {
834 #ifdef CONFIG_IWLWIFI_DEBUG
835 struct iwl_rx_packet *pkt = rxb_addr(rxb);
836 #endif
837
838 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
839 }
840
841 static void iwl3945_bg_beacon_update(struct work_struct *work)
842 {
843 struct iwl_priv *priv =
844 container_of(work, struct iwl_priv, beacon_update);
845 struct sk_buff *beacon;
846
847 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
848 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
849
850 if (!beacon) {
851 IWL_ERR(priv, "update beacon failed\n");
852 return;
853 }
854
855 mutex_lock(&priv->mutex);
856 /* new beacon skb is allocated every time; dispose previous.*/
857 if (priv->ibss_beacon)
858 dev_kfree_skb(priv->ibss_beacon);
859
860 priv->ibss_beacon = beacon;
861 mutex_unlock(&priv->mutex);
862
863 iwl3945_send_beacon_cmd(priv);
864 }
865
866 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
867 struct iwl_rx_mem_buffer *rxb)
868 {
869 #ifdef CONFIG_IWLWIFI_DEBUG
870 struct iwl_rx_packet *pkt = rxb_addr(rxb);
871 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
872 u8 rate = beacon->beacon_notify_hdr.rate;
873
874 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
875 "tsf %d %d rate %d\n",
876 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
877 beacon->beacon_notify_hdr.failure_frame,
878 le32_to_cpu(beacon->ibss_mgr_status),
879 le32_to_cpu(beacon->high_tsf),
880 le32_to_cpu(beacon->low_tsf), rate);
881 #endif
882
883 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
884 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
885 queue_work(priv->workqueue, &priv->beacon_update);
886 }
887
888 /* Handle notification from uCode that card's power state is changing
889 * due to software, hardware, or critical temperature RFKILL */
890 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
891 struct iwl_rx_mem_buffer *rxb)
892 {
893 struct iwl_rx_packet *pkt = rxb_addr(rxb);
894 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
895 unsigned long status = priv->status;
896
897 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
898 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
899 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
900
901 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
902 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
903
904 if (flags & HW_CARD_DISABLED)
905 set_bit(STATUS_RF_KILL_HW, &priv->status);
906 else
907 clear_bit(STATUS_RF_KILL_HW, &priv->status);
908
909
910 iwl_scan_cancel(priv);
911
912 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
913 test_bit(STATUS_RF_KILL_HW, &priv->status)))
914 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
915 test_bit(STATUS_RF_KILL_HW, &priv->status));
916 else
917 wake_up_interruptible(&priv->wait_command_queue);
918 }
919
920 /**
921 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
922 *
923 * Setup the RX handlers for each of the reply types sent from the uCode
924 * to the host.
925 *
926 * This function chains into the hardware specific files for them to setup
927 * any hardware specific handlers as well.
928 */
929 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
930 {
931 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
932 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
933 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
934 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
935 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
936 iwl_rx_spectrum_measure_notif;
937 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
938 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
939 iwl_rx_pm_debug_statistics_notif;
940 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
941
942 /*
943 * The same handler is used for both the REPLY to a discrete
944 * statistics request from the host as well as for the periodic
945 * statistics notifications (after received beacons) from the uCode.
946 */
947 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
948 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
949
950 iwl_setup_rx_scan_handlers(priv);
951 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
952
953 /* Set up hardware specific Rx handlers */
954 iwl3945_hw_rx_handler_setup(priv);
955 }
956
957 /************************** RX-FUNCTIONS ****************************/
958 /*
959 * Rx theory of operation
960 *
961 * The host allocates 32 DMA target addresses and passes the host address
962 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
963 * 0 to 31
964 *
965 * Rx Queue Indexes
966 * The host/firmware share two index registers for managing the Rx buffers.
967 *
968 * The READ index maps to the first position that the firmware may be writing
969 * to -- the driver can read up to (but not including) this position and get
970 * good data.
971 * The READ index is managed by the firmware once the card is enabled.
972 *
973 * The WRITE index maps to the last position the driver has read from -- the
974 * position preceding WRITE is the last slot the firmware can place a packet.
975 *
976 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
977 * WRITE = READ.
978 *
979 * During initialization, the host sets up the READ queue position to the first
980 * INDEX position, and WRITE to the last (READ - 1 wrapped)
981 *
982 * When the firmware places a packet in a buffer, it will advance the READ index
983 * and fire the RX interrupt. The driver can then query the READ index and
984 * process as many packets as possible, moving the WRITE index forward as it
985 * resets the Rx queue buffers with new memory.
986 *
987 * The management in the driver is as follows:
988 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
989 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
990 * to replenish the iwl->rxq->rx_free.
991 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
992 * iwl->rxq is replenished and the READ INDEX is updated (updating the
993 * 'processed' and 'read' driver indexes as well)
994 * + A received packet is processed and handed to the kernel network stack,
995 * detached from the iwl->rxq. The driver 'processed' index is updated.
996 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
997 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
998 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
999 * were enough free buffers and RX_STALLED is set it is cleared.
1000 *
1001 *
1002 * Driver sequence:
1003 *
1004 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
1005 * iwl3945_rx_queue_restock
1006 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1007 * queue, updates firmware pointers, and updates
1008 * the WRITE index. If insufficient rx_free buffers
1009 * are available, schedules iwl3945_rx_replenish
1010 *
1011 * -- enable interrupts --
1012 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
1013 * READ INDEX, detaching the SKB from the pool.
1014 * Moves the packet buffer from queue to rx_used.
1015 * Calls iwl3945_rx_queue_restock to refill any empty
1016 * slots.
1017 * ...
1018 *
1019 */
1020
1021 /**
1022 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1023 */
1024 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1025 dma_addr_t dma_addr)
1026 {
1027 return cpu_to_le32((u32)dma_addr);
1028 }
1029
1030 /**
1031 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1032 *
1033 * If there are slots in the RX queue that need to be restocked,
1034 * and we have free pre-allocated buffers, fill the ranks as much
1035 * as we can, pulling from rx_free.
1036 *
1037 * This moves the 'write' index forward to catch up with 'processed', and
1038 * also updates the memory address in the firmware to reference the new
1039 * target buffer.
1040 */
1041 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
1042 {
1043 struct iwl_rx_queue *rxq = &priv->rxq;
1044 struct list_head *element;
1045 struct iwl_rx_mem_buffer *rxb;
1046 unsigned long flags;
1047 int write;
1048
1049 spin_lock_irqsave(&rxq->lock, flags);
1050 write = rxq->write & ~0x7;
1051 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1052 /* Get next free Rx buffer, remove from free list */
1053 element = rxq->rx_free.next;
1054 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1055 list_del(element);
1056
1057 /* Point to Rx buffer via next RBD in circular buffer */
1058 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1059 rxq->queue[rxq->write] = rxb;
1060 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1061 rxq->free_count--;
1062 }
1063 spin_unlock_irqrestore(&rxq->lock, flags);
1064 /* If the pre-allocated buffer pool is dropping low, schedule to
1065 * refill it */
1066 if (rxq->free_count <= RX_LOW_WATERMARK)
1067 queue_work(priv->workqueue, &priv->rx_replenish);
1068
1069
1070 /* If we've added more space for the firmware to place data, tell it.
1071 * Increment device's write pointer in multiples of 8. */
1072 if ((rxq->write_actual != (rxq->write & ~0x7))
1073 || (abs(rxq->write - rxq->read) > 7)) {
1074 spin_lock_irqsave(&rxq->lock, flags);
1075 rxq->need_update = 1;
1076 spin_unlock_irqrestore(&rxq->lock, flags);
1077 iwl_rx_queue_update_write_ptr(priv, rxq);
1078 }
1079 }
1080
1081 /**
1082 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1083 *
1084 * When moving to rx_free an SKB is allocated for the slot.
1085 *
1086 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1087 * This is called as a scheduled work item (except for during initialization)
1088 */
1089 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1090 {
1091 struct iwl_rx_queue *rxq = &priv->rxq;
1092 struct list_head *element;
1093 struct iwl_rx_mem_buffer *rxb;
1094 struct page *page;
1095 unsigned long flags;
1096 gfp_t gfp_mask = priority;
1097
1098 while (1) {
1099 spin_lock_irqsave(&rxq->lock, flags);
1100
1101 if (list_empty(&rxq->rx_used)) {
1102 spin_unlock_irqrestore(&rxq->lock, flags);
1103 return;
1104 }
1105 spin_unlock_irqrestore(&rxq->lock, flags);
1106
1107 if (rxq->free_count > RX_LOW_WATERMARK)
1108 gfp_mask |= __GFP_NOWARN;
1109
1110 if (priv->hw_params.rx_page_order > 0)
1111 gfp_mask |= __GFP_COMP;
1112
1113 /* Alloc a new receive buffer */
1114 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1115 if (!page) {
1116 if (net_ratelimit())
1117 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1118 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1119 net_ratelimit())
1120 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1121 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1122 rxq->free_count);
1123 /* We don't reschedule replenish work here -- we will
1124 * call the restock method and if it still needs
1125 * more buffers it will schedule replenish */
1126 break;
1127 }
1128
1129 spin_lock_irqsave(&rxq->lock, flags);
1130 if (list_empty(&rxq->rx_used)) {
1131 spin_unlock_irqrestore(&rxq->lock, flags);
1132 __free_pages(page, priv->hw_params.rx_page_order);
1133 return;
1134 }
1135 element = rxq->rx_used.next;
1136 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1137 list_del(element);
1138 spin_unlock_irqrestore(&rxq->lock, flags);
1139
1140 rxb->page = page;
1141 /* Get physical address of RB/SKB */
1142 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1143 PAGE_SIZE << priv->hw_params.rx_page_order,
1144 PCI_DMA_FROMDEVICE);
1145
1146 spin_lock_irqsave(&rxq->lock, flags);
1147
1148 list_add_tail(&rxb->list, &rxq->rx_free);
1149 rxq->free_count++;
1150 priv->alloc_rxb_page++;
1151
1152 spin_unlock_irqrestore(&rxq->lock, flags);
1153 }
1154 }
1155
1156 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1157 {
1158 unsigned long flags;
1159 int i;
1160 spin_lock_irqsave(&rxq->lock, flags);
1161 INIT_LIST_HEAD(&rxq->rx_free);
1162 INIT_LIST_HEAD(&rxq->rx_used);
1163 /* Fill the rx_used queue with _all_ of the Rx buffers */
1164 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1165 /* In the reset function, these buffers may have been allocated
1166 * to an SKB, so we need to unmap and free potential storage */
1167 if (rxq->pool[i].page != NULL) {
1168 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1169 PAGE_SIZE << priv->hw_params.rx_page_order,
1170 PCI_DMA_FROMDEVICE);
1171 __iwl_free_pages(priv, rxq->pool[i].page);
1172 rxq->pool[i].page = NULL;
1173 }
1174 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1175 }
1176
1177 /* Set us so that we have processed and used all buffers, but have
1178 * not restocked the Rx queue with fresh buffers */
1179 rxq->read = rxq->write = 0;
1180 rxq->write_actual = 0;
1181 rxq->free_count = 0;
1182 spin_unlock_irqrestore(&rxq->lock, flags);
1183 }
1184
1185 void iwl3945_rx_replenish(void *data)
1186 {
1187 struct iwl_priv *priv = data;
1188 unsigned long flags;
1189
1190 iwl3945_rx_allocate(priv, GFP_KERNEL);
1191
1192 spin_lock_irqsave(&priv->lock, flags);
1193 iwl3945_rx_queue_restock(priv);
1194 spin_unlock_irqrestore(&priv->lock, flags);
1195 }
1196
1197 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1198 {
1199 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1200
1201 iwl3945_rx_queue_restock(priv);
1202 }
1203
1204
1205 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1206 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1207 * This free routine walks the list of POOL entries and if SKB is set to
1208 * non NULL it is unmapped and freed
1209 */
1210 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1211 {
1212 int i;
1213 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1214 if (rxq->pool[i].page != NULL) {
1215 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1216 PAGE_SIZE << priv->hw_params.rx_page_order,
1217 PCI_DMA_FROMDEVICE);
1218 __iwl_free_pages(priv, rxq->pool[i].page);
1219 rxq->pool[i].page = NULL;
1220 }
1221 }
1222
1223 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1224 rxq->dma_addr);
1225 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1226 rxq->rb_stts, rxq->rb_stts_dma);
1227 rxq->bd = NULL;
1228 rxq->rb_stts = NULL;
1229 }
1230
1231
1232 /* Convert linear signal-to-noise ratio into dB */
1233 static u8 ratio2dB[100] = {
1234 /* 0 1 2 3 4 5 6 7 8 9 */
1235 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1236 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1237 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1238 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1239 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1240 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1241 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1242 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1243 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1244 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1245 };
1246
1247 /* Calculates a relative dB value from a ratio of linear
1248 * (i.e. not dB) signal levels.
1249 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1250 int iwl3945_calc_db_from_ratio(int sig_ratio)
1251 {
1252 /* 1000:1 or higher just report as 60 dB */
1253 if (sig_ratio >= 1000)
1254 return 60;
1255
1256 /* 100:1 or higher, divide by 10 and use table,
1257 * add 20 dB to make up for divide by 10 */
1258 if (sig_ratio >= 100)
1259 return 20 + (int)ratio2dB[sig_ratio/10];
1260
1261 /* We shouldn't see this */
1262 if (sig_ratio < 1)
1263 return 0;
1264
1265 /* Use table for ratios 1:1 - 99:1 */
1266 return (int)ratio2dB[sig_ratio];
1267 }
1268
1269 /**
1270 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1271 *
1272 * Uses the priv->rx_handlers callback function array to invoke
1273 * the appropriate handlers, including command responses,
1274 * frame-received notifications, and other notifications.
1275 */
1276 static void iwl3945_rx_handle(struct iwl_priv *priv)
1277 {
1278 struct iwl_rx_mem_buffer *rxb;
1279 struct iwl_rx_packet *pkt;
1280 struct iwl_rx_queue *rxq = &priv->rxq;
1281 u32 r, i;
1282 int reclaim;
1283 unsigned long flags;
1284 u8 fill_rx = 0;
1285 u32 count = 8;
1286 int total_empty = 0;
1287
1288 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1289 * buffer that the driver may process (last buffer filled by ucode). */
1290 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1291 i = rxq->read;
1292
1293 /* calculate total frames need to be restock after handling RX */
1294 total_empty = r - rxq->write_actual;
1295 if (total_empty < 0)
1296 total_empty += RX_QUEUE_SIZE;
1297
1298 if (total_empty > (RX_QUEUE_SIZE / 2))
1299 fill_rx = 1;
1300 /* Rx interrupt, but nothing sent from uCode */
1301 if (i == r)
1302 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1303
1304 while (i != r) {
1305 rxb = rxq->queue[i];
1306
1307 /* If an RXB doesn't have a Rx queue slot associated with it,
1308 * then a bug has been introduced in the queue refilling
1309 * routines -- catch it here */
1310 BUG_ON(rxb == NULL);
1311
1312 rxq->queue[i] = NULL;
1313
1314 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1315 PAGE_SIZE << priv->hw_params.rx_page_order,
1316 PCI_DMA_FROMDEVICE);
1317 pkt = rxb_addr(rxb);
1318
1319 trace_iwlwifi_dev_rx(priv, pkt,
1320 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
1321
1322 /* Reclaim a command buffer only if this packet is a response
1323 * to a (driver-originated) command.
1324 * If the packet (e.g. Rx frame) originated from uCode,
1325 * there is no command buffer to reclaim.
1326 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1327 * but apparently a few don't get set; catch them here. */
1328 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1329 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1330 (pkt->hdr.cmd != REPLY_TX);
1331
1332 /* Based on type of command response or notification,
1333 * handle those that need handling via function in
1334 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1335 if (priv->rx_handlers[pkt->hdr.cmd]) {
1336 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1337 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1338 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1339 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1340 } else {
1341 /* No handling needed */
1342 IWL_DEBUG_RX(priv,
1343 "r %d i %d No handler needed for %s, 0x%02x\n",
1344 r, i, get_cmd_string(pkt->hdr.cmd),
1345 pkt->hdr.cmd);
1346 }
1347
1348 /*
1349 * XXX: After here, we should always check rxb->page
1350 * against NULL before touching it or its virtual
1351 * memory (pkt). Because some rx_handler might have
1352 * already taken or freed the pages.
1353 */
1354
1355 if (reclaim) {
1356 /* Invoke any callbacks, transfer the buffer to caller,
1357 * and fire off the (possibly) blocking iwl_send_cmd()
1358 * as we reclaim the driver command queue */
1359 if (rxb->page)
1360 iwl_tx_cmd_complete(priv, rxb);
1361 else
1362 IWL_WARN(priv, "Claim null rxb?\n");
1363 }
1364
1365 /* Reuse the page if possible. For notification packets and
1366 * SKBs that fail to Rx correctly, add them back into the
1367 * rx_free list for reuse later. */
1368 spin_lock_irqsave(&rxq->lock, flags);
1369 if (rxb->page != NULL) {
1370 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1371 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1372 PCI_DMA_FROMDEVICE);
1373 list_add_tail(&rxb->list, &rxq->rx_free);
1374 rxq->free_count++;
1375 } else
1376 list_add_tail(&rxb->list, &rxq->rx_used);
1377
1378 spin_unlock_irqrestore(&rxq->lock, flags);
1379
1380 i = (i + 1) & RX_QUEUE_MASK;
1381 /* If there are a lot of unused frames,
1382 * restock the Rx queue so ucode won't assert. */
1383 if (fill_rx) {
1384 count++;
1385 if (count >= 8) {
1386 rxq->read = i;
1387 iwl3945_rx_replenish_now(priv);
1388 count = 0;
1389 }
1390 }
1391 }
1392
1393 /* Backtrack one entry */
1394 rxq->read = i;
1395 if (fill_rx)
1396 iwl3945_rx_replenish_now(priv);
1397 else
1398 iwl3945_rx_queue_restock(priv);
1399 }
1400
1401 /* call this function to flush any scheduled tasklet */
1402 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1403 {
1404 /* wait to make sure we flush pending tasklet*/
1405 synchronize_irq(priv->pci_dev->irq);
1406 tasklet_kill(&priv->irq_tasklet);
1407 }
1408
1409 static const char *desc_lookup(int i)
1410 {
1411 switch (i) {
1412 case 1:
1413 return "FAIL";
1414 case 2:
1415 return "BAD_PARAM";
1416 case 3:
1417 return "BAD_CHECKSUM";
1418 case 4:
1419 return "NMI_INTERRUPT";
1420 case 5:
1421 return "SYSASSERT";
1422 case 6:
1423 return "FATAL_ERROR";
1424 }
1425
1426 return "UNKNOWN";
1427 }
1428
1429 #define ERROR_START_OFFSET (1 * sizeof(u32))
1430 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1431
1432 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1433 {
1434 u32 i;
1435 u32 desc, time, count, base, data1;
1436 u32 blink1, blink2, ilink1, ilink2;
1437
1438 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1439
1440 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1441 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1442 return;
1443 }
1444
1445
1446 count = iwl_read_targ_mem(priv, base);
1447
1448 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1449 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1450 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1451 priv->status, count);
1452 }
1453
1454 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1455 "ilink1 nmiPC Line\n");
1456 for (i = ERROR_START_OFFSET;
1457 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1458 i += ERROR_ELEM_SIZE) {
1459 desc = iwl_read_targ_mem(priv, base + i);
1460 time =
1461 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1462 blink1 =
1463 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1464 blink2 =
1465 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1466 ilink1 =
1467 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1468 ilink2 =
1469 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1470 data1 =
1471 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1472
1473 IWL_ERR(priv,
1474 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1475 desc_lookup(desc), desc, time, blink1, blink2,
1476 ilink1, ilink2, data1);
1477 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1478 0, blink1, blink2, ilink1, ilink2);
1479 }
1480 }
1481
1482 #define EVENT_START_OFFSET (6 * sizeof(u32))
1483
1484 /**
1485 * iwl3945_print_event_log - Dump error event log to syslog
1486 *
1487 */
1488 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1489 u32 num_events, u32 mode,
1490 int pos, char **buf, size_t bufsz)
1491 {
1492 u32 i;
1493 u32 base; /* SRAM byte address of event log header */
1494 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1495 u32 ptr; /* SRAM byte address of log data */
1496 u32 ev, time, data; /* event log data */
1497 unsigned long reg_flags;
1498
1499 if (num_events == 0)
1500 return pos;
1501
1502 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1503
1504 if (mode == 0)
1505 event_size = 2 * sizeof(u32);
1506 else
1507 event_size = 3 * sizeof(u32);
1508
1509 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1510
1511 /* Make sure device is powered up for SRAM reads */
1512 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1513 iwl_grab_nic_access(priv);
1514
1515 /* Set starting address; reads will auto-increment */
1516 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1517 rmb();
1518
1519 /* "time" is actually "data" for mode 0 (no timestamp).
1520 * place event id # at far right for easier visual parsing. */
1521 for (i = 0; i < num_events; i++) {
1522 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1523 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1524 if (mode == 0) {
1525 /* data, ev */
1526 if (bufsz) {
1527 pos += scnprintf(*buf + pos, bufsz - pos,
1528 "0x%08x:%04u\n",
1529 time, ev);
1530 } else {
1531 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1532 trace_iwlwifi_dev_ucode_event(priv, 0,
1533 time, ev);
1534 }
1535 } else {
1536 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1537 if (bufsz) {
1538 pos += scnprintf(*buf + pos, bufsz - pos,
1539 "%010u:0x%08x:%04u\n",
1540 time, data, ev);
1541 } else {
1542 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1543 time, data, ev);
1544 trace_iwlwifi_dev_ucode_event(priv, time,
1545 data, ev);
1546 }
1547 }
1548 }
1549
1550 /* Allow device to power down */
1551 iwl_release_nic_access(priv);
1552 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1553 return pos;
1554 }
1555
1556 /**
1557 * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1558 */
1559 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1560 u32 num_wraps, u32 next_entry,
1561 u32 size, u32 mode,
1562 int pos, char **buf, size_t bufsz)
1563 {
1564 /*
1565 * display the newest DEFAULT_LOG_ENTRIES entries
1566 * i.e the entries just before the next ont that uCode would fill.
1567 */
1568 if (num_wraps) {
1569 if (next_entry < size) {
1570 pos = iwl3945_print_event_log(priv,
1571 capacity - (size - next_entry),
1572 size - next_entry, mode,
1573 pos, buf, bufsz);
1574 pos = iwl3945_print_event_log(priv, 0,
1575 next_entry, mode,
1576 pos, buf, bufsz);
1577 } else
1578 pos = iwl3945_print_event_log(priv, next_entry - size,
1579 size, mode,
1580 pos, buf, bufsz);
1581 } else {
1582 if (next_entry < size)
1583 pos = iwl3945_print_event_log(priv, 0,
1584 next_entry, mode,
1585 pos, buf, bufsz);
1586 else
1587 pos = iwl3945_print_event_log(priv, next_entry - size,
1588 size, mode,
1589 pos, buf, bufsz);
1590 }
1591 return pos;
1592 }
1593
1594 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1595
1596 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1597 char **buf, bool display)
1598 {
1599 u32 base; /* SRAM byte address of event log header */
1600 u32 capacity; /* event log capacity in # entries */
1601 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1602 u32 num_wraps; /* # times uCode wrapped to top of log */
1603 u32 next_entry; /* index of next entry to be written by uCode */
1604 u32 size; /* # entries that we'll print */
1605 int pos = 0;
1606 size_t bufsz = 0;
1607
1608 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1609 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1610 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1611 return -EINVAL;
1612 }
1613
1614 /* event log header */
1615 capacity = iwl_read_targ_mem(priv, base);
1616 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1617 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1618 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1619
1620 if (capacity > priv->cfg->max_event_log_size) {
1621 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1622 capacity, priv->cfg->max_event_log_size);
1623 capacity = priv->cfg->max_event_log_size;
1624 }
1625
1626 if (next_entry > priv->cfg->max_event_log_size) {
1627 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1628 next_entry, priv->cfg->max_event_log_size);
1629 next_entry = priv->cfg->max_event_log_size;
1630 }
1631
1632 size = num_wraps ? capacity : next_entry;
1633
1634 /* bail out if nothing in log */
1635 if (size == 0) {
1636 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1637 return pos;
1638 }
1639
1640 #ifdef CONFIG_IWLWIFI_DEBUG
1641 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1642 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1643 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1644 #else
1645 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1646 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1647 #endif
1648
1649 IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1650 size);
1651
1652 #ifdef CONFIG_IWLWIFI_DEBUG
1653 if (display) {
1654 if (full_log)
1655 bufsz = capacity * 48;
1656 else
1657 bufsz = size * 48;
1658 *buf = kmalloc(bufsz, GFP_KERNEL);
1659 if (!*buf)
1660 return -ENOMEM;
1661 }
1662 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1663 /* if uCode has wrapped back to top of log,
1664 * start at the oldest entry,
1665 * i.e the next one that uCode would fill.
1666 */
1667 if (num_wraps)
1668 pos = iwl3945_print_event_log(priv, next_entry,
1669 capacity - next_entry, mode,
1670 pos, buf, bufsz);
1671
1672 /* (then/else) start at top of log */
1673 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1674 pos, buf, bufsz);
1675 } else
1676 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1677 next_entry, size, mode,
1678 pos, buf, bufsz);
1679 #else
1680 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1681 next_entry, size, mode,
1682 pos, buf, bufsz);
1683 #endif
1684 return pos;
1685 }
1686
1687 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1688 {
1689 u32 inta, handled = 0;
1690 u32 inta_fh;
1691 unsigned long flags;
1692 #ifdef CONFIG_IWLWIFI_DEBUG
1693 u32 inta_mask;
1694 #endif
1695
1696 spin_lock_irqsave(&priv->lock, flags);
1697
1698 /* Ack/clear/reset pending uCode interrupts.
1699 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1700 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1701 inta = iwl_read32(priv, CSR_INT);
1702 iwl_write32(priv, CSR_INT, inta);
1703
1704 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1705 * Any new interrupts that happen after this, either while we're
1706 * in this tasklet, or later, will show up in next ISR/tasklet. */
1707 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1708 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1709
1710 #ifdef CONFIG_IWLWIFI_DEBUG
1711 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1712 /* just for debug */
1713 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1714 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1715 inta, inta_mask, inta_fh);
1716 }
1717 #endif
1718
1719 spin_unlock_irqrestore(&priv->lock, flags);
1720
1721 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1722 * atomic, make sure that inta covers all the interrupts that
1723 * we've discovered, even if FH interrupt came in just after
1724 * reading CSR_INT. */
1725 if (inta_fh & CSR39_FH_INT_RX_MASK)
1726 inta |= CSR_INT_BIT_FH_RX;
1727 if (inta_fh & CSR39_FH_INT_TX_MASK)
1728 inta |= CSR_INT_BIT_FH_TX;
1729
1730 /* Now service all interrupt bits discovered above. */
1731 if (inta & CSR_INT_BIT_HW_ERR) {
1732 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1733
1734 /* Tell the device to stop sending interrupts */
1735 iwl_disable_interrupts(priv);
1736
1737 priv->isr_stats.hw++;
1738 iwl_irq_handle_error(priv);
1739
1740 handled |= CSR_INT_BIT_HW_ERR;
1741
1742 return;
1743 }
1744
1745 #ifdef CONFIG_IWLWIFI_DEBUG
1746 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1747 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1748 if (inta & CSR_INT_BIT_SCD) {
1749 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1750 "the frame/frames.\n");
1751 priv->isr_stats.sch++;
1752 }
1753
1754 /* Alive notification via Rx interrupt will do the real work */
1755 if (inta & CSR_INT_BIT_ALIVE) {
1756 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1757 priv->isr_stats.alive++;
1758 }
1759 }
1760 #endif
1761 /* Safely ignore these bits for debug checks below */
1762 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1763
1764 /* Error detected by uCode */
1765 if (inta & CSR_INT_BIT_SW_ERR) {
1766 IWL_ERR(priv, "Microcode SW error detected. "
1767 "Restarting 0x%X.\n", inta);
1768 priv->isr_stats.sw++;
1769 priv->isr_stats.sw_err = inta;
1770 iwl_irq_handle_error(priv);
1771 handled |= CSR_INT_BIT_SW_ERR;
1772 }
1773
1774 /* uCode wakes up after power-down sleep */
1775 if (inta & CSR_INT_BIT_WAKEUP) {
1776 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1777 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1778 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1779 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1780 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1781 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1782 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1783 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1784
1785 priv->isr_stats.wakeup++;
1786 handled |= CSR_INT_BIT_WAKEUP;
1787 }
1788
1789 /* All uCode command responses, including Tx command responses,
1790 * Rx "responses" (frame-received notification), and other
1791 * notifications from uCode come through here*/
1792 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1793 iwl3945_rx_handle(priv);
1794 priv->isr_stats.rx++;
1795 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1796 }
1797
1798 if (inta & CSR_INT_BIT_FH_TX) {
1799 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1800 priv->isr_stats.tx++;
1801
1802 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1803 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1804 (FH39_SRVC_CHNL), 0x0);
1805 handled |= CSR_INT_BIT_FH_TX;
1806 }
1807
1808 if (inta & ~handled) {
1809 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1810 priv->isr_stats.unhandled++;
1811 }
1812
1813 if (inta & ~priv->inta_mask) {
1814 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1815 inta & ~priv->inta_mask);
1816 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1817 }
1818
1819 /* Re-enable all interrupts */
1820 /* only Re-enable if disabled by irq */
1821 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1822 iwl_enable_interrupts(priv);
1823
1824 #ifdef CONFIG_IWLWIFI_DEBUG
1825 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1826 inta = iwl_read32(priv, CSR_INT);
1827 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1828 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1829 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1830 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1831 }
1832 #endif
1833 }
1834
1835 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1836 enum ieee80211_band band,
1837 u8 is_active, u8 n_probes,
1838 struct iwl3945_scan_channel *scan_ch,
1839 struct ieee80211_vif *vif)
1840 {
1841 struct ieee80211_channel *chan;
1842 const struct ieee80211_supported_band *sband;
1843 const struct iwl_channel_info *ch_info;
1844 u16 passive_dwell = 0;
1845 u16 active_dwell = 0;
1846 int added, i;
1847
1848 sband = iwl_get_hw_mode(priv, band);
1849 if (!sband)
1850 return 0;
1851
1852 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1853 passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1854
1855 if (passive_dwell <= active_dwell)
1856 passive_dwell = active_dwell + 1;
1857
1858 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1859 chan = priv->scan_request->channels[i];
1860
1861 if (chan->band != band)
1862 continue;
1863
1864 scan_ch->channel = chan->hw_value;
1865
1866 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1867 if (!is_channel_valid(ch_info)) {
1868 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1869 scan_ch->channel);
1870 continue;
1871 }
1872
1873 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1874 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1875 /* If passive , set up for auto-switch
1876 * and use long active_dwell time.
1877 */
1878 if (!is_active || is_channel_passive(ch_info) ||
1879 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1880 scan_ch->type = 0; /* passive */
1881 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1882 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1883 } else {
1884 scan_ch->type = 1; /* active */
1885 }
1886
1887 /* Set direct probe bits. These may be used both for active
1888 * scan channels (probes gets sent right away),
1889 * or for passive channels (probes get se sent only after
1890 * hearing clear Rx packet).*/
1891 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1892 if (n_probes)
1893 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1894 } else {
1895 /* uCode v1 does not allow setting direct probe bits on
1896 * passive channel. */
1897 if ((scan_ch->type & 1) && n_probes)
1898 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1899 }
1900
1901 /* Set txpower levels to defaults */
1902 scan_ch->tpc.dsp_atten = 110;
1903 /* scan_pwr_info->tpc.dsp_atten; */
1904
1905 /*scan_pwr_info->tpc.tx_gain; */
1906 if (band == IEEE80211_BAND_5GHZ)
1907 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1908 else {
1909 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1910 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1911 * power level:
1912 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1913 */
1914 }
1915
1916 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1917 scan_ch->channel,
1918 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1919 (scan_ch->type & 1) ?
1920 active_dwell : passive_dwell);
1921
1922 scan_ch++;
1923 added++;
1924 }
1925
1926 IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1927 return added;
1928 }
1929
1930 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1931 struct ieee80211_rate *rates)
1932 {
1933 int i;
1934
1935 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1936 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1937 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1938 rates[i].hw_value_short = i;
1939 rates[i].flags = 0;
1940 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1941 /*
1942 * If CCK != 1M then set short preamble rate flag.
1943 */
1944 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1945 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1946 }
1947 }
1948 }
1949
1950 /******************************************************************************
1951 *
1952 * uCode download functions
1953 *
1954 ******************************************************************************/
1955
1956 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1957 {
1958 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1959 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1960 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1961 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1962 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1963 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1964 }
1965
1966 /**
1967 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1968 * looking at all data.
1969 */
1970 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1971 {
1972 u32 val;
1973 u32 save_len = len;
1974 int rc = 0;
1975 u32 errcnt;
1976
1977 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1978
1979 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1980 IWL39_RTC_INST_LOWER_BOUND);
1981
1982 errcnt = 0;
1983 for (; len > 0; len -= sizeof(u32), image++) {
1984 /* read data comes through single port, auto-incr addr */
1985 /* NOTE: Use the debugless read so we don't flood kernel log
1986 * if IWL_DL_IO is set */
1987 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1988 if (val != le32_to_cpu(*image)) {
1989 IWL_ERR(priv, "uCode INST section is invalid at "
1990 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1991 save_len - len, val, le32_to_cpu(*image));
1992 rc = -EIO;
1993 errcnt++;
1994 if (errcnt >= 20)
1995 break;
1996 }
1997 }
1998
1999
2000 if (!errcnt)
2001 IWL_DEBUG_INFO(priv,
2002 "ucode image in INSTRUCTION memory is good\n");
2003
2004 return rc;
2005 }
2006
2007
2008 /**
2009 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2010 * using sample data 100 bytes apart. If these sample points are good,
2011 * it's a pretty good bet that everything between them is good, too.
2012 */
2013 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2014 {
2015 u32 val;
2016 int rc = 0;
2017 u32 errcnt = 0;
2018 u32 i;
2019
2020 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2021
2022 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2023 /* read data comes through single port, auto-incr addr */
2024 /* NOTE: Use the debugless read so we don't flood kernel log
2025 * if IWL_DL_IO is set */
2026 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2027 i + IWL39_RTC_INST_LOWER_BOUND);
2028 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2029 if (val != le32_to_cpu(*image)) {
2030 #if 0 /* Enable this if you want to see details */
2031 IWL_ERR(priv, "uCode INST section is invalid at "
2032 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2033 i, val, *image);
2034 #endif
2035 rc = -EIO;
2036 errcnt++;
2037 if (errcnt >= 3)
2038 break;
2039 }
2040 }
2041
2042 return rc;
2043 }
2044
2045
2046 /**
2047 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2048 * and verify its contents
2049 */
2050 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2051 {
2052 __le32 *image;
2053 u32 len;
2054 int rc = 0;
2055
2056 /* Try bootstrap */
2057 image = (__le32 *)priv->ucode_boot.v_addr;
2058 len = priv->ucode_boot.len;
2059 rc = iwl3945_verify_inst_sparse(priv, image, len);
2060 if (rc == 0) {
2061 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2062 return 0;
2063 }
2064
2065 /* Try initialize */
2066 image = (__le32 *)priv->ucode_init.v_addr;
2067 len = priv->ucode_init.len;
2068 rc = iwl3945_verify_inst_sparse(priv, image, len);
2069 if (rc == 0) {
2070 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2071 return 0;
2072 }
2073
2074 /* Try runtime/protocol */
2075 image = (__le32 *)priv->ucode_code.v_addr;
2076 len = priv->ucode_code.len;
2077 rc = iwl3945_verify_inst_sparse(priv, image, len);
2078 if (rc == 0) {
2079 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2080 return 0;
2081 }
2082
2083 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2084
2085 /* Since nothing seems to match, show first several data entries in
2086 * instruction SRAM, so maybe visual inspection will give a clue.
2087 * Selection of bootstrap image (vs. other images) is arbitrary. */
2088 image = (__le32 *)priv->ucode_boot.v_addr;
2089 len = priv->ucode_boot.len;
2090 rc = iwl3945_verify_inst_full(priv, image, len);
2091
2092 return rc;
2093 }
2094
2095 static void iwl3945_nic_start(struct iwl_priv *priv)
2096 {
2097 /* Remove all resets to allow NIC to operate */
2098 iwl_write32(priv, CSR_RESET, 0);
2099 }
2100
2101 #define IWL3945_UCODE_GET(item) \
2102 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
2103 { \
2104 return le32_to_cpu(ucode->u.v1.item); \
2105 }
2106
2107 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
2108 {
2109 return 24;
2110 }
2111
2112 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
2113 {
2114 return (u8 *) ucode->u.v1.data;
2115 }
2116
2117 IWL3945_UCODE_GET(inst_size);
2118 IWL3945_UCODE_GET(data_size);
2119 IWL3945_UCODE_GET(init_size);
2120 IWL3945_UCODE_GET(init_data_size);
2121 IWL3945_UCODE_GET(boot_size);
2122
2123 /**
2124 * iwl3945_read_ucode - Read uCode images from disk file.
2125 *
2126 * Copy into buffers for card to fetch via bus-mastering
2127 */
2128 static int iwl3945_read_ucode(struct iwl_priv *priv)
2129 {
2130 const struct iwl_ucode_header *ucode;
2131 int ret = -EINVAL, index;
2132 const struct firmware *ucode_raw;
2133 /* firmware file name contains uCode/driver compatibility version */
2134 const char *name_pre = priv->cfg->fw_name_pre;
2135 const unsigned int api_max = priv->cfg->ucode_api_max;
2136 const unsigned int api_min = priv->cfg->ucode_api_min;
2137 char buf[25];
2138 u8 *src;
2139 size_t len;
2140 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2141
2142 /* Ask kernel firmware_class module to get the boot firmware off disk.
2143 * request_firmware() is synchronous, file is in memory on return. */
2144 for (index = api_max; index >= api_min; index--) {
2145 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2146 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2147 if (ret < 0) {
2148 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2149 buf, ret);
2150 if (ret == -ENOENT)
2151 continue;
2152 else
2153 goto error;
2154 } else {
2155 if (index < api_max)
2156 IWL_ERR(priv, "Loaded firmware %s, "
2157 "which is deprecated. "
2158 " Please use API v%u instead.\n",
2159 buf, api_max);
2160 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2161 "(%zd bytes) from disk\n",
2162 buf, ucode_raw->size);
2163 break;
2164 }
2165 }
2166
2167 if (ret < 0)
2168 goto error;
2169
2170 /* Make sure that we got at least our header! */
2171 if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) {
2172 IWL_ERR(priv, "File size way too small!\n");
2173 ret = -EINVAL;
2174 goto err_release;
2175 }
2176
2177 /* Data from ucode file: header followed by uCode images */
2178 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2179
2180 priv->ucode_ver = le32_to_cpu(ucode->ver);
2181 api_ver = IWL_UCODE_API(priv->ucode_ver);
2182 inst_size = iwl3945_ucode_get_inst_size(ucode);
2183 data_size = iwl3945_ucode_get_data_size(ucode);
2184 init_size = iwl3945_ucode_get_init_size(ucode);
2185 init_data_size = iwl3945_ucode_get_init_data_size(ucode);
2186 boot_size = iwl3945_ucode_get_boot_size(ucode);
2187 src = iwl3945_ucode_get_data(ucode);
2188
2189 /* api_ver should match the api version forming part of the
2190 * firmware filename ... but we don't check for that and only rely
2191 * on the API version read from firmware header from here on forward */
2192
2193 if (api_ver < api_min || api_ver > api_max) {
2194 IWL_ERR(priv, "Driver unable to support your firmware API. "
2195 "Driver supports v%u, firmware is v%u.\n",
2196 api_max, api_ver);
2197 priv->ucode_ver = 0;
2198 ret = -EINVAL;
2199 goto err_release;
2200 }
2201 if (api_ver != api_max)
2202 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2203 "got %u. New firmware can be obtained "
2204 "from http://www.intellinuxwireless.org.\n",
2205 api_max, api_ver);
2206
2207 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2208 IWL_UCODE_MAJOR(priv->ucode_ver),
2209 IWL_UCODE_MINOR(priv->ucode_ver),
2210 IWL_UCODE_API(priv->ucode_ver),
2211 IWL_UCODE_SERIAL(priv->ucode_ver));
2212
2213 snprintf(priv->hw->wiphy->fw_version,
2214 sizeof(priv->hw->wiphy->fw_version),
2215 "%u.%u.%u.%u",
2216 IWL_UCODE_MAJOR(priv->ucode_ver),
2217 IWL_UCODE_MINOR(priv->ucode_ver),
2218 IWL_UCODE_API(priv->ucode_ver),
2219 IWL_UCODE_SERIAL(priv->ucode_ver));
2220
2221 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2222 priv->ucode_ver);
2223 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2224 inst_size);
2225 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2226 data_size);
2227 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2228 init_size);
2229 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2230 init_data_size);
2231 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2232 boot_size);
2233
2234
2235 /* Verify size of file vs. image size info in file's header */
2236 if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
2237 inst_size + data_size + init_size +
2238 init_data_size + boot_size) {
2239
2240 IWL_DEBUG_INFO(priv,
2241 "uCode file size %zd does not match expected size\n",
2242 ucode_raw->size);
2243 ret = -EINVAL;
2244 goto err_release;
2245 }
2246
2247 /* Verify that uCode images will fit in card's SRAM */
2248 if (inst_size > IWL39_MAX_INST_SIZE) {
2249 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2250 inst_size);
2251 ret = -EINVAL;
2252 goto err_release;
2253 }
2254
2255 if (data_size > IWL39_MAX_DATA_SIZE) {
2256 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2257 data_size);
2258 ret = -EINVAL;
2259 goto err_release;
2260 }
2261 if (init_size > IWL39_MAX_INST_SIZE) {
2262 IWL_DEBUG_INFO(priv,
2263 "uCode init instr len %d too large to fit in\n",
2264 init_size);
2265 ret = -EINVAL;
2266 goto err_release;
2267 }
2268 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2269 IWL_DEBUG_INFO(priv,
2270 "uCode init data len %d too large to fit in\n",
2271 init_data_size);
2272 ret = -EINVAL;
2273 goto err_release;
2274 }
2275 if (boot_size > IWL39_MAX_BSM_SIZE) {
2276 IWL_DEBUG_INFO(priv,
2277 "uCode boot instr len %d too large to fit in\n",
2278 boot_size);
2279 ret = -EINVAL;
2280 goto err_release;
2281 }
2282
2283 /* Allocate ucode buffers for card's bus-master loading ... */
2284
2285 /* Runtime instructions and 2 copies of data:
2286 * 1) unmodified from disk
2287 * 2) backup cache for save/restore during power-downs */
2288 priv->ucode_code.len = inst_size;
2289 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2290
2291 priv->ucode_data.len = data_size;
2292 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2293
2294 priv->ucode_data_backup.len = data_size;
2295 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2296
2297 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2298 !priv->ucode_data_backup.v_addr)
2299 goto err_pci_alloc;
2300
2301 /* Initialization instructions and data */
2302 if (init_size && init_data_size) {
2303 priv->ucode_init.len = init_size;
2304 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2305
2306 priv->ucode_init_data.len = init_data_size;
2307 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2308
2309 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2310 goto err_pci_alloc;
2311 }
2312
2313 /* Bootstrap (instructions only, no data) */
2314 if (boot_size) {
2315 priv->ucode_boot.len = boot_size;
2316 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2317
2318 if (!priv->ucode_boot.v_addr)
2319 goto err_pci_alloc;
2320 }
2321
2322 /* Copy images into buffers for card's bus-master reads ... */
2323
2324 /* Runtime instructions (first block of data in file) */
2325 len = inst_size;
2326 IWL_DEBUG_INFO(priv,
2327 "Copying (but not loading) uCode instr len %zd\n", len);
2328 memcpy(priv->ucode_code.v_addr, src, len);
2329 src += len;
2330
2331 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2332 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2333
2334 /* Runtime data (2nd block)
2335 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2336 len = data_size;
2337 IWL_DEBUG_INFO(priv,
2338 "Copying (but not loading) uCode data len %zd\n", len);
2339 memcpy(priv->ucode_data.v_addr, src, len);
2340 memcpy(priv->ucode_data_backup.v_addr, src, len);
2341 src += len;
2342
2343 /* Initialization instructions (3rd block) */
2344 if (init_size) {
2345 len = init_size;
2346 IWL_DEBUG_INFO(priv,
2347 "Copying (but not loading) init instr len %zd\n", len);
2348 memcpy(priv->ucode_init.v_addr, src, len);
2349 src += len;
2350 }
2351
2352 /* Initialization data (4th block) */
2353 if (init_data_size) {
2354 len = init_data_size;
2355 IWL_DEBUG_INFO(priv,
2356 "Copying (but not loading) init data len %zd\n", len);
2357 memcpy(priv->ucode_init_data.v_addr, src, len);
2358 src += len;
2359 }
2360
2361 /* Bootstrap instructions (5th block) */
2362 len = boot_size;
2363 IWL_DEBUG_INFO(priv,
2364 "Copying (but not loading) boot instr len %zd\n", len);
2365 memcpy(priv->ucode_boot.v_addr, src, len);
2366
2367 /* We have our copies now, allow OS release its copies */
2368 release_firmware(ucode_raw);
2369 return 0;
2370
2371 err_pci_alloc:
2372 IWL_ERR(priv, "failed to allocate pci memory\n");
2373 ret = -ENOMEM;
2374 iwl3945_dealloc_ucode_pci(priv);
2375
2376 err_release:
2377 release_firmware(ucode_raw);
2378
2379 error:
2380 return ret;
2381 }
2382
2383
2384 /**
2385 * iwl3945_set_ucode_ptrs - Set uCode address location
2386 *
2387 * Tell initialization uCode where to find runtime uCode.
2388 *
2389 * BSM registers initially contain pointers to initialization uCode.
2390 * We need to replace them to load runtime uCode inst and data,
2391 * and to save runtime data when powering down.
2392 */
2393 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2394 {
2395 dma_addr_t pinst;
2396 dma_addr_t pdata;
2397
2398 /* bits 31:0 for 3945 */
2399 pinst = priv->ucode_code.p_addr;
2400 pdata = priv->ucode_data_backup.p_addr;
2401
2402 /* Tell bootstrap uCode where to find image to load */
2403 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2404 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2405 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2406 priv->ucode_data.len);
2407
2408 /* Inst byte count must be last to set up, bit 31 signals uCode
2409 * that all new ptr/size info is in place */
2410 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2411 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2412
2413 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2414
2415 return 0;
2416 }
2417
2418 /**
2419 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2420 *
2421 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2422 *
2423 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2424 */
2425 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2426 {
2427 /* Check alive response for "valid" sign from uCode */
2428 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2429 /* We had an error bringing up the hardware, so take it
2430 * all the way back down so we can try again */
2431 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2432 goto restart;
2433 }
2434
2435 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2436 * This is a paranoid check, because we would not have gotten the
2437 * "initialize" alive if code weren't properly loaded. */
2438 if (iwl3945_verify_ucode(priv)) {
2439 /* Runtime instruction load was bad;
2440 * take it all the way back down so we can try again */
2441 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2442 goto restart;
2443 }
2444
2445 /* Send pointers to protocol/runtime uCode image ... init code will
2446 * load and launch runtime uCode, which will send us another "Alive"
2447 * notification. */
2448 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2449 if (iwl3945_set_ucode_ptrs(priv)) {
2450 /* Runtime instruction load won't happen;
2451 * take it all the way back down so we can try again */
2452 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2453 goto restart;
2454 }
2455 return;
2456
2457 restart:
2458 queue_work(priv->workqueue, &priv->restart);
2459 }
2460
2461 /**
2462 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2463 * from protocol/runtime uCode (initialization uCode's
2464 * Alive gets handled by iwl3945_init_alive_start()).
2465 */
2466 static void iwl3945_alive_start(struct iwl_priv *priv)
2467 {
2468 int thermal_spin = 0;
2469 u32 rfkill;
2470
2471 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2472
2473 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2474 /* We had an error bringing up the hardware, so take it
2475 * all the way back down so we can try again */
2476 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2477 goto restart;
2478 }
2479
2480 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2481 * This is a paranoid check, because we would not have gotten the
2482 * "runtime" alive if code weren't properly loaded. */
2483 if (iwl3945_verify_ucode(priv)) {
2484 /* Runtime instruction load was bad;
2485 * take it all the way back down so we can try again */
2486 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2487 goto restart;
2488 }
2489
2490 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2491 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2492
2493 if (rfkill & 0x1) {
2494 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2495 /* if RFKILL is not on, then wait for thermal
2496 * sensor in adapter to kick in */
2497 while (iwl3945_hw_get_temperature(priv) == 0) {
2498 thermal_spin++;
2499 udelay(10);
2500 }
2501
2502 if (thermal_spin)
2503 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2504 thermal_spin * 10);
2505 } else
2506 set_bit(STATUS_RF_KILL_HW, &priv->status);
2507
2508 /* After the ALIVE response, we can send commands to 3945 uCode */
2509 set_bit(STATUS_ALIVE, &priv->status);
2510
2511 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2512 /* Enable timer to monitor the driver queues */
2513 mod_timer(&priv->monitor_recover,
2514 jiffies +
2515 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2516 }
2517
2518 if (iwl_is_rfkill(priv))
2519 return;
2520
2521 ieee80211_wake_queues(priv->hw);
2522
2523 priv->active_rate = IWL_RATES_MASK;
2524
2525 iwl_power_update_mode(priv, true);
2526
2527 if (iwl_is_associated(priv)) {
2528 struct iwl3945_rxon_cmd *active_rxon =
2529 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2530
2531 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2532 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2533 } else {
2534 /* Initialize our rx_config data */
2535 iwl_connection_init_rx_config(priv, NULL);
2536 }
2537
2538 /* Configure Bluetooth device coexistence support */
2539 priv->cfg->ops->hcmd->send_bt_config(priv);
2540
2541 /* Configure the adapter for unassociated operation */
2542 iwlcore_commit_rxon(priv);
2543
2544 iwl3945_reg_txpower_periodic(priv);
2545
2546 iwl_leds_init(priv);
2547
2548 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2549 set_bit(STATUS_READY, &priv->status);
2550 wake_up_interruptible(&priv->wait_command_queue);
2551
2552 return;
2553
2554 restart:
2555 queue_work(priv->workqueue, &priv->restart);
2556 }
2557
2558 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2559
2560 static void __iwl3945_down(struct iwl_priv *priv)
2561 {
2562 unsigned long flags;
2563 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2564 struct ieee80211_conf *conf = NULL;
2565
2566 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2567
2568 conf = ieee80211_get_hw_conf(priv->hw);
2569
2570 if (!exit_pending)
2571 set_bit(STATUS_EXIT_PENDING, &priv->status);
2572
2573 /* Station information will now be cleared in device */
2574 iwl_clear_ucode_stations(priv);
2575 iwl_dealloc_bcast_station(priv);
2576 iwl_clear_driver_stations(priv);
2577
2578 /* Unblock any waiting calls */
2579 wake_up_interruptible_all(&priv->wait_command_queue);
2580
2581 /* Wipe out the EXIT_PENDING status bit if we are not actually
2582 * exiting the module */
2583 if (!exit_pending)
2584 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2585
2586 /* stop and reset the on-board processor */
2587 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2588
2589 /* tell the device to stop sending interrupts */
2590 spin_lock_irqsave(&priv->lock, flags);
2591 iwl_disable_interrupts(priv);
2592 spin_unlock_irqrestore(&priv->lock, flags);
2593 iwl_synchronize_irq(priv);
2594
2595 if (priv->mac80211_registered)
2596 ieee80211_stop_queues(priv->hw);
2597
2598 /* If we have not previously called iwl3945_init() then
2599 * clear all bits but the RF Kill bits and return */
2600 if (!iwl_is_init(priv)) {
2601 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2602 STATUS_RF_KILL_HW |
2603 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2604 STATUS_GEO_CONFIGURED |
2605 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2606 STATUS_EXIT_PENDING;
2607 goto exit;
2608 }
2609
2610 /* ...otherwise clear out all the status bits but the RF Kill
2611 * bit and continue taking the NIC down. */
2612 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2613 STATUS_RF_KILL_HW |
2614 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2615 STATUS_GEO_CONFIGURED |
2616 test_bit(STATUS_FW_ERROR, &priv->status) <<
2617 STATUS_FW_ERROR |
2618 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2619 STATUS_EXIT_PENDING;
2620
2621 iwl3945_hw_txq_ctx_stop(priv);
2622 iwl3945_hw_rxq_stop(priv);
2623
2624 /* Power-down device's busmaster DMA clocks */
2625 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2626 udelay(5);
2627
2628 /* Stop the device, and put it in low power state */
2629 priv->cfg->ops->lib->apm_ops.stop(priv);
2630
2631 exit:
2632 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2633
2634 if (priv->ibss_beacon)
2635 dev_kfree_skb(priv->ibss_beacon);
2636 priv->ibss_beacon = NULL;
2637
2638 /* clear out any free frames */
2639 iwl3945_clear_free_frames(priv);
2640 }
2641
2642 static void iwl3945_down(struct iwl_priv *priv)
2643 {
2644 mutex_lock(&priv->mutex);
2645 __iwl3945_down(priv);
2646 mutex_unlock(&priv->mutex);
2647
2648 iwl3945_cancel_deferred_work(priv);
2649 }
2650
2651 #define MAX_HW_RESTARTS 5
2652
2653 static int __iwl3945_up(struct iwl_priv *priv)
2654 {
2655 int rc, i;
2656
2657 rc = iwl_alloc_bcast_station(priv, false);
2658 if (rc)
2659 return rc;
2660
2661 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2662 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2663 return -EIO;
2664 }
2665
2666 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2667 IWL_ERR(priv, "ucode not available for device bring up\n");
2668 return -EIO;
2669 }
2670
2671 /* If platform's RF_KILL switch is NOT set to KILL */
2672 if (iwl_read32(priv, CSR_GP_CNTRL) &
2673 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2674 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2675 else {
2676 set_bit(STATUS_RF_KILL_HW, &priv->status);
2677 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2678 return -ENODEV;
2679 }
2680
2681 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2682
2683 rc = iwl3945_hw_nic_init(priv);
2684 if (rc) {
2685 IWL_ERR(priv, "Unable to int nic\n");
2686 return rc;
2687 }
2688
2689 /* make sure rfkill handshake bits are cleared */
2690 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2691 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2692 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2693
2694 /* clear (again), then enable host interrupts */
2695 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2696 iwl_enable_interrupts(priv);
2697
2698 /* really make sure rfkill handshake bits are cleared */
2699 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2700 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2701
2702 /* Copy original ucode data image from disk into backup cache.
2703 * This will be used to initialize the on-board processor's
2704 * data SRAM for a clean start when the runtime program first loads. */
2705 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2706 priv->ucode_data.len);
2707
2708 /* We return success when we resume from suspend and rf_kill is on. */
2709 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2710 return 0;
2711
2712 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2713
2714 /* load bootstrap state machine,
2715 * load bootstrap program into processor's memory,
2716 * prepare to load the "initialize" uCode */
2717 rc = priv->cfg->ops->lib->load_ucode(priv);
2718
2719 if (rc) {
2720 IWL_ERR(priv,
2721 "Unable to set up bootstrap uCode: %d\n", rc);
2722 continue;
2723 }
2724
2725 /* start card; "initialize" will load runtime ucode */
2726 iwl3945_nic_start(priv);
2727
2728 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2729
2730 return 0;
2731 }
2732
2733 set_bit(STATUS_EXIT_PENDING, &priv->status);
2734 __iwl3945_down(priv);
2735 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2736
2737 /* tried to restart and config the device for as long as our
2738 * patience could withstand */
2739 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2740 return -EIO;
2741 }
2742
2743
2744 /*****************************************************************************
2745 *
2746 * Workqueue callbacks
2747 *
2748 *****************************************************************************/
2749
2750 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2751 {
2752 struct iwl_priv *priv =
2753 container_of(data, struct iwl_priv, init_alive_start.work);
2754
2755 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2756 return;
2757
2758 mutex_lock(&priv->mutex);
2759 iwl3945_init_alive_start(priv);
2760 mutex_unlock(&priv->mutex);
2761 }
2762
2763 static void iwl3945_bg_alive_start(struct work_struct *data)
2764 {
2765 struct iwl_priv *priv =
2766 container_of(data, struct iwl_priv, alive_start.work);
2767
2768 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2769 return;
2770
2771 mutex_lock(&priv->mutex);
2772 iwl3945_alive_start(priv);
2773 mutex_unlock(&priv->mutex);
2774 }
2775
2776 /*
2777 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2778 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2779 * *is* readable even when device has been SW_RESET into low power mode
2780 * (e.g. during RF KILL).
2781 */
2782 static void iwl3945_rfkill_poll(struct work_struct *data)
2783 {
2784 struct iwl_priv *priv =
2785 container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2786 bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2787 bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2788 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2789
2790 if (new_rfkill != old_rfkill) {
2791 if (new_rfkill)
2792 set_bit(STATUS_RF_KILL_HW, &priv->status);
2793 else
2794 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2795
2796 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2797
2798 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2799 new_rfkill ? "disable radio" : "enable radio");
2800 }
2801
2802 /* Keep this running, even if radio now enabled. This will be
2803 * cancelled in mac_start() if system decides to start again */
2804 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2805 round_jiffies_relative(2 * HZ));
2806
2807 }
2808
2809 void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
2810 {
2811 struct iwl_host_cmd cmd = {
2812 .id = REPLY_SCAN_CMD,
2813 .len = sizeof(struct iwl3945_scan_cmd),
2814 .flags = CMD_SIZE_HUGE,
2815 };
2816 struct iwl3945_scan_cmd *scan;
2817 struct ieee80211_conf *conf = NULL;
2818 u8 n_probes = 0;
2819 enum ieee80211_band band;
2820 bool is_active = false;
2821
2822 conf = ieee80211_get_hw_conf(priv->hw);
2823
2824 cancel_delayed_work(&priv->scan_check);
2825
2826 if (!iwl_is_ready(priv)) {
2827 IWL_WARN(priv, "request scan called when driver not ready.\n");
2828 goto done;
2829 }
2830
2831 /* Make sure the scan wasn't canceled before this queued work
2832 * was given the chance to run... */
2833 if (!test_bit(STATUS_SCANNING, &priv->status))
2834 goto done;
2835
2836 /* This should never be called or scheduled if there is currently
2837 * a scan active in the hardware. */
2838 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2839 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2840 "Ignoring second request.\n");
2841 goto done;
2842 }
2843
2844 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2845 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2846 goto done;
2847 }
2848
2849 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2850 IWL_DEBUG_HC(priv,
2851 "Scan request while abort pending. Queuing.\n");
2852 goto done;
2853 }
2854
2855 if (iwl_is_rfkill(priv)) {
2856 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2857 goto done;
2858 }
2859
2860 if (!test_bit(STATUS_READY, &priv->status)) {
2861 IWL_DEBUG_HC(priv,
2862 "Scan request while uninitialized. Queuing.\n");
2863 goto done;
2864 }
2865
2866 if (!priv->scan_cmd) {
2867 priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2868 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2869 if (!priv->scan_cmd) {
2870 IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2871 goto done;
2872 }
2873 }
2874 scan = priv->scan_cmd;
2875 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2876
2877 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2878 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2879
2880 if (iwl_is_associated(priv)) {
2881 u16 interval = 0;
2882 u32 extra;
2883 u32 suspend_time = 100;
2884 u32 scan_suspend_time = 100;
2885 unsigned long flags;
2886
2887 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2888
2889 spin_lock_irqsave(&priv->lock, flags);
2890 interval = vif ? vif->bss_conf.beacon_int : 0;
2891 spin_unlock_irqrestore(&priv->lock, flags);
2892
2893 scan->suspend_time = 0;
2894 scan->max_out_time = cpu_to_le32(200 * 1024);
2895 if (!interval)
2896 interval = suspend_time;
2897 /*
2898 * suspend time format:
2899 * 0-19: beacon interval in usec (time before exec.)
2900 * 20-23: 0
2901 * 24-31: number of beacons (suspend between channels)
2902 */
2903
2904 extra = (suspend_time / interval) << 24;
2905 scan_suspend_time = 0xFF0FFFFF &
2906 (extra | ((suspend_time % interval) * 1024));
2907
2908 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2909 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2910 scan_suspend_time, interval);
2911 }
2912
2913 if (priv->is_internal_short_scan) {
2914 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
2915 } else if (priv->scan_request->n_ssids) {
2916 int i, p = 0;
2917 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2918 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2919 /* always does wildcard anyway */
2920 if (!priv->scan_request->ssids[i].ssid_len)
2921 continue;
2922 scan->direct_scan[p].id = WLAN_EID_SSID;
2923 scan->direct_scan[p].len =
2924 priv->scan_request->ssids[i].ssid_len;
2925 memcpy(scan->direct_scan[p].ssid,
2926 priv->scan_request->ssids[i].ssid,
2927 priv->scan_request->ssids[i].ssid_len);
2928 n_probes++;
2929 p++;
2930 }
2931 is_active = true;
2932 } else
2933 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2934
2935 /* We don't build a direct scan probe request; the uCode will do
2936 * that based on the direct_mask added to each channel entry */
2937 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2938 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2939 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2940
2941 /* flags + rate selection */
2942
2943 switch (priv->scan_band) {
2944 case IEEE80211_BAND_2GHZ:
2945 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2946 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2947 scan->good_CRC_th = 0;
2948 band = IEEE80211_BAND_2GHZ;
2949 break;
2950 case IEEE80211_BAND_5GHZ:
2951 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2952 /*
2953 * If active scaning is requested but a certain channel
2954 * is marked passive, we can do active scanning if we
2955 * detect transmissions.
2956 */
2957 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2958 IWL_GOOD_CRC_TH_DISABLED;
2959 band = IEEE80211_BAND_5GHZ;
2960 break;
2961 default:
2962 IWL_WARN(priv, "Invalid scan band\n");
2963 goto done;
2964 }
2965
2966 if (!priv->is_internal_short_scan) {
2967 scan->tx_cmd.len = cpu_to_le16(
2968 iwl_fill_probe_req(priv,
2969 (struct ieee80211_mgmt *)scan->data,
2970 vif->addr,
2971 priv->scan_request->ie,
2972 priv->scan_request->ie_len,
2973 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2974 } else {
2975 /* use bcast addr, will not be transmitted but must be valid */
2976 scan->tx_cmd.len = cpu_to_le16(
2977 iwl_fill_probe_req(priv,
2978 (struct ieee80211_mgmt *)scan->data,
2979 iwl_bcast_addr, NULL, 0,
2980 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2981 }
2982 /* select Rx antennas */
2983 scan->flags |= iwl3945_get_antenna_flags(priv);
2984
2985 scan->channel_count =
2986 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2987 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
2988
2989 if (scan->channel_count == 0) {
2990 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2991 goto done;
2992 }
2993
2994 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2995 scan->channel_count * sizeof(struct iwl3945_scan_channel);
2996 cmd.data = scan;
2997 scan->len = cpu_to_le16(cmd.len);
2998
2999 set_bit(STATUS_SCAN_HW, &priv->status);
3000 if (iwl_send_cmd_sync(priv, &cmd))
3001 goto done;
3002
3003 queue_delayed_work(priv->workqueue, &priv->scan_check,
3004 IWL_SCAN_CHECK_WATCHDOG);
3005
3006 return;
3007
3008 done:
3009 /* can not perform scan make sure we clear scanning
3010 * bits from status so next scan request can be performed.
3011 * if we dont clear scanning status bit here all next scan
3012 * will fail
3013 */
3014 clear_bit(STATUS_SCAN_HW, &priv->status);
3015 clear_bit(STATUS_SCANNING, &priv->status);
3016
3017 /* inform mac80211 scan aborted */
3018 queue_work(priv->workqueue, &priv->scan_completed);
3019 }
3020
3021 static void iwl3945_bg_restart(struct work_struct *data)
3022 {
3023 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3024
3025 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3026 return;
3027
3028 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3029 mutex_lock(&priv->mutex);
3030 priv->vif = NULL;
3031 priv->is_open = 0;
3032 mutex_unlock(&priv->mutex);
3033 iwl3945_down(priv);
3034 ieee80211_restart_hw(priv->hw);
3035 } else {
3036 iwl3945_down(priv);
3037
3038 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3039 return;
3040
3041 mutex_lock(&priv->mutex);
3042 __iwl3945_up(priv);
3043 mutex_unlock(&priv->mutex);
3044 }
3045 }
3046
3047 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3048 {
3049 struct iwl_priv *priv =
3050 container_of(data, struct iwl_priv, rx_replenish);
3051
3052 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3053 return;
3054
3055 mutex_lock(&priv->mutex);
3056 iwl3945_rx_replenish(priv);
3057 mutex_unlock(&priv->mutex);
3058 }
3059
3060 void iwl3945_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3061 {
3062 int rc = 0;
3063 struct ieee80211_conf *conf = NULL;
3064
3065 if (!vif || !priv->is_open)
3066 return;
3067
3068 if (vif->type == NL80211_IFTYPE_AP) {
3069 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3070 return;
3071 }
3072
3073 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3074 vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3075
3076 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3077 return;
3078
3079 iwl_scan_cancel_timeout(priv, 200);
3080
3081 conf = ieee80211_get_hw_conf(priv->hw);
3082
3083 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3084 iwlcore_commit_rxon(priv);
3085
3086 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3087 iwl_setup_rxon_timing(priv, vif);
3088 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3089 sizeof(priv->rxon_timing), &priv->rxon_timing);
3090 if (rc)
3091 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3092 "Attempting to continue.\n");
3093
3094 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3095
3096 priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3097
3098 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3099 vif->bss_conf.aid, vif->bss_conf.beacon_int);
3100
3101 if (vif->bss_conf.use_short_preamble)
3102 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3103 else
3104 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3105
3106 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3107 if (vif->bss_conf.use_short_slot)
3108 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3109 else
3110 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3111 }
3112
3113 iwlcore_commit_rxon(priv);
3114
3115 switch (vif->type) {
3116 case NL80211_IFTYPE_STATION:
3117 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3118 break;
3119 case NL80211_IFTYPE_ADHOC:
3120 iwl3945_send_beacon_cmd(priv);
3121 break;
3122 default:
3123 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3124 __func__, vif->type);
3125 break;
3126 }
3127 }
3128
3129 /*****************************************************************************
3130 *
3131 * mac80211 entry point functions
3132 *
3133 *****************************************************************************/
3134
3135 #define UCODE_READY_TIMEOUT (2 * HZ)
3136
3137 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3138 {
3139 struct iwl_priv *priv = hw->priv;
3140 int ret;
3141
3142 IWL_DEBUG_MAC80211(priv, "enter\n");
3143
3144 /* we should be verifying the device is ready to be opened */
3145 mutex_lock(&priv->mutex);
3146
3147 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3148 * ucode filename and max sizes are card-specific. */
3149
3150 if (!priv->ucode_code.len) {
3151 ret = iwl3945_read_ucode(priv);
3152 if (ret) {
3153 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3154 mutex_unlock(&priv->mutex);
3155 goto out_release_irq;
3156 }
3157 }
3158
3159 ret = __iwl3945_up(priv);
3160
3161 mutex_unlock(&priv->mutex);
3162
3163 if (ret)
3164 goto out_release_irq;
3165
3166 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3167
3168 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3169 * mac80211 will not be run successfully. */
3170 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3171 test_bit(STATUS_READY, &priv->status),
3172 UCODE_READY_TIMEOUT);
3173 if (!ret) {
3174 if (!test_bit(STATUS_READY, &priv->status)) {
3175 IWL_ERR(priv,
3176 "Wait for START_ALIVE timeout after %dms.\n",
3177 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3178 ret = -ETIMEDOUT;
3179 goto out_release_irq;
3180 }
3181 }
3182
3183 /* ucode is running and will send rfkill notifications,
3184 * no need to poll the killswitch state anymore */
3185 cancel_delayed_work(&priv->_3945.rfkill_poll);
3186
3187 iwl_led_start(priv);
3188
3189 priv->is_open = 1;
3190 IWL_DEBUG_MAC80211(priv, "leave\n");
3191 return 0;
3192
3193 out_release_irq:
3194 priv->is_open = 0;
3195 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3196 return ret;
3197 }
3198
3199 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3200 {
3201 struct iwl_priv *priv = hw->priv;
3202
3203 IWL_DEBUG_MAC80211(priv, "enter\n");
3204
3205 if (!priv->is_open) {
3206 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3207 return;
3208 }
3209
3210 priv->is_open = 0;
3211
3212 if (iwl_is_ready_rf(priv)) {
3213 /* stop mac, cancel any scan request and clear
3214 * RXON_FILTER_ASSOC_MSK BIT
3215 */
3216 mutex_lock(&priv->mutex);
3217 iwl_scan_cancel_timeout(priv, 100);
3218 mutex_unlock(&priv->mutex);
3219 }
3220
3221 iwl3945_down(priv);
3222
3223 flush_workqueue(priv->workqueue);
3224
3225 /* start polling the killswitch state again */
3226 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
3227 round_jiffies_relative(2 * HZ));
3228
3229 IWL_DEBUG_MAC80211(priv, "leave\n");
3230 }
3231
3232 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3233 {
3234 struct iwl_priv *priv = hw->priv;
3235
3236 IWL_DEBUG_MAC80211(priv, "enter\n");
3237
3238 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3239 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3240
3241 if (iwl3945_tx_skb(priv, skb))
3242 dev_kfree_skb_any(skb);
3243
3244 IWL_DEBUG_MAC80211(priv, "leave\n");
3245 return NETDEV_TX_OK;
3246 }
3247
3248 void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3249 {
3250 int rc = 0;
3251
3252 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3253 return;
3254
3255 /* The following should be done only at AP bring up */
3256 if (!(iwl_is_associated(priv))) {
3257
3258 /* RXON - unassoc (to set timing command) */
3259 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3260 iwlcore_commit_rxon(priv);
3261
3262 /* RXON Timing */
3263 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3264 iwl_setup_rxon_timing(priv, vif);
3265 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3266 sizeof(priv->rxon_timing),
3267 &priv->rxon_timing);
3268 if (rc)
3269 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3270 "Attempting to continue.\n");
3271
3272 priv->staging_rxon.assoc_id = 0;
3273
3274 if (vif->bss_conf.use_short_preamble)
3275 priv->staging_rxon.flags |=
3276 RXON_FLG_SHORT_PREAMBLE_MSK;
3277 else
3278 priv->staging_rxon.flags &=
3279 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3280
3281 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3282 if (vif->bss_conf.use_short_slot)
3283 priv->staging_rxon.flags |=
3284 RXON_FLG_SHORT_SLOT_MSK;
3285 else
3286 priv->staging_rxon.flags &=
3287 ~RXON_FLG_SHORT_SLOT_MSK;
3288 }
3289 /* restore RXON assoc */
3290 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3291 iwlcore_commit_rxon(priv);
3292 }
3293 iwl3945_send_beacon_cmd(priv);
3294
3295 /* FIXME - we need to add code here to detect a totally new
3296 * configuration, reset the AP, unassoc, rxon timing, assoc,
3297 * clear sta table, add BCAST sta... */
3298 }
3299
3300 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3301 struct ieee80211_vif *vif,
3302 struct ieee80211_sta *sta,
3303 struct ieee80211_key_conf *key)
3304 {
3305 struct iwl_priv *priv = hw->priv;
3306 int ret = 0;
3307 u8 sta_id = IWL_INVALID_STATION;
3308 u8 static_key;
3309
3310 IWL_DEBUG_MAC80211(priv, "enter\n");
3311
3312 if (iwl3945_mod_params.sw_crypto) {
3313 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3314 return -EOPNOTSUPP;
3315 }
3316
3317 static_key = !iwl_is_associated(priv);
3318
3319 if (!static_key) {
3320 sta_id = iwl_sta_id_or_broadcast(priv, sta);
3321 if (sta_id == IWL_INVALID_STATION)
3322 return -EINVAL;
3323 }
3324
3325 mutex_lock(&priv->mutex);
3326 iwl_scan_cancel_timeout(priv, 100);
3327
3328 switch (cmd) {
3329 case SET_KEY:
3330 if (static_key)
3331 ret = iwl3945_set_static_key(priv, key);
3332 else
3333 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3334 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3335 break;
3336 case DISABLE_KEY:
3337 if (static_key)
3338 ret = iwl3945_remove_static_key(priv);
3339 else
3340 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3341 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3342 break;
3343 default:
3344 ret = -EINVAL;
3345 }
3346
3347 mutex_unlock(&priv->mutex);
3348 IWL_DEBUG_MAC80211(priv, "leave\n");
3349
3350 return ret;
3351 }
3352
3353 static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
3354 struct ieee80211_vif *vif,
3355 struct ieee80211_sta *sta)
3356 {
3357 struct iwl_priv *priv = hw->priv;
3358 struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3359 int ret;
3360 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3361 u8 sta_id;
3362
3363 sta_priv->common.sta_id = IWL_INVALID_STATION;
3364
3365 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3366 sta->addr);
3367
3368 ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3369 &sta_id);
3370 if (ret) {
3371 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3372 sta->addr, ret);
3373 /* Should we return success if return code is EEXIST ? */
3374 return ret;
3375 }
3376
3377 sta_priv->common.sta_id = sta_id;
3378
3379 /* Initialize rate scaling */
3380 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3381 sta->addr);
3382 iwl3945_rs_rate_init(priv, sta, sta_id);
3383
3384 return 0;
3385 }
3386 /*****************************************************************************
3387 *
3388 * sysfs attributes
3389 *
3390 *****************************************************************************/
3391
3392 #ifdef CONFIG_IWLWIFI_DEBUG
3393
3394 /*
3395 * The following adds a new attribute to the sysfs representation
3396 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3397 * used for controlling the debug level.
3398 *
3399 * See the level definitions in iwl for details.
3400 *
3401 * The debug_level being managed using sysfs below is a per device debug
3402 * level that is used instead of the global debug level if it (the per
3403 * device debug level) is set.
3404 */
3405 static ssize_t show_debug_level(struct device *d,
3406 struct device_attribute *attr, char *buf)
3407 {
3408 struct iwl_priv *priv = dev_get_drvdata(d);
3409 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3410 }
3411 static ssize_t store_debug_level(struct device *d,
3412 struct device_attribute *attr,
3413 const char *buf, size_t count)
3414 {
3415 struct iwl_priv *priv = dev_get_drvdata(d);
3416 unsigned long val;
3417 int ret;
3418
3419 ret = strict_strtoul(buf, 0, &val);
3420 if (ret)
3421 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3422 else {
3423 priv->debug_level = val;
3424 if (iwl_alloc_traffic_mem(priv))
3425 IWL_ERR(priv,
3426 "Not enough memory to generate traffic log\n");
3427 }
3428 return strnlen(buf, count);
3429 }
3430
3431 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3432 show_debug_level, store_debug_level);
3433
3434 #endif /* CONFIG_IWLWIFI_DEBUG */
3435
3436 static ssize_t show_temperature(struct device *d,
3437 struct device_attribute *attr, char *buf)
3438 {
3439 struct iwl_priv *priv = dev_get_drvdata(d);
3440
3441 if (!iwl_is_alive(priv))
3442 return -EAGAIN;
3443
3444 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3445 }
3446
3447 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3448
3449 static ssize_t show_tx_power(struct device *d,
3450 struct device_attribute *attr, char *buf)
3451 {
3452 struct iwl_priv *priv = dev_get_drvdata(d);
3453 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3454 }
3455
3456 static ssize_t store_tx_power(struct device *d,
3457 struct device_attribute *attr,
3458 const char *buf, size_t count)
3459 {
3460 struct iwl_priv *priv = dev_get_drvdata(d);
3461 char *p = (char *)buf;
3462 u32 val;
3463
3464 val = simple_strtoul(p, &p, 10);
3465 if (p == buf)
3466 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3467 else
3468 iwl3945_hw_reg_set_txpower(priv, val);
3469
3470 return count;
3471 }
3472
3473 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3474
3475 static ssize_t show_flags(struct device *d,
3476 struct device_attribute *attr, char *buf)
3477 {
3478 struct iwl_priv *priv = dev_get_drvdata(d);
3479
3480 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3481 }
3482
3483 static ssize_t store_flags(struct device *d,
3484 struct device_attribute *attr,
3485 const char *buf, size_t count)
3486 {
3487 struct iwl_priv *priv = dev_get_drvdata(d);
3488 u32 flags = simple_strtoul(buf, NULL, 0);
3489
3490 mutex_lock(&priv->mutex);
3491 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3492 /* Cancel any currently running scans... */
3493 if (iwl_scan_cancel_timeout(priv, 100))
3494 IWL_WARN(priv, "Could not cancel scan.\n");
3495 else {
3496 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3497 flags);
3498 priv->staging_rxon.flags = cpu_to_le32(flags);
3499 iwlcore_commit_rxon(priv);
3500 }
3501 }
3502 mutex_unlock(&priv->mutex);
3503
3504 return count;
3505 }
3506
3507 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3508
3509 static ssize_t show_filter_flags(struct device *d,
3510 struct device_attribute *attr, char *buf)
3511 {
3512 struct iwl_priv *priv = dev_get_drvdata(d);
3513
3514 return sprintf(buf, "0x%04X\n",
3515 le32_to_cpu(priv->active_rxon.filter_flags));
3516 }
3517
3518 static ssize_t store_filter_flags(struct device *d,
3519 struct device_attribute *attr,
3520 const char *buf, size_t count)
3521 {
3522 struct iwl_priv *priv = dev_get_drvdata(d);
3523 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3524
3525 mutex_lock(&priv->mutex);
3526 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3527 /* Cancel any currently running scans... */
3528 if (iwl_scan_cancel_timeout(priv, 100))
3529 IWL_WARN(priv, "Could not cancel scan.\n");
3530 else {
3531 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3532 "0x%04X\n", filter_flags);
3533 priv->staging_rxon.filter_flags =
3534 cpu_to_le32(filter_flags);
3535 iwlcore_commit_rxon(priv);
3536 }
3537 }
3538 mutex_unlock(&priv->mutex);
3539
3540 return count;
3541 }
3542
3543 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3544 store_filter_flags);
3545
3546 static ssize_t show_measurement(struct device *d,
3547 struct device_attribute *attr, char *buf)
3548 {
3549 struct iwl_priv *priv = dev_get_drvdata(d);
3550 struct iwl_spectrum_notification measure_report;
3551 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3552 u8 *data = (u8 *)&measure_report;
3553 unsigned long flags;
3554
3555 spin_lock_irqsave(&priv->lock, flags);
3556 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3557 spin_unlock_irqrestore(&priv->lock, flags);
3558 return 0;
3559 }
3560 memcpy(&measure_report, &priv->measure_report, size);
3561 priv->measurement_status = 0;
3562 spin_unlock_irqrestore(&priv->lock, flags);
3563
3564 while (size && (PAGE_SIZE - len)) {
3565 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3566 PAGE_SIZE - len, 1);
3567 len = strlen(buf);
3568 if (PAGE_SIZE - len)
3569 buf[len++] = '\n';
3570
3571 ofs += 16;
3572 size -= min(size, 16U);
3573 }
3574
3575 return len;
3576 }
3577
3578 static ssize_t store_measurement(struct device *d,
3579 struct device_attribute *attr,
3580 const char *buf, size_t count)
3581 {
3582 struct iwl_priv *priv = dev_get_drvdata(d);
3583 struct ieee80211_measurement_params params = {
3584 .channel = le16_to_cpu(priv->active_rxon.channel),
3585 .start_time = cpu_to_le64(priv->_3945.last_tsf),
3586 .duration = cpu_to_le16(1),
3587 };
3588 u8 type = IWL_MEASURE_BASIC;
3589 u8 buffer[32];
3590 u8 channel;
3591
3592 if (count) {
3593 char *p = buffer;
3594 strncpy(buffer, buf, min(sizeof(buffer), count));
3595 channel = simple_strtoul(p, NULL, 0);
3596 if (channel)
3597 params.channel = channel;
3598
3599 p = buffer;
3600 while (*p && *p != ' ')
3601 p++;
3602 if (*p)
3603 type = simple_strtoul(p + 1, NULL, 0);
3604 }
3605
3606 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3607 "channel %d (for '%s')\n", type, params.channel, buf);
3608 iwl3945_get_measurement(priv, &params, type);
3609
3610 return count;
3611 }
3612
3613 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3614 show_measurement, store_measurement);
3615
3616 static ssize_t store_retry_rate(struct device *d,
3617 struct device_attribute *attr,
3618 const char *buf, size_t count)
3619 {
3620 struct iwl_priv *priv = dev_get_drvdata(d);
3621
3622 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3623 if (priv->retry_rate <= 0)
3624 priv->retry_rate = 1;
3625
3626 return count;
3627 }
3628
3629 static ssize_t show_retry_rate(struct device *d,
3630 struct device_attribute *attr, char *buf)
3631 {
3632 struct iwl_priv *priv = dev_get_drvdata(d);
3633 return sprintf(buf, "%d", priv->retry_rate);
3634 }
3635
3636 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3637 store_retry_rate);
3638
3639
3640 static ssize_t show_channels(struct device *d,
3641 struct device_attribute *attr, char *buf)
3642 {
3643 /* all this shit doesn't belong into sysfs anyway */
3644 return 0;
3645 }
3646
3647 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3648
3649 static ssize_t show_antenna(struct device *d,
3650 struct device_attribute *attr, char *buf)
3651 {
3652 struct iwl_priv *priv = dev_get_drvdata(d);
3653
3654 if (!iwl_is_alive(priv))
3655 return -EAGAIN;
3656
3657 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3658 }
3659
3660 static ssize_t store_antenna(struct device *d,
3661 struct device_attribute *attr,
3662 const char *buf, size_t count)
3663 {
3664 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3665 int ant;
3666
3667 if (count == 0)
3668 return 0;
3669
3670 if (sscanf(buf, "%1i", &ant) != 1) {
3671 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3672 return count;
3673 }
3674
3675 if ((ant >= 0) && (ant <= 2)) {
3676 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3677 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3678 } else
3679 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3680
3681
3682 return count;
3683 }
3684
3685 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3686
3687 static ssize_t show_status(struct device *d,
3688 struct device_attribute *attr, char *buf)
3689 {
3690 struct iwl_priv *priv = dev_get_drvdata(d);
3691 if (!iwl_is_alive(priv))
3692 return -EAGAIN;
3693 return sprintf(buf, "0x%08x\n", (int)priv->status);
3694 }
3695
3696 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3697
3698 static ssize_t dump_error_log(struct device *d,
3699 struct device_attribute *attr,
3700 const char *buf, size_t count)
3701 {
3702 struct iwl_priv *priv = dev_get_drvdata(d);
3703 char *p = (char *)buf;
3704
3705 if (p[0] == '1')
3706 iwl3945_dump_nic_error_log(priv);
3707
3708 return strnlen(buf, count);
3709 }
3710
3711 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3712
3713 /*****************************************************************************
3714 *
3715 * driver setup and tear down
3716 *
3717 *****************************************************************************/
3718
3719 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3720 {
3721 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3722
3723 init_waitqueue_head(&priv->wait_command_queue);
3724
3725 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3726 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3727 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3728 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3729 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3730 INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
3731 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3732 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3733 INIT_WORK(&priv->start_internal_scan, iwl_bg_start_internal_scan);
3734 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
3735
3736 iwl3945_hw_setup_deferred_work(priv);
3737
3738 if (priv->cfg->ops->lib->recover_from_tx_stall) {
3739 init_timer(&priv->monitor_recover);
3740 priv->monitor_recover.data = (unsigned long)priv;
3741 priv->monitor_recover.function =
3742 priv->cfg->ops->lib->recover_from_tx_stall;
3743 }
3744
3745 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3746 iwl3945_irq_tasklet, (unsigned long)priv);
3747 }
3748
3749 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3750 {
3751 iwl3945_hw_cancel_deferred_work(priv);
3752
3753 cancel_delayed_work_sync(&priv->init_alive_start);
3754 cancel_delayed_work(&priv->scan_check);
3755 cancel_delayed_work(&priv->alive_start);
3756 cancel_work_sync(&priv->start_internal_scan);
3757 cancel_work_sync(&priv->beacon_update);
3758 if (priv->cfg->ops->lib->recover_from_tx_stall)
3759 del_timer_sync(&priv->monitor_recover);
3760 }
3761
3762 static struct attribute *iwl3945_sysfs_entries[] = {
3763 &dev_attr_antenna.attr,
3764 &dev_attr_channels.attr,
3765 &dev_attr_dump_errors.attr,
3766 &dev_attr_flags.attr,
3767 &dev_attr_filter_flags.attr,
3768 &dev_attr_measurement.attr,
3769 &dev_attr_retry_rate.attr,
3770 &dev_attr_status.attr,
3771 &dev_attr_temperature.attr,
3772 &dev_attr_tx_power.attr,
3773 #ifdef CONFIG_IWLWIFI_DEBUG
3774 &dev_attr_debug_level.attr,
3775 #endif
3776 NULL
3777 };
3778
3779 static struct attribute_group iwl3945_attribute_group = {
3780 .name = NULL, /* put in device directory */
3781 .attrs = iwl3945_sysfs_entries,
3782 };
3783
3784 static struct ieee80211_ops iwl3945_hw_ops = {
3785 .tx = iwl3945_mac_tx,
3786 .start = iwl3945_mac_start,
3787 .stop = iwl3945_mac_stop,
3788 .add_interface = iwl_mac_add_interface,
3789 .remove_interface = iwl_mac_remove_interface,
3790 .config = iwl_mac_config,
3791 .configure_filter = iwl_configure_filter,
3792 .set_key = iwl3945_mac_set_key,
3793 .conf_tx = iwl_mac_conf_tx,
3794 .reset_tsf = iwl_mac_reset_tsf,
3795 .bss_info_changed = iwl_bss_info_changed,
3796 .hw_scan = iwl_mac_hw_scan,
3797 .sta_add = iwl3945_mac_sta_add,
3798 .sta_remove = iwl_mac_sta_remove,
3799 };
3800
3801 static int iwl3945_init_drv(struct iwl_priv *priv)
3802 {
3803 int ret;
3804 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3805
3806 priv->retry_rate = 1;
3807 priv->ibss_beacon = NULL;
3808
3809 spin_lock_init(&priv->sta_lock);
3810 spin_lock_init(&priv->hcmd_lock);
3811
3812 INIT_LIST_HEAD(&priv->free_frames);
3813
3814 mutex_init(&priv->mutex);
3815 mutex_init(&priv->sync_cmd_mutex);
3816
3817 priv->ieee_channels = NULL;
3818 priv->ieee_rates = NULL;
3819 priv->band = IEEE80211_BAND_2GHZ;
3820
3821 priv->iw_mode = NL80211_IFTYPE_STATION;
3822 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3823
3824 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3825
3826 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3827 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3828 eeprom->version);
3829 ret = -EINVAL;
3830 goto err;
3831 }
3832 ret = iwl_init_channel_map(priv);
3833 if (ret) {
3834 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3835 goto err;
3836 }
3837
3838 /* Set up txpower settings in driver for all channels */
3839 if (iwl3945_txpower_set_from_eeprom(priv)) {
3840 ret = -EIO;
3841 goto err_free_channel_map;
3842 }
3843
3844 ret = iwlcore_init_geos(priv);
3845 if (ret) {
3846 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3847 goto err_free_channel_map;
3848 }
3849 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3850
3851 return 0;
3852
3853 err_free_channel_map:
3854 iwl_free_channel_map(priv);
3855 err:
3856 return ret;
3857 }
3858
3859 #define IWL3945_MAX_PROBE_REQUEST 200
3860
3861 static int iwl3945_setup_mac(struct iwl_priv *priv)
3862 {
3863 int ret;
3864 struct ieee80211_hw *hw = priv->hw;
3865
3866 hw->rate_control_algorithm = "iwl-3945-rs";
3867 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3868 hw->vif_data_size = sizeof(struct iwl_vif_priv);
3869
3870 /* Tell mac80211 our characteristics */
3871 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3872 IEEE80211_HW_SPECTRUM_MGMT;
3873
3874 if (!priv->cfg->broken_powersave)
3875 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3876 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3877
3878 hw->wiphy->interface_modes =
3879 BIT(NL80211_IFTYPE_STATION) |
3880 BIT(NL80211_IFTYPE_ADHOC);
3881
3882 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3883 WIPHY_FLAG_DISABLE_BEACON_HINTS;
3884
3885 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3886 /* we create the 802.11 header and a zero-length SSID element */
3887 hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
3888
3889 /* Default value; 4 EDCA QOS priorities */
3890 hw->queues = 4;
3891
3892 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3893 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3894 &priv->bands[IEEE80211_BAND_2GHZ];
3895
3896 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3897 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3898 &priv->bands[IEEE80211_BAND_5GHZ];
3899
3900 ret = ieee80211_register_hw(priv->hw);
3901 if (ret) {
3902 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3903 return ret;
3904 }
3905 priv->mac80211_registered = 1;
3906
3907 return 0;
3908 }
3909
3910 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3911 {
3912 int err = 0;
3913 struct iwl_priv *priv;
3914 struct ieee80211_hw *hw;
3915 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3916 struct iwl3945_eeprom *eeprom;
3917 unsigned long flags;
3918
3919 /***********************
3920 * 1. Allocating HW data
3921 * ********************/
3922
3923 /* mac80211 allocates memory for this device instance, including
3924 * space for this driver's private structure */
3925 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
3926 if (hw == NULL) {
3927 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
3928 err = -ENOMEM;
3929 goto out;
3930 }
3931 priv = hw->priv;
3932 SET_IEEE80211_DEV(hw, &pdev->dev);
3933
3934 /*
3935 * Disabling hardware scan means that mac80211 will perform scans
3936 * "the hard way", rather than using device's scan.
3937 */
3938 if (iwl3945_mod_params.disable_hw_scan) {
3939 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
3940 iwl3945_hw_ops.hw_scan = NULL;
3941 }
3942
3943
3944 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3945 priv->cfg = cfg;
3946 priv->pci_dev = pdev;
3947 priv->inta_mask = CSR_INI_SET_MASK;
3948
3949 #ifdef CONFIG_IWLWIFI_DEBUG
3950 atomic_set(&priv->restrict_refcnt, 0);
3951 #endif
3952 if (iwl_alloc_traffic_mem(priv))
3953 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3954
3955 /***************************
3956 * 2. Initializing PCI bus
3957 * *************************/
3958 if (pci_enable_device(pdev)) {
3959 err = -ENODEV;
3960 goto out_ieee80211_free_hw;
3961 }
3962
3963 pci_set_master(pdev);
3964
3965 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3966 if (!err)
3967 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3968 if (err) {
3969 IWL_WARN(priv, "No suitable DMA available.\n");
3970 goto out_pci_disable_device;
3971 }
3972
3973 pci_set_drvdata(pdev, priv);
3974 err = pci_request_regions(pdev, DRV_NAME);
3975 if (err)
3976 goto out_pci_disable_device;
3977
3978 /***********************
3979 * 3. Read REV Register
3980 * ********************/
3981 priv->hw_base = pci_iomap(pdev, 0, 0);
3982 if (!priv->hw_base) {
3983 err = -ENODEV;
3984 goto out_pci_release_regions;
3985 }
3986
3987 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3988 (unsigned long long) pci_resource_len(pdev, 0));
3989 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3990
3991 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3992 * PCI Tx retries from interfering with C3 CPU state */
3993 pci_write_config_byte(pdev, 0x41, 0x00);
3994
3995 /* these spin locks will be used in apm_ops.init and EEPROM access
3996 * we should init now
3997 */
3998 spin_lock_init(&priv->reg_lock);
3999 spin_lock_init(&priv->lock);
4000
4001 /*
4002 * stop and reset the on-board processor just in case it is in a
4003 * strange state ... like being left stranded by a primary kernel
4004 * and this is now the kdump kernel trying to start up
4005 */
4006 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4007
4008 /***********************
4009 * 4. Read EEPROM
4010 * ********************/
4011
4012 /* Read the EEPROM */
4013 err = iwl_eeprom_init(priv);
4014 if (err) {
4015 IWL_ERR(priv, "Unable to init EEPROM\n");
4016 goto out_iounmap;
4017 }
4018 /* MAC Address location in EEPROM same for 3945/4965 */
4019 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4020 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address);
4021 SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address);
4022
4023 /***********************
4024 * 5. Setup HW Constants
4025 * ********************/
4026 /* Device-specific setup */
4027 if (iwl3945_hw_set_hw_params(priv)) {
4028 IWL_ERR(priv, "failed to set hw settings\n");
4029 goto out_eeprom_free;
4030 }
4031
4032 /***********************
4033 * 6. Setup priv
4034 * ********************/
4035
4036 err = iwl3945_init_drv(priv);
4037 if (err) {
4038 IWL_ERR(priv, "initializing driver failed\n");
4039 goto out_unset_hw_params;
4040 }
4041
4042 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4043 priv->cfg->name);
4044
4045 /***********************
4046 * 7. Setup Services
4047 * ********************/
4048
4049 spin_lock_irqsave(&priv->lock, flags);
4050 iwl_disable_interrupts(priv);
4051 spin_unlock_irqrestore(&priv->lock, flags);
4052
4053 pci_enable_msi(priv->pci_dev);
4054
4055 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4056 IRQF_SHARED, DRV_NAME, priv);
4057 if (err) {
4058 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4059 goto out_disable_msi;
4060 }
4061
4062 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4063 if (err) {
4064 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4065 goto out_release_irq;
4066 }
4067
4068 iwl_set_rxon_channel(priv,
4069 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4070 iwl3945_setup_deferred_work(priv);
4071 iwl3945_setup_rx_handlers(priv);
4072 iwl_power_initialize(priv);
4073
4074 /*********************************
4075 * 8. Setup and Register mac80211
4076 * *******************************/
4077
4078 iwl_enable_interrupts(priv);
4079
4080 err = iwl3945_setup_mac(priv);
4081 if (err)
4082 goto out_remove_sysfs;
4083
4084 err = iwl_dbgfs_register(priv, DRV_NAME);
4085 if (err)
4086 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4087
4088 /* Start monitoring the killswitch */
4089 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
4090 2 * HZ);
4091
4092 return 0;
4093
4094 out_remove_sysfs:
4095 destroy_workqueue(priv->workqueue);
4096 priv->workqueue = NULL;
4097 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4098 out_release_irq:
4099 free_irq(priv->pci_dev->irq, priv);
4100 out_disable_msi:
4101 pci_disable_msi(priv->pci_dev);
4102 iwlcore_free_geos(priv);
4103 iwl_free_channel_map(priv);
4104 out_unset_hw_params:
4105 iwl3945_unset_hw_params(priv);
4106 out_eeprom_free:
4107 iwl_eeprom_free(priv);
4108 out_iounmap:
4109 pci_iounmap(pdev, priv->hw_base);
4110 out_pci_release_regions:
4111 pci_release_regions(pdev);
4112 out_pci_disable_device:
4113 pci_set_drvdata(pdev, NULL);
4114 pci_disable_device(pdev);
4115 out_ieee80211_free_hw:
4116 iwl_free_traffic_mem(priv);
4117 ieee80211_free_hw(priv->hw);
4118 out:
4119 return err;
4120 }
4121
4122 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4123 {
4124 struct iwl_priv *priv = pci_get_drvdata(pdev);
4125 unsigned long flags;
4126
4127 if (!priv)
4128 return;
4129
4130 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4131
4132 iwl_dbgfs_unregister(priv);
4133
4134 set_bit(STATUS_EXIT_PENDING, &priv->status);
4135
4136 if (priv->mac80211_registered) {
4137 ieee80211_unregister_hw(priv->hw);
4138 priv->mac80211_registered = 0;
4139 } else {
4140 iwl3945_down(priv);
4141 }
4142
4143 /*
4144 * Make sure device is reset to low power before unloading driver.
4145 * This may be redundant with iwl_down(), but there are paths to
4146 * run iwl_down() without calling apm_ops.stop(), and there are
4147 * paths to avoid running iwl_down() at all before leaving driver.
4148 * This (inexpensive) call *makes sure* device is reset.
4149 */
4150 priv->cfg->ops->lib->apm_ops.stop(priv);
4151
4152 /* make sure we flush any pending irq or
4153 * tasklet for the driver
4154 */
4155 spin_lock_irqsave(&priv->lock, flags);
4156 iwl_disable_interrupts(priv);
4157 spin_unlock_irqrestore(&priv->lock, flags);
4158
4159 iwl_synchronize_irq(priv);
4160
4161 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4162
4163 cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
4164
4165 iwl3945_dealloc_ucode_pci(priv);
4166
4167 if (priv->rxq.bd)
4168 iwl3945_rx_queue_free(priv, &priv->rxq);
4169 iwl3945_hw_txq_ctx_free(priv);
4170
4171 iwl3945_unset_hw_params(priv);
4172
4173 /*netif_stop_queue(dev); */
4174 flush_workqueue(priv->workqueue);
4175
4176 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4177 * priv->workqueue... so we can't take down the workqueue
4178 * until now... */
4179 destroy_workqueue(priv->workqueue);
4180 priv->workqueue = NULL;
4181 iwl_free_traffic_mem(priv);
4182
4183 free_irq(pdev->irq, priv);
4184 pci_disable_msi(pdev);
4185
4186 pci_iounmap(pdev, priv->hw_base);
4187 pci_release_regions(pdev);
4188 pci_disable_device(pdev);
4189 pci_set_drvdata(pdev, NULL);
4190
4191 iwl_free_channel_map(priv);
4192 iwlcore_free_geos(priv);
4193 kfree(priv->scan_cmd);
4194 if (priv->ibss_beacon)
4195 dev_kfree_skb(priv->ibss_beacon);
4196
4197 ieee80211_free_hw(priv->hw);
4198 }
4199
4200
4201 /*****************************************************************************
4202 *
4203 * driver and module entry point
4204 *
4205 *****************************************************************************/
4206
4207 static struct pci_driver iwl3945_driver = {
4208 .name = DRV_NAME,
4209 .id_table = iwl3945_hw_card_ids,
4210 .probe = iwl3945_pci_probe,
4211 .remove = __devexit_p(iwl3945_pci_remove),
4212 #ifdef CONFIG_PM
4213 .suspend = iwl_pci_suspend,
4214 .resume = iwl_pci_resume,
4215 #endif
4216 };
4217
4218 static int __init iwl3945_init(void)
4219 {
4220
4221 int ret;
4222 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4223 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4224
4225 ret = iwl3945_rate_control_register();
4226 if (ret) {
4227 printk(KERN_ERR DRV_NAME
4228 "Unable to register rate control algorithm: %d\n", ret);
4229 return ret;
4230 }
4231
4232 ret = pci_register_driver(&iwl3945_driver);
4233 if (ret) {
4234 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4235 goto error_register;
4236 }
4237
4238 return ret;
4239
4240 error_register:
4241 iwl3945_rate_control_unregister();
4242 return ret;
4243 }
4244
4245 static void __exit iwl3945_exit(void)
4246 {
4247 pci_unregister_driver(&iwl3945_driver);
4248 iwl3945_rate_control_unregister();
4249 }
4250
4251 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4252
4253 module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
4254 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4255 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
4256 MODULE_PARM_DESC(swcrypto,
4257 "using software crypto (default 1 [software])\n");
4258 #ifdef CONFIG_IWLWIFI_DEBUG
4259 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4260 MODULE_PARM_DESC(debug, "debug output mask");
4261 #endif
4262 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
4263 int, S_IRUGO);
4264 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4265 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
4266 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4267
4268 module_exit(iwl3945_exit);
4269 module_init(iwl3945_init);
Linux kernel - Deliverables
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