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Merge git://git.infradead.org/mtd-2.6
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/ieee80211_radiotap.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #include "iwl-3945-core.h"
50 #include "iwl-3945.h"
51 #include "iwl-helpers.h"
52
53 #ifdef CONFIG_IWL3945_DEBUG
54 u32 iwl3945_debug_level;
55 #endif
56
57 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
59
60 /******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66 /* module parameters */
67 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68 static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69 static int iwl3945_param_disable; /* def: 0 = enable radio */
70 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
71 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72 static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
73 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
74
75 /*
76 * module name, copyright, version, etc.
77 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
78 */
79
80 #define DRV_DESCRIPTION \
81 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
82
83 #ifdef CONFIG_IWL3945_DEBUG
84 #define VD "d"
85 #else
86 #define VD
87 #endif
88
89 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
90 #define VS "s"
91 #else
92 #define VS
93 #endif
94
95 #define IWLWIFI_VERSION "1.2.26k" VD VS
96 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
97 #define DRV_VERSION IWLWIFI_VERSION
98
99
100 MODULE_DESCRIPTION(DRV_DESCRIPTION);
101 MODULE_VERSION(DRV_VERSION);
102 MODULE_AUTHOR(DRV_COPYRIGHT);
103 MODULE_LICENSE("GPL");
104
105 static const struct ieee80211_supported_band *iwl3945_get_band(
106 struct iwl3945_priv *priv, enum ieee80211_band band)
107 {
108 return priv->hw->wiphy->bands[band];
109 }
110
111 static int iwl3945_is_empty_essid(const char *essid, int essid_len)
112 {
113 /* Single white space is for Linksys APs */
114 if (essid_len == 1 && essid[0] == ' ')
115 return 1;
116
117 /* Otherwise, if the entire essid is 0, we assume it is hidden */
118 while (essid_len) {
119 essid_len--;
120 if (essid[essid_len] != '\0')
121 return 0;
122 }
123
124 return 1;
125 }
126
127 static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
128 {
129 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
130 const char *s = essid;
131 char *d = escaped;
132
133 if (iwl3945_is_empty_essid(essid, essid_len)) {
134 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
135 return escaped;
136 }
137
138 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
139 while (essid_len--) {
140 if (*s == '\0') {
141 *d++ = '\\';
142 *d++ = '0';
143 s++;
144 } else
145 *d++ = *s++;
146 }
147 *d = '\0';
148 return escaped;
149 }
150
151 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
152 * DMA services
153 *
154 * Theory of operation
155 *
156 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
157 * of buffer descriptors, each of which points to one or more data buffers for
158 * the device to read from or fill. Driver and device exchange status of each
159 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
160 * entries in each circular buffer, to protect against confusing empty and full
161 * queue states.
162 *
163 * The device reads or writes the data in the queues via the device's several
164 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
165 *
166 * For Tx queue, there are low mark and high mark limits. If, after queuing
167 * the packet for Tx, free space become < low mark, Tx queue stopped. When
168 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
169 * Tx queue resumed.
170 *
171 * The 3945 operates with six queues: One receive queue, one transmit queue
172 * (#4) for sending commands to the device firmware, and four transmit queues
173 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
174 ***************************************************/
175
176 int iwl3945_queue_space(const struct iwl3945_queue *q)
177 {
178 int s = q->read_ptr - q->write_ptr;
179
180 if (q->read_ptr > q->write_ptr)
181 s -= q->n_bd;
182
183 if (s <= 0)
184 s += q->n_window;
185 /* keep some reserve to not confuse empty and full situations */
186 s -= 2;
187 if (s < 0)
188 s = 0;
189 return s;
190 }
191
192 int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
193 {
194 return q->write_ptr > q->read_ptr ?
195 (i >= q->read_ptr && i < q->write_ptr) :
196 !(i < q->read_ptr && i >= q->write_ptr);
197 }
198
199
200 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
201 {
202 /* This is for scan command, the big buffer at end of command array */
203 if (is_huge)
204 return q->n_window; /* must be power of 2 */
205
206 /* Otherwise, use normal size buffers */
207 return index & (q->n_window - 1);
208 }
209
210 /**
211 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
212 */
213 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
214 int count, int slots_num, u32 id)
215 {
216 q->n_bd = count;
217 q->n_window = slots_num;
218 q->id = id;
219
220 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
221 * and iwl_queue_dec_wrap are broken. */
222 BUG_ON(!is_power_of_2(count));
223
224 /* slots_num must be power-of-two size, otherwise
225 * get_cmd_index is broken. */
226 BUG_ON(!is_power_of_2(slots_num));
227
228 q->low_mark = q->n_window / 4;
229 if (q->low_mark < 4)
230 q->low_mark = 4;
231
232 q->high_mark = q->n_window / 8;
233 if (q->high_mark < 2)
234 q->high_mark = 2;
235
236 q->write_ptr = q->read_ptr = 0;
237
238 return 0;
239 }
240
241 /**
242 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
243 */
244 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
245 struct iwl3945_tx_queue *txq, u32 id)
246 {
247 struct pci_dev *dev = priv->pci_dev;
248
249 /* Driver private data, only for Tx (not command) queues,
250 * not shared with device. */
251 if (id != IWL_CMD_QUEUE_NUM) {
252 txq->txb = kmalloc(sizeof(txq->txb[0]) *
253 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
254 if (!txq->txb) {
255 IWL_ERROR("kmalloc for auxiliary BD "
256 "structures failed\n");
257 goto error;
258 }
259 } else
260 txq->txb = NULL;
261
262 /* Circular buffer of transmit frame descriptors (TFDs),
263 * shared with device */
264 txq->bd = pci_alloc_consistent(dev,
265 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
266 &txq->q.dma_addr);
267
268 if (!txq->bd) {
269 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
270 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
271 goto error;
272 }
273 txq->q.id = id;
274
275 return 0;
276
277 error:
278 if (txq->txb) {
279 kfree(txq->txb);
280 txq->txb = NULL;
281 }
282
283 return -ENOMEM;
284 }
285
286 /**
287 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
288 */
289 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
290 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
291 {
292 struct pci_dev *dev = priv->pci_dev;
293 int len;
294 int rc = 0;
295
296 /*
297 * Alloc buffer array for commands (Tx or other types of commands).
298 * For the command queue (#4), allocate command space + one big
299 * command for scan, since scan command is very huge; the system will
300 * not have two scans at the same time, so only one is needed.
301 * For data Tx queues (all other queues), no super-size command
302 * space is needed.
303 */
304 len = sizeof(struct iwl3945_cmd) * slots_num;
305 if (txq_id == IWL_CMD_QUEUE_NUM)
306 len += IWL_MAX_SCAN_SIZE;
307 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
308 if (!txq->cmd)
309 return -ENOMEM;
310
311 /* Alloc driver data array and TFD circular buffer */
312 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
313 if (rc) {
314 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
315
316 return -ENOMEM;
317 }
318 txq->need_update = 0;
319
320 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
321 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
322 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
323
324 /* Initialize queue high/low-water, head/tail indexes */
325 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
326
327 /* Tell device where to find queue, enable DMA channel. */
328 iwl3945_hw_tx_queue_init(priv, txq);
329
330 return 0;
331 }
332
333 /**
334 * iwl3945_tx_queue_free - Deallocate DMA queue.
335 * @txq: Transmit queue to deallocate.
336 *
337 * Empty queue by removing and destroying all BD's.
338 * Free all buffers.
339 * 0-fill, but do not free "txq" descriptor structure.
340 */
341 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
342 {
343 struct iwl3945_queue *q = &txq->q;
344 struct pci_dev *dev = priv->pci_dev;
345 int len;
346
347 if (q->n_bd == 0)
348 return;
349
350 /* first, empty all BD's */
351 for (; q->write_ptr != q->read_ptr;
352 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
353 iwl3945_hw_txq_free_tfd(priv, txq);
354
355 len = sizeof(struct iwl3945_cmd) * q->n_window;
356 if (q->id == IWL_CMD_QUEUE_NUM)
357 len += IWL_MAX_SCAN_SIZE;
358
359 /* De-alloc array of command/tx buffers */
360 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
361
362 /* De-alloc circular buffer of TFDs */
363 if (txq->q.n_bd)
364 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
365 txq->q.n_bd, txq->bd, txq->q.dma_addr);
366
367 /* De-alloc array of per-TFD driver data */
368 if (txq->txb) {
369 kfree(txq->txb);
370 txq->txb = NULL;
371 }
372
373 /* 0-fill queue descriptor structure */
374 memset(txq, 0, sizeof(*txq));
375 }
376
377 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
378
379 /*************** STATION TABLE MANAGEMENT ****
380 * mac80211 should be examined to determine if sta_info is duplicating
381 * the functionality provided here
382 */
383
384 /**************************************************************/
385 #if 0 /* temporary disable till we add real remove station */
386 /**
387 * iwl3945_remove_station - Remove driver's knowledge of station.
388 *
389 * NOTE: This does not remove station from device's station table.
390 */
391 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
392 {
393 int index = IWL_INVALID_STATION;
394 int i;
395 unsigned long flags;
396
397 spin_lock_irqsave(&priv->sta_lock, flags);
398
399 if (is_ap)
400 index = IWL_AP_ID;
401 else if (is_broadcast_ether_addr(addr))
402 index = priv->hw_setting.bcast_sta_id;
403 else
404 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
405 if (priv->stations[i].used &&
406 !compare_ether_addr(priv->stations[i].sta.sta.addr,
407 addr)) {
408 index = i;
409 break;
410 }
411
412 if (unlikely(index == IWL_INVALID_STATION))
413 goto out;
414
415 if (priv->stations[index].used) {
416 priv->stations[index].used = 0;
417 priv->num_stations--;
418 }
419
420 BUG_ON(priv->num_stations < 0);
421
422 out:
423 spin_unlock_irqrestore(&priv->sta_lock, flags);
424 return 0;
425 }
426 #endif
427
428 /**
429 * iwl3945_clear_stations_table - Clear the driver's station table
430 *
431 * NOTE: This does not clear or otherwise alter the device's station table.
432 */
433 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
434 {
435 unsigned long flags;
436
437 spin_lock_irqsave(&priv->sta_lock, flags);
438
439 priv->num_stations = 0;
440 memset(priv->stations, 0, sizeof(priv->stations));
441
442 spin_unlock_irqrestore(&priv->sta_lock, flags);
443 }
444
445 /**
446 * iwl3945_add_station - Add station to station tables in driver and device
447 */
448 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
449 {
450 int i;
451 int index = IWL_INVALID_STATION;
452 struct iwl3945_station_entry *station;
453 unsigned long flags_spin;
454 DECLARE_MAC_BUF(mac);
455 u8 rate;
456
457 spin_lock_irqsave(&priv->sta_lock, flags_spin);
458 if (is_ap)
459 index = IWL_AP_ID;
460 else if (is_broadcast_ether_addr(addr))
461 index = priv->hw_setting.bcast_sta_id;
462 else
463 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
464 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
465 addr)) {
466 index = i;
467 break;
468 }
469
470 if (!priv->stations[i].used &&
471 index == IWL_INVALID_STATION)
472 index = i;
473 }
474
475 /* These two conditions has the same outcome but keep them separate
476 since they have different meaning */
477 if (unlikely(index == IWL_INVALID_STATION)) {
478 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
479 return index;
480 }
481
482 if (priv->stations[index].used &&
483 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
484 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
485 return index;
486 }
487
488 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
489 station = &priv->stations[index];
490 station->used = 1;
491 priv->num_stations++;
492
493 /* Set up the REPLY_ADD_STA command to send to device */
494 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
495 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
496 station->sta.mode = 0;
497 station->sta.sta.sta_id = index;
498 station->sta.station_flags = 0;
499
500 if (priv->band == IEEE80211_BAND_5GHZ)
501 rate = IWL_RATE_6M_PLCP;
502 else
503 rate = IWL_RATE_1M_PLCP;
504
505 /* Turn on both antennas for the station... */
506 station->sta.rate_n_flags =
507 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
508 station->current_rate.rate_n_flags =
509 le16_to_cpu(station->sta.rate_n_flags);
510
511 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
512
513 /* Add station to device's station table */
514 iwl3945_send_add_station(priv, &station->sta, flags);
515 return index;
516
517 }
518
519 /*************** DRIVER STATUS FUNCTIONS *****/
520
521 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
522 {
523 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
524 * set but EXIT_PENDING is not */
525 return test_bit(STATUS_READY, &priv->status) &&
526 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
527 !test_bit(STATUS_EXIT_PENDING, &priv->status);
528 }
529
530 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
531 {
532 return test_bit(STATUS_ALIVE, &priv->status);
533 }
534
535 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
536 {
537 return test_bit(STATUS_INIT, &priv->status);
538 }
539
540 static inline int iwl3945_is_rfkill_sw(struct iwl3945_priv *priv)
541 {
542 return test_bit(STATUS_RF_KILL_SW, &priv->status);
543 }
544
545 static inline int iwl3945_is_rfkill_hw(struct iwl3945_priv *priv)
546 {
547 return test_bit(STATUS_RF_KILL_HW, &priv->status);
548 }
549
550 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
551 {
552 return iwl3945_is_rfkill_hw(priv) ||
553 iwl3945_is_rfkill_sw(priv);
554 }
555
556 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
557 {
558
559 if (iwl3945_is_rfkill(priv))
560 return 0;
561
562 return iwl3945_is_ready(priv);
563 }
564
565 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
566
567 #define IWL_CMD(x) case x : return #x
568
569 static const char *get_cmd_string(u8 cmd)
570 {
571 switch (cmd) {
572 IWL_CMD(REPLY_ALIVE);
573 IWL_CMD(REPLY_ERROR);
574 IWL_CMD(REPLY_RXON);
575 IWL_CMD(REPLY_RXON_ASSOC);
576 IWL_CMD(REPLY_QOS_PARAM);
577 IWL_CMD(REPLY_RXON_TIMING);
578 IWL_CMD(REPLY_ADD_STA);
579 IWL_CMD(REPLY_REMOVE_STA);
580 IWL_CMD(REPLY_REMOVE_ALL_STA);
581 IWL_CMD(REPLY_3945_RX);
582 IWL_CMD(REPLY_TX);
583 IWL_CMD(REPLY_RATE_SCALE);
584 IWL_CMD(REPLY_LEDS_CMD);
585 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
586 IWL_CMD(RADAR_NOTIFICATION);
587 IWL_CMD(REPLY_QUIET_CMD);
588 IWL_CMD(REPLY_CHANNEL_SWITCH);
589 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
590 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
591 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
592 IWL_CMD(POWER_TABLE_CMD);
593 IWL_CMD(PM_SLEEP_NOTIFICATION);
594 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
595 IWL_CMD(REPLY_SCAN_CMD);
596 IWL_CMD(REPLY_SCAN_ABORT_CMD);
597 IWL_CMD(SCAN_START_NOTIFICATION);
598 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
599 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
600 IWL_CMD(BEACON_NOTIFICATION);
601 IWL_CMD(REPLY_TX_BEACON);
602 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
603 IWL_CMD(QUIET_NOTIFICATION);
604 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
605 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
606 IWL_CMD(REPLY_BT_CONFIG);
607 IWL_CMD(REPLY_STATISTICS_CMD);
608 IWL_CMD(STATISTICS_NOTIFICATION);
609 IWL_CMD(REPLY_CARD_STATE_CMD);
610 IWL_CMD(CARD_STATE_NOTIFICATION);
611 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
612 default:
613 return "UNKNOWN";
614
615 }
616 }
617
618 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
619
620 /**
621 * iwl3945_enqueue_hcmd - enqueue a uCode command
622 * @priv: device private data point
623 * @cmd: a point to the ucode command structure
624 *
625 * The function returns < 0 values to indicate the operation is
626 * failed. On success, it turns the index (> 0) of command in the
627 * command queue.
628 */
629 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
630 {
631 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
632 struct iwl3945_queue *q = &txq->q;
633 struct iwl3945_tfd_frame *tfd;
634 u32 *control_flags;
635 struct iwl3945_cmd *out_cmd;
636 u32 idx;
637 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
638 dma_addr_t phys_addr;
639 int pad;
640 u16 count;
641 int ret;
642 unsigned long flags;
643
644 /* If any of the command structures end up being larger than
645 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
646 * we will need to increase the size of the TFD entries */
647 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
648 !(cmd->meta.flags & CMD_SIZE_HUGE));
649
650
651 if (iwl3945_is_rfkill(priv)) {
652 IWL_DEBUG_INFO("Not sending command - RF KILL");
653 return -EIO;
654 }
655
656 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
657 IWL_ERROR("No space for Tx\n");
658 return -ENOSPC;
659 }
660
661 spin_lock_irqsave(&priv->hcmd_lock, flags);
662
663 tfd = &txq->bd[q->write_ptr];
664 memset(tfd, 0, sizeof(*tfd));
665
666 control_flags = (u32 *) tfd;
667
668 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
669 out_cmd = &txq->cmd[idx];
670
671 out_cmd->hdr.cmd = cmd->id;
672 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
673 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
674
675 /* At this point, the out_cmd now has all of the incoming cmd
676 * information */
677
678 out_cmd->hdr.flags = 0;
679 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
680 INDEX_TO_SEQ(q->write_ptr));
681 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
682 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
683
684 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
685 offsetof(struct iwl3945_cmd, hdr);
686 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
687
688 pad = U32_PAD(cmd->len);
689 count = TFD_CTL_COUNT_GET(*control_flags);
690 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
691
692 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
693 "%d bytes at %d[%d]:%d\n",
694 get_cmd_string(out_cmd->hdr.cmd),
695 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
696 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
697
698 txq->need_update = 1;
699
700 /* Increment and update queue's write index */
701 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
702 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
703
704 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
705 return ret ? ret : idx;
706 }
707
708 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
709 {
710 int ret;
711
712 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
713
714 /* An asynchronous command can not expect an SKB to be set. */
715 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
716
717 /* An asynchronous command MUST have a callback. */
718 BUG_ON(!cmd->meta.u.callback);
719
720 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
721 return -EBUSY;
722
723 ret = iwl3945_enqueue_hcmd(priv, cmd);
724 if (ret < 0) {
725 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
726 get_cmd_string(cmd->id), ret);
727 return ret;
728 }
729 return 0;
730 }
731
732 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
733 {
734 int cmd_idx;
735 int ret;
736
737 BUG_ON(cmd->meta.flags & CMD_ASYNC);
738
739 /* A synchronous command can not have a callback set. */
740 BUG_ON(cmd->meta.u.callback != NULL);
741
742 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
743 IWL_ERROR("Error sending %s: Already sending a host command\n",
744 get_cmd_string(cmd->id));
745 ret = -EBUSY;
746 goto out;
747 }
748
749 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
750
751 if (cmd->meta.flags & CMD_WANT_SKB)
752 cmd->meta.source = &cmd->meta;
753
754 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
755 if (cmd_idx < 0) {
756 ret = cmd_idx;
757 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
758 get_cmd_string(cmd->id), ret);
759 goto out;
760 }
761
762 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
763 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
764 HOST_COMPLETE_TIMEOUT);
765 if (!ret) {
766 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
767 IWL_ERROR("Error sending %s: time out after %dms.\n",
768 get_cmd_string(cmd->id),
769 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
770
771 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
772 ret = -ETIMEDOUT;
773 goto cancel;
774 }
775 }
776
777 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
778 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
779 get_cmd_string(cmd->id));
780 ret = -ECANCELED;
781 goto fail;
782 }
783 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
784 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
785 get_cmd_string(cmd->id));
786 ret = -EIO;
787 goto fail;
788 }
789 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
790 IWL_ERROR("Error: Response NULL in '%s'\n",
791 get_cmd_string(cmd->id));
792 ret = -EIO;
793 goto out;
794 }
795
796 ret = 0;
797 goto out;
798
799 cancel:
800 if (cmd->meta.flags & CMD_WANT_SKB) {
801 struct iwl3945_cmd *qcmd;
802
803 /* Cancel the CMD_WANT_SKB flag for the cmd in the
804 * TX cmd queue. Otherwise in case the cmd comes
805 * in later, it will possibly set an invalid
806 * address (cmd->meta.source). */
807 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
808 qcmd->meta.flags &= ~CMD_WANT_SKB;
809 }
810 fail:
811 if (cmd->meta.u.skb) {
812 dev_kfree_skb_any(cmd->meta.u.skb);
813 cmd->meta.u.skb = NULL;
814 }
815 out:
816 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
817 return ret;
818 }
819
820 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
821 {
822 if (cmd->meta.flags & CMD_ASYNC)
823 return iwl3945_send_cmd_async(priv, cmd);
824
825 return iwl3945_send_cmd_sync(priv, cmd);
826 }
827
828 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
829 {
830 struct iwl3945_host_cmd cmd = {
831 .id = id,
832 .len = len,
833 .data = data,
834 };
835
836 return iwl3945_send_cmd_sync(priv, &cmd);
837 }
838
839 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
840 {
841 struct iwl3945_host_cmd cmd = {
842 .id = id,
843 .len = sizeof(val),
844 .data = &val,
845 };
846
847 return iwl3945_send_cmd_sync(priv, &cmd);
848 }
849
850 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
851 {
852 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
853 }
854
855 /**
856 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
857 * @band: 2.4 or 5 GHz band
858 * @channel: Any channel valid for the requested band
859
860 * In addition to setting the staging RXON, priv->band is also set.
861 *
862 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
863 * in the staging RXON flag structure based on the band
864 */
865 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
866 enum ieee80211_band band,
867 u16 channel)
868 {
869 if (!iwl3945_get_channel_info(priv, band, channel)) {
870 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
871 channel, band);
872 return -EINVAL;
873 }
874
875 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
876 (priv->band == band))
877 return 0;
878
879 priv->staging_rxon.channel = cpu_to_le16(channel);
880 if (band == IEEE80211_BAND_5GHZ)
881 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
882 else
883 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
884
885 priv->band = band;
886
887 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
888
889 return 0;
890 }
891
892 /**
893 * iwl3945_check_rxon_cmd - validate RXON structure is valid
894 *
895 * NOTE: This is really only useful during development and can eventually
896 * be #ifdef'd out once the driver is stable and folks aren't actively
897 * making changes
898 */
899 static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
900 {
901 int error = 0;
902 int counter = 1;
903
904 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
905 error |= le32_to_cpu(rxon->flags &
906 (RXON_FLG_TGJ_NARROW_BAND_MSK |
907 RXON_FLG_RADAR_DETECT_MSK));
908 if (error)
909 IWL_WARNING("check 24G fields %d | %d\n",
910 counter++, error);
911 } else {
912 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
913 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
914 if (error)
915 IWL_WARNING("check 52 fields %d | %d\n",
916 counter++, error);
917 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
918 if (error)
919 IWL_WARNING("check 52 CCK %d | %d\n",
920 counter++, error);
921 }
922 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
923 if (error)
924 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
925
926 /* make sure basic rates 6Mbps and 1Mbps are supported */
927 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
928 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
929 if (error)
930 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
931
932 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
933 if (error)
934 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
935
936 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
937 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
938 if (error)
939 IWL_WARNING("check CCK and short slot %d | %d\n",
940 counter++, error);
941
942 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
943 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
944 if (error)
945 IWL_WARNING("check CCK & auto detect %d | %d\n",
946 counter++, error);
947
948 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
949 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
950 if (error)
951 IWL_WARNING("check TGG and auto detect %d | %d\n",
952 counter++, error);
953
954 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
955 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
956 RXON_FLG_ANT_A_MSK)) == 0);
957 if (error)
958 IWL_WARNING("check antenna %d %d\n", counter++, error);
959
960 if (error)
961 IWL_WARNING("Tuning to channel %d\n",
962 le16_to_cpu(rxon->channel));
963
964 if (error) {
965 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
966 return -1;
967 }
968 return 0;
969 }
970
971 /**
972 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
973 * @priv: staging_rxon is compared to active_rxon
974 *
975 * If the RXON structure is changing enough to require a new tune,
976 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
977 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
978 */
979 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
980 {
981
982 /* These items are only settable from the full RXON command */
983 if (!(iwl3945_is_associated(priv)) ||
984 compare_ether_addr(priv->staging_rxon.bssid_addr,
985 priv->active_rxon.bssid_addr) ||
986 compare_ether_addr(priv->staging_rxon.node_addr,
987 priv->active_rxon.node_addr) ||
988 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
989 priv->active_rxon.wlap_bssid_addr) ||
990 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
991 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
992 (priv->staging_rxon.air_propagation !=
993 priv->active_rxon.air_propagation) ||
994 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
995 return 1;
996
997 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
998 * be updated with the RXON_ASSOC command -- however only some
999 * flag transitions are allowed using RXON_ASSOC */
1000
1001 /* Check if we are not switching bands */
1002 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1003 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1004 return 1;
1005
1006 /* Check if we are switching association toggle */
1007 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1008 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1009 return 1;
1010
1011 return 0;
1012 }
1013
1014 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
1015 {
1016 int rc = 0;
1017 struct iwl3945_rx_packet *res = NULL;
1018 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1019 struct iwl3945_host_cmd cmd = {
1020 .id = REPLY_RXON_ASSOC,
1021 .len = sizeof(rxon_assoc),
1022 .meta.flags = CMD_WANT_SKB,
1023 .data = &rxon_assoc,
1024 };
1025 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1026 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
1027
1028 if ((rxon1->flags == rxon2->flags) &&
1029 (rxon1->filter_flags == rxon2->filter_flags) &&
1030 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1031 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1032 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1033 return 0;
1034 }
1035
1036 rxon_assoc.flags = priv->staging_rxon.flags;
1037 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1038 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1039 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1040 rxon_assoc.reserved = 0;
1041
1042 rc = iwl3945_send_cmd_sync(priv, &cmd);
1043 if (rc)
1044 return rc;
1045
1046 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1047 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1048 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1049 rc = -EIO;
1050 }
1051
1052 priv->alloc_rxb_skb--;
1053 dev_kfree_skb_any(cmd.meta.u.skb);
1054
1055 return rc;
1056 }
1057
1058 /**
1059 * iwl3945_commit_rxon - commit staging_rxon to hardware
1060 *
1061 * The RXON command in staging_rxon is committed to the hardware and
1062 * the active_rxon structure is updated with the new data. This
1063 * function correctly transitions out of the RXON_ASSOC_MSK state if
1064 * a HW tune is required based on the RXON structure changes.
1065 */
1066 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1067 {
1068 /* cast away the const for active_rxon in this function */
1069 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1070 int rc = 0;
1071 DECLARE_MAC_BUF(mac);
1072
1073 if (!iwl3945_is_alive(priv))
1074 return -1;
1075
1076 /* always get timestamp with Rx frame */
1077 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1078
1079 /* select antenna */
1080 priv->staging_rxon.flags &=
1081 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1082 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1083
1084 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1085 if (rc) {
1086 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1087 return -EINVAL;
1088 }
1089
1090 /* If we don't need to send a full RXON, we can use
1091 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1092 * and other flags for the current radio configuration. */
1093 if (!iwl3945_full_rxon_required(priv)) {
1094 rc = iwl3945_send_rxon_assoc(priv);
1095 if (rc) {
1096 IWL_ERROR("Error setting RXON_ASSOC "
1097 "configuration (%d).\n", rc);
1098 return rc;
1099 }
1100
1101 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1102
1103 return 0;
1104 }
1105
1106 /* If we are currently associated and the new config requires
1107 * an RXON_ASSOC and the new config wants the associated mask enabled,
1108 * we must clear the associated from the active configuration
1109 * before we apply the new config */
1110 if (iwl3945_is_associated(priv) &&
1111 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1112 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1113 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1114
1115 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1116 sizeof(struct iwl3945_rxon_cmd),
1117 &priv->active_rxon);
1118
1119 /* If the mask clearing failed then we set
1120 * active_rxon back to what it was previously */
1121 if (rc) {
1122 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1123 IWL_ERROR("Error clearing ASSOC_MSK on current "
1124 "configuration (%d).\n", rc);
1125 return rc;
1126 }
1127 }
1128
1129 IWL_DEBUG_INFO("Sending RXON\n"
1130 "* with%s RXON_FILTER_ASSOC_MSK\n"
1131 "* channel = %d\n"
1132 "* bssid = %s\n",
1133 ((priv->staging_rxon.filter_flags &
1134 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1135 le16_to_cpu(priv->staging_rxon.channel),
1136 print_mac(mac, priv->staging_rxon.bssid_addr));
1137
1138 /* Apply the new configuration */
1139 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1140 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1141 if (rc) {
1142 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1143 return rc;
1144 }
1145
1146 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1147
1148 iwl3945_clear_stations_table(priv);
1149
1150 /* If we issue a new RXON command which required a tune then we must
1151 * send a new TXPOWER command or we won't be able to Tx any frames */
1152 rc = iwl3945_hw_reg_send_txpower(priv);
1153 if (rc) {
1154 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1155 return rc;
1156 }
1157
1158 /* Add the broadcast address so we can send broadcast frames */
1159 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1160 IWL_INVALID_STATION) {
1161 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1162 return -EIO;
1163 }
1164
1165 /* If we have set the ASSOC_MSK and we are in BSS mode then
1166 * add the IWL_AP_ID to the station rate table */
1167 if (iwl3945_is_associated(priv) &&
1168 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
1169 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1170 == IWL_INVALID_STATION) {
1171 IWL_ERROR("Error adding AP address for transmit.\n");
1172 return -EIO;
1173 }
1174
1175 /* Init the hardware's rate fallback order based on the band */
1176 rc = iwl3945_init_hw_rate_table(priv);
1177 if (rc) {
1178 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1179 return -EIO;
1180 }
1181
1182 return 0;
1183 }
1184
1185 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1186 {
1187 struct iwl3945_bt_cmd bt_cmd = {
1188 .flags = 3,
1189 .lead_time = 0xAA,
1190 .max_kill = 1,
1191 .kill_ack_mask = 0,
1192 .kill_cts_mask = 0,
1193 };
1194
1195 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1196 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1197 }
1198
1199 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1200 {
1201 int rc = 0;
1202 struct iwl3945_rx_packet *res;
1203 struct iwl3945_host_cmd cmd = {
1204 .id = REPLY_SCAN_ABORT_CMD,
1205 .meta.flags = CMD_WANT_SKB,
1206 };
1207
1208 /* If there isn't a scan actively going on in the hardware
1209 * then we are in between scan bands and not actually
1210 * actively scanning, so don't send the abort command */
1211 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1212 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1213 return 0;
1214 }
1215
1216 rc = iwl3945_send_cmd_sync(priv, &cmd);
1217 if (rc) {
1218 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1219 return rc;
1220 }
1221
1222 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1223 if (res->u.status != CAN_ABORT_STATUS) {
1224 /* The scan abort will return 1 for success or
1225 * 2 for "failure". A failure condition can be
1226 * due to simply not being in an active scan which
1227 * can occur if we send the scan abort before we
1228 * the microcode has notified us that a scan is
1229 * completed. */
1230 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1231 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1232 clear_bit(STATUS_SCAN_HW, &priv->status);
1233 }
1234
1235 dev_kfree_skb_any(cmd.meta.u.skb);
1236
1237 return rc;
1238 }
1239
1240 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1241 struct iwl3945_cmd *cmd,
1242 struct sk_buff *skb)
1243 {
1244 return 1;
1245 }
1246
1247 /*
1248 * CARD_STATE_CMD
1249 *
1250 * Use: Sets the device's internal card state to enable, disable, or halt
1251 *
1252 * When in the 'enable' state the card operates as normal.
1253 * When in the 'disable' state, the card enters into a low power mode.
1254 * When in the 'halt' state, the card is shut down and must be fully
1255 * restarted to come back on.
1256 */
1257 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1258 {
1259 struct iwl3945_host_cmd cmd = {
1260 .id = REPLY_CARD_STATE_CMD,
1261 .len = sizeof(u32),
1262 .data = &flags,
1263 .meta.flags = meta_flag,
1264 };
1265
1266 if (meta_flag & CMD_ASYNC)
1267 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1268
1269 return iwl3945_send_cmd(priv, &cmd);
1270 }
1271
1272 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1273 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1274 {
1275 struct iwl3945_rx_packet *res = NULL;
1276
1277 if (!skb) {
1278 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1279 return 1;
1280 }
1281
1282 res = (struct iwl3945_rx_packet *)skb->data;
1283 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1284 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1285 res->hdr.flags);
1286 return 1;
1287 }
1288
1289 switch (res->u.add_sta.status) {
1290 case ADD_STA_SUCCESS_MSK:
1291 break;
1292 default:
1293 break;
1294 }
1295
1296 /* We didn't cache the SKB; let the caller free it */
1297 return 1;
1298 }
1299
1300 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1301 struct iwl3945_addsta_cmd *sta, u8 flags)
1302 {
1303 struct iwl3945_rx_packet *res = NULL;
1304 int rc = 0;
1305 struct iwl3945_host_cmd cmd = {
1306 .id = REPLY_ADD_STA,
1307 .len = sizeof(struct iwl3945_addsta_cmd),
1308 .meta.flags = flags,
1309 .data = sta,
1310 };
1311
1312 if (flags & CMD_ASYNC)
1313 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1314 else
1315 cmd.meta.flags |= CMD_WANT_SKB;
1316
1317 rc = iwl3945_send_cmd(priv, &cmd);
1318
1319 if (rc || (flags & CMD_ASYNC))
1320 return rc;
1321
1322 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1323 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1324 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1325 res->hdr.flags);
1326 rc = -EIO;
1327 }
1328
1329 if (rc == 0) {
1330 switch (res->u.add_sta.status) {
1331 case ADD_STA_SUCCESS_MSK:
1332 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1333 break;
1334 default:
1335 rc = -EIO;
1336 IWL_WARNING("REPLY_ADD_STA failed\n");
1337 break;
1338 }
1339 }
1340
1341 priv->alloc_rxb_skb--;
1342 dev_kfree_skb_any(cmd.meta.u.skb);
1343
1344 return rc;
1345 }
1346
1347 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1348 struct ieee80211_key_conf *keyconf,
1349 u8 sta_id)
1350 {
1351 unsigned long flags;
1352 __le16 key_flags = 0;
1353
1354 switch (keyconf->alg) {
1355 case ALG_CCMP:
1356 key_flags |= STA_KEY_FLG_CCMP;
1357 key_flags |= cpu_to_le16(
1358 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1359 key_flags &= ~STA_KEY_FLG_INVALID;
1360 break;
1361 case ALG_TKIP:
1362 case ALG_WEP:
1363 default:
1364 return -EINVAL;
1365 }
1366 spin_lock_irqsave(&priv->sta_lock, flags);
1367 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1368 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1369 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1370 keyconf->keylen);
1371
1372 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1373 keyconf->keylen);
1374 priv->stations[sta_id].sta.key.key_flags = key_flags;
1375 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1376 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1377
1378 spin_unlock_irqrestore(&priv->sta_lock, flags);
1379
1380 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1381 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1382 return 0;
1383 }
1384
1385 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1386 {
1387 unsigned long flags;
1388
1389 spin_lock_irqsave(&priv->sta_lock, flags);
1390 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1391 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1392 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1393 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1394 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1395 spin_unlock_irqrestore(&priv->sta_lock, flags);
1396
1397 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1398 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1399 return 0;
1400 }
1401
1402 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1403 {
1404 struct list_head *element;
1405
1406 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1407 priv->frames_count);
1408
1409 while (!list_empty(&priv->free_frames)) {
1410 element = priv->free_frames.next;
1411 list_del(element);
1412 kfree(list_entry(element, struct iwl3945_frame, list));
1413 priv->frames_count--;
1414 }
1415
1416 if (priv->frames_count) {
1417 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1418 priv->frames_count);
1419 priv->frames_count = 0;
1420 }
1421 }
1422
1423 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1424 {
1425 struct iwl3945_frame *frame;
1426 struct list_head *element;
1427 if (list_empty(&priv->free_frames)) {
1428 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1429 if (!frame) {
1430 IWL_ERROR("Could not allocate frame!\n");
1431 return NULL;
1432 }
1433
1434 priv->frames_count++;
1435 return frame;
1436 }
1437
1438 element = priv->free_frames.next;
1439 list_del(element);
1440 return list_entry(element, struct iwl3945_frame, list);
1441 }
1442
1443 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1444 {
1445 memset(frame, 0, sizeof(*frame));
1446 list_add(&frame->list, &priv->free_frames);
1447 }
1448
1449 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1450 struct ieee80211_hdr *hdr,
1451 const u8 *dest, int left)
1452 {
1453
1454 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1455 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1456 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1457 return 0;
1458
1459 if (priv->ibss_beacon->len > left)
1460 return 0;
1461
1462 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1463
1464 return priv->ibss_beacon->len;
1465 }
1466
1467 static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
1468 {
1469 u8 i;
1470
1471 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1472 i = iwl3945_rates[i].next_ieee) {
1473 if (rate_mask & (1 << i))
1474 return iwl3945_rates[i].plcp;
1475 }
1476
1477 return IWL_RATE_INVALID;
1478 }
1479
1480 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1481 {
1482 struct iwl3945_frame *frame;
1483 unsigned int frame_size;
1484 int rc;
1485 u8 rate;
1486
1487 frame = iwl3945_get_free_frame(priv);
1488
1489 if (!frame) {
1490 IWL_ERROR("Could not obtain free frame buffer for beacon "
1491 "command.\n");
1492 return -ENOMEM;
1493 }
1494
1495 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1496 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
1497 0xFF0);
1498 if (rate == IWL_INVALID_RATE)
1499 rate = IWL_RATE_6M_PLCP;
1500 } else {
1501 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1502 if (rate == IWL_INVALID_RATE)
1503 rate = IWL_RATE_1M_PLCP;
1504 }
1505
1506 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1507
1508 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1509 &frame->u.cmd[0]);
1510
1511 iwl3945_free_frame(priv, frame);
1512
1513 return rc;
1514 }
1515
1516 /******************************************************************************
1517 *
1518 * EEPROM related functions
1519 *
1520 ******************************************************************************/
1521
1522 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1523 {
1524 memcpy(mac, priv->eeprom.mac_address, 6);
1525 }
1526
1527 /*
1528 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1529 * embedded controller) as EEPROM reader; each read is a series of pulses
1530 * to/from the EEPROM chip, not a single event, so even reads could conflict
1531 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1532 * simply claims ownership, which should be safe when this function is called
1533 * (i.e. before loading uCode!).
1534 */
1535 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1536 {
1537 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1538 return 0;
1539 }
1540
1541 /**
1542 * iwl3945_eeprom_init - read EEPROM contents
1543 *
1544 * Load the EEPROM contents from adapter into priv->eeprom
1545 *
1546 * NOTE: This routine uses the non-debug IO access functions.
1547 */
1548 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1549 {
1550 u16 *e = (u16 *)&priv->eeprom;
1551 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1552 u32 r;
1553 int sz = sizeof(priv->eeprom);
1554 int rc;
1555 int i;
1556 u16 addr;
1557
1558 /* The EEPROM structure has several padding buffers within it
1559 * and when adding new EEPROM maps is subject to programmer errors
1560 * which may be very difficult to identify without explicitly
1561 * checking the resulting size of the eeprom map. */
1562 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1563
1564 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1565 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1566 return -ENOENT;
1567 }
1568
1569 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1570 rc = iwl3945_eeprom_acquire_semaphore(priv);
1571 if (rc < 0) {
1572 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1573 return -ENOENT;
1574 }
1575
1576 /* eeprom is an array of 16bit values */
1577 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1578 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1579 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1580
1581 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1582 i += IWL_EEPROM_ACCESS_DELAY) {
1583 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1584 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1585 break;
1586 udelay(IWL_EEPROM_ACCESS_DELAY);
1587 }
1588
1589 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1590 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1591 return -ETIMEDOUT;
1592 }
1593 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1594 }
1595
1596 return 0;
1597 }
1598
1599 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1600 {
1601 if (priv->hw_setting.shared_virt)
1602 pci_free_consistent(priv->pci_dev,
1603 sizeof(struct iwl3945_shared),
1604 priv->hw_setting.shared_virt,
1605 priv->hw_setting.shared_phys);
1606 }
1607
1608 /**
1609 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1610 *
1611 * return : set the bit for each supported rate insert in ie
1612 */
1613 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1614 u16 basic_rate, int *left)
1615 {
1616 u16 ret_rates = 0, bit;
1617 int i;
1618 u8 *cnt = ie;
1619 u8 *rates = ie + 1;
1620
1621 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1622 if (bit & supported_rate) {
1623 ret_rates |= bit;
1624 rates[*cnt] = iwl3945_rates[i].ieee |
1625 ((bit & basic_rate) ? 0x80 : 0x00);
1626 (*cnt)++;
1627 (*left)--;
1628 if ((*left <= 0) ||
1629 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1630 break;
1631 }
1632 }
1633
1634 return ret_rates;
1635 }
1636
1637 /**
1638 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1639 */
1640 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1641 struct ieee80211_mgmt *frame,
1642 int left, int is_direct)
1643 {
1644 int len = 0;
1645 u8 *pos = NULL;
1646 u16 active_rates, ret_rates, cck_rates;
1647
1648 /* Make sure there is enough space for the probe request,
1649 * two mandatory IEs and the data */
1650 left -= 24;
1651 if (left < 0)
1652 return 0;
1653 len += 24;
1654
1655 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1656 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1657 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1658 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1659 frame->seq_ctrl = 0;
1660
1661 /* fill in our indirect SSID IE */
1662 /* ...next IE... */
1663
1664 left -= 2;
1665 if (left < 0)
1666 return 0;
1667 len += 2;
1668 pos = &(frame->u.probe_req.variable[0]);
1669 *pos++ = WLAN_EID_SSID;
1670 *pos++ = 0;
1671
1672 /* fill in our direct SSID IE... */
1673 if (is_direct) {
1674 /* ...next IE... */
1675 left -= 2 + priv->essid_len;
1676 if (left < 0)
1677 return 0;
1678 /* ... fill it in... */
1679 *pos++ = WLAN_EID_SSID;
1680 *pos++ = priv->essid_len;
1681 memcpy(pos, priv->essid, priv->essid_len);
1682 pos += priv->essid_len;
1683 len += 2 + priv->essid_len;
1684 }
1685
1686 /* fill in supported rate */
1687 /* ...next IE... */
1688 left -= 2;
1689 if (left < 0)
1690 return 0;
1691
1692 /* ... fill it in... */
1693 *pos++ = WLAN_EID_SUPP_RATES;
1694 *pos = 0;
1695
1696 priv->active_rate = priv->rates_mask;
1697 active_rates = priv->active_rate;
1698 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1699
1700 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1701 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1702 priv->active_rate_basic, &left);
1703 active_rates &= ~ret_rates;
1704
1705 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1706 priv->active_rate_basic, &left);
1707 active_rates &= ~ret_rates;
1708
1709 len += 2 + *pos;
1710 pos += (*pos) + 1;
1711 if (active_rates == 0)
1712 goto fill_end;
1713
1714 /* fill in supported extended rate */
1715 /* ...next IE... */
1716 left -= 2;
1717 if (left < 0)
1718 return 0;
1719 /* ... fill it in... */
1720 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1721 *pos = 0;
1722 iwl3945_supported_rate_to_ie(pos, active_rates,
1723 priv->active_rate_basic, &left);
1724 if (*pos > 0)
1725 len += 2 + *pos;
1726
1727 fill_end:
1728 return (u16)len;
1729 }
1730
1731 /*
1732 * QoS support
1733 */
1734 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1735 struct iwl3945_qosparam_cmd *qos)
1736 {
1737
1738 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1739 sizeof(struct iwl3945_qosparam_cmd), qos);
1740 }
1741
1742 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1743 {
1744 u16 cw_min = 15;
1745 u16 cw_max = 1023;
1746 u8 aifs = 2;
1747 u8 is_legacy = 0;
1748 unsigned long flags;
1749 int i;
1750
1751 spin_lock_irqsave(&priv->lock, flags);
1752 priv->qos_data.qos_active = 0;
1753
1754 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1755 if (priv->qos_data.qos_enable)
1756 priv->qos_data.qos_active = 1;
1757 if (!(priv->active_rate & 0xfff0)) {
1758 cw_min = 31;
1759 is_legacy = 1;
1760 }
1761 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1762 if (priv->qos_data.qos_enable)
1763 priv->qos_data.qos_active = 1;
1764 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1765 cw_min = 31;
1766 is_legacy = 1;
1767 }
1768
1769 if (priv->qos_data.qos_active)
1770 aifs = 3;
1771
1772 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1773 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1774 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1775 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1776 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1777
1778 if (priv->qos_data.qos_active) {
1779 i = 1;
1780 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1781 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1782 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1783 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1784 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1785
1786 i = 2;
1787 priv->qos_data.def_qos_parm.ac[i].cw_min =
1788 cpu_to_le16((cw_min + 1) / 2 - 1);
1789 priv->qos_data.def_qos_parm.ac[i].cw_max =
1790 cpu_to_le16(cw_max);
1791 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1792 if (is_legacy)
1793 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1794 cpu_to_le16(6016);
1795 else
1796 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1797 cpu_to_le16(3008);
1798 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1799
1800 i = 3;
1801 priv->qos_data.def_qos_parm.ac[i].cw_min =
1802 cpu_to_le16((cw_min + 1) / 4 - 1);
1803 priv->qos_data.def_qos_parm.ac[i].cw_max =
1804 cpu_to_le16((cw_max + 1) / 2 - 1);
1805 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1806 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1807 if (is_legacy)
1808 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1809 cpu_to_le16(3264);
1810 else
1811 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1812 cpu_to_le16(1504);
1813 } else {
1814 for (i = 1; i < 4; i++) {
1815 priv->qos_data.def_qos_parm.ac[i].cw_min =
1816 cpu_to_le16(cw_min);
1817 priv->qos_data.def_qos_parm.ac[i].cw_max =
1818 cpu_to_le16(cw_max);
1819 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1820 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1821 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1822 }
1823 }
1824 IWL_DEBUG_QOS("set QoS to default \n");
1825
1826 spin_unlock_irqrestore(&priv->lock, flags);
1827 }
1828
1829 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
1830 {
1831 unsigned long flags;
1832
1833 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1834 return;
1835
1836 if (!priv->qos_data.qos_enable)
1837 return;
1838
1839 spin_lock_irqsave(&priv->lock, flags);
1840 priv->qos_data.def_qos_parm.qos_flags = 0;
1841
1842 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1843 !priv->qos_data.qos_cap.q_AP.txop_request)
1844 priv->qos_data.def_qos_parm.qos_flags |=
1845 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1846
1847 if (priv->qos_data.qos_active)
1848 priv->qos_data.def_qos_parm.qos_flags |=
1849 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1850
1851 spin_unlock_irqrestore(&priv->lock, flags);
1852
1853 if (force || iwl3945_is_associated(priv)) {
1854 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
1855 priv->qos_data.qos_active);
1856
1857 iwl3945_send_qos_params_command(priv,
1858 &(priv->qos_data.def_qos_parm));
1859 }
1860 }
1861
1862 /*
1863 * Power management (not Tx power!) functions
1864 */
1865 #define MSEC_TO_USEC 1024
1866
1867 #define NOSLP __constant_cpu_to_le32(0)
1868 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
1869 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1870 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1871 __constant_cpu_to_le32(X1), \
1872 __constant_cpu_to_le32(X2), \
1873 __constant_cpu_to_le32(X3), \
1874 __constant_cpu_to_le32(X4)}
1875
1876
1877 /* default power management (not Tx power) table values */
1878 /* for tim 0-10 */
1879 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
1880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1882 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1883 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1884 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1885 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1886 };
1887
1888 /* for tim > 10 */
1889 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
1890 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1891 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1892 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1893 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1894 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1895 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1896 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1897 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1898 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1899 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1900 };
1901
1902 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
1903 {
1904 int rc = 0, i;
1905 struct iwl3945_power_mgr *pow_data;
1906 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
1907 u16 pci_pm;
1908
1909 IWL_DEBUG_POWER("Initialize power \n");
1910
1911 pow_data = &(priv->power_data);
1912
1913 memset(pow_data, 0, sizeof(*pow_data));
1914
1915 pow_data->active_index = IWL_POWER_RANGE_0;
1916 pow_data->dtim_val = 0xffff;
1917
1918 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1919 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1920
1921 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1922 if (rc != 0)
1923 return 0;
1924 else {
1925 struct iwl3945_powertable_cmd *cmd;
1926
1927 IWL_DEBUG_POWER("adjust power command flags\n");
1928
1929 for (i = 0; i < IWL_POWER_AC; i++) {
1930 cmd = &pow_data->pwr_range_0[i].cmd;
1931
1932 if (pci_pm & 0x1)
1933 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1934 else
1935 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1936 }
1937 }
1938 return rc;
1939 }
1940
1941 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1942 struct iwl3945_powertable_cmd *cmd, u32 mode)
1943 {
1944 int rc = 0, i;
1945 u8 skip;
1946 u32 max_sleep = 0;
1947 struct iwl3945_power_vec_entry *range;
1948 u8 period = 0;
1949 struct iwl3945_power_mgr *pow_data;
1950
1951 if (mode > IWL_POWER_INDEX_5) {
1952 IWL_DEBUG_POWER("Error invalid power mode \n");
1953 return -1;
1954 }
1955 pow_data = &(priv->power_data);
1956
1957 if (pow_data->active_index == IWL_POWER_RANGE_0)
1958 range = &pow_data->pwr_range_0[0];
1959 else
1960 range = &pow_data->pwr_range_1[1];
1961
1962 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1963
1964 #ifdef IWL_MAC80211_DISABLE
1965 if (priv->assoc_network != NULL) {
1966 unsigned long flags;
1967
1968 period = priv->assoc_network->tim.tim_period;
1969 }
1970 #endif /*IWL_MAC80211_DISABLE */
1971 skip = range[mode].no_dtim;
1972
1973 if (period == 0) {
1974 period = 1;
1975 skip = 0;
1976 }
1977
1978 if (skip == 0) {
1979 max_sleep = period;
1980 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1981 } else {
1982 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1983 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1984 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1985 }
1986
1987 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1988 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1989 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1990 }
1991
1992 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1993 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1994 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1995 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1996 le32_to_cpu(cmd->sleep_interval[0]),
1997 le32_to_cpu(cmd->sleep_interval[1]),
1998 le32_to_cpu(cmd->sleep_interval[2]),
1999 le32_to_cpu(cmd->sleep_interval[3]),
2000 le32_to_cpu(cmd->sleep_interval[4]));
2001
2002 return rc;
2003 }
2004
2005 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
2006 {
2007 u32 uninitialized_var(final_mode);
2008 int rc;
2009 struct iwl3945_powertable_cmd cmd;
2010
2011 /* If on battery, set to 3,
2012 * if plugged into AC power, set to CAM ("continuously aware mode"),
2013 * else user level */
2014 switch (mode) {
2015 case IWL_POWER_BATTERY:
2016 final_mode = IWL_POWER_INDEX_3;
2017 break;
2018 case IWL_POWER_AC:
2019 final_mode = IWL_POWER_MODE_CAM;
2020 break;
2021 default:
2022 final_mode = mode;
2023 break;
2024 }
2025
2026 iwl3945_update_power_cmd(priv, &cmd, final_mode);
2027
2028 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2029
2030 if (final_mode == IWL_POWER_MODE_CAM)
2031 clear_bit(STATUS_POWER_PMI, &priv->status);
2032 else
2033 set_bit(STATUS_POWER_PMI, &priv->status);
2034
2035 return rc;
2036 }
2037
2038 /**
2039 * iwl3945_scan_cancel - Cancel any currently executing HW scan
2040 *
2041 * NOTE: priv->mutex is not required before calling this function
2042 */
2043 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
2044 {
2045 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2046 clear_bit(STATUS_SCANNING, &priv->status);
2047 return 0;
2048 }
2049
2050 if (test_bit(STATUS_SCANNING, &priv->status)) {
2051 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2052 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2053 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2054 queue_work(priv->workqueue, &priv->abort_scan);
2055
2056 } else
2057 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2058
2059 return test_bit(STATUS_SCANNING, &priv->status);
2060 }
2061
2062 return 0;
2063 }
2064
2065 /**
2066 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2067 * @ms: amount of time to wait (in milliseconds) for scan to abort
2068 *
2069 * NOTE: priv->mutex must be held before calling this function
2070 */
2071 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2072 {
2073 unsigned long now = jiffies;
2074 int ret;
2075
2076 ret = iwl3945_scan_cancel(priv);
2077 if (ret && ms) {
2078 mutex_unlock(&priv->mutex);
2079 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2080 test_bit(STATUS_SCANNING, &priv->status))
2081 msleep(1);
2082 mutex_lock(&priv->mutex);
2083
2084 return test_bit(STATUS_SCANNING, &priv->status);
2085 }
2086
2087 return ret;
2088 }
2089
2090 #define MAX_UCODE_BEACON_INTERVAL 1024
2091 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2092
2093 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2094 {
2095 u16 new_val = 0;
2096 u16 beacon_factor = 0;
2097
2098 beacon_factor =
2099 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2100 / MAX_UCODE_BEACON_INTERVAL;
2101 new_val = beacon_val / beacon_factor;
2102
2103 return cpu_to_le16(new_val);
2104 }
2105
2106 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2107 {
2108 u64 interval_tm_unit;
2109 u64 tsf, result;
2110 unsigned long flags;
2111 struct ieee80211_conf *conf = NULL;
2112 u16 beacon_int = 0;
2113
2114 conf = ieee80211_get_hw_conf(priv->hw);
2115
2116 spin_lock_irqsave(&priv->lock, flags);
2117 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2118 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2119
2120 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2121
2122 tsf = priv->timestamp1;
2123 tsf = ((tsf << 32) | priv->timestamp0);
2124
2125 beacon_int = priv->beacon_int;
2126 spin_unlock_irqrestore(&priv->lock, flags);
2127
2128 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2129 if (beacon_int == 0) {
2130 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2131 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2132 } else {
2133 priv->rxon_timing.beacon_interval =
2134 cpu_to_le16(beacon_int);
2135 priv->rxon_timing.beacon_interval =
2136 iwl3945_adjust_beacon_interval(
2137 le16_to_cpu(priv->rxon_timing.beacon_interval));
2138 }
2139
2140 priv->rxon_timing.atim_window = 0;
2141 } else {
2142 priv->rxon_timing.beacon_interval =
2143 iwl3945_adjust_beacon_interval(conf->beacon_int);
2144 /* TODO: we need to get atim_window from upper stack
2145 * for now we set to 0 */
2146 priv->rxon_timing.atim_window = 0;
2147 }
2148
2149 interval_tm_unit =
2150 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2151 result = do_div(tsf, interval_tm_unit);
2152 priv->rxon_timing.beacon_init_val =
2153 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2154
2155 IWL_DEBUG_ASSOC
2156 ("beacon interval %d beacon timer %d beacon tim %d\n",
2157 le16_to_cpu(priv->rxon_timing.beacon_interval),
2158 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2159 le16_to_cpu(priv->rxon_timing.atim_window));
2160 }
2161
2162 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2163 {
2164 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2165 IWL_ERROR("APs don't scan.\n");
2166 return 0;
2167 }
2168
2169 if (!iwl3945_is_ready_rf(priv)) {
2170 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2171 return -EIO;
2172 }
2173
2174 if (test_bit(STATUS_SCANNING, &priv->status)) {
2175 IWL_DEBUG_SCAN("Scan already in progress.\n");
2176 return -EAGAIN;
2177 }
2178
2179 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2180 IWL_DEBUG_SCAN("Scan request while abort pending. "
2181 "Queuing.\n");
2182 return -EAGAIN;
2183 }
2184
2185 IWL_DEBUG_INFO("Starting scan...\n");
2186 if (priv->cfg->sku & IWL_SKU_G)
2187 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2188 if (priv->cfg->sku & IWL_SKU_A)
2189 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2190 set_bit(STATUS_SCANNING, &priv->status);
2191 priv->scan_start = jiffies;
2192 priv->scan_pass_start = priv->scan_start;
2193
2194 queue_work(priv->workqueue, &priv->request_scan);
2195
2196 return 0;
2197 }
2198
2199 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2200 {
2201 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2202
2203 if (hw_decrypt)
2204 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2205 else
2206 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2207
2208 return 0;
2209 }
2210
2211 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2212 enum ieee80211_band band)
2213 {
2214 if (band == IEEE80211_BAND_5GHZ) {
2215 priv->staging_rxon.flags &=
2216 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2217 | RXON_FLG_CCK_MSK);
2218 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2219 } else {
2220 /* Copied from iwl3945_bg_post_associate() */
2221 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2222 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2223 else
2224 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2225
2226 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2227 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2228
2229 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2230 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2231 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2232 }
2233 }
2234
2235 /*
2236 * initialize rxon structure with default values from eeprom
2237 */
2238 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2239 {
2240 const struct iwl3945_channel_info *ch_info;
2241
2242 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2243
2244 switch (priv->iw_mode) {
2245 case IEEE80211_IF_TYPE_AP:
2246 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2247 break;
2248
2249 case IEEE80211_IF_TYPE_STA:
2250 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2251 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2252 break;
2253
2254 case IEEE80211_IF_TYPE_IBSS:
2255 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2256 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2257 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2258 RXON_FILTER_ACCEPT_GRP_MSK;
2259 break;
2260
2261 case IEEE80211_IF_TYPE_MNTR:
2262 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2263 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2264 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2265 break;
2266 default:
2267 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
2268 break;
2269 }
2270
2271 #if 0
2272 /* TODO: Figure out when short_preamble would be set and cache from
2273 * that */
2274 if (!hw_to_local(priv->hw)->short_preamble)
2275 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2276 else
2277 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2278 #endif
2279
2280 ch_info = iwl3945_get_channel_info(priv, priv->band,
2281 le16_to_cpu(priv->active_rxon.channel));
2282
2283 if (!ch_info)
2284 ch_info = &priv->channel_info[0];
2285
2286 /*
2287 * in some case A channels are all non IBSS
2288 * in this case force B/G channel
2289 */
2290 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2291 !(is_channel_ibss(ch_info)))
2292 ch_info = &priv->channel_info[0];
2293
2294 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2295 if (is_channel_a_band(ch_info))
2296 priv->band = IEEE80211_BAND_5GHZ;
2297 else
2298 priv->band = IEEE80211_BAND_2GHZ;
2299
2300 iwl3945_set_flags_for_phymode(priv, priv->band);
2301
2302 priv->staging_rxon.ofdm_basic_rates =
2303 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2304 priv->staging_rxon.cck_basic_rates =
2305 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2306 }
2307
2308 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2309 {
2310 if (mode == IEEE80211_IF_TYPE_IBSS) {
2311 const struct iwl3945_channel_info *ch_info;
2312
2313 ch_info = iwl3945_get_channel_info(priv,
2314 priv->band,
2315 le16_to_cpu(priv->staging_rxon.channel));
2316
2317 if (!ch_info || !is_channel_ibss(ch_info)) {
2318 IWL_ERROR("channel %d not IBSS channel\n",
2319 le16_to_cpu(priv->staging_rxon.channel));
2320 return -EINVAL;
2321 }
2322 }
2323
2324 priv->iw_mode = mode;
2325
2326 iwl3945_connection_init_rx_config(priv);
2327 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2328
2329 iwl3945_clear_stations_table(priv);
2330
2331 /* dont commit rxon if rf-kill is on*/
2332 if (!iwl3945_is_ready_rf(priv))
2333 return -EAGAIN;
2334
2335 cancel_delayed_work(&priv->scan_check);
2336 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2337 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2338 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2339 return -EAGAIN;
2340 }
2341
2342 iwl3945_commit_rxon(priv);
2343
2344 return 0;
2345 }
2346
2347 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2348 struct ieee80211_tx_info *info,
2349 struct iwl3945_cmd *cmd,
2350 struct sk_buff *skb_frag,
2351 int last_frag)
2352 {
2353 struct iwl3945_hw_key *keyinfo =
2354 &priv->stations[info->control.hw_key->hw_key_idx].keyinfo;
2355
2356 switch (keyinfo->alg) {
2357 case ALG_CCMP:
2358 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2359 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2360 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2361 break;
2362
2363 case ALG_TKIP:
2364 #if 0
2365 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2366
2367 if (last_frag)
2368 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2369 8);
2370 else
2371 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2372 #endif
2373 break;
2374
2375 case ALG_WEP:
2376 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2377 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2378
2379 if (keyinfo->keylen == 13)
2380 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2381
2382 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2383
2384 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2385 "with key %d\n", info->control.hw_key->hw_key_idx);
2386 break;
2387
2388 default:
2389 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2390 break;
2391 }
2392 }
2393
2394 /*
2395 * handle build REPLY_TX command notification.
2396 */
2397 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2398 struct iwl3945_cmd *cmd,
2399 struct ieee80211_tx_info *info,
2400 struct ieee80211_hdr *hdr,
2401 int is_unicast, u8 std_id)
2402 {
2403 __le16 fc = hdr->frame_control;
2404 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2405
2406 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2407 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2408 tx_flags |= TX_CMD_FLG_ACK_MSK;
2409 if (ieee80211_is_mgmt(fc))
2410 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2411 if (ieee80211_is_probe_resp(fc) &&
2412 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2413 tx_flags |= TX_CMD_FLG_TSF_MSK;
2414 } else {
2415 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2416 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2417 }
2418
2419 cmd->cmd.tx.sta_id = std_id;
2420 if (ieee80211_has_morefrags(fc))
2421 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2422
2423 if (ieee80211_is_data_qos(fc)) {
2424 u8 *qc = ieee80211_get_qos_ctl(hdr);
2425 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2426 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2427 } else {
2428 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2429 }
2430
2431 if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
2432 tx_flags |= TX_CMD_FLG_RTS_MSK;
2433 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2434 } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
2435 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2436 tx_flags |= TX_CMD_FLG_CTS_MSK;
2437 }
2438
2439 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2440 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2441
2442 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2443 if (ieee80211_is_mgmt(fc)) {
2444 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2445 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2446 else
2447 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2448 } else {
2449 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2450 #ifdef CONFIG_IWL3945_LEDS
2451 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2452 #endif
2453 }
2454
2455 cmd->cmd.tx.driver_txop = 0;
2456 cmd->cmd.tx.tx_flags = tx_flags;
2457 cmd->cmd.tx.next_frame_len = 0;
2458 }
2459
2460 /**
2461 * iwl3945_get_sta_id - Find station's index within station table
2462 */
2463 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2464 {
2465 int sta_id;
2466 u16 fc = le16_to_cpu(hdr->frame_control);
2467
2468 /* If this frame is broadcast or management, use broadcast station id */
2469 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2470 is_multicast_ether_addr(hdr->addr1))
2471 return priv->hw_setting.bcast_sta_id;
2472
2473 switch (priv->iw_mode) {
2474
2475 /* If we are a client station in a BSS network, use the special
2476 * AP station entry (that's the only station we communicate with) */
2477 case IEEE80211_IF_TYPE_STA:
2478 return IWL_AP_ID;
2479
2480 /* If we are an AP, then find the station, or use BCAST */
2481 case IEEE80211_IF_TYPE_AP:
2482 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2483 if (sta_id != IWL_INVALID_STATION)
2484 return sta_id;
2485 return priv->hw_setting.bcast_sta_id;
2486
2487 /* If this frame is going out to an IBSS network, find the station,
2488 * or create a new station table entry */
2489 case IEEE80211_IF_TYPE_IBSS: {
2490 DECLARE_MAC_BUF(mac);
2491
2492 /* Create new station table entry */
2493 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2494 if (sta_id != IWL_INVALID_STATION)
2495 return sta_id;
2496
2497 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2498
2499 if (sta_id != IWL_INVALID_STATION)
2500 return sta_id;
2501
2502 IWL_DEBUG_DROP("Station %s not in station map. "
2503 "Defaulting to broadcast...\n",
2504 print_mac(mac, hdr->addr1));
2505 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2506 return priv->hw_setting.bcast_sta_id;
2507 }
2508 /* If we are in monitor mode, use BCAST. This is required for
2509 * packet injection. */
2510 case IEEE80211_IF_TYPE_MNTR:
2511 return priv->hw_setting.bcast_sta_id;
2512
2513 default:
2514 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2515 return priv->hw_setting.bcast_sta_id;
2516 }
2517 }
2518
2519 /*
2520 * start REPLY_TX command process
2521 */
2522 static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb)
2523 {
2524 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2525 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2526 struct iwl3945_tfd_frame *tfd;
2527 u32 *control_flags;
2528 int txq_id = skb_get_queue_mapping(skb);
2529 struct iwl3945_tx_queue *txq = NULL;
2530 struct iwl3945_queue *q = NULL;
2531 dma_addr_t phys_addr;
2532 dma_addr_t txcmd_phys;
2533 struct iwl3945_cmd *out_cmd = NULL;
2534 u16 len, idx, len_org, hdr_len;
2535 u8 id;
2536 u8 unicast;
2537 u8 sta_id;
2538 u8 tid = 0;
2539 u16 seq_number = 0;
2540 __le16 fc;
2541 u8 wait_write_ptr = 0;
2542 u8 *qc = NULL;
2543 unsigned long flags;
2544 int rc;
2545
2546 spin_lock_irqsave(&priv->lock, flags);
2547 if (iwl3945_is_rfkill(priv)) {
2548 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2549 goto drop_unlock;
2550 }
2551
2552 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2553 IWL_ERROR("ERROR: No TX rate available.\n");
2554 goto drop_unlock;
2555 }
2556
2557 unicast = !is_multicast_ether_addr(hdr->addr1);
2558 id = 0;
2559
2560 fc = hdr->frame_control;
2561
2562 #ifdef CONFIG_IWL3945_DEBUG
2563 if (ieee80211_is_auth(fc))
2564 IWL_DEBUG_TX("Sending AUTH frame\n");
2565 else if (ieee80211_is_assoc_req(fc))
2566 IWL_DEBUG_TX("Sending ASSOC frame\n");
2567 else if (ieee80211_is_reassoc_req(fc))
2568 IWL_DEBUG_TX("Sending REASSOC frame\n");
2569 #endif
2570
2571 /* drop all data frame if we are not associated */
2572 if (ieee80211_is_data(fc) &&
2573 (priv->iw_mode != IEEE80211_IF_TYPE_MNTR) && /* packet injection */
2574 (!iwl3945_is_associated(priv) ||
2575 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id))) {
2576 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2577 goto drop_unlock;
2578 }
2579
2580 spin_unlock_irqrestore(&priv->lock, flags);
2581
2582 hdr_len = ieee80211_get_hdrlen(le16_to_cpu(fc));
2583
2584 /* Find (or create) index into station table for destination station */
2585 sta_id = iwl3945_get_sta_id(priv, hdr);
2586 if (sta_id == IWL_INVALID_STATION) {
2587 DECLARE_MAC_BUF(mac);
2588
2589 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2590 print_mac(mac, hdr->addr1));
2591 goto drop;
2592 }
2593
2594 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2595
2596 if (ieee80211_is_data_qos(fc)) {
2597 qc = ieee80211_get_qos_ctl(hdr);
2598 tid = qc[0] & 0xf;
2599 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2600 IEEE80211_SCTL_SEQ;
2601 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2602 (hdr->seq_ctrl &
2603 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2604 seq_number += 0x10;
2605 }
2606
2607 /* Descriptor for chosen Tx queue */
2608 txq = &priv->txq[txq_id];
2609 q = &txq->q;
2610
2611 spin_lock_irqsave(&priv->lock, flags);
2612
2613 /* Set up first empty TFD within this queue's circular TFD buffer */
2614 tfd = &txq->bd[q->write_ptr];
2615 memset(tfd, 0, sizeof(*tfd));
2616 control_flags = (u32 *) tfd;
2617 idx = get_cmd_index(q, q->write_ptr, 0);
2618
2619 /* Set up driver data for this TFD */
2620 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2621 txq->txb[q->write_ptr].skb[0] = skb;
2622
2623 /* Init first empty entry in queue's array of Tx/cmd buffers */
2624 out_cmd = &txq->cmd[idx];
2625 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2626 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2627
2628 /*
2629 * Set up the Tx-command (not MAC!) header.
2630 * Store the chosen Tx queue and TFD index within the sequence field;
2631 * after Tx, uCode's Tx response will return this value so driver can
2632 * locate the frame within the tx queue and do post-tx processing.
2633 */
2634 out_cmd->hdr.cmd = REPLY_TX;
2635 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2636 INDEX_TO_SEQ(q->write_ptr)));
2637
2638 /* Copy MAC header from skb into command buffer */
2639 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2640
2641 /*
2642 * Use the first empty entry in this queue's command buffer array
2643 * to contain the Tx command and MAC header concatenated together
2644 * (payload data will be in another buffer).
2645 * Size of this varies, due to varying MAC header length.
2646 * If end is not dword aligned, we'll have 2 extra bytes at the end
2647 * of the MAC header (device reads on dword boundaries).
2648 * We'll tell device about this padding later.
2649 */
2650 len = priv->hw_setting.tx_cmd_len +
2651 sizeof(struct iwl3945_cmd_header) + hdr_len;
2652
2653 len_org = len;
2654 len = (len + 3) & ~3;
2655
2656 if (len_org != len)
2657 len_org = 1;
2658 else
2659 len_org = 0;
2660
2661 /* Physical address of this Tx command's header (not MAC header!),
2662 * within command buffer array. */
2663 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2664 offsetof(struct iwl3945_cmd, hdr);
2665
2666 /* Add buffer containing Tx command and MAC(!) header to TFD's
2667 * first entry */
2668 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2669
2670 if (info->control.hw_key)
2671 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2672
2673 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2674 * if any (802.11 null frames have no payload). */
2675 len = skb->len - hdr_len;
2676 if (len) {
2677 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2678 len, PCI_DMA_TODEVICE);
2679 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2680 }
2681
2682 if (!len)
2683 /* If there is no payload, then we use only one Tx buffer */
2684 *control_flags = TFD_CTL_COUNT_SET(1);
2685 else
2686 /* Else use 2 buffers.
2687 * Tell 3945 about any padding after MAC header */
2688 *control_flags = TFD_CTL_COUNT_SET(2) |
2689 TFD_CTL_PAD_SET(U32_PAD(len));
2690
2691 /* Total # bytes to be transmitted */
2692 len = (u16)skb->len;
2693 out_cmd->cmd.tx.len = cpu_to_le16(len);
2694
2695 /* TODO need this for burst mode later on */
2696 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2697
2698 /* set is_hcca to 0; it probably will never be implemented */
2699 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2700
2701 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2702 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2703
2704 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2705 txq->need_update = 1;
2706 if (qc) {
2707 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2708 }
2709 } else {
2710 wait_write_ptr = 1;
2711 txq->need_update = 0;
2712 }
2713
2714 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2715 sizeof(out_cmd->cmd.tx));
2716
2717 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2718 ieee80211_get_hdrlen(le16_to_cpu(fc)));
2719
2720 /* Tell device the write index *just past* this latest filled TFD */
2721 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2722 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2723 spin_unlock_irqrestore(&priv->lock, flags);
2724
2725 if (rc)
2726 return rc;
2727
2728 if ((iwl3945_queue_space(q) < q->high_mark)
2729 && priv->mac80211_registered) {
2730 if (wait_write_ptr) {
2731 spin_lock_irqsave(&priv->lock, flags);
2732 txq->need_update = 1;
2733 iwl3945_tx_queue_update_write_ptr(priv, txq);
2734 spin_unlock_irqrestore(&priv->lock, flags);
2735 }
2736
2737 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2738 }
2739
2740 return 0;
2741
2742 drop_unlock:
2743 spin_unlock_irqrestore(&priv->lock, flags);
2744 drop:
2745 return -1;
2746 }
2747
2748 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2749 {
2750 const struct ieee80211_supported_band *sband = NULL;
2751 struct ieee80211_rate *rate;
2752 int i;
2753
2754 sband = iwl3945_get_band(priv, priv->band);
2755 if (!sband) {
2756 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2757 return;
2758 }
2759
2760 priv->active_rate = 0;
2761 priv->active_rate_basic = 0;
2762
2763 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2764 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2765
2766 for (i = 0; i < sband->n_bitrates; i++) {
2767 rate = &sband->bitrates[i];
2768 if ((rate->hw_value < IWL_RATE_COUNT) &&
2769 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2770 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2771 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2772 priv->active_rate |= (1 << rate->hw_value);
2773 }
2774 }
2775
2776 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2777 priv->active_rate, priv->active_rate_basic);
2778
2779 /*
2780 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2781 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2782 * OFDM
2783 */
2784 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2785 priv->staging_rxon.cck_basic_rates =
2786 ((priv->active_rate_basic &
2787 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2788 else
2789 priv->staging_rxon.cck_basic_rates =
2790 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2791
2792 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2793 priv->staging_rxon.ofdm_basic_rates =
2794 ((priv->active_rate_basic &
2795 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2796 IWL_FIRST_OFDM_RATE) & 0xFF;
2797 else
2798 priv->staging_rxon.ofdm_basic_rates =
2799 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2800 }
2801
2802 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
2803 {
2804 unsigned long flags;
2805
2806 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2807 return;
2808
2809 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2810 disable_radio ? "OFF" : "ON");
2811
2812 if (disable_radio) {
2813 iwl3945_scan_cancel(priv);
2814 /* FIXME: This is a workaround for AP */
2815 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2816 spin_lock_irqsave(&priv->lock, flags);
2817 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
2818 CSR_UCODE_SW_BIT_RFKILL);
2819 spin_unlock_irqrestore(&priv->lock, flags);
2820 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2821 set_bit(STATUS_RF_KILL_SW, &priv->status);
2822 }
2823 return;
2824 }
2825
2826 spin_lock_irqsave(&priv->lock, flags);
2827 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2828
2829 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2830 spin_unlock_irqrestore(&priv->lock, flags);
2831
2832 /* wake up ucode */
2833 msleep(10);
2834
2835 spin_lock_irqsave(&priv->lock, flags);
2836 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2837 if (!iwl3945_grab_nic_access(priv))
2838 iwl3945_release_nic_access(priv);
2839 spin_unlock_irqrestore(&priv->lock, flags);
2840
2841 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2842 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2843 "disabled by HW switch\n");
2844 return;
2845 }
2846
2847 if (priv->is_open)
2848 queue_work(priv->workqueue, &priv->restart);
2849 return;
2850 }
2851
2852 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
2853 u32 decrypt_res, struct ieee80211_rx_status *stats)
2854 {
2855 u16 fc =
2856 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2857
2858 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2859 return;
2860
2861 if (!(fc & IEEE80211_FCTL_PROTECTED))
2862 return;
2863
2864 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2865 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2866 case RX_RES_STATUS_SEC_TYPE_TKIP:
2867 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2868 RX_RES_STATUS_BAD_ICV_MIC)
2869 stats->flag |= RX_FLAG_MMIC_ERROR;
2870 case RX_RES_STATUS_SEC_TYPE_WEP:
2871 case RX_RES_STATUS_SEC_TYPE_CCMP:
2872 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2873 RX_RES_STATUS_DECRYPT_OK) {
2874 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2875 stats->flag |= RX_FLAG_DECRYPTED;
2876 }
2877 break;
2878
2879 default:
2880 break;
2881 }
2882 }
2883
2884 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2885
2886 #include "iwl-spectrum.h"
2887
2888 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2889 #define BEACON_TIME_MASK_HIGH 0xFF000000
2890 #define TIME_UNIT 1024
2891
2892 /*
2893 * extended beacon time format
2894 * time in usec will be changed into a 32-bit value in 8:24 format
2895 * the high 1 byte is the beacon counts
2896 * the lower 3 bytes is the time in usec within one beacon interval
2897 */
2898
2899 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2900 {
2901 u32 quot;
2902 u32 rem;
2903 u32 interval = beacon_interval * 1024;
2904
2905 if (!interval || !usec)
2906 return 0;
2907
2908 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2909 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2910
2911 return (quot << 24) + rem;
2912 }
2913
2914 /* base is usually what we get from ucode with each received frame,
2915 * the same as HW timer counter counting down
2916 */
2917
2918 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2919 {
2920 u32 base_low = base & BEACON_TIME_MASK_LOW;
2921 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2922 u32 interval = beacon_interval * TIME_UNIT;
2923 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2924 (addon & BEACON_TIME_MASK_HIGH);
2925
2926 if (base_low > addon_low)
2927 res += base_low - addon_low;
2928 else if (base_low < addon_low) {
2929 res += interval + base_low - addon_low;
2930 res += (1 << 24);
2931 } else
2932 res += (1 << 24);
2933
2934 return cpu_to_le32(res);
2935 }
2936
2937 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
2938 struct ieee80211_measurement_params *params,
2939 u8 type)
2940 {
2941 struct iwl3945_spectrum_cmd spectrum;
2942 struct iwl3945_rx_packet *res;
2943 struct iwl3945_host_cmd cmd = {
2944 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2945 .data = (void *)&spectrum,
2946 .meta.flags = CMD_WANT_SKB,
2947 };
2948 u32 add_time = le64_to_cpu(params->start_time);
2949 int rc;
2950 int spectrum_resp_status;
2951 int duration = le16_to_cpu(params->duration);
2952
2953 if (iwl3945_is_associated(priv))
2954 add_time =
2955 iwl3945_usecs_to_beacons(
2956 le64_to_cpu(params->start_time) - priv->last_tsf,
2957 le16_to_cpu(priv->rxon_timing.beacon_interval));
2958
2959 memset(&spectrum, 0, sizeof(spectrum));
2960
2961 spectrum.channel_count = cpu_to_le16(1);
2962 spectrum.flags =
2963 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2964 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2965 cmd.len = sizeof(spectrum);
2966 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2967
2968 if (iwl3945_is_associated(priv))
2969 spectrum.start_time =
2970 iwl3945_add_beacon_time(priv->last_beacon_time,
2971 add_time,
2972 le16_to_cpu(priv->rxon_timing.beacon_interval));
2973 else
2974 spectrum.start_time = 0;
2975
2976 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2977 spectrum.channels[0].channel = params->channel;
2978 spectrum.channels[0].type = type;
2979 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2980 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2981 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2982
2983 rc = iwl3945_send_cmd_sync(priv, &cmd);
2984 if (rc)
2985 return rc;
2986
2987 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
2988 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2989 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2990 rc = -EIO;
2991 }
2992
2993 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2994 switch (spectrum_resp_status) {
2995 case 0: /* Command will be handled */
2996 if (res->u.spectrum.id != 0xff) {
2997 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2998 res->u.spectrum.id);
2999 priv->measurement_status &= ~MEASUREMENT_READY;
3000 }
3001 priv->measurement_status |= MEASUREMENT_ACTIVE;
3002 rc = 0;
3003 break;
3004
3005 case 1: /* Command will not be handled */
3006 rc = -EAGAIN;
3007 break;
3008 }
3009
3010 dev_kfree_skb_any(cmd.meta.u.skb);
3011
3012 return rc;
3013 }
3014 #endif
3015
3016 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3017 struct iwl3945_rx_mem_buffer *rxb)
3018 {
3019 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3020 struct iwl3945_alive_resp *palive;
3021 struct delayed_work *pwork;
3022
3023 palive = &pkt->u.alive_frame;
3024
3025 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3026 "0x%01X 0x%01X\n",
3027 palive->is_valid, palive->ver_type,
3028 palive->ver_subtype);
3029
3030 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3031 IWL_DEBUG_INFO("Initialization Alive received.\n");
3032 memcpy(&priv->card_alive_init,
3033 &pkt->u.alive_frame,
3034 sizeof(struct iwl3945_init_alive_resp));
3035 pwork = &priv->init_alive_start;
3036 } else {
3037 IWL_DEBUG_INFO("Runtime Alive received.\n");
3038 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3039 sizeof(struct iwl3945_alive_resp));
3040 pwork = &priv->alive_start;
3041 iwl3945_disable_events(priv);
3042 }
3043
3044 /* We delay the ALIVE response by 5ms to
3045 * give the HW RF Kill time to activate... */
3046 if (palive->is_valid == UCODE_VALID_OK)
3047 queue_delayed_work(priv->workqueue, pwork,
3048 msecs_to_jiffies(5));
3049 else
3050 IWL_WARNING("uCode did not respond OK.\n");
3051 }
3052
3053 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3054 struct iwl3945_rx_mem_buffer *rxb)
3055 {
3056 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3057
3058 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3059 return;
3060 }
3061
3062 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3063 struct iwl3945_rx_mem_buffer *rxb)
3064 {
3065 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3066
3067 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3068 "seq 0x%04X ser 0x%08X\n",
3069 le32_to_cpu(pkt->u.err_resp.error_type),
3070 get_cmd_string(pkt->u.err_resp.cmd_id),
3071 pkt->u.err_resp.cmd_id,
3072 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3073 le32_to_cpu(pkt->u.err_resp.error_info));
3074 }
3075
3076 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3077
3078 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3079 {
3080 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3081 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3082 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3083 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3084 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3085 rxon->channel = csa->channel;
3086 priv->staging_rxon.channel = csa->channel;
3087 }
3088
3089 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3090 struct iwl3945_rx_mem_buffer *rxb)
3091 {
3092 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3093 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3094 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3095
3096 if (!report->state) {
3097 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3098 "Spectrum Measure Notification: Start\n");
3099 return;
3100 }
3101
3102 memcpy(&priv->measure_report, report, sizeof(*report));
3103 priv->measurement_status |= MEASUREMENT_READY;
3104 #endif
3105 }
3106
3107 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3108 struct iwl3945_rx_mem_buffer *rxb)
3109 {
3110 #ifdef CONFIG_IWL3945_DEBUG
3111 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3112 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3113 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3114 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3115 #endif
3116 }
3117
3118 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3119 struct iwl3945_rx_mem_buffer *rxb)
3120 {
3121 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3122 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3123 "notification for %s:\n",
3124 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3125 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3126 }
3127
3128 static void iwl3945_bg_beacon_update(struct work_struct *work)
3129 {
3130 struct iwl3945_priv *priv =
3131 container_of(work, struct iwl3945_priv, beacon_update);
3132 struct sk_buff *beacon;
3133
3134 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3135 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
3136
3137 if (!beacon) {
3138 IWL_ERROR("update beacon failed\n");
3139 return;
3140 }
3141
3142 mutex_lock(&priv->mutex);
3143 /* new beacon skb is allocated every time; dispose previous.*/
3144 if (priv->ibss_beacon)
3145 dev_kfree_skb(priv->ibss_beacon);
3146
3147 priv->ibss_beacon = beacon;
3148 mutex_unlock(&priv->mutex);
3149
3150 iwl3945_send_beacon_cmd(priv);
3151 }
3152
3153 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3154 struct iwl3945_rx_mem_buffer *rxb)
3155 {
3156 #ifdef CONFIG_IWL3945_DEBUG
3157 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3158 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3159 u8 rate = beacon->beacon_notify_hdr.rate;
3160
3161 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3162 "tsf %d %d rate %d\n",
3163 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3164 beacon->beacon_notify_hdr.failure_frame,
3165 le32_to_cpu(beacon->ibss_mgr_status),
3166 le32_to_cpu(beacon->high_tsf),
3167 le32_to_cpu(beacon->low_tsf), rate);
3168 #endif
3169
3170 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3171 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3172 queue_work(priv->workqueue, &priv->beacon_update);
3173 }
3174
3175 /* Service response to REPLY_SCAN_CMD (0x80) */
3176 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3177 struct iwl3945_rx_mem_buffer *rxb)
3178 {
3179 #ifdef CONFIG_IWL3945_DEBUG
3180 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3181 struct iwl3945_scanreq_notification *notif =
3182 (struct iwl3945_scanreq_notification *)pkt->u.raw;
3183
3184 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3185 #endif
3186 }
3187
3188 /* Service SCAN_START_NOTIFICATION (0x82) */
3189 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3190 struct iwl3945_rx_mem_buffer *rxb)
3191 {
3192 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3193 struct iwl3945_scanstart_notification *notif =
3194 (struct iwl3945_scanstart_notification *)pkt->u.raw;
3195 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3196 IWL_DEBUG_SCAN("Scan start: "
3197 "%d [802.11%s] "
3198 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3199 notif->channel,
3200 notif->band ? "bg" : "a",
3201 notif->tsf_high,
3202 notif->tsf_low, notif->status, notif->beacon_timer);
3203 }
3204
3205 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3206 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3207 struct iwl3945_rx_mem_buffer *rxb)
3208 {
3209 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3210 struct iwl3945_scanresults_notification *notif =
3211 (struct iwl3945_scanresults_notification *)pkt->u.raw;
3212
3213 IWL_DEBUG_SCAN("Scan ch.res: "
3214 "%d [802.11%s] "
3215 "(TSF: 0x%08X:%08X) - %d "
3216 "elapsed=%lu usec (%dms since last)\n",
3217 notif->channel,
3218 notif->band ? "bg" : "a",
3219 le32_to_cpu(notif->tsf_high),
3220 le32_to_cpu(notif->tsf_low),
3221 le32_to_cpu(notif->statistics[0]),
3222 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3223 jiffies_to_msecs(elapsed_jiffies
3224 (priv->last_scan_jiffies, jiffies)));
3225
3226 priv->last_scan_jiffies = jiffies;
3227 priv->next_scan_jiffies = 0;
3228 }
3229
3230 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3231 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3232 struct iwl3945_rx_mem_buffer *rxb)
3233 {
3234 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3235 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3236
3237 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3238 scan_notif->scanned_channels,
3239 scan_notif->tsf_low,
3240 scan_notif->tsf_high, scan_notif->status);
3241
3242 /* The HW is no longer scanning */
3243 clear_bit(STATUS_SCAN_HW, &priv->status);
3244
3245 /* The scan completion notification came in, so kill that timer... */
3246 cancel_delayed_work(&priv->scan_check);
3247
3248 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3249 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3250 "2.4" : "5.2",
3251 jiffies_to_msecs(elapsed_jiffies
3252 (priv->scan_pass_start, jiffies)));
3253
3254 /* Remove this scanned band from the list of pending
3255 * bands to scan, band G precedes A in order of scanning
3256 * as seen in iwl3945_bg_request_scan */
3257 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3258 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3259 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3260 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3261
3262 /* If a request to abort was given, or the scan did not succeed
3263 * then we reset the scan state machine and terminate,
3264 * re-queuing another scan if one has been requested */
3265 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3266 IWL_DEBUG_INFO("Aborted scan completed.\n");
3267 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3268 } else {
3269 /* If there are more bands on this scan pass reschedule */
3270 if (priv->scan_bands > 0)
3271 goto reschedule;
3272 }
3273
3274 priv->last_scan_jiffies = jiffies;
3275 priv->next_scan_jiffies = 0;
3276 IWL_DEBUG_INFO("Setting scan to off\n");
3277
3278 clear_bit(STATUS_SCANNING, &priv->status);
3279
3280 IWL_DEBUG_INFO("Scan took %dms\n",
3281 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3282
3283 queue_work(priv->workqueue, &priv->scan_completed);
3284
3285 return;
3286
3287 reschedule:
3288 priv->scan_pass_start = jiffies;
3289 queue_work(priv->workqueue, &priv->request_scan);
3290 }
3291
3292 /* Handle notification from uCode that card's power state is changing
3293 * due to software, hardware, or critical temperature RFKILL */
3294 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3295 struct iwl3945_rx_mem_buffer *rxb)
3296 {
3297 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3298 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3299 unsigned long status = priv->status;
3300
3301 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3302 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3303 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3304
3305 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3306 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3307
3308 if (flags & HW_CARD_DISABLED)
3309 set_bit(STATUS_RF_KILL_HW, &priv->status);
3310 else
3311 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3312
3313
3314 if (flags & SW_CARD_DISABLED)
3315 set_bit(STATUS_RF_KILL_SW, &priv->status);
3316 else
3317 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3318
3319 iwl3945_scan_cancel(priv);
3320
3321 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3322 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3323 (test_bit(STATUS_RF_KILL_SW, &status) !=
3324 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3325 queue_work(priv->workqueue, &priv->rf_kill);
3326 else
3327 wake_up_interruptible(&priv->wait_command_queue);
3328 }
3329
3330 /**
3331 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3332 *
3333 * Setup the RX handlers for each of the reply types sent from the uCode
3334 * to the host.
3335 *
3336 * This function chains into the hardware specific files for them to setup
3337 * any hardware specific handlers as well.
3338 */
3339 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3340 {
3341 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3342 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3343 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3344 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3345 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3346 iwl3945_rx_spectrum_measure_notif;
3347 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3348 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3349 iwl3945_rx_pm_debug_statistics_notif;
3350 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3351
3352 /*
3353 * The same handler is used for both the REPLY to a discrete
3354 * statistics request from the host as well as for the periodic
3355 * statistics notifications (after received beacons) from the uCode.
3356 */
3357 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3358 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3359
3360 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3361 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3362 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3363 iwl3945_rx_scan_results_notif;
3364 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3365 iwl3945_rx_scan_complete_notif;
3366 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3367
3368 /* Set up hardware specific Rx handlers */
3369 iwl3945_hw_rx_handler_setup(priv);
3370 }
3371
3372 /**
3373 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3374 * When FW advances 'R' index, all entries between old and new 'R' index
3375 * need to be reclaimed.
3376 */
3377 static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3378 int txq_id, int index)
3379 {
3380 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3381 struct iwl3945_queue *q = &txq->q;
3382 int nfreed = 0;
3383
3384 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3385 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3386 "is out of range [0-%d] %d %d.\n", txq_id,
3387 index, q->n_bd, q->write_ptr, q->read_ptr);
3388 return;
3389 }
3390
3391 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3392 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3393 if (nfreed > 1) {
3394 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3395 q->write_ptr, q->read_ptr);
3396 queue_work(priv->workqueue, &priv->restart);
3397 break;
3398 }
3399 nfreed++;
3400 }
3401 }
3402
3403
3404 /**
3405 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3406 * @rxb: Rx buffer to reclaim
3407 *
3408 * If an Rx buffer has an async callback associated with it the callback
3409 * will be executed. The attached skb (if present) will only be freed
3410 * if the callback returns 1
3411 */
3412 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3413 struct iwl3945_rx_mem_buffer *rxb)
3414 {
3415 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3416 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3417 int txq_id = SEQ_TO_QUEUE(sequence);
3418 int index = SEQ_TO_INDEX(sequence);
3419 int huge = sequence & SEQ_HUGE_FRAME;
3420 int cmd_index;
3421 struct iwl3945_cmd *cmd;
3422
3423 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3424
3425 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3426 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3427
3428 /* Input error checking is done when commands are added to queue. */
3429 if (cmd->meta.flags & CMD_WANT_SKB) {
3430 cmd->meta.source->u.skb = rxb->skb;
3431 rxb->skb = NULL;
3432 } else if (cmd->meta.u.callback &&
3433 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3434 rxb->skb = NULL;
3435
3436 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3437
3438 if (!(cmd->meta.flags & CMD_ASYNC)) {
3439 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3440 wake_up_interruptible(&priv->wait_command_queue);
3441 }
3442 }
3443
3444 /************************** RX-FUNCTIONS ****************************/
3445 /*
3446 * Rx theory of operation
3447 *
3448 * The host allocates 32 DMA target addresses and passes the host address
3449 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3450 * 0 to 31
3451 *
3452 * Rx Queue Indexes
3453 * The host/firmware share two index registers for managing the Rx buffers.
3454 *
3455 * The READ index maps to the first position that the firmware may be writing
3456 * to -- the driver can read up to (but not including) this position and get
3457 * good data.
3458 * The READ index is managed by the firmware once the card is enabled.
3459 *
3460 * The WRITE index maps to the last position the driver has read from -- the
3461 * position preceding WRITE is the last slot the firmware can place a packet.
3462 *
3463 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3464 * WRITE = READ.
3465 *
3466 * During initialization, the host sets up the READ queue position to the first
3467 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3468 *
3469 * When the firmware places a packet in a buffer, it will advance the READ index
3470 * and fire the RX interrupt. The driver can then query the READ index and
3471 * process as many packets as possible, moving the WRITE index forward as it
3472 * resets the Rx queue buffers with new memory.
3473 *
3474 * The management in the driver is as follows:
3475 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3476 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3477 * to replenish the iwl->rxq->rx_free.
3478 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3479 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3480 * 'processed' and 'read' driver indexes as well)
3481 * + A received packet is processed and handed to the kernel network stack,
3482 * detached from the iwl->rxq. The driver 'processed' index is updated.
3483 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3484 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3485 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3486 * were enough free buffers and RX_STALLED is set it is cleared.
3487 *
3488 *
3489 * Driver sequence:
3490 *
3491 * iwl3945_rx_queue_alloc() Allocates rx_free
3492 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3493 * iwl3945_rx_queue_restock
3494 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3495 * queue, updates firmware pointers, and updates
3496 * the WRITE index. If insufficient rx_free buffers
3497 * are available, schedules iwl3945_rx_replenish
3498 *
3499 * -- enable interrupts --
3500 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3501 * READ INDEX, detaching the SKB from the pool.
3502 * Moves the packet buffer from queue to rx_used.
3503 * Calls iwl3945_rx_queue_restock to refill any empty
3504 * slots.
3505 * ...
3506 *
3507 */
3508
3509 /**
3510 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3511 */
3512 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3513 {
3514 int s = q->read - q->write;
3515 if (s <= 0)
3516 s += RX_QUEUE_SIZE;
3517 /* keep some buffer to not confuse full and empty queue */
3518 s -= 2;
3519 if (s < 0)
3520 s = 0;
3521 return s;
3522 }
3523
3524 /**
3525 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3526 */
3527 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3528 {
3529 u32 reg = 0;
3530 int rc = 0;
3531 unsigned long flags;
3532
3533 spin_lock_irqsave(&q->lock, flags);
3534
3535 if (q->need_update == 0)
3536 goto exit_unlock;
3537
3538 /* If power-saving is in use, make sure device is awake */
3539 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3540 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3541
3542 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3543 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3544 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3545 goto exit_unlock;
3546 }
3547
3548 rc = iwl3945_grab_nic_access(priv);
3549 if (rc)
3550 goto exit_unlock;
3551
3552 /* Device expects a multiple of 8 */
3553 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3554 q->write & ~0x7);
3555 iwl3945_release_nic_access(priv);
3556
3557 /* Else device is assumed to be awake */
3558 } else
3559 /* Device expects a multiple of 8 */
3560 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3561
3562
3563 q->need_update = 0;
3564
3565 exit_unlock:
3566 spin_unlock_irqrestore(&q->lock, flags);
3567 return rc;
3568 }
3569
3570 /**
3571 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3572 */
3573 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3574 dma_addr_t dma_addr)
3575 {
3576 return cpu_to_le32((u32)dma_addr);
3577 }
3578
3579 /**
3580 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3581 *
3582 * If there are slots in the RX queue that need to be restocked,
3583 * and we have free pre-allocated buffers, fill the ranks as much
3584 * as we can, pulling from rx_free.
3585 *
3586 * This moves the 'write' index forward to catch up with 'processed', and
3587 * also updates the memory address in the firmware to reference the new
3588 * target buffer.
3589 */
3590 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3591 {
3592 struct iwl3945_rx_queue *rxq = &priv->rxq;
3593 struct list_head *element;
3594 struct iwl3945_rx_mem_buffer *rxb;
3595 unsigned long flags;
3596 int write, rc;
3597
3598 spin_lock_irqsave(&rxq->lock, flags);
3599 write = rxq->write & ~0x7;
3600 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3601 /* Get next free Rx buffer, remove from free list */
3602 element = rxq->rx_free.next;
3603 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3604 list_del(element);
3605
3606 /* Point to Rx buffer via next RBD in circular buffer */
3607 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
3608 rxq->queue[rxq->write] = rxb;
3609 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3610 rxq->free_count--;
3611 }
3612 spin_unlock_irqrestore(&rxq->lock, flags);
3613 /* If the pre-allocated buffer pool is dropping low, schedule to
3614 * refill it */
3615 if (rxq->free_count <= RX_LOW_WATERMARK)
3616 queue_work(priv->workqueue, &priv->rx_replenish);
3617
3618
3619 /* If we've added more space for the firmware to place data, tell it.
3620 * Increment device's write pointer in multiples of 8. */
3621 if ((write != (rxq->write & ~0x7))
3622 || (abs(rxq->write - rxq->read) > 7)) {
3623 spin_lock_irqsave(&rxq->lock, flags);
3624 rxq->need_update = 1;
3625 spin_unlock_irqrestore(&rxq->lock, flags);
3626 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3627 if (rc)
3628 return rc;
3629 }
3630
3631 return 0;
3632 }
3633
3634 /**
3635 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3636 *
3637 * When moving to rx_free an SKB is allocated for the slot.
3638 *
3639 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3640 * This is called as a scheduled work item (except for during initialization)
3641 */
3642 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
3643 {
3644 struct iwl3945_rx_queue *rxq = &priv->rxq;
3645 struct list_head *element;
3646 struct iwl3945_rx_mem_buffer *rxb;
3647 unsigned long flags;
3648 spin_lock_irqsave(&rxq->lock, flags);
3649 while (!list_empty(&rxq->rx_used)) {
3650 element = rxq->rx_used.next;
3651 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3652
3653 /* Alloc a new receive buffer */
3654 rxb->skb =
3655 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3656 if (!rxb->skb) {
3657 if (net_ratelimit())
3658 printk(KERN_CRIT DRV_NAME
3659 ": Can not allocate SKB buffers\n");
3660 /* We don't reschedule replenish work here -- we will
3661 * call the restock method and if it still needs
3662 * more buffers it will schedule replenish */
3663 break;
3664 }
3665
3666 /* If radiotap head is required, reserve some headroom here.
3667 * The physical head count is a variable rx_stats->phy_count.
3668 * We reserve 4 bytes here. Plus these extra bytes, the
3669 * headroom of the physical head should be enough for the
3670 * radiotap head that iwl3945 supported. See iwl3945_rt.
3671 */
3672 skb_reserve(rxb->skb, 4);
3673
3674 priv->alloc_rxb_skb++;
3675 list_del(element);
3676
3677 /* Get physical address of RB/SKB */
3678 rxb->dma_addr =
3679 pci_map_single(priv->pci_dev, rxb->skb->data,
3680 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3681 list_add_tail(&rxb->list, &rxq->rx_free);
3682 rxq->free_count++;
3683 }
3684 spin_unlock_irqrestore(&rxq->lock, flags);
3685 }
3686
3687 /*
3688 * this should be called while priv->lock is locked
3689 */
3690 static void __iwl3945_rx_replenish(void *data)
3691 {
3692 struct iwl3945_priv *priv = data;
3693
3694 iwl3945_rx_allocate(priv);
3695 iwl3945_rx_queue_restock(priv);
3696 }
3697
3698
3699 void iwl3945_rx_replenish(void *data)
3700 {
3701 struct iwl3945_priv *priv = data;
3702 unsigned long flags;
3703
3704 iwl3945_rx_allocate(priv);
3705
3706 spin_lock_irqsave(&priv->lock, flags);
3707 iwl3945_rx_queue_restock(priv);
3708 spin_unlock_irqrestore(&priv->lock, flags);
3709 }
3710
3711 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3712 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3713 * This free routine walks the list of POOL entries and if SKB is set to
3714 * non NULL it is unmapped and freed
3715 */
3716 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3717 {
3718 int i;
3719 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3720 if (rxq->pool[i].skb != NULL) {
3721 pci_unmap_single(priv->pci_dev,
3722 rxq->pool[i].dma_addr,
3723 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3724 dev_kfree_skb(rxq->pool[i].skb);
3725 }
3726 }
3727
3728 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3729 rxq->dma_addr);
3730 rxq->bd = NULL;
3731 }
3732
3733 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
3734 {
3735 struct iwl3945_rx_queue *rxq = &priv->rxq;
3736 struct pci_dev *dev = priv->pci_dev;
3737 int i;
3738
3739 spin_lock_init(&rxq->lock);
3740 INIT_LIST_HEAD(&rxq->rx_free);
3741 INIT_LIST_HEAD(&rxq->rx_used);
3742
3743 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3744 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3745 if (!rxq->bd)
3746 return -ENOMEM;
3747
3748 /* Fill the rx_used queue with _all_ of the Rx buffers */
3749 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3750 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3751
3752 /* Set us so that we have processed and used all buffers, but have
3753 * not restocked the Rx queue with fresh buffers */
3754 rxq->read = rxq->write = 0;
3755 rxq->free_count = 0;
3756 rxq->need_update = 0;
3757 return 0;
3758 }
3759
3760 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3761 {
3762 unsigned long flags;
3763 int i;
3764 spin_lock_irqsave(&rxq->lock, flags);
3765 INIT_LIST_HEAD(&rxq->rx_free);
3766 INIT_LIST_HEAD(&rxq->rx_used);
3767 /* Fill the rx_used queue with _all_ of the Rx buffers */
3768 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3769 /* In the reset function, these buffers may have been allocated
3770 * to an SKB, so we need to unmap and free potential storage */
3771 if (rxq->pool[i].skb != NULL) {
3772 pci_unmap_single(priv->pci_dev,
3773 rxq->pool[i].dma_addr,
3774 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3775 priv->alloc_rxb_skb--;
3776 dev_kfree_skb(rxq->pool[i].skb);
3777 rxq->pool[i].skb = NULL;
3778 }
3779 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3780 }
3781
3782 /* Set us so that we have processed and used all buffers, but have
3783 * not restocked the Rx queue with fresh buffers */
3784 rxq->read = rxq->write = 0;
3785 rxq->free_count = 0;
3786 spin_unlock_irqrestore(&rxq->lock, flags);
3787 }
3788
3789 /* Convert linear signal-to-noise ratio into dB */
3790 static u8 ratio2dB[100] = {
3791 /* 0 1 2 3 4 5 6 7 8 9 */
3792 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3793 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3794 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3795 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3796 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3797 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3798 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3799 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3800 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3801 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3802 };
3803
3804 /* Calculates a relative dB value from a ratio of linear
3805 * (i.e. not dB) signal levels.
3806 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3807 int iwl3945_calc_db_from_ratio(int sig_ratio)
3808 {
3809 /* 1000:1 or higher just report as 60 dB */
3810 if (sig_ratio >= 1000)
3811 return 60;
3812
3813 /* 100:1 or higher, divide by 10 and use table,
3814 * add 20 dB to make up for divide by 10 */
3815 if (sig_ratio >= 100)
3816 return (20 + (int)ratio2dB[sig_ratio/10]);
3817
3818 /* We shouldn't see this */
3819 if (sig_ratio < 1)
3820 return 0;
3821
3822 /* Use table for ratios 1:1 - 99:1 */
3823 return (int)ratio2dB[sig_ratio];
3824 }
3825
3826 #define PERFECT_RSSI (-20) /* dBm */
3827 #define WORST_RSSI (-95) /* dBm */
3828 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3829
3830 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3831 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3832 * about formulas used below. */
3833 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3834 {
3835 int sig_qual;
3836 int degradation = PERFECT_RSSI - rssi_dbm;
3837
3838 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3839 * as indicator; formula is (signal dbm - noise dbm).
3840 * SNR at or above 40 is a great signal (100%).
3841 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3842 * Weakest usable signal is usually 10 - 15 dB SNR. */
3843 if (noise_dbm) {
3844 if (rssi_dbm - noise_dbm >= 40)
3845 return 100;
3846 else if (rssi_dbm < noise_dbm)
3847 return 0;
3848 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3849
3850 /* Else use just the signal level.
3851 * This formula is a least squares fit of data points collected and
3852 * compared with a reference system that had a percentage (%) display
3853 * for signal quality. */
3854 } else
3855 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3856 (15 * RSSI_RANGE + 62 * degradation)) /
3857 (RSSI_RANGE * RSSI_RANGE);
3858
3859 if (sig_qual > 100)
3860 sig_qual = 100;
3861 else if (sig_qual < 1)
3862 sig_qual = 0;
3863
3864 return sig_qual;
3865 }
3866
3867 /**
3868 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3869 *
3870 * Uses the priv->rx_handlers callback function array to invoke
3871 * the appropriate handlers, including command responses,
3872 * frame-received notifications, and other notifications.
3873 */
3874 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
3875 {
3876 struct iwl3945_rx_mem_buffer *rxb;
3877 struct iwl3945_rx_packet *pkt;
3878 struct iwl3945_rx_queue *rxq = &priv->rxq;
3879 u32 r, i;
3880 int reclaim;
3881 unsigned long flags;
3882 u8 fill_rx = 0;
3883 u32 count = 8;
3884
3885 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3886 * buffer that the driver may process (last buffer filled by ucode). */
3887 r = iwl3945_hw_get_rx_read(priv);
3888 i = rxq->read;
3889
3890 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3891 fill_rx = 1;
3892 /* Rx interrupt, but nothing sent from uCode */
3893 if (i == r)
3894 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3895
3896 while (i != r) {
3897 rxb = rxq->queue[i];
3898
3899 /* If an RXB doesn't have a Rx queue slot associated with it,
3900 * then a bug has been introduced in the queue refilling
3901 * routines -- catch it here */
3902 BUG_ON(rxb == NULL);
3903
3904 rxq->queue[i] = NULL;
3905
3906 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
3907 IWL_RX_BUF_SIZE,
3908 PCI_DMA_FROMDEVICE);
3909 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3910
3911 /* Reclaim a command buffer only if this packet is a response
3912 * to a (driver-originated) command.
3913 * If the packet (e.g. Rx frame) originated from uCode,
3914 * there is no command buffer to reclaim.
3915 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3916 * but apparently a few don't get set; catch them here. */
3917 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3918 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3919 (pkt->hdr.cmd != REPLY_TX);
3920
3921 /* Based on type of command response or notification,
3922 * handle those that need handling via function in
3923 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3924 if (priv->rx_handlers[pkt->hdr.cmd]) {
3925 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3926 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3927 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3928 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3929 } else {
3930 /* No handling needed */
3931 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3932 "r %d i %d No handler needed for %s, 0x%02x\n",
3933 r, i, get_cmd_string(pkt->hdr.cmd),
3934 pkt->hdr.cmd);
3935 }
3936
3937 if (reclaim) {
3938 /* Invoke any callbacks, transfer the skb to caller, and
3939 * fire off the (possibly) blocking iwl3945_send_cmd()
3940 * as we reclaim the driver command queue */
3941 if (rxb && rxb->skb)
3942 iwl3945_tx_cmd_complete(priv, rxb);
3943 else
3944 IWL_WARNING("Claim null rxb?\n");
3945 }
3946
3947 /* For now we just don't re-use anything. We can tweak this
3948 * later to try and re-use notification packets and SKBs that
3949 * fail to Rx correctly */
3950 if (rxb->skb != NULL) {
3951 priv->alloc_rxb_skb--;
3952 dev_kfree_skb_any(rxb->skb);
3953 rxb->skb = NULL;
3954 }
3955
3956 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
3957 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3958 spin_lock_irqsave(&rxq->lock, flags);
3959 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3960 spin_unlock_irqrestore(&rxq->lock, flags);
3961 i = (i + 1) & RX_QUEUE_MASK;
3962 /* If there are a lot of unused frames,
3963 * restock the Rx queue so ucode won't assert. */
3964 if (fill_rx) {
3965 count++;
3966 if (count >= 8) {
3967 priv->rxq.read = i;
3968 __iwl3945_rx_replenish(priv);
3969 count = 0;
3970 }
3971 }
3972 }
3973
3974 /* Backtrack one entry */
3975 priv->rxq.read = i;
3976 iwl3945_rx_queue_restock(priv);
3977 }
3978
3979 /**
3980 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3981 */
3982 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
3983 struct iwl3945_tx_queue *txq)
3984 {
3985 u32 reg = 0;
3986 int rc = 0;
3987 int txq_id = txq->q.id;
3988
3989 if (txq->need_update == 0)
3990 return rc;
3991
3992 /* if we're trying to save power */
3993 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3994 /* wake up nic if it's powered down ...
3995 * uCode will wake up, and interrupt us again, so next
3996 * time we'll skip this part. */
3997 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3998
3999 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4000 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4001 iwl3945_set_bit(priv, CSR_GP_CNTRL,
4002 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4003 return rc;
4004 }
4005
4006 /* restore this queue's parameters in nic hardware. */
4007 rc = iwl3945_grab_nic_access(priv);
4008 if (rc)
4009 return rc;
4010 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
4011 txq->q.write_ptr | (txq_id << 8));
4012 iwl3945_release_nic_access(priv);
4013
4014 /* else not in power-save mode, uCode will never sleep when we're
4015 * trying to tx (during RFKILL, we're not trying to tx). */
4016 } else
4017 iwl3945_write32(priv, HBUS_TARG_WRPTR,
4018 txq->q.write_ptr | (txq_id << 8));
4019
4020 txq->need_update = 0;
4021
4022 return rc;
4023 }
4024
4025 #ifdef CONFIG_IWL3945_DEBUG
4026 static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
4027 {
4028 DECLARE_MAC_BUF(mac);
4029
4030 IWL_DEBUG_RADIO("RX CONFIG:\n");
4031 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4032 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4033 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4034 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4035 le32_to_cpu(rxon->filter_flags));
4036 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4037 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4038 rxon->ofdm_basic_rates);
4039 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4040 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4041 print_mac(mac, rxon->node_addr));
4042 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4043 print_mac(mac, rxon->bssid_addr));
4044 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4045 }
4046 #endif
4047
4048 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
4049 {
4050 IWL_DEBUG_ISR("Enabling interrupts\n");
4051 set_bit(STATUS_INT_ENABLED, &priv->status);
4052 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4053 }
4054
4055
4056 /* call this function to flush any scheduled tasklet */
4057 static inline void iwl_synchronize_irq(struct iwl3945_priv *priv)
4058 {
4059 /* wait to make sure we flush pedding tasklet*/
4060 synchronize_irq(priv->pci_dev->irq);
4061 tasklet_kill(&priv->irq_tasklet);
4062 }
4063
4064
4065 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
4066 {
4067 clear_bit(STATUS_INT_ENABLED, &priv->status);
4068
4069 /* disable interrupts from uCode/NIC to host */
4070 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4071
4072 /* acknowledge/clear/reset any interrupts still pending
4073 * from uCode or flow handler (Rx/Tx DMA) */
4074 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4075 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4076 IWL_DEBUG_ISR("Disabled interrupts\n");
4077 }
4078
4079 static const char *desc_lookup(int i)
4080 {
4081 switch (i) {
4082 case 1:
4083 return "FAIL";
4084 case 2:
4085 return "BAD_PARAM";
4086 case 3:
4087 return "BAD_CHECKSUM";
4088 case 4:
4089 return "NMI_INTERRUPT";
4090 case 5:
4091 return "SYSASSERT";
4092 case 6:
4093 return "FATAL_ERROR";
4094 }
4095
4096 return "UNKNOWN";
4097 }
4098
4099 #define ERROR_START_OFFSET (1 * sizeof(u32))
4100 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4101
4102 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4103 {
4104 u32 i;
4105 u32 desc, time, count, base, data1;
4106 u32 blink1, blink2, ilink1, ilink2;
4107 int rc;
4108
4109 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4110
4111 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4112 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4113 return;
4114 }
4115
4116 rc = iwl3945_grab_nic_access(priv);
4117 if (rc) {
4118 IWL_WARNING("Can not read from adapter at this time.\n");
4119 return;
4120 }
4121
4122 count = iwl3945_read_targ_mem(priv, base);
4123
4124 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4125 IWL_ERROR("Start IWL Error Log Dump:\n");
4126 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
4127 }
4128
4129 IWL_ERROR("Desc Time asrtPC blink2 "
4130 "ilink1 nmiPC Line\n");
4131 for (i = ERROR_START_OFFSET;
4132 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4133 i += ERROR_ELEM_SIZE) {
4134 desc = iwl3945_read_targ_mem(priv, base + i);
4135 time =
4136 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4137 blink1 =
4138 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4139 blink2 =
4140 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4141 ilink1 =
4142 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4143 ilink2 =
4144 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4145 data1 =
4146 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4147
4148 IWL_ERROR
4149 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4150 desc_lookup(desc), desc, time, blink1, blink2,
4151 ilink1, ilink2, data1);
4152 }
4153
4154 iwl3945_release_nic_access(priv);
4155
4156 }
4157
4158 #define EVENT_START_OFFSET (6 * sizeof(u32))
4159
4160 /**
4161 * iwl3945_print_event_log - Dump error event log to syslog
4162 *
4163 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4164 */
4165 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4166 u32 num_events, u32 mode)
4167 {
4168 u32 i;
4169 u32 base; /* SRAM byte address of event log header */
4170 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4171 u32 ptr; /* SRAM byte address of log data */
4172 u32 ev, time, data; /* event log data */
4173
4174 if (num_events == 0)
4175 return;
4176
4177 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4178
4179 if (mode == 0)
4180 event_size = 2 * sizeof(u32);
4181 else
4182 event_size = 3 * sizeof(u32);
4183
4184 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4185
4186 /* "time" is actually "data" for mode 0 (no timestamp).
4187 * place event id # at far right for easier visual parsing. */
4188 for (i = 0; i < num_events; i++) {
4189 ev = iwl3945_read_targ_mem(priv, ptr);
4190 ptr += sizeof(u32);
4191 time = iwl3945_read_targ_mem(priv, ptr);
4192 ptr += sizeof(u32);
4193 if (mode == 0)
4194 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4195 else {
4196 data = iwl3945_read_targ_mem(priv, ptr);
4197 ptr += sizeof(u32);
4198 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4199 }
4200 }
4201 }
4202
4203 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4204 {
4205 int rc;
4206 u32 base; /* SRAM byte address of event log header */
4207 u32 capacity; /* event log capacity in # entries */
4208 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4209 u32 num_wraps; /* # times uCode wrapped to top of log */
4210 u32 next_entry; /* index of next entry to be written by uCode */
4211 u32 size; /* # entries that we'll print */
4212
4213 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4214 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4215 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4216 return;
4217 }
4218
4219 rc = iwl3945_grab_nic_access(priv);
4220 if (rc) {
4221 IWL_WARNING("Can not read from adapter at this time.\n");
4222 return;
4223 }
4224
4225 /* event log header */
4226 capacity = iwl3945_read_targ_mem(priv, base);
4227 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4228 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4229 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4230
4231 size = num_wraps ? capacity : next_entry;
4232
4233 /* bail out if nothing in log */
4234 if (size == 0) {
4235 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4236 iwl3945_release_nic_access(priv);
4237 return;
4238 }
4239
4240 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4241 size, num_wraps);
4242
4243 /* if uCode has wrapped back to top of log, start at the oldest entry,
4244 * i.e the next one that uCode would fill. */
4245 if (num_wraps)
4246 iwl3945_print_event_log(priv, next_entry,
4247 capacity - next_entry, mode);
4248
4249 /* (then/else) start at top of log */
4250 iwl3945_print_event_log(priv, 0, next_entry, mode);
4251
4252 iwl3945_release_nic_access(priv);
4253 }
4254
4255 /**
4256 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4257 */
4258 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4259 {
4260 /* Set the FW error flag -- cleared on iwl3945_down */
4261 set_bit(STATUS_FW_ERROR, &priv->status);
4262
4263 /* Cancel currently queued command. */
4264 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4265
4266 #ifdef CONFIG_IWL3945_DEBUG
4267 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4268 iwl3945_dump_nic_error_log(priv);
4269 iwl3945_dump_nic_event_log(priv);
4270 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4271 }
4272 #endif
4273
4274 wake_up_interruptible(&priv->wait_command_queue);
4275
4276 /* Keep the restart process from trying to send host
4277 * commands by clearing the INIT status bit */
4278 clear_bit(STATUS_READY, &priv->status);
4279
4280 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4281 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4282 "Restarting adapter due to uCode error.\n");
4283
4284 if (iwl3945_is_associated(priv)) {
4285 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4286 sizeof(priv->recovery_rxon));
4287 priv->error_recovering = 1;
4288 }
4289 queue_work(priv->workqueue, &priv->restart);
4290 }
4291 }
4292
4293 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4294 {
4295 unsigned long flags;
4296
4297 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4298 sizeof(priv->staging_rxon));
4299 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4300 iwl3945_commit_rxon(priv);
4301
4302 iwl3945_add_station(priv, priv->bssid, 1, 0);
4303
4304 spin_lock_irqsave(&priv->lock, flags);
4305 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4306 priv->error_recovering = 0;
4307 spin_unlock_irqrestore(&priv->lock, flags);
4308 }
4309
4310 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4311 {
4312 u32 inta, handled = 0;
4313 u32 inta_fh;
4314 unsigned long flags;
4315 #ifdef CONFIG_IWL3945_DEBUG
4316 u32 inta_mask;
4317 #endif
4318
4319 spin_lock_irqsave(&priv->lock, flags);
4320
4321 /* Ack/clear/reset pending uCode interrupts.
4322 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4323 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4324 inta = iwl3945_read32(priv, CSR_INT);
4325 iwl3945_write32(priv, CSR_INT, inta);
4326
4327 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4328 * Any new interrupts that happen after this, either while we're
4329 * in this tasklet, or later, will show up in next ISR/tasklet. */
4330 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4331 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4332
4333 #ifdef CONFIG_IWL3945_DEBUG
4334 if (iwl3945_debug_level & IWL_DL_ISR) {
4335 /* just for debug */
4336 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4337 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4338 inta, inta_mask, inta_fh);
4339 }
4340 #endif
4341
4342 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4343 * atomic, make sure that inta covers all the interrupts that
4344 * we've discovered, even if FH interrupt came in just after
4345 * reading CSR_INT. */
4346 if (inta_fh & CSR39_FH_INT_RX_MASK)
4347 inta |= CSR_INT_BIT_FH_RX;
4348 if (inta_fh & CSR39_FH_INT_TX_MASK)
4349 inta |= CSR_INT_BIT_FH_TX;
4350
4351 /* Now service all interrupt bits discovered above. */
4352 if (inta & CSR_INT_BIT_HW_ERR) {
4353 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4354
4355 /* Tell the device to stop sending interrupts */
4356 iwl3945_disable_interrupts(priv);
4357
4358 iwl3945_irq_handle_error(priv);
4359
4360 handled |= CSR_INT_BIT_HW_ERR;
4361
4362 spin_unlock_irqrestore(&priv->lock, flags);
4363
4364 return;
4365 }
4366
4367 #ifdef CONFIG_IWL3945_DEBUG
4368 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4369 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4370 if (inta & CSR_INT_BIT_SCD)
4371 IWL_DEBUG_ISR("Scheduler finished to transmit "
4372 "the frame/frames.\n");
4373
4374 /* Alive notification via Rx interrupt will do the real work */
4375 if (inta & CSR_INT_BIT_ALIVE)
4376 IWL_DEBUG_ISR("Alive interrupt\n");
4377 }
4378 #endif
4379 /* Safely ignore these bits for debug checks below */
4380 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4381
4382 /* HW RF KILL switch toggled (4965 only) */
4383 if (inta & CSR_INT_BIT_RF_KILL) {
4384 int hw_rf_kill = 0;
4385 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4386 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4387 hw_rf_kill = 1;
4388
4389 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4390 "RF_KILL bit toggled to %s.\n",
4391 hw_rf_kill ? "disable radio":"enable radio");
4392
4393 /* Queue restart only if RF_KILL switch was set to "kill"
4394 * when we loaded driver, and is now set to "enable".
4395 * After we're Alive, RF_KILL gets handled by
4396 * iwl3945_rx_card_state_notif() */
4397 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4398 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4399 queue_work(priv->workqueue, &priv->restart);
4400 }
4401
4402 handled |= CSR_INT_BIT_RF_KILL;
4403 }
4404
4405 /* Chip got too hot and stopped itself (4965 only) */
4406 if (inta & CSR_INT_BIT_CT_KILL) {
4407 IWL_ERROR("Microcode CT kill error detected.\n");
4408 handled |= CSR_INT_BIT_CT_KILL;
4409 }
4410
4411 /* Error detected by uCode */
4412 if (inta & CSR_INT_BIT_SW_ERR) {
4413 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4414 inta);
4415 iwl3945_irq_handle_error(priv);
4416 handled |= CSR_INT_BIT_SW_ERR;
4417 }
4418
4419 /* uCode wakes up after power-down sleep */
4420 if (inta & CSR_INT_BIT_WAKEUP) {
4421 IWL_DEBUG_ISR("Wakeup interrupt\n");
4422 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4423 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4424 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4425 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4426 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4427 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4428 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4429
4430 handled |= CSR_INT_BIT_WAKEUP;
4431 }
4432
4433 /* All uCode command responses, including Tx command responses,
4434 * Rx "responses" (frame-received notification), and other
4435 * notifications from uCode come through here*/
4436 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4437 iwl3945_rx_handle(priv);
4438 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4439 }
4440
4441 if (inta & CSR_INT_BIT_FH_TX) {
4442 IWL_DEBUG_ISR("Tx interrupt\n");
4443
4444 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4445 if (!iwl3945_grab_nic_access(priv)) {
4446 iwl3945_write_direct32(priv,
4447 FH_TCSR_CREDIT
4448 (ALM_FH_SRVC_CHNL), 0x0);
4449 iwl3945_release_nic_access(priv);
4450 }
4451 handled |= CSR_INT_BIT_FH_TX;
4452 }
4453
4454 if (inta & ~handled)
4455 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4456
4457 if (inta & ~CSR_INI_SET_MASK) {
4458 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4459 inta & ~CSR_INI_SET_MASK);
4460 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4461 }
4462
4463 /* Re-enable all interrupts */
4464 /* only Re-enable if disabled by irq */
4465 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4466 iwl3945_enable_interrupts(priv);
4467
4468 #ifdef CONFIG_IWL3945_DEBUG
4469 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4470 inta = iwl3945_read32(priv, CSR_INT);
4471 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4472 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4473 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4474 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4475 }
4476 #endif
4477 spin_unlock_irqrestore(&priv->lock, flags);
4478 }
4479
4480 static irqreturn_t iwl3945_isr(int irq, void *data)
4481 {
4482 struct iwl3945_priv *priv = data;
4483 u32 inta, inta_mask;
4484 u32 inta_fh;
4485 if (!priv)
4486 return IRQ_NONE;
4487
4488 spin_lock(&priv->lock);
4489
4490 /* Disable (but don't clear!) interrupts here to avoid
4491 * back-to-back ISRs and sporadic interrupts from our NIC.
4492 * If we have something to service, the tasklet will re-enable ints.
4493 * If we *don't* have something, we'll re-enable before leaving here. */
4494 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4495 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4496
4497 /* Discover which interrupts are active/pending */
4498 inta = iwl3945_read32(priv, CSR_INT);
4499 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4500
4501 /* Ignore interrupt if there's nothing in NIC to service.
4502 * This may be due to IRQ shared with another device,
4503 * or due to sporadic interrupts thrown from our NIC. */
4504 if (!inta && !inta_fh) {
4505 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4506 goto none;
4507 }
4508
4509 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4510 /* Hardware disappeared */
4511 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4512 goto unplugged;
4513 }
4514
4515 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4516 inta, inta_mask, inta_fh);
4517
4518 inta &= ~CSR_INT_BIT_SCD;
4519
4520 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4521 if (likely(inta || inta_fh))
4522 tasklet_schedule(&priv->irq_tasklet);
4523 unplugged:
4524 spin_unlock(&priv->lock);
4525
4526 return IRQ_HANDLED;
4527
4528 none:
4529 /* re-enable interrupts here since we don't have anything to service. */
4530 /* only Re-enable if disabled by irq */
4531 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4532 iwl3945_enable_interrupts(priv);
4533 spin_unlock(&priv->lock);
4534 return IRQ_NONE;
4535 }
4536
4537 /************************** EEPROM BANDS ****************************
4538 *
4539 * The iwl3945_eeprom_band definitions below provide the mapping from the
4540 * EEPROM contents to the specific channel number supported for each
4541 * band.
4542 *
4543 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4544 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4545 * The specific geography and calibration information for that channel
4546 * is contained in the eeprom map itself.
4547 *
4548 * During init, we copy the eeprom information and channel map
4549 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4550 *
4551 * channel_map_24/52 provides the index in the channel_info array for a
4552 * given channel. We have to have two separate maps as there is channel
4553 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4554 * band_2
4555 *
4556 * A value of 0xff stored in the channel_map indicates that the channel
4557 * is not supported by the hardware at all.
4558 *
4559 * A value of 0xfe in the channel_map indicates that the channel is not
4560 * valid for Tx with the current hardware. This means that
4561 * while the system can tune and receive on a given channel, it may not
4562 * be able to associate or transmit any frames on that
4563 * channel. There is no corresponding channel information for that
4564 * entry.
4565 *
4566 *********************************************************************/
4567
4568 /* 2.4 GHz */
4569 static const u8 iwl3945_eeprom_band_1[14] = {
4570 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4571 };
4572
4573 /* 5.2 GHz bands */
4574 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4575 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4576 };
4577
4578 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4579 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4580 };
4581
4582 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4583 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4584 };
4585
4586 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4587 145, 149, 153, 157, 161, 165
4588 };
4589
4590 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4591 int *eeprom_ch_count,
4592 const struct iwl3945_eeprom_channel
4593 **eeprom_ch_info,
4594 const u8 **eeprom_ch_index)
4595 {
4596 switch (band) {
4597 case 1: /* 2.4GHz band */
4598 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4599 *eeprom_ch_info = priv->eeprom.band_1_channels;
4600 *eeprom_ch_index = iwl3945_eeprom_band_1;
4601 break;
4602 case 2: /* 4.9GHz band */
4603 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4604 *eeprom_ch_info = priv->eeprom.band_2_channels;
4605 *eeprom_ch_index = iwl3945_eeprom_band_2;
4606 break;
4607 case 3: /* 5.2GHz band */
4608 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4609 *eeprom_ch_info = priv->eeprom.band_3_channels;
4610 *eeprom_ch_index = iwl3945_eeprom_band_3;
4611 break;
4612 case 4: /* 5.5GHz band */
4613 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4614 *eeprom_ch_info = priv->eeprom.band_4_channels;
4615 *eeprom_ch_index = iwl3945_eeprom_band_4;
4616 break;
4617 case 5: /* 5.7GHz band */
4618 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4619 *eeprom_ch_info = priv->eeprom.band_5_channels;
4620 *eeprom_ch_index = iwl3945_eeprom_band_5;
4621 break;
4622 default:
4623 BUG();
4624 return;
4625 }
4626 }
4627
4628 /**
4629 * iwl3945_get_channel_info - Find driver's private channel info
4630 *
4631 * Based on band and channel number.
4632 */
4633 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
4634 enum ieee80211_band band, u16 channel)
4635 {
4636 int i;
4637
4638 switch (band) {
4639 case IEEE80211_BAND_5GHZ:
4640 for (i = 14; i < priv->channel_count; i++) {
4641 if (priv->channel_info[i].channel == channel)
4642 return &priv->channel_info[i];
4643 }
4644 break;
4645
4646 case IEEE80211_BAND_2GHZ:
4647 if (channel >= 1 && channel <= 14)
4648 return &priv->channel_info[channel - 1];
4649 break;
4650 case IEEE80211_NUM_BANDS:
4651 WARN_ON(1);
4652 }
4653
4654 return NULL;
4655 }
4656
4657 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4658 ? # x " " : "")
4659
4660 /**
4661 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4662 */
4663 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
4664 {
4665 int eeprom_ch_count = 0;
4666 const u8 *eeprom_ch_index = NULL;
4667 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
4668 int band, ch;
4669 struct iwl3945_channel_info *ch_info;
4670
4671 if (priv->channel_count) {
4672 IWL_DEBUG_INFO("Channel map already initialized.\n");
4673 return 0;
4674 }
4675
4676 if (priv->eeprom.version < 0x2f) {
4677 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4678 priv->eeprom.version);
4679 return -EINVAL;
4680 }
4681
4682 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4683
4684 priv->channel_count =
4685 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4686 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4687 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4688 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4689 ARRAY_SIZE(iwl3945_eeprom_band_5);
4690
4691 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4692
4693 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
4694 priv->channel_count, GFP_KERNEL);
4695 if (!priv->channel_info) {
4696 IWL_ERROR("Could not allocate channel_info\n");
4697 priv->channel_count = 0;
4698 return -ENOMEM;
4699 }
4700
4701 ch_info = priv->channel_info;
4702
4703 /* Loop through the 5 EEPROM bands adding them in order to the
4704 * channel map we maintain (that contains additional information than
4705 * what just in the EEPROM) */
4706 for (band = 1; band <= 5; band++) {
4707
4708 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4709 &eeprom_ch_info, &eeprom_ch_index);
4710
4711 /* Loop through each band adding each of the channels */
4712 for (ch = 0; ch < eeprom_ch_count; ch++) {
4713 ch_info->channel = eeprom_ch_index[ch];
4714 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4715 IEEE80211_BAND_5GHZ;
4716
4717 /* permanently store EEPROM's channel regulatory flags
4718 * and max power in channel info database. */
4719 ch_info->eeprom = eeprom_ch_info[ch];
4720
4721 /* Copy the run-time flags so they are there even on
4722 * invalid channels */
4723 ch_info->flags = eeprom_ch_info[ch].flags;
4724
4725 if (!(is_channel_valid(ch_info))) {
4726 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4727 "No traffic\n",
4728 ch_info->channel,
4729 ch_info->flags,
4730 is_channel_a_band(ch_info) ?
4731 "5.2" : "2.4");
4732 ch_info++;
4733 continue;
4734 }
4735
4736 /* Initialize regulatory-based run-time data */
4737 ch_info->max_power_avg = ch_info->curr_txpow =
4738 eeprom_ch_info[ch].max_power_avg;
4739 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4740 ch_info->min_power = 0;
4741
4742 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4743 " %ddBm): Ad-Hoc %ssupported\n",
4744 ch_info->channel,
4745 is_channel_a_band(ch_info) ?
4746 "5.2" : "2.4",
4747 CHECK_AND_PRINT(VALID),
4748 CHECK_AND_PRINT(IBSS),
4749 CHECK_AND_PRINT(ACTIVE),
4750 CHECK_AND_PRINT(RADAR),
4751 CHECK_AND_PRINT(WIDE),
4752 CHECK_AND_PRINT(DFS),
4753 eeprom_ch_info[ch].flags,
4754 eeprom_ch_info[ch].max_power_avg,
4755 ((eeprom_ch_info[ch].
4756 flags & EEPROM_CHANNEL_IBSS)
4757 && !(eeprom_ch_info[ch].
4758 flags & EEPROM_CHANNEL_RADAR))
4759 ? "" : "not ");
4760
4761 /* Set the user_txpower_limit to the highest power
4762 * supported by any channel */
4763 if (eeprom_ch_info[ch].max_power_avg >
4764 priv->user_txpower_limit)
4765 priv->user_txpower_limit =
4766 eeprom_ch_info[ch].max_power_avg;
4767
4768 ch_info++;
4769 }
4770 }
4771
4772 /* Set up txpower settings in driver for all channels */
4773 if (iwl3945_txpower_set_from_eeprom(priv))
4774 return -EIO;
4775
4776 return 0;
4777 }
4778
4779 /*
4780 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4781 */
4782 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4783 {
4784 kfree(priv->channel_info);
4785 priv->channel_count = 0;
4786 }
4787
4788 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4789 * sending probe req. This should be set long enough to hear probe responses
4790 * from more than one AP. */
4791 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4792 #define IWL_ACTIVE_DWELL_TIME_52 (10)
4793
4794 /* For faster active scanning, scan will move to the next channel if fewer than
4795 * PLCP_QUIET_THRESH packets are heard on this channel within
4796 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4797 * time if it's a quiet channel (nothing responded to our probe, and there's
4798 * no other traffic).
4799 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4800 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4801 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4802
4803 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4804 * Must be set longer than active dwell time.
4805 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4806 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4807 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4808 #define IWL_PASSIVE_DWELL_BASE (100)
4809 #define IWL_CHANNEL_TUNE_TIME 5
4810
4811 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4812 enum ieee80211_band band)
4813 {
4814 if (band == IEEE80211_BAND_5GHZ)
4815 return IWL_ACTIVE_DWELL_TIME_52;
4816 else
4817 return IWL_ACTIVE_DWELL_TIME_24;
4818 }
4819
4820 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4821 enum ieee80211_band band)
4822 {
4823 u16 active = iwl3945_get_active_dwell_time(priv, band);
4824 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4825 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4826 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4827
4828 if (iwl3945_is_associated(priv)) {
4829 /* If we're associated, we clamp the maximum passive
4830 * dwell time to be 98% of the beacon interval (minus
4831 * 2 * channel tune time) */
4832 passive = priv->beacon_int;
4833 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4834 passive = IWL_PASSIVE_DWELL_BASE;
4835 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4836 }
4837
4838 if (passive <= active)
4839 passive = active + 1;
4840
4841 return passive;
4842 }
4843
4844 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4845 enum ieee80211_band band,
4846 u8 is_active, u8 direct_mask,
4847 struct iwl3945_scan_channel *scan_ch)
4848 {
4849 const struct ieee80211_channel *channels = NULL;
4850 const struct ieee80211_supported_band *sband;
4851 const struct iwl3945_channel_info *ch_info;
4852 u16 passive_dwell = 0;
4853 u16 active_dwell = 0;
4854 int added, i;
4855
4856 sband = iwl3945_get_band(priv, band);
4857 if (!sband)
4858 return 0;
4859
4860 channels = sband->channels;
4861
4862 active_dwell = iwl3945_get_active_dwell_time(priv, band);
4863 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4864
4865 for (i = 0, added = 0; i < sband->n_channels; i++) {
4866 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4867 continue;
4868
4869 scan_ch->channel = channels[i].hw_value;
4870
4871 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4872 if (!is_channel_valid(ch_info)) {
4873 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4874 scan_ch->channel);
4875 continue;
4876 }
4877
4878 if (!is_active || is_channel_passive(ch_info) ||
4879 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
4880 scan_ch->type = 0; /* passive */
4881 else
4882 scan_ch->type = 1; /* active */
4883
4884 if (scan_ch->type & 1)
4885 scan_ch->type |= (direct_mask << 1);
4886
4887 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4888 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4889
4890 /* Set txpower levels to defaults */
4891 scan_ch->tpc.dsp_atten = 110;
4892 /* scan_pwr_info->tpc.dsp_atten; */
4893
4894 /*scan_pwr_info->tpc.tx_gain; */
4895 if (band == IEEE80211_BAND_5GHZ)
4896 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4897 else {
4898 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4899 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4900 * power level:
4901 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4902 */
4903 }
4904
4905 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4906 scan_ch->channel,
4907 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4908 (scan_ch->type & 1) ?
4909 active_dwell : passive_dwell);
4910
4911 scan_ch++;
4912 added++;
4913 }
4914
4915 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4916 return added;
4917 }
4918
4919 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
4920 struct ieee80211_rate *rates)
4921 {
4922 int i;
4923
4924 for (i = 0; i < IWL_RATE_COUNT; i++) {
4925 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4926 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4927 rates[i].hw_value_short = i;
4928 rates[i].flags = 0;
4929 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4930 /*
4931 * If CCK != 1M then set short preamble rate flag.
4932 */
4933 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4934 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4935 }
4936 }
4937 }
4938
4939 /**
4940 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4941 */
4942 static int iwl3945_init_geos(struct iwl3945_priv *priv)
4943 {
4944 struct iwl3945_channel_info *ch;
4945 struct ieee80211_supported_band *sband;
4946 struct ieee80211_channel *channels;
4947 struct ieee80211_channel *geo_ch;
4948 struct ieee80211_rate *rates;
4949 int i = 0;
4950
4951 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4952 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4953 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4954 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4955 return 0;
4956 }
4957
4958 channels = kzalloc(sizeof(struct ieee80211_channel) *
4959 priv->channel_count, GFP_KERNEL);
4960 if (!channels)
4961 return -ENOMEM;
4962
4963 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4964 GFP_KERNEL);
4965 if (!rates) {
4966 kfree(channels);
4967 return -ENOMEM;
4968 }
4969
4970 /* 5.2GHz channels start after the 2.4GHz channels */
4971 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4972 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4973 /* just OFDM */
4974 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4975 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4976
4977 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4978 sband->channels = channels;
4979 /* OFDM & CCK */
4980 sband->bitrates = rates;
4981 sband->n_bitrates = IWL_RATE_COUNT;
4982
4983 priv->ieee_channels = channels;
4984 priv->ieee_rates = rates;
4985
4986 iwl3945_init_hw_rates(priv, rates);
4987
4988 for (i = 0; i < priv->channel_count; i++) {
4989 ch = &priv->channel_info[i];
4990
4991 /* FIXME: might be removed if scan is OK*/
4992 if (!is_channel_valid(ch))
4993 continue;
4994
4995 if (is_channel_a_band(ch))
4996 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4997 else
4998 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4999
5000 geo_ch = &sband->channels[sband->n_channels++];
5001
5002 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
5003 geo_ch->max_power = ch->max_power_avg;
5004 geo_ch->max_antenna_gain = 0xff;
5005 geo_ch->hw_value = ch->channel;
5006
5007 if (is_channel_valid(ch)) {
5008 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5009 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
5010
5011 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5012 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
5013
5014 if (ch->flags & EEPROM_CHANNEL_RADAR)
5015 geo_ch->flags |= IEEE80211_CHAN_RADAR;
5016
5017 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5018 priv->max_channel_txpower_limit =
5019 ch->max_power_avg;
5020 } else {
5021 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
5022 }
5023
5024 /* Save flags for reg domain usage */
5025 geo_ch->orig_flags = geo_ch->flags;
5026
5027 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5028 ch->channel, geo_ch->center_freq,
5029 is_channel_a_band(ch) ? "5.2" : "2.4",
5030 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5031 "restricted" : "valid",
5032 geo_ch->flags);
5033 }
5034
5035 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5036 priv->cfg->sku & IWL_SKU_A) {
5037 printk(KERN_INFO DRV_NAME
5038 ": Incorrectly detected BG card as ABG. Please send "
5039 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5040 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5041 priv->cfg->sku &= ~IWL_SKU_A;
5042 }
5043
5044 printk(KERN_INFO DRV_NAME
5045 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5046 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5047 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
5048
5049 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5050 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5051 &priv->bands[IEEE80211_BAND_2GHZ];
5052 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5053 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5054 &priv->bands[IEEE80211_BAND_5GHZ];
5055
5056 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5057
5058 return 0;
5059 }
5060
5061 /*
5062 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5063 */
5064 static void iwl3945_free_geos(struct iwl3945_priv *priv)
5065 {
5066 kfree(priv->ieee_channels);
5067 kfree(priv->ieee_rates);
5068 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5069 }
5070
5071 /******************************************************************************
5072 *
5073 * uCode download functions
5074 *
5075 ******************************************************************************/
5076
5077 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5078 {
5079 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5080 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5081 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5082 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5083 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5084 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5085 }
5086
5087 /**
5088 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5089 * looking at all data.
5090 */
5091 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
5092 {
5093 u32 val;
5094 u32 save_len = len;
5095 int rc = 0;
5096 u32 errcnt;
5097
5098 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5099
5100 rc = iwl3945_grab_nic_access(priv);
5101 if (rc)
5102 return rc;
5103
5104 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5105
5106 errcnt = 0;
5107 for (; len > 0; len -= sizeof(u32), image++) {
5108 /* read data comes through single port, auto-incr addr */
5109 /* NOTE: Use the debugless read so we don't flood kernel log
5110 * if IWL_DL_IO is set */
5111 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5112 if (val != le32_to_cpu(*image)) {
5113 IWL_ERROR("uCode INST section is invalid at "
5114 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5115 save_len - len, val, le32_to_cpu(*image));
5116 rc = -EIO;
5117 errcnt++;
5118 if (errcnt >= 20)
5119 break;
5120 }
5121 }
5122
5123 iwl3945_release_nic_access(priv);
5124
5125 if (!errcnt)
5126 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5127
5128 return rc;
5129 }
5130
5131
5132 /**
5133 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5134 * using sample data 100 bytes apart. If these sample points are good,
5135 * it's a pretty good bet that everything between them is good, too.
5136 */
5137 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5138 {
5139 u32 val;
5140 int rc = 0;
5141 u32 errcnt = 0;
5142 u32 i;
5143
5144 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5145
5146 rc = iwl3945_grab_nic_access(priv);
5147 if (rc)
5148 return rc;
5149
5150 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5151 /* read data comes through single port, auto-incr addr */
5152 /* NOTE: Use the debugless read so we don't flood kernel log
5153 * if IWL_DL_IO is set */
5154 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5155 i + RTC_INST_LOWER_BOUND);
5156 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5157 if (val != le32_to_cpu(*image)) {
5158 #if 0 /* Enable this if you want to see details */
5159 IWL_ERROR("uCode INST section is invalid at "
5160 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5161 i, val, *image);
5162 #endif
5163 rc = -EIO;
5164 errcnt++;
5165 if (errcnt >= 3)
5166 break;
5167 }
5168 }
5169
5170 iwl3945_release_nic_access(priv);
5171
5172 return rc;
5173 }
5174
5175
5176 /**
5177 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5178 * and verify its contents
5179 */
5180 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5181 {
5182 __le32 *image;
5183 u32 len;
5184 int rc = 0;
5185
5186 /* Try bootstrap */
5187 image = (__le32 *)priv->ucode_boot.v_addr;
5188 len = priv->ucode_boot.len;
5189 rc = iwl3945_verify_inst_sparse(priv, image, len);
5190 if (rc == 0) {
5191 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5192 return 0;
5193 }
5194
5195 /* Try initialize */
5196 image = (__le32 *)priv->ucode_init.v_addr;
5197 len = priv->ucode_init.len;
5198 rc = iwl3945_verify_inst_sparse(priv, image, len);
5199 if (rc == 0) {
5200 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5201 return 0;
5202 }
5203
5204 /* Try runtime/protocol */
5205 image = (__le32 *)priv->ucode_code.v_addr;
5206 len = priv->ucode_code.len;
5207 rc = iwl3945_verify_inst_sparse(priv, image, len);
5208 if (rc == 0) {
5209 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5210 return 0;
5211 }
5212
5213 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5214
5215 /* Since nothing seems to match, show first several data entries in
5216 * instruction SRAM, so maybe visual inspection will give a clue.
5217 * Selection of bootstrap image (vs. other images) is arbitrary. */
5218 image = (__le32 *)priv->ucode_boot.v_addr;
5219 len = priv->ucode_boot.len;
5220 rc = iwl3945_verify_inst_full(priv, image, len);
5221
5222 return rc;
5223 }
5224
5225
5226 /* check contents of special bootstrap uCode SRAM */
5227 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5228 {
5229 __le32 *image = priv->ucode_boot.v_addr;
5230 u32 len = priv->ucode_boot.len;
5231 u32 reg;
5232 u32 val;
5233
5234 IWL_DEBUG_INFO("Begin verify bsm\n");
5235
5236 /* verify BSM SRAM contents */
5237 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5238 for (reg = BSM_SRAM_LOWER_BOUND;
5239 reg < BSM_SRAM_LOWER_BOUND + len;
5240 reg += sizeof(u32), image ++) {
5241 val = iwl3945_read_prph(priv, reg);
5242 if (val != le32_to_cpu(*image)) {
5243 IWL_ERROR("BSM uCode verification failed at "
5244 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5245 BSM_SRAM_LOWER_BOUND,
5246 reg - BSM_SRAM_LOWER_BOUND, len,
5247 val, le32_to_cpu(*image));
5248 return -EIO;
5249 }
5250 }
5251
5252 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5253
5254 return 0;
5255 }
5256
5257 /**
5258 * iwl3945_load_bsm - Load bootstrap instructions
5259 *
5260 * BSM operation:
5261 *
5262 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5263 * in special SRAM that does not power down during RFKILL. When powering back
5264 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5265 * the bootstrap program into the on-board processor, and starts it.
5266 *
5267 * The bootstrap program loads (via DMA) instructions and data for a new
5268 * program from host DRAM locations indicated by the host driver in the
5269 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5270 * automatically.
5271 *
5272 * When initializing the NIC, the host driver points the BSM to the
5273 * "initialize" uCode image. This uCode sets up some internal data, then
5274 * notifies host via "initialize alive" that it is complete.
5275 *
5276 * The host then replaces the BSM_DRAM_* pointer values to point to the
5277 * normal runtime uCode instructions and a backup uCode data cache buffer
5278 * (filled initially with starting data values for the on-board processor),
5279 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5280 * which begins normal operation.
5281 *
5282 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5283 * the backup data cache in DRAM before SRAM is powered down.
5284 *
5285 * When powering back up, the BSM loads the bootstrap program. This reloads
5286 * the runtime uCode instructions and the backup data cache into SRAM,
5287 * and re-launches the runtime uCode from where it left off.
5288 */
5289 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5290 {
5291 __le32 *image = priv->ucode_boot.v_addr;
5292 u32 len = priv->ucode_boot.len;
5293 dma_addr_t pinst;
5294 dma_addr_t pdata;
5295 u32 inst_len;
5296 u32 data_len;
5297 int rc;
5298 int i;
5299 u32 done;
5300 u32 reg_offset;
5301
5302 IWL_DEBUG_INFO("Begin load bsm\n");
5303
5304 /* make sure bootstrap program is no larger than BSM's SRAM size */
5305 if (len > IWL_MAX_BSM_SIZE)
5306 return -EINVAL;
5307
5308 /* Tell bootstrap uCode where to find the "Initialize" uCode
5309 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5310 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5311 * after the "initialize" uCode has run, to point to
5312 * runtime/protocol instructions and backup data cache. */
5313 pinst = priv->ucode_init.p_addr;
5314 pdata = priv->ucode_init_data.p_addr;
5315 inst_len = priv->ucode_init.len;
5316 data_len = priv->ucode_init_data.len;
5317
5318 rc = iwl3945_grab_nic_access(priv);
5319 if (rc)
5320 return rc;
5321
5322 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5323 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5324 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5325 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5326
5327 /* Fill BSM memory with bootstrap instructions */
5328 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5329 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5330 reg_offset += sizeof(u32), image++)
5331 _iwl3945_write_prph(priv, reg_offset,
5332 le32_to_cpu(*image));
5333
5334 rc = iwl3945_verify_bsm(priv);
5335 if (rc) {
5336 iwl3945_release_nic_access(priv);
5337 return rc;
5338 }
5339
5340 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5341 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5342 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5343 RTC_INST_LOWER_BOUND);
5344 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5345
5346 /* Load bootstrap code into instruction SRAM now,
5347 * to prepare to load "initialize" uCode */
5348 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5349 BSM_WR_CTRL_REG_BIT_START);
5350
5351 /* Wait for load of bootstrap uCode to finish */
5352 for (i = 0; i < 100; i++) {
5353 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5354 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5355 break;
5356 udelay(10);
5357 }
5358 if (i < 100)
5359 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5360 else {
5361 IWL_ERROR("BSM write did not complete!\n");
5362 return -EIO;
5363 }
5364
5365 /* Enable future boot loads whenever power management unit triggers it
5366 * (e.g. when powering back up after power-save shutdown) */
5367 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5368 BSM_WR_CTRL_REG_BIT_START_EN);
5369
5370 iwl3945_release_nic_access(priv);
5371
5372 return 0;
5373 }
5374
5375 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5376 {
5377 /* Remove all resets to allow NIC to operate */
5378 iwl3945_write32(priv, CSR_RESET, 0);
5379 }
5380
5381 /**
5382 * iwl3945_read_ucode - Read uCode images from disk file.
5383 *
5384 * Copy into buffers for card to fetch via bus-mastering
5385 */
5386 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5387 {
5388 struct iwl3945_ucode *ucode;
5389 int ret = 0;
5390 const struct firmware *ucode_raw;
5391 /* firmware file name contains uCode/driver compatibility version */
5392 const char *name = priv->cfg->fw_name;
5393 u8 *src;
5394 size_t len;
5395 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5396
5397 /* Ask kernel firmware_class module to get the boot firmware off disk.
5398 * request_firmware() is synchronous, file is in memory on return. */
5399 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5400 if (ret < 0) {
5401 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5402 name, ret);
5403 goto error;
5404 }
5405
5406 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5407 name, ucode_raw->size);
5408
5409 /* Make sure that we got at least our header! */
5410 if (ucode_raw->size < sizeof(*ucode)) {
5411 IWL_ERROR("File size way too small!\n");
5412 ret = -EINVAL;
5413 goto err_release;
5414 }
5415
5416 /* Data from ucode file: header followed by uCode images */
5417 ucode = (void *)ucode_raw->data;
5418
5419 ver = le32_to_cpu(ucode->ver);
5420 inst_size = le32_to_cpu(ucode->inst_size);
5421 data_size = le32_to_cpu(ucode->data_size);
5422 init_size = le32_to_cpu(ucode->init_size);
5423 init_data_size = le32_to_cpu(ucode->init_data_size);
5424 boot_size = le32_to_cpu(ucode->boot_size);
5425
5426 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5427 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5428 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5429 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5430 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5431 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5432
5433 /* Verify size of file vs. image size info in file's header */
5434 if (ucode_raw->size < sizeof(*ucode) +
5435 inst_size + data_size + init_size +
5436 init_data_size + boot_size) {
5437
5438 IWL_DEBUG_INFO("uCode file size %d too small\n",
5439 (int)ucode_raw->size);
5440 ret = -EINVAL;
5441 goto err_release;
5442 }
5443
5444 /* Verify that uCode images will fit in card's SRAM */
5445 if (inst_size > IWL_MAX_INST_SIZE) {
5446 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5447 inst_size);
5448 ret = -EINVAL;
5449 goto err_release;
5450 }
5451
5452 if (data_size > IWL_MAX_DATA_SIZE) {
5453 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5454 data_size);
5455 ret = -EINVAL;
5456 goto err_release;
5457 }
5458 if (init_size > IWL_MAX_INST_SIZE) {
5459 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5460 init_size);
5461 ret = -EINVAL;
5462 goto err_release;
5463 }
5464 if (init_data_size > IWL_MAX_DATA_SIZE) {
5465 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5466 init_data_size);
5467 ret = -EINVAL;
5468 goto err_release;
5469 }
5470 if (boot_size > IWL_MAX_BSM_SIZE) {
5471 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5472 boot_size);
5473 ret = -EINVAL;
5474 goto err_release;
5475 }
5476
5477 /* Allocate ucode buffers for card's bus-master loading ... */
5478
5479 /* Runtime instructions and 2 copies of data:
5480 * 1) unmodified from disk
5481 * 2) backup cache for save/restore during power-downs */
5482 priv->ucode_code.len = inst_size;
5483 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5484
5485 priv->ucode_data.len = data_size;
5486 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5487
5488 priv->ucode_data_backup.len = data_size;
5489 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5490
5491 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5492 !priv->ucode_data_backup.v_addr)
5493 goto err_pci_alloc;
5494
5495 /* Initialization instructions and data */
5496 if (init_size && init_data_size) {
5497 priv->ucode_init.len = init_size;
5498 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5499
5500 priv->ucode_init_data.len = init_data_size;
5501 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5502
5503 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5504 goto err_pci_alloc;
5505 }
5506
5507 /* Bootstrap (instructions only, no data) */
5508 if (boot_size) {
5509 priv->ucode_boot.len = boot_size;
5510 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5511
5512 if (!priv->ucode_boot.v_addr)
5513 goto err_pci_alloc;
5514 }
5515
5516 /* Copy images into buffers for card's bus-master reads ... */
5517
5518 /* Runtime instructions (first block of data in file) */
5519 src = &ucode->data[0];
5520 len = priv->ucode_code.len;
5521 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5522 memcpy(priv->ucode_code.v_addr, src, len);
5523 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5524 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5525
5526 /* Runtime data (2nd block)
5527 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5528 src = &ucode->data[inst_size];
5529 len = priv->ucode_data.len;
5530 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5531 memcpy(priv->ucode_data.v_addr, src, len);
5532 memcpy(priv->ucode_data_backup.v_addr, src, len);
5533
5534 /* Initialization instructions (3rd block) */
5535 if (init_size) {
5536 src = &ucode->data[inst_size + data_size];
5537 len = priv->ucode_init.len;
5538 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5539 len);
5540 memcpy(priv->ucode_init.v_addr, src, len);
5541 }
5542
5543 /* Initialization data (4th block) */
5544 if (init_data_size) {
5545 src = &ucode->data[inst_size + data_size + init_size];
5546 len = priv->ucode_init_data.len;
5547 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5548 (int)len);
5549 memcpy(priv->ucode_init_data.v_addr, src, len);
5550 }
5551
5552 /* Bootstrap instructions (5th block) */
5553 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5554 len = priv->ucode_boot.len;
5555 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5556 (int)len);
5557 memcpy(priv->ucode_boot.v_addr, src, len);
5558
5559 /* We have our copies now, allow OS release its copies */
5560 release_firmware(ucode_raw);
5561 return 0;
5562
5563 err_pci_alloc:
5564 IWL_ERROR("failed to allocate pci memory\n");
5565 ret = -ENOMEM;
5566 iwl3945_dealloc_ucode_pci(priv);
5567
5568 err_release:
5569 release_firmware(ucode_raw);
5570
5571 error:
5572 return ret;
5573 }
5574
5575
5576 /**
5577 * iwl3945_set_ucode_ptrs - Set uCode address location
5578 *
5579 * Tell initialization uCode where to find runtime uCode.
5580 *
5581 * BSM registers initially contain pointers to initialization uCode.
5582 * We need to replace them to load runtime uCode inst and data,
5583 * and to save runtime data when powering down.
5584 */
5585 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
5586 {
5587 dma_addr_t pinst;
5588 dma_addr_t pdata;
5589 int rc = 0;
5590 unsigned long flags;
5591
5592 /* bits 31:0 for 3945 */
5593 pinst = priv->ucode_code.p_addr;
5594 pdata = priv->ucode_data_backup.p_addr;
5595
5596 spin_lock_irqsave(&priv->lock, flags);
5597 rc = iwl3945_grab_nic_access(priv);
5598 if (rc) {
5599 spin_unlock_irqrestore(&priv->lock, flags);
5600 return rc;
5601 }
5602
5603 /* Tell bootstrap uCode where to find image to load */
5604 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5605 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5606 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5607 priv->ucode_data.len);
5608
5609 /* Inst bytecount must be last to set up, bit 31 signals uCode
5610 * that all new ptr/size info is in place */
5611 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5612 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5613
5614 iwl3945_release_nic_access(priv);
5615
5616 spin_unlock_irqrestore(&priv->lock, flags);
5617
5618 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5619
5620 return rc;
5621 }
5622
5623 /**
5624 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5625 *
5626 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5627 *
5628 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5629 */
5630 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
5631 {
5632 /* Check alive response for "valid" sign from uCode */
5633 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5634 /* We had an error bringing up the hardware, so take it
5635 * all the way back down so we can try again */
5636 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5637 goto restart;
5638 }
5639
5640 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5641 * This is a paranoid check, because we would not have gotten the
5642 * "initialize" alive if code weren't properly loaded. */
5643 if (iwl3945_verify_ucode(priv)) {
5644 /* Runtime instruction load was bad;
5645 * take it all the way back down so we can try again */
5646 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5647 goto restart;
5648 }
5649
5650 /* Send pointers to protocol/runtime uCode image ... init code will
5651 * load and launch runtime uCode, which will send us another "Alive"
5652 * notification. */
5653 IWL_DEBUG_INFO("Initialization Alive received.\n");
5654 if (iwl3945_set_ucode_ptrs(priv)) {
5655 /* Runtime instruction load won't happen;
5656 * take it all the way back down so we can try again */
5657 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5658 goto restart;
5659 }
5660 return;
5661
5662 restart:
5663 queue_work(priv->workqueue, &priv->restart);
5664 }
5665
5666
5667 /**
5668 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5669 * from protocol/runtime uCode (initialization uCode's
5670 * Alive gets handled by iwl3945_init_alive_start()).
5671 */
5672 static void iwl3945_alive_start(struct iwl3945_priv *priv)
5673 {
5674 int rc = 0;
5675 int thermal_spin = 0;
5676 u32 rfkill;
5677
5678 IWL_DEBUG_INFO("Runtime Alive received.\n");
5679
5680 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5681 /* We had an error bringing up the hardware, so take it
5682 * all the way back down so we can try again */
5683 IWL_DEBUG_INFO("Alive failed.\n");
5684 goto restart;
5685 }
5686
5687 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5688 * This is a paranoid check, because we would not have gotten the
5689 * "runtime" alive if code weren't properly loaded. */
5690 if (iwl3945_verify_ucode(priv)) {
5691 /* Runtime instruction load was bad;
5692 * take it all the way back down so we can try again */
5693 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5694 goto restart;
5695 }
5696
5697 iwl3945_clear_stations_table(priv);
5698
5699 rc = iwl3945_grab_nic_access(priv);
5700 if (rc) {
5701 IWL_WARNING("Can not read rfkill status from adapter\n");
5702 return;
5703 }
5704
5705 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
5706 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5707 iwl3945_release_nic_access(priv);
5708
5709 if (rfkill & 0x1) {
5710 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5711 /* if rfkill is not on, then wait for thermal
5712 * sensor in adapter to kick in */
5713 while (iwl3945_hw_get_temperature(priv) == 0) {
5714 thermal_spin++;
5715 udelay(10);
5716 }
5717
5718 if (thermal_spin)
5719 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5720 thermal_spin * 10);
5721 } else
5722 set_bit(STATUS_RF_KILL_HW, &priv->status);
5723
5724 /* After the ALIVE response, we can send commands to 3945 uCode */
5725 set_bit(STATUS_ALIVE, &priv->status);
5726
5727 /* Clear out the uCode error bit if it is set */
5728 clear_bit(STATUS_FW_ERROR, &priv->status);
5729
5730 if (iwl3945_is_rfkill(priv))
5731 return;
5732
5733 ieee80211_wake_queues(priv->hw);
5734
5735 priv->active_rate = priv->rates_mask;
5736 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5737
5738 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5739
5740 if (iwl3945_is_associated(priv)) {
5741 struct iwl3945_rxon_cmd *active_rxon =
5742 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
5743
5744 memcpy(&priv->staging_rxon, &priv->active_rxon,
5745 sizeof(priv->staging_rxon));
5746 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5747 } else {
5748 /* Initialize our rx_config data */
5749 iwl3945_connection_init_rx_config(priv);
5750 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5751 }
5752
5753 /* Configure Bluetooth device coexistence support */
5754 iwl3945_send_bt_config(priv);
5755
5756 /* Configure the adapter for unassociated operation */
5757 iwl3945_commit_rxon(priv);
5758
5759 iwl3945_reg_txpower_periodic(priv);
5760
5761 iwl3945_led_register(priv);
5762
5763 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5764 set_bit(STATUS_READY, &priv->status);
5765 wake_up_interruptible(&priv->wait_command_queue);
5766
5767 if (priv->error_recovering)
5768 iwl3945_error_recovery(priv);
5769
5770 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
5771 return;
5772
5773 restart:
5774 queue_work(priv->workqueue, &priv->restart);
5775 }
5776
5777 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
5778
5779 static void __iwl3945_down(struct iwl3945_priv *priv)
5780 {
5781 unsigned long flags;
5782 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5783 struct ieee80211_conf *conf = NULL;
5784
5785 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5786
5787 conf = ieee80211_get_hw_conf(priv->hw);
5788
5789 if (!exit_pending)
5790 set_bit(STATUS_EXIT_PENDING, &priv->status);
5791
5792 iwl3945_led_unregister(priv);
5793 iwl3945_clear_stations_table(priv);
5794
5795 /* Unblock any waiting calls */
5796 wake_up_interruptible_all(&priv->wait_command_queue);
5797
5798 /* Wipe out the EXIT_PENDING status bit if we are not actually
5799 * exiting the module */
5800 if (!exit_pending)
5801 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5802
5803 /* stop and reset the on-board processor */
5804 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5805
5806 /* tell the device to stop sending interrupts */
5807 spin_lock_irqsave(&priv->lock, flags);
5808 iwl3945_disable_interrupts(priv);
5809 spin_unlock_irqrestore(&priv->lock, flags);
5810 iwl_synchronize_irq(priv);
5811
5812 if (priv->mac80211_registered)
5813 ieee80211_stop_queues(priv->hw);
5814
5815 /* If we have not previously called iwl3945_init() then
5816 * clear all bits but the RF Kill and SUSPEND bits and return */
5817 if (!iwl3945_is_init(priv)) {
5818 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5819 STATUS_RF_KILL_HW |
5820 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5821 STATUS_RF_KILL_SW |
5822 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5823 STATUS_GEO_CONFIGURED |
5824 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5825 STATUS_IN_SUSPEND |
5826 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5827 STATUS_EXIT_PENDING;
5828 goto exit;
5829 }
5830
5831 /* ...otherwise clear out all the status bits but the RF Kill and
5832 * SUSPEND bits and continue taking the NIC down. */
5833 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5834 STATUS_RF_KILL_HW |
5835 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5836 STATUS_RF_KILL_SW |
5837 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5838 STATUS_GEO_CONFIGURED |
5839 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5840 STATUS_IN_SUSPEND |
5841 test_bit(STATUS_FW_ERROR, &priv->status) <<
5842 STATUS_FW_ERROR |
5843 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5844 STATUS_EXIT_PENDING;
5845
5846 spin_lock_irqsave(&priv->lock, flags);
5847 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5848 spin_unlock_irqrestore(&priv->lock, flags);
5849
5850 iwl3945_hw_txq_ctx_stop(priv);
5851 iwl3945_hw_rxq_stop(priv);
5852
5853 spin_lock_irqsave(&priv->lock, flags);
5854 if (!iwl3945_grab_nic_access(priv)) {
5855 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
5856 APMG_CLK_VAL_DMA_CLK_RQT);
5857 iwl3945_release_nic_access(priv);
5858 }
5859 spin_unlock_irqrestore(&priv->lock, flags);
5860
5861 udelay(5);
5862
5863 iwl3945_hw_nic_stop_master(priv);
5864 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5865 iwl3945_hw_nic_reset(priv);
5866
5867 exit:
5868 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
5869
5870 if (priv->ibss_beacon)
5871 dev_kfree_skb(priv->ibss_beacon);
5872 priv->ibss_beacon = NULL;
5873
5874 /* clear out any free frames */
5875 iwl3945_clear_free_frames(priv);
5876 }
5877
5878 static void iwl3945_down(struct iwl3945_priv *priv)
5879 {
5880 mutex_lock(&priv->mutex);
5881 __iwl3945_down(priv);
5882 mutex_unlock(&priv->mutex);
5883
5884 iwl3945_cancel_deferred_work(priv);
5885 }
5886
5887 #define MAX_HW_RESTARTS 5
5888
5889 static int __iwl3945_up(struct iwl3945_priv *priv)
5890 {
5891 int rc, i;
5892
5893 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5894 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5895 return -EIO;
5896 }
5897
5898 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5899 IWL_WARNING("Radio disabled by SW RF kill (module "
5900 "parameter)\n");
5901 return -ENODEV;
5902 }
5903
5904 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5905 IWL_ERROR("ucode not available for device bringup\n");
5906 return -EIO;
5907 }
5908
5909 /* If platform's RF_KILL switch is NOT set to KILL */
5910 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
5911 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5912 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5913 else {
5914 set_bit(STATUS_RF_KILL_HW, &priv->status);
5915 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5916 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5917 return -ENODEV;
5918 }
5919 }
5920
5921 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5922
5923 rc = iwl3945_hw_nic_init(priv);
5924 if (rc) {
5925 IWL_ERROR("Unable to int nic\n");
5926 return rc;
5927 }
5928
5929 /* make sure rfkill handshake bits are cleared */
5930 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5931 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5932 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5933
5934 /* clear (again), then enable host interrupts */
5935 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5936 iwl3945_enable_interrupts(priv);
5937
5938 /* really make sure rfkill handshake bits are cleared */
5939 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5940 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5941
5942 /* Copy original ucode data image from disk into backup cache.
5943 * This will be used to initialize the on-board processor's
5944 * data SRAM for a clean start when the runtime program first loads. */
5945 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5946 priv->ucode_data.len);
5947
5948 /* We return success when we resume from suspend and rf_kill is on. */
5949 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5950 return 0;
5951
5952 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5953
5954 iwl3945_clear_stations_table(priv);
5955
5956 /* load bootstrap state machine,
5957 * load bootstrap program into processor's memory,
5958 * prepare to load the "initialize" uCode */
5959 rc = iwl3945_load_bsm(priv);
5960
5961 if (rc) {
5962 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
5963 continue;
5964 }
5965
5966 /* start card; "initialize" will load runtime ucode */
5967 iwl3945_nic_start(priv);
5968
5969 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5970
5971 return 0;
5972 }
5973
5974 set_bit(STATUS_EXIT_PENDING, &priv->status);
5975 __iwl3945_down(priv);
5976 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5977
5978 /* tried to restart and config the device for as long as our
5979 * patience could withstand */
5980 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5981 return -EIO;
5982 }
5983
5984
5985 /*****************************************************************************
5986 *
5987 * Workqueue callbacks
5988 *
5989 *****************************************************************************/
5990
5991 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5992 {
5993 struct iwl3945_priv *priv =
5994 container_of(data, struct iwl3945_priv, init_alive_start.work);
5995
5996 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5997 return;
5998
5999 mutex_lock(&priv->mutex);
6000 iwl3945_init_alive_start(priv);
6001 mutex_unlock(&priv->mutex);
6002 }
6003
6004 static void iwl3945_bg_alive_start(struct work_struct *data)
6005 {
6006 struct iwl3945_priv *priv =
6007 container_of(data, struct iwl3945_priv, alive_start.work);
6008
6009 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6010 return;
6011
6012 mutex_lock(&priv->mutex);
6013 iwl3945_alive_start(priv);
6014 mutex_unlock(&priv->mutex);
6015 }
6016
6017 static void iwl3945_bg_rf_kill(struct work_struct *work)
6018 {
6019 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
6020
6021 wake_up_interruptible(&priv->wait_command_queue);
6022
6023 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6024 return;
6025
6026 mutex_lock(&priv->mutex);
6027
6028 if (!iwl3945_is_rfkill(priv)) {
6029 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6030 "HW and/or SW RF Kill no longer active, restarting "
6031 "device\n");
6032 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6033 queue_work(priv->workqueue, &priv->restart);
6034 } else {
6035
6036 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6037 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6038 "disabled by SW switch\n");
6039 else
6040 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6041 "Kill switch must be turned off for "
6042 "wireless networking to work.\n");
6043 }
6044
6045 mutex_unlock(&priv->mutex);
6046 iwl3945_rfkill_set_hw_state(priv);
6047 }
6048
6049 static void iwl3945_bg_set_monitor(struct work_struct *work)
6050 {
6051 struct iwl3945_priv *priv = container_of(work,
6052 struct iwl3945_priv, set_monitor);
6053
6054 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
6055
6056 mutex_lock(&priv->mutex);
6057
6058 if (!iwl3945_is_ready(priv))
6059 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
6060 else
6061 if (iwl3945_set_mode(priv, IEEE80211_IF_TYPE_MNTR) != 0)
6062 IWL_ERROR("iwl3945_set_mode() failed\n");
6063
6064 mutex_unlock(&priv->mutex);
6065 }
6066
6067 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6068
6069 static void iwl3945_bg_scan_check(struct work_struct *data)
6070 {
6071 struct iwl3945_priv *priv =
6072 container_of(data, struct iwl3945_priv, scan_check.work);
6073
6074 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6075 return;
6076
6077 mutex_lock(&priv->mutex);
6078 if (test_bit(STATUS_SCANNING, &priv->status) ||
6079 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6080 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6081 "Scan completion watchdog resetting adapter (%dms)\n",
6082 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6083
6084 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6085 iwl3945_send_scan_abort(priv);
6086 }
6087 mutex_unlock(&priv->mutex);
6088 }
6089
6090 static void iwl3945_bg_request_scan(struct work_struct *data)
6091 {
6092 struct iwl3945_priv *priv =
6093 container_of(data, struct iwl3945_priv, request_scan);
6094 struct iwl3945_host_cmd cmd = {
6095 .id = REPLY_SCAN_CMD,
6096 .len = sizeof(struct iwl3945_scan_cmd),
6097 .meta.flags = CMD_SIZE_HUGE,
6098 };
6099 int rc = 0;
6100 struct iwl3945_scan_cmd *scan;
6101 struct ieee80211_conf *conf = NULL;
6102 u8 direct_mask;
6103 enum ieee80211_band band;
6104
6105 conf = ieee80211_get_hw_conf(priv->hw);
6106
6107 mutex_lock(&priv->mutex);
6108
6109 if (!iwl3945_is_ready(priv)) {
6110 IWL_WARNING("request scan called when driver not ready.\n");
6111 goto done;
6112 }
6113
6114 /* Make sure the scan wasn't cancelled before this queued work
6115 * was given the chance to run... */
6116 if (!test_bit(STATUS_SCANNING, &priv->status))
6117 goto done;
6118
6119 /* This should never be called or scheduled if there is currently
6120 * a scan active in the hardware. */
6121 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6122 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6123 "Ignoring second request.\n");
6124 rc = -EIO;
6125 goto done;
6126 }
6127
6128 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6129 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6130 goto done;
6131 }
6132
6133 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6134 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6135 goto done;
6136 }
6137
6138 if (iwl3945_is_rfkill(priv)) {
6139 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6140 goto done;
6141 }
6142
6143 if (!test_bit(STATUS_READY, &priv->status)) {
6144 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6145 goto done;
6146 }
6147
6148 if (!priv->scan_bands) {
6149 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6150 goto done;
6151 }
6152
6153 if (!priv->scan) {
6154 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6155 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6156 if (!priv->scan) {
6157 rc = -ENOMEM;
6158 goto done;
6159 }
6160 }
6161 scan = priv->scan;
6162 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6163
6164 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6165 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6166
6167 if (iwl3945_is_associated(priv)) {
6168 u16 interval = 0;
6169 u32 extra;
6170 u32 suspend_time = 100;
6171 u32 scan_suspend_time = 100;
6172 unsigned long flags;
6173
6174 IWL_DEBUG_INFO("Scanning while associated...\n");
6175
6176 spin_lock_irqsave(&priv->lock, flags);
6177 interval = priv->beacon_int;
6178 spin_unlock_irqrestore(&priv->lock, flags);
6179
6180 scan->suspend_time = 0;
6181 scan->max_out_time = cpu_to_le32(200 * 1024);
6182 if (!interval)
6183 interval = suspend_time;
6184 /*
6185 * suspend time format:
6186 * 0-19: beacon interval in usec (time before exec.)
6187 * 20-23: 0
6188 * 24-31: number of beacons (suspend between channels)
6189 */
6190
6191 extra = (suspend_time / interval) << 24;
6192 scan_suspend_time = 0xFF0FFFFF &
6193 (extra | ((suspend_time % interval) * 1024));
6194
6195 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6196 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6197 scan_suspend_time, interval);
6198 }
6199
6200 /* We should add the ability for user to lock to PASSIVE ONLY */
6201 if (priv->one_direct_scan) {
6202 IWL_DEBUG_SCAN
6203 ("Kicking off one direct scan for '%s'\n",
6204 iwl3945_escape_essid(priv->direct_ssid,
6205 priv->direct_ssid_len));
6206 scan->direct_scan[0].id = WLAN_EID_SSID;
6207 scan->direct_scan[0].len = priv->direct_ssid_len;
6208 memcpy(scan->direct_scan[0].ssid,
6209 priv->direct_ssid, priv->direct_ssid_len);
6210 direct_mask = 1;
6211 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
6212 IWL_DEBUG_SCAN
6213 ("Kicking off one direct scan for '%s' when not associated\n",
6214 iwl3945_escape_essid(priv->essid, priv->essid_len));
6215 scan->direct_scan[0].id = WLAN_EID_SSID;
6216 scan->direct_scan[0].len = priv->essid_len;
6217 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6218 direct_mask = 1;
6219 } else {
6220 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6221 direct_mask = 0;
6222 }
6223
6224 /* We don't build a direct scan probe request; the uCode will do
6225 * that based on the direct_mask added to each channel entry */
6226 scan->tx_cmd.len = cpu_to_le16(
6227 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6228 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
6229 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6230 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6231 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6232
6233 /* flags + rate selection */
6234
6235 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6236 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6237 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6238 scan->good_CRC_th = 0;
6239 band = IEEE80211_BAND_2GHZ;
6240 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6241 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6242 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6243 band = IEEE80211_BAND_5GHZ;
6244 } else {
6245 IWL_WARNING("Invalid scan band count\n");
6246 goto done;
6247 }
6248
6249 /* select Rx antennas */
6250 scan->flags |= iwl3945_get_antenna_flags(priv);
6251
6252 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6253 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6254
6255 if (direct_mask)
6256 scan->channel_count =
6257 iwl3945_get_channels_for_scan(
6258 priv, band, 1, /* active */
6259 direct_mask,
6260 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6261 else
6262 scan->channel_count =
6263 iwl3945_get_channels_for_scan(
6264 priv, band, 0, /* passive */
6265 direct_mask,
6266 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6267
6268 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6269 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6270 cmd.data = scan;
6271 scan->len = cpu_to_le16(cmd.len);
6272
6273 set_bit(STATUS_SCAN_HW, &priv->status);
6274 rc = iwl3945_send_cmd_sync(priv, &cmd);
6275 if (rc)
6276 goto done;
6277
6278 queue_delayed_work(priv->workqueue, &priv->scan_check,
6279 IWL_SCAN_CHECK_WATCHDOG);
6280
6281 mutex_unlock(&priv->mutex);
6282 return;
6283
6284 done:
6285 /* inform mac80211 scan aborted */
6286 queue_work(priv->workqueue, &priv->scan_completed);
6287 mutex_unlock(&priv->mutex);
6288 }
6289
6290 static void iwl3945_bg_up(struct work_struct *data)
6291 {
6292 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6293
6294 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6295 return;
6296
6297 mutex_lock(&priv->mutex);
6298 __iwl3945_up(priv);
6299 mutex_unlock(&priv->mutex);
6300 iwl3945_rfkill_set_hw_state(priv);
6301 }
6302
6303 static void iwl3945_bg_restart(struct work_struct *data)
6304 {
6305 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6306
6307 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6308 return;
6309
6310 iwl3945_down(priv);
6311 queue_work(priv->workqueue, &priv->up);
6312 }
6313
6314 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6315 {
6316 struct iwl3945_priv *priv =
6317 container_of(data, struct iwl3945_priv, rx_replenish);
6318
6319 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6320 return;
6321
6322 mutex_lock(&priv->mutex);
6323 iwl3945_rx_replenish(priv);
6324 mutex_unlock(&priv->mutex);
6325 }
6326
6327 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6328
6329 static void iwl3945_bg_post_associate(struct work_struct *data)
6330 {
6331 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
6332 post_associate.work);
6333
6334 int rc = 0;
6335 struct ieee80211_conf *conf = NULL;
6336 DECLARE_MAC_BUF(mac);
6337
6338 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6339 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6340 return;
6341 }
6342
6343
6344 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6345 priv->assoc_id,
6346 print_mac(mac, priv->active_rxon.bssid_addr));
6347
6348 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6349 return;
6350
6351 mutex_lock(&priv->mutex);
6352
6353 if (!priv->vif || !priv->is_open) {
6354 mutex_unlock(&priv->mutex);
6355 return;
6356 }
6357 iwl3945_scan_cancel_timeout(priv, 200);
6358
6359 conf = ieee80211_get_hw_conf(priv->hw);
6360
6361 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6362 iwl3945_commit_rxon(priv);
6363
6364 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6365 iwl3945_setup_rxon_timing(priv);
6366 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6367 sizeof(priv->rxon_timing), &priv->rxon_timing);
6368 if (rc)
6369 IWL_WARNING("REPLY_RXON_TIMING failed - "
6370 "Attempting to continue.\n");
6371
6372 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6373
6374 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6375
6376 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6377 priv->assoc_id, priv->beacon_int);
6378
6379 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6380 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6381 else
6382 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6383
6384 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6385 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6386 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6387 else
6388 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6389
6390 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6391 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6392
6393 }
6394
6395 iwl3945_commit_rxon(priv);
6396
6397 switch (priv->iw_mode) {
6398 case IEEE80211_IF_TYPE_STA:
6399 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6400 break;
6401
6402 case IEEE80211_IF_TYPE_IBSS:
6403
6404 /* clear out the station table */
6405 iwl3945_clear_stations_table(priv);
6406
6407 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6408 iwl3945_add_station(priv, priv->bssid, 0, 0);
6409 iwl3945_sync_sta(priv, IWL_STA_ID,
6410 (priv->band == IEEE80211_BAND_5GHZ) ?
6411 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6412 CMD_ASYNC);
6413 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6414 iwl3945_send_beacon_cmd(priv);
6415
6416 break;
6417
6418 default:
6419 IWL_ERROR("%s Should not be called in %d mode\n",
6420 __FUNCTION__, priv->iw_mode);
6421 break;
6422 }
6423
6424 iwl3945_activate_qos(priv, 0);
6425
6426 /* we have just associated, don't start scan too early */
6427 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6428 mutex_unlock(&priv->mutex);
6429 }
6430
6431 static void iwl3945_bg_abort_scan(struct work_struct *work)
6432 {
6433 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6434
6435 if (!iwl3945_is_ready(priv))
6436 return;
6437
6438 mutex_lock(&priv->mutex);
6439
6440 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6441 iwl3945_send_scan_abort(priv);
6442
6443 mutex_unlock(&priv->mutex);
6444 }
6445
6446 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6447
6448 static void iwl3945_bg_scan_completed(struct work_struct *work)
6449 {
6450 struct iwl3945_priv *priv =
6451 container_of(work, struct iwl3945_priv, scan_completed);
6452
6453 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6454
6455 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6456 return;
6457
6458 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6459 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
6460
6461 ieee80211_scan_completed(priv->hw);
6462
6463 /* Since setting the TXPOWER may have been deferred while
6464 * performing the scan, fire one off */
6465 mutex_lock(&priv->mutex);
6466 iwl3945_hw_reg_send_txpower(priv);
6467 mutex_unlock(&priv->mutex);
6468 }
6469
6470 /*****************************************************************************
6471 *
6472 * mac80211 entry point functions
6473 *
6474 *****************************************************************************/
6475
6476 #define UCODE_READY_TIMEOUT (2 * HZ)
6477
6478 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6479 {
6480 struct iwl3945_priv *priv = hw->priv;
6481 int ret;
6482
6483 IWL_DEBUG_MAC80211("enter\n");
6484
6485 if (pci_enable_device(priv->pci_dev)) {
6486 IWL_ERROR("Fail to pci_enable_device\n");
6487 return -ENODEV;
6488 }
6489 pci_restore_state(priv->pci_dev);
6490 pci_enable_msi(priv->pci_dev);
6491
6492 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6493 DRV_NAME, priv);
6494 if (ret) {
6495 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6496 goto out_disable_msi;
6497 }
6498
6499 /* we should be verifying the device is ready to be opened */
6500 mutex_lock(&priv->mutex);
6501
6502 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6503 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6504 * ucode filename and max sizes are card-specific. */
6505
6506 if (!priv->ucode_code.len) {
6507 ret = iwl3945_read_ucode(priv);
6508 if (ret) {
6509 IWL_ERROR("Could not read microcode: %d\n", ret);
6510 mutex_unlock(&priv->mutex);
6511 goto out_release_irq;
6512 }
6513 }
6514
6515 ret = __iwl3945_up(priv);
6516
6517 mutex_unlock(&priv->mutex);
6518
6519 iwl3945_rfkill_set_hw_state(priv);
6520
6521 if (ret)
6522 goto out_release_irq;
6523
6524 IWL_DEBUG_INFO("Start UP work.\n");
6525
6526 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6527 return 0;
6528
6529 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6530 * mac80211 will not be run successfully. */
6531 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6532 test_bit(STATUS_READY, &priv->status),
6533 UCODE_READY_TIMEOUT);
6534 if (!ret) {
6535 if (!test_bit(STATUS_READY, &priv->status)) {
6536 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6537 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6538 ret = -ETIMEDOUT;
6539 goto out_release_irq;
6540 }
6541 }
6542
6543 priv->is_open = 1;
6544 IWL_DEBUG_MAC80211("leave\n");
6545 return 0;
6546
6547 out_release_irq:
6548 free_irq(priv->pci_dev->irq, priv);
6549 out_disable_msi:
6550 pci_disable_msi(priv->pci_dev);
6551 pci_disable_device(priv->pci_dev);
6552 priv->is_open = 0;
6553 IWL_DEBUG_MAC80211("leave - failed\n");
6554 return ret;
6555 }
6556
6557 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6558 {
6559 struct iwl3945_priv *priv = hw->priv;
6560
6561 IWL_DEBUG_MAC80211("enter\n");
6562
6563 if (!priv->is_open) {
6564 IWL_DEBUG_MAC80211("leave - skip\n");
6565 return;
6566 }
6567
6568 priv->is_open = 0;
6569
6570 if (iwl3945_is_ready_rf(priv)) {
6571 /* stop mac, cancel any scan request and clear
6572 * RXON_FILTER_ASSOC_MSK BIT
6573 */
6574 mutex_lock(&priv->mutex);
6575 iwl3945_scan_cancel_timeout(priv, 100);
6576 cancel_delayed_work(&priv->post_associate);
6577 mutex_unlock(&priv->mutex);
6578 }
6579
6580 iwl3945_down(priv);
6581
6582 flush_workqueue(priv->workqueue);
6583 free_irq(priv->pci_dev->irq, priv);
6584 pci_disable_msi(priv->pci_dev);
6585 pci_save_state(priv->pci_dev);
6586 pci_disable_device(priv->pci_dev);
6587
6588 IWL_DEBUG_MAC80211("leave\n");
6589 }
6590
6591 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6592 {
6593 struct iwl3945_priv *priv = hw->priv;
6594
6595 IWL_DEBUG_MAC80211("enter\n");
6596
6597 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6598 IWL_DEBUG_MAC80211("leave - monitor\n");
6599 dev_kfree_skb_any(skb);
6600 return 0;
6601 }
6602
6603 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6604 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6605
6606 if (iwl3945_tx_skb(priv, skb))
6607 dev_kfree_skb_any(skb);
6608
6609 IWL_DEBUG_MAC80211("leave\n");
6610 return 0;
6611 }
6612
6613 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6614 struct ieee80211_if_init_conf *conf)
6615 {
6616 struct iwl3945_priv *priv = hw->priv;
6617 unsigned long flags;
6618 DECLARE_MAC_BUF(mac);
6619
6620 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6621
6622 if (priv->vif) {
6623 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6624 return -EOPNOTSUPP;
6625 }
6626
6627 spin_lock_irqsave(&priv->lock, flags);
6628 priv->vif = conf->vif;
6629
6630 spin_unlock_irqrestore(&priv->lock, flags);
6631
6632 mutex_lock(&priv->mutex);
6633
6634 if (conf->mac_addr) {
6635 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6636 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6637 }
6638
6639 if (iwl3945_is_ready(priv))
6640 iwl3945_set_mode(priv, conf->type);
6641
6642 mutex_unlock(&priv->mutex);
6643
6644 IWL_DEBUG_MAC80211("leave\n");
6645 return 0;
6646 }
6647
6648 /**
6649 * iwl3945_mac_config - mac80211 config callback
6650 *
6651 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6652 * be set inappropriately and the driver currently sets the hardware up to
6653 * use it whenever needed.
6654 */
6655 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
6656 {
6657 struct iwl3945_priv *priv = hw->priv;
6658 const struct iwl3945_channel_info *ch_info;
6659 unsigned long flags;
6660 int ret = 0;
6661
6662 mutex_lock(&priv->mutex);
6663 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6664
6665 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6666
6667 if (!iwl3945_is_ready(priv)) {
6668 IWL_DEBUG_MAC80211("leave - not ready\n");
6669 ret = -EIO;
6670 goto out;
6671 }
6672
6673 if (unlikely(!iwl3945_param_disable_hw_scan &&
6674 test_bit(STATUS_SCANNING, &priv->status))) {
6675 IWL_DEBUG_MAC80211("leave - scanning\n");
6676 set_bit(STATUS_CONF_PENDING, &priv->status);
6677 mutex_unlock(&priv->mutex);
6678 return 0;
6679 }
6680
6681 spin_lock_irqsave(&priv->lock, flags);
6682
6683 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6684 conf->channel->hw_value);
6685 if (!is_channel_valid(ch_info)) {
6686 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6687 conf->channel->hw_value, conf->channel->band);
6688 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6689 spin_unlock_irqrestore(&priv->lock, flags);
6690 ret = -EINVAL;
6691 goto out;
6692 }
6693
6694 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6695
6696 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6697
6698 /* The list of supported rates and rate mask can be different
6699 * for each phymode; since the phymode may have changed, reset
6700 * the rate mask to what mac80211 lists */
6701 iwl3945_set_rate(priv);
6702
6703 spin_unlock_irqrestore(&priv->lock, flags);
6704
6705 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6706 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6707 iwl3945_hw_channel_switch(priv, conf->channel);
6708 goto out;
6709 }
6710 #endif
6711
6712 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6713
6714 if (!conf->radio_enabled) {
6715 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6716 goto out;
6717 }
6718
6719 if (iwl3945_is_rfkill(priv)) {
6720 IWL_DEBUG_MAC80211("leave - RF kill\n");
6721 ret = -EIO;
6722 goto out;
6723 }
6724
6725 iwl3945_set_rate(priv);
6726
6727 if (memcmp(&priv->active_rxon,
6728 &priv->staging_rxon, sizeof(priv->staging_rxon)))
6729 iwl3945_commit_rxon(priv);
6730 else
6731 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6732
6733 IWL_DEBUG_MAC80211("leave\n");
6734
6735 out:
6736 clear_bit(STATUS_CONF_PENDING, &priv->status);
6737 mutex_unlock(&priv->mutex);
6738 return ret;
6739 }
6740
6741 static void iwl3945_config_ap(struct iwl3945_priv *priv)
6742 {
6743 int rc = 0;
6744
6745 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6746 return;
6747
6748 /* The following should be done only at AP bring up */
6749 if (!(iwl3945_is_associated(priv))) {
6750
6751 /* RXON - unassoc (to set timing command) */
6752 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6753 iwl3945_commit_rxon(priv);
6754
6755 /* RXON Timing */
6756 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6757 iwl3945_setup_rxon_timing(priv);
6758 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6759 sizeof(priv->rxon_timing), &priv->rxon_timing);
6760 if (rc)
6761 IWL_WARNING("REPLY_RXON_TIMING failed - "
6762 "Attempting to continue.\n");
6763
6764 /* FIXME: what should be the assoc_id for AP? */
6765 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6766 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6767 priv->staging_rxon.flags |=
6768 RXON_FLG_SHORT_PREAMBLE_MSK;
6769 else
6770 priv->staging_rxon.flags &=
6771 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6772
6773 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6774 if (priv->assoc_capability &
6775 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6776 priv->staging_rxon.flags |=
6777 RXON_FLG_SHORT_SLOT_MSK;
6778 else
6779 priv->staging_rxon.flags &=
6780 ~RXON_FLG_SHORT_SLOT_MSK;
6781
6782 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6783 priv->staging_rxon.flags &=
6784 ~RXON_FLG_SHORT_SLOT_MSK;
6785 }
6786 /* restore RXON assoc */
6787 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6788 iwl3945_commit_rxon(priv);
6789 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6790 }
6791 iwl3945_send_beacon_cmd(priv);
6792
6793 /* FIXME - we need to add code here to detect a totally new
6794 * configuration, reset the AP, unassoc, rxon timing, assoc,
6795 * clear sta table, add BCAST sta... */
6796 }
6797
6798 /* temporary */
6799 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb);
6800
6801 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6802 struct ieee80211_vif *vif,
6803 struct ieee80211_if_conf *conf)
6804 {
6805 struct iwl3945_priv *priv = hw->priv;
6806 DECLARE_MAC_BUF(mac);
6807 unsigned long flags;
6808 int rc;
6809
6810 if (conf == NULL)
6811 return -EIO;
6812
6813 if (priv->vif != vif) {
6814 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6815 return 0;
6816 }
6817
6818 /* handle this temporarily here */
6819 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
6820 conf->changed & IEEE80211_IFCC_BEACON) {
6821 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6822 if (!beacon)
6823 return -ENOMEM;
6824 rc = iwl3945_mac_beacon_update(hw, beacon);
6825 if (rc)
6826 return rc;
6827 }
6828
6829 /* XXX: this MUST use conf->mac_addr */
6830
6831 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6832 (!conf->ssid_len)) {
6833 IWL_DEBUG_MAC80211
6834 ("Leaving in AP mode because HostAPD is not ready.\n");
6835 return 0;
6836 }
6837
6838 if (!iwl3945_is_alive(priv))
6839 return -EAGAIN;
6840
6841 mutex_lock(&priv->mutex);
6842
6843 if (conf->bssid)
6844 IWL_DEBUG_MAC80211("bssid: %s\n",
6845 print_mac(mac, conf->bssid));
6846
6847 /*
6848 * very dubious code was here; the probe filtering flag is never set:
6849 *
6850 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6851 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6852 */
6853
6854 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6855 if (!conf->bssid) {
6856 conf->bssid = priv->mac_addr;
6857 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6858 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6859 print_mac(mac, conf->bssid));
6860 }
6861 if (priv->ibss_beacon)
6862 dev_kfree_skb(priv->ibss_beacon);
6863
6864 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6865 }
6866
6867 if (iwl3945_is_rfkill(priv))
6868 goto done;
6869
6870 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6871 !is_multicast_ether_addr(conf->bssid)) {
6872 /* If there is currently a HW scan going on in the background
6873 * then we need to cancel it else the RXON below will fail. */
6874 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6875 IWL_WARNING("Aborted scan still in progress "
6876 "after 100ms\n");
6877 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6878 mutex_unlock(&priv->mutex);
6879 return -EAGAIN;
6880 }
6881 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6882
6883 /* TODO: Audit driver for usage of these members and see
6884 * if mac80211 deprecates them (priv->bssid looks like it
6885 * shouldn't be there, but I haven't scanned the IBSS code
6886 * to verify) - jpk */
6887 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6888
6889 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
6890 iwl3945_config_ap(priv);
6891 else {
6892 rc = iwl3945_commit_rxon(priv);
6893 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
6894 iwl3945_add_station(priv,
6895 priv->active_rxon.bssid_addr, 1, 0);
6896 }
6897
6898 } else {
6899 iwl3945_scan_cancel_timeout(priv, 100);
6900 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6901 iwl3945_commit_rxon(priv);
6902 }
6903
6904 done:
6905 spin_lock_irqsave(&priv->lock, flags);
6906 if (!conf->ssid_len)
6907 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6908 else
6909 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6910
6911 priv->essid_len = conf->ssid_len;
6912 spin_unlock_irqrestore(&priv->lock, flags);
6913
6914 IWL_DEBUG_MAC80211("leave\n");
6915 mutex_unlock(&priv->mutex);
6916
6917 return 0;
6918 }
6919
6920 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6921 unsigned int changed_flags,
6922 unsigned int *total_flags,
6923 int mc_count, struct dev_addr_list *mc_list)
6924 {
6925 struct iwl3945_priv *priv = hw->priv;
6926
6927 if (changed_flags & (*total_flags) & FIF_OTHER_BSS) {
6928 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
6929 IEEE80211_IF_TYPE_MNTR,
6930 changed_flags, *total_flags);
6931 /* queue work 'cuz mac80211 is holding a lock which
6932 * prevents us from issuing (synchronous) f/w cmds */
6933 queue_work(priv->workqueue, &priv->set_monitor);
6934 }
6935 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI |
6936 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6937 }
6938
6939 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6940 struct ieee80211_if_init_conf *conf)
6941 {
6942 struct iwl3945_priv *priv = hw->priv;
6943
6944 IWL_DEBUG_MAC80211("enter\n");
6945
6946 mutex_lock(&priv->mutex);
6947
6948 if (iwl3945_is_ready_rf(priv)) {
6949 iwl3945_scan_cancel_timeout(priv, 100);
6950 cancel_delayed_work(&priv->post_associate);
6951 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6952 iwl3945_commit_rxon(priv);
6953 }
6954 if (priv->vif == conf->vif) {
6955 priv->vif = NULL;
6956 memset(priv->bssid, 0, ETH_ALEN);
6957 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6958 priv->essid_len = 0;
6959 }
6960 mutex_unlock(&priv->mutex);
6961
6962 IWL_DEBUG_MAC80211("leave\n");
6963 }
6964
6965 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6966 {
6967 int rc = 0;
6968 unsigned long flags;
6969 struct iwl3945_priv *priv = hw->priv;
6970
6971 IWL_DEBUG_MAC80211("enter\n");
6972
6973 mutex_lock(&priv->mutex);
6974 spin_lock_irqsave(&priv->lock, flags);
6975
6976 if (!iwl3945_is_ready_rf(priv)) {
6977 rc = -EIO;
6978 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6979 goto out_unlock;
6980 }
6981
6982 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
6983 rc = -EIO;
6984 IWL_ERROR("ERROR: APs don't scan\n");
6985 goto out_unlock;
6986 }
6987
6988 /* we don't schedule scan within next_scan_jiffies period */
6989 if (priv->next_scan_jiffies &&
6990 time_after(priv->next_scan_jiffies, jiffies)) {
6991 rc = -EAGAIN;
6992 goto out_unlock;
6993 }
6994 /* if we just finished scan ask for delay for a broadcast scan */
6995 if ((len == 0) && priv->last_scan_jiffies &&
6996 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6997 jiffies)) {
6998 rc = -EAGAIN;
6999 goto out_unlock;
7000 }
7001 if (len) {
7002 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7003 iwl3945_escape_essid(ssid, len), (int)len);
7004
7005 priv->one_direct_scan = 1;
7006 priv->direct_ssid_len = (u8)
7007 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7008 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7009 } else
7010 priv->one_direct_scan = 0;
7011
7012 rc = iwl3945_scan_initiate(priv);
7013
7014 IWL_DEBUG_MAC80211("leave\n");
7015
7016 out_unlock:
7017 spin_unlock_irqrestore(&priv->lock, flags);
7018 mutex_unlock(&priv->mutex);
7019
7020 return rc;
7021 }
7022
7023 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7024 const u8 *local_addr, const u8 *addr,
7025 struct ieee80211_key_conf *key)
7026 {
7027 struct iwl3945_priv *priv = hw->priv;
7028 int rc = 0;
7029 u8 sta_id;
7030
7031 IWL_DEBUG_MAC80211("enter\n");
7032
7033 if (!iwl3945_param_hwcrypto) {
7034 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7035 return -EOPNOTSUPP;
7036 }
7037
7038 if (is_zero_ether_addr(addr))
7039 /* only support pairwise keys */
7040 return -EOPNOTSUPP;
7041
7042 sta_id = iwl3945_hw_find_station(priv, addr);
7043 if (sta_id == IWL_INVALID_STATION) {
7044 DECLARE_MAC_BUF(mac);
7045
7046 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7047 print_mac(mac, addr));
7048 return -EINVAL;
7049 }
7050
7051 mutex_lock(&priv->mutex);
7052
7053 iwl3945_scan_cancel_timeout(priv, 100);
7054
7055 switch (cmd) {
7056 case SET_KEY:
7057 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7058 if (!rc) {
7059 iwl3945_set_rxon_hwcrypto(priv, 1);
7060 iwl3945_commit_rxon(priv);
7061 key->hw_key_idx = sta_id;
7062 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7063 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7064 }
7065 break;
7066 case DISABLE_KEY:
7067 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7068 if (!rc) {
7069 iwl3945_set_rxon_hwcrypto(priv, 0);
7070 iwl3945_commit_rxon(priv);
7071 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7072 }
7073 break;
7074 default:
7075 rc = -EINVAL;
7076 }
7077
7078 IWL_DEBUG_MAC80211("leave\n");
7079 mutex_unlock(&priv->mutex);
7080
7081 return rc;
7082 }
7083
7084 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
7085 const struct ieee80211_tx_queue_params *params)
7086 {
7087 struct iwl3945_priv *priv = hw->priv;
7088 unsigned long flags;
7089 int q;
7090
7091 IWL_DEBUG_MAC80211("enter\n");
7092
7093 if (!iwl3945_is_ready_rf(priv)) {
7094 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7095 return -EIO;
7096 }
7097
7098 if (queue >= AC_NUM) {
7099 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7100 return 0;
7101 }
7102
7103 if (!priv->qos_data.qos_enable) {
7104 priv->qos_data.qos_active = 0;
7105 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7106 return 0;
7107 }
7108 q = AC_NUM - 1 - queue;
7109
7110 spin_lock_irqsave(&priv->lock, flags);
7111
7112 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7113 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7114 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7115 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7116 cpu_to_le16((params->txop * 32));
7117
7118 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7119 priv->qos_data.qos_active = 1;
7120
7121 spin_unlock_irqrestore(&priv->lock, flags);
7122
7123 mutex_lock(&priv->mutex);
7124 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7125 iwl3945_activate_qos(priv, 1);
7126 else if (priv->assoc_id && iwl3945_is_associated(priv))
7127 iwl3945_activate_qos(priv, 0);
7128
7129 mutex_unlock(&priv->mutex);
7130
7131 IWL_DEBUG_MAC80211("leave\n");
7132 return 0;
7133 }
7134
7135 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7136 struct ieee80211_tx_queue_stats *stats)
7137 {
7138 struct iwl3945_priv *priv = hw->priv;
7139 int i, avail;
7140 struct iwl3945_tx_queue *txq;
7141 struct iwl3945_queue *q;
7142 unsigned long flags;
7143
7144 IWL_DEBUG_MAC80211("enter\n");
7145
7146 if (!iwl3945_is_ready_rf(priv)) {
7147 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7148 return -EIO;
7149 }
7150
7151 spin_lock_irqsave(&priv->lock, flags);
7152
7153 for (i = 0; i < AC_NUM; i++) {
7154 txq = &priv->txq[i];
7155 q = &txq->q;
7156 avail = iwl3945_queue_space(q);
7157
7158 stats[i].len = q->n_window - avail;
7159 stats[i].limit = q->n_window - q->high_mark;
7160 stats[i].count = q->n_window;
7161
7162 }
7163 spin_unlock_irqrestore(&priv->lock, flags);
7164
7165 IWL_DEBUG_MAC80211("leave\n");
7166
7167 return 0;
7168 }
7169
7170 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7171 struct ieee80211_low_level_stats *stats)
7172 {
7173 IWL_DEBUG_MAC80211("enter\n");
7174 IWL_DEBUG_MAC80211("leave\n");
7175
7176 return 0;
7177 }
7178
7179 static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
7180 {
7181 IWL_DEBUG_MAC80211("enter\n");
7182 IWL_DEBUG_MAC80211("leave\n");
7183
7184 return 0;
7185 }
7186
7187 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7188 {
7189 struct iwl3945_priv *priv = hw->priv;
7190 unsigned long flags;
7191
7192 mutex_lock(&priv->mutex);
7193 IWL_DEBUG_MAC80211("enter\n");
7194
7195 iwl3945_reset_qos(priv);
7196
7197 cancel_delayed_work(&priv->post_associate);
7198
7199 spin_lock_irqsave(&priv->lock, flags);
7200 priv->assoc_id = 0;
7201 priv->assoc_capability = 0;
7202 priv->call_post_assoc_from_beacon = 0;
7203
7204 /* new association get rid of ibss beacon skb */
7205 if (priv->ibss_beacon)
7206 dev_kfree_skb(priv->ibss_beacon);
7207
7208 priv->ibss_beacon = NULL;
7209
7210 priv->beacon_int = priv->hw->conf.beacon_int;
7211 priv->timestamp1 = 0;
7212 priv->timestamp0 = 0;
7213 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7214 priv->beacon_int = 0;
7215
7216 spin_unlock_irqrestore(&priv->lock, flags);
7217
7218 if (!iwl3945_is_ready_rf(priv)) {
7219 IWL_DEBUG_MAC80211("leave - not ready\n");
7220 mutex_unlock(&priv->mutex);
7221 return;
7222 }
7223
7224 /* we are restarting association process
7225 * clear RXON_FILTER_ASSOC_MSK bit
7226 */
7227 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7228 iwl3945_scan_cancel_timeout(priv, 100);
7229 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7230 iwl3945_commit_rxon(priv);
7231 }
7232
7233 /* Per mac80211.h: This is only used in IBSS mode... */
7234 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7235
7236 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7237 mutex_unlock(&priv->mutex);
7238 return;
7239 }
7240
7241 iwl3945_set_rate(priv);
7242
7243 mutex_unlock(&priv->mutex);
7244
7245 IWL_DEBUG_MAC80211("leave\n");
7246
7247 }
7248
7249 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7250 {
7251 struct iwl3945_priv *priv = hw->priv;
7252 unsigned long flags;
7253
7254 mutex_lock(&priv->mutex);
7255 IWL_DEBUG_MAC80211("enter\n");
7256
7257 if (!iwl3945_is_ready_rf(priv)) {
7258 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7259 mutex_unlock(&priv->mutex);
7260 return -EIO;
7261 }
7262
7263 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7264 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7265 mutex_unlock(&priv->mutex);
7266 return -EIO;
7267 }
7268
7269 spin_lock_irqsave(&priv->lock, flags);
7270
7271 if (priv->ibss_beacon)
7272 dev_kfree_skb(priv->ibss_beacon);
7273
7274 priv->ibss_beacon = skb;
7275
7276 priv->assoc_id = 0;
7277
7278 IWL_DEBUG_MAC80211("leave\n");
7279 spin_unlock_irqrestore(&priv->lock, flags);
7280
7281 iwl3945_reset_qos(priv);
7282
7283 queue_work(priv->workqueue, &priv->post_associate.work);
7284
7285 mutex_unlock(&priv->mutex);
7286
7287 return 0;
7288 }
7289
7290 /*****************************************************************************
7291 *
7292 * sysfs attributes
7293 *
7294 *****************************************************************************/
7295
7296 #ifdef CONFIG_IWL3945_DEBUG
7297
7298 /*
7299 * The following adds a new attribute to the sysfs representation
7300 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7301 * used for controlling the debug level.
7302 *
7303 * See the level definitions in iwl for details.
7304 */
7305
7306 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7307 {
7308 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7309 }
7310 static ssize_t store_debug_level(struct device_driver *d,
7311 const char *buf, size_t count)
7312 {
7313 char *p = (char *)buf;
7314 u32 val;
7315
7316 val = simple_strtoul(p, &p, 0);
7317 if (p == buf)
7318 printk(KERN_INFO DRV_NAME
7319 ": %s is not in hex or decimal form.\n", buf);
7320 else
7321 iwl3945_debug_level = val;
7322
7323 return strnlen(buf, count);
7324 }
7325
7326 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7327 show_debug_level, store_debug_level);
7328
7329 #endif /* CONFIG_IWL3945_DEBUG */
7330
7331 static ssize_t show_temperature(struct device *d,
7332 struct device_attribute *attr, char *buf)
7333 {
7334 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7335
7336 if (!iwl3945_is_alive(priv))
7337 return -EAGAIN;
7338
7339 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7340 }
7341
7342 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7343
7344 static ssize_t show_rs_window(struct device *d,
7345 struct device_attribute *attr,
7346 char *buf)
7347 {
7348 struct iwl3945_priv *priv = d->driver_data;
7349 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
7350 }
7351 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7352
7353 static ssize_t show_tx_power(struct device *d,
7354 struct device_attribute *attr, char *buf)
7355 {
7356 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7357 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7358 }
7359
7360 static ssize_t store_tx_power(struct device *d,
7361 struct device_attribute *attr,
7362 const char *buf, size_t count)
7363 {
7364 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7365 char *p = (char *)buf;
7366 u32 val;
7367
7368 val = simple_strtoul(p, &p, 10);
7369 if (p == buf)
7370 printk(KERN_INFO DRV_NAME
7371 ": %s is not in decimal form.\n", buf);
7372 else
7373 iwl3945_hw_reg_set_txpower(priv, val);
7374
7375 return count;
7376 }
7377
7378 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7379
7380 static ssize_t show_flags(struct device *d,
7381 struct device_attribute *attr, char *buf)
7382 {
7383 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7384
7385 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7386 }
7387
7388 static ssize_t store_flags(struct device *d,
7389 struct device_attribute *attr,
7390 const char *buf, size_t count)
7391 {
7392 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7393 u32 flags = simple_strtoul(buf, NULL, 0);
7394
7395 mutex_lock(&priv->mutex);
7396 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7397 /* Cancel any currently running scans... */
7398 if (iwl3945_scan_cancel_timeout(priv, 100))
7399 IWL_WARNING("Could not cancel scan.\n");
7400 else {
7401 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7402 flags);
7403 priv->staging_rxon.flags = cpu_to_le32(flags);
7404 iwl3945_commit_rxon(priv);
7405 }
7406 }
7407 mutex_unlock(&priv->mutex);
7408
7409 return count;
7410 }
7411
7412 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7413
7414 static ssize_t show_filter_flags(struct device *d,
7415 struct device_attribute *attr, char *buf)
7416 {
7417 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7418
7419 return sprintf(buf, "0x%04X\n",
7420 le32_to_cpu(priv->active_rxon.filter_flags));
7421 }
7422
7423 static ssize_t store_filter_flags(struct device *d,
7424 struct device_attribute *attr,
7425 const char *buf, size_t count)
7426 {
7427 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7428 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7429
7430 mutex_lock(&priv->mutex);
7431 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7432 /* Cancel any currently running scans... */
7433 if (iwl3945_scan_cancel_timeout(priv, 100))
7434 IWL_WARNING("Could not cancel scan.\n");
7435 else {
7436 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7437 "0x%04X\n", filter_flags);
7438 priv->staging_rxon.filter_flags =
7439 cpu_to_le32(filter_flags);
7440 iwl3945_commit_rxon(priv);
7441 }
7442 }
7443 mutex_unlock(&priv->mutex);
7444
7445 return count;
7446 }
7447
7448 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7449 store_filter_flags);
7450
7451 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7452
7453 static ssize_t show_measurement(struct device *d,
7454 struct device_attribute *attr, char *buf)
7455 {
7456 struct iwl3945_priv *priv = dev_get_drvdata(d);
7457 struct iwl3945_spectrum_notification measure_report;
7458 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7459 u8 *data = (u8 *) & measure_report;
7460 unsigned long flags;
7461
7462 spin_lock_irqsave(&priv->lock, flags);
7463 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7464 spin_unlock_irqrestore(&priv->lock, flags);
7465 return 0;
7466 }
7467 memcpy(&measure_report, &priv->measure_report, size);
7468 priv->measurement_status = 0;
7469 spin_unlock_irqrestore(&priv->lock, flags);
7470
7471 while (size && (PAGE_SIZE - len)) {
7472 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7473 PAGE_SIZE - len, 1);
7474 len = strlen(buf);
7475 if (PAGE_SIZE - len)
7476 buf[len++] = '\n';
7477
7478 ofs += 16;
7479 size -= min(size, 16U);
7480 }
7481
7482 return len;
7483 }
7484
7485 static ssize_t store_measurement(struct device *d,
7486 struct device_attribute *attr,
7487 const char *buf, size_t count)
7488 {
7489 struct iwl3945_priv *priv = dev_get_drvdata(d);
7490 struct ieee80211_measurement_params params = {
7491 .channel = le16_to_cpu(priv->active_rxon.channel),
7492 .start_time = cpu_to_le64(priv->last_tsf),
7493 .duration = cpu_to_le16(1),
7494 };
7495 u8 type = IWL_MEASURE_BASIC;
7496 u8 buffer[32];
7497 u8 channel;
7498
7499 if (count) {
7500 char *p = buffer;
7501 strncpy(buffer, buf, min(sizeof(buffer), count));
7502 channel = simple_strtoul(p, NULL, 0);
7503 if (channel)
7504 params.channel = channel;
7505
7506 p = buffer;
7507 while (*p && *p != ' ')
7508 p++;
7509 if (*p)
7510 type = simple_strtoul(p + 1, NULL, 0);
7511 }
7512
7513 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7514 "channel %d (for '%s')\n", type, params.channel, buf);
7515 iwl3945_get_measurement(priv, &params, type);
7516
7517 return count;
7518 }
7519
7520 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7521 show_measurement, store_measurement);
7522 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7523
7524 static ssize_t store_retry_rate(struct device *d,
7525 struct device_attribute *attr,
7526 const char *buf, size_t count)
7527 {
7528 struct iwl3945_priv *priv = dev_get_drvdata(d);
7529
7530 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7531 if (priv->retry_rate <= 0)
7532 priv->retry_rate = 1;
7533
7534 return count;
7535 }
7536
7537 static ssize_t show_retry_rate(struct device *d,
7538 struct device_attribute *attr, char *buf)
7539 {
7540 struct iwl3945_priv *priv = dev_get_drvdata(d);
7541 return sprintf(buf, "%d", priv->retry_rate);
7542 }
7543
7544 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7545 store_retry_rate);
7546
7547 static ssize_t store_power_level(struct device *d,
7548 struct device_attribute *attr,
7549 const char *buf, size_t count)
7550 {
7551 struct iwl3945_priv *priv = dev_get_drvdata(d);
7552 int rc;
7553 int mode;
7554
7555 mode = simple_strtoul(buf, NULL, 0);
7556 mutex_lock(&priv->mutex);
7557
7558 if (!iwl3945_is_ready(priv)) {
7559 rc = -EAGAIN;
7560 goto out;
7561 }
7562
7563 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7564 mode = IWL_POWER_AC;
7565 else
7566 mode |= IWL_POWER_ENABLED;
7567
7568 if (mode != priv->power_mode) {
7569 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7570 if (rc) {
7571 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7572 goto out;
7573 }
7574 priv->power_mode = mode;
7575 }
7576
7577 rc = count;
7578
7579 out:
7580 mutex_unlock(&priv->mutex);
7581 return rc;
7582 }
7583
7584 #define MAX_WX_STRING 80
7585
7586 /* Values are in microsecond */
7587 static const s32 timeout_duration[] = {
7588 350000,
7589 250000,
7590 75000,
7591 37000,
7592 25000,
7593 };
7594 static const s32 period_duration[] = {
7595 400000,
7596 700000,
7597 1000000,
7598 1000000,
7599 1000000
7600 };
7601
7602 static ssize_t show_power_level(struct device *d,
7603 struct device_attribute *attr, char *buf)
7604 {
7605 struct iwl3945_priv *priv = dev_get_drvdata(d);
7606 int level = IWL_POWER_LEVEL(priv->power_mode);
7607 char *p = buf;
7608
7609 p += sprintf(p, "%d ", level);
7610 switch (level) {
7611 case IWL_POWER_MODE_CAM:
7612 case IWL_POWER_AC:
7613 p += sprintf(p, "(AC)");
7614 break;
7615 case IWL_POWER_BATTERY:
7616 p += sprintf(p, "(BATTERY)");
7617 break;
7618 default:
7619 p += sprintf(p,
7620 "(Timeout %dms, Period %dms)",
7621 timeout_duration[level - 1] / 1000,
7622 period_duration[level - 1] / 1000);
7623 }
7624
7625 if (!(priv->power_mode & IWL_POWER_ENABLED))
7626 p += sprintf(p, " OFF\n");
7627 else
7628 p += sprintf(p, " \n");
7629
7630 return (p - buf + 1);
7631
7632 }
7633
7634 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7635 store_power_level);
7636
7637 static ssize_t show_channels(struct device *d,
7638 struct device_attribute *attr, char *buf)
7639 {
7640 /* all this shit doesn't belong into sysfs anyway */
7641 return 0;
7642 }
7643
7644 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7645
7646 static ssize_t show_statistics(struct device *d,
7647 struct device_attribute *attr, char *buf)
7648 {
7649 struct iwl3945_priv *priv = dev_get_drvdata(d);
7650 u32 size = sizeof(struct iwl3945_notif_statistics);
7651 u32 len = 0, ofs = 0;
7652 u8 *data = (u8 *) & priv->statistics;
7653 int rc = 0;
7654
7655 if (!iwl3945_is_alive(priv))
7656 return -EAGAIN;
7657
7658 mutex_lock(&priv->mutex);
7659 rc = iwl3945_send_statistics_request(priv);
7660 mutex_unlock(&priv->mutex);
7661
7662 if (rc) {
7663 len = sprintf(buf,
7664 "Error sending statistics request: 0x%08X\n", rc);
7665 return len;
7666 }
7667
7668 while (size && (PAGE_SIZE - len)) {
7669 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7670 PAGE_SIZE - len, 1);
7671 len = strlen(buf);
7672 if (PAGE_SIZE - len)
7673 buf[len++] = '\n';
7674
7675 ofs += 16;
7676 size -= min(size, 16U);
7677 }
7678
7679 return len;
7680 }
7681
7682 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7683
7684 static ssize_t show_antenna(struct device *d,
7685 struct device_attribute *attr, char *buf)
7686 {
7687 struct iwl3945_priv *priv = dev_get_drvdata(d);
7688
7689 if (!iwl3945_is_alive(priv))
7690 return -EAGAIN;
7691
7692 return sprintf(buf, "%d\n", priv->antenna);
7693 }
7694
7695 static ssize_t store_antenna(struct device *d,
7696 struct device_attribute *attr,
7697 const char *buf, size_t count)
7698 {
7699 int ant;
7700 struct iwl3945_priv *priv = dev_get_drvdata(d);
7701
7702 if (count == 0)
7703 return 0;
7704
7705 if (sscanf(buf, "%1i", &ant) != 1) {
7706 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7707 return count;
7708 }
7709
7710 if ((ant >= 0) && (ant <= 2)) {
7711 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7712 priv->antenna = (enum iwl3945_antenna)ant;
7713 } else
7714 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7715
7716
7717 return count;
7718 }
7719
7720 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7721
7722 static ssize_t show_status(struct device *d,
7723 struct device_attribute *attr, char *buf)
7724 {
7725 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7726 if (!iwl3945_is_alive(priv))
7727 return -EAGAIN;
7728 return sprintf(buf, "0x%08x\n", (int)priv->status);
7729 }
7730
7731 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7732
7733 static ssize_t dump_error_log(struct device *d,
7734 struct device_attribute *attr,
7735 const char *buf, size_t count)
7736 {
7737 char *p = (char *)buf;
7738
7739 if (p[0] == '1')
7740 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
7741
7742 return strnlen(buf, count);
7743 }
7744
7745 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7746
7747 static ssize_t dump_event_log(struct device *d,
7748 struct device_attribute *attr,
7749 const char *buf, size_t count)
7750 {
7751 char *p = (char *)buf;
7752
7753 if (p[0] == '1')
7754 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
7755
7756 return strnlen(buf, count);
7757 }
7758
7759 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7760
7761 /*****************************************************************************
7762 *
7763 * driver setup and teardown
7764 *
7765 *****************************************************************************/
7766
7767 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
7768 {
7769 priv->workqueue = create_workqueue(DRV_NAME);
7770
7771 init_waitqueue_head(&priv->wait_command_queue);
7772
7773 INIT_WORK(&priv->up, iwl3945_bg_up);
7774 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7775 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7776 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7777 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7778 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7779 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7780 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7781 INIT_WORK(&priv->set_monitor, iwl3945_bg_set_monitor);
7782 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
7783 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7784 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7785 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7786
7787 iwl3945_hw_setup_deferred_work(priv);
7788
7789 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7790 iwl3945_irq_tasklet, (unsigned long)priv);
7791 }
7792
7793 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
7794 {
7795 iwl3945_hw_cancel_deferred_work(priv);
7796
7797 cancel_delayed_work_sync(&priv->init_alive_start);
7798 cancel_delayed_work(&priv->scan_check);
7799 cancel_delayed_work(&priv->alive_start);
7800 cancel_delayed_work(&priv->post_associate);
7801 cancel_work_sync(&priv->beacon_update);
7802 }
7803
7804 static struct attribute *iwl3945_sysfs_entries[] = {
7805 &dev_attr_antenna.attr,
7806 &dev_attr_channels.attr,
7807 &dev_attr_dump_errors.attr,
7808 &dev_attr_dump_events.attr,
7809 &dev_attr_flags.attr,
7810 &dev_attr_filter_flags.attr,
7811 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7812 &dev_attr_measurement.attr,
7813 #endif
7814 &dev_attr_power_level.attr,
7815 &dev_attr_retry_rate.attr,
7816 &dev_attr_rs_window.attr,
7817 &dev_attr_statistics.attr,
7818 &dev_attr_status.attr,
7819 &dev_attr_temperature.attr,
7820 &dev_attr_tx_power.attr,
7821
7822 NULL
7823 };
7824
7825 static struct attribute_group iwl3945_attribute_group = {
7826 .name = NULL, /* put in device directory */
7827 .attrs = iwl3945_sysfs_entries,
7828 };
7829
7830 static struct ieee80211_ops iwl3945_hw_ops = {
7831 .tx = iwl3945_mac_tx,
7832 .start = iwl3945_mac_start,
7833 .stop = iwl3945_mac_stop,
7834 .add_interface = iwl3945_mac_add_interface,
7835 .remove_interface = iwl3945_mac_remove_interface,
7836 .config = iwl3945_mac_config,
7837 .config_interface = iwl3945_mac_config_interface,
7838 .configure_filter = iwl3945_configure_filter,
7839 .set_key = iwl3945_mac_set_key,
7840 .get_stats = iwl3945_mac_get_stats,
7841 .get_tx_stats = iwl3945_mac_get_tx_stats,
7842 .conf_tx = iwl3945_mac_conf_tx,
7843 .get_tsf = iwl3945_mac_get_tsf,
7844 .reset_tsf = iwl3945_mac_reset_tsf,
7845 .hw_scan = iwl3945_mac_hw_scan
7846 };
7847
7848 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7849 {
7850 int err = 0;
7851 struct iwl3945_priv *priv;
7852 struct ieee80211_hw *hw;
7853 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
7854 unsigned long flags;
7855 DECLARE_MAC_BUF(mac);
7856
7857 /* Disabling hardware scan means that mac80211 will perform scans
7858 * "the hard way", rather than using device's scan. */
7859 if (iwl3945_param_disable_hw_scan) {
7860 IWL_DEBUG_INFO("Disabling hw_scan\n");
7861 iwl3945_hw_ops.hw_scan = NULL;
7862 }
7863
7864 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7865 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7866 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7867 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7868 err = -EINVAL;
7869 goto out;
7870 }
7871
7872 /* mac80211 allocates memory for this device instance, including
7873 * space for this driver's private structure */
7874 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
7875 if (hw == NULL) {
7876 IWL_ERROR("Can not allocate network device\n");
7877 err = -ENOMEM;
7878 goto out;
7879 }
7880 SET_IEEE80211_DEV(hw, &pdev->dev);
7881
7882 hw->rate_control_algorithm = "iwl-3945-rs";
7883
7884 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7885 priv = hw->priv;
7886 priv->hw = hw;
7887
7888 priv->pci_dev = pdev;
7889 priv->cfg = cfg;
7890
7891 /* Select antenna (may be helpful if only one antenna is connected) */
7892 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7893 #ifdef CONFIG_IWL3945_DEBUG
7894 iwl3945_debug_level = iwl3945_param_debug;
7895 atomic_set(&priv->restrict_refcnt, 0);
7896 #endif
7897 priv->retry_rate = 1;
7898
7899 priv->ibss_beacon = NULL;
7900
7901 /* Tell mac80211 our characteristics */
7902 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7903 IEEE80211_HW_NOISE_DBM;
7904
7905 /* 4 EDCA QOS priorities */
7906 hw->queues = 4;
7907
7908 spin_lock_init(&priv->lock);
7909 spin_lock_init(&priv->power_data.lock);
7910 spin_lock_init(&priv->sta_lock);
7911 spin_lock_init(&priv->hcmd_lock);
7912
7913 INIT_LIST_HEAD(&priv->free_frames);
7914
7915 mutex_init(&priv->mutex);
7916 if (pci_enable_device(pdev)) {
7917 err = -ENODEV;
7918 goto out_ieee80211_free_hw;
7919 }
7920
7921 pci_set_master(pdev);
7922
7923 /* Clear the driver's (not device's) station table */
7924 iwl3945_clear_stations_table(priv);
7925
7926 priv->data_retry_limit = -1;
7927 priv->ieee_channels = NULL;
7928 priv->ieee_rates = NULL;
7929 priv->band = IEEE80211_BAND_2GHZ;
7930
7931 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7932 if (!err)
7933 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7934 if (err) {
7935 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
7936 goto out_pci_disable_device;
7937 }
7938
7939 pci_set_drvdata(pdev, priv);
7940 err = pci_request_regions(pdev, DRV_NAME);
7941 if (err)
7942 goto out_pci_disable_device;
7943
7944 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7945 * PCI Tx retries from interfering with C3 CPU state */
7946 pci_write_config_byte(pdev, 0x41, 0x00);
7947
7948 priv->hw_base = pci_iomap(pdev, 0, 0);
7949 if (!priv->hw_base) {
7950 err = -ENODEV;
7951 goto out_pci_release_regions;
7952 }
7953
7954 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7955 (unsigned long long) pci_resource_len(pdev, 0));
7956 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7957
7958 /* Initialize module parameter values here */
7959
7960 /* Disable radio (SW RF KILL) via parameter when loading driver */
7961 if (iwl3945_param_disable) {
7962 set_bit(STATUS_RF_KILL_SW, &priv->status);
7963 IWL_DEBUG_INFO("Radio disabled.\n");
7964 }
7965
7966 priv->iw_mode = IEEE80211_IF_TYPE_STA;
7967
7968 printk(KERN_INFO DRV_NAME
7969 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
7970
7971 /* Device-specific setup */
7972 if (iwl3945_hw_set_hw_setting(priv)) {
7973 IWL_ERROR("failed to set hw settings\n");
7974 goto out_iounmap;
7975 }
7976
7977 if (iwl3945_param_qos_enable)
7978 priv->qos_data.qos_enable = 1;
7979
7980 iwl3945_reset_qos(priv);
7981
7982 priv->qos_data.qos_active = 0;
7983 priv->qos_data.qos_cap.val = 0;
7984
7985 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7986 iwl3945_setup_deferred_work(priv);
7987 iwl3945_setup_rx_handlers(priv);
7988
7989 priv->rates_mask = IWL_RATES_MASK;
7990 /* If power management is turned on, default to AC mode */
7991 priv->power_mode = IWL_POWER_AC;
7992 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7993
7994 spin_lock_irqsave(&priv->lock, flags);
7995 iwl3945_disable_interrupts(priv);
7996 spin_unlock_irqrestore(&priv->lock, flags);
7997
7998 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7999 if (err) {
8000 IWL_ERROR("failed to create sysfs device attributes\n");
8001 goto out_release_irq;
8002 }
8003
8004 /* nic init */
8005 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8006 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8007
8008 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8009 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8010 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8011 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8012 if (err < 0) {
8013 IWL_DEBUG_INFO("Failed to init the card\n");
8014 goto out_remove_sysfs;
8015 }
8016 /* Read the EEPROM */
8017 err = iwl3945_eeprom_init(priv);
8018 if (err) {
8019 IWL_ERROR("Unable to init EEPROM\n");
8020 goto out_remove_sysfs;
8021 }
8022 /* MAC Address location in EEPROM same for 3945/4965 */
8023 get_eeprom_mac(priv, priv->mac_addr);
8024 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8025 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8026
8027 err = iwl3945_init_channel_map(priv);
8028 if (err) {
8029 IWL_ERROR("initializing regulatory failed: %d\n", err);
8030 goto out_remove_sysfs;
8031 }
8032
8033 err = iwl3945_init_geos(priv);
8034 if (err) {
8035 IWL_ERROR("initializing geos failed: %d\n", err);
8036 goto out_free_channel_map;
8037 }
8038
8039 err = ieee80211_register_hw(priv->hw);
8040 if (err) {
8041 IWL_ERROR("Failed to register network device (error %d)\n", err);
8042 goto out_free_geos;
8043 }
8044
8045 priv->hw->conf.beacon_int = 100;
8046 priv->mac80211_registered = 1;
8047 pci_save_state(pdev);
8048 pci_disable_device(pdev);
8049
8050 err = iwl3945_rfkill_init(priv);
8051 if (err)
8052 IWL_ERROR("Unable to initialize RFKILL system. "
8053 "Ignoring error: %d\n", err);
8054
8055 return 0;
8056
8057 out_free_geos:
8058 iwl3945_free_geos(priv);
8059 out_free_channel_map:
8060 iwl3945_free_channel_map(priv);
8061 out_remove_sysfs:
8062 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8063
8064 out_release_irq:
8065 destroy_workqueue(priv->workqueue);
8066 priv->workqueue = NULL;
8067 iwl3945_unset_hw_setting(priv);
8068
8069 out_iounmap:
8070 pci_iounmap(pdev, priv->hw_base);
8071 out_pci_release_regions:
8072 pci_release_regions(pdev);
8073 out_pci_disable_device:
8074 pci_disable_device(pdev);
8075 pci_set_drvdata(pdev, NULL);
8076 out_ieee80211_free_hw:
8077 ieee80211_free_hw(priv->hw);
8078 out:
8079 return err;
8080 }
8081
8082 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
8083 {
8084 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8085 unsigned long flags;
8086
8087 if (!priv)
8088 return;
8089
8090 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8091
8092 set_bit(STATUS_EXIT_PENDING, &priv->status);
8093
8094 iwl3945_down(priv);
8095
8096 /* make sure we flush any pending irq or
8097 * tasklet for the driver
8098 */
8099 spin_lock_irqsave(&priv->lock, flags);
8100 iwl3945_disable_interrupts(priv);
8101 spin_unlock_irqrestore(&priv->lock, flags);
8102
8103 iwl_synchronize_irq(priv);
8104
8105 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8106
8107 iwl3945_rfkill_unregister(priv);
8108 iwl3945_dealloc_ucode_pci(priv);
8109
8110 if (priv->rxq.bd)
8111 iwl3945_rx_queue_free(priv, &priv->rxq);
8112 iwl3945_hw_txq_ctx_free(priv);
8113
8114 iwl3945_unset_hw_setting(priv);
8115 iwl3945_clear_stations_table(priv);
8116
8117 if (priv->mac80211_registered) {
8118 ieee80211_unregister_hw(priv->hw);
8119 }
8120
8121 /*netif_stop_queue(dev); */
8122 flush_workqueue(priv->workqueue);
8123
8124 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8125 * priv->workqueue... so we can't take down the workqueue
8126 * until now... */
8127 destroy_workqueue(priv->workqueue);
8128 priv->workqueue = NULL;
8129
8130 pci_iounmap(pdev, priv->hw_base);
8131 pci_release_regions(pdev);
8132 pci_disable_device(pdev);
8133 pci_set_drvdata(pdev, NULL);
8134
8135 iwl3945_free_channel_map(priv);
8136 iwl3945_free_geos(priv);
8137 kfree(priv->scan);
8138 if (priv->ibss_beacon)
8139 dev_kfree_skb(priv->ibss_beacon);
8140
8141 ieee80211_free_hw(priv->hw);
8142 }
8143
8144 #ifdef CONFIG_PM
8145
8146 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8147 {
8148 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8149
8150 if (priv->is_open) {
8151 set_bit(STATUS_IN_SUSPEND, &priv->status);
8152 iwl3945_mac_stop(priv->hw);
8153 priv->is_open = 1;
8154 }
8155
8156 pci_set_power_state(pdev, PCI_D3hot);
8157
8158 return 0;
8159 }
8160
8161 static int iwl3945_pci_resume(struct pci_dev *pdev)
8162 {
8163 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8164
8165 pci_set_power_state(pdev, PCI_D0);
8166
8167 if (priv->is_open)
8168 iwl3945_mac_start(priv->hw);
8169
8170 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8171 return 0;
8172 }
8173
8174 #endif /* CONFIG_PM */
8175
8176 /*************** RFKILL FUNCTIONS **********/
8177 #ifdef CONFIG_IWL3945_RFKILL
8178 /* software rf-kill from user */
8179 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8180 {
8181 struct iwl3945_priv *priv = data;
8182 int err = 0;
8183
8184 if (!priv->rfkill)
8185 return 0;
8186
8187 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8188 return 0;
8189
8190 IWL_DEBUG_RF_KILL("we recieved soft RFKILL set to state %d\n", state);
8191 mutex_lock(&priv->mutex);
8192
8193 switch (state) {
8194 case RFKILL_STATE_UNBLOCKED:
8195 if (iwl3945_is_rfkill_hw(priv)) {
8196 err = -EBUSY;
8197 goto out_unlock;
8198 }
8199 iwl3945_radio_kill_sw(priv, 0);
8200 break;
8201 case RFKILL_STATE_SOFT_BLOCKED:
8202 iwl3945_radio_kill_sw(priv, 1);
8203 break;
8204 default:
8205 IWL_WARNING("we recieved unexpected RFKILL state %d\n", state);
8206 break;
8207 }
8208 out_unlock:
8209 mutex_unlock(&priv->mutex);
8210
8211 return err;
8212 }
8213
8214 int iwl3945_rfkill_init(struct iwl3945_priv *priv)
8215 {
8216 struct device *device = wiphy_dev(priv->hw->wiphy);
8217 int ret = 0;
8218
8219 BUG_ON(device == NULL);
8220
8221 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8222 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8223 if (!priv->rfkill) {
8224 IWL_ERROR("Unable to allocate rfkill device.\n");
8225 ret = -ENOMEM;
8226 goto error;
8227 }
8228
8229 priv->rfkill->name = priv->cfg->name;
8230 priv->rfkill->data = priv;
8231 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8232 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8233 priv->rfkill->user_claim_unsupported = 1;
8234
8235 priv->rfkill->dev.class->suspend = NULL;
8236 priv->rfkill->dev.class->resume = NULL;
8237
8238 ret = rfkill_register(priv->rfkill);
8239 if (ret) {
8240 IWL_ERROR("Unable to register rfkill: %d\n", ret);
8241 goto freed_rfkill;
8242 }
8243
8244 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8245 return ret;
8246
8247 freed_rfkill:
8248 if (priv->rfkill != NULL)
8249 rfkill_free(priv->rfkill);
8250 priv->rfkill = NULL;
8251
8252 error:
8253 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8254 return ret;
8255 }
8256
8257 void iwl3945_rfkill_unregister(struct iwl3945_priv *priv)
8258 {
8259 if (priv->rfkill)
8260 rfkill_unregister(priv->rfkill);
8261
8262 priv->rfkill = NULL;
8263 }
8264
8265 /* set rf-kill to the right state. */
8266 void iwl3945_rfkill_set_hw_state(struct iwl3945_priv *priv)
8267 {
8268
8269 if (!priv->rfkill)
8270 return;
8271
8272 if (iwl3945_is_rfkill_hw(priv)) {
8273 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8274 return;
8275 }
8276
8277 if (!iwl3945_is_rfkill_sw(priv))
8278 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8279 else
8280 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8281 }
8282 #endif
8283
8284 /*****************************************************************************
8285 *
8286 * driver and module entry point
8287 *
8288 *****************************************************************************/
8289
8290 static struct pci_driver iwl3945_driver = {
8291 .name = DRV_NAME,
8292 .id_table = iwl3945_hw_card_ids,
8293 .probe = iwl3945_pci_probe,
8294 .remove = __devexit_p(iwl3945_pci_remove),
8295 #ifdef CONFIG_PM
8296 .suspend = iwl3945_pci_suspend,
8297 .resume = iwl3945_pci_resume,
8298 #endif
8299 };
8300
8301 static int __init iwl3945_init(void)
8302 {
8303
8304 int ret;
8305 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8306 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8307
8308 ret = iwl3945_rate_control_register();
8309 if (ret) {
8310 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
8311 return ret;
8312 }
8313
8314 ret = pci_register_driver(&iwl3945_driver);
8315 if (ret) {
8316 IWL_ERROR("Unable to initialize PCI module\n");
8317 goto error_register;
8318 }
8319 #ifdef CONFIG_IWL3945_DEBUG
8320 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8321 if (ret) {
8322 IWL_ERROR("Unable to create driver sysfs file\n");
8323 goto error_debug;
8324 }
8325 #endif
8326
8327 return ret;
8328
8329 #ifdef CONFIG_IWL3945_DEBUG
8330 error_debug:
8331 pci_unregister_driver(&iwl3945_driver);
8332 #endif
8333 error_register:
8334 iwl3945_rate_control_unregister();
8335 return ret;
8336 }
8337
8338 static void __exit iwl3945_exit(void)
8339 {
8340 #ifdef CONFIG_IWL3945_DEBUG
8341 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8342 #endif
8343 pci_unregister_driver(&iwl3945_driver);
8344 iwl3945_rate_control_unregister();
8345 }
8346
8347 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8348 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8349 module_param_named(disable, iwl3945_param_disable, int, 0444);
8350 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8351 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8352 MODULE_PARM_DESC(hwcrypto,
8353 "using hardware crypto engine (default 0 [software])\n");
8354 module_param_named(debug, iwl3945_param_debug, int, 0444);
8355 MODULE_PARM_DESC(debug, "debug output mask");
8356 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8357 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8358
8359 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8360 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8361
8362 /* QoS */
8363 module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8364 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8365
8366 module_exit(iwl3945_exit);
8367 module_init(iwl3945_init);
Linux kernel - Deliverables
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