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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #include "iwl-3945-core.h"
49 #include "iwl-3945.h"
50 #include "iwl-helpers.h"
51
52 #ifdef CONFIG_IWL3945_DEBUG
53 u32 iwl3945_debug_level;
54 #endif
55
56 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
57 struct iwl3945_tx_queue *txq);
58
59 /******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65 /* module parameters */
66 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
67 static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
68 static int iwl3945_param_disable; /* def: 0 = enable radio */
69 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
70 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
71 static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
72 int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
73
74 /*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79 #define DRV_DESCRIPTION \
80 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
82 #ifdef CONFIG_IWL3945_DEBUG
83 #define VD "d"
84 #else
85 #define VD
86 #endif
87
88 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
89 #define VS "s"
90 #else
91 #define VS
92 #endif
93
94 #define IWLWIFI_VERSION "1.2.26k" VD VS
95 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
96 #define DRV_VERSION IWLWIFI_VERSION
97
98
99 MODULE_DESCRIPTION(DRV_DESCRIPTION);
100 MODULE_VERSION(DRV_VERSION);
101 MODULE_AUTHOR(DRV_COPYRIGHT);
102 MODULE_LICENSE("GPL");
103
104 static const struct ieee80211_supported_band *iwl3945_get_band(
105 struct iwl3945_priv *priv, enum ieee80211_band band)
106 {
107 return priv->hw->wiphy->bands[band];
108 }
109
110 static int iwl3945_is_empty_essid(const char *essid, int essid_len)
111 {
112 /* Single white space is for Linksys APs */
113 if (essid_len == 1 && essid[0] == ' ')
114 return 1;
115
116 /* Otherwise, if the entire essid is 0, we assume it is hidden */
117 while (essid_len) {
118 essid_len--;
119 if (essid[essid_len] != '\0')
120 return 0;
121 }
122
123 return 1;
124 }
125
126 static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
127 {
128 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
129 const char *s = essid;
130 char *d = escaped;
131
132 if (iwl3945_is_empty_essid(essid, essid_len)) {
133 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
134 return escaped;
135 }
136
137 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
138 while (essid_len--) {
139 if (*s == '\0') {
140 *d++ = '\\';
141 *d++ = '0';
142 s++;
143 } else
144 *d++ = *s++;
145 }
146 *d = '\0';
147 return escaped;
148 }
149
150 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
151 * DMA services
152 *
153 * Theory of operation
154 *
155 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
156 * of buffer descriptors, each of which points to one or more data buffers for
157 * the device to read from or fill. Driver and device exchange status of each
158 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
159 * entries in each circular buffer, to protect against confusing empty and full
160 * queue states.
161 *
162 * The device reads or writes the data in the queues via the device's several
163 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
164 *
165 * For Tx queue, there are low mark and high mark limits. If, after queuing
166 * the packet for Tx, free space become < low mark, Tx queue stopped. When
167 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
168 * Tx queue resumed.
169 *
170 * The 3945 operates with six queues: One receive queue, one transmit queue
171 * (#4) for sending commands to the device firmware, and four transmit queues
172 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
173 ***************************************************/
174
175 int iwl3945_queue_space(const struct iwl3945_queue *q)
176 {
177 int s = q->read_ptr - q->write_ptr;
178
179 if (q->read_ptr > q->write_ptr)
180 s -= q->n_bd;
181
182 if (s <= 0)
183 s += q->n_window;
184 /* keep some reserve to not confuse empty and full situations */
185 s -= 2;
186 if (s < 0)
187 s = 0;
188 return s;
189 }
190
191 int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
192 {
193 return q->write_ptr > q->read_ptr ?
194 (i >= q->read_ptr && i < q->write_ptr) :
195 !(i < q->read_ptr && i >= q->write_ptr);
196 }
197
198
199 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
200 {
201 /* This is for scan command, the big buffer at end of command array */
202 if (is_huge)
203 return q->n_window; /* must be power of 2 */
204
205 /* Otherwise, use normal size buffers */
206 return index & (q->n_window - 1);
207 }
208
209 /**
210 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
211 */
212 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
213 int count, int slots_num, u32 id)
214 {
215 q->n_bd = count;
216 q->n_window = slots_num;
217 q->id = id;
218
219 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
220 * and iwl_queue_dec_wrap are broken. */
221 BUG_ON(!is_power_of_2(count));
222
223 /* slots_num must be power-of-two size, otherwise
224 * get_cmd_index is broken. */
225 BUG_ON(!is_power_of_2(slots_num));
226
227 q->low_mark = q->n_window / 4;
228 if (q->low_mark < 4)
229 q->low_mark = 4;
230
231 q->high_mark = q->n_window / 8;
232 if (q->high_mark < 2)
233 q->high_mark = 2;
234
235 q->write_ptr = q->read_ptr = 0;
236
237 return 0;
238 }
239
240 /**
241 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
242 */
243 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
244 struct iwl3945_tx_queue *txq, u32 id)
245 {
246 struct pci_dev *dev = priv->pci_dev;
247
248 /* Driver private data, only for Tx (not command) queues,
249 * not shared with device. */
250 if (id != IWL_CMD_QUEUE_NUM) {
251 txq->txb = kmalloc(sizeof(txq->txb[0]) *
252 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
253 if (!txq->txb) {
254 IWL_ERROR("kmalloc for auxiliary BD "
255 "structures failed\n");
256 goto error;
257 }
258 } else
259 txq->txb = NULL;
260
261 /* Circular buffer of transmit frame descriptors (TFDs),
262 * shared with device */
263 txq->bd = pci_alloc_consistent(dev,
264 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
265 &txq->q.dma_addr);
266
267 if (!txq->bd) {
268 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
269 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
270 goto error;
271 }
272 txq->q.id = id;
273
274 return 0;
275
276 error:
277 kfree(txq->txb);
278 txq->txb = NULL;
279
280 return -ENOMEM;
281 }
282
283 /**
284 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
285 */
286 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
287 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
288 {
289 struct pci_dev *dev = priv->pci_dev;
290 int len;
291 int rc = 0;
292
293 /*
294 * Alloc buffer array for commands (Tx or other types of commands).
295 * For the command queue (#4), allocate command space + one big
296 * command for scan, since scan command is very huge; the system will
297 * not have two scans at the same time, so only one is needed.
298 * For data Tx queues (all other queues), no super-size command
299 * space is needed.
300 */
301 len = sizeof(struct iwl3945_cmd) * slots_num;
302 if (txq_id == IWL_CMD_QUEUE_NUM)
303 len += IWL_MAX_SCAN_SIZE;
304 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
305 if (!txq->cmd)
306 return -ENOMEM;
307
308 /* Alloc driver data array and TFD circular buffer */
309 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
310 if (rc) {
311 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
312
313 return -ENOMEM;
314 }
315 txq->need_update = 0;
316
317 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
318 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
319 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
320
321 /* Initialize queue high/low-water, head/tail indexes */
322 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
323
324 /* Tell device where to find queue, enable DMA channel. */
325 iwl3945_hw_tx_queue_init(priv, txq);
326
327 return 0;
328 }
329
330 /**
331 * iwl3945_tx_queue_free - Deallocate DMA queue.
332 * @txq: Transmit queue to deallocate.
333 *
334 * Empty queue by removing and destroying all BD's.
335 * Free all buffers.
336 * 0-fill, but do not free "txq" descriptor structure.
337 */
338 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
339 {
340 struct iwl3945_queue *q = &txq->q;
341 struct pci_dev *dev = priv->pci_dev;
342 int len;
343
344 if (q->n_bd == 0)
345 return;
346
347 /* first, empty all BD's */
348 for (; q->write_ptr != q->read_ptr;
349 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
350 iwl3945_hw_txq_free_tfd(priv, txq);
351
352 len = sizeof(struct iwl3945_cmd) * q->n_window;
353 if (q->id == IWL_CMD_QUEUE_NUM)
354 len += IWL_MAX_SCAN_SIZE;
355
356 /* De-alloc array of command/tx buffers */
357 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
358
359 /* De-alloc circular buffer of TFDs */
360 if (txq->q.n_bd)
361 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
362 txq->q.n_bd, txq->bd, txq->q.dma_addr);
363
364 /* De-alloc array of per-TFD driver data */
365 kfree(txq->txb);
366 txq->txb = NULL;
367
368 /* 0-fill queue descriptor structure */
369 memset(txq, 0, sizeof(*txq));
370 }
371
372 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
373
374 /*************** STATION TABLE MANAGEMENT ****
375 * mac80211 should be examined to determine if sta_info is duplicating
376 * the functionality provided here
377 */
378
379 /**************************************************************/
380 #if 0 /* temporary disable till we add real remove station */
381 /**
382 * iwl3945_remove_station - Remove driver's knowledge of station.
383 *
384 * NOTE: This does not remove station from device's station table.
385 */
386 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
387 {
388 int index = IWL_INVALID_STATION;
389 int i;
390 unsigned long flags;
391
392 spin_lock_irqsave(&priv->sta_lock, flags);
393
394 if (is_ap)
395 index = IWL_AP_ID;
396 else if (is_broadcast_ether_addr(addr))
397 index = priv->hw_setting.bcast_sta_id;
398 else
399 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
400 if (priv->stations[i].used &&
401 !compare_ether_addr(priv->stations[i].sta.sta.addr,
402 addr)) {
403 index = i;
404 break;
405 }
406
407 if (unlikely(index == IWL_INVALID_STATION))
408 goto out;
409
410 if (priv->stations[index].used) {
411 priv->stations[index].used = 0;
412 priv->num_stations--;
413 }
414
415 BUG_ON(priv->num_stations < 0);
416
417 out:
418 spin_unlock_irqrestore(&priv->sta_lock, flags);
419 return 0;
420 }
421 #endif
422
423 /**
424 * iwl3945_clear_stations_table - Clear the driver's station table
425 *
426 * NOTE: This does not clear or otherwise alter the device's station table.
427 */
428 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
429 {
430 unsigned long flags;
431
432 spin_lock_irqsave(&priv->sta_lock, flags);
433
434 priv->num_stations = 0;
435 memset(priv->stations, 0, sizeof(priv->stations));
436
437 spin_unlock_irqrestore(&priv->sta_lock, flags);
438 }
439
440 /**
441 * iwl3945_add_station - Add station to station tables in driver and device
442 */
443 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
444 {
445 int i;
446 int index = IWL_INVALID_STATION;
447 struct iwl3945_station_entry *station;
448 unsigned long flags_spin;
449 DECLARE_MAC_BUF(mac);
450 u8 rate;
451
452 spin_lock_irqsave(&priv->sta_lock, flags_spin);
453 if (is_ap)
454 index = IWL_AP_ID;
455 else if (is_broadcast_ether_addr(addr))
456 index = priv->hw_setting.bcast_sta_id;
457 else
458 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
459 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
460 addr)) {
461 index = i;
462 break;
463 }
464
465 if (!priv->stations[i].used &&
466 index == IWL_INVALID_STATION)
467 index = i;
468 }
469
470 /* These two conditions has the same outcome but keep them separate
471 since they have different meaning */
472 if (unlikely(index == IWL_INVALID_STATION)) {
473 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
474 return index;
475 }
476
477 if (priv->stations[index].used &&
478 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
479 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
480 return index;
481 }
482
483 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
484 station = &priv->stations[index];
485 station->used = 1;
486 priv->num_stations++;
487
488 /* Set up the REPLY_ADD_STA command to send to device */
489 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
490 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
491 station->sta.mode = 0;
492 station->sta.sta.sta_id = index;
493 station->sta.station_flags = 0;
494
495 if (priv->band == IEEE80211_BAND_5GHZ)
496 rate = IWL_RATE_6M_PLCP;
497 else
498 rate = IWL_RATE_1M_PLCP;
499
500 /* Turn on both antennas for the station... */
501 station->sta.rate_n_flags =
502 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
503 station->current_rate.rate_n_flags =
504 le16_to_cpu(station->sta.rate_n_flags);
505
506 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
507
508 /* Add station to device's station table */
509 iwl3945_send_add_station(priv, &station->sta, flags);
510 return index;
511
512 }
513
514 /*************** DRIVER STATUS FUNCTIONS *****/
515
516 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
517 {
518 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
519 * set but EXIT_PENDING is not */
520 return test_bit(STATUS_READY, &priv->status) &&
521 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
522 !test_bit(STATUS_EXIT_PENDING, &priv->status);
523 }
524
525 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
526 {
527 return test_bit(STATUS_ALIVE, &priv->status);
528 }
529
530 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
531 {
532 return test_bit(STATUS_INIT, &priv->status);
533 }
534
535 static inline int iwl3945_is_rfkill_sw(struct iwl3945_priv *priv)
536 {
537 return test_bit(STATUS_RF_KILL_SW, &priv->status);
538 }
539
540 static inline int iwl3945_is_rfkill_hw(struct iwl3945_priv *priv)
541 {
542 return test_bit(STATUS_RF_KILL_HW, &priv->status);
543 }
544
545 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
546 {
547 return iwl3945_is_rfkill_hw(priv) ||
548 iwl3945_is_rfkill_sw(priv);
549 }
550
551 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
552 {
553
554 if (iwl3945_is_rfkill(priv))
555 return 0;
556
557 return iwl3945_is_ready(priv);
558 }
559
560 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
561
562 #define IWL_CMD(x) case x : return #x
563
564 static const char *get_cmd_string(u8 cmd)
565 {
566 switch (cmd) {
567 IWL_CMD(REPLY_ALIVE);
568 IWL_CMD(REPLY_ERROR);
569 IWL_CMD(REPLY_RXON);
570 IWL_CMD(REPLY_RXON_ASSOC);
571 IWL_CMD(REPLY_QOS_PARAM);
572 IWL_CMD(REPLY_RXON_TIMING);
573 IWL_CMD(REPLY_ADD_STA);
574 IWL_CMD(REPLY_REMOVE_STA);
575 IWL_CMD(REPLY_REMOVE_ALL_STA);
576 IWL_CMD(REPLY_3945_RX);
577 IWL_CMD(REPLY_TX);
578 IWL_CMD(REPLY_RATE_SCALE);
579 IWL_CMD(REPLY_LEDS_CMD);
580 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
581 IWL_CMD(RADAR_NOTIFICATION);
582 IWL_CMD(REPLY_QUIET_CMD);
583 IWL_CMD(REPLY_CHANNEL_SWITCH);
584 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
585 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
586 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
587 IWL_CMD(POWER_TABLE_CMD);
588 IWL_CMD(PM_SLEEP_NOTIFICATION);
589 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
590 IWL_CMD(REPLY_SCAN_CMD);
591 IWL_CMD(REPLY_SCAN_ABORT_CMD);
592 IWL_CMD(SCAN_START_NOTIFICATION);
593 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
594 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
595 IWL_CMD(BEACON_NOTIFICATION);
596 IWL_CMD(REPLY_TX_BEACON);
597 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
598 IWL_CMD(QUIET_NOTIFICATION);
599 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
600 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
601 IWL_CMD(REPLY_BT_CONFIG);
602 IWL_CMD(REPLY_STATISTICS_CMD);
603 IWL_CMD(STATISTICS_NOTIFICATION);
604 IWL_CMD(REPLY_CARD_STATE_CMD);
605 IWL_CMD(CARD_STATE_NOTIFICATION);
606 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
607 default:
608 return "UNKNOWN";
609
610 }
611 }
612
613 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
614
615 /**
616 * iwl3945_enqueue_hcmd - enqueue a uCode command
617 * @priv: device private data point
618 * @cmd: a point to the ucode command structure
619 *
620 * The function returns < 0 values to indicate the operation is
621 * failed. On success, it turns the index (> 0) of command in the
622 * command queue.
623 */
624 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
625 {
626 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
627 struct iwl3945_queue *q = &txq->q;
628 struct iwl3945_tfd_frame *tfd;
629 u32 *control_flags;
630 struct iwl3945_cmd *out_cmd;
631 u32 idx;
632 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
633 dma_addr_t phys_addr;
634 int pad;
635 u16 count;
636 int ret;
637 unsigned long flags;
638
639 /* If any of the command structures end up being larger than
640 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
641 * we will need to increase the size of the TFD entries */
642 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
643 !(cmd->meta.flags & CMD_SIZE_HUGE));
644
645
646 if (iwl3945_is_rfkill(priv)) {
647 IWL_DEBUG_INFO("Not sending command - RF KILL");
648 return -EIO;
649 }
650
651 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
652 IWL_ERROR("No space for Tx\n");
653 return -ENOSPC;
654 }
655
656 spin_lock_irqsave(&priv->hcmd_lock, flags);
657
658 tfd = &txq->bd[q->write_ptr];
659 memset(tfd, 0, sizeof(*tfd));
660
661 control_flags = (u32 *) tfd;
662
663 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
664 out_cmd = &txq->cmd[idx];
665
666 out_cmd->hdr.cmd = cmd->id;
667 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
668 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
669
670 /* At this point, the out_cmd now has all of the incoming cmd
671 * information */
672
673 out_cmd->hdr.flags = 0;
674 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
675 INDEX_TO_SEQ(q->write_ptr));
676 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
677 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
678
679 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
680 offsetof(struct iwl3945_cmd, hdr);
681 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
682
683 pad = U32_PAD(cmd->len);
684 count = TFD_CTL_COUNT_GET(*control_flags);
685 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
686
687 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
688 "%d bytes at %d[%d]:%d\n",
689 get_cmd_string(out_cmd->hdr.cmd),
690 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
691 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
692
693 txq->need_update = 1;
694
695 /* Increment and update queue's write index */
696 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
697 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
698
699 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
700 return ret ? ret : idx;
701 }
702
703 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
704 {
705 int ret;
706
707 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
708
709 /* An asynchronous command can not expect an SKB to be set. */
710 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
711
712 /* An asynchronous command MUST have a callback. */
713 BUG_ON(!cmd->meta.u.callback);
714
715 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
716 return -EBUSY;
717
718 ret = iwl3945_enqueue_hcmd(priv, cmd);
719 if (ret < 0) {
720 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
721 get_cmd_string(cmd->id), ret);
722 return ret;
723 }
724 return 0;
725 }
726
727 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
728 {
729 int cmd_idx;
730 int ret;
731
732 BUG_ON(cmd->meta.flags & CMD_ASYNC);
733
734 /* A synchronous command can not have a callback set. */
735 BUG_ON(cmd->meta.u.callback != NULL);
736
737 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
738 IWL_ERROR("Error sending %s: Already sending a host command\n",
739 get_cmd_string(cmd->id));
740 ret = -EBUSY;
741 goto out;
742 }
743
744 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
745
746 if (cmd->meta.flags & CMD_WANT_SKB)
747 cmd->meta.source = &cmd->meta;
748
749 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
750 if (cmd_idx < 0) {
751 ret = cmd_idx;
752 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
753 get_cmd_string(cmd->id), ret);
754 goto out;
755 }
756
757 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
758 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
759 HOST_COMPLETE_TIMEOUT);
760 if (!ret) {
761 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
762 IWL_ERROR("Error sending %s: time out after %dms.\n",
763 get_cmd_string(cmd->id),
764 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
765
766 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
767 ret = -ETIMEDOUT;
768 goto cancel;
769 }
770 }
771
772 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
773 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
774 get_cmd_string(cmd->id));
775 ret = -ECANCELED;
776 goto fail;
777 }
778 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
779 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
780 get_cmd_string(cmd->id));
781 ret = -EIO;
782 goto fail;
783 }
784 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
785 IWL_ERROR("Error: Response NULL in '%s'\n",
786 get_cmd_string(cmd->id));
787 ret = -EIO;
788 goto out;
789 }
790
791 ret = 0;
792 goto out;
793
794 cancel:
795 if (cmd->meta.flags & CMD_WANT_SKB) {
796 struct iwl3945_cmd *qcmd;
797
798 /* Cancel the CMD_WANT_SKB flag for the cmd in the
799 * TX cmd queue. Otherwise in case the cmd comes
800 * in later, it will possibly set an invalid
801 * address (cmd->meta.source). */
802 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
803 qcmd->meta.flags &= ~CMD_WANT_SKB;
804 }
805 fail:
806 if (cmd->meta.u.skb) {
807 dev_kfree_skb_any(cmd->meta.u.skb);
808 cmd->meta.u.skb = NULL;
809 }
810 out:
811 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
812 return ret;
813 }
814
815 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
816 {
817 if (cmd->meta.flags & CMD_ASYNC)
818 return iwl3945_send_cmd_async(priv, cmd);
819
820 return iwl3945_send_cmd_sync(priv, cmd);
821 }
822
823 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
824 {
825 struct iwl3945_host_cmd cmd = {
826 .id = id,
827 .len = len,
828 .data = data,
829 };
830
831 return iwl3945_send_cmd_sync(priv, &cmd);
832 }
833
834 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
835 {
836 struct iwl3945_host_cmd cmd = {
837 .id = id,
838 .len = sizeof(val),
839 .data = &val,
840 };
841
842 return iwl3945_send_cmd_sync(priv, &cmd);
843 }
844
845 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
846 {
847 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
848 }
849
850 /**
851 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
852 * @band: 2.4 or 5 GHz band
853 * @channel: Any channel valid for the requested band
854
855 * In addition to setting the staging RXON, priv->band is also set.
856 *
857 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
858 * in the staging RXON flag structure based on the band
859 */
860 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
861 enum ieee80211_band band,
862 u16 channel)
863 {
864 if (!iwl3945_get_channel_info(priv, band, channel)) {
865 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
866 channel, band);
867 return -EINVAL;
868 }
869
870 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
871 (priv->band == band))
872 return 0;
873
874 priv->staging_rxon.channel = cpu_to_le16(channel);
875 if (band == IEEE80211_BAND_5GHZ)
876 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
877 else
878 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
879
880 priv->band = band;
881
882 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
883
884 return 0;
885 }
886
887 /**
888 * iwl3945_check_rxon_cmd - validate RXON structure is valid
889 *
890 * NOTE: This is really only useful during development and can eventually
891 * be #ifdef'd out once the driver is stable and folks aren't actively
892 * making changes
893 */
894 static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
895 {
896 int error = 0;
897 int counter = 1;
898
899 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
900 error |= le32_to_cpu(rxon->flags &
901 (RXON_FLG_TGJ_NARROW_BAND_MSK |
902 RXON_FLG_RADAR_DETECT_MSK));
903 if (error)
904 IWL_WARNING("check 24G fields %d | %d\n",
905 counter++, error);
906 } else {
907 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
908 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
909 if (error)
910 IWL_WARNING("check 52 fields %d | %d\n",
911 counter++, error);
912 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
913 if (error)
914 IWL_WARNING("check 52 CCK %d | %d\n",
915 counter++, error);
916 }
917 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
918 if (error)
919 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
920
921 /* make sure basic rates 6Mbps and 1Mbps are supported */
922 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
923 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
924 if (error)
925 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
926
927 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
928 if (error)
929 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
930
931 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
932 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
933 if (error)
934 IWL_WARNING("check CCK and short slot %d | %d\n",
935 counter++, error);
936
937 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
938 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
939 if (error)
940 IWL_WARNING("check CCK & auto detect %d | %d\n",
941 counter++, error);
942
943 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
944 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
945 if (error)
946 IWL_WARNING("check TGG and auto detect %d | %d\n",
947 counter++, error);
948
949 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
950 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
951 RXON_FLG_ANT_A_MSK)) == 0);
952 if (error)
953 IWL_WARNING("check antenna %d %d\n", counter++, error);
954
955 if (error)
956 IWL_WARNING("Tuning to channel %d\n",
957 le16_to_cpu(rxon->channel));
958
959 if (error) {
960 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
961 return -1;
962 }
963 return 0;
964 }
965
966 /**
967 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
968 * @priv: staging_rxon is compared to active_rxon
969 *
970 * If the RXON structure is changing enough to require a new tune,
971 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
972 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
973 */
974 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
975 {
976
977 /* These items are only settable from the full RXON command */
978 if (!(iwl3945_is_associated(priv)) ||
979 compare_ether_addr(priv->staging_rxon.bssid_addr,
980 priv->active_rxon.bssid_addr) ||
981 compare_ether_addr(priv->staging_rxon.node_addr,
982 priv->active_rxon.node_addr) ||
983 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
984 priv->active_rxon.wlap_bssid_addr) ||
985 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
986 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
987 (priv->staging_rxon.air_propagation !=
988 priv->active_rxon.air_propagation) ||
989 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
990 return 1;
991
992 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
993 * be updated with the RXON_ASSOC command -- however only some
994 * flag transitions are allowed using RXON_ASSOC */
995
996 /* Check if we are not switching bands */
997 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
998 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
999 return 1;
1000
1001 /* Check if we are switching association toggle */
1002 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1003 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1004 return 1;
1005
1006 return 0;
1007 }
1008
1009 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
1010 {
1011 int rc = 0;
1012 struct iwl3945_rx_packet *res = NULL;
1013 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1014 struct iwl3945_host_cmd cmd = {
1015 .id = REPLY_RXON_ASSOC,
1016 .len = sizeof(rxon_assoc),
1017 .meta.flags = CMD_WANT_SKB,
1018 .data = &rxon_assoc,
1019 };
1020 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1021 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
1022
1023 if ((rxon1->flags == rxon2->flags) &&
1024 (rxon1->filter_flags == rxon2->filter_flags) &&
1025 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1026 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1027 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1028 return 0;
1029 }
1030
1031 rxon_assoc.flags = priv->staging_rxon.flags;
1032 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1033 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1034 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1035 rxon_assoc.reserved = 0;
1036
1037 rc = iwl3945_send_cmd_sync(priv, &cmd);
1038 if (rc)
1039 return rc;
1040
1041 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1042 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1043 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1044 rc = -EIO;
1045 }
1046
1047 priv->alloc_rxb_skb--;
1048 dev_kfree_skb_any(cmd.meta.u.skb);
1049
1050 return rc;
1051 }
1052
1053 /**
1054 * iwl3945_commit_rxon - commit staging_rxon to hardware
1055 *
1056 * The RXON command in staging_rxon is committed to the hardware and
1057 * the active_rxon structure is updated with the new data. This
1058 * function correctly transitions out of the RXON_ASSOC_MSK state if
1059 * a HW tune is required based on the RXON structure changes.
1060 */
1061 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1062 {
1063 /* cast away the const for active_rxon in this function */
1064 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1065 int rc = 0;
1066 DECLARE_MAC_BUF(mac);
1067
1068 if (!iwl3945_is_alive(priv))
1069 return -1;
1070
1071 /* always get timestamp with Rx frame */
1072 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1073
1074 /* select antenna */
1075 priv->staging_rxon.flags &=
1076 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1077 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1078
1079 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1080 if (rc) {
1081 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1082 return -EINVAL;
1083 }
1084
1085 /* If we don't need to send a full RXON, we can use
1086 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1087 * and other flags for the current radio configuration. */
1088 if (!iwl3945_full_rxon_required(priv)) {
1089 rc = iwl3945_send_rxon_assoc(priv);
1090 if (rc) {
1091 IWL_ERROR("Error setting RXON_ASSOC "
1092 "configuration (%d).\n", rc);
1093 return rc;
1094 }
1095
1096 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1097
1098 return 0;
1099 }
1100
1101 /* If we are currently associated and the new config requires
1102 * an RXON_ASSOC and the new config wants the associated mask enabled,
1103 * we must clear the associated from the active configuration
1104 * before we apply the new config */
1105 if (iwl3945_is_associated(priv) &&
1106 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1107 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1108 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1109
1110 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1111 sizeof(struct iwl3945_rxon_cmd),
1112 &priv->active_rxon);
1113
1114 /* If the mask clearing failed then we set
1115 * active_rxon back to what it was previously */
1116 if (rc) {
1117 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1118 IWL_ERROR("Error clearing ASSOC_MSK on current "
1119 "configuration (%d).\n", rc);
1120 return rc;
1121 }
1122 }
1123
1124 IWL_DEBUG_INFO("Sending RXON\n"
1125 "* with%s RXON_FILTER_ASSOC_MSK\n"
1126 "* channel = %d\n"
1127 "* bssid = %s\n",
1128 ((priv->staging_rxon.filter_flags &
1129 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1130 le16_to_cpu(priv->staging_rxon.channel),
1131 print_mac(mac, priv->staging_rxon.bssid_addr));
1132
1133 /* Apply the new configuration */
1134 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1135 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1136 if (rc) {
1137 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1138 return rc;
1139 }
1140
1141 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1142
1143 iwl3945_clear_stations_table(priv);
1144
1145 /* If we issue a new RXON command which required a tune then we must
1146 * send a new TXPOWER command or we won't be able to Tx any frames */
1147 rc = iwl3945_hw_reg_send_txpower(priv);
1148 if (rc) {
1149 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1150 return rc;
1151 }
1152
1153 /* Add the broadcast address so we can send broadcast frames */
1154 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1155 IWL_INVALID_STATION) {
1156 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1157 return -EIO;
1158 }
1159
1160 /* If we have set the ASSOC_MSK and we are in BSS mode then
1161 * add the IWL_AP_ID to the station rate table */
1162 if (iwl3945_is_associated(priv) &&
1163 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
1164 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1165 == IWL_INVALID_STATION) {
1166 IWL_ERROR("Error adding AP address for transmit.\n");
1167 return -EIO;
1168 }
1169
1170 /* Init the hardware's rate fallback order based on the band */
1171 rc = iwl3945_init_hw_rate_table(priv);
1172 if (rc) {
1173 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1174 return -EIO;
1175 }
1176
1177 return 0;
1178 }
1179
1180 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1181 {
1182 struct iwl3945_bt_cmd bt_cmd = {
1183 .flags = 3,
1184 .lead_time = 0xAA,
1185 .max_kill = 1,
1186 .kill_ack_mask = 0,
1187 .kill_cts_mask = 0,
1188 };
1189
1190 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1191 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1192 }
1193
1194 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1195 {
1196 int rc = 0;
1197 struct iwl3945_rx_packet *res;
1198 struct iwl3945_host_cmd cmd = {
1199 .id = REPLY_SCAN_ABORT_CMD,
1200 .meta.flags = CMD_WANT_SKB,
1201 };
1202
1203 /* If there isn't a scan actively going on in the hardware
1204 * then we are in between scan bands and not actually
1205 * actively scanning, so don't send the abort command */
1206 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1207 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1208 return 0;
1209 }
1210
1211 rc = iwl3945_send_cmd_sync(priv, &cmd);
1212 if (rc) {
1213 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1214 return rc;
1215 }
1216
1217 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1218 if (res->u.status != CAN_ABORT_STATUS) {
1219 /* The scan abort will return 1 for success or
1220 * 2 for "failure". A failure condition can be
1221 * due to simply not being in an active scan which
1222 * can occur if we send the scan abort before we
1223 * the microcode has notified us that a scan is
1224 * completed. */
1225 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1226 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1227 clear_bit(STATUS_SCAN_HW, &priv->status);
1228 }
1229
1230 dev_kfree_skb_any(cmd.meta.u.skb);
1231
1232 return rc;
1233 }
1234
1235 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1236 struct iwl3945_cmd *cmd,
1237 struct sk_buff *skb)
1238 {
1239 return 1;
1240 }
1241
1242 /*
1243 * CARD_STATE_CMD
1244 *
1245 * Use: Sets the device's internal card state to enable, disable, or halt
1246 *
1247 * When in the 'enable' state the card operates as normal.
1248 * When in the 'disable' state, the card enters into a low power mode.
1249 * When in the 'halt' state, the card is shut down and must be fully
1250 * restarted to come back on.
1251 */
1252 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1253 {
1254 struct iwl3945_host_cmd cmd = {
1255 .id = REPLY_CARD_STATE_CMD,
1256 .len = sizeof(u32),
1257 .data = &flags,
1258 .meta.flags = meta_flag,
1259 };
1260
1261 if (meta_flag & CMD_ASYNC)
1262 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1263
1264 return iwl3945_send_cmd(priv, &cmd);
1265 }
1266
1267 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1268 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1269 {
1270 struct iwl3945_rx_packet *res = NULL;
1271
1272 if (!skb) {
1273 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1274 return 1;
1275 }
1276
1277 res = (struct iwl3945_rx_packet *)skb->data;
1278 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1279 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1280 res->hdr.flags);
1281 return 1;
1282 }
1283
1284 switch (res->u.add_sta.status) {
1285 case ADD_STA_SUCCESS_MSK:
1286 break;
1287 default:
1288 break;
1289 }
1290
1291 /* We didn't cache the SKB; let the caller free it */
1292 return 1;
1293 }
1294
1295 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1296 struct iwl3945_addsta_cmd *sta, u8 flags)
1297 {
1298 struct iwl3945_rx_packet *res = NULL;
1299 int rc = 0;
1300 struct iwl3945_host_cmd cmd = {
1301 .id = REPLY_ADD_STA,
1302 .len = sizeof(struct iwl3945_addsta_cmd),
1303 .meta.flags = flags,
1304 .data = sta,
1305 };
1306
1307 if (flags & CMD_ASYNC)
1308 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1309 else
1310 cmd.meta.flags |= CMD_WANT_SKB;
1311
1312 rc = iwl3945_send_cmd(priv, &cmd);
1313
1314 if (rc || (flags & CMD_ASYNC))
1315 return rc;
1316
1317 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1318 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1319 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1320 res->hdr.flags);
1321 rc = -EIO;
1322 }
1323
1324 if (rc == 0) {
1325 switch (res->u.add_sta.status) {
1326 case ADD_STA_SUCCESS_MSK:
1327 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1328 break;
1329 default:
1330 rc = -EIO;
1331 IWL_WARNING("REPLY_ADD_STA failed\n");
1332 break;
1333 }
1334 }
1335
1336 priv->alloc_rxb_skb--;
1337 dev_kfree_skb_any(cmd.meta.u.skb);
1338
1339 return rc;
1340 }
1341
1342 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1343 struct ieee80211_key_conf *keyconf,
1344 u8 sta_id)
1345 {
1346 unsigned long flags;
1347 __le16 key_flags = 0;
1348
1349 switch (keyconf->alg) {
1350 case ALG_CCMP:
1351 key_flags |= STA_KEY_FLG_CCMP;
1352 key_flags |= cpu_to_le16(
1353 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1354 key_flags &= ~STA_KEY_FLG_INVALID;
1355 break;
1356 case ALG_TKIP:
1357 case ALG_WEP:
1358 default:
1359 return -EINVAL;
1360 }
1361 spin_lock_irqsave(&priv->sta_lock, flags);
1362 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1363 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1364 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1365 keyconf->keylen);
1366
1367 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1368 keyconf->keylen);
1369 priv->stations[sta_id].sta.key.key_flags = key_flags;
1370 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1371 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1372
1373 spin_unlock_irqrestore(&priv->sta_lock, flags);
1374
1375 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1376 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1377 return 0;
1378 }
1379
1380 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1381 {
1382 unsigned long flags;
1383
1384 spin_lock_irqsave(&priv->sta_lock, flags);
1385 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1386 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1387 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1388 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1389 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1390 spin_unlock_irqrestore(&priv->sta_lock, flags);
1391
1392 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1393 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1394 return 0;
1395 }
1396
1397 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1398 {
1399 struct list_head *element;
1400
1401 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1402 priv->frames_count);
1403
1404 while (!list_empty(&priv->free_frames)) {
1405 element = priv->free_frames.next;
1406 list_del(element);
1407 kfree(list_entry(element, struct iwl3945_frame, list));
1408 priv->frames_count--;
1409 }
1410
1411 if (priv->frames_count) {
1412 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1413 priv->frames_count);
1414 priv->frames_count = 0;
1415 }
1416 }
1417
1418 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1419 {
1420 struct iwl3945_frame *frame;
1421 struct list_head *element;
1422 if (list_empty(&priv->free_frames)) {
1423 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1424 if (!frame) {
1425 IWL_ERROR("Could not allocate frame!\n");
1426 return NULL;
1427 }
1428
1429 priv->frames_count++;
1430 return frame;
1431 }
1432
1433 element = priv->free_frames.next;
1434 list_del(element);
1435 return list_entry(element, struct iwl3945_frame, list);
1436 }
1437
1438 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1439 {
1440 memset(frame, 0, sizeof(*frame));
1441 list_add(&frame->list, &priv->free_frames);
1442 }
1443
1444 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1445 struct ieee80211_hdr *hdr,
1446 const u8 *dest, int left)
1447 {
1448
1449 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1450 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1451 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1452 return 0;
1453
1454 if (priv->ibss_beacon->len > left)
1455 return 0;
1456
1457 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1458
1459 return priv->ibss_beacon->len;
1460 }
1461
1462 static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
1463 {
1464 u8 i;
1465
1466 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1467 i = iwl3945_rates[i].next_ieee) {
1468 if (rate_mask & (1 << i))
1469 return iwl3945_rates[i].plcp;
1470 }
1471
1472 return IWL_RATE_INVALID;
1473 }
1474
1475 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1476 {
1477 struct iwl3945_frame *frame;
1478 unsigned int frame_size;
1479 int rc;
1480 u8 rate;
1481
1482 frame = iwl3945_get_free_frame(priv);
1483
1484 if (!frame) {
1485 IWL_ERROR("Could not obtain free frame buffer for beacon "
1486 "command.\n");
1487 return -ENOMEM;
1488 }
1489
1490 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1491 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
1492 0xFF0);
1493 if (rate == IWL_INVALID_RATE)
1494 rate = IWL_RATE_6M_PLCP;
1495 } else {
1496 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1497 if (rate == IWL_INVALID_RATE)
1498 rate = IWL_RATE_1M_PLCP;
1499 }
1500
1501 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1502
1503 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1504 &frame->u.cmd[0]);
1505
1506 iwl3945_free_frame(priv, frame);
1507
1508 return rc;
1509 }
1510
1511 /******************************************************************************
1512 *
1513 * EEPROM related functions
1514 *
1515 ******************************************************************************/
1516
1517 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1518 {
1519 memcpy(mac, priv->eeprom.mac_address, 6);
1520 }
1521
1522 /*
1523 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1524 * embedded controller) as EEPROM reader; each read is a series of pulses
1525 * to/from the EEPROM chip, not a single event, so even reads could conflict
1526 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1527 * simply claims ownership, which should be safe when this function is called
1528 * (i.e. before loading uCode!).
1529 */
1530 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1531 {
1532 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1533 return 0;
1534 }
1535
1536 /**
1537 * iwl3945_eeprom_init - read EEPROM contents
1538 *
1539 * Load the EEPROM contents from adapter into priv->eeprom
1540 *
1541 * NOTE: This routine uses the non-debug IO access functions.
1542 */
1543 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1544 {
1545 u16 *e = (u16 *)&priv->eeprom;
1546 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1547 u32 r;
1548 int sz = sizeof(priv->eeprom);
1549 int rc;
1550 int i;
1551 u16 addr;
1552
1553 /* The EEPROM structure has several padding buffers within it
1554 * and when adding new EEPROM maps is subject to programmer errors
1555 * which may be very difficult to identify without explicitly
1556 * checking the resulting size of the eeprom map. */
1557 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1558
1559 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1560 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1561 return -ENOENT;
1562 }
1563
1564 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1565 rc = iwl3945_eeprom_acquire_semaphore(priv);
1566 if (rc < 0) {
1567 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1568 return -ENOENT;
1569 }
1570
1571 /* eeprom is an array of 16bit values */
1572 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1573 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1574 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1575
1576 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1577 i += IWL_EEPROM_ACCESS_DELAY) {
1578 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1579 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1580 break;
1581 udelay(IWL_EEPROM_ACCESS_DELAY);
1582 }
1583
1584 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1585 IWL_ERROR("Time out reading EEPROM[%d]\n", addr);
1586 return -ETIMEDOUT;
1587 }
1588 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1589 }
1590
1591 return 0;
1592 }
1593
1594 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1595 {
1596 if (priv->hw_setting.shared_virt)
1597 pci_free_consistent(priv->pci_dev,
1598 sizeof(struct iwl3945_shared),
1599 priv->hw_setting.shared_virt,
1600 priv->hw_setting.shared_phys);
1601 }
1602
1603 /**
1604 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1605 *
1606 * return : set the bit for each supported rate insert in ie
1607 */
1608 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1609 u16 basic_rate, int *left)
1610 {
1611 u16 ret_rates = 0, bit;
1612 int i;
1613 u8 *cnt = ie;
1614 u8 *rates = ie + 1;
1615
1616 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1617 if (bit & supported_rate) {
1618 ret_rates |= bit;
1619 rates[*cnt] = iwl3945_rates[i].ieee |
1620 ((bit & basic_rate) ? 0x80 : 0x00);
1621 (*cnt)++;
1622 (*left)--;
1623 if ((*left <= 0) ||
1624 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1625 break;
1626 }
1627 }
1628
1629 return ret_rates;
1630 }
1631
1632 /**
1633 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1634 */
1635 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1636 struct ieee80211_mgmt *frame,
1637 int left, int is_direct)
1638 {
1639 int len = 0;
1640 u8 *pos = NULL;
1641 u16 active_rates, ret_rates, cck_rates;
1642
1643 /* Make sure there is enough space for the probe request,
1644 * two mandatory IEs and the data */
1645 left -= 24;
1646 if (left < 0)
1647 return 0;
1648 len += 24;
1649
1650 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1651 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1652 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1653 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1654 frame->seq_ctrl = 0;
1655
1656 /* fill in our indirect SSID IE */
1657 /* ...next IE... */
1658
1659 left -= 2;
1660 if (left < 0)
1661 return 0;
1662 len += 2;
1663 pos = &(frame->u.probe_req.variable[0]);
1664 *pos++ = WLAN_EID_SSID;
1665 *pos++ = 0;
1666
1667 /* fill in our direct SSID IE... */
1668 if (is_direct) {
1669 /* ...next IE... */
1670 left -= 2 + priv->essid_len;
1671 if (left < 0)
1672 return 0;
1673 /* ... fill it in... */
1674 *pos++ = WLAN_EID_SSID;
1675 *pos++ = priv->essid_len;
1676 memcpy(pos, priv->essid, priv->essid_len);
1677 pos += priv->essid_len;
1678 len += 2 + priv->essid_len;
1679 }
1680
1681 /* fill in supported rate */
1682 /* ...next IE... */
1683 left -= 2;
1684 if (left < 0)
1685 return 0;
1686
1687 /* ... fill it in... */
1688 *pos++ = WLAN_EID_SUPP_RATES;
1689 *pos = 0;
1690
1691 priv->active_rate = priv->rates_mask;
1692 active_rates = priv->active_rate;
1693 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1694
1695 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1696 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1697 priv->active_rate_basic, &left);
1698 active_rates &= ~ret_rates;
1699
1700 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1701 priv->active_rate_basic, &left);
1702 active_rates &= ~ret_rates;
1703
1704 len += 2 + *pos;
1705 pos += (*pos) + 1;
1706 if (active_rates == 0)
1707 goto fill_end;
1708
1709 /* fill in supported extended rate */
1710 /* ...next IE... */
1711 left -= 2;
1712 if (left < 0)
1713 return 0;
1714 /* ... fill it in... */
1715 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1716 *pos = 0;
1717 iwl3945_supported_rate_to_ie(pos, active_rates,
1718 priv->active_rate_basic, &left);
1719 if (*pos > 0)
1720 len += 2 + *pos;
1721
1722 fill_end:
1723 return (u16)len;
1724 }
1725
1726 /*
1727 * QoS support
1728 */
1729 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1730 struct iwl3945_qosparam_cmd *qos)
1731 {
1732
1733 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1734 sizeof(struct iwl3945_qosparam_cmd), qos);
1735 }
1736
1737 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1738 {
1739 u16 cw_min = 15;
1740 u16 cw_max = 1023;
1741 u8 aifs = 2;
1742 u8 is_legacy = 0;
1743 unsigned long flags;
1744 int i;
1745
1746 spin_lock_irqsave(&priv->lock, flags);
1747 priv->qos_data.qos_active = 0;
1748
1749 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1750 if (priv->qos_data.qos_enable)
1751 priv->qos_data.qos_active = 1;
1752 if (!(priv->active_rate & 0xfff0)) {
1753 cw_min = 31;
1754 is_legacy = 1;
1755 }
1756 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1757 if (priv->qos_data.qos_enable)
1758 priv->qos_data.qos_active = 1;
1759 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1760 cw_min = 31;
1761 is_legacy = 1;
1762 }
1763
1764 if (priv->qos_data.qos_active)
1765 aifs = 3;
1766
1767 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1768 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1769 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1770 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1771 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1772
1773 if (priv->qos_data.qos_active) {
1774 i = 1;
1775 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1776 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1777 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1778 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1779 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1780
1781 i = 2;
1782 priv->qos_data.def_qos_parm.ac[i].cw_min =
1783 cpu_to_le16((cw_min + 1) / 2 - 1);
1784 priv->qos_data.def_qos_parm.ac[i].cw_max =
1785 cpu_to_le16(cw_max);
1786 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1787 if (is_legacy)
1788 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1789 cpu_to_le16(6016);
1790 else
1791 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1792 cpu_to_le16(3008);
1793 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1794
1795 i = 3;
1796 priv->qos_data.def_qos_parm.ac[i].cw_min =
1797 cpu_to_le16((cw_min + 1) / 4 - 1);
1798 priv->qos_data.def_qos_parm.ac[i].cw_max =
1799 cpu_to_le16((cw_max + 1) / 2 - 1);
1800 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1801 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1802 if (is_legacy)
1803 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1804 cpu_to_le16(3264);
1805 else
1806 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1807 cpu_to_le16(1504);
1808 } else {
1809 for (i = 1; i < 4; i++) {
1810 priv->qos_data.def_qos_parm.ac[i].cw_min =
1811 cpu_to_le16(cw_min);
1812 priv->qos_data.def_qos_parm.ac[i].cw_max =
1813 cpu_to_le16(cw_max);
1814 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1815 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1816 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1817 }
1818 }
1819 IWL_DEBUG_QOS("set QoS to default \n");
1820
1821 spin_unlock_irqrestore(&priv->lock, flags);
1822 }
1823
1824 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
1825 {
1826 unsigned long flags;
1827
1828 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1829 return;
1830
1831 if (!priv->qos_data.qos_enable)
1832 return;
1833
1834 spin_lock_irqsave(&priv->lock, flags);
1835 priv->qos_data.def_qos_parm.qos_flags = 0;
1836
1837 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1838 !priv->qos_data.qos_cap.q_AP.txop_request)
1839 priv->qos_data.def_qos_parm.qos_flags |=
1840 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1841
1842 if (priv->qos_data.qos_active)
1843 priv->qos_data.def_qos_parm.qos_flags |=
1844 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1845
1846 spin_unlock_irqrestore(&priv->lock, flags);
1847
1848 if (force || iwl3945_is_associated(priv)) {
1849 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
1850 priv->qos_data.qos_active);
1851
1852 iwl3945_send_qos_params_command(priv,
1853 &(priv->qos_data.def_qos_parm));
1854 }
1855 }
1856
1857 /*
1858 * Power management (not Tx power!) functions
1859 */
1860 #define MSEC_TO_USEC 1024
1861
1862 #define NOSLP __constant_cpu_to_le32(0)
1863 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
1864 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1865 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1866 __constant_cpu_to_le32(X1), \
1867 __constant_cpu_to_le32(X2), \
1868 __constant_cpu_to_le32(X3), \
1869 __constant_cpu_to_le32(X4)}
1870
1871
1872 /* default power management (not Tx power) table values */
1873 /* for tim 0-10 */
1874 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
1875 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1876 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1877 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1878 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1879 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1880 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1881 };
1882
1883 /* for tim > 10 */
1884 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
1885 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1886 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1887 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1888 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1889 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1890 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1891 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1892 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1893 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1894 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1895 };
1896
1897 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
1898 {
1899 int rc = 0, i;
1900 struct iwl3945_power_mgr *pow_data;
1901 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
1902 u16 pci_pm;
1903
1904 IWL_DEBUG_POWER("Initialize power \n");
1905
1906 pow_data = &(priv->power_data);
1907
1908 memset(pow_data, 0, sizeof(*pow_data));
1909
1910 pow_data->active_index = IWL_POWER_RANGE_0;
1911 pow_data->dtim_val = 0xffff;
1912
1913 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1914 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1915
1916 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1917 if (rc != 0)
1918 return 0;
1919 else {
1920 struct iwl3945_powertable_cmd *cmd;
1921
1922 IWL_DEBUG_POWER("adjust power command flags\n");
1923
1924 for (i = 0; i < IWL_POWER_AC; i++) {
1925 cmd = &pow_data->pwr_range_0[i].cmd;
1926
1927 if (pci_pm & 0x1)
1928 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1929 else
1930 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1931 }
1932 }
1933 return rc;
1934 }
1935
1936 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1937 struct iwl3945_powertable_cmd *cmd, u32 mode)
1938 {
1939 int rc = 0, i;
1940 u8 skip;
1941 u32 max_sleep = 0;
1942 struct iwl3945_power_vec_entry *range;
1943 u8 period = 0;
1944 struct iwl3945_power_mgr *pow_data;
1945
1946 if (mode > IWL_POWER_INDEX_5) {
1947 IWL_DEBUG_POWER("Error invalid power mode \n");
1948 return -1;
1949 }
1950 pow_data = &(priv->power_data);
1951
1952 if (pow_data->active_index == IWL_POWER_RANGE_0)
1953 range = &pow_data->pwr_range_0[0];
1954 else
1955 range = &pow_data->pwr_range_1[1];
1956
1957 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1958
1959 #ifdef IWL_MAC80211_DISABLE
1960 if (priv->assoc_network != NULL) {
1961 unsigned long flags;
1962
1963 period = priv->assoc_network->tim.tim_period;
1964 }
1965 #endif /*IWL_MAC80211_DISABLE */
1966 skip = range[mode].no_dtim;
1967
1968 if (period == 0) {
1969 period = 1;
1970 skip = 0;
1971 }
1972
1973 if (skip == 0) {
1974 max_sleep = period;
1975 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1976 } else {
1977 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1978 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1979 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1980 }
1981
1982 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1983 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1984 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1985 }
1986
1987 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1988 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1989 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1990 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1991 le32_to_cpu(cmd->sleep_interval[0]),
1992 le32_to_cpu(cmd->sleep_interval[1]),
1993 le32_to_cpu(cmd->sleep_interval[2]),
1994 le32_to_cpu(cmd->sleep_interval[3]),
1995 le32_to_cpu(cmd->sleep_interval[4]));
1996
1997 return rc;
1998 }
1999
2000 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
2001 {
2002 u32 uninitialized_var(final_mode);
2003 int rc;
2004 struct iwl3945_powertable_cmd cmd;
2005
2006 /* If on battery, set to 3,
2007 * if plugged into AC power, set to CAM ("continuously aware mode"),
2008 * else user level */
2009 switch (mode) {
2010 case IWL_POWER_BATTERY:
2011 final_mode = IWL_POWER_INDEX_3;
2012 break;
2013 case IWL_POWER_AC:
2014 final_mode = IWL_POWER_MODE_CAM;
2015 break;
2016 default:
2017 final_mode = mode;
2018 break;
2019 }
2020
2021 iwl3945_update_power_cmd(priv, &cmd, final_mode);
2022
2023 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2024
2025 if (final_mode == IWL_POWER_MODE_CAM)
2026 clear_bit(STATUS_POWER_PMI, &priv->status);
2027 else
2028 set_bit(STATUS_POWER_PMI, &priv->status);
2029
2030 return rc;
2031 }
2032
2033 /**
2034 * iwl3945_scan_cancel - Cancel any currently executing HW scan
2035 *
2036 * NOTE: priv->mutex is not required before calling this function
2037 */
2038 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
2039 {
2040 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2041 clear_bit(STATUS_SCANNING, &priv->status);
2042 return 0;
2043 }
2044
2045 if (test_bit(STATUS_SCANNING, &priv->status)) {
2046 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2047 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2048 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2049 queue_work(priv->workqueue, &priv->abort_scan);
2050
2051 } else
2052 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2053
2054 return test_bit(STATUS_SCANNING, &priv->status);
2055 }
2056
2057 return 0;
2058 }
2059
2060 /**
2061 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2062 * @ms: amount of time to wait (in milliseconds) for scan to abort
2063 *
2064 * NOTE: priv->mutex must be held before calling this function
2065 */
2066 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2067 {
2068 unsigned long now = jiffies;
2069 int ret;
2070
2071 ret = iwl3945_scan_cancel(priv);
2072 if (ret && ms) {
2073 mutex_unlock(&priv->mutex);
2074 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2075 test_bit(STATUS_SCANNING, &priv->status))
2076 msleep(1);
2077 mutex_lock(&priv->mutex);
2078
2079 return test_bit(STATUS_SCANNING, &priv->status);
2080 }
2081
2082 return ret;
2083 }
2084
2085 #define MAX_UCODE_BEACON_INTERVAL 1024
2086 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2087
2088 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2089 {
2090 u16 new_val = 0;
2091 u16 beacon_factor = 0;
2092
2093 beacon_factor =
2094 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2095 / MAX_UCODE_BEACON_INTERVAL;
2096 new_val = beacon_val / beacon_factor;
2097
2098 return cpu_to_le16(new_val);
2099 }
2100
2101 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2102 {
2103 u64 interval_tm_unit;
2104 u64 tsf, result;
2105 unsigned long flags;
2106 struct ieee80211_conf *conf = NULL;
2107 u16 beacon_int = 0;
2108
2109 conf = ieee80211_get_hw_conf(priv->hw);
2110
2111 spin_lock_irqsave(&priv->lock, flags);
2112 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2113 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2114
2115 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2116
2117 tsf = priv->timestamp1;
2118 tsf = ((tsf << 32) | priv->timestamp0);
2119
2120 beacon_int = priv->beacon_int;
2121 spin_unlock_irqrestore(&priv->lock, flags);
2122
2123 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2124 if (beacon_int == 0) {
2125 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2126 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2127 } else {
2128 priv->rxon_timing.beacon_interval =
2129 cpu_to_le16(beacon_int);
2130 priv->rxon_timing.beacon_interval =
2131 iwl3945_adjust_beacon_interval(
2132 le16_to_cpu(priv->rxon_timing.beacon_interval));
2133 }
2134
2135 priv->rxon_timing.atim_window = 0;
2136 } else {
2137 priv->rxon_timing.beacon_interval =
2138 iwl3945_adjust_beacon_interval(conf->beacon_int);
2139 /* TODO: we need to get atim_window from upper stack
2140 * for now we set to 0 */
2141 priv->rxon_timing.atim_window = 0;
2142 }
2143
2144 interval_tm_unit =
2145 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2146 result = do_div(tsf, interval_tm_unit);
2147 priv->rxon_timing.beacon_init_val =
2148 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2149
2150 IWL_DEBUG_ASSOC
2151 ("beacon interval %d beacon timer %d beacon tim %d\n",
2152 le16_to_cpu(priv->rxon_timing.beacon_interval),
2153 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2154 le16_to_cpu(priv->rxon_timing.atim_window));
2155 }
2156
2157 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2158 {
2159 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2160 IWL_ERROR("APs don't scan.\n");
2161 return 0;
2162 }
2163
2164 if (!iwl3945_is_ready_rf(priv)) {
2165 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2166 return -EIO;
2167 }
2168
2169 if (test_bit(STATUS_SCANNING, &priv->status)) {
2170 IWL_DEBUG_SCAN("Scan already in progress.\n");
2171 return -EAGAIN;
2172 }
2173
2174 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2175 IWL_DEBUG_SCAN("Scan request while abort pending. "
2176 "Queuing.\n");
2177 return -EAGAIN;
2178 }
2179
2180 IWL_DEBUG_INFO("Starting scan...\n");
2181 if (priv->cfg->sku & IWL_SKU_G)
2182 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2183 if (priv->cfg->sku & IWL_SKU_A)
2184 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2185 set_bit(STATUS_SCANNING, &priv->status);
2186 priv->scan_start = jiffies;
2187 priv->scan_pass_start = priv->scan_start;
2188
2189 queue_work(priv->workqueue, &priv->request_scan);
2190
2191 return 0;
2192 }
2193
2194 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2195 {
2196 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2197
2198 if (hw_decrypt)
2199 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2200 else
2201 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2202
2203 return 0;
2204 }
2205
2206 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2207 enum ieee80211_band band)
2208 {
2209 if (band == IEEE80211_BAND_5GHZ) {
2210 priv->staging_rxon.flags &=
2211 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2212 | RXON_FLG_CCK_MSK);
2213 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2214 } else {
2215 /* Copied from iwl3945_bg_post_associate() */
2216 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2217 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2218 else
2219 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2220
2221 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2222 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2223
2224 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2225 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2226 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2227 }
2228 }
2229
2230 /*
2231 * initialize rxon structure with default values from eeprom
2232 */
2233 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2234 {
2235 const struct iwl3945_channel_info *ch_info;
2236
2237 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2238
2239 switch (priv->iw_mode) {
2240 case IEEE80211_IF_TYPE_AP:
2241 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2242 break;
2243
2244 case IEEE80211_IF_TYPE_STA:
2245 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2246 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2247 break;
2248
2249 case IEEE80211_IF_TYPE_IBSS:
2250 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2251 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2252 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2253 RXON_FILTER_ACCEPT_GRP_MSK;
2254 break;
2255
2256 case IEEE80211_IF_TYPE_MNTR:
2257 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2258 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2259 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2260 break;
2261 default:
2262 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
2263 break;
2264 }
2265
2266 #if 0
2267 /* TODO: Figure out when short_preamble would be set and cache from
2268 * that */
2269 if (!hw_to_local(priv->hw)->short_preamble)
2270 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2271 else
2272 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2273 #endif
2274
2275 ch_info = iwl3945_get_channel_info(priv, priv->band,
2276 le16_to_cpu(priv->active_rxon.channel));
2277
2278 if (!ch_info)
2279 ch_info = &priv->channel_info[0];
2280
2281 /*
2282 * in some case A channels are all non IBSS
2283 * in this case force B/G channel
2284 */
2285 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2286 !(is_channel_ibss(ch_info)))
2287 ch_info = &priv->channel_info[0];
2288
2289 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2290 if (is_channel_a_band(ch_info))
2291 priv->band = IEEE80211_BAND_5GHZ;
2292 else
2293 priv->band = IEEE80211_BAND_2GHZ;
2294
2295 iwl3945_set_flags_for_phymode(priv, priv->band);
2296
2297 priv->staging_rxon.ofdm_basic_rates =
2298 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2299 priv->staging_rxon.cck_basic_rates =
2300 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2301 }
2302
2303 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2304 {
2305 if (mode == IEEE80211_IF_TYPE_IBSS) {
2306 const struct iwl3945_channel_info *ch_info;
2307
2308 ch_info = iwl3945_get_channel_info(priv,
2309 priv->band,
2310 le16_to_cpu(priv->staging_rxon.channel));
2311
2312 if (!ch_info || !is_channel_ibss(ch_info)) {
2313 IWL_ERROR("channel %d not IBSS channel\n",
2314 le16_to_cpu(priv->staging_rxon.channel));
2315 return -EINVAL;
2316 }
2317 }
2318
2319 priv->iw_mode = mode;
2320
2321 iwl3945_connection_init_rx_config(priv);
2322 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2323
2324 iwl3945_clear_stations_table(priv);
2325
2326 /* dont commit rxon if rf-kill is on*/
2327 if (!iwl3945_is_ready_rf(priv))
2328 return -EAGAIN;
2329
2330 cancel_delayed_work(&priv->scan_check);
2331 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2332 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2333 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2334 return -EAGAIN;
2335 }
2336
2337 iwl3945_commit_rxon(priv);
2338
2339 return 0;
2340 }
2341
2342 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2343 struct ieee80211_tx_info *info,
2344 struct iwl3945_cmd *cmd,
2345 struct sk_buff *skb_frag,
2346 int last_frag)
2347 {
2348 struct iwl3945_hw_key *keyinfo =
2349 &priv->stations[info->control.hw_key->hw_key_idx].keyinfo;
2350
2351 switch (keyinfo->alg) {
2352 case ALG_CCMP:
2353 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2354 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2355 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2356 break;
2357
2358 case ALG_TKIP:
2359 #if 0
2360 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2361
2362 if (last_frag)
2363 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2364 8);
2365 else
2366 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2367 #endif
2368 break;
2369
2370 case ALG_WEP:
2371 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2372 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2373
2374 if (keyinfo->keylen == 13)
2375 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2376
2377 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2378
2379 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2380 "with key %d\n", info->control.hw_key->hw_key_idx);
2381 break;
2382
2383 default:
2384 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2385 break;
2386 }
2387 }
2388
2389 /*
2390 * handle build REPLY_TX command notification.
2391 */
2392 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2393 struct iwl3945_cmd *cmd,
2394 struct ieee80211_tx_info *info,
2395 struct ieee80211_hdr *hdr,
2396 int is_unicast, u8 std_id)
2397 {
2398 __le16 fc = hdr->frame_control;
2399 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2400
2401 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2402 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2403 tx_flags |= TX_CMD_FLG_ACK_MSK;
2404 if (ieee80211_is_mgmt(fc))
2405 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2406 if (ieee80211_is_probe_resp(fc) &&
2407 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2408 tx_flags |= TX_CMD_FLG_TSF_MSK;
2409 } else {
2410 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2411 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2412 }
2413
2414 cmd->cmd.tx.sta_id = std_id;
2415 if (ieee80211_has_morefrags(fc))
2416 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2417
2418 if (ieee80211_is_data_qos(fc)) {
2419 u8 *qc = ieee80211_get_qos_ctl(hdr);
2420 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2421 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2422 } else {
2423 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2424 }
2425
2426 if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
2427 tx_flags |= TX_CMD_FLG_RTS_MSK;
2428 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2429 } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
2430 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2431 tx_flags |= TX_CMD_FLG_CTS_MSK;
2432 }
2433
2434 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2435 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2436
2437 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2438 if (ieee80211_is_mgmt(fc)) {
2439 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2440 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2441 else
2442 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2443 } else {
2444 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2445 #ifdef CONFIG_IWL3945_LEDS
2446 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2447 #endif
2448 }
2449
2450 cmd->cmd.tx.driver_txop = 0;
2451 cmd->cmd.tx.tx_flags = tx_flags;
2452 cmd->cmd.tx.next_frame_len = 0;
2453 }
2454
2455 /**
2456 * iwl3945_get_sta_id - Find station's index within station table
2457 */
2458 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2459 {
2460 int sta_id;
2461 u16 fc = le16_to_cpu(hdr->frame_control);
2462
2463 /* If this frame is broadcast or management, use broadcast station id */
2464 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2465 is_multicast_ether_addr(hdr->addr1))
2466 return priv->hw_setting.bcast_sta_id;
2467
2468 switch (priv->iw_mode) {
2469
2470 /* If we are a client station in a BSS network, use the special
2471 * AP station entry (that's the only station we communicate with) */
2472 case IEEE80211_IF_TYPE_STA:
2473 return IWL_AP_ID;
2474
2475 /* If we are an AP, then find the station, or use BCAST */
2476 case IEEE80211_IF_TYPE_AP:
2477 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2478 if (sta_id != IWL_INVALID_STATION)
2479 return sta_id;
2480 return priv->hw_setting.bcast_sta_id;
2481
2482 /* If this frame is going out to an IBSS network, find the station,
2483 * or create a new station table entry */
2484 case IEEE80211_IF_TYPE_IBSS: {
2485 DECLARE_MAC_BUF(mac);
2486
2487 /* Create new station table entry */
2488 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2489 if (sta_id != IWL_INVALID_STATION)
2490 return sta_id;
2491
2492 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2493
2494 if (sta_id != IWL_INVALID_STATION)
2495 return sta_id;
2496
2497 IWL_DEBUG_DROP("Station %s not in station map. "
2498 "Defaulting to broadcast...\n",
2499 print_mac(mac, hdr->addr1));
2500 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2501 return priv->hw_setting.bcast_sta_id;
2502 }
2503 /* If we are in monitor mode, use BCAST. This is required for
2504 * packet injection. */
2505 case IEEE80211_IF_TYPE_MNTR:
2506 return priv->hw_setting.bcast_sta_id;
2507
2508 default:
2509 IWL_WARNING("Unknown mode of operation: %d\n", priv->iw_mode);
2510 return priv->hw_setting.bcast_sta_id;
2511 }
2512 }
2513
2514 /*
2515 * start REPLY_TX command process
2516 */
2517 static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb)
2518 {
2519 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2520 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2521 struct iwl3945_tfd_frame *tfd;
2522 u32 *control_flags;
2523 int txq_id = skb_get_queue_mapping(skb);
2524 struct iwl3945_tx_queue *txq = NULL;
2525 struct iwl3945_queue *q = NULL;
2526 dma_addr_t phys_addr;
2527 dma_addr_t txcmd_phys;
2528 struct iwl3945_cmd *out_cmd = NULL;
2529 u16 len, idx, len_org, hdr_len;
2530 u8 id;
2531 u8 unicast;
2532 u8 sta_id;
2533 u8 tid = 0;
2534 u16 seq_number = 0;
2535 __le16 fc;
2536 u8 wait_write_ptr = 0;
2537 u8 *qc = NULL;
2538 unsigned long flags;
2539 int rc;
2540
2541 spin_lock_irqsave(&priv->lock, flags);
2542 if (iwl3945_is_rfkill(priv)) {
2543 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2544 goto drop_unlock;
2545 }
2546
2547 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2548 IWL_ERROR("ERROR: No TX rate available.\n");
2549 goto drop_unlock;
2550 }
2551
2552 unicast = !is_multicast_ether_addr(hdr->addr1);
2553 id = 0;
2554
2555 fc = hdr->frame_control;
2556
2557 #ifdef CONFIG_IWL3945_DEBUG
2558 if (ieee80211_is_auth(fc))
2559 IWL_DEBUG_TX("Sending AUTH frame\n");
2560 else if (ieee80211_is_assoc_req(fc))
2561 IWL_DEBUG_TX("Sending ASSOC frame\n");
2562 else if (ieee80211_is_reassoc_req(fc))
2563 IWL_DEBUG_TX("Sending REASSOC frame\n");
2564 #endif
2565
2566 /* drop all data frame if we are not associated */
2567 if (ieee80211_is_data(fc) &&
2568 (priv->iw_mode != IEEE80211_IF_TYPE_MNTR) && /* packet injection */
2569 (!iwl3945_is_associated(priv) ||
2570 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id))) {
2571 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2572 goto drop_unlock;
2573 }
2574
2575 spin_unlock_irqrestore(&priv->lock, flags);
2576
2577 hdr_len = ieee80211_get_hdrlen(le16_to_cpu(fc));
2578
2579 /* Find (or create) index into station table for destination station */
2580 sta_id = iwl3945_get_sta_id(priv, hdr);
2581 if (sta_id == IWL_INVALID_STATION) {
2582 DECLARE_MAC_BUF(mac);
2583
2584 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2585 print_mac(mac, hdr->addr1));
2586 goto drop;
2587 }
2588
2589 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2590
2591 if (ieee80211_is_data_qos(fc)) {
2592 qc = ieee80211_get_qos_ctl(hdr);
2593 tid = qc[0] & 0xf;
2594 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2595 IEEE80211_SCTL_SEQ;
2596 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2597 (hdr->seq_ctrl &
2598 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2599 seq_number += 0x10;
2600 }
2601
2602 /* Descriptor for chosen Tx queue */
2603 txq = &priv->txq[txq_id];
2604 q = &txq->q;
2605
2606 spin_lock_irqsave(&priv->lock, flags);
2607
2608 /* Set up first empty TFD within this queue's circular TFD buffer */
2609 tfd = &txq->bd[q->write_ptr];
2610 memset(tfd, 0, sizeof(*tfd));
2611 control_flags = (u32 *) tfd;
2612 idx = get_cmd_index(q, q->write_ptr, 0);
2613
2614 /* Set up driver data for this TFD */
2615 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2616 txq->txb[q->write_ptr].skb[0] = skb;
2617
2618 /* Init first empty entry in queue's array of Tx/cmd buffers */
2619 out_cmd = &txq->cmd[idx];
2620 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2621 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2622
2623 /*
2624 * Set up the Tx-command (not MAC!) header.
2625 * Store the chosen Tx queue and TFD index within the sequence field;
2626 * after Tx, uCode's Tx response will return this value so driver can
2627 * locate the frame within the tx queue and do post-tx processing.
2628 */
2629 out_cmd->hdr.cmd = REPLY_TX;
2630 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2631 INDEX_TO_SEQ(q->write_ptr)));
2632
2633 /* Copy MAC header from skb into command buffer */
2634 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2635
2636 /*
2637 * Use the first empty entry in this queue's command buffer array
2638 * to contain the Tx command and MAC header concatenated together
2639 * (payload data will be in another buffer).
2640 * Size of this varies, due to varying MAC header length.
2641 * If end is not dword aligned, we'll have 2 extra bytes at the end
2642 * of the MAC header (device reads on dword boundaries).
2643 * We'll tell device about this padding later.
2644 */
2645 len = priv->hw_setting.tx_cmd_len +
2646 sizeof(struct iwl3945_cmd_header) + hdr_len;
2647
2648 len_org = len;
2649 len = (len + 3) & ~3;
2650
2651 if (len_org != len)
2652 len_org = 1;
2653 else
2654 len_org = 0;
2655
2656 /* Physical address of this Tx command's header (not MAC header!),
2657 * within command buffer array. */
2658 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2659 offsetof(struct iwl3945_cmd, hdr);
2660
2661 /* Add buffer containing Tx command and MAC(!) header to TFD's
2662 * first entry */
2663 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2664
2665 if (info->control.hw_key)
2666 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2667
2668 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2669 * if any (802.11 null frames have no payload). */
2670 len = skb->len - hdr_len;
2671 if (len) {
2672 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2673 len, PCI_DMA_TODEVICE);
2674 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2675 }
2676
2677 if (!len)
2678 /* If there is no payload, then we use only one Tx buffer */
2679 *control_flags = TFD_CTL_COUNT_SET(1);
2680 else
2681 /* Else use 2 buffers.
2682 * Tell 3945 about any padding after MAC header */
2683 *control_flags = TFD_CTL_COUNT_SET(2) |
2684 TFD_CTL_PAD_SET(U32_PAD(len));
2685
2686 /* Total # bytes to be transmitted */
2687 len = (u16)skb->len;
2688 out_cmd->cmd.tx.len = cpu_to_le16(len);
2689
2690 /* TODO need this for burst mode later on */
2691 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2692
2693 /* set is_hcca to 0; it probably will never be implemented */
2694 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2695
2696 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2697 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2698
2699 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2700 txq->need_update = 1;
2701 if (qc)
2702 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2703 } else {
2704 wait_write_ptr = 1;
2705 txq->need_update = 0;
2706 }
2707
2708 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2709 sizeof(out_cmd->cmd.tx));
2710
2711 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2712 ieee80211_get_hdrlen(le16_to_cpu(fc)));
2713
2714 /* Tell device the write index *just past* this latest filled TFD */
2715 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2716 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2717 spin_unlock_irqrestore(&priv->lock, flags);
2718
2719 if (rc)
2720 return rc;
2721
2722 if ((iwl3945_queue_space(q) < q->high_mark)
2723 && priv->mac80211_registered) {
2724 if (wait_write_ptr) {
2725 spin_lock_irqsave(&priv->lock, flags);
2726 txq->need_update = 1;
2727 iwl3945_tx_queue_update_write_ptr(priv, txq);
2728 spin_unlock_irqrestore(&priv->lock, flags);
2729 }
2730
2731 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2732 }
2733
2734 return 0;
2735
2736 drop_unlock:
2737 spin_unlock_irqrestore(&priv->lock, flags);
2738 drop:
2739 return -1;
2740 }
2741
2742 static void iwl3945_set_rate(struct iwl3945_priv *priv)
2743 {
2744 const struct ieee80211_supported_band *sband = NULL;
2745 struct ieee80211_rate *rate;
2746 int i;
2747
2748 sband = iwl3945_get_band(priv, priv->band);
2749 if (!sband) {
2750 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2751 return;
2752 }
2753
2754 priv->active_rate = 0;
2755 priv->active_rate_basic = 0;
2756
2757 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2758 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2759
2760 for (i = 0; i < sband->n_bitrates; i++) {
2761 rate = &sband->bitrates[i];
2762 if ((rate->hw_value < IWL_RATE_COUNT) &&
2763 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2764 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2765 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2766 priv->active_rate |= (1 << rate->hw_value);
2767 }
2768 }
2769
2770 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2771 priv->active_rate, priv->active_rate_basic);
2772
2773 /*
2774 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2775 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2776 * OFDM
2777 */
2778 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2779 priv->staging_rxon.cck_basic_rates =
2780 ((priv->active_rate_basic &
2781 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2782 else
2783 priv->staging_rxon.cck_basic_rates =
2784 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2785
2786 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2787 priv->staging_rxon.ofdm_basic_rates =
2788 ((priv->active_rate_basic &
2789 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2790 IWL_FIRST_OFDM_RATE) & 0xFF;
2791 else
2792 priv->staging_rxon.ofdm_basic_rates =
2793 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2794 }
2795
2796 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
2797 {
2798 unsigned long flags;
2799
2800 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2801 return;
2802
2803 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2804 disable_radio ? "OFF" : "ON");
2805
2806 if (disable_radio) {
2807 iwl3945_scan_cancel(priv);
2808 /* FIXME: This is a workaround for AP */
2809 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2810 spin_lock_irqsave(&priv->lock, flags);
2811 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
2812 CSR_UCODE_SW_BIT_RFKILL);
2813 spin_unlock_irqrestore(&priv->lock, flags);
2814 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2815 set_bit(STATUS_RF_KILL_SW, &priv->status);
2816 }
2817 return;
2818 }
2819
2820 spin_lock_irqsave(&priv->lock, flags);
2821 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2822
2823 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2824 spin_unlock_irqrestore(&priv->lock, flags);
2825
2826 /* wake up ucode */
2827 msleep(10);
2828
2829 spin_lock_irqsave(&priv->lock, flags);
2830 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2831 if (!iwl3945_grab_nic_access(priv))
2832 iwl3945_release_nic_access(priv);
2833 spin_unlock_irqrestore(&priv->lock, flags);
2834
2835 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2836 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2837 "disabled by HW switch\n");
2838 return;
2839 }
2840
2841 if (priv->is_open)
2842 queue_work(priv->workqueue, &priv->restart);
2843 return;
2844 }
2845
2846 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
2847 u32 decrypt_res, struct ieee80211_rx_status *stats)
2848 {
2849 u16 fc =
2850 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2851
2852 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2853 return;
2854
2855 if (!(fc & IEEE80211_FCTL_PROTECTED))
2856 return;
2857
2858 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2859 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2860 case RX_RES_STATUS_SEC_TYPE_TKIP:
2861 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2862 RX_RES_STATUS_BAD_ICV_MIC)
2863 stats->flag |= RX_FLAG_MMIC_ERROR;
2864 case RX_RES_STATUS_SEC_TYPE_WEP:
2865 case RX_RES_STATUS_SEC_TYPE_CCMP:
2866 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2867 RX_RES_STATUS_DECRYPT_OK) {
2868 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2869 stats->flag |= RX_FLAG_DECRYPTED;
2870 }
2871 break;
2872
2873 default:
2874 break;
2875 }
2876 }
2877
2878 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2879
2880 #include "iwl-spectrum.h"
2881
2882 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2883 #define BEACON_TIME_MASK_HIGH 0xFF000000
2884 #define TIME_UNIT 1024
2885
2886 /*
2887 * extended beacon time format
2888 * time in usec will be changed into a 32-bit value in 8:24 format
2889 * the high 1 byte is the beacon counts
2890 * the lower 3 bytes is the time in usec within one beacon interval
2891 */
2892
2893 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2894 {
2895 u32 quot;
2896 u32 rem;
2897 u32 interval = beacon_interval * 1024;
2898
2899 if (!interval || !usec)
2900 return 0;
2901
2902 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2903 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2904
2905 return (quot << 24) + rem;
2906 }
2907
2908 /* base is usually what we get from ucode with each received frame,
2909 * the same as HW timer counter counting down
2910 */
2911
2912 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2913 {
2914 u32 base_low = base & BEACON_TIME_MASK_LOW;
2915 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2916 u32 interval = beacon_interval * TIME_UNIT;
2917 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2918 (addon & BEACON_TIME_MASK_HIGH);
2919
2920 if (base_low > addon_low)
2921 res += base_low - addon_low;
2922 else if (base_low < addon_low) {
2923 res += interval + base_low - addon_low;
2924 res += (1 << 24);
2925 } else
2926 res += (1 << 24);
2927
2928 return cpu_to_le32(res);
2929 }
2930
2931 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
2932 struct ieee80211_measurement_params *params,
2933 u8 type)
2934 {
2935 struct iwl3945_spectrum_cmd spectrum;
2936 struct iwl3945_rx_packet *res;
2937 struct iwl3945_host_cmd cmd = {
2938 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2939 .data = (void *)&spectrum,
2940 .meta.flags = CMD_WANT_SKB,
2941 };
2942 u32 add_time = le64_to_cpu(params->start_time);
2943 int rc;
2944 int spectrum_resp_status;
2945 int duration = le16_to_cpu(params->duration);
2946
2947 if (iwl3945_is_associated(priv))
2948 add_time =
2949 iwl3945_usecs_to_beacons(
2950 le64_to_cpu(params->start_time) - priv->last_tsf,
2951 le16_to_cpu(priv->rxon_timing.beacon_interval));
2952
2953 memset(&spectrum, 0, sizeof(spectrum));
2954
2955 spectrum.channel_count = cpu_to_le16(1);
2956 spectrum.flags =
2957 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2958 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2959 cmd.len = sizeof(spectrum);
2960 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2961
2962 if (iwl3945_is_associated(priv))
2963 spectrum.start_time =
2964 iwl3945_add_beacon_time(priv->last_beacon_time,
2965 add_time,
2966 le16_to_cpu(priv->rxon_timing.beacon_interval));
2967 else
2968 spectrum.start_time = 0;
2969
2970 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2971 spectrum.channels[0].channel = params->channel;
2972 spectrum.channels[0].type = type;
2973 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2974 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2975 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2976
2977 rc = iwl3945_send_cmd_sync(priv, &cmd);
2978 if (rc)
2979 return rc;
2980
2981 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
2982 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2983 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2984 rc = -EIO;
2985 }
2986
2987 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2988 switch (spectrum_resp_status) {
2989 case 0: /* Command will be handled */
2990 if (res->u.spectrum.id != 0xff) {
2991 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2992 res->u.spectrum.id);
2993 priv->measurement_status &= ~MEASUREMENT_READY;
2994 }
2995 priv->measurement_status |= MEASUREMENT_ACTIVE;
2996 rc = 0;
2997 break;
2998
2999 case 1: /* Command will not be handled */
3000 rc = -EAGAIN;
3001 break;
3002 }
3003
3004 dev_kfree_skb_any(cmd.meta.u.skb);
3005
3006 return rc;
3007 }
3008 #endif
3009
3010 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3011 struct iwl3945_rx_mem_buffer *rxb)
3012 {
3013 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3014 struct iwl3945_alive_resp *palive;
3015 struct delayed_work *pwork;
3016
3017 palive = &pkt->u.alive_frame;
3018
3019 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3020 "0x%01X 0x%01X\n",
3021 palive->is_valid, palive->ver_type,
3022 palive->ver_subtype);
3023
3024 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3025 IWL_DEBUG_INFO("Initialization Alive received.\n");
3026 memcpy(&priv->card_alive_init,
3027 &pkt->u.alive_frame,
3028 sizeof(struct iwl3945_init_alive_resp));
3029 pwork = &priv->init_alive_start;
3030 } else {
3031 IWL_DEBUG_INFO("Runtime Alive received.\n");
3032 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3033 sizeof(struct iwl3945_alive_resp));
3034 pwork = &priv->alive_start;
3035 iwl3945_disable_events(priv);
3036 }
3037
3038 /* We delay the ALIVE response by 5ms to
3039 * give the HW RF Kill time to activate... */
3040 if (palive->is_valid == UCODE_VALID_OK)
3041 queue_delayed_work(priv->workqueue, pwork,
3042 msecs_to_jiffies(5));
3043 else
3044 IWL_WARNING("uCode did not respond OK.\n");
3045 }
3046
3047 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3048 struct iwl3945_rx_mem_buffer *rxb)
3049 {
3050 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3051
3052 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3053 return;
3054 }
3055
3056 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3057 struct iwl3945_rx_mem_buffer *rxb)
3058 {
3059 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3060
3061 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3062 "seq 0x%04X ser 0x%08X\n",
3063 le32_to_cpu(pkt->u.err_resp.error_type),
3064 get_cmd_string(pkt->u.err_resp.cmd_id),
3065 pkt->u.err_resp.cmd_id,
3066 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3067 le32_to_cpu(pkt->u.err_resp.error_info));
3068 }
3069
3070 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3071
3072 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3073 {
3074 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3075 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3076 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3077 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3078 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3079 rxon->channel = csa->channel;
3080 priv->staging_rxon.channel = csa->channel;
3081 }
3082
3083 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3084 struct iwl3945_rx_mem_buffer *rxb)
3085 {
3086 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3087 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3088 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3089
3090 if (!report->state) {
3091 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3092 "Spectrum Measure Notification: Start\n");
3093 return;
3094 }
3095
3096 memcpy(&priv->measure_report, report, sizeof(*report));
3097 priv->measurement_status |= MEASUREMENT_READY;
3098 #endif
3099 }
3100
3101 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3102 struct iwl3945_rx_mem_buffer *rxb)
3103 {
3104 #ifdef CONFIG_IWL3945_DEBUG
3105 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3106 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3107 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3108 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3109 #endif
3110 }
3111
3112 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3113 struct iwl3945_rx_mem_buffer *rxb)
3114 {
3115 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3116 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3117 "notification for %s:\n",
3118 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3119 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3120 }
3121
3122 static void iwl3945_bg_beacon_update(struct work_struct *work)
3123 {
3124 struct iwl3945_priv *priv =
3125 container_of(work, struct iwl3945_priv, beacon_update);
3126 struct sk_buff *beacon;
3127
3128 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3129 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
3130
3131 if (!beacon) {
3132 IWL_ERROR("update beacon failed\n");
3133 return;
3134 }
3135
3136 mutex_lock(&priv->mutex);
3137 /* new beacon skb is allocated every time; dispose previous.*/
3138 if (priv->ibss_beacon)
3139 dev_kfree_skb(priv->ibss_beacon);
3140
3141 priv->ibss_beacon = beacon;
3142 mutex_unlock(&priv->mutex);
3143
3144 iwl3945_send_beacon_cmd(priv);
3145 }
3146
3147 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3148 struct iwl3945_rx_mem_buffer *rxb)
3149 {
3150 #ifdef CONFIG_IWL3945_DEBUG
3151 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3152 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3153 u8 rate = beacon->beacon_notify_hdr.rate;
3154
3155 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3156 "tsf %d %d rate %d\n",
3157 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3158 beacon->beacon_notify_hdr.failure_frame,
3159 le32_to_cpu(beacon->ibss_mgr_status),
3160 le32_to_cpu(beacon->high_tsf),
3161 le32_to_cpu(beacon->low_tsf), rate);
3162 #endif
3163
3164 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3165 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3166 queue_work(priv->workqueue, &priv->beacon_update);
3167 }
3168
3169 /* Service response to REPLY_SCAN_CMD (0x80) */
3170 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3171 struct iwl3945_rx_mem_buffer *rxb)
3172 {
3173 #ifdef CONFIG_IWL3945_DEBUG
3174 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3175 struct iwl3945_scanreq_notification *notif =
3176 (struct iwl3945_scanreq_notification *)pkt->u.raw;
3177
3178 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3179 #endif
3180 }
3181
3182 /* Service SCAN_START_NOTIFICATION (0x82) */
3183 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3184 struct iwl3945_rx_mem_buffer *rxb)
3185 {
3186 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3187 struct iwl3945_scanstart_notification *notif =
3188 (struct iwl3945_scanstart_notification *)pkt->u.raw;
3189 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3190 IWL_DEBUG_SCAN("Scan start: "
3191 "%d [802.11%s] "
3192 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3193 notif->channel,
3194 notif->band ? "bg" : "a",
3195 notif->tsf_high,
3196 notif->tsf_low, notif->status, notif->beacon_timer);
3197 }
3198
3199 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3200 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3201 struct iwl3945_rx_mem_buffer *rxb)
3202 {
3203 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3204 struct iwl3945_scanresults_notification *notif =
3205 (struct iwl3945_scanresults_notification *)pkt->u.raw;
3206
3207 IWL_DEBUG_SCAN("Scan ch.res: "
3208 "%d [802.11%s] "
3209 "(TSF: 0x%08X:%08X) - %d "
3210 "elapsed=%lu usec (%dms since last)\n",
3211 notif->channel,
3212 notif->band ? "bg" : "a",
3213 le32_to_cpu(notif->tsf_high),
3214 le32_to_cpu(notif->tsf_low),
3215 le32_to_cpu(notif->statistics[0]),
3216 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3217 jiffies_to_msecs(elapsed_jiffies
3218 (priv->last_scan_jiffies, jiffies)));
3219
3220 priv->last_scan_jiffies = jiffies;
3221 priv->next_scan_jiffies = 0;
3222 }
3223
3224 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3225 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3226 struct iwl3945_rx_mem_buffer *rxb)
3227 {
3228 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3229 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3230
3231 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3232 scan_notif->scanned_channels,
3233 scan_notif->tsf_low,
3234 scan_notif->tsf_high, scan_notif->status);
3235
3236 /* The HW is no longer scanning */
3237 clear_bit(STATUS_SCAN_HW, &priv->status);
3238
3239 /* The scan completion notification came in, so kill that timer... */
3240 cancel_delayed_work(&priv->scan_check);
3241
3242 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3243 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3244 "2.4" : "5.2",
3245 jiffies_to_msecs(elapsed_jiffies
3246 (priv->scan_pass_start, jiffies)));
3247
3248 /* Remove this scanned band from the list of pending
3249 * bands to scan, band G precedes A in order of scanning
3250 * as seen in iwl3945_bg_request_scan */
3251 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3252 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3253 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3254 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3255
3256 /* If a request to abort was given, or the scan did not succeed
3257 * then we reset the scan state machine and terminate,
3258 * re-queuing another scan if one has been requested */
3259 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3260 IWL_DEBUG_INFO("Aborted scan completed.\n");
3261 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3262 } else {
3263 /* If there are more bands on this scan pass reschedule */
3264 if (priv->scan_bands > 0)
3265 goto reschedule;
3266 }
3267
3268 priv->last_scan_jiffies = jiffies;
3269 priv->next_scan_jiffies = 0;
3270 IWL_DEBUG_INFO("Setting scan to off\n");
3271
3272 clear_bit(STATUS_SCANNING, &priv->status);
3273
3274 IWL_DEBUG_INFO("Scan took %dms\n",
3275 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3276
3277 queue_work(priv->workqueue, &priv->scan_completed);
3278
3279 return;
3280
3281 reschedule:
3282 priv->scan_pass_start = jiffies;
3283 queue_work(priv->workqueue, &priv->request_scan);
3284 }
3285
3286 /* Handle notification from uCode that card's power state is changing
3287 * due to software, hardware, or critical temperature RFKILL */
3288 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3289 struct iwl3945_rx_mem_buffer *rxb)
3290 {
3291 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3292 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3293 unsigned long status = priv->status;
3294
3295 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3296 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3297 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3298
3299 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3300 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3301
3302 if (flags & HW_CARD_DISABLED)
3303 set_bit(STATUS_RF_KILL_HW, &priv->status);
3304 else
3305 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3306
3307
3308 if (flags & SW_CARD_DISABLED)
3309 set_bit(STATUS_RF_KILL_SW, &priv->status);
3310 else
3311 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3312
3313 iwl3945_scan_cancel(priv);
3314
3315 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3316 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3317 (test_bit(STATUS_RF_KILL_SW, &status) !=
3318 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3319 queue_work(priv->workqueue, &priv->rf_kill);
3320 else
3321 wake_up_interruptible(&priv->wait_command_queue);
3322 }
3323
3324 /**
3325 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3326 *
3327 * Setup the RX handlers for each of the reply types sent from the uCode
3328 * to the host.
3329 *
3330 * This function chains into the hardware specific files for them to setup
3331 * any hardware specific handlers as well.
3332 */
3333 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3334 {
3335 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3336 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3337 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3338 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3339 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3340 iwl3945_rx_spectrum_measure_notif;
3341 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3342 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3343 iwl3945_rx_pm_debug_statistics_notif;
3344 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3345
3346 /*
3347 * The same handler is used for both the REPLY to a discrete
3348 * statistics request from the host as well as for the periodic
3349 * statistics notifications (after received beacons) from the uCode.
3350 */
3351 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3352 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3353
3354 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3355 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3356 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3357 iwl3945_rx_scan_results_notif;
3358 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3359 iwl3945_rx_scan_complete_notif;
3360 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3361
3362 /* Set up hardware specific Rx handlers */
3363 iwl3945_hw_rx_handler_setup(priv);
3364 }
3365
3366 /**
3367 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3368 * When FW advances 'R' index, all entries between old and new 'R' index
3369 * need to be reclaimed.
3370 */
3371 static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3372 int txq_id, int index)
3373 {
3374 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3375 struct iwl3945_queue *q = &txq->q;
3376 int nfreed = 0;
3377
3378 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3379 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3380 "is out of range [0-%d] %d %d.\n", txq_id,
3381 index, q->n_bd, q->write_ptr, q->read_ptr);
3382 return;
3383 }
3384
3385 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3386 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3387 if (nfreed > 1) {
3388 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3389 q->write_ptr, q->read_ptr);
3390 queue_work(priv->workqueue, &priv->restart);
3391 break;
3392 }
3393 nfreed++;
3394 }
3395 }
3396
3397
3398 /**
3399 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3400 * @rxb: Rx buffer to reclaim
3401 *
3402 * If an Rx buffer has an async callback associated with it the callback
3403 * will be executed. The attached skb (if present) will only be freed
3404 * if the callback returns 1
3405 */
3406 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3407 struct iwl3945_rx_mem_buffer *rxb)
3408 {
3409 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3410 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3411 int txq_id = SEQ_TO_QUEUE(sequence);
3412 int index = SEQ_TO_INDEX(sequence);
3413 int huge = sequence & SEQ_HUGE_FRAME;
3414 int cmd_index;
3415 struct iwl3945_cmd *cmd;
3416
3417 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3418
3419 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3420 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3421
3422 /* Input error checking is done when commands are added to queue. */
3423 if (cmd->meta.flags & CMD_WANT_SKB) {
3424 cmd->meta.source->u.skb = rxb->skb;
3425 rxb->skb = NULL;
3426 } else if (cmd->meta.u.callback &&
3427 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3428 rxb->skb = NULL;
3429
3430 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3431
3432 if (!(cmd->meta.flags & CMD_ASYNC)) {
3433 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3434 wake_up_interruptible(&priv->wait_command_queue);
3435 }
3436 }
3437
3438 /************************** RX-FUNCTIONS ****************************/
3439 /*
3440 * Rx theory of operation
3441 *
3442 * The host allocates 32 DMA target addresses and passes the host address
3443 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3444 * 0 to 31
3445 *
3446 * Rx Queue Indexes
3447 * The host/firmware share two index registers for managing the Rx buffers.
3448 *
3449 * The READ index maps to the first position that the firmware may be writing
3450 * to -- the driver can read up to (but not including) this position and get
3451 * good data.
3452 * The READ index is managed by the firmware once the card is enabled.
3453 *
3454 * The WRITE index maps to the last position the driver has read from -- the
3455 * position preceding WRITE is the last slot the firmware can place a packet.
3456 *
3457 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3458 * WRITE = READ.
3459 *
3460 * During initialization, the host sets up the READ queue position to the first
3461 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3462 *
3463 * When the firmware places a packet in a buffer, it will advance the READ index
3464 * and fire the RX interrupt. The driver can then query the READ index and
3465 * process as many packets as possible, moving the WRITE index forward as it
3466 * resets the Rx queue buffers with new memory.
3467 *
3468 * The management in the driver is as follows:
3469 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3470 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3471 * to replenish the iwl->rxq->rx_free.
3472 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3473 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3474 * 'processed' and 'read' driver indexes as well)
3475 * + A received packet is processed and handed to the kernel network stack,
3476 * detached from the iwl->rxq. The driver 'processed' index is updated.
3477 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3478 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3479 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3480 * were enough free buffers and RX_STALLED is set it is cleared.
3481 *
3482 *
3483 * Driver sequence:
3484 *
3485 * iwl3945_rx_queue_alloc() Allocates rx_free
3486 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3487 * iwl3945_rx_queue_restock
3488 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3489 * queue, updates firmware pointers, and updates
3490 * the WRITE index. If insufficient rx_free buffers
3491 * are available, schedules iwl3945_rx_replenish
3492 *
3493 * -- enable interrupts --
3494 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3495 * READ INDEX, detaching the SKB from the pool.
3496 * Moves the packet buffer from queue to rx_used.
3497 * Calls iwl3945_rx_queue_restock to refill any empty
3498 * slots.
3499 * ...
3500 *
3501 */
3502
3503 /**
3504 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3505 */
3506 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3507 {
3508 int s = q->read - q->write;
3509 if (s <= 0)
3510 s += RX_QUEUE_SIZE;
3511 /* keep some buffer to not confuse full and empty queue */
3512 s -= 2;
3513 if (s < 0)
3514 s = 0;
3515 return s;
3516 }
3517
3518 /**
3519 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3520 */
3521 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3522 {
3523 u32 reg = 0;
3524 int rc = 0;
3525 unsigned long flags;
3526
3527 spin_lock_irqsave(&q->lock, flags);
3528
3529 if (q->need_update == 0)
3530 goto exit_unlock;
3531
3532 /* If power-saving is in use, make sure device is awake */
3533 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3534 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3535
3536 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3537 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3538 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3539 goto exit_unlock;
3540 }
3541
3542 rc = iwl3945_grab_nic_access(priv);
3543 if (rc)
3544 goto exit_unlock;
3545
3546 /* Device expects a multiple of 8 */
3547 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3548 q->write & ~0x7);
3549 iwl3945_release_nic_access(priv);
3550
3551 /* Else device is assumed to be awake */
3552 } else
3553 /* Device expects a multiple of 8 */
3554 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3555
3556
3557 q->need_update = 0;
3558
3559 exit_unlock:
3560 spin_unlock_irqrestore(&q->lock, flags);
3561 return rc;
3562 }
3563
3564 /**
3565 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3566 */
3567 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3568 dma_addr_t dma_addr)
3569 {
3570 return cpu_to_le32((u32)dma_addr);
3571 }
3572
3573 /**
3574 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3575 *
3576 * If there are slots in the RX queue that need to be restocked,
3577 * and we have free pre-allocated buffers, fill the ranks as much
3578 * as we can, pulling from rx_free.
3579 *
3580 * This moves the 'write' index forward to catch up with 'processed', and
3581 * also updates the memory address in the firmware to reference the new
3582 * target buffer.
3583 */
3584 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3585 {
3586 struct iwl3945_rx_queue *rxq = &priv->rxq;
3587 struct list_head *element;
3588 struct iwl3945_rx_mem_buffer *rxb;
3589 unsigned long flags;
3590 int write, rc;
3591
3592 spin_lock_irqsave(&rxq->lock, flags);
3593 write = rxq->write & ~0x7;
3594 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3595 /* Get next free Rx buffer, remove from free list */
3596 element = rxq->rx_free.next;
3597 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3598 list_del(element);
3599
3600 /* Point to Rx buffer via next RBD in circular buffer */
3601 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
3602 rxq->queue[rxq->write] = rxb;
3603 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3604 rxq->free_count--;
3605 }
3606 spin_unlock_irqrestore(&rxq->lock, flags);
3607 /* If the pre-allocated buffer pool is dropping low, schedule to
3608 * refill it */
3609 if (rxq->free_count <= RX_LOW_WATERMARK)
3610 queue_work(priv->workqueue, &priv->rx_replenish);
3611
3612
3613 /* If we've added more space for the firmware to place data, tell it.
3614 * Increment device's write pointer in multiples of 8. */
3615 if ((write != (rxq->write & ~0x7))
3616 || (abs(rxq->write - rxq->read) > 7)) {
3617 spin_lock_irqsave(&rxq->lock, flags);
3618 rxq->need_update = 1;
3619 spin_unlock_irqrestore(&rxq->lock, flags);
3620 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3621 if (rc)
3622 return rc;
3623 }
3624
3625 return 0;
3626 }
3627
3628 /**
3629 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3630 *
3631 * When moving to rx_free an SKB is allocated for the slot.
3632 *
3633 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3634 * This is called as a scheduled work item (except for during initialization)
3635 */
3636 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
3637 {
3638 struct iwl3945_rx_queue *rxq = &priv->rxq;
3639 struct list_head *element;
3640 struct iwl3945_rx_mem_buffer *rxb;
3641 unsigned long flags;
3642 spin_lock_irqsave(&rxq->lock, flags);
3643 while (!list_empty(&rxq->rx_used)) {
3644 element = rxq->rx_used.next;
3645 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
3646
3647 /* Alloc a new receive buffer */
3648 rxb->skb =
3649 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3650 if (!rxb->skb) {
3651 if (net_ratelimit())
3652 printk(KERN_CRIT DRV_NAME
3653 ": Can not allocate SKB buffers\n");
3654 /* We don't reschedule replenish work here -- we will
3655 * call the restock method and if it still needs
3656 * more buffers it will schedule replenish */
3657 break;
3658 }
3659
3660 /* If radiotap head is required, reserve some headroom here.
3661 * The physical head count is a variable rx_stats->phy_count.
3662 * We reserve 4 bytes here. Plus these extra bytes, the
3663 * headroom of the physical head should be enough for the
3664 * radiotap head that iwl3945 supported. See iwl3945_rt.
3665 */
3666 skb_reserve(rxb->skb, 4);
3667
3668 priv->alloc_rxb_skb++;
3669 list_del(element);
3670
3671 /* Get physical address of RB/SKB */
3672 rxb->dma_addr =
3673 pci_map_single(priv->pci_dev, rxb->skb->data,
3674 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3675 list_add_tail(&rxb->list, &rxq->rx_free);
3676 rxq->free_count++;
3677 }
3678 spin_unlock_irqrestore(&rxq->lock, flags);
3679 }
3680
3681 /*
3682 * this should be called while priv->lock is locked
3683 */
3684 static void __iwl3945_rx_replenish(void *data)
3685 {
3686 struct iwl3945_priv *priv = data;
3687
3688 iwl3945_rx_allocate(priv);
3689 iwl3945_rx_queue_restock(priv);
3690 }
3691
3692
3693 void iwl3945_rx_replenish(void *data)
3694 {
3695 struct iwl3945_priv *priv = data;
3696 unsigned long flags;
3697
3698 iwl3945_rx_allocate(priv);
3699
3700 spin_lock_irqsave(&priv->lock, flags);
3701 iwl3945_rx_queue_restock(priv);
3702 spin_unlock_irqrestore(&priv->lock, flags);
3703 }
3704
3705 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3706 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3707 * This free routine walks the list of POOL entries and if SKB is set to
3708 * non NULL it is unmapped and freed
3709 */
3710 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3711 {
3712 int i;
3713 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3714 if (rxq->pool[i].skb != NULL) {
3715 pci_unmap_single(priv->pci_dev,
3716 rxq->pool[i].dma_addr,
3717 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3718 dev_kfree_skb(rxq->pool[i].skb);
3719 }
3720 }
3721
3722 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3723 rxq->dma_addr);
3724 rxq->bd = NULL;
3725 }
3726
3727 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
3728 {
3729 struct iwl3945_rx_queue *rxq = &priv->rxq;
3730 struct pci_dev *dev = priv->pci_dev;
3731 int i;
3732
3733 spin_lock_init(&rxq->lock);
3734 INIT_LIST_HEAD(&rxq->rx_free);
3735 INIT_LIST_HEAD(&rxq->rx_used);
3736
3737 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3738 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3739 if (!rxq->bd)
3740 return -ENOMEM;
3741
3742 /* Fill the rx_used queue with _all_ of the Rx buffers */
3743 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3744 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3745
3746 /* Set us so that we have processed and used all buffers, but have
3747 * not restocked the Rx queue with fresh buffers */
3748 rxq->read = rxq->write = 0;
3749 rxq->free_count = 0;
3750 rxq->need_update = 0;
3751 return 0;
3752 }
3753
3754 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
3755 {
3756 unsigned long flags;
3757 int i;
3758 spin_lock_irqsave(&rxq->lock, flags);
3759 INIT_LIST_HEAD(&rxq->rx_free);
3760 INIT_LIST_HEAD(&rxq->rx_used);
3761 /* Fill the rx_used queue with _all_ of the Rx buffers */
3762 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3763 /* In the reset function, these buffers may have been allocated
3764 * to an SKB, so we need to unmap and free potential storage */
3765 if (rxq->pool[i].skb != NULL) {
3766 pci_unmap_single(priv->pci_dev,
3767 rxq->pool[i].dma_addr,
3768 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3769 priv->alloc_rxb_skb--;
3770 dev_kfree_skb(rxq->pool[i].skb);
3771 rxq->pool[i].skb = NULL;
3772 }
3773 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3774 }
3775
3776 /* Set us so that we have processed and used all buffers, but have
3777 * not restocked the Rx queue with fresh buffers */
3778 rxq->read = rxq->write = 0;
3779 rxq->free_count = 0;
3780 spin_unlock_irqrestore(&rxq->lock, flags);
3781 }
3782
3783 /* Convert linear signal-to-noise ratio into dB */
3784 static u8 ratio2dB[100] = {
3785 /* 0 1 2 3 4 5 6 7 8 9 */
3786 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3787 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3788 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3789 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3790 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3791 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3792 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3793 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3794 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3795 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3796 };
3797
3798 /* Calculates a relative dB value from a ratio of linear
3799 * (i.e. not dB) signal levels.
3800 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3801 int iwl3945_calc_db_from_ratio(int sig_ratio)
3802 {
3803 /* 1000:1 or higher just report as 60 dB */
3804 if (sig_ratio >= 1000)
3805 return 60;
3806
3807 /* 100:1 or higher, divide by 10 and use table,
3808 * add 20 dB to make up for divide by 10 */
3809 if (sig_ratio >= 100)
3810 return 20 + (int)ratio2dB[sig_ratio/10];
3811
3812 /* We shouldn't see this */
3813 if (sig_ratio < 1)
3814 return 0;
3815
3816 /* Use table for ratios 1:1 - 99:1 */
3817 return (int)ratio2dB[sig_ratio];
3818 }
3819
3820 #define PERFECT_RSSI (-20) /* dBm */
3821 #define WORST_RSSI (-95) /* dBm */
3822 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3823
3824 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3825 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3826 * about formulas used below. */
3827 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3828 {
3829 int sig_qual;
3830 int degradation = PERFECT_RSSI - rssi_dbm;
3831
3832 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3833 * as indicator; formula is (signal dbm - noise dbm).
3834 * SNR at or above 40 is a great signal (100%).
3835 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3836 * Weakest usable signal is usually 10 - 15 dB SNR. */
3837 if (noise_dbm) {
3838 if (rssi_dbm - noise_dbm >= 40)
3839 return 100;
3840 else if (rssi_dbm < noise_dbm)
3841 return 0;
3842 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3843
3844 /* Else use just the signal level.
3845 * This formula is a least squares fit of data points collected and
3846 * compared with a reference system that had a percentage (%) display
3847 * for signal quality. */
3848 } else
3849 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3850 (15 * RSSI_RANGE + 62 * degradation)) /
3851 (RSSI_RANGE * RSSI_RANGE);
3852
3853 if (sig_qual > 100)
3854 sig_qual = 100;
3855 else if (sig_qual < 1)
3856 sig_qual = 0;
3857
3858 return sig_qual;
3859 }
3860
3861 /**
3862 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3863 *
3864 * Uses the priv->rx_handlers callback function array to invoke
3865 * the appropriate handlers, including command responses,
3866 * frame-received notifications, and other notifications.
3867 */
3868 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
3869 {
3870 struct iwl3945_rx_mem_buffer *rxb;
3871 struct iwl3945_rx_packet *pkt;
3872 struct iwl3945_rx_queue *rxq = &priv->rxq;
3873 u32 r, i;
3874 int reclaim;
3875 unsigned long flags;
3876 u8 fill_rx = 0;
3877 u32 count = 8;
3878
3879 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3880 * buffer that the driver may process (last buffer filled by ucode). */
3881 r = iwl3945_hw_get_rx_read(priv);
3882 i = rxq->read;
3883
3884 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3885 fill_rx = 1;
3886 /* Rx interrupt, but nothing sent from uCode */
3887 if (i == r)
3888 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3889
3890 while (i != r) {
3891 rxb = rxq->queue[i];
3892
3893 /* If an RXB doesn't have a Rx queue slot associated with it,
3894 * then a bug has been introduced in the queue refilling
3895 * routines -- catch it here */
3896 BUG_ON(rxb == NULL);
3897
3898 rxq->queue[i] = NULL;
3899
3900 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
3901 IWL_RX_BUF_SIZE,
3902 PCI_DMA_FROMDEVICE);
3903 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3904
3905 /* Reclaim a command buffer only if this packet is a response
3906 * to a (driver-originated) command.
3907 * If the packet (e.g. Rx frame) originated from uCode,
3908 * there is no command buffer to reclaim.
3909 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3910 * but apparently a few don't get set; catch them here. */
3911 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3912 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3913 (pkt->hdr.cmd != REPLY_TX);
3914
3915 /* Based on type of command response or notification,
3916 * handle those that need handling via function in
3917 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3918 if (priv->rx_handlers[pkt->hdr.cmd]) {
3919 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3920 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3921 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3922 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3923 } else {
3924 /* No handling needed */
3925 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
3926 "r %d i %d No handler needed for %s, 0x%02x\n",
3927 r, i, get_cmd_string(pkt->hdr.cmd),
3928 pkt->hdr.cmd);
3929 }
3930
3931 if (reclaim) {
3932 /* Invoke any callbacks, transfer the skb to caller, and
3933 * fire off the (possibly) blocking iwl3945_send_cmd()
3934 * as we reclaim the driver command queue */
3935 if (rxb && rxb->skb)
3936 iwl3945_tx_cmd_complete(priv, rxb);
3937 else
3938 IWL_WARNING("Claim null rxb?\n");
3939 }
3940
3941 /* For now we just don't re-use anything. We can tweak this
3942 * later to try and re-use notification packets and SKBs that
3943 * fail to Rx correctly */
3944 if (rxb->skb != NULL) {
3945 priv->alloc_rxb_skb--;
3946 dev_kfree_skb_any(rxb->skb);
3947 rxb->skb = NULL;
3948 }
3949
3950 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
3951 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3952 spin_lock_irqsave(&rxq->lock, flags);
3953 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3954 spin_unlock_irqrestore(&rxq->lock, flags);
3955 i = (i + 1) & RX_QUEUE_MASK;
3956 /* If there are a lot of unused frames,
3957 * restock the Rx queue so ucode won't assert. */
3958 if (fill_rx) {
3959 count++;
3960 if (count >= 8) {
3961 priv->rxq.read = i;
3962 __iwl3945_rx_replenish(priv);
3963 count = 0;
3964 }
3965 }
3966 }
3967
3968 /* Backtrack one entry */
3969 priv->rxq.read = i;
3970 iwl3945_rx_queue_restock(priv);
3971 }
3972
3973 /**
3974 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3975 */
3976 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
3977 struct iwl3945_tx_queue *txq)
3978 {
3979 u32 reg = 0;
3980 int rc = 0;
3981 int txq_id = txq->q.id;
3982
3983 if (txq->need_update == 0)
3984 return rc;
3985
3986 /* if we're trying to save power */
3987 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3988 /* wake up nic if it's powered down ...
3989 * uCode will wake up, and interrupt us again, so next
3990 * time we'll skip this part. */
3991 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3992
3993 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3994 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3995 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3996 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3997 return rc;
3998 }
3999
4000 /* restore this queue's parameters in nic hardware. */
4001 rc = iwl3945_grab_nic_access(priv);
4002 if (rc)
4003 return rc;
4004 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
4005 txq->q.write_ptr | (txq_id << 8));
4006 iwl3945_release_nic_access(priv);
4007
4008 /* else not in power-save mode, uCode will never sleep when we're
4009 * trying to tx (during RFKILL, we're not trying to tx). */
4010 } else
4011 iwl3945_write32(priv, HBUS_TARG_WRPTR,
4012 txq->q.write_ptr | (txq_id << 8));
4013
4014 txq->need_update = 0;
4015
4016 return rc;
4017 }
4018
4019 #ifdef CONFIG_IWL3945_DEBUG
4020 static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
4021 {
4022 DECLARE_MAC_BUF(mac);
4023
4024 IWL_DEBUG_RADIO("RX CONFIG:\n");
4025 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4026 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4027 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4028 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4029 le32_to_cpu(rxon->filter_flags));
4030 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4031 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4032 rxon->ofdm_basic_rates);
4033 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4034 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4035 print_mac(mac, rxon->node_addr));
4036 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4037 print_mac(mac, rxon->bssid_addr));
4038 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4039 }
4040 #endif
4041
4042 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
4043 {
4044 IWL_DEBUG_ISR("Enabling interrupts\n");
4045 set_bit(STATUS_INT_ENABLED, &priv->status);
4046 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4047 }
4048
4049
4050 /* call this function to flush any scheduled tasklet */
4051 static inline void iwl_synchronize_irq(struct iwl3945_priv *priv)
4052 {
4053 /* wait to make sure we flush pedding tasklet*/
4054 synchronize_irq(priv->pci_dev->irq);
4055 tasklet_kill(&priv->irq_tasklet);
4056 }
4057
4058
4059 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
4060 {
4061 clear_bit(STATUS_INT_ENABLED, &priv->status);
4062
4063 /* disable interrupts from uCode/NIC to host */
4064 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4065
4066 /* acknowledge/clear/reset any interrupts still pending
4067 * from uCode or flow handler (Rx/Tx DMA) */
4068 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4069 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4070 IWL_DEBUG_ISR("Disabled interrupts\n");
4071 }
4072
4073 static const char *desc_lookup(int i)
4074 {
4075 switch (i) {
4076 case 1:
4077 return "FAIL";
4078 case 2:
4079 return "BAD_PARAM";
4080 case 3:
4081 return "BAD_CHECKSUM";
4082 case 4:
4083 return "NMI_INTERRUPT";
4084 case 5:
4085 return "SYSASSERT";
4086 case 6:
4087 return "FATAL_ERROR";
4088 }
4089
4090 return "UNKNOWN";
4091 }
4092
4093 #define ERROR_START_OFFSET (1 * sizeof(u32))
4094 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4095
4096 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4097 {
4098 u32 i;
4099 u32 desc, time, count, base, data1;
4100 u32 blink1, blink2, ilink1, ilink2;
4101 int rc;
4102
4103 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4104
4105 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4106 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4107 return;
4108 }
4109
4110 rc = iwl3945_grab_nic_access(priv);
4111 if (rc) {
4112 IWL_WARNING("Can not read from adapter at this time.\n");
4113 return;
4114 }
4115
4116 count = iwl3945_read_targ_mem(priv, base);
4117
4118 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4119 IWL_ERROR("Start IWL Error Log Dump:\n");
4120 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
4121 }
4122
4123 IWL_ERROR("Desc Time asrtPC blink2 "
4124 "ilink1 nmiPC Line\n");
4125 for (i = ERROR_START_OFFSET;
4126 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4127 i += ERROR_ELEM_SIZE) {
4128 desc = iwl3945_read_targ_mem(priv, base + i);
4129 time =
4130 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4131 blink1 =
4132 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4133 blink2 =
4134 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4135 ilink1 =
4136 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4137 ilink2 =
4138 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4139 data1 =
4140 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4141
4142 IWL_ERROR
4143 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4144 desc_lookup(desc), desc, time, blink1, blink2,
4145 ilink1, ilink2, data1);
4146 }
4147
4148 iwl3945_release_nic_access(priv);
4149
4150 }
4151
4152 #define EVENT_START_OFFSET (6 * sizeof(u32))
4153
4154 /**
4155 * iwl3945_print_event_log - Dump error event log to syslog
4156 *
4157 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4158 */
4159 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4160 u32 num_events, u32 mode)
4161 {
4162 u32 i;
4163 u32 base; /* SRAM byte address of event log header */
4164 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4165 u32 ptr; /* SRAM byte address of log data */
4166 u32 ev, time, data; /* event log data */
4167
4168 if (num_events == 0)
4169 return;
4170
4171 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4172
4173 if (mode == 0)
4174 event_size = 2 * sizeof(u32);
4175 else
4176 event_size = 3 * sizeof(u32);
4177
4178 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4179
4180 /* "time" is actually "data" for mode 0 (no timestamp).
4181 * place event id # at far right for easier visual parsing. */
4182 for (i = 0; i < num_events; i++) {
4183 ev = iwl3945_read_targ_mem(priv, ptr);
4184 ptr += sizeof(u32);
4185 time = iwl3945_read_targ_mem(priv, ptr);
4186 ptr += sizeof(u32);
4187 if (mode == 0)
4188 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4189 else {
4190 data = iwl3945_read_targ_mem(priv, ptr);
4191 ptr += sizeof(u32);
4192 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4193 }
4194 }
4195 }
4196
4197 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4198 {
4199 int rc;
4200 u32 base; /* SRAM byte address of event log header */
4201 u32 capacity; /* event log capacity in # entries */
4202 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4203 u32 num_wraps; /* # times uCode wrapped to top of log */
4204 u32 next_entry; /* index of next entry to be written by uCode */
4205 u32 size; /* # entries that we'll print */
4206
4207 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4208 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4209 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4210 return;
4211 }
4212
4213 rc = iwl3945_grab_nic_access(priv);
4214 if (rc) {
4215 IWL_WARNING("Can not read from adapter at this time.\n");
4216 return;
4217 }
4218
4219 /* event log header */
4220 capacity = iwl3945_read_targ_mem(priv, base);
4221 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4222 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4223 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4224
4225 size = num_wraps ? capacity : next_entry;
4226
4227 /* bail out if nothing in log */
4228 if (size == 0) {
4229 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4230 iwl3945_release_nic_access(priv);
4231 return;
4232 }
4233
4234 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4235 size, num_wraps);
4236
4237 /* if uCode has wrapped back to top of log, start at the oldest entry,
4238 * i.e the next one that uCode would fill. */
4239 if (num_wraps)
4240 iwl3945_print_event_log(priv, next_entry,
4241 capacity - next_entry, mode);
4242
4243 /* (then/else) start at top of log */
4244 iwl3945_print_event_log(priv, 0, next_entry, mode);
4245
4246 iwl3945_release_nic_access(priv);
4247 }
4248
4249 /**
4250 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4251 */
4252 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4253 {
4254 /* Set the FW error flag -- cleared on iwl3945_down */
4255 set_bit(STATUS_FW_ERROR, &priv->status);
4256
4257 /* Cancel currently queued command. */
4258 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4259
4260 #ifdef CONFIG_IWL3945_DEBUG
4261 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4262 iwl3945_dump_nic_error_log(priv);
4263 iwl3945_dump_nic_event_log(priv);
4264 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4265 }
4266 #endif
4267
4268 wake_up_interruptible(&priv->wait_command_queue);
4269
4270 /* Keep the restart process from trying to send host
4271 * commands by clearing the INIT status bit */
4272 clear_bit(STATUS_READY, &priv->status);
4273
4274 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4275 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4276 "Restarting adapter due to uCode error.\n");
4277
4278 if (iwl3945_is_associated(priv)) {
4279 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4280 sizeof(priv->recovery_rxon));
4281 priv->error_recovering = 1;
4282 }
4283 queue_work(priv->workqueue, &priv->restart);
4284 }
4285 }
4286
4287 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4288 {
4289 unsigned long flags;
4290
4291 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4292 sizeof(priv->staging_rxon));
4293 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4294 iwl3945_commit_rxon(priv);
4295
4296 iwl3945_add_station(priv, priv->bssid, 1, 0);
4297
4298 spin_lock_irqsave(&priv->lock, flags);
4299 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4300 priv->error_recovering = 0;
4301 spin_unlock_irqrestore(&priv->lock, flags);
4302 }
4303
4304 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4305 {
4306 u32 inta, handled = 0;
4307 u32 inta_fh;
4308 unsigned long flags;
4309 #ifdef CONFIG_IWL3945_DEBUG
4310 u32 inta_mask;
4311 #endif
4312
4313 spin_lock_irqsave(&priv->lock, flags);
4314
4315 /* Ack/clear/reset pending uCode interrupts.
4316 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4317 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4318 inta = iwl3945_read32(priv, CSR_INT);
4319 iwl3945_write32(priv, CSR_INT, inta);
4320
4321 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4322 * Any new interrupts that happen after this, either while we're
4323 * in this tasklet, or later, will show up in next ISR/tasklet. */
4324 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4325 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4326
4327 #ifdef CONFIG_IWL3945_DEBUG
4328 if (iwl3945_debug_level & IWL_DL_ISR) {
4329 /* just for debug */
4330 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4331 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4332 inta, inta_mask, inta_fh);
4333 }
4334 #endif
4335
4336 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4337 * atomic, make sure that inta covers all the interrupts that
4338 * we've discovered, even if FH interrupt came in just after
4339 * reading CSR_INT. */
4340 if (inta_fh & CSR39_FH_INT_RX_MASK)
4341 inta |= CSR_INT_BIT_FH_RX;
4342 if (inta_fh & CSR39_FH_INT_TX_MASK)
4343 inta |= CSR_INT_BIT_FH_TX;
4344
4345 /* Now service all interrupt bits discovered above. */
4346 if (inta & CSR_INT_BIT_HW_ERR) {
4347 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4348
4349 /* Tell the device to stop sending interrupts */
4350 iwl3945_disable_interrupts(priv);
4351
4352 iwl3945_irq_handle_error(priv);
4353
4354 handled |= CSR_INT_BIT_HW_ERR;
4355
4356 spin_unlock_irqrestore(&priv->lock, flags);
4357
4358 return;
4359 }
4360
4361 #ifdef CONFIG_IWL3945_DEBUG
4362 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4363 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4364 if (inta & CSR_INT_BIT_SCD)
4365 IWL_DEBUG_ISR("Scheduler finished to transmit "
4366 "the frame/frames.\n");
4367
4368 /* Alive notification via Rx interrupt will do the real work */
4369 if (inta & CSR_INT_BIT_ALIVE)
4370 IWL_DEBUG_ISR("Alive interrupt\n");
4371 }
4372 #endif
4373 /* Safely ignore these bits for debug checks below */
4374 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4375
4376 /* HW RF KILL switch toggled (4965 only) */
4377 if (inta & CSR_INT_BIT_RF_KILL) {
4378 int hw_rf_kill = 0;
4379 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4380 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4381 hw_rf_kill = 1;
4382
4383 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4384 "RF_KILL bit toggled to %s.\n",
4385 hw_rf_kill ? "disable radio":"enable radio");
4386
4387 /* Queue restart only if RF_KILL switch was set to "kill"
4388 * when we loaded driver, and is now set to "enable".
4389 * After we're Alive, RF_KILL gets handled by
4390 * iwl3945_rx_card_state_notif() */
4391 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4392 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4393 queue_work(priv->workqueue, &priv->restart);
4394 }
4395
4396 handled |= CSR_INT_BIT_RF_KILL;
4397 }
4398
4399 /* Chip got too hot and stopped itself (4965 only) */
4400 if (inta & CSR_INT_BIT_CT_KILL) {
4401 IWL_ERROR("Microcode CT kill error detected.\n");
4402 handled |= CSR_INT_BIT_CT_KILL;
4403 }
4404
4405 /* Error detected by uCode */
4406 if (inta & CSR_INT_BIT_SW_ERR) {
4407 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4408 inta);
4409 iwl3945_irq_handle_error(priv);
4410 handled |= CSR_INT_BIT_SW_ERR;
4411 }
4412
4413 /* uCode wakes up after power-down sleep */
4414 if (inta & CSR_INT_BIT_WAKEUP) {
4415 IWL_DEBUG_ISR("Wakeup interrupt\n");
4416 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4417 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4418 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4419 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4420 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4421 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4422 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4423
4424 handled |= CSR_INT_BIT_WAKEUP;
4425 }
4426
4427 /* All uCode command responses, including Tx command responses,
4428 * Rx "responses" (frame-received notification), and other
4429 * notifications from uCode come through here*/
4430 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4431 iwl3945_rx_handle(priv);
4432 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4433 }
4434
4435 if (inta & CSR_INT_BIT_FH_TX) {
4436 IWL_DEBUG_ISR("Tx interrupt\n");
4437
4438 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4439 if (!iwl3945_grab_nic_access(priv)) {
4440 iwl3945_write_direct32(priv,
4441 FH_TCSR_CREDIT
4442 (ALM_FH_SRVC_CHNL), 0x0);
4443 iwl3945_release_nic_access(priv);
4444 }
4445 handled |= CSR_INT_BIT_FH_TX;
4446 }
4447
4448 if (inta & ~handled)
4449 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4450
4451 if (inta & ~CSR_INI_SET_MASK) {
4452 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4453 inta & ~CSR_INI_SET_MASK);
4454 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4455 }
4456
4457 /* Re-enable all interrupts */
4458 /* only Re-enable if disabled by irq */
4459 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4460 iwl3945_enable_interrupts(priv);
4461
4462 #ifdef CONFIG_IWL3945_DEBUG
4463 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4464 inta = iwl3945_read32(priv, CSR_INT);
4465 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4466 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4467 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4468 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4469 }
4470 #endif
4471 spin_unlock_irqrestore(&priv->lock, flags);
4472 }
4473
4474 static irqreturn_t iwl3945_isr(int irq, void *data)
4475 {
4476 struct iwl3945_priv *priv = data;
4477 u32 inta, inta_mask;
4478 u32 inta_fh;
4479 if (!priv)
4480 return IRQ_NONE;
4481
4482 spin_lock(&priv->lock);
4483
4484 /* Disable (but don't clear!) interrupts here to avoid
4485 * back-to-back ISRs and sporadic interrupts from our NIC.
4486 * If we have something to service, the tasklet will re-enable ints.
4487 * If we *don't* have something, we'll re-enable before leaving here. */
4488 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4489 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4490
4491 /* Discover which interrupts are active/pending */
4492 inta = iwl3945_read32(priv, CSR_INT);
4493 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4494
4495 /* Ignore interrupt if there's nothing in NIC to service.
4496 * This may be due to IRQ shared with another device,
4497 * or due to sporadic interrupts thrown from our NIC. */
4498 if (!inta && !inta_fh) {
4499 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4500 goto none;
4501 }
4502
4503 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4504 /* Hardware disappeared */
4505 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4506 goto unplugged;
4507 }
4508
4509 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4510 inta, inta_mask, inta_fh);
4511
4512 inta &= ~CSR_INT_BIT_SCD;
4513
4514 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4515 if (likely(inta || inta_fh))
4516 tasklet_schedule(&priv->irq_tasklet);
4517 unplugged:
4518 spin_unlock(&priv->lock);
4519
4520 return IRQ_HANDLED;
4521
4522 none:
4523 /* re-enable interrupts here since we don't have anything to service. */
4524 /* only Re-enable if disabled by irq */
4525 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4526 iwl3945_enable_interrupts(priv);
4527 spin_unlock(&priv->lock);
4528 return IRQ_NONE;
4529 }
4530
4531 /************************** EEPROM BANDS ****************************
4532 *
4533 * The iwl3945_eeprom_band definitions below provide the mapping from the
4534 * EEPROM contents to the specific channel number supported for each
4535 * band.
4536 *
4537 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4538 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4539 * The specific geography and calibration information for that channel
4540 * is contained in the eeprom map itself.
4541 *
4542 * During init, we copy the eeprom information and channel map
4543 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4544 *
4545 * channel_map_24/52 provides the index in the channel_info array for a
4546 * given channel. We have to have two separate maps as there is channel
4547 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4548 * band_2
4549 *
4550 * A value of 0xff stored in the channel_map indicates that the channel
4551 * is not supported by the hardware at all.
4552 *
4553 * A value of 0xfe in the channel_map indicates that the channel is not
4554 * valid for Tx with the current hardware. This means that
4555 * while the system can tune and receive on a given channel, it may not
4556 * be able to associate or transmit any frames on that
4557 * channel. There is no corresponding channel information for that
4558 * entry.
4559 *
4560 *********************************************************************/
4561
4562 /* 2.4 GHz */
4563 static const u8 iwl3945_eeprom_band_1[14] = {
4564 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4565 };
4566
4567 /* 5.2 GHz bands */
4568 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4569 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4570 };
4571
4572 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4573 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4574 };
4575
4576 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4577 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4578 };
4579
4580 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4581 145, 149, 153, 157, 161, 165
4582 };
4583
4584 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4585 int *eeprom_ch_count,
4586 const struct iwl3945_eeprom_channel
4587 **eeprom_ch_info,
4588 const u8 **eeprom_ch_index)
4589 {
4590 switch (band) {
4591 case 1: /* 2.4GHz band */
4592 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4593 *eeprom_ch_info = priv->eeprom.band_1_channels;
4594 *eeprom_ch_index = iwl3945_eeprom_band_1;
4595 break;
4596 case 2: /* 4.9GHz band */
4597 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4598 *eeprom_ch_info = priv->eeprom.band_2_channels;
4599 *eeprom_ch_index = iwl3945_eeprom_band_2;
4600 break;
4601 case 3: /* 5.2GHz band */
4602 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4603 *eeprom_ch_info = priv->eeprom.band_3_channels;
4604 *eeprom_ch_index = iwl3945_eeprom_band_3;
4605 break;
4606 case 4: /* 5.5GHz band */
4607 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4608 *eeprom_ch_info = priv->eeprom.band_4_channels;
4609 *eeprom_ch_index = iwl3945_eeprom_band_4;
4610 break;
4611 case 5: /* 5.7GHz band */
4612 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4613 *eeprom_ch_info = priv->eeprom.band_5_channels;
4614 *eeprom_ch_index = iwl3945_eeprom_band_5;
4615 break;
4616 default:
4617 BUG();
4618 return;
4619 }
4620 }
4621
4622 /**
4623 * iwl3945_get_channel_info - Find driver's private channel info
4624 *
4625 * Based on band and channel number.
4626 */
4627 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
4628 enum ieee80211_band band, u16 channel)
4629 {
4630 int i;
4631
4632 switch (band) {
4633 case IEEE80211_BAND_5GHZ:
4634 for (i = 14; i < priv->channel_count; i++) {
4635 if (priv->channel_info[i].channel == channel)
4636 return &priv->channel_info[i];
4637 }
4638 break;
4639
4640 case IEEE80211_BAND_2GHZ:
4641 if (channel >= 1 && channel <= 14)
4642 return &priv->channel_info[channel - 1];
4643 break;
4644 case IEEE80211_NUM_BANDS:
4645 WARN_ON(1);
4646 }
4647
4648 return NULL;
4649 }
4650
4651 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4652 ? # x " " : "")
4653
4654 /**
4655 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4656 */
4657 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
4658 {
4659 int eeprom_ch_count = 0;
4660 const u8 *eeprom_ch_index = NULL;
4661 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
4662 int band, ch;
4663 struct iwl3945_channel_info *ch_info;
4664
4665 if (priv->channel_count) {
4666 IWL_DEBUG_INFO("Channel map already initialized.\n");
4667 return 0;
4668 }
4669
4670 if (priv->eeprom.version < 0x2f) {
4671 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4672 priv->eeprom.version);
4673 return -EINVAL;
4674 }
4675
4676 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4677
4678 priv->channel_count =
4679 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4680 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4681 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4682 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4683 ARRAY_SIZE(iwl3945_eeprom_band_5);
4684
4685 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4686
4687 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
4688 priv->channel_count, GFP_KERNEL);
4689 if (!priv->channel_info) {
4690 IWL_ERROR("Could not allocate channel_info\n");
4691 priv->channel_count = 0;
4692 return -ENOMEM;
4693 }
4694
4695 ch_info = priv->channel_info;
4696
4697 /* Loop through the 5 EEPROM bands adding them in order to the
4698 * channel map we maintain (that contains additional information than
4699 * what just in the EEPROM) */
4700 for (band = 1; band <= 5; band++) {
4701
4702 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4703 &eeprom_ch_info, &eeprom_ch_index);
4704
4705 /* Loop through each band adding each of the channels */
4706 for (ch = 0; ch < eeprom_ch_count; ch++) {
4707 ch_info->channel = eeprom_ch_index[ch];
4708 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4709 IEEE80211_BAND_5GHZ;
4710
4711 /* permanently store EEPROM's channel regulatory flags
4712 * and max power in channel info database. */
4713 ch_info->eeprom = eeprom_ch_info[ch];
4714
4715 /* Copy the run-time flags so they are there even on
4716 * invalid channels */
4717 ch_info->flags = eeprom_ch_info[ch].flags;
4718
4719 if (!(is_channel_valid(ch_info))) {
4720 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4721 "No traffic\n",
4722 ch_info->channel,
4723 ch_info->flags,
4724 is_channel_a_band(ch_info) ?
4725 "5.2" : "2.4");
4726 ch_info++;
4727 continue;
4728 }
4729
4730 /* Initialize regulatory-based run-time data */
4731 ch_info->max_power_avg = ch_info->curr_txpow =
4732 eeprom_ch_info[ch].max_power_avg;
4733 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4734 ch_info->min_power = 0;
4735
4736 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4737 " %ddBm): Ad-Hoc %ssupported\n",
4738 ch_info->channel,
4739 is_channel_a_band(ch_info) ?
4740 "5.2" : "2.4",
4741 CHECK_AND_PRINT(VALID),
4742 CHECK_AND_PRINT(IBSS),
4743 CHECK_AND_PRINT(ACTIVE),
4744 CHECK_AND_PRINT(RADAR),
4745 CHECK_AND_PRINT(WIDE),
4746 CHECK_AND_PRINT(DFS),
4747 eeprom_ch_info[ch].flags,
4748 eeprom_ch_info[ch].max_power_avg,
4749 ((eeprom_ch_info[ch].
4750 flags & EEPROM_CHANNEL_IBSS)
4751 && !(eeprom_ch_info[ch].
4752 flags & EEPROM_CHANNEL_RADAR))
4753 ? "" : "not ");
4754
4755 /* Set the user_txpower_limit to the highest power
4756 * supported by any channel */
4757 if (eeprom_ch_info[ch].max_power_avg >
4758 priv->user_txpower_limit)
4759 priv->user_txpower_limit =
4760 eeprom_ch_info[ch].max_power_avg;
4761
4762 ch_info++;
4763 }
4764 }
4765
4766 /* Set up txpower settings in driver for all channels */
4767 if (iwl3945_txpower_set_from_eeprom(priv))
4768 return -EIO;
4769
4770 return 0;
4771 }
4772
4773 /*
4774 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4775 */
4776 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4777 {
4778 kfree(priv->channel_info);
4779 priv->channel_count = 0;
4780 }
4781
4782 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4783 * sending probe req. This should be set long enough to hear probe responses
4784 * from more than one AP. */
4785 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4786 #define IWL_ACTIVE_DWELL_TIME_52 (10)
4787
4788 /* For faster active scanning, scan will move to the next channel if fewer than
4789 * PLCP_QUIET_THRESH packets are heard on this channel within
4790 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4791 * time if it's a quiet channel (nothing responded to our probe, and there's
4792 * no other traffic).
4793 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4794 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4795 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4796
4797 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4798 * Must be set longer than active dwell time.
4799 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4800 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4801 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4802 #define IWL_PASSIVE_DWELL_BASE (100)
4803 #define IWL_CHANNEL_TUNE_TIME 5
4804
4805 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4806 enum ieee80211_band band)
4807 {
4808 if (band == IEEE80211_BAND_5GHZ)
4809 return IWL_ACTIVE_DWELL_TIME_52;
4810 else
4811 return IWL_ACTIVE_DWELL_TIME_24;
4812 }
4813
4814 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4815 enum ieee80211_band band)
4816 {
4817 u16 active = iwl3945_get_active_dwell_time(priv, band);
4818 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4819 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4820 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4821
4822 if (iwl3945_is_associated(priv)) {
4823 /* If we're associated, we clamp the maximum passive
4824 * dwell time to be 98% of the beacon interval (minus
4825 * 2 * channel tune time) */
4826 passive = priv->beacon_int;
4827 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4828 passive = IWL_PASSIVE_DWELL_BASE;
4829 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4830 }
4831
4832 if (passive <= active)
4833 passive = active + 1;
4834
4835 return passive;
4836 }
4837
4838 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4839 enum ieee80211_band band,
4840 u8 is_active, u8 direct_mask,
4841 struct iwl3945_scan_channel *scan_ch)
4842 {
4843 const struct ieee80211_channel *channels = NULL;
4844 const struct ieee80211_supported_band *sband;
4845 const struct iwl3945_channel_info *ch_info;
4846 u16 passive_dwell = 0;
4847 u16 active_dwell = 0;
4848 int added, i;
4849
4850 sband = iwl3945_get_band(priv, band);
4851 if (!sband)
4852 return 0;
4853
4854 channels = sband->channels;
4855
4856 active_dwell = iwl3945_get_active_dwell_time(priv, band);
4857 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4858
4859 for (i = 0, added = 0; i < sband->n_channels; i++) {
4860 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4861 continue;
4862
4863 scan_ch->channel = channels[i].hw_value;
4864
4865 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4866 if (!is_channel_valid(ch_info)) {
4867 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4868 scan_ch->channel);
4869 continue;
4870 }
4871
4872 if (!is_active || is_channel_passive(ch_info) ||
4873 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
4874 scan_ch->type = 0; /* passive */
4875 else
4876 scan_ch->type = 1; /* active */
4877
4878 if (scan_ch->type & 1)
4879 scan_ch->type |= (direct_mask << 1);
4880
4881 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4882 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4883
4884 /* Set txpower levels to defaults */
4885 scan_ch->tpc.dsp_atten = 110;
4886 /* scan_pwr_info->tpc.dsp_atten; */
4887
4888 /*scan_pwr_info->tpc.tx_gain; */
4889 if (band == IEEE80211_BAND_5GHZ)
4890 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4891 else {
4892 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4893 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4894 * power level:
4895 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4896 */
4897 }
4898
4899 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4900 scan_ch->channel,
4901 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4902 (scan_ch->type & 1) ?
4903 active_dwell : passive_dwell);
4904
4905 scan_ch++;
4906 added++;
4907 }
4908
4909 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4910 return added;
4911 }
4912
4913 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
4914 struct ieee80211_rate *rates)
4915 {
4916 int i;
4917
4918 for (i = 0; i < IWL_RATE_COUNT; i++) {
4919 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4920 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4921 rates[i].hw_value_short = i;
4922 rates[i].flags = 0;
4923 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4924 /*
4925 * If CCK != 1M then set short preamble rate flag.
4926 */
4927 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4928 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4929 }
4930 }
4931 }
4932
4933 /**
4934 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4935 */
4936 static int iwl3945_init_geos(struct iwl3945_priv *priv)
4937 {
4938 struct iwl3945_channel_info *ch;
4939 struct ieee80211_supported_band *sband;
4940 struct ieee80211_channel *channels;
4941 struct ieee80211_channel *geo_ch;
4942 struct ieee80211_rate *rates;
4943 int i = 0;
4944
4945 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4946 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4947 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4948 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4949 return 0;
4950 }
4951
4952 channels = kzalloc(sizeof(struct ieee80211_channel) *
4953 priv->channel_count, GFP_KERNEL);
4954 if (!channels)
4955 return -ENOMEM;
4956
4957 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4958 GFP_KERNEL);
4959 if (!rates) {
4960 kfree(channels);
4961 return -ENOMEM;
4962 }
4963
4964 /* 5.2GHz channels start after the 2.4GHz channels */
4965 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4966 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4967 /* just OFDM */
4968 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4969 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4970
4971 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4972 sband->channels = channels;
4973 /* OFDM & CCK */
4974 sband->bitrates = rates;
4975 sband->n_bitrates = IWL_RATE_COUNT;
4976
4977 priv->ieee_channels = channels;
4978 priv->ieee_rates = rates;
4979
4980 iwl3945_init_hw_rates(priv, rates);
4981
4982 for (i = 0; i < priv->channel_count; i++) {
4983 ch = &priv->channel_info[i];
4984
4985 /* FIXME: might be removed if scan is OK*/
4986 if (!is_channel_valid(ch))
4987 continue;
4988
4989 if (is_channel_a_band(ch))
4990 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4991 else
4992 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4993
4994 geo_ch = &sband->channels[sband->n_channels++];
4995
4996 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4997 geo_ch->max_power = ch->max_power_avg;
4998 geo_ch->max_antenna_gain = 0xff;
4999 geo_ch->hw_value = ch->channel;
5000
5001 if (is_channel_valid(ch)) {
5002 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5003 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
5004
5005 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5006 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
5007
5008 if (ch->flags & EEPROM_CHANNEL_RADAR)
5009 geo_ch->flags |= IEEE80211_CHAN_RADAR;
5010
5011 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5012 priv->max_channel_txpower_limit =
5013 ch->max_power_avg;
5014 } else {
5015 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
5016 }
5017
5018 /* Save flags for reg domain usage */
5019 geo_ch->orig_flags = geo_ch->flags;
5020
5021 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5022 ch->channel, geo_ch->center_freq,
5023 is_channel_a_band(ch) ? "5.2" : "2.4",
5024 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5025 "restricted" : "valid",
5026 geo_ch->flags);
5027 }
5028
5029 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5030 priv->cfg->sku & IWL_SKU_A) {
5031 printk(KERN_INFO DRV_NAME
5032 ": Incorrectly detected BG card as ABG. Please send "
5033 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5034 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5035 priv->cfg->sku &= ~IWL_SKU_A;
5036 }
5037
5038 printk(KERN_INFO DRV_NAME
5039 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5040 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5041 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
5042
5043 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5044 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5045 &priv->bands[IEEE80211_BAND_2GHZ];
5046 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5047 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5048 &priv->bands[IEEE80211_BAND_5GHZ];
5049
5050 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5051
5052 return 0;
5053 }
5054
5055 /*
5056 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5057 */
5058 static void iwl3945_free_geos(struct iwl3945_priv *priv)
5059 {
5060 kfree(priv->ieee_channels);
5061 kfree(priv->ieee_rates);
5062 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5063 }
5064
5065 /******************************************************************************
5066 *
5067 * uCode download functions
5068 *
5069 ******************************************************************************/
5070
5071 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5072 {
5073 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5074 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5075 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5076 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5077 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5078 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5079 }
5080
5081 /**
5082 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5083 * looking at all data.
5084 */
5085 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 *image, u32 len)
5086 {
5087 u32 val;
5088 u32 save_len = len;
5089 int rc = 0;
5090 u32 errcnt;
5091
5092 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5093
5094 rc = iwl3945_grab_nic_access(priv);
5095 if (rc)
5096 return rc;
5097
5098 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5099
5100 errcnt = 0;
5101 for (; len > 0; len -= sizeof(u32), image++) {
5102 /* read data comes through single port, auto-incr addr */
5103 /* NOTE: Use the debugless read so we don't flood kernel log
5104 * if IWL_DL_IO is set */
5105 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5106 if (val != le32_to_cpu(*image)) {
5107 IWL_ERROR("uCode INST section is invalid at "
5108 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5109 save_len - len, val, le32_to_cpu(*image));
5110 rc = -EIO;
5111 errcnt++;
5112 if (errcnt >= 20)
5113 break;
5114 }
5115 }
5116
5117 iwl3945_release_nic_access(priv);
5118
5119 if (!errcnt)
5120 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5121
5122 return rc;
5123 }
5124
5125
5126 /**
5127 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5128 * using sample data 100 bytes apart. If these sample points are good,
5129 * it's a pretty good bet that everything between them is good, too.
5130 */
5131 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5132 {
5133 u32 val;
5134 int rc = 0;
5135 u32 errcnt = 0;
5136 u32 i;
5137
5138 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5139
5140 rc = iwl3945_grab_nic_access(priv);
5141 if (rc)
5142 return rc;
5143
5144 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5145 /* read data comes through single port, auto-incr addr */
5146 /* NOTE: Use the debugless read so we don't flood kernel log
5147 * if IWL_DL_IO is set */
5148 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5149 i + RTC_INST_LOWER_BOUND);
5150 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5151 if (val != le32_to_cpu(*image)) {
5152 #if 0 /* Enable this if you want to see details */
5153 IWL_ERROR("uCode INST section is invalid at "
5154 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5155 i, val, *image);
5156 #endif
5157 rc = -EIO;
5158 errcnt++;
5159 if (errcnt >= 3)
5160 break;
5161 }
5162 }
5163
5164 iwl3945_release_nic_access(priv);
5165
5166 return rc;
5167 }
5168
5169
5170 /**
5171 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5172 * and verify its contents
5173 */
5174 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5175 {
5176 __le32 *image;
5177 u32 len;
5178 int rc = 0;
5179
5180 /* Try bootstrap */
5181 image = (__le32 *)priv->ucode_boot.v_addr;
5182 len = priv->ucode_boot.len;
5183 rc = iwl3945_verify_inst_sparse(priv, image, len);
5184 if (rc == 0) {
5185 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5186 return 0;
5187 }
5188
5189 /* Try initialize */
5190 image = (__le32 *)priv->ucode_init.v_addr;
5191 len = priv->ucode_init.len;
5192 rc = iwl3945_verify_inst_sparse(priv, image, len);
5193 if (rc == 0) {
5194 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5195 return 0;
5196 }
5197
5198 /* Try runtime/protocol */
5199 image = (__le32 *)priv->ucode_code.v_addr;
5200 len = priv->ucode_code.len;
5201 rc = iwl3945_verify_inst_sparse(priv, image, len);
5202 if (rc == 0) {
5203 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5204 return 0;
5205 }
5206
5207 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5208
5209 /* Since nothing seems to match, show first several data entries in
5210 * instruction SRAM, so maybe visual inspection will give a clue.
5211 * Selection of bootstrap image (vs. other images) is arbitrary. */
5212 image = (__le32 *)priv->ucode_boot.v_addr;
5213 len = priv->ucode_boot.len;
5214 rc = iwl3945_verify_inst_full(priv, image, len);
5215
5216 return rc;
5217 }
5218
5219
5220 /* check contents of special bootstrap uCode SRAM */
5221 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5222 {
5223 __le32 *image = priv->ucode_boot.v_addr;
5224 u32 len = priv->ucode_boot.len;
5225 u32 reg;
5226 u32 val;
5227
5228 IWL_DEBUG_INFO("Begin verify bsm\n");
5229
5230 /* verify BSM SRAM contents */
5231 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5232 for (reg = BSM_SRAM_LOWER_BOUND;
5233 reg < BSM_SRAM_LOWER_BOUND + len;
5234 reg += sizeof(u32), image++) {
5235 val = iwl3945_read_prph(priv, reg);
5236 if (val != le32_to_cpu(*image)) {
5237 IWL_ERROR("BSM uCode verification failed at "
5238 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5239 BSM_SRAM_LOWER_BOUND,
5240 reg - BSM_SRAM_LOWER_BOUND, len,
5241 val, le32_to_cpu(*image));
5242 return -EIO;
5243 }
5244 }
5245
5246 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5247
5248 return 0;
5249 }
5250
5251 /**
5252 * iwl3945_load_bsm - Load bootstrap instructions
5253 *
5254 * BSM operation:
5255 *
5256 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5257 * in special SRAM that does not power down during RFKILL. When powering back
5258 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5259 * the bootstrap program into the on-board processor, and starts it.
5260 *
5261 * The bootstrap program loads (via DMA) instructions and data for a new
5262 * program from host DRAM locations indicated by the host driver in the
5263 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5264 * automatically.
5265 *
5266 * When initializing the NIC, the host driver points the BSM to the
5267 * "initialize" uCode image. This uCode sets up some internal data, then
5268 * notifies host via "initialize alive" that it is complete.
5269 *
5270 * The host then replaces the BSM_DRAM_* pointer values to point to the
5271 * normal runtime uCode instructions and a backup uCode data cache buffer
5272 * (filled initially with starting data values for the on-board processor),
5273 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5274 * which begins normal operation.
5275 *
5276 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5277 * the backup data cache in DRAM before SRAM is powered down.
5278 *
5279 * When powering back up, the BSM loads the bootstrap program. This reloads
5280 * the runtime uCode instructions and the backup data cache into SRAM,
5281 * and re-launches the runtime uCode from where it left off.
5282 */
5283 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5284 {
5285 __le32 *image = priv->ucode_boot.v_addr;
5286 u32 len = priv->ucode_boot.len;
5287 dma_addr_t pinst;
5288 dma_addr_t pdata;
5289 u32 inst_len;
5290 u32 data_len;
5291 int rc;
5292 int i;
5293 u32 done;
5294 u32 reg_offset;
5295
5296 IWL_DEBUG_INFO("Begin load bsm\n");
5297
5298 /* make sure bootstrap program is no larger than BSM's SRAM size */
5299 if (len > IWL_MAX_BSM_SIZE)
5300 return -EINVAL;
5301
5302 /* Tell bootstrap uCode where to find the "Initialize" uCode
5303 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5304 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5305 * after the "initialize" uCode has run, to point to
5306 * runtime/protocol instructions and backup data cache. */
5307 pinst = priv->ucode_init.p_addr;
5308 pdata = priv->ucode_init_data.p_addr;
5309 inst_len = priv->ucode_init.len;
5310 data_len = priv->ucode_init_data.len;
5311
5312 rc = iwl3945_grab_nic_access(priv);
5313 if (rc)
5314 return rc;
5315
5316 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5317 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5318 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5319 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5320
5321 /* Fill BSM memory with bootstrap instructions */
5322 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5323 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5324 reg_offset += sizeof(u32), image++)
5325 _iwl3945_write_prph(priv, reg_offset,
5326 le32_to_cpu(*image));
5327
5328 rc = iwl3945_verify_bsm(priv);
5329 if (rc) {
5330 iwl3945_release_nic_access(priv);
5331 return rc;
5332 }
5333
5334 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5335 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5336 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5337 RTC_INST_LOWER_BOUND);
5338 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5339
5340 /* Load bootstrap code into instruction SRAM now,
5341 * to prepare to load "initialize" uCode */
5342 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5343 BSM_WR_CTRL_REG_BIT_START);
5344
5345 /* Wait for load of bootstrap uCode to finish */
5346 for (i = 0; i < 100; i++) {
5347 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5348 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5349 break;
5350 udelay(10);
5351 }
5352 if (i < 100)
5353 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5354 else {
5355 IWL_ERROR("BSM write did not complete!\n");
5356 return -EIO;
5357 }
5358
5359 /* Enable future boot loads whenever power management unit triggers it
5360 * (e.g. when powering back up after power-save shutdown) */
5361 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5362 BSM_WR_CTRL_REG_BIT_START_EN);
5363
5364 iwl3945_release_nic_access(priv);
5365
5366 return 0;
5367 }
5368
5369 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5370 {
5371 /* Remove all resets to allow NIC to operate */
5372 iwl3945_write32(priv, CSR_RESET, 0);
5373 }
5374
5375 /**
5376 * iwl3945_read_ucode - Read uCode images from disk file.
5377 *
5378 * Copy into buffers for card to fetch via bus-mastering
5379 */
5380 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5381 {
5382 struct iwl3945_ucode *ucode;
5383 int ret = 0;
5384 const struct firmware *ucode_raw;
5385 /* firmware file name contains uCode/driver compatibility version */
5386 const char *name = priv->cfg->fw_name;
5387 u8 *src;
5388 size_t len;
5389 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5390
5391 /* Ask kernel firmware_class module to get the boot firmware off disk.
5392 * request_firmware() is synchronous, file is in memory on return. */
5393 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5394 if (ret < 0) {
5395 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5396 name, ret);
5397 goto error;
5398 }
5399
5400 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5401 name, ucode_raw->size);
5402
5403 /* Make sure that we got at least our header! */
5404 if (ucode_raw->size < sizeof(*ucode)) {
5405 IWL_ERROR("File size way too small!\n");
5406 ret = -EINVAL;
5407 goto err_release;
5408 }
5409
5410 /* Data from ucode file: header followed by uCode images */
5411 ucode = (void *)ucode_raw->data;
5412
5413 ver = le32_to_cpu(ucode->ver);
5414 inst_size = le32_to_cpu(ucode->inst_size);
5415 data_size = le32_to_cpu(ucode->data_size);
5416 init_size = le32_to_cpu(ucode->init_size);
5417 init_data_size = le32_to_cpu(ucode->init_data_size);
5418 boot_size = le32_to_cpu(ucode->boot_size);
5419
5420 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5421 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5422 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5423 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5424 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5425 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5426
5427 /* Verify size of file vs. image size info in file's header */
5428 if (ucode_raw->size < sizeof(*ucode) +
5429 inst_size + data_size + init_size +
5430 init_data_size + boot_size) {
5431
5432 IWL_DEBUG_INFO("uCode file size %d too small\n",
5433 (int)ucode_raw->size);
5434 ret = -EINVAL;
5435 goto err_release;
5436 }
5437
5438 /* Verify that uCode images will fit in card's SRAM */
5439 if (inst_size > IWL_MAX_INST_SIZE) {
5440 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5441 inst_size);
5442 ret = -EINVAL;
5443 goto err_release;
5444 }
5445
5446 if (data_size > IWL_MAX_DATA_SIZE) {
5447 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5448 data_size);
5449 ret = -EINVAL;
5450 goto err_release;
5451 }
5452 if (init_size > IWL_MAX_INST_SIZE) {
5453 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5454 init_size);
5455 ret = -EINVAL;
5456 goto err_release;
5457 }
5458 if (init_data_size > IWL_MAX_DATA_SIZE) {
5459 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5460 init_data_size);
5461 ret = -EINVAL;
5462 goto err_release;
5463 }
5464 if (boot_size > IWL_MAX_BSM_SIZE) {
5465 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5466 boot_size);
5467 ret = -EINVAL;
5468 goto err_release;
5469 }
5470
5471 /* Allocate ucode buffers for card's bus-master loading ... */
5472
5473 /* Runtime instructions and 2 copies of data:
5474 * 1) unmodified from disk
5475 * 2) backup cache for save/restore during power-downs */
5476 priv->ucode_code.len = inst_size;
5477 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5478
5479 priv->ucode_data.len = data_size;
5480 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5481
5482 priv->ucode_data_backup.len = data_size;
5483 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5484
5485 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5486 !priv->ucode_data_backup.v_addr)
5487 goto err_pci_alloc;
5488
5489 /* Initialization instructions and data */
5490 if (init_size && init_data_size) {
5491 priv->ucode_init.len = init_size;
5492 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5493
5494 priv->ucode_init_data.len = init_data_size;
5495 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5496
5497 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5498 goto err_pci_alloc;
5499 }
5500
5501 /* Bootstrap (instructions only, no data) */
5502 if (boot_size) {
5503 priv->ucode_boot.len = boot_size;
5504 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5505
5506 if (!priv->ucode_boot.v_addr)
5507 goto err_pci_alloc;
5508 }
5509
5510 /* Copy images into buffers for card's bus-master reads ... */
5511
5512 /* Runtime instructions (first block of data in file) */
5513 src = &ucode->data[0];
5514 len = priv->ucode_code.len;
5515 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5516 memcpy(priv->ucode_code.v_addr, src, len);
5517 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5518 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5519
5520 /* Runtime data (2nd block)
5521 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5522 src = &ucode->data[inst_size];
5523 len = priv->ucode_data.len;
5524 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5525 memcpy(priv->ucode_data.v_addr, src, len);
5526 memcpy(priv->ucode_data_backup.v_addr, src, len);
5527
5528 /* Initialization instructions (3rd block) */
5529 if (init_size) {
5530 src = &ucode->data[inst_size + data_size];
5531 len = priv->ucode_init.len;
5532 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5533 len);
5534 memcpy(priv->ucode_init.v_addr, src, len);
5535 }
5536
5537 /* Initialization data (4th block) */
5538 if (init_data_size) {
5539 src = &ucode->data[inst_size + data_size + init_size];
5540 len = priv->ucode_init_data.len;
5541 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5542 (int)len);
5543 memcpy(priv->ucode_init_data.v_addr, src, len);
5544 }
5545
5546 /* Bootstrap instructions (5th block) */
5547 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5548 len = priv->ucode_boot.len;
5549 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5550 (int)len);
5551 memcpy(priv->ucode_boot.v_addr, src, len);
5552
5553 /* We have our copies now, allow OS release its copies */
5554 release_firmware(ucode_raw);
5555 return 0;
5556
5557 err_pci_alloc:
5558 IWL_ERROR("failed to allocate pci memory\n");
5559 ret = -ENOMEM;
5560 iwl3945_dealloc_ucode_pci(priv);
5561
5562 err_release:
5563 release_firmware(ucode_raw);
5564
5565 error:
5566 return ret;
5567 }
5568
5569
5570 /**
5571 * iwl3945_set_ucode_ptrs - Set uCode address location
5572 *
5573 * Tell initialization uCode where to find runtime uCode.
5574 *
5575 * BSM registers initially contain pointers to initialization uCode.
5576 * We need to replace them to load runtime uCode inst and data,
5577 * and to save runtime data when powering down.
5578 */
5579 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
5580 {
5581 dma_addr_t pinst;
5582 dma_addr_t pdata;
5583 int rc = 0;
5584 unsigned long flags;
5585
5586 /* bits 31:0 for 3945 */
5587 pinst = priv->ucode_code.p_addr;
5588 pdata = priv->ucode_data_backup.p_addr;
5589
5590 spin_lock_irqsave(&priv->lock, flags);
5591 rc = iwl3945_grab_nic_access(priv);
5592 if (rc) {
5593 spin_unlock_irqrestore(&priv->lock, flags);
5594 return rc;
5595 }
5596
5597 /* Tell bootstrap uCode where to find image to load */
5598 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5599 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5600 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5601 priv->ucode_data.len);
5602
5603 /* Inst bytecount must be last to set up, bit 31 signals uCode
5604 * that all new ptr/size info is in place */
5605 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5606 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5607
5608 iwl3945_release_nic_access(priv);
5609
5610 spin_unlock_irqrestore(&priv->lock, flags);
5611
5612 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5613
5614 return rc;
5615 }
5616
5617 /**
5618 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5619 *
5620 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5621 *
5622 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5623 */
5624 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
5625 {
5626 /* Check alive response for "valid" sign from uCode */
5627 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5628 /* We had an error bringing up the hardware, so take it
5629 * all the way back down so we can try again */
5630 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5631 goto restart;
5632 }
5633
5634 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5635 * This is a paranoid check, because we would not have gotten the
5636 * "initialize" alive if code weren't properly loaded. */
5637 if (iwl3945_verify_ucode(priv)) {
5638 /* Runtime instruction load was bad;
5639 * take it all the way back down so we can try again */
5640 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5641 goto restart;
5642 }
5643
5644 /* Send pointers to protocol/runtime uCode image ... init code will
5645 * load and launch runtime uCode, which will send us another "Alive"
5646 * notification. */
5647 IWL_DEBUG_INFO("Initialization Alive received.\n");
5648 if (iwl3945_set_ucode_ptrs(priv)) {
5649 /* Runtime instruction load won't happen;
5650 * take it all the way back down so we can try again */
5651 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5652 goto restart;
5653 }
5654 return;
5655
5656 restart:
5657 queue_work(priv->workqueue, &priv->restart);
5658 }
5659
5660
5661 /**
5662 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5663 * from protocol/runtime uCode (initialization uCode's
5664 * Alive gets handled by iwl3945_init_alive_start()).
5665 */
5666 static void iwl3945_alive_start(struct iwl3945_priv *priv)
5667 {
5668 int rc = 0;
5669 int thermal_spin = 0;
5670 u32 rfkill;
5671
5672 IWL_DEBUG_INFO("Runtime Alive received.\n");
5673
5674 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5675 /* We had an error bringing up the hardware, so take it
5676 * all the way back down so we can try again */
5677 IWL_DEBUG_INFO("Alive failed.\n");
5678 goto restart;
5679 }
5680
5681 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5682 * This is a paranoid check, because we would not have gotten the
5683 * "runtime" alive if code weren't properly loaded. */
5684 if (iwl3945_verify_ucode(priv)) {
5685 /* Runtime instruction load was bad;
5686 * take it all the way back down so we can try again */
5687 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5688 goto restart;
5689 }
5690
5691 iwl3945_clear_stations_table(priv);
5692
5693 rc = iwl3945_grab_nic_access(priv);
5694 if (rc) {
5695 IWL_WARNING("Can not read rfkill status from adapter\n");
5696 return;
5697 }
5698
5699 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
5700 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5701 iwl3945_release_nic_access(priv);
5702
5703 if (rfkill & 0x1) {
5704 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5705 /* if rfkill is not on, then wait for thermal
5706 * sensor in adapter to kick in */
5707 while (iwl3945_hw_get_temperature(priv) == 0) {
5708 thermal_spin++;
5709 udelay(10);
5710 }
5711
5712 if (thermal_spin)
5713 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5714 thermal_spin * 10);
5715 } else
5716 set_bit(STATUS_RF_KILL_HW, &priv->status);
5717
5718 /* After the ALIVE response, we can send commands to 3945 uCode */
5719 set_bit(STATUS_ALIVE, &priv->status);
5720
5721 /* Clear out the uCode error bit if it is set */
5722 clear_bit(STATUS_FW_ERROR, &priv->status);
5723
5724 if (iwl3945_is_rfkill(priv))
5725 return;
5726
5727 ieee80211_wake_queues(priv->hw);
5728
5729 priv->active_rate = priv->rates_mask;
5730 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5731
5732 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5733
5734 if (iwl3945_is_associated(priv)) {
5735 struct iwl3945_rxon_cmd *active_rxon =
5736 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
5737
5738 memcpy(&priv->staging_rxon, &priv->active_rxon,
5739 sizeof(priv->staging_rxon));
5740 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5741 } else {
5742 /* Initialize our rx_config data */
5743 iwl3945_connection_init_rx_config(priv);
5744 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5745 }
5746
5747 /* Configure Bluetooth device coexistence support */
5748 iwl3945_send_bt_config(priv);
5749
5750 /* Configure the adapter for unassociated operation */
5751 iwl3945_commit_rxon(priv);
5752
5753 iwl3945_reg_txpower_periodic(priv);
5754
5755 iwl3945_led_register(priv);
5756
5757 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5758 set_bit(STATUS_READY, &priv->status);
5759 wake_up_interruptible(&priv->wait_command_queue);
5760
5761 if (priv->error_recovering)
5762 iwl3945_error_recovery(priv);
5763
5764 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
5765 return;
5766
5767 restart:
5768 queue_work(priv->workqueue, &priv->restart);
5769 }
5770
5771 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
5772
5773 static void __iwl3945_down(struct iwl3945_priv *priv)
5774 {
5775 unsigned long flags;
5776 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5777 struct ieee80211_conf *conf = NULL;
5778
5779 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5780
5781 conf = ieee80211_get_hw_conf(priv->hw);
5782
5783 if (!exit_pending)
5784 set_bit(STATUS_EXIT_PENDING, &priv->status);
5785
5786 iwl3945_led_unregister(priv);
5787 iwl3945_clear_stations_table(priv);
5788
5789 /* Unblock any waiting calls */
5790 wake_up_interruptible_all(&priv->wait_command_queue);
5791
5792 /* Wipe out the EXIT_PENDING status bit if we are not actually
5793 * exiting the module */
5794 if (!exit_pending)
5795 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5796
5797 /* stop and reset the on-board processor */
5798 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5799
5800 /* tell the device to stop sending interrupts */
5801 spin_lock_irqsave(&priv->lock, flags);
5802 iwl3945_disable_interrupts(priv);
5803 spin_unlock_irqrestore(&priv->lock, flags);
5804 iwl_synchronize_irq(priv);
5805
5806 if (priv->mac80211_registered)
5807 ieee80211_stop_queues(priv->hw);
5808
5809 /* If we have not previously called iwl3945_init() then
5810 * clear all bits but the RF Kill and SUSPEND bits and return */
5811 if (!iwl3945_is_init(priv)) {
5812 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5813 STATUS_RF_KILL_HW |
5814 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5815 STATUS_RF_KILL_SW |
5816 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5817 STATUS_GEO_CONFIGURED |
5818 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5819 STATUS_IN_SUSPEND |
5820 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5821 STATUS_EXIT_PENDING;
5822 goto exit;
5823 }
5824
5825 /* ...otherwise clear out all the status bits but the RF Kill and
5826 * SUSPEND bits and continue taking the NIC down. */
5827 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5828 STATUS_RF_KILL_HW |
5829 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5830 STATUS_RF_KILL_SW |
5831 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5832 STATUS_GEO_CONFIGURED |
5833 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5834 STATUS_IN_SUSPEND |
5835 test_bit(STATUS_FW_ERROR, &priv->status) <<
5836 STATUS_FW_ERROR |
5837 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5838 STATUS_EXIT_PENDING;
5839
5840 spin_lock_irqsave(&priv->lock, flags);
5841 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5842 spin_unlock_irqrestore(&priv->lock, flags);
5843
5844 iwl3945_hw_txq_ctx_stop(priv);
5845 iwl3945_hw_rxq_stop(priv);
5846
5847 spin_lock_irqsave(&priv->lock, flags);
5848 if (!iwl3945_grab_nic_access(priv)) {
5849 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
5850 APMG_CLK_VAL_DMA_CLK_RQT);
5851 iwl3945_release_nic_access(priv);
5852 }
5853 spin_unlock_irqrestore(&priv->lock, flags);
5854
5855 udelay(5);
5856
5857 iwl3945_hw_nic_stop_master(priv);
5858 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5859 iwl3945_hw_nic_reset(priv);
5860
5861 exit:
5862 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
5863
5864 if (priv->ibss_beacon)
5865 dev_kfree_skb(priv->ibss_beacon);
5866 priv->ibss_beacon = NULL;
5867
5868 /* clear out any free frames */
5869 iwl3945_clear_free_frames(priv);
5870 }
5871
5872 static void iwl3945_down(struct iwl3945_priv *priv)
5873 {
5874 mutex_lock(&priv->mutex);
5875 __iwl3945_down(priv);
5876 mutex_unlock(&priv->mutex);
5877
5878 iwl3945_cancel_deferred_work(priv);
5879 }
5880
5881 #define MAX_HW_RESTARTS 5
5882
5883 static int __iwl3945_up(struct iwl3945_priv *priv)
5884 {
5885 int rc, i;
5886
5887 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5888 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5889 return -EIO;
5890 }
5891
5892 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5893 IWL_WARNING("Radio disabled by SW RF kill (module "
5894 "parameter)\n");
5895 return -ENODEV;
5896 }
5897
5898 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5899 IWL_ERROR("ucode not available for device bringup\n");
5900 return -EIO;
5901 }
5902
5903 /* If platform's RF_KILL switch is NOT set to KILL */
5904 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
5905 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5906 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5907 else {
5908 set_bit(STATUS_RF_KILL_HW, &priv->status);
5909 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5910 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5911 return -ENODEV;
5912 }
5913 }
5914
5915 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5916
5917 rc = iwl3945_hw_nic_init(priv);
5918 if (rc) {
5919 IWL_ERROR("Unable to int nic\n");
5920 return rc;
5921 }
5922
5923 /* make sure rfkill handshake bits are cleared */
5924 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5925 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5926 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5927
5928 /* clear (again), then enable host interrupts */
5929 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
5930 iwl3945_enable_interrupts(priv);
5931
5932 /* really make sure rfkill handshake bits are cleared */
5933 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5934 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5935
5936 /* Copy original ucode data image from disk into backup cache.
5937 * This will be used to initialize the on-board processor's
5938 * data SRAM for a clean start when the runtime program first loads. */
5939 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5940 priv->ucode_data.len);
5941
5942 /* We return success when we resume from suspend and rf_kill is on. */
5943 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5944 return 0;
5945
5946 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5947
5948 iwl3945_clear_stations_table(priv);
5949
5950 /* load bootstrap state machine,
5951 * load bootstrap program into processor's memory,
5952 * prepare to load the "initialize" uCode */
5953 rc = iwl3945_load_bsm(priv);
5954
5955 if (rc) {
5956 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
5957 continue;
5958 }
5959
5960 /* start card; "initialize" will load runtime ucode */
5961 iwl3945_nic_start(priv);
5962
5963 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5964
5965 return 0;
5966 }
5967
5968 set_bit(STATUS_EXIT_PENDING, &priv->status);
5969 __iwl3945_down(priv);
5970 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5971
5972 /* tried to restart and config the device for as long as our
5973 * patience could withstand */
5974 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5975 return -EIO;
5976 }
5977
5978
5979 /*****************************************************************************
5980 *
5981 * Workqueue callbacks
5982 *
5983 *****************************************************************************/
5984
5985 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5986 {
5987 struct iwl3945_priv *priv =
5988 container_of(data, struct iwl3945_priv, init_alive_start.work);
5989
5990 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5991 return;
5992
5993 mutex_lock(&priv->mutex);
5994 iwl3945_init_alive_start(priv);
5995 mutex_unlock(&priv->mutex);
5996 }
5997
5998 static void iwl3945_bg_alive_start(struct work_struct *data)
5999 {
6000 struct iwl3945_priv *priv =
6001 container_of(data, struct iwl3945_priv, alive_start.work);
6002
6003 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6004 return;
6005
6006 mutex_lock(&priv->mutex);
6007 iwl3945_alive_start(priv);
6008 mutex_unlock(&priv->mutex);
6009 }
6010
6011 static void iwl3945_bg_rf_kill(struct work_struct *work)
6012 {
6013 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
6014
6015 wake_up_interruptible(&priv->wait_command_queue);
6016
6017 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6018 return;
6019
6020 mutex_lock(&priv->mutex);
6021
6022 if (!iwl3945_is_rfkill(priv)) {
6023 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6024 "HW and/or SW RF Kill no longer active, restarting "
6025 "device\n");
6026 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6027 queue_work(priv->workqueue, &priv->restart);
6028 } else {
6029
6030 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6031 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6032 "disabled by SW switch\n");
6033 else
6034 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6035 "Kill switch must be turned off for "
6036 "wireless networking to work.\n");
6037 }
6038
6039 mutex_unlock(&priv->mutex);
6040 iwl3945_rfkill_set_hw_state(priv);
6041 }
6042
6043 static void iwl3945_bg_set_monitor(struct work_struct *work)
6044 {
6045 struct iwl3945_priv *priv = container_of(work,
6046 struct iwl3945_priv, set_monitor);
6047
6048 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
6049
6050 mutex_lock(&priv->mutex);
6051
6052 if (!iwl3945_is_ready(priv))
6053 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
6054 else
6055 if (iwl3945_set_mode(priv, IEEE80211_IF_TYPE_MNTR) != 0)
6056 IWL_ERROR("iwl3945_set_mode() failed\n");
6057
6058 mutex_unlock(&priv->mutex);
6059 }
6060
6061 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6062
6063 static void iwl3945_bg_scan_check(struct work_struct *data)
6064 {
6065 struct iwl3945_priv *priv =
6066 container_of(data, struct iwl3945_priv, scan_check.work);
6067
6068 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6069 return;
6070
6071 mutex_lock(&priv->mutex);
6072 if (test_bit(STATUS_SCANNING, &priv->status) ||
6073 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6074 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6075 "Scan completion watchdog resetting adapter (%dms)\n",
6076 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6077
6078 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6079 iwl3945_send_scan_abort(priv);
6080 }
6081 mutex_unlock(&priv->mutex);
6082 }
6083
6084 static void iwl3945_bg_request_scan(struct work_struct *data)
6085 {
6086 struct iwl3945_priv *priv =
6087 container_of(data, struct iwl3945_priv, request_scan);
6088 struct iwl3945_host_cmd cmd = {
6089 .id = REPLY_SCAN_CMD,
6090 .len = sizeof(struct iwl3945_scan_cmd),
6091 .meta.flags = CMD_SIZE_HUGE,
6092 };
6093 int rc = 0;
6094 struct iwl3945_scan_cmd *scan;
6095 struct ieee80211_conf *conf = NULL;
6096 u8 direct_mask;
6097 enum ieee80211_band band;
6098
6099 conf = ieee80211_get_hw_conf(priv->hw);
6100
6101 mutex_lock(&priv->mutex);
6102
6103 if (!iwl3945_is_ready(priv)) {
6104 IWL_WARNING("request scan called when driver not ready.\n");
6105 goto done;
6106 }
6107
6108 /* Make sure the scan wasn't cancelled before this queued work
6109 * was given the chance to run... */
6110 if (!test_bit(STATUS_SCANNING, &priv->status))
6111 goto done;
6112
6113 /* This should never be called or scheduled if there is currently
6114 * a scan active in the hardware. */
6115 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6116 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6117 "Ignoring second request.\n");
6118 rc = -EIO;
6119 goto done;
6120 }
6121
6122 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6123 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6124 goto done;
6125 }
6126
6127 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6128 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6129 goto done;
6130 }
6131
6132 if (iwl3945_is_rfkill(priv)) {
6133 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6134 goto done;
6135 }
6136
6137 if (!test_bit(STATUS_READY, &priv->status)) {
6138 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6139 goto done;
6140 }
6141
6142 if (!priv->scan_bands) {
6143 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6144 goto done;
6145 }
6146
6147 if (!priv->scan) {
6148 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6149 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6150 if (!priv->scan) {
6151 rc = -ENOMEM;
6152 goto done;
6153 }
6154 }
6155 scan = priv->scan;
6156 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6157
6158 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6159 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6160
6161 if (iwl3945_is_associated(priv)) {
6162 u16 interval = 0;
6163 u32 extra;
6164 u32 suspend_time = 100;
6165 u32 scan_suspend_time = 100;
6166 unsigned long flags;
6167
6168 IWL_DEBUG_INFO("Scanning while associated...\n");
6169
6170 spin_lock_irqsave(&priv->lock, flags);
6171 interval = priv->beacon_int;
6172 spin_unlock_irqrestore(&priv->lock, flags);
6173
6174 scan->suspend_time = 0;
6175 scan->max_out_time = cpu_to_le32(200 * 1024);
6176 if (!interval)
6177 interval = suspend_time;
6178 /*
6179 * suspend time format:
6180 * 0-19: beacon interval in usec (time before exec.)
6181 * 20-23: 0
6182 * 24-31: number of beacons (suspend between channels)
6183 */
6184
6185 extra = (suspend_time / interval) << 24;
6186 scan_suspend_time = 0xFF0FFFFF &
6187 (extra | ((suspend_time % interval) * 1024));
6188
6189 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6190 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6191 scan_suspend_time, interval);
6192 }
6193
6194 /* We should add the ability for user to lock to PASSIVE ONLY */
6195 if (priv->one_direct_scan) {
6196 IWL_DEBUG_SCAN
6197 ("Kicking off one direct scan for '%s'\n",
6198 iwl3945_escape_essid(priv->direct_ssid,
6199 priv->direct_ssid_len));
6200 scan->direct_scan[0].id = WLAN_EID_SSID;
6201 scan->direct_scan[0].len = priv->direct_ssid_len;
6202 memcpy(scan->direct_scan[0].ssid,
6203 priv->direct_ssid, priv->direct_ssid_len);
6204 direct_mask = 1;
6205 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
6206 IWL_DEBUG_SCAN
6207 ("Kicking off one direct scan for '%s' when not associated\n",
6208 iwl3945_escape_essid(priv->essid, priv->essid_len));
6209 scan->direct_scan[0].id = WLAN_EID_SSID;
6210 scan->direct_scan[0].len = priv->essid_len;
6211 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6212 direct_mask = 1;
6213 } else {
6214 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6215 direct_mask = 0;
6216 }
6217
6218 /* We don't build a direct scan probe request; the uCode will do
6219 * that based on the direct_mask added to each channel entry */
6220 scan->tx_cmd.len = cpu_to_le16(
6221 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6222 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
6223 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6224 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6225 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6226
6227 /* flags + rate selection */
6228
6229 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6230 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6231 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6232 scan->good_CRC_th = 0;
6233 band = IEEE80211_BAND_2GHZ;
6234 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6235 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6236 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6237 band = IEEE80211_BAND_5GHZ;
6238 } else {
6239 IWL_WARNING("Invalid scan band count\n");
6240 goto done;
6241 }
6242
6243 /* select Rx antennas */
6244 scan->flags |= iwl3945_get_antenna_flags(priv);
6245
6246 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6247 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6248
6249 if (direct_mask)
6250 scan->channel_count =
6251 iwl3945_get_channels_for_scan(
6252 priv, band, 1, /* active */
6253 direct_mask,
6254 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6255 else
6256 scan->channel_count =
6257 iwl3945_get_channels_for_scan(
6258 priv, band, 0, /* passive */
6259 direct_mask,
6260 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6261
6262 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6263 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6264 cmd.data = scan;
6265 scan->len = cpu_to_le16(cmd.len);
6266
6267 set_bit(STATUS_SCAN_HW, &priv->status);
6268 rc = iwl3945_send_cmd_sync(priv, &cmd);
6269 if (rc)
6270 goto done;
6271
6272 queue_delayed_work(priv->workqueue, &priv->scan_check,
6273 IWL_SCAN_CHECK_WATCHDOG);
6274
6275 mutex_unlock(&priv->mutex);
6276 return;
6277
6278 done:
6279 /* inform mac80211 scan aborted */
6280 queue_work(priv->workqueue, &priv->scan_completed);
6281 mutex_unlock(&priv->mutex);
6282 }
6283
6284 static void iwl3945_bg_up(struct work_struct *data)
6285 {
6286 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6287
6288 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6289 return;
6290
6291 mutex_lock(&priv->mutex);
6292 __iwl3945_up(priv);
6293 mutex_unlock(&priv->mutex);
6294 iwl3945_rfkill_set_hw_state(priv);
6295 }
6296
6297 static void iwl3945_bg_restart(struct work_struct *data)
6298 {
6299 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6300
6301 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6302 return;
6303
6304 iwl3945_down(priv);
6305 queue_work(priv->workqueue, &priv->up);
6306 }
6307
6308 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6309 {
6310 struct iwl3945_priv *priv =
6311 container_of(data, struct iwl3945_priv, rx_replenish);
6312
6313 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6314 return;
6315
6316 mutex_lock(&priv->mutex);
6317 iwl3945_rx_replenish(priv);
6318 mutex_unlock(&priv->mutex);
6319 }
6320
6321 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6322
6323 static void iwl3945_bg_post_associate(struct work_struct *data)
6324 {
6325 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
6326 post_associate.work);
6327
6328 int rc = 0;
6329 struct ieee80211_conf *conf = NULL;
6330 DECLARE_MAC_BUF(mac);
6331
6332 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6333 IWL_ERROR("%s Should not be called in AP mode\n", __func__);
6334 return;
6335 }
6336
6337
6338 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6339 priv->assoc_id,
6340 print_mac(mac, priv->active_rxon.bssid_addr));
6341
6342 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6343 return;
6344
6345 mutex_lock(&priv->mutex);
6346
6347 if (!priv->vif || !priv->is_open) {
6348 mutex_unlock(&priv->mutex);
6349 return;
6350 }
6351 iwl3945_scan_cancel_timeout(priv, 200);
6352
6353 conf = ieee80211_get_hw_conf(priv->hw);
6354
6355 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6356 iwl3945_commit_rxon(priv);
6357
6358 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6359 iwl3945_setup_rxon_timing(priv);
6360 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6361 sizeof(priv->rxon_timing), &priv->rxon_timing);
6362 if (rc)
6363 IWL_WARNING("REPLY_RXON_TIMING failed - "
6364 "Attempting to continue.\n");
6365
6366 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6367
6368 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6369
6370 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6371 priv->assoc_id, priv->beacon_int);
6372
6373 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6374 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6375 else
6376 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6377
6378 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6379 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6380 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6381 else
6382 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6383
6384 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6385 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6386
6387 }
6388
6389 iwl3945_commit_rxon(priv);
6390
6391 switch (priv->iw_mode) {
6392 case IEEE80211_IF_TYPE_STA:
6393 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6394 break;
6395
6396 case IEEE80211_IF_TYPE_IBSS:
6397
6398 /* clear out the station table */
6399 iwl3945_clear_stations_table(priv);
6400
6401 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6402 iwl3945_add_station(priv, priv->bssid, 0, 0);
6403 iwl3945_sync_sta(priv, IWL_STA_ID,
6404 (priv->band == IEEE80211_BAND_5GHZ) ?
6405 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6406 CMD_ASYNC);
6407 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6408 iwl3945_send_beacon_cmd(priv);
6409
6410 break;
6411
6412 default:
6413 IWL_ERROR("%s Should not be called in %d mode\n",
6414 __func__, priv->iw_mode);
6415 break;
6416 }
6417
6418 iwl3945_activate_qos(priv, 0);
6419
6420 /* we have just associated, don't start scan too early */
6421 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6422 mutex_unlock(&priv->mutex);
6423 }
6424
6425 static void iwl3945_bg_abort_scan(struct work_struct *work)
6426 {
6427 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6428
6429 if (!iwl3945_is_ready(priv))
6430 return;
6431
6432 mutex_lock(&priv->mutex);
6433
6434 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6435 iwl3945_send_scan_abort(priv);
6436
6437 mutex_unlock(&priv->mutex);
6438 }
6439
6440 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6441
6442 static void iwl3945_bg_scan_completed(struct work_struct *work)
6443 {
6444 struct iwl3945_priv *priv =
6445 container_of(work, struct iwl3945_priv, scan_completed);
6446
6447 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6448
6449 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6450 return;
6451
6452 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6453 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
6454
6455 ieee80211_scan_completed(priv->hw);
6456
6457 /* Since setting the TXPOWER may have been deferred while
6458 * performing the scan, fire one off */
6459 mutex_lock(&priv->mutex);
6460 iwl3945_hw_reg_send_txpower(priv);
6461 mutex_unlock(&priv->mutex);
6462 }
6463
6464 /*****************************************************************************
6465 *
6466 * mac80211 entry point functions
6467 *
6468 *****************************************************************************/
6469
6470 #define UCODE_READY_TIMEOUT (2 * HZ)
6471
6472 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6473 {
6474 struct iwl3945_priv *priv = hw->priv;
6475 int ret;
6476
6477 IWL_DEBUG_MAC80211("enter\n");
6478
6479 if (pci_enable_device(priv->pci_dev)) {
6480 IWL_ERROR("Fail to pci_enable_device\n");
6481 return -ENODEV;
6482 }
6483 pci_restore_state(priv->pci_dev);
6484 pci_enable_msi(priv->pci_dev);
6485
6486 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6487 DRV_NAME, priv);
6488 if (ret) {
6489 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6490 goto out_disable_msi;
6491 }
6492
6493 /* we should be verifying the device is ready to be opened */
6494 mutex_lock(&priv->mutex);
6495
6496 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6497 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6498 * ucode filename and max sizes are card-specific. */
6499
6500 if (!priv->ucode_code.len) {
6501 ret = iwl3945_read_ucode(priv);
6502 if (ret) {
6503 IWL_ERROR("Could not read microcode: %d\n", ret);
6504 mutex_unlock(&priv->mutex);
6505 goto out_release_irq;
6506 }
6507 }
6508
6509 ret = __iwl3945_up(priv);
6510
6511 mutex_unlock(&priv->mutex);
6512
6513 iwl3945_rfkill_set_hw_state(priv);
6514
6515 if (ret)
6516 goto out_release_irq;
6517
6518 IWL_DEBUG_INFO("Start UP work.\n");
6519
6520 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6521 return 0;
6522
6523 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6524 * mac80211 will not be run successfully. */
6525 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6526 test_bit(STATUS_READY, &priv->status),
6527 UCODE_READY_TIMEOUT);
6528 if (!ret) {
6529 if (!test_bit(STATUS_READY, &priv->status)) {
6530 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6531 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6532 ret = -ETIMEDOUT;
6533 goto out_release_irq;
6534 }
6535 }
6536
6537 priv->is_open = 1;
6538 IWL_DEBUG_MAC80211("leave\n");
6539 return 0;
6540
6541 out_release_irq:
6542 free_irq(priv->pci_dev->irq, priv);
6543 out_disable_msi:
6544 pci_disable_msi(priv->pci_dev);
6545 pci_disable_device(priv->pci_dev);
6546 priv->is_open = 0;
6547 IWL_DEBUG_MAC80211("leave - failed\n");
6548 return ret;
6549 }
6550
6551 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6552 {
6553 struct iwl3945_priv *priv = hw->priv;
6554
6555 IWL_DEBUG_MAC80211("enter\n");
6556
6557 if (!priv->is_open) {
6558 IWL_DEBUG_MAC80211("leave - skip\n");
6559 return;
6560 }
6561
6562 priv->is_open = 0;
6563
6564 if (iwl3945_is_ready_rf(priv)) {
6565 /* stop mac, cancel any scan request and clear
6566 * RXON_FILTER_ASSOC_MSK BIT
6567 */
6568 mutex_lock(&priv->mutex);
6569 iwl3945_scan_cancel_timeout(priv, 100);
6570 cancel_delayed_work(&priv->post_associate);
6571 mutex_unlock(&priv->mutex);
6572 }
6573
6574 iwl3945_down(priv);
6575
6576 flush_workqueue(priv->workqueue);
6577 free_irq(priv->pci_dev->irq, priv);
6578 pci_disable_msi(priv->pci_dev);
6579 pci_save_state(priv->pci_dev);
6580 pci_disable_device(priv->pci_dev);
6581
6582 IWL_DEBUG_MAC80211("leave\n");
6583 }
6584
6585 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6586 {
6587 struct iwl3945_priv *priv = hw->priv;
6588
6589 IWL_DEBUG_MAC80211("enter\n");
6590
6591 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6592 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6593
6594 if (iwl3945_tx_skb(priv, skb))
6595 dev_kfree_skb_any(skb);
6596
6597 IWL_DEBUG_MAC80211("leave\n");
6598 return 0;
6599 }
6600
6601 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6602 struct ieee80211_if_init_conf *conf)
6603 {
6604 struct iwl3945_priv *priv = hw->priv;
6605 unsigned long flags;
6606 DECLARE_MAC_BUF(mac);
6607
6608 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6609
6610 if (priv->vif) {
6611 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6612 return -EOPNOTSUPP;
6613 }
6614
6615 spin_lock_irqsave(&priv->lock, flags);
6616 priv->vif = conf->vif;
6617
6618 spin_unlock_irqrestore(&priv->lock, flags);
6619
6620 mutex_lock(&priv->mutex);
6621
6622 if (conf->mac_addr) {
6623 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6624 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6625 }
6626
6627 if (iwl3945_is_ready(priv))
6628 iwl3945_set_mode(priv, conf->type);
6629
6630 mutex_unlock(&priv->mutex);
6631
6632 IWL_DEBUG_MAC80211("leave\n");
6633 return 0;
6634 }
6635
6636 /**
6637 * iwl3945_mac_config - mac80211 config callback
6638 *
6639 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6640 * be set inappropriately and the driver currently sets the hardware up to
6641 * use it whenever needed.
6642 */
6643 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
6644 {
6645 struct iwl3945_priv *priv = hw->priv;
6646 const struct iwl3945_channel_info *ch_info;
6647 unsigned long flags;
6648 int ret = 0;
6649
6650 mutex_lock(&priv->mutex);
6651 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6652
6653 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6654
6655 if (!iwl3945_is_ready(priv)) {
6656 IWL_DEBUG_MAC80211("leave - not ready\n");
6657 ret = -EIO;
6658 goto out;
6659 }
6660
6661 if (unlikely(!iwl3945_param_disable_hw_scan &&
6662 test_bit(STATUS_SCANNING, &priv->status))) {
6663 IWL_DEBUG_MAC80211("leave - scanning\n");
6664 set_bit(STATUS_CONF_PENDING, &priv->status);
6665 mutex_unlock(&priv->mutex);
6666 return 0;
6667 }
6668
6669 spin_lock_irqsave(&priv->lock, flags);
6670
6671 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6672 conf->channel->hw_value);
6673 if (!is_channel_valid(ch_info)) {
6674 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6675 conf->channel->hw_value, conf->channel->band);
6676 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6677 spin_unlock_irqrestore(&priv->lock, flags);
6678 ret = -EINVAL;
6679 goto out;
6680 }
6681
6682 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6683
6684 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6685
6686 /* The list of supported rates and rate mask can be different
6687 * for each phymode; since the phymode may have changed, reset
6688 * the rate mask to what mac80211 lists */
6689 iwl3945_set_rate(priv);
6690
6691 spin_unlock_irqrestore(&priv->lock, flags);
6692
6693 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6694 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6695 iwl3945_hw_channel_switch(priv, conf->channel);
6696 goto out;
6697 }
6698 #endif
6699
6700 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6701
6702 if (!conf->radio_enabled) {
6703 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6704 goto out;
6705 }
6706
6707 if (iwl3945_is_rfkill(priv)) {
6708 IWL_DEBUG_MAC80211("leave - RF kill\n");
6709 ret = -EIO;
6710 goto out;
6711 }
6712
6713 iwl3945_set_rate(priv);
6714
6715 if (memcmp(&priv->active_rxon,
6716 &priv->staging_rxon, sizeof(priv->staging_rxon)))
6717 iwl3945_commit_rxon(priv);
6718 else
6719 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6720
6721 IWL_DEBUG_MAC80211("leave\n");
6722
6723 out:
6724 clear_bit(STATUS_CONF_PENDING, &priv->status);
6725 mutex_unlock(&priv->mutex);
6726 return ret;
6727 }
6728
6729 static void iwl3945_config_ap(struct iwl3945_priv *priv)
6730 {
6731 int rc = 0;
6732
6733 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6734 return;
6735
6736 /* The following should be done only at AP bring up */
6737 if (!(iwl3945_is_associated(priv))) {
6738
6739 /* RXON - unassoc (to set timing command) */
6740 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6741 iwl3945_commit_rxon(priv);
6742
6743 /* RXON Timing */
6744 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6745 iwl3945_setup_rxon_timing(priv);
6746 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6747 sizeof(priv->rxon_timing), &priv->rxon_timing);
6748 if (rc)
6749 IWL_WARNING("REPLY_RXON_TIMING failed - "
6750 "Attempting to continue.\n");
6751
6752 /* FIXME: what should be the assoc_id for AP? */
6753 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6754 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6755 priv->staging_rxon.flags |=
6756 RXON_FLG_SHORT_PREAMBLE_MSK;
6757 else
6758 priv->staging_rxon.flags &=
6759 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6760
6761 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6762 if (priv->assoc_capability &
6763 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6764 priv->staging_rxon.flags |=
6765 RXON_FLG_SHORT_SLOT_MSK;
6766 else
6767 priv->staging_rxon.flags &=
6768 ~RXON_FLG_SHORT_SLOT_MSK;
6769
6770 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6771 priv->staging_rxon.flags &=
6772 ~RXON_FLG_SHORT_SLOT_MSK;
6773 }
6774 /* restore RXON assoc */
6775 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6776 iwl3945_commit_rxon(priv);
6777 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6778 }
6779 iwl3945_send_beacon_cmd(priv);
6780
6781 /* FIXME - we need to add code here to detect a totally new
6782 * configuration, reset the AP, unassoc, rxon timing, assoc,
6783 * clear sta table, add BCAST sta... */
6784 }
6785
6786 /* temporary */
6787 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb);
6788
6789 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6790 struct ieee80211_vif *vif,
6791 struct ieee80211_if_conf *conf)
6792 {
6793 struct iwl3945_priv *priv = hw->priv;
6794 DECLARE_MAC_BUF(mac);
6795 unsigned long flags;
6796 int rc;
6797
6798 if (conf == NULL)
6799 return -EIO;
6800
6801 if (priv->vif != vif) {
6802 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6803 return 0;
6804 }
6805
6806 /* handle this temporarily here */
6807 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
6808 conf->changed & IEEE80211_IFCC_BEACON) {
6809 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6810 if (!beacon)
6811 return -ENOMEM;
6812 rc = iwl3945_mac_beacon_update(hw, beacon);
6813 if (rc)
6814 return rc;
6815 }
6816
6817 /* XXX: this MUST use conf->mac_addr */
6818
6819 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6820 (!conf->ssid_len)) {
6821 IWL_DEBUG_MAC80211
6822 ("Leaving in AP mode because HostAPD is not ready.\n");
6823 return 0;
6824 }
6825
6826 if (!iwl3945_is_alive(priv))
6827 return -EAGAIN;
6828
6829 mutex_lock(&priv->mutex);
6830
6831 if (conf->bssid)
6832 IWL_DEBUG_MAC80211("bssid: %s\n",
6833 print_mac(mac, conf->bssid));
6834
6835 /*
6836 * very dubious code was here; the probe filtering flag is never set:
6837 *
6838 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6839 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6840 */
6841
6842 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6843 if (!conf->bssid) {
6844 conf->bssid = priv->mac_addr;
6845 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6846 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6847 print_mac(mac, conf->bssid));
6848 }
6849 if (priv->ibss_beacon)
6850 dev_kfree_skb(priv->ibss_beacon);
6851
6852 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6853 }
6854
6855 if (iwl3945_is_rfkill(priv))
6856 goto done;
6857
6858 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6859 !is_multicast_ether_addr(conf->bssid)) {
6860 /* If there is currently a HW scan going on in the background
6861 * then we need to cancel it else the RXON below will fail. */
6862 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6863 IWL_WARNING("Aborted scan still in progress "
6864 "after 100ms\n");
6865 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6866 mutex_unlock(&priv->mutex);
6867 return -EAGAIN;
6868 }
6869 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6870
6871 /* TODO: Audit driver for usage of these members and see
6872 * if mac80211 deprecates them (priv->bssid looks like it
6873 * shouldn't be there, but I haven't scanned the IBSS code
6874 * to verify) - jpk */
6875 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6876
6877 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
6878 iwl3945_config_ap(priv);
6879 else {
6880 rc = iwl3945_commit_rxon(priv);
6881 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
6882 iwl3945_add_station(priv,
6883 priv->active_rxon.bssid_addr, 1, 0);
6884 }
6885
6886 } else {
6887 iwl3945_scan_cancel_timeout(priv, 100);
6888 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6889 iwl3945_commit_rxon(priv);
6890 }
6891
6892 done:
6893 spin_lock_irqsave(&priv->lock, flags);
6894 if (!conf->ssid_len)
6895 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6896 else
6897 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6898
6899 priv->essid_len = conf->ssid_len;
6900 spin_unlock_irqrestore(&priv->lock, flags);
6901
6902 IWL_DEBUG_MAC80211("leave\n");
6903 mutex_unlock(&priv->mutex);
6904
6905 return 0;
6906 }
6907
6908 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6909 unsigned int changed_flags,
6910 unsigned int *total_flags,
6911 int mc_count, struct dev_addr_list *mc_list)
6912 {
6913 struct iwl3945_priv *priv = hw->priv;
6914
6915 if (changed_flags & (*total_flags) & FIF_OTHER_BSS) {
6916 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
6917 IEEE80211_IF_TYPE_MNTR,
6918 changed_flags, *total_flags);
6919 /* queue work 'cuz mac80211 is holding a lock which
6920 * prevents us from issuing (synchronous) f/w cmds */
6921 queue_work(priv->workqueue, &priv->set_monitor);
6922 }
6923 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI |
6924 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6925 }
6926
6927 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6928 struct ieee80211_if_init_conf *conf)
6929 {
6930 struct iwl3945_priv *priv = hw->priv;
6931
6932 IWL_DEBUG_MAC80211("enter\n");
6933
6934 mutex_lock(&priv->mutex);
6935
6936 if (iwl3945_is_ready_rf(priv)) {
6937 iwl3945_scan_cancel_timeout(priv, 100);
6938 cancel_delayed_work(&priv->post_associate);
6939 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6940 iwl3945_commit_rxon(priv);
6941 }
6942 if (priv->vif == conf->vif) {
6943 priv->vif = NULL;
6944 memset(priv->bssid, 0, ETH_ALEN);
6945 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6946 priv->essid_len = 0;
6947 }
6948 mutex_unlock(&priv->mutex);
6949
6950 IWL_DEBUG_MAC80211("leave\n");
6951 }
6952
6953 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6954 {
6955 int rc = 0;
6956 unsigned long flags;
6957 struct iwl3945_priv *priv = hw->priv;
6958
6959 IWL_DEBUG_MAC80211("enter\n");
6960
6961 mutex_lock(&priv->mutex);
6962 spin_lock_irqsave(&priv->lock, flags);
6963
6964 if (!iwl3945_is_ready_rf(priv)) {
6965 rc = -EIO;
6966 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6967 goto out_unlock;
6968 }
6969
6970 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
6971 rc = -EIO;
6972 IWL_ERROR("ERROR: APs don't scan\n");
6973 goto out_unlock;
6974 }
6975
6976 /* we don't schedule scan within next_scan_jiffies period */
6977 if (priv->next_scan_jiffies &&
6978 time_after(priv->next_scan_jiffies, jiffies)) {
6979 rc = -EAGAIN;
6980 goto out_unlock;
6981 }
6982 /* if we just finished scan ask for delay for a broadcast scan */
6983 if ((len == 0) && priv->last_scan_jiffies &&
6984 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6985 jiffies)) {
6986 rc = -EAGAIN;
6987 goto out_unlock;
6988 }
6989 if (len) {
6990 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6991 iwl3945_escape_essid(ssid, len), (int)len);
6992
6993 priv->one_direct_scan = 1;
6994 priv->direct_ssid_len = (u8)
6995 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6996 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6997 } else
6998 priv->one_direct_scan = 0;
6999
7000 rc = iwl3945_scan_initiate(priv);
7001
7002 IWL_DEBUG_MAC80211("leave\n");
7003
7004 out_unlock:
7005 spin_unlock_irqrestore(&priv->lock, flags);
7006 mutex_unlock(&priv->mutex);
7007
7008 return rc;
7009 }
7010
7011 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7012 const u8 *local_addr, const u8 *addr,
7013 struct ieee80211_key_conf *key)
7014 {
7015 struct iwl3945_priv *priv = hw->priv;
7016 int rc = 0;
7017 u8 sta_id;
7018
7019 IWL_DEBUG_MAC80211("enter\n");
7020
7021 if (!iwl3945_param_hwcrypto) {
7022 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7023 return -EOPNOTSUPP;
7024 }
7025
7026 if (is_zero_ether_addr(addr))
7027 /* only support pairwise keys */
7028 return -EOPNOTSUPP;
7029
7030 sta_id = iwl3945_hw_find_station(priv, addr);
7031 if (sta_id == IWL_INVALID_STATION) {
7032 DECLARE_MAC_BUF(mac);
7033
7034 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7035 print_mac(mac, addr));
7036 return -EINVAL;
7037 }
7038
7039 mutex_lock(&priv->mutex);
7040
7041 iwl3945_scan_cancel_timeout(priv, 100);
7042
7043 switch (cmd) {
7044 case SET_KEY:
7045 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7046 if (!rc) {
7047 iwl3945_set_rxon_hwcrypto(priv, 1);
7048 iwl3945_commit_rxon(priv);
7049 key->hw_key_idx = sta_id;
7050 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7051 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7052 }
7053 break;
7054 case DISABLE_KEY:
7055 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7056 if (!rc) {
7057 iwl3945_set_rxon_hwcrypto(priv, 0);
7058 iwl3945_commit_rxon(priv);
7059 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7060 }
7061 break;
7062 default:
7063 rc = -EINVAL;
7064 }
7065
7066 IWL_DEBUG_MAC80211("leave\n");
7067 mutex_unlock(&priv->mutex);
7068
7069 return rc;
7070 }
7071
7072 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
7073 const struct ieee80211_tx_queue_params *params)
7074 {
7075 struct iwl3945_priv *priv = hw->priv;
7076 unsigned long flags;
7077 int q;
7078
7079 IWL_DEBUG_MAC80211("enter\n");
7080
7081 if (!iwl3945_is_ready_rf(priv)) {
7082 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7083 return -EIO;
7084 }
7085
7086 if (queue >= AC_NUM) {
7087 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7088 return 0;
7089 }
7090
7091 if (!priv->qos_data.qos_enable) {
7092 priv->qos_data.qos_active = 0;
7093 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7094 return 0;
7095 }
7096 q = AC_NUM - 1 - queue;
7097
7098 spin_lock_irqsave(&priv->lock, flags);
7099
7100 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7101 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7102 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7103 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7104 cpu_to_le16((params->txop * 32));
7105
7106 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7107 priv->qos_data.qos_active = 1;
7108
7109 spin_unlock_irqrestore(&priv->lock, flags);
7110
7111 mutex_lock(&priv->mutex);
7112 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7113 iwl3945_activate_qos(priv, 1);
7114 else if (priv->assoc_id && iwl3945_is_associated(priv))
7115 iwl3945_activate_qos(priv, 0);
7116
7117 mutex_unlock(&priv->mutex);
7118
7119 IWL_DEBUG_MAC80211("leave\n");
7120 return 0;
7121 }
7122
7123 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7124 struct ieee80211_tx_queue_stats *stats)
7125 {
7126 struct iwl3945_priv *priv = hw->priv;
7127 int i, avail;
7128 struct iwl3945_tx_queue *txq;
7129 struct iwl3945_queue *q;
7130 unsigned long flags;
7131
7132 IWL_DEBUG_MAC80211("enter\n");
7133
7134 if (!iwl3945_is_ready_rf(priv)) {
7135 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7136 return -EIO;
7137 }
7138
7139 spin_lock_irqsave(&priv->lock, flags);
7140
7141 for (i = 0; i < AC_NUM; i++) {
7142 txq = &priv->txq[i];
7143 q = &txq->q;
7144 avail = iwl3945_queue_space(q);
7145
7146 stats[i].len = q->n_window - avail;
7147 stats[i].limit = q->n_window - q->high_mark;
7148 stats[i].count = q->n_window;
7149
7150 }
7151 spin_unlock_irqrestore(&priv->lock, flags);
7152
7153 IWL_DEBUG_MAC80211("leave\n");
7154
7155 return 0;
7156 }
7157
7158 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7159 struct ieee80211_low_level_stats *stats)
7160 {
7161 IWL_DEBUG_MAC80211("enter\n");
7162 IWL_DEBUG_MAC80211("leave\n");
7163
7164 return 0;
7165 }
7166
7167 static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
7168 {
7169 IWL_DEBUG_MAC80211("enter\n");
7170 IWL_DEBUG_MAC80211("leave\n");
7171
7172 return 0;
7173 }
7174
7175 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7176 {
7177 struct iwl3945_priv *priv = hw->priv;
7178 unsigned long flags;
7179
7180 mutex_lock(&priv->mutex);
7181 IWL_DEBUG_MAC80211("enter\n");
7182
7183 iwl3945_reset_qos(priv);
7184
7185 cancel_delayed_work(&priv->post_associate);
7186
7187 spin_lock_irqsave(&priv->lock, flags);
7188 priv->assoc_id = 0;
7189 priv->assoc_capability = 0;
7190 priv->call_post_assoc_from_beacon = 0;
7191
7192 /* new association get rid of ibss beacon skb */
7193 if (priv->ibss_beacon)
7194 dev_kfree_skb(priv->ibss_beacon);
7195
7196 priv->ibss_beacon = NULL;
7197
7198 priv->beacon_int = priv->hw->conf.beacon_int;
7199 priv->timestamp1 = 0;
7200 priv->timestamp0 = 0;
7201 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7202 priv->beacon_int = 0;
7203
7204 spin_unlock_irqrestore(&priv->lock, flags);
7205
7206 if (!iwl3945_is_ready_rf(priv)) {
7207 IWL_DEBUG_MAC80211("leave - not ready\n");
7208 mutex_unlock(&priv->mutex);
7209 return;
7210 }
7211
7212 /* we are restarting association process
7213 * clear RXON_FILTER_ASSOC_MSK bit
7214 */
7215 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7216 iwl3945_scan_cancel_timeout(priv, 100);
7217 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7218 iwl3945_commit_rxon(priv);
7219 }
7220
7221 /* Per mac80211.h: This is only used in IBSS mode... */
7222 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7223
7224 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7225 mutex_unlock(&priv->mutex);
7226 return;
7227 }
7228
7229 iwl3945_set_rate(priv);
7230
7231 mutex_unlock(&priv->mutex);
7232
7233 IWL_DEBUG_MAC80211("leave\n");
7234
7235 }
7236
7237 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7238 {
7239 struct iwl3945_priv *priv = hw->priv;
7240 unsigned long flags;
7241
7242 mutex_lock(&priv->mutex);
7243 IWL_DEBUG_MAC80211("enter\n");
7244
7245 if (!iwl3945_is_ready_rf(priv)) {
7246 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7247 mutex_unlock(&priv->mutex);
7248 return -EIO;
7249 }
7250
7251 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7252 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7253 mutex_unlock(&priv->mutex);
7254 return -EIO;
7255 }
7256
7257 spin_lock_irqsave(&priv->lock, flags);
7258
7259 if (priv->ibss_beacon)
7260 dev_kfree_skb(priv->ibss_beacon);
7261
7262 priv->ibss_beacon = skb;
7263
7264 priv->assoc_id = 0;
7265
7266 IWL_DEBUG_MAC80211("leave\n");
7267 spin_unlock_irqrestore(&priv->lock, flags);
7268
7269 iwl3945_reset_qos(priv);
7270
7271 queue_work(priv->workqueue, &priv->post_associate.work);
7272
7273 mutex_unlock(&priv->mutex);
7274
7275 return 0;
7276 }
7277
7278 /*****************************************************************************
7279 *
7280 * sysfs attributes
7281 *
7282 *****************************************************************************/
7283
7284 #ifdef CONFIG_IWL3945_DEBUG
7285
7286 /*
7287 * The following adds a new attribute to the sysfs representation
7288 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7289 * used for controlling the debug level.
7290 *
7291 * See the level definitions in iwl for details.
7292 */
7293
7294 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7295 {
7296 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7297 }
7298 static ssize_t store_debug_level(struct device_driver *d,
7299 const char *buf, size_t count)
7300 {
7301 char *p = (char *)buf;
7302 u32 val;
7303
7304 val = simple_strtoul(p, &p, 0);
7305 if (p == buf)
7306 printk(KERN_INFO DRV_NAME
7307 ": %s is not in hex or decimal form.\n", buf);
7308 else
7309 iwl3945_debug_level = val;
7310
7311 return strnlen(buf, count);
7312 }
7313
7314 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7315 show_debug_level, store_debug_level);
7316
7317 #endif /* CONFIG_IWL3945_DEBUG */
7318
7319 static ssize_t show_temperature(struct device *d,
7320 struct device_attribute *attr, char *buf)
7321 {
7322 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7323
7324 if (!iwl3945_is_alive(priv))
7325 return -EAGAIN;
7326
7327 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7328 }
7329
7330 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7331
7332 static ssize_t show_rs_window(struct device *d,
7333 struct device_attribute *attr,
7334 char *buf)
7335 {
7336 struct iwl3945_priv *priv = d->driver_data;
7337 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
7338 }
7339 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7340
7341 static ssize_t show_tx_power(struct device *d,
7342 struct device_attribute *attr, char *buf)
7343 {
7344 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7345 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7346 }
7347
7348 static ssize_t store_tx_power(struct device *d,
7349 struct device_attribute *attr,
7350 const char *buf, size_t count)
7351 {
7352 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7353 char *p = (char *)buf;
7354 u32 val;
7355
7356 val = simple_strtoul(p, &p, 10);
7357 if (p == buf)
7358 printk(KERN_INFO DRV_NAME
7359 ": %s is not in decimal form.\n", buf);
7360 else
7361 iwl3945_hw_reg_set_txpower(priv, val);
7362
7363 return count;
7364 }
7365
7366 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7367
7368 static ssize_t show_flags(struct device *d,
7369 struct device_attribute *attr, char *buf)
7370 {
7371 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7372
7373 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7374 }
7375
7376 static ssize_t store_flags(struct device *d,
7377 struct device_attribute *attr,
7378 const char *buf, size_t count)
7379 {
7380 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7381 u32 flags = simple_strtoul(buf, NULL, 0);
7382
7383 mutex_lock(&priv->mutex);
7384 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7385 /* Cancel any currently running scans... */
7386 if (iwl3945_scan_cancel_timeout(priv, 100))
7387 IWL_WARNING("Could not cancel scan.\n");
7388 else {
7389 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7390 flags);
7391 priv->staging_rxon.flags = cpu_to_le32(flags);
7392 iwl3945_commit_rxon(priv);
7393 }
7394 }
7395 mutex_unlock(&priv->mutex);
7396
7397 return count;
7398 }
7399
7400 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7401
7402 static ssize_t show_filter_flags(struct device *d,
7403 struct device_attribute *attr, char *buf)
7404 {
7405 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7406
7407 return sprintf(buf, "0x%04X\n",
7408 le32_to_cpu(priv->active_rxon.filter_flags));
7409 }
7410
7411 static ssize_t store_filter_flags(struct device *d,
7412 struct device_attribute *attr,
7413 const char *buf, size_t count)
7414 {
7415 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7416 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7417
7418 mutex_lock(&priv->mutex);
7419 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7420 /* Cancel any currently running scans... */
7421 if (iwl3945_scan_cancel_timeout(priv, 100))
7422 IWL_WARNING("Could not cancel scan.\n");
7423 else {
7424 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7425 "0x%04X\n", filter_flags);
7426 priv->staging_rxon.filter_flags =
7427 cpu_to_le32(filter_flags);
7428 iwl3945_commit_rxon(priv);
7429 }
7430 }
7431 mutex_unlock(&priv->mutex);
7432
7433 return count;
7434 }
7435
7436 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7437 store_filter_flags);
7438
7439 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7440
7441 static ssize_t show_measurement(struct device *d,
7442 struct device_attribute *attr, char *buf)
7443 {
7444 struct iwl3945_priv *priv = dev_get_drvdata(d);
7445 struct iwl3945_spectrum_notification measure_report;
7446 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7447 u8 *data = (u8 *)&measure_report;
7448 unsigned long flags;
7449
7450 spin_lock_irqsave(&priv->lock, flags);
7451 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7452 spin_unlock_irqrestore(&priv->lock, flags);
7453 return 0;
7454 }
7455 memcpy(&measure_report, &priv->measure_report, size);
7456 priv->measurement_status = 0;
7457 spin_unlock_irqrestore(&priv->lock, flags);
7458
7459 while (size && (PAGE_SIZE - len)) {
7460 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7461 PAGE_SIZE - len, 1);
7462 len = strlen(buf);
7463 if (PAGE_SIZE - len)
7464 buf[len++] = '\n';
7465
7466 ofs += 16;
7467 size -= min(size, 16U);
7468 }
7469
7470 return len;
7471 }
7472
7473 static ssize_t store_measurement(struct device *d,
7474 struct device_attribute *attr,
7475 const char *buf, size_t count)
7476 {
7477 struct iwl3945_priv *priv = dev_get_drvdata(d);
7478 struct ieee80211_measurement_params params = {
7479 .channel = le16_to_cpu(priv->active_rxon.channel),
7480 .start_time = cpu_to_le64(priv->last_tsf),
7481 .duration = cpu_to_le16(1),
7482 };
7483 u8 type = IWL_MEASURE_BASIC;
7484 u8 buffer[32];
7485 u8 channel;
7486
7487 if (count) {
7488 char *p = buffer;
7489 strncpy(buffer, buf, min(sizeof(buffer), count));
7490 channel = simple_strtoul(p, NULL, 0);
7491 if (channel)
7492 params.channel = channel;
7493
7494 p = buffer;
7495 while (*p && *p != ' ')
7496 p++;
7497 if (*p)
7498 type = simple_strtoul(p + 1, NULL, 0);
7499 }
7500
7501 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7502 "channel %d (for '%s')\n", type, params.channel, buf);
7503 iwl3945_get_measurement(priv, &params, type);
7504
7505 return count;
7506 }
7507
7508 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7509 show_measurement, store_measurement);
7510 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7511
7512 static ssize_t store_retry_rate(struct device *d,
7513 struct device_attribute *attr,
7514 const char *buf, size_t count)
7515 {
7516 struct iwl3945_priv *priv = dev_get_drvdata(d);
7517
7518 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7519 if (priv->retry_rate <= 0)
7520 priv->retry_rate = 1;
7521
7522 return count;
7523 }
7524
7525 static ssize_t show_retry_rate(struct device *d,
7526 struct device_attribute *attr, char *buf)
7527 {
7528 struct iwl3945_priv *priv = dev_get_drvdata(d);
7529 return sprintf(buf, "%d", priv->retry_rate);
7530 }
7531
7532 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7533 store_retry_rate);
7534
7535 static ssize_t store_power_level(struct device *d,
7536 struct device_attribute *attr,
7537 const char *buf, size_t count)
7538 {
7539 struct iwl3945_priv *priv = dev_get_drvdata(d);
7540 int rc;
7541 int mode;
7542
7543 mode = simple_strtoul(buf, NULL, 0);
7544 mutex_lock(&priv->mutex);
7545
7546 if (!iwl3945_is_ready(priv)) {
7547 rc = -EAGAIN;
7548 goto out;
7549 }
7550
7551 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7552 mode = IWL_POWER_AC;
7553 else
7554 mode |= IWL_POWER_ENABLED;
7555
7556 if (mode != priv->power_mode) {
7557 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7558 if (rc) {
7559 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7560 goto out;
7561 }
7562 priv->power_mode = mode;
7563 }
7564
7565 rc = count;
7566
7567 out:
7568 mutex_unlock(&priv->mutex);
7569 return rc;
7570 }
7571
7572 #define MAX_WX_STRING 80
7573
7574 /* Values are in microsecond */
7575 static const s32 timeout_duration[] = {
7576 350000,
7577 250000,
7578 75000,
7579 37000,
7580 25000,
7581 };
7582 static const s32 period_duration[] = {
7583 400000,
7584 700000,
7585 1000000,
7586 1000000,
7587 1000000
7588 };
7589
7590 static ssize_t show_power_level(struct device *d,
7591 struct device_attribute *attr, char *buf)
7592 {
7593 struct iwl3945_priv *priv = dev_get_drvdata(d);
7594 int level = IWL_POWER_LEVEL(priv->power_mode);
7595 char *p = buf;
7596
7597 p += sprintf(p, "%d ", level);
7598 switch (level) {
7599 case IWL_POWER_MODE_CAM:
7600 case IWL_POWER_AC:
7601 p += sprintf(p, "(AC)");
7602 break;
7603 case IWL_POWER_BATTERY:
7604 p += sprintf(p, "(BATTERY)");
7605 break;
7606 default:
7607 p += sprintf(p,
7608 "(Timeout %dms, Period %dms)",
7609 timeout_duration[level - 1] / 1000,
7610 period_duration[level - 1] / 1000);
7611 }
7612
7613 if (!(priv->power_mode & IWL_POWER_ENABLED))
7614 p += sprintf(p, " OFF\n");
7615 else
7616 p += sprintf(p, " \n");
7617
7618 return p - buf + 1;
7619
7620 }
7621
7622 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7623 store_power_level);
7624
7625 static ssize_t show_channels(struct device *d,
7626 struct device_attribute *attr, char *buf)
7627 {
7628 /* all this shit doesn't belong into sysfs anyway */
7629 return 0;
7630 }
7631
7632 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7633
7634 static ssize_t show_statistics(struct device *d,
7635 struct device_attribute *attr, char *buf)
7636 {
7637 struct iwl3945_priv *priv = dev_get_drvdata(d);
7638 u32 size = sizeof(struct iwl3945_notif_statistics);
7639 u32 len = 0, ofs = 0;
7640 u8 *data = (u8 *)&priv->statistics;
7641 int rc = 0;
7642
7643 if (!iwl3945_is_alive(priv))
7644 return -EAGAIN;
7645
7646 mutex_lock(&priv->mutex);
7647 rc = iwl3945_send_statistics_request(priv);
7648 mutex_unlock(&priv->mutex);
7649
7650 if (rc) {
7651 len = sprintf(buf,
7652 "Error sending statistics request: 0x%08X\n", rc);
7653 return len;
7654 }
7655
7656 while (size && (PAGE_SIZE - len)) {
7657 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7658 PAGE_SIZE - len, 1);
7659 len = strlen(buf);
7660 if (PAGE_SIZE - len)
7661 buf[len++] = '\n';
7662
7663 ofs += 16;
7664 size -= min(size, 16U);
7665 }
7666
7667 return len;
7668 }
7669
7670 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7671
7672 static ssize_t show_antenna(struct device *d,
7673 struct device_attribute *attr, char *buf)
7674 {
7675 struct iwl3945_priv *priv = dev_get_drvdata(d);
7676
7677 if (!iwl3945_is_alive(priv))
7678 return -EAGAIN;
7679
7680 return sprintf(buf, "%d\n", priv->antenna);
7681 }
7682
7683 static ssize_t store_antenna(struct device *d,
7684 struct device_attribute *attr,
7685 const char *buf, size_t count)
7686 {
7687 int ant;
7688 struct iwl3945_priv *priv = dev_get_drvdata(d);
7689
7690 if (count == 0)
7691 return 0;
7692
7693 if (sscanf(buf, "%1i", &ant) != 1) {
7694 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7695 return count;
7696 }
7697
7698 if ((ant >= 0) && (ant <= 2)) {
7699 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7700 priv->antenna = (enum iwl3945_antenna)ant;
7701 } else
7702 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7703
7704
7705 return count;
7706 }
7707
7708 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7709
7710 static ssize_t show_status(struct device *d,
7711 struct device_attribute *attr, char *buf)
7712 {
7713 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7714 if (!iwl3945_is_alive(priv))
7715 return -EAGAIN;
7716 return sprintf(buf, "0x%08x\n", (int)priv->status);
7717 }
7718
7719 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7720
7721 static ssize_t dump_error_log(struct device *d,
7722 struct device_attribute *attr,
7723 const char *buf, size_t count)
7724 {
7725 char *p = (char *)buf;
7726
7727 if (p[0] == '1')
7728 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
7729
7730 return strnlen(buf, count);
7731 }
7732
7733 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7734
7735 static ssize_t dump_event_log(struct device *d,
7736 struct device_attribute *attr,
7737 const char *buf, size_t count)
7738 {
7739 char *p = (char *)buf;
7740
7741 if (p[0] == '1')
7742 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
7743
7744 return strnlen(buf, count);
7745 }
7746
7747 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7748
7749 /*****************************************************************************
7750 *
7751 * driver setup and teardown
7752 *
7753 *****************************************************************************/
7754
7755 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
7756 {
7757 priv->workqueue = create_workqueue(DRV_NAME);
7758
7759 init_waitqueue_head(&priv->wait_command_queue);
7760
7761 INIT_WORK(&priv->up, iwl3945_bg_up);
7762 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7763 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7764 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7765 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7766 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7767 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7768 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7769 INIT_WORK(&priv->set_monitor, iwl3945_bg_set_monitor);
7770 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
7771 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7772 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7773 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7774
7775 iwl3945_hw_setup_deferred_work(priv);
7776
7777 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7778 iwl3945_irq_tasklet, (unsigned long)priv);
7779 }
7780
7781 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
7782 {
7783 iwl3945_hw_cancel_deferred_work(priv);
7784
7785 cancel_delayed_work_sync(&priv->init_alive_start);
7786 cancel_delayed_work(&priv->scan_check);
7787 cancel_delayed_work(&priv->alive_start);
7788 cancel_delayed_work(&priv->post_associate);
7789 cancel_work_sync(&priv->beacon_update);
7790 }
7791
7792 static struct attribute *iwl3945_sysfs_entries[] = {
7793 &dev_attr_antenna.attr,
7794 &dev_attr_channels.attr,
7795 &dev_attr_dump_errors.attr,
7796 &dev_attr_dump_events.attr,
7797 &dev_attr_flags.attr,
7798 &dev_attr_filter_flags.attr,
7799 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7800 &dev_attr_measurement.attr,
7801 #endif
7802 &dev_attr_power_level.attr,
7803 &dev_attr_retry_rate.attr,
7804 &dev_attr_rs_window.attr,
7805 &dev_attr_statistics.attr,
7806 &dev_attr_status.attr,
7807 &dev_attr_temperature.attr,
7808 &dev_attr_tx_power.attr,
7809
7810 NULL
7811 };
7812
7813 static struct attribute_group iwl3945_attribute_group = {
7814 .name = NULL, /* put in device directory */
7815 .attrs = iwl3945_sysfs_entries,
7816 };
7817
7818 static struct ieee80211_ops iwl3945_hw_ops = {
7819 .tx = iwl3945_mac_tx,
7820 .start = iwl3945_mac_start,
7821 .stop = iwl3945_mac_stop,
7822 .add_interface = iwl3945_mac_add_interface,
7823 .remove_interface = iwl3945_mac_remove_interface,
7824 .config = iwl3945_mac_config,
7825 .config_interface = iwl3945_mac_config_interface,
7826 .configure_filter = iwl3945_configure_filter,
7827 .set_key = iwl3945_mac_set_key,
7828 .get_stats = iwl3945_mac_get_stats,
7829 .get_tx_stats = iwl3945_mac_get_tx_stats,
7830 .conf_tx = iwl3945_mac_conf_tx,
7831 .get_tsf = iwl3945_mac_get_tsf,
7832 .reset_tsf = iwl3945_mac_reset_tsf,
7833 .hw_scan = iwl3945_mac_hw_scan
7834 };
7835
7836 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7837 {
7838 int err = 0;
7839 struct iwl3945_priv *priv;
7840 struct ieee80211_hw *hw;
7841 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
7842 unsigned long flags;
7843 DECLARE_MAC_BUF(mac);
7844
7845 /* Disabling hardware scan means that mac80211 will perform scans
7846 * "the hard way", rather than using device's scan. */
7847 if (iwl3945_param_disable_hw_scan) {
7848 IWL_DEBUG_INFO("Disabling hw_scan\n");
7849 iwl3945_hw_ops.hw_scan = NULL;
7850 }
7851
7852 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
7853 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
7854 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7855 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7856 err = -EINVAL;
7857 goto out;
7858 }
7859
7860 /* mac80211 allocates memory for this device instance, including
7861 * space for this driver's private structure */
7862 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
7863 if (hw == NULL) {
7864 IWL_ERROR("Can not allocate network device\n");
7865 err = -ENOMEM;
7866 goto out;
7867 }
7868 SET_IEEE80211_DEV(hw, &pdev->dev);
7869
7870 hw->rate_control_algorithm = "iwl-3945-rs";
7871
7872 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7873 priv = hw->priv;
7874 priv->hw = hw;
7875
7876 priv->pci_dev = pdev;
7877 priv->cfg = cfg;
7878
7879 /* Select antenna (may be helpful if only one antenna is connected) */
7880 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
7881 #ifdef CONFIG_IWL3945_DEBUG
7882 iwl3945_debug_level = iwl3945_param_debug;
7883 atomic_set(&priv->restrict_refcnt, 0);
7884 #endif
7885 priv->retry_rate = 1;
7886
7887 priv->ibss_beacon = NULL;
7888
7889 /* Tell mac80211 our characteristics */
7890 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7891 IEEE80211_HW_NOISE_DBM;
7892
7893 /* 4 EDCA QOS priorities */
7894 hw->queues = 4;
7895
7896 spin_lock_init(&priv->lock);
7897 spin_lock_init(&priv->power_data.lock);
7898 spin_lock_init(&priv->sta_lock);
7899 spin_lock_init(&priv->hcmd_lock);
7900
7901 INIT_LIST_HEAD(&priv->free_frames);
7902
7903 mutex_init(&priv->mutex);
7904 if (pci_enable_device(pdev)) {
7905 err = -ENODEV;
7906 goto out_ieee80211_free_hw;
7907 }
7908
7909 pci_set_master(pdev);
7910
7911 /* Clear the driver's (not device's) station table */
7912 iwl3945_clear_stations_table(priv);
7913
7914 priv->data_retry_limit = -1;
7915 priv->ieee_channels = NULL;
7916 priv->ieee_rates = NULL;
7917 priv->band = IEEE80211_BAND_2GHZ;
7918
7919 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7920 if (!err)
7921 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7922 if (err) {
7923 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
7924 goto out_pci_disable_device;
7925 }
7926
7927 pci_set_drvdata(pdev, priv);
7928 err = pci_request_regions(pdev, DRV_NAME);
7929 if (err)
7930 goto out_pci_disable_device;
7931
7932 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7933 * PCI Tx retries from interfering with C3 CPU state */
7934 pci_write_config_byte(pdev, 0x41, 0x00);
7935
7936 priv->hw_base = pci_iomap(pdev, 0, 0);
7937 if (!priv->hw_base) {
7938 err = -ENODEV;
7939 goto out_pci_release_regions;
7940 }
7941
7942 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7943 (unsigned long long) pci_resource_len(pdev, 0));
7944 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7945
7946 /* Initialize module parameter values here */
7947
7948 /* Disable radio (SW RF KILL) via parameter when loading driver */
7949 if (iwl3945_param_disable) {
7950 set_bit(STATUS_RF_KILL_SW, &priv->status);
7951 IWL_DEBUG_INFO("Radio disabled.\n");
7952 }
7953
7954 priv->iw_mode = IEEE80211_IF_TYPE_STA;
7955
7956 printk(KERN_INFO DRV_NAME
7957 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
7958
7959 /* Device-specific setup */
7960 if (iwl3945_hw_set_hw_setting(priv)) {
7961 IWL_ERROR("failed to set hw settings\n");
7962 goto out_iounmap;
7963 }
7964
7965 if (iwl3945_param_qos_enable)
7966 priv->qos_data.qos_enable = 1;
7967
7968 iwl3945_reset_qos(priv);
7969
7970 priv->qos_data.qos_active = 0;
7971 priv->qos_data.qos_cap.val = 0;
7972
7973 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7974 iwl3945_setup_deferred_work(priv);
7975 iwl3945_setup_rx_handlers(priv);
7976
7977 priv->rates_mask = IWL_RATES_MASK;
7978 /* If power management is turned on, default to AC mode */
7979 priv->power_mode = IWL_POWER_AC;
7980 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7981
7982 spin_lock_irqsave(&priv->lock, flags);
7983 iwl3945_disable_interrupts(priv);
7984 spin_unlock_irqrestore(&priv->lock, flags);
7985
7986 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7987 if (err) {
7988 IWL_ERROR("failed to create sysfs device attributes\n");
7989 goto out_release_irq;
7990 }
7991
7992 /* nic init */
7993 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7994 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7995
7996 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7997 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
7998 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
7999 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8000 if (err < 0) {
8001 IWL_DEBUG_INFO("Failed to init the card\n");
8002 goto out_remove_sysfs;
8003 }
8004 /* Read the EEPROM */
8005 err = iwl3945_eeprom_init(priv);
8006 if (err) {
8007 IWL_ERROR("Unable to init EEPROM\n");
8008 goto out_remove_sysfs;
8009 }
8010 /* MAC Address location in EEPROM same for 3945/4965 */
8011 get_eeprom_mac(priv, priv->mac_addr);
8012 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8013 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8014
8015 err = iwl3945_init_channel_map(priv);
8016 if (err) {
8017 IWL_ERROR("initializing regulatory failed: %d\n", err);
8018 goto out_remove_sysfs;
8019 }
8020
8021 err = iwl3945_init_geos(priv);
8022 if (err) {
8023 IWL_ERROR("initializing geos failed: %d\n", err);
8024 goto out_free_channel_map;
8025 }
8026
8027 err = ieee80211_register_hw(priv->hw);
8028 if (err) {
8029 IWL_ERROR("Failed to register network device (error %d)\n", err);
8030 goto out_free_geos;
8031 }
8032
8033 priv->hw->conf.beacon_int = 100;
8034 priv->mac80211_registered = 1;
8035 pci_save_state(pdev);
8036 pci_disable_device(pdev);
8037
8038 err = iwl3945_rfkill_init(priv);
8039 if (err)
8040 IWL_ERROR("Unable to initialize RFKILL system. "
8041 "Ignoring error: %d\n", err);
8042
8043 return 0;
8044
8045 out_free_geos:
8046 iwl3945_free_geos(priv);
8047 out_free_channel_map:
8048 iwl3945_free_channel_map(priv);
8049 out_remove_sysfs:
8050 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8051
8052 out_release_irq:
8053 destroy_workqueue(priv->workqueue);
8054 priv->workqueue = NULL;
8055 iwl3945_unset_hw_setting(priv);
8056
8057 out_iounmap:
8058 pci_iounmap(pdev, priv->hw_base);
8059 out_pci_release_regions:
8060 pci_release_regions(pdev);
8061 out_pci_disable_device:
8062 pci_disable_device(pdev);
8063 pci_set_drvdata(pdev, NULL);
8064 out_ieee80211_free_hw:
8065 ieee80211_free_hw(priv->hw);
8066 out:
8067 return err;
8068 }
8069
8070 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
8071 {
8072 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8073 unsigned long flags;
8074
8075 if (!priv)
8076 return;
8077
8078 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8079
8080 set_bit(STATUS_EXIT_PENDING, &priv->status);
8081
8082 iwl3945_down(priv);
8083
8084 /* make sure we flush any pending irq or
8085 * tasklet for the driver
8086 */
8087 spin_lock_irqsave(&priv->lock, flags);
8088 iwl3945_disable_interrupts(priv);
8089 spin_unlock_irqrestore(&priv->lock, flags);
8090
8091 iwl_synchronize_irq(priv);
8092
8093 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8094
8095 iwl3945_rfkill_unregister(priv);
8096 iwl3945_dealloc_ucode_pci(priv);
8097
8098 if (priv->rxq.bd)
8099 iwl3945_rx_queue_free(priv, &priv->rxq);
8100 iwl3945_hw_txq_ctx_free(priv);
8101
8102 iwl3945_unset_hw_setting(priv);
8103 iwl3945_clear_stations_table(priv);
8104
8105 if (priv->mac80211_registered)
8106 ieee80211_unregister_hw(priv->hw);
8107
8108 /*netif_stop_queue(dev); */
8109 flush_workqueue(priv->workqueue);
8110
8111 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8112 * priv->workqueue... so we can't take down the workqueue
8113 * until now... */
8114 destroy_workqueue(priv->workqueue);
8115 priv->workqueue = NULL;
8116
8117 pci_iounmap(pdev, priv->hw_base);
8118 pci_release_regions(pdev);
8119 pci_disable_device(pdev);
8120 pci_set_drvdata(pdev, NULL);
8121
8122 iwl3945_free_channel_map(priv);
8123 iwl3945_free_geos(priv);
8124 kfree(priv->scan);
8125 if (priv->ibss_beacon)
8126 dev_kfree_skb(priv->ibss_beacon);
8127
8128 ieee80211_free_hw(priv->hw);
8129 }
8130
8131 #ifdef CONFIG_PM
8132
8133 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8134 {
8135 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8136
8137 if (priv->is_open) {
8138 set_bit(STATUS_IN_SUSPEND, &priv->status);
8139 iwl3945_mac_stop(priv->hw);
8140 priv->is_open = 1;
8141 }
8142
8143 pci_set_power_state(pdev, PCI_D3hot);
8144
8145 return 0;
8146 }
8147
8148 static int iwl3945_pci_resume(struct pci_dev *pdev)
8149 {
8150 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8151
8152 pci_set_power_state(pdev, PCI_D0);
8153
8154 if (priv->is_open)
8155 iwl3945_mac_start(priv->hw);
8156
8157 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8158 return 0;
8159 }
8160
8161 #endif /* CONFIG_PM */
8162
8163 /*************** RFKILL FUNCTIONS **********/
8164 #ifdef CONFIG_IWL3945_RFKILL
8165 /* software rf-kill from user */
8166 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8167 {
8168 struct iwl3945_priv *priv = data;
8169 int err = 0;
8170
8171 if (!priv->rfkill)
8172 return 0;
8173
8174 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8175 return 0;
8176
8177 IWL_DEBUG_RF_KILL("we recieved soft RFKILL set to state %d\n", state);
8178 mutex_lock(&priv->mutex);
8179
8180 switch (state) {
8181 case RFKILL_STATE_UNBLOCKED:
8182 if (iwl3945_is_rfkill_hw(priv)) {
8183 err = -EBUSY;
8184 goto out_unlock;
8185 }
8186 iwl3945_radio_kill_sw(priv, 0);
8187 break;
8188 case RFKILL_STATE_SOFT_BLOCKED:
8189 iwl3945_radio_kill_sw(priv, 1);
8190 break;
8191 default:
8192 IWL_WARNING("we recieved unexpected RFKILL state %d\n", state);
8193 break;
8194 }
8195 out_unlock:
8196 mutex_unlock(&priv->mutex);
8197
8198 return err;
8199 }
8200
8201 int iwl3945_rfkill_init(struct iwl3945_priv *priv)
8202 {
8203 struct device *device = wiphy_dev(priv->hw->wiphy);
8204 int ret = 0;
8205
8206 BUG_ON(device == NULL);
8207
8208 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8209 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8210 if (!priv->rfkill) {
8211 IWL_ERROR("Unable to allocate rfkill device.\n");
8212 ret = -ENOMEM;
8213 goto error;
8214 }
8215
8216 priv->rfkill->name = priv->cfg->name;
8217 priv->rfkill->data = priv;
8218 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8219 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8220 priv->rfkill->user_claim_unsupported = 1;
8221
8222 priv->rfkill->dev.class->suspend = NULL;
8223 priv->rfkill->dev.class->resume = NULL;
8224
8225 ret = rfkill_register(priv->rfkill);
8226 if (ret) {
8227 IWL_ERROR("Unable to register rfkill: %d\n", ret);
8228 goto freed_rfkill;
8229 }
8230
8231 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8232 return ret;
8233
8234 freed_rfkill:
8235 if (priv->rfkill != NULL)
8236 rfkill_free(priv->rfkill);
8237 priv->rfkill = NULL;
8238
8239 error:
8240 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8241 return ret;
8242 }
8243
8244 void iwl3945_rfkill_unregister(struct iwl3945_priv *priv)
8245 {
8246 if (priv->rfkill)
8247 rfkill_unregister(priv->rfkill);
8248
8249 priv->rfkill = NULL;
8250 }
8251
8252 /* set rf-kill to the right state. */
8253 void iwl3945_rfkill_set_hw_state(struct iwl3945_priv *priv)
8254 {
8255
8256 if (!priv->rfkill)
8257 return;
8258
8259 if (iwl3945_is_rfkill_hw(priv)) {
8260 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8261 return;
8262 }
8263
8264 if (!iwl3945_is_rfkill_sw(priv))
8265 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8266 else
8267 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8268 }
8269 #endif
8270
8271 /*****************************************************************************
8272 *
8273 * driver and module entry point
8274 *
8275 *****************************************************************************/
8276
8277 static struct pci_driver iwl3945_driver = {
8278 .name = DRV_NAME,
8279 .id_table = iwl3945_hw_card_ids,
8280 .probe = iwl3945_pci_probe,
8281 .remove = __devexit_p(iwl3945_pci_remove),
8282 #ifdef CONFIG_PM
8283 .suspend = iwl3945_pci_suspend,
8284 .resume = iwl3945_pci_resume,
8285 #endif
8286 };
8287
8288 static int __init iwl3945_init(void)
8289 {
8290
8291 int ret;
8292 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8293 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8294
8295 ret = iwl3945_rate_control_register();
8296 if (ret) {
8297 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
8298 return ret;
8299 }
8300
8301 ret = pci_register_driver(&iwl3945_driver);
8302 if (ret) {
8303 IWL_ERROR("Unable to initialize PCI module\n");
8304 goto error_register;
8305 }
8306 #ifdef CONFIG_IWL3945_DEBUG
8307 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8308 if (ret) {
8309 IWL_ERROR("Unable to create driver sysfs file\n");
8310 goto error_debug;
8311 }
8312 #endif
8313
8314 return ret;
8315
8316 #ifdef CONFIG_IWL3945_DEBUG
8317 error_debug:
8318 pci_unregister_driver(&iwl3945_driver);
8319 #endif
8320 error_register:
8321 iwl3945_rate_control_unregister();
8322 return ret;
8323 }
8324
8325 static void __exit iwl3945_exit(void)
8326 {
8327 #ifdef CONFIG_IWL3945_DEBUG
8328 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8329 #endif
8330 pci_unregister_driver(&iwl3945_driver);
8331 iwl3945_rate_control_unregister();
8332 }
8333
8334 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8335 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8336 module_param_named(disable, iwl3945_param_disable, int, 0444);
8337 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8338 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8339 MODULE_PARM_DESC(hwcrypto,
8340 "using hardware crypto engine (default 0 [software])\n");
8341 module_param_named(debug, iwl3945_param_debug, int, 0444);
8342 MODULE_PARM_DESC(debug, "debug output mask");
8343 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8344 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8345
8346 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8347 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8348
8349 /* QoS */
8350 module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8351 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8352
8353 module_exit(iwl3945_exit);
8354 module_init(iwl3945_init);
Linux kernel - Deliverables
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