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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/slab.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/sched.h>
38 #include <linux/skbuff.h>
39 #include <linux/netdevice.h>
40 #include <linux/wireless.h>
41 #include <linux/firmware.h>
42 #include <linux/etherdevice.h>
43 #include <linux/if_arp.h>
44
45 #include <net/ieee80211_radiotap.h>
46 #include <net/mac80211.h>
47
48 #include <asm/div64.h>
49
50 #define DRV_NAME "iwl3945"
51
52 #include "iwl-fh.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-commands.h"
55 #include "iwl-sta.h"
56 #include "iwl-3945.h"
57 #include "iwl-core.h"
58 #include "iwl-helpers.h"
59 #include "iwl-dev.h"
60 #include "iwl-spectrum.h"
61
62 /*
63 * module name, copyright, version, etc.
64 */
65
66 #define DRV_DESCRIPTION \
67 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 /*
76 * add "s" to indicate spectrum measurement included.
77 * we add it here to be consistent with previous releases in which
78 * this was configurable.
79 */
80 #define DRV_VERSION IWLWIFI_VERSION VD "s"
81 #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
82 #define DRV_AUTHOR "<ilw@linux.intel.com>"
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88
89 /* module parameters */
90 struct iwl_mod_params iwl3945_mod_params = {
91 .sw_crypto = 1,
92 .restart_fw = 1,
93 /* the rest are 0 by default */
94 };
95
96 /**
97 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
98 * @priv: eeprom and antenna fields are used to determine antenna flags
99 *
100 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
101 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
102 *
103 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
104 * IWL_ANTENNA_MAIN - Force MAIN antenna
105 * IWL_ANTENNA_AUX - Force AUX antenna
106 */
107 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
108 {
109 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
110
111 switch (iwl3945_mod_params.antenna) {
112 case IWL_ANTENNA_DIVERSITY:
113 return 0;
114
115 case IWL_ANTENNA_MAIN:
116 if (eeprom->antenna_switch_type)
117 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
118 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
119
120 case IWL_ANTENNA_AUX:
121 if (eeprom->antenna_switch_type)
122 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
123 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
124 }
125
126 /* bad antenna selector value */
127 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
128 iwl3945_mod_params.antenna);
129
130 return 0; /* "diversity" is default if error */
131 }
132
133 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
134 struct ieee80211_key_conf *keyconf,
135 u8 sta_id)
136 {
137 unsigned long flags;
138 __le16 key_flags = 0;
139 int ret;
140
141 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
142 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
143
144 if (sta_id == priv->hw_params.bcast_sta_id)
145 key_flags |= STA_KEY_MULTICAST_MSK;
146
147 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
148 keyconf->hw_key_idx = keyconf->keyidx;
149 key_flags &= ~STA_KEY_FLG_INVALID;
150
151 spin_lock_irqsave(&priv->sta_lock, flags);
152 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
153 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
154 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
155 keyconf->keylen);
156
157 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
158 keyconf->keylen);
159
160 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
161 == STA_KEY_FLG_NO_ENC)
162 priv->stations[sta_id].sta.key.key_offset =
163 iwl_get_free_ucode_key_index(priv);
164 /* else, we are overriding an existing key => no need to allocated room
165 * in uCode. */
166
167 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
168 "no space for a new key");
169
170 priv->stations[sta_id].sta.key.key_flags = key_flags;
171 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
172 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
173
174 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
175
176 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
177
178 spin_unlock_irqrestore(&priv->sta_lock, flags);
179
180 return ret;
181 }
182
183 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
184 struct ieee80211_key_conf *keyconf,
185 u8 sta_id)
186 {
187 return -EOPNOTSUPP;
188 }
189
190 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
191 struct ieee80211_key_conf *keyconf,
192 u8 sta_id)
193 {
194 return -EOPNOTSUPP;
195 }
196
197 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
198 {
199 unsigned long flags;
200
201 spin_lock_irqsave(&priv->sta_lock, flags);
202 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
203 memset(&priv->stations[sta_id].sta.key, 0,
204 sizeof(struct iwl4965_keyinfo));
205 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
206 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
207 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
208 spin_unlock_irqrestore(&priv->sta_lock, flags);
209
210 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
211 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
212 return 0;
213 }
214
215 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
216 struct ieee80211_key_conf *keyconf, u8 sta_id)
217 {
218 int ret = 0;
219
220 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
221
222 switch (keyconf->alg) {
223 case ALG_CCMP:
224 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
225 break;
226 case ALG_TKIP:
227 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
228 break;
229 case ALG_WEP:
230 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
231 break;
232 default:
233 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
234 ret = -EINVAL;
235 }
236
237 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
238 keyconf->alg, keyconf->keylen, keyconf->keyidx,
239 sta_id, ret);
240
241 return ret;
242 }
243
244 static int iwl3945_remove_static_key(struct iwl_priv *priv)
245 {
246 int ret = -EOPNOTSUPP;
247
248 return ret;
249 }
250
251 static int iwl3945_set_static_key(struct iwl_priv *priv,
252 struct ieee80211_key_conf *key)
253 {
254 if (key->alg == ALG_WEP)
255 return -EOPNOTSUPP;
256
257 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
258 return -EINVAL;
259 }
260
261 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
262 {
263 struct list_head *element;
264
265 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
266 priv->frames_count);
267
268 while (!list_empty(&priv->free_frames)) {
269 element = priv->free_frames.next;
270 list_del(element);
271 kfree(list_entry(element, struct iwl3945_frame, list));
272 priv->frames_count--;
273 }
274
275 if (priv->frames_count) {
276 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
277 priv->frames_count);
278 priv->frames_count = 0;
279 }
280 }
281
282 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
283 {
284 struct iwl3945_frame *frame;
285 struct list_head *element;
286 if (list_empty(&priv->free_frames)) {
287 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
288 if (!frame) {
289 IWL_ERR(priv, "Could not allocate frame!\n");
290 return NULL;
291 }
292
293 priv->frames_count++;
294 return frame;
295 }
296
297 element = priv->free_frames.next;
298 list_del(element);
299 return list_entry(element, struct iwl3945_frame, list);
300 }
301
302 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
303 {
304 memset(frame, 0, sizeof(*frame));
305 list_add(&frame->list, &priv->free_frames);
306 }
307
308 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
309 struct ieee80211_hdr *hdr,
310 int left)
311 {
312
313 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
314 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
315 (priv->iw_mode != NL80211_IFTYPE_AP)))
316 return 0;
317
318 if (priv->ibss_beacon->len > left)
319 return 0;
320
321 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
322
323 return priv->ibss_beacon->len;
324 }
325
326 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
327 {
328 struct iwl3945_frame *frame;
329 unsigned int frame_size;
330 int rc;
331 u8 rate;
332
333 frame = iwl3945_get_free_frame(priv);
334
335 if (!frame) {
336 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
337 "command.\n");
338 return -ENOMEM;
339 }
340
341 rate = iwl_rate_get_lowest_plcp(priv);
342
343 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
344
345 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
346 &frame->u.cmd[0]);
347
348 iwl3945_free_frame(priv, frame);
349
350 return rc;
351 }
352
353 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
354 {
355 if (priv->_3945.shared_virt)
356 dma_free_coherent(&priv->pci_dev->dev,
357 sizeof(struct iwl3945_shared),
358 priv->_3945.shared_virt,
359 priv->_3945.shared_phys);
360 }
361
362 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
363 struct ieee80211_tx_info *info,
364 struct iwl_device_cmd *cmd,
365 struct sk_buff *skb_frag,
366 int sta_id)
367 {
368 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
369 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
370
371 switch (keyinfo->alg) {
372 case ALG_CCMP:
373 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
374 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
375 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
376 break;
377
378 case ALG_TKIP:
379 break;
380
381 case ALG_WEP:
382 tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
383 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
384
385 if (keyinfo->keylen == 13)
386 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
387
388 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
389
390 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
391 "with key %d\n", info->control.hw_key->hw_key_idx);
392 break;
393
394 default:
395 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
396 break;
397 }
398 }
399
400 /*
401 * handle build REPLY_TX command notification.
402 */
403 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
404 struct iwl_device_cmd *cmd,
405 struct ieee80211_tx_info *info,
406 struct ieee80211_hdr *hdr, u8 std_id)
407 {
408 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
409 __le32 tx_flags = tx_cmd->tx_flags;
410 __le16 fc = hdr->frame_control;
411
412 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
413 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
414 tx_flags |= TX_CMD_FLG_ACK_MSK;
415 if (ieee80211_is_mgmt(fc))
416 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
417 if (ieee80211_is_probe_resp(fc) &&
418 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
419 tx_flags |= TX_CMD_FLG_TSF_MSK;
420 } else {
421 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
422 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
423 }
424
425 tx_cmd->sta_id = std_id;
426 if (ieee80211_has_morefrags(fc))
427 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
428
429 if (ieee80211_is_data_qos(fc)) {
430 u8 *qc = ieee80211_get_qos_ctl(hdr);
431 tx_cmd->tid_tspec = qc[0] & 0xf;
432 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
433 } else {
434 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
435 }
436
437 priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
438
439 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
440 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
441
442 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
443 if (ieee80211_is_mgmt(fc)) {
444 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
445 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
446 else
447 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
448 } else {
449 tx_cmd->timeout.pm_frame_timeout = 0;
450 }
451
452 tx_cmd->driver_txop = 0;
453 tx_cmd->tx_flags = tx_flags;
454 tx_cmd->next_frame_len = 0;
455 }
456
457 /*
458 * start REPLY_TX command process
459 */
460 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
461 {
462 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
463 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
464 struct iwl3945_tx_cmd *tx_cmd;
465 struct iwl_tx_queue *txq = NULL;
466 struct iwl_queue *q = NULL;
467 struct iwl_device_cmd *out_cmd;
468 struct iwl_cmd_meta *out_meta;
469 dma_addr_t phys_addr;
470 dma_addr_t txcmd_phys;
471 int txq_id = skb_get_queue_mapping(skb);
472 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
473 u8 id;
474 u8 unicast;
475 u8 sta_id;
476 u8 tid = 0;
477 u16 seq_number = 0;
478 __le16 fc;
479 u8 wait_write_ptr = 0;
480 u8 *qc = NULL;
481 unsigned long flags;
482
483 spin_lock_irqsave(&priv->lock, flags);
484 if (iwl_is_rfkill(priv)) {
485 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
486 goto drop_unlock;
487 }
488
489 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
490 IWL_ERR(priv, "ERROR: No TX rate available.\n");
491 goto drop_unlock;
492 }
493
494 unicast = !is_multicast_ether_addr(hdr->addr1);
495 id = 0;
496
497 fc = hdr->frame_control;
498
499 #ifdef CONFIG_IWLWIFI_DEBUG
500 if (ieee80211_is_auth(fc))
501 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
502 else if (ieee80211_is_assoc_req(fc))
503 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
504 else if (ieee80211_is_reassoc_req(fc))
505 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
506 #endif
507
508 spin_unlock_irqrestore(&priv->lock, flags);
509
510 hdr_len = ieee80211_hdrlen(fc);
511
512 /* Find (or create) index into station table for destination station */
513 if (info->flags & IEEE80211_TX_CTL_INJECTED)
514 sta_id = priv->hw_params.bcast_sta_id;
515 else
516 sta_id = iwl_get_sta_id(priv, hdr);
517 if (sta_id == IWL_INVALID_STATION) {
518 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
519 hdr->addr1);
520 goto drop;
521 }
522
523 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
524
525 if (ieee80211_is_data_qos(fc)) {
526 qc = ieee80211_get_qos_ctl(hdr);
527 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
528 if (unlikely(tid >= MAX_TID_COUNT))
529 goto drop;
530 seq_number = priv->stations[sta_id].tid[tid].seq_number &
531 IEEE80211_SCTL_SEQ;
532 hdr->seq_ctrl = cpu_to_le16(seq_number) |
533 (hdr->seq_ctrl &
534 cpu_to_le16(IEEE80211_SCTL_FRAG));
535 seq_number += 0x10;
536 }
537
538 /* Descriptor for chosen Tx queue */
539 txq = &priv->txq[txq_id];
540 q = &txq->q;
541
542 if ((iwl_queue_space(q) < q->high_mark))
543 goto drop;
544
545 spin_lock_irqsave(&priv->lock, flags);
546
547 idx = get_cmd_index(q, q->write_ptr, 0);
548
549 /* Set up driver data for this TFD */
550 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
551 txq->txb[q->write_ptr].skb[0] = skb;
552
553 /* Init first empty entry in queue's array of Tx/cmd buffers */
554 out_cmd = txq->cmd[idx];
555 out_meta = &txq->meta[idx];
556 tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
557 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
558 memset(tx_cmd, 0, sizeof(*tx_cmd));
559
560 /*
561 * Set up the Tx-command (not MAC!) header.
562 * Store the chosen Tx queue and TFD index within the sequence field;
563 * after Tx, uCode's Tx response will return this value so driver can
564 * locate the frame within the tx queue and do post-tx processing.
565 */
566 out_cmd->hdr.cmd = REPLY_TX;
567 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
568 INDEX_TO_SEQ(q->write_ptr)));
569
570 /* Copy MAC header from skb into command buffer */
571 memcpy(tx_cmd->hdr, hdr, hdr_len);
572
573
574 if (info->control.hw_key)
575 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
576
577 /* TODO need this for burst mode later on */
578 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
579
580 /* set is_hcca to 0; it probably will never be implemented */
581 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
582
583 /* Total # bytes to be transmitted */
584 len = (u16)skb->len;
585 tx_cmd->len = cpu_to_le16(len);
586
587 iwl_dbg_log_tx_data_frame(priv, len, hdr);
588 iwl_update_stats(priv, true, fc, len);
589 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
590 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
591
592 if (!ieee80211_has_morefrags(hdr->frame_control)) {
593 txq->need_update = 1;
594 if (qc)
595 priv->stations[sta_id].tid[tid].seq_number = seq_number;
596 } else {
597 wait_write_ptr = 1;
598 txq->need_update = 0;
599 }
600
601 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
602 le16_to_cpu(out_cmd->hdr.sequence));
603 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
604 iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
605 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
606 ieee80211_hdrlen(fc));
607
608 /*
609 * Use the first empty entry in this queue's command buffer array
610 * to contain the Tx command and MAC header concatenated together
611 * (payload data will be in another buffer).
612 * Size of this varies, due to varying MAC header length.
613 * If end is not dword aligned, we'll have 2 extra bytes at the end
614 * of the MAC header (device reads on dword boundaries).
615 * We'll tell device about this padding later.
616 */
617 len = sizeof(struct iwl3945_tx_cmd) +
618 sizeof(struct iwl_cmd_header) + hdr_len;
619
620 len_org = len;
621 len = (len + 3) & ~3;
622
623 if (len_org != len)
624 len_org = 1;
625 else
626 len_org = 0;
627
628 /* Physical address of this Tx command's header (not MAC header!),
629 * within command buffer array. */
630 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
631 len, PCI_DMA_TODEVICE);
632 /* we do not map meta data ... so we can safely access address to
633 * provide to unmap command*/
634 pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
635 pci_unmap_len_set(out_meta, len, len);
636
637 /* Add buffer containing Tx command and MAC(!) header to TFD's
638 * first entry */
639 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
640 txcmd_phys, len, 1, 0);
641
642
643 /* Set up TFD's 2nd entry to point directly to remainder of skb,
644 * if any (802.11 null frames have no payload). */
645 len = skb->len - hdr_len;
646 if (len) {
647 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
648 len, PCI_DMA_TODEVICE);
649 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
650 phys_addr, len,
651 0, U32_PAD(len));
652 }
653
654
655 /* Tell device the write index *just past* this latest filled TFD */
656 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
657 iwl_txq_update_write_ptr(priv, txq);
658 spin_unlock_irqrestore(&priv->lock, flags);
659
660 if ((iwl_queue_space(q) < q->high_mark)
661 && priv->mac80211_registered) {
662 if (wait_write_ptr) {
663 spin_lock_irqsave(&priv->lock, flags);
664 txq->need_update = 1;
665 iwl_txq_update_write_ptr(priv, txq);
666 spin_unlock_irqrestore(&priv->lock, flags);
667 }
668
669 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
670 }
671
672 return 0;
673
674 drop_unlock:
675 spin_unlock_irqrestore(&priv->lock, flags);
676 drop:
677 return -1;
678 }
679
680 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
681 #define BEACON_TIME_MASK_HIGH 0xFF000000
682 #define TIME_UNIT 1024
683
684 /*
685 * extended beacon time format
686 * time in usec will be changed into a 32-bit value in 8:24 format
687 * the high 1 byte is the beacon counts
688 * the lower 3 bytes is the time in usec within one beacon interval
689 */
690
691 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
692 {
693 u32 quot;
694 u32 rem;
695 u32 interval = beacon_interval * 1024;
696
697 if (!interval || !usec)
698 return 0;
699
700 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
701 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
702
703 return (quot << 24) + rem;
704 }
705
706 /* base is usually what we get from ucode with each received frame,
707 * the same as HW timer counter counting down
708 */
709
710 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
711 {
712 u32 base_low = base & BEACON_TIME_MASK_LOW;
713 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
714 u32 interval = beacon_interval * TIME_UNIT;
715 u32 res = (base & BEACON_TIME_MASK_HIGH) +
716 (addon & BEACON_TIME_MASK_HIGH);
717
718 if (base_low > addon_low)
719 res += base_low - addon_low;
720 else if (base_low < addon_low) {
721 res += interval + base_low - addon_low;
722 res += (1 << 24);
723 } else
724 res += (1 << 24);
725
726 return cpu_to_le32(res);
727 }
728
729 static int iwl3945_get_measurement(struct iwl_priv *priv,
730 struct ieee80211_measurement_params *params,
731 u8 type)
732 {
733 struct iwl_spectrum_cmd spectrum;
734 struct iwl_rx_packet *pkt;
735 struct iwl_host_cmd cmd = {
736 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
737 .data = (void *)&spectrum,
738 .flags = CMD_WANT_SKB,
739 };
740 u32 add_time = le64_to_cpu(params->start_time);
741 int rc;
742 int spectrum_resp_status;
743 int duration = le16_to_cpu(params->duration);
744
745 if (iwl_is_associated(priv))
746 add_time =
747 iwl3945_usecs_to_beacons(
748 le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
749 le16_to_cpu(priv->rxon_timing.beacon_interval));
750
751 memset(&spectrum, 0, sizeof(spectrum));
752
753 spectrum.channel_count = cpu_to_le16(1);
754 spectrum.flags =
755 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
756 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
757 cmd.len = sizeof(spectrum);
758 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
759
760 if (iwl_is_associated(priv))
761 spectrum.start_time =
762 iwl3945_add_beacon_time(priv->_3945.last_beacon_time,
763 add_time,
764 le16_to_cpu(priv->rxon_timing.beacon_interval));
765 else
766 spectrum.start_time = 0;
767
768 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
769 spectrum.channels[0].channel = params->channel;
770 spectrum.channels[0].type = type;
771 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
772 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
773 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
774
775 rc = iwl_send_cmd_sync(priv, &cmd);
776 if (rc)
777 return rc;
778
779 pkt = (struct iwl_rx_packet *)cmd.reply_page;
780 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
781 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
782 rc = -EIO;
783 }
784
785 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
786 switch (spectrum_resp_status) {
787 case 0: /* Command will be handled */
788 if (pkt->u.spectrum.id != 0xff) {
789 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
790 pkt->u.spectrum.id);
791 priv->measurement_status &= ~MEASUREMENT_READY;
792 }
793 priv->measurement_status |= MEASUREMENT_ACTIVE;
794 rc = 0;
795 break;
796
797 case 1: /* Command will not be handled */
798 rc = -EAGAIN;
799 break;
800 }
801
802 iwl_free_pages(priv, cmd.reply_page);
803
804 return rc;
805 }
806
807 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
808 struct iwl_rx_mem_buffer *rxb)
809 {
810 struct iwl_rx_packet *pkt = rxb_addr(rxb);
811 struct iwl_alive_resp *palive;
812 struct delayed_work *pwork;
813
814 palive = &pkt->u.alive_frame;
815
816 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
817 "0x%01X 0x%01X\n",
818 palive->is_valid, palive->ver_type,
819 palive->ver_subtype);
820
821 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
822 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
823 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
824 sizeof(struct iwl_alive_resp));
825 pwork = &priv->init_alive_start;
826 } else {
827 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
828 memcpy(&priv->card_alive, &pkt->u.alive_frame,
829 sizeof(struct iwl_alive_resp));
830 pwork = &priv->alive_start;
831 iwl3945_disable_events(priv);
832 }
833
834 /* We delay the ALIVE response by 5ms to
835 * give the HW RF Kill time to activate... */
836 if (palive->is_valid == UCODE_VALID_OK)
837 queue_delayed_work(priv->workqueue, pwork,
838 msecs_to_jiffies(5));
839 else
840 IWL_WARN(priv, "uCode did not respond OK.\n");
841 }
842
843 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
844 struct iwl_rx_mem_buffer *rxb)
845 {
846 #ifdef CONFIG_IWLWIFI_DEBUG
847 struct iwl_rx_packet *pkt = rxb_addr(rxb);
848 #endif
849
850 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
851 return;
852 }
853
854 static void iwl3945_bg_beacon_update(struct work_struct *work)
855 {
856 struct iwl_priv *priv =
857 container_of(work, struct iwl_priv, beacon_update);
858 struct sk_buff *beacon;
859
860 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
861 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
862
863 if (!beacon) {
864 IWL_ERR(priv, "update beacon failed\n");
865 return;
866 }
867
868 mutex_lock(&priv->mutex);
869 /* new beacon skb is allocated every time; dispose previous.*/
870 if (priv->ibss_beacon)
871 dev_kfree_skb(priv->ibss_beacon);
872
873 priv->ibss_beacon = beacon;
874 mutex_unlock(&priv->mutex);
875
876 iwl3945_send_beacon_cmd(priv);
877 }
878
879 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
880 struct iwl_rx_mem_buffer *rxb)
881 {
882 #ifdef CONFIG_IWLWIFI_DEBUG
883 struct iwl_rx_packet *pkt = rxb_addr(rxb);
884 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
885 u8 rate = beacon->beacon_notify_hdr.rate;
886
887 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
888 "tsf %d %d rate %d\n",
889 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
890 beacon->beacon_notify_hdr.failure_frame,
891 le32_to_cpu(beacon->ibss_mgr_status),
892 le32_to_cpu(beacon->high_tsf),
893 le32_to_cpu(beacon->low_tsf), rate);
894 #endif
895
896 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
897 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
898 queue_work(priv->workqueue, &priv->beacon_update);
899 }
900
901 /* Handle notification from uCode that card's power state is changing
902 * due to software, hardware, or critical temperature RFKILL */
903 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
904 struct iwl_rx_mem_buffer *rxb)
905 {
906 struct iwl_rx_packet *pkt = rxb_addr(rxb);
907 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
908 unsigned long status = priv->status;
909
910 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
911 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
912 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
913
914 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
915 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
916
917 if (flags & HW_CARD_DISABLED)
918 set_bit(STATUS_RF_KILL_HW, &priv->status);
919 else
920 clear_bit(STATUS_RF_KILL_HW, &priv->status);
921
922
923 iwl_scan_cancel(priv);
924
925 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
926 test_bit(STATUS_RF_KILL_HW, &priv->status)))
927 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
928 test_bit(STATUS_RF_KILL_HW, &priv->status));
929 else
930 wake_up_interruptible(&priv->wait_command_queue);
931 }
932
933 /**
934 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
935 *
936 * Setup the RX handlers for each of the reply types sent from the uCode
937 * to the host.
938 *
939 * This function chains into the hardware specific files for them to setup
940 * any hardware specific handlers as well.
941 */
942 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
943 {
944 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
945 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
946 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
947 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
948 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
949 iwl_rx_spectrum_measure_notif;
950 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
951 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
952 iwl_rx_pm_debug_statistics_notif;
953 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
954
955 /*
956 * The same handler is used for both the REPLY to a discrete
957 * statistics request from the host as well as for the periodic
958 * statistics notifications (after received beacons) from the uCode.
959 */
960 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
961 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
962
963 iwl_setup_rx_scan_handlers(priv);
964 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
965
966 /* Set up hardware specific Rx handlers */
967 iwl3945_hw_rx_handler_setup(priv);
968 }
969
970 /************************** RX-FUNCTIONS ****************************/
971 /*
972 * Rx theory of operation
973 *
974 * The host allocates 32 DMA target addresses and passes the host address
975 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
976 * 0 to 31
977 *
978 * Rx Queue Indexes
979 * The host/firmware share two index registers for managing the Rx buffers.
980 *
981 * The READ index maps to the first position that the firmware may be writing
982 * to -- the driver can read up to (but not including) this position and get
983 * good data.
984 * The READ index is managed by the firmware once the card is enabled.
985 *
986 * The WRITE index maps to the last position the driver has read from -- the
987 * position preceding WRITE is the last slot the firmware can place a packet.
988 *
989 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
990 * WRITE = READ.
991 *
992 * During initialization, the host sets up the READ queue position to the first
993 * INDEX position, and WRITE to the last (READ - 1 wrapped)
994 *
995 * When the firmware places a packet in a buffer, it will advance the READ index
996 * and fire the RX interrupt. The driver can then query the READ index and
997 * process as many packets as possible, moving the WRITE index forward as it
998 * resets the Rx queue buffers with new memory.
999 *
1000 * The management in the driver is as follows:
1001 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1002 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1003 * to replenish the iwl->rxq->rx_free.
1004 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1005 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1006 * 'processed' and 'read' driver indexes as well)
1007 * + A received packet is processed and handed to the kernel network stack,
1008 * detached from the iwl->rxq. The driver 'processed' index is updated.
1009 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1010 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1011 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1012 * were enough free buffers and RX_STALLED is set it is cleared.
1013 *
1014 *
1015 * Driver sequence:
1016 *
1017 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
1018 * iwl3945_rx_queue_restock
1019 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1020 * queue, updates firmware pointers, and updates
1021 * the WRITE index. If insufficient rx_free buffers
1022 * are available, schedules iwl3945_rx_replenish
1023 *
1024 * -- enable interrupts --
1025 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
1026 * READ INDEX, detaching the SKB from the pool.
1027 * Moves the packet buffer from queue to rx_used.
1028 * Calls iwl3945_rx_queue_restock to refill any empty
1029 * slots.
1030 * ...
1031 *
1032 */
1033
1034 /**
1035 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1036 */
1037 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1038 dma_addr_t dma_addr)
1039 {
1040 return cpu_to_le32((u32)dma_addr);
1041 }
1042
1043 /**
1044 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1045 *
1046 * If there are slots in the RX queue that need to be restocked,
1047 * and we have free pre-allocated buffers, fill the ranks as much
1048 * as we can, pulling from rx_free.
1049 *
1050 * This moves the 'write' index forward to catch up with 'processed', and
1051 * also updates the memory address in the firmware to reference the new
1052 * target buffer.
1053 */
1054 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
1055 {
1056 struct iwl_rx_queue *rxq = &priv->rxq;
1057 struct list_head *element;
1058 struct iwl_rx_mem_buffer *rxb;
1059 unsigned long flags;
1060 int write;
1061
1062 spin_lock_irqsave(&rxq->lock, flags);
1063 write = rxq->write & ~0x7;
1064 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1065 /* Get next free Rx buffer, remove from free list */
1066 element = rxq->rx_free.next;
1067 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1068 list_del(element);
1069
1070 /* Point to Rx buffer via next RBD in circular buffer */
1071 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1072 rxq->queue[rxq->write] = rxb;
1073 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1074 rxq->free_count--;
1075 }
1076 spin_unlock_irqrestore(&rxq->lock, flags);
1077 /* If the pre-allocated buffer pool is dropping low, schedule to
1078 * refill it */
1079 if (rxq->free_count <= RX_LOW_WATERMARK)
1080 queue_work(priv->workqueue, &priv->rx_replenish);
1081
1082
1083 /* If we've added more space for the firmware to place data, tell it.
1084 * Increment device's write pointer in multiples of 8. */
1085 if ((rxq->write_actual != (rxq->write & ~0x7))
1086 || (abs(rxq->write - rxq->read) > 7)) {
1087 spin_lock_irqsave(&rxq->lock, flags);
1088 rxq->need_update = 1;
1089 spin_unlock_irqrestore(&rxq->lock, flags);
1090 iwl_rx_queue_update_write_ptr(priv, rxq);
1091 }
1092 }
1093
1094 /**
1095 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1096 *
1097 * When moving to rx_free an SKB is allocated for the slot.
1098 *
1099 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1100 * This is called as a scheduled work item (except for during initialization)
1101 */
1102 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1103 {
1104 struct iwl_rx_queue *rxq = &priv->rxq;
1105 struct list_head *element;
1106 struct iwl_rx_mem_buffer *rxb;
1107 struct page *page;
1108 unsigned long flags;
1109 gfp_t gfp_mask = priority;
1110
1111 while (1) {
1112 spin_lock_irqsave(&rxq->lock, flags);
1113
1114 if (list_empty(&rxq->rx_used)) {
1115 spin_unlock_irqrestore(&rxq->lock, flags);
1116 return;
1117 }
1118 spin_unlock_irqrestore(&rxq->lock, flags);
1119
1120 if (rxq->free_count > RX_LOW_WATERMARK)
1121 gfp_mask |= __GFP_NOWARN;
1122
1123 if (priv->hw_params.rx_page_order > 0)
1124 gfp_mask |= __GFP_COMP;
1125
1126 /* Alloc a new receive buffer */
1127 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1128 if (!page) {
1129 if (net_ratelimit())
1130 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1131 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1132 net_ratelimit())
1133 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1134 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1135 rxq->free_count);
1136 /* We don't reschedule replenish work here -- we will
1137 * call the restock method and if it still needs
1138 * more buffers it will schedule replenish */
1139 break;
1140 }
1141
1142 spin_lock_irqsave(&rxq->lock, flags);
1143 if (list_empty(&rxq->rx_used)) {
1144 spin_unlock_irqrestore(&rxq->lock, flags);
1145 __free_pages(page, priv->hw_params.rx_page_order);
1146 return;
1147 }
1148 element = rxq->rx_used.next;
1149 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1150 list_del(element);
1151 spin_unlock_irqrestore(&rxq->lock, flags);
1152
1153 rxb->page = page;
1154 /* Get physical address of RB/SKB */
1155 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1156 PAGE_SIZE << priv->hw_params.rx_page_order,
1157 PCI_DMA_FROMDEVICE);
1158
1159 spin_lock_irqsave(&rxq->lock, flags);
1160
1161 list_add_tail(&rxb->list, &rxq->rx_free);
1162 rxq->free_count++;
1163 priv->alloc_rxb_page++;
1164
1165 spin_unlock_irqrestore(&rxq->lock, flags);
1166 }
1167 }
1168
1169 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1170 {
1171 unsigned long flags;
1172 int i;
1173 spin_lock_irqsave(&rxq->lock, flags);
1174 INIT_LIST_HEAD(&rxq->rx_free);
1175 INIT_LIST_HEAD(&rxq->rx_used);
1176 /* Fill the rx_used queue with _all_ of the Rx buffers */
1177 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1178 /* In the reset function, these buffers may have been allocated
1179 * to an SKB, so we need to unmap and free potential storage */
1180 if (rxq->pool[i].page != NULL) {
1181 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1182 PAGE_SIZE << priv->hw_params.rx_page_order,
1183 PCI_DMA_FROMDEVICE);
1184 __iwl_free_pages(priv, rxq->pool[i].page);
1185 rxq->pool[i].page = NULL;
1186 }
1187 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1188 }
1189
1190 /* Set us so that we have processed and used all buffers, but have
1191 * not restocked the Rx queue with fresh buffers */
1192 rxq->read = rxq->write = 0;
1193 rxq->write_actual = 0;
1194 rxq->free_count = 0;
1195 spin_unlock_irqrestore(&rxq->lock, flags);
1196 }
1197
1198 void iwl3945_rx_replenish(void *data)
1199 {
1200 struct iwl_priv *priv = data;
1201 unsigned long flags;
1202
1203 iwl3945_rx_allocate(priv, GFP_KERNEL);
1204
1205 spin_lock_irqsave(&priv->lock, flags);
1206 iwl3945_rx_queue_restock(priv);
1207 spin_unlock_irqrestore(&priv->lock, flags);
1208 }
1209
1210 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1211 {
1212 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1213
1214 iwl3945_rx_queue_restock(priv);
1215 }
1216
1217
1218 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1219 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1220 * This free routine walks the list of POOL entries and if SKB is set to
1221 * non NULL it is unmapped and freed
1222 */
1223 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1224 {
1225 int i;
1226 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1227 if (rxq->pool[i].page != NULL) {
1228 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1229 PAGE_SIZE << priv->hw_params.rx_page_order,
1230 PCI_DMA_FROMDEVICE);
1231 __iwl_free_pages(priv, rxq->pool[i].page);
1232 rxq->pool[i].page = NULL;
1233 }
1234 }
1235
1236 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1237 rxq->dma_addr);
1238 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1239 rxq->rb_stts, rxq->rb_stts_dma);
1240 rxq->bd = NULL;
1241 rxq->rb_stts = NULL;
1242 }
1243
1244
1245 /* Convert linear signal-to-noise ratio into dB */
1246 static u8 ratio2dB[100] = {
1247 /* 0 1 2 3 4 5 6 7 8 9 */
1248 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1249 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1250 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1251 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1252 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1253 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1254 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1255 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1256 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1257 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1258 };
1259
1260 /* Calculates a relative dB value from a ratio of linear
1261 * (i.e. not dB) signal levels.
1262 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1263 int iwl3945_calc_db_from_ratio(int sig_ratio)
1264 {
1265 /* 1000:1 or higher just report as 60 dB */
1266 if (sig_ratio >= 1000)
1267 return 60;
1268
1269 /* 100:1 or higher, divide by 10 and use table,
1270 * add 20 dB to make up for divide by 10 */
1271 if (sig_ratio >= 100)
1272 return 20 + (int)ratio2dB[sig_ratio/10];
1273
1274 /* We shouldn't see this */
1275 if (sig_ratio < 1)
1276 return 0;
1277
1278 /* Use table for ratios 1:1 - 99:1 */
1279 return (int)ratio2dB[sig_ratio];
1280 }
1281
1282 /**
1283 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1284 *
1285 * Uses the priv->rx_handlers callback function array to invoke
1286 * the appropriate handlers, including command responses,
1287 * frame-received notifications, and other notifications.
1288 */
1289 static void iwl3945_rx_handle(struct iwl_priv *priv)
1290 {
1291 struct iwl_rx_mem_buffer *rxb;
1292 struct iwl_rx_packet *pkt;
1293 struct iwl_rx_queue *rxq = &priv->rxq;
1294 u32 r, i;
1295 int reclaim;
1296 unsigned long flags;
1297 u8 fill_rx = 0;
1298 u32 count = 8;
1299 int total_empty = 0;
1300
1301 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1302 * buffer that the driver may process (last buffer filled by ucode). */
1303 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1304 i = rxq->read;
1305
1306 /* calculate total frames need to be restock after handling RX */
1307 total_empty = r - rxq->write_actual;
1308 if (total_empty < 0)
1309 total_empty += RX_QUEUE_SIZE;
1310
1311 if (total_empty > (RX_QUEUE_SIZE / 2))
1312 fill_rx = 1;
1313 /* Rx interrupt, but nothing sent from uCode */
1314 if (i == r)
1315 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1316
1317 while (i != r) {
1318 rxb = rxq->queue[i];
1319
1320 /* If an RXB doesn't have a Rx queue slot associated with it,
1321 * then a bug has been introduced in the queue refilling
1322 * routines -- catch it here */
1323 BUG_ON(rxb == NULL);
1324
1325 rxq->queue[i] = NULL;
1326
1327 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1328 PAGE_SIZE << priv->hw_params.rx_page_order,
1329 PCI_DMA_FROMDEVICE);
1330 pkt = rxb_addr(rxb);
1331
1332 trace_iwlwifi_dev_rx(priv, pkt,
1333 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
1334
1335 /* Reclaim a command buffer only if this packet is a response
1336 * to a (driver-originated) command.
1337 * If the packet (e.g. Rx frame) originated from uCode,
1338 * there is no command buffer to reclaim.
1339 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1340 * but apparently a few don't get set; catch them here. */
1341 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1342 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1343 (pkt->hdr.cmd != REPLY_TX);
1344
1345 /* Based on type of command response or notification,
1346 * handle those that need handling via function in
1347 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1348 if (priv->rx_handlers[pkt->hdr.cmd]) {
1349 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1350 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1351 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1352 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1353 } else {
1354 /* No handling needed */
1355 IWL_DEBUG_RX(priv,
1356 "r %d i %d No handler needed for %s, 0x%02x\n",
1357 r, i, get_cmd_string(pkt->hdr.cmd),
1358 pkt->hdr.cmd);
1359 }
1360
1361 /*
1362 * XXX: After here, we should always check rxb->page
1363 * against NULL before touching it or its virtual
1364 * memory (pkt). Because some rx_handler might have
1365 * already taken or freed the pages.
1366 */
1367
1368 if (reclaim) {
1369 /* Invoke any callbacks, transfer the buffer to caller,
1370 * and fire off the (possibly) blocking iwl_send_cmd()
1371 * as we reclaim the driver command queue */
1372 if (rxb->page)
1373 iwl_tx_cmd_complete(priv, rxb);
1374 else
1375 IWL_WARN(priv, "Claim null rxb?\n");
1376 }
1377
1378 /* Reuse the page if possible. For notification packets and
1379 * SKBs that fail to Rx correctly, add them back into the
1380 * rx_free list for reuse later. */
1381 spin_lock_irqsave(&rxq->lock, flags);
1382 if (rxb->page != NULL) {
1383 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1384 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1385 PCI_DMA_FROMDEVICE);
1386 list_add_tail(&rxb->list, &rxq->rx_free);
1387 rxq->free_count++;
1388 } else
1389 list_add_tail(&rxb->list, &rxq->rx_used);
1390
1391 spin_unlock_irqrestore(&rxq->lock, flags);
1392
1393 i = (i + 1) & RX_QUEUE_MASK;
1394 /* If there are a lot of unused frames,
1395 * restock the Rx queue so ucode won't assert. */
1396 if (fill_rx) {
1397 count++;
1398 if (count >= 8) {
1399 rxq->read = i;
1400 iwl3945_rx_replenish_now(priv);
1401 count = 0;
1402 }
1403 }
1404 }
1405
1406 /* Backtrack one entry */
1407 rxq->read = i;
1408 if (fill_rx)
1409 iwl3945_rx_replenish_now(priv);
1410 else
1411 iwl3945_rx_queue_restock(priv);
1412 }
1413
1414 /* call this function to flush any scheduled tasklet */
1415 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1416 {
1417 /* wait to make sure we flush pending tasklet*/
1418 synchronize_irq(priv->pci_dev->irq);
1419 tasklet_kill(&priv->irq_tasklet);
1420 }
1421
1422 static const char *desc_lookup(int i)
1423 {
1424 switch (i) {
1425 case 1:
1426 return "FAIL";
1427 case 2:
1428 return "BAD_PARAM";
1429 case 3:
1430 return "BAD_CHECKSUM";
1431 case 4:
1432 return "NMI_INTERRUPT";
1433 case 5:
1434 return "SYSASSERT";
1435 case 6:
1436 return "FATAL_ERROR";
1437 }
1438
1439 return "UNKNOWN";
1440 }
1441
1442 #define ERROR_START_OFFSET (1 * sizeof(u32))
1443 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1444
1445 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1446 {
1447 u32 i;
1448 u32 desc, time, count, base, data1;
1449 u32 blink1, blink2, ilink1, ilink2;
1450
1451 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1452
1453 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1454 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1455 return;
1456 }
1457
1458
1459 count = iwl_read_targ_mem(priv, base);
1460
1461 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1462 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1463 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1464 priv->status, count);
1465 }
1466
1467 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1468 "ilink1 nmiPC Line\n");
1469 for (i = ERROR_START_OFFSET;
1470 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1471 i += ERROR_ELEM_SIZE) {
1472 desc = iwl_read_targ_mem(priv, base + i);
1473 time =
1474 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1475 blink1 =
1476 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1477 blink2 =
1478 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1479 ilink1 =
1480 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1481 ilink2 =
1482 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1483 data1 =
1484 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1485
1486 IWL_ERR(priv,
1487 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1488 desc_lookup(desc), desc, time, blink1, blink2,
1489 ilink1, ilink2, data1);
1490 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1491 0, blink1, blink2, ilink1, ilink2);
1492 }
1493 }
1494
1495 #define EVENT_START_OFFSET (6 * sizeof(u32))
1496
1497 /**
1498 * iwl3945_print_event_log - Dump error event log to syslog
1499 *
1500 */
1501 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1502 u32 num_events, u32 mode,
1503 int pos, char **buf, size_t bufsz)
1504 {
1505 u32 i;
1506 u32 base; /* SRAM byte address of event log header */
1507 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1508 u32 ptr; /* SRAM byte address of log data */
1509 u32 ev, time, data; /* event log data */
1510 unsigned long reg_flags;
1511
1512 if (num_events == 0)
1513 return pos;
1514
1515 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1516
1517 if (mode == 0)
1518 event_size = 2 * sizeof(u32);
1519 else
1520 event_size = 3 * sizeof(u32);
1521
1522 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1523
1524 /* Make sure device is powered up for SRAM reads */
1525 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1526 iwl_grab_nic_access(priv);
1527
1528 /* Set starting address; reads will auto-increment */
1529 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1530 rmb();
1531
1532 /* "time" is actually "data" for mode 0 (no timestamp).
1533 * place event id # at far right for easier visual parsing. */
1534 for (i = 0; i < num_events; i++) {
1535 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1536 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1537 if (mode == 0) {
1538 /* data, ev */
1539 if (bufsz) {
1540 pos += scnprintf(*buf + pos, bufsz - pos,
1541 "0x%08x:%04u\n",
1542 time, ev);
1543 } else {
1544 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1545 trace_iwlwifi_dev_ucode_event(priv, 0,
1546 time, ev);
1547 }
1548 } else {
1549 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1550 if (bufsz) {
1551 pos += scnprintf(*buf + pos, bufsz - pos,
1552 "%010u:0x%08x:%04u\n",
1553 time, data, ev);
1554 } else {
1555 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1556 time, data, ev);
1557 trace_iwlwifi_dev_ucode_event(priv, time,
1558 data, ev);
1559 }
1560 }
1561 }
1562
1563 /* Allow device to power down */
1564 iwl_release_nic_access(priv);
1565 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1566 return pos;
1567 }
1568
1569 /**
1570 * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1571 */
1572 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1573 u32 num_wraps, u32 next_entry,
1574 u32 size, u32 mode,
1575 int pos, char **buf, size_t bufsz)
1576 {
1577 /*
1578 * display the newest DEFAULT_LOG_ENTRIES entries
1579 * i.e the entries just before the next ont that uCode would fill.
1580 */
1581 if (num_wraps) {
1582 if (next_entry < size) {
1583 pos = iwl3945_print_event_log(priv,
1584 capacity - (size - next_entry),
1585 size - next_entry, mode,
1586 pos, buf, bufsz);
1587 pos = iwl3945_print_event_log(priv, 0,
1588 next_entry, mode,
1589 pos, buf, bufsz);
1590 } else
1591 pos = iwl3945_print_event_log(priv, next_entry - size,
1592 size, mode,
1593 pos, buf, bufsz);
1594 } else {
1595 if (next_entry < size)
1596 pos = iwl3945_print_event_log(priv, 0,
1597 next_entry, mode,
1598 pos, buf, bufsz);
1599 else
1600 pos = iwl3945_print_event_log(priv, next_entry - size,
1601 size, mode,
1602 pos, buf, bufsz);
1603 }
1604 return pos;
1605 }
1606
1607 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1608
1609 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1610 char **buf, bool display)
1611 {
1612 u32 base; /* SRAM byte address of event log header */
1613 u32 capacity; /* event log capacity in # entries */
1614 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1615 u32 num_wraps; /* # times uCode wrapped to top of log */
1616 u32 next_entry; /* index of next entry to be written by uCode */
1617 u32 size; /* # entries that we'll print */
1618 int pos = 0;
1619 size_t bufsz = 0;
1620
1621 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1622 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1623 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1624 return -EINVAL;
1625 }
1626
1627 /* event log header */
1628 capacity = iwl_read_targ_mem(priv, base);
1629 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1630 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1631 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1632
1633 if (capacity > priv->cfg->max_event_log_size) {
1634 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1635 capacity, priv->cfg->max_event_log_size);
1636 capacity = priv->cfg->max_event_log_size;
1637 }
1638
1639 if (next_entry > priv->cfg->max_event_log_size) {
1640 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1641 next_entry, priv->cfg->max_event_log_size);
1642 next_entry = priv->cfg->max_event_log_size;
1643 }
1644
1645 size = num_wraps ? capacity : next_entry;
1646
1647 /* bail out if nothing in log */
1648 if (size == 0) {
1649 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1650 return pos;
1651 }
1652
1653 #ifdef CONFIG_IWLWIFI_DEBUG
1654 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1655 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1656 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1657 #else
1658 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1659 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1660 #endif
1661
1662 IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1663 size);
1664
1665 #ifdef CONFIG_IWLWIFI_DEBUG
1666 if (display) {
1667 if (full_log)
1668 bufsz = capacity * 48;
1669 else
1670 bufsz = size * 48;
1671 *buf = kmalloc(bufsz, GFP_KERNEL);
1672 if (!*buf)
1673 return -ENOMEM;
1674 }
1675 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1676 /* if uCode has wrapped back to top of log,
1677 * start at the oldest entry,
1678 * i.e the next one that uCode would fill.
1679 */
1680 if (num_wraps)
1681 pos = iwl3945_print_event_log(priv, next_entry,
1682 capacity - next_entry, mode,
1683 pos, buf, bufsz);
1684
1685 /* (then/else) start at top of log */
1686 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1687 pos, buf, bufsz);
1688 } else
1689 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1690 next_entry, size, mode,
1691 pos, buf, bufsz);
1692 #else
1693 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1694 next_entry, size, mode,
1695 pos, buf, bufsz);
1696 #endif
1697 return pos;
1698 }
1699
1700 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1701 {
1702 u32 inta, handled = 0;
1703 u32 inta_fh;
1704 unsigned long flags;
1705 #ifdef CONFIG_IWLWIFI_DEBUG
1706 u32 inta_mask;
1707 #endif
1708
1709 spin_lock_irqsave(&priv->lock, flags);
1710
1711 /* Ack/clear/reset pending uCode interrupts.
1712 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1713 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1714 inta = iwl_read32(priv, CSR_INT);
1715 iwl_write32(priv, CSR_INT, inta);
1716
1717 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1718 * Any new interrupts that happen after this, either while we're
1719 * in this tasklet, or later, will show up in next ISR/tasklet. */
1720 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1721 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1722
1723 #ifdef CONFIG_IWLWIFI_DEBUG
1724 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1725 /* just for debug */
1726 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1727 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1728 inta, inta_mask, inta_fh);
1729 }
1730 #endif
1731
1732 spin_unlock_irqrestore(&priv->lock, flags);
1733
1734 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1735 * atomic, make sure that inta covers all the interrupts that
1736 * we've discovered, even if FH interrupt came in just after
1737 * reading CSR_INT. */
1738 if (inta_fh & CSR39_FH_INT_RX_MASK)
1739 inta |= CSR_INT_BIT_FH_RX;
1740 if (inta_fh & CSR39_FH_INT_TX_MASK)
1741 inta |= CSR_INT_BIT_FH_TX;
1742
1743 /* Now service all interrupt bits discovered above. */
1744 if (inta & CSR_INT_BIT_HW_ERR) {
1745 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1746
1747 /* Tell the device to stop sending interrupts */
1748 iwl_disable_interrupts(priv);
1749
1750 priv->isr_stats.hw++;
1751 iwl_irq_handle_error(priv);
1752
1753 handled |= CSR_INT_BIT_HW_ERR;
1754
1755 return;
1756 }
1757
1758 #ifdef CONFIG_IWLWIFI_DEBUG
1759 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1760 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1761 if (inta & CSR_INT_BIT_SCD) {
1762 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1763 "the frame/frames.\n");
1764 priv->isr_stats.sch++;
1765 }
1766
1767 /* Alive notification via Rx interrupt will do the real work */
1768 if (inta & CSR_INT_BIT_ALIVE) {
1769 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1770 priv->isr_stats.alive++;
1771 }
1772 }
1773 #endif
1774 /* Safely ignore these bits for debug checks below */
1775 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1776
1777 /* Error detected by uCode */
1778 if (inta & CSR_INT_BIT_SW_ERR) {
1779 IWL_ERR(priv, "Microcode SW error detected. "
1780 "Restarting 0x%X.\n", inta);
1781 priv->isr_stats.sw++;
1782 priv->isr_stats.sw_err = inta;
1783 iwl_irq_handle_error(priv);
1784 handled |= CSR_INT_BIT_SW_ERR;
1785 }
1786
1787 /* uCode wakes up after power-down sleep */
1788 if (inta & CSR_INT_BIT_WAKEUP) {
1789 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1790 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1791 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1792 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1793 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1794 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1795 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1796 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1797
1798 priv->isr_stats.wakeup++;
1799 handled |= CSR_INT_BIT_WAKEUP;
1800 }
1801
1802 /* All uCode command responses, including Tx command responses,
1803 * Rx "responses" (frame-received notification), and other
1804 * notifications from uCode come through here*/
1805 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1806 iwl3945_rx_handle(priv);
1807 priv->isr_stats.rx++;
1808 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1809 }
1810
1811 if (inta & CSR_INT_BIT_FH_TX) {
1812 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1813 priv->isr_stats.tx++;
1814
1815 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1816 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1817 (FH39_SRVC_CHNL), 0x0);
1818 handled |= CSR_INT_BIT_FH_TX;
1819 }
1820
1821 if (inta & ~handled) {
1822 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1823 priv->isr_stats.unhandled++;
1824 }
1825
1826 if (inta & ~priv->inta_mask) {
1827 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1828 inta & ~priv->inta_mask);
1829 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1830 }
1831
1832 /* Re-enable all interrupts */
1833 /* only Re-enable if disabled by irq */
1834 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1835 iwl_enable_interrupts(priv);
1836
1837 #ifdef CONFIG_IWLWIFI_DEBUG
1838 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1839 inta = iwl_read32(priv, CSR_INT);
1840 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1841 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1842 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1843 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1844 }
1845 #endif
1846 }
1847
1848 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1849 enum ieee80211_band band,
1850 u8 is_active, u8 n_probes,
1851 struct iwl3945_scan_channel *scan_ch)
1852 {
1853 struct ieee80211_channel *chan;
1854 const struct ieee80211_supported_band *sband;
1855 const struct iwl_channel_info *ch_info;
1856 u16 passive_dwell = 0;
1857 u16 active_dwell = 0;
1858 int added, i;
1859
1860 sband = iwl_get_hw_mode(priv, band);
1861 if (!sband)
1862 return 0;
1863
1864 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1865 passive_dwell = iwl_get_passive_dwell_time(priv, band);
1866
1867 if (passive_dwell <= active_dwell)
1868 passive_dwell = active_dwell + 1;
1869
1870 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1871 chan = priv->scan_request->channels[i];
1872
1873 if (chan->band != band)
1874 continue;
1875
1876 scan_ch->channel = chan->hw_value;
1877
1878 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1879 if (!is_channel_valid(ch_info)) {
1880 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1881 scan_ch->channel);
1882 continue;
1883 }
1884
1885 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1886 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1887 /* If passive , set up for auto-switch
1888 * and use long active_dwell time.
1889 */
1890 if (!is_active || is_channel_passive(ch_info) ||
1891 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1892 scan_ch->type = 0; /* passive */
1893 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1894 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1895 } else {
1896 scan_ch->type = 1; /* active */
1897 }
1898
1899 /* Set direct probe bits. These may be used both for active
1900 * scan channels (probes gets sent right away),
1901 * or for passive channels (probes get se sent only after
1902 * hearing clear Rx packet).*/
1903 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1904 if (n_probes)
1905 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1906 } else {
1907 /* uCode v1 does not allow setting direct probe bits on
1908 * passive channel. */
1909 if ((scan_ch->type & 1) && n_probes)
1910 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1911 }
1912
1913 /* Set txpower levels to defaults */
1914 scan_ch->tpc.dsp_atten = 110;
1915 /* scan_pwr_info->tpc.dsp_atten; */
1916
1917 /*scan_pwr_info->tpc.tx_gain; */
1918 if (band == IEEE80211_BAND_5GHZ)
1919 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1920 else {
1921 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1922 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1923 * power level:
1924 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1925 */
1926 }
1927
1928 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1929 scan_ch->channel,
1930 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1931 (scan_ch->type & 1) ?
1932 active_dwell : passive_dwell);
1933
1934 scan_ch++;
1935 added++;
1936 }
1937
1938 IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1939 return added;
1940 }
1941
1942 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1943 struct ieee80211_rate *rates)
1944 {
1945 int i;
1946
1947 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1948 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1949 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1950 rates[i].hw_value_short = i;
1951 rates[i].flags = 0;
1952 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1953 /*
1954 * If CCK != 1M then set short preamble rate flag.
1955 */
1956 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1957 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1958 }
1959 }
1960 }
1961
1962 /******************************************************************************
1963 *
1964 * uCode download functions
1965 *
1966 ******************************************************************************/
1967
1968 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1969 {
1970 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1971 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1972 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1973 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1974 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1975 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1976 }
1977
1978 /**
1979 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1980 * looking at all data.
1981 */
1982 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1983 {
1984 u32 val;
1985 u32 save_len = len;
1986 int rc = 0;
1987 u32 errcnt;
1988
1989 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1990
1991 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1992 IWL39_RTC_INST_LOWER_BOUND);
1993
1994 errcnt = 0;
1995 for (; len > 0; len -= sizeof(u32), image++) {
1996 /* read data comes through single port, auto-incr addr */
1997 /* NOTE: Use the debugless read so we don't flood kernel log
1998 * if IWL_DL_IO is set */
1999 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2000 if (val != le32_to_cpu(*image)) {
2001 IWL_ERR(priv, "uCode INST section is invalid at "
2002 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2003 save_len - len, val, le32_to_cpu(*image));
2004 rc = -EIO;
2005 errcnt++;
2006 if (errcnt >= 20)
2007 break;
2008 }
2009 }
2010
2011
2012 if (!errcnt)
2013 IWL_DEBUG_INFO(priv,
2014 "ucode image in INSTRUCTION memory is good\n");
2015
2016 return rc;
2017 }
2018
2019
2020 /**
2021 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2022 * using sample data 100 bytes apart. If these sample points are good,
2023 * it's a pretty good bet that everything between them is good, too.
2024 */
2025 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2026 {
2027 u32 val;
2028 int rc = 0;
2029 u32 errcnt = 0;
2030 u32 i;
2031
2032 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2033
2034 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2035 /* read data comes through single port, auto-incr addr */
2036 /* NOTE: Use the debugless read so we don't flood kernel log
2037 * if IWL_DL_IO is set */
2038 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2039 i + IWL39_RTC_INST_LOWER_BOUND);
2040 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2041 if (val != le32_to_cpu(*image)) {
2042 #if 0 /* Enable this if you want to see details */
2043 IWL_ERR(priv, "uCode INST section is invalid at "
2044 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2045 i, val, *image);
2046 #endif
2047 rc = -EIO;
2048 errcnt++;
2049 if (errcnt >= 3)
2050 break;
2051 }
2052 }
2053
2054 return rc;
2055 }
2056
2057
2058 /**
2059 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2060 * and verify its contents
2061 */
2062 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2063 {
2064 __le32 *image;
2065 u32 len;
2066 int rc = 0;
2067
2068 /* Try bootstrap */
2069 image = (__le32 *)priv->ucode_boot.v_addr;
2070 len = priv->ucode_boot.len;
2071 rc = iwl3945_verify_inst_sparse(priv, image, len);
2072 if (rc == 0) {
2073 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2074 return 0;
2075 }
2076
2077 /* Try initialize */
2078 image = (__le32 *)priv->ucode_init.v_addr;
2079 len = priv->ucode_init.len;
2080 rc = iwl3945_verify_inst_sparse(priv, image, len);
2081 if (rc == 0) {
2082 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2083 return 0;
2084 }
2085
2086 /* Try runtime/protocol */
2087 image = (__le32 *)priv->ucode_code.v_addr;
2088 len = priv->ucode_code.len;
2089 rc = iwl3945_verify_inst_sparse(priv, image, len);
2090 if (rc == 0) {
2091 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2092 return 0;
2093 }
2094
2095 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2096
2097 /* Since nothing seems to match, show first several data entries in
2098 * instruction SRAM, so maybe visual inspection will give a clue.
2099 * Selection of bootstrap image (vs. other images) is arbitrary. */
2100 image = (__le32 *)priv->ucode_boot.v_addr;
2101 len = priv->ucode_boot.len;
2102 rc = iwl3945_verify_inst_full(priv, image, len);
2103
2104 return rc;
2105 }
2106
2107 static void iwl3945_nic_start(struct iwl_priv *priv)
2108 {
2109 /* Remove all resets to allow NIC to operate */
2110 iwl_write32(priv, CSR_RESET, 0);
2111 }
2112
2113 /**
2114 * iwl3945_read_ucode - Read uCode images from disk file.
2115 *
2116 * Copy into buffers for card to fetch via bus-mastering
2117 */
2118 static int iwl3945_read_ucode(struct iwl_priv *priv)
2119 {
2120 const struct iwl_ucode_header *ucode;
2121 int ret = -EINVAL, index;
2122 const struct firmware *ucode_raw;
2123 /* firmware file name contains uCode/driver compatibility version */
2124 const char *name_pre = priv->cfg->fw_name_pre;
2125 const unsigned int api_max = priv->cfg->ucode_api_max;
2126 const unsigned int api_min = priv->cfg->ucode_api_min;
2127 char buf[25];
2128 u8 *src;
2129 size_t len;
2130 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2131
2132 /* Ask kernel firmware_class module to get the boot firmware off disk.
2133 * request_firmware() is synchronous, file is in memory on return. */
2134 for (index = api_max; index >= api_min; index--) {
2135 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2136 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2137 if (ret < 0) {
2138 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2139 buf, ret);
2140 if (ret == -ENOENT)
2141 continue;
2142 else
2143 goto error;
2144 } else {
2145 if (index < api_max)
2146 IWL_ERR(priv, "Loaded firmware %s, "
2147 "which is deprecated. "
2148 " Please use API v%u instead.\n",
2149 buf, api_max);
2150 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2151 "(%zd bytes) from disk\n",
2152 buf, ucode_raw->size);
2153 break;
2154 }
2155 }
2156
2157 if (ret < 0)
2158 goto error;
2159
2160 /* Make sure that we got at least our header! */
2161 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
2162 IWL_ERR(priv, "File size way too small!\n");
2163 ret = -EINVAL;
2164 goto err_release;
2165 }
2166
2167 /* Data from ucode file: header followed by uCode images */
2168 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2169
2170 priv->ucode_ver = le32_to_cpu(ucode->ver);
2171 api_ver = IWL_UCODE_API(priv->ucode_ver);
2172 inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
2173 data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
2174 init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
2175 init_data_size =
2176 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
2177 boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
2178 src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
2179
2180 /* api_ver should match the api version forming part of the
2181 * firmware filename ... but we don't check for that and only rely
2182 * on the API version read from firmware header from here on forward */
2183
2184 if (api_ver < api_min || api_ver > api_max) {
2185 IWL_ERR(priv, "Driver unable to support your firmware API. "
2186 "Driver supports v%u, firmware is v%u.\n",
2187 api_max, api_ver);
2188 priv->ucode_ver = 0;
2189 ret = -EINVAL;
2190 goto err_release;
2191 }
2192 if (api_ver != api_max)
2193 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2194 "got %u. New firmware can be obtained "
2195 "from http://www.intellinuxwireless.org.\n",
2196 api_max, api_ver);
2197
2198 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2199 IWL_UCODE_MAJOR(priv->ucode_ver),
2200 IWL_UCODE_MINOR(priv->ucode_ver),
2201 IWL_UCODE_API(priv->ucode_ver),
2202 IWL_UCODE_SERIAL(priv->ucode_ver));
2203
2204 snprintf(priv->hw->wiphy->fw_version,
2205 sizeof(priv->hw->wiphy->fw_version),
2206 "%u.%u.%u.%u",
2207 IWL_UCODE_MAJOR(priv->ucode_ver),
2208 IWL_UCODE_MINOR(priv->ucode_ver),
2209 IWL_UCODE_API(priv->ucode_ver),
2210 IWL_UCODE_SERIAL(priv->ucode_ver));
2211
2212 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2213 priv->ucode_ver);
2214 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2215 inst_size);
2216 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2217 data_size);
2218 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2219 init_size);
2220 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2221 init_data_size);
2222 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2223 boot_size);
2224
2225
2226 /* Verify size of file vs. image size info in file's header */
2227 if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
2228 inst_size + data_size + init_size +
2229 init_data_size + boot_size) {
2230
2231 IWL_DEBUG_INFO(priv,
2232 "uCode file size %zd does not match expected size\n",
2233 ucode_raw->size);
2234 ret = -EINVAL;
2235 goto err_release;
2236 }
2237
2238 /* Verify that uCode images will fit in card's SRAM */
2239 if (inst_size > IWL39_MAX_INST_SIZE) {
2240 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2241 inst_size);
2242 ret = -EINVAL;
2243 goto err_release;
2244 }
2245
2246 if (data_size > IWL39_MAX_DATA_SIZE) {
2247 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2248 data_size);
2249 ret = -EINVAL;
2250 goto err_release;
2251 }
2252 if (init_size > IWL39_MAX_INST_SIZE) {
2253 IWL_DEBUG_INFO(priv,
2254 "uCode init instr len %d too large to fit in\n",
2255 init_size);
2256 ret = -EINVAL;
2257 goto err_release;
2258 }
2259 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2260 IWL_DEBUG_INFO(priv,
2261 "uCode init data len %d too large to fit in\n",
2262 init_data_size);
2263 ret = -EINVAL;
2264 goto err_release;
2265 }
2266 if (boot_size > IWL39_MAX_BSM_SIZE) {
2267 IWL_DEBUG_INFO(priv,
2268 "uCode boot instr len %d too large to fit in\n",
2269 boot_size);
2270 ret = -EINVAL;
2271 goto err_release;
2272 }
2273
2274 /* Allocate ucode buffers for card's bus-master loading ... */
2275
2276 /* Runtime instructions and 2 copies of data:
2277 * 1) unmodified from disk
2278 * 2) backup cache for save/restore during power-downs */
2279 priv->ucode_code.len = inst_size;
2280 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2281
2282 priv->ucode_data.len = data_size;
2283 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2284
2285 priv->ucode_data_backup.len = data_size;
2286 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2287
2288 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2289 !priv->ucode_data_backup.v_addr)
2290 goto err_pci_alloc;
2291
2292 /* Initialization instructions and data */
2293 if (init_size && init_data_size) {
2294 priv->ucode_init.len = init_size;
2295 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2296
2297 priv->ucode_init_data.len = init_data_size;
2298 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2299
2300 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2301 goto err_pci_alloc;
2302 }
2303
2304 /* Bootstrap (instructions only, no data) */
2305 if (boot_size) {
2306 priv->ucode_boot.len = boot_size;
2307 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2308
2309 if (!priv->ucode_boot.v_addr)
2310 goto err_pci_alloc;
2311 }
2312
2313 /* Copy images into buffers for card's bus-master reads ... */
2314
2315 /* Runtime instructions (first block of data in file) */
2316 len = inst_size;
2317 IWL_DEBUG_INFO(priv,
2318 "Copying (but not loading) uCode instr len %zd\n", len);
2319 memcpy(priv->ucode_code.v_addr, src, len);
2320 src += len;
2321
2322 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2323 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2324
2325 /* Runtime data (2nd block)
2326 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2327 len = data_size;
2328 IWL_DEBUG_INFO(priv,
2329 "Copying (but not loading) uCode data len %zd\n", len);
2330 memcpy(priv->ucode_data.v_addr, src, len);
2331 memcpy(priv->ucode_data_backup.v_addr, src, len);
2332 src += len;
2333
2334 /* Initialization instructions (3rd block) */
2335 if (init_size) {
2336 len = init_size;
2337 IWL_DEBUG_INFO(priv,
2338 "Copying (but not loading) init instr len %zd\n", len);
2339 memcpy(priv->ucode_init.v_addr, src, len);
2340 src += len;
2341 }
2342
2343 /* Initialization data (4th block) */
2344 if (init_data_size) {
2345 len = init_data_size;
2346 IWL_DEBUG_INFO(priv,
2347 "Copying (but not loading) init data len %zd\n", len);
2348 memcpy(priv->ucode_init_data.v_addr, src, len);
2349 src += len;
2350 }
2351
2352 /* Bootstrap instructions (5th block) */
2353 len = boot_size;
2354 IWL_DEBUG_INFO(priv,
2355 "Copying (but not loading) boot instr len %zd\n", len);
2356 memcpy(priv->ucode_boot.v_addr, src, len);
2357
2358 /* We have our copies now, allow OS release its copies */
2359 release_firmware(ucode_raw);
2360 return 0;
2361
2362 err_pci_alloc:
2363 IWL_ERR(priv, "failed to allocate pci memory\n");
2364 ret = -ENOMEM;
2365 iwl3945_dealloc_ucode_pci(priv);
2366
2367 err_release:
2368 release_firmware(ucode_raw);
2369
2370 error:
2371 return ret;
2372 }
2373
2374
2375 /**
2376 * iwl3945_set_ucode_ptrs - Set uCode address location
2377 *
2378 * Tell initialization uCode where to find runtime uCode.
2379 *
2380 * BSM registers initially contain pointers to initialization uCode.
2381 * We need to replace them to load runtime uCode inst and data,
2382 * and to save runtime data when powering down.
2383 */
2384 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2385 {
2386 dma_addr_t pinst;
2387 dma_addr_t pdata;
2388
2389 /* bits 31:0 for 3945 */
2390 pinst = priv->ucode_code.p_addr;
2391 pdata = priv->ucode_data_backup.p_addr;
2392
2393 /* Tell bootstrap uCode where to find image to load */
2394 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2395 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2396 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2397 priv->ucode_data.len);
2398
2399 /* Inst byte count must be last to set up, bit 31 signals uCode
2400 * that all new ptr/size info is in place */
2401 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2402 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2403
2404 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2405
2406 return 0;
2407 }
2408
2409 /**
2410 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2411 *
2412 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2413 *
2414 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2415 */
2416 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2417 {
2418 /* Check alive response for "valid" sign from uCode */
2419 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2420 /* We had an error bringing up the hardware, so take it
2421 * all the way back down so we can try again */
2422 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2423 goto restart;
2424 }
2425
2426 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2427 * This is a paranoid check, because we would not have gotten the
2428 * "initialize" alive if code weren't properly loaded. */
2429 if (iwl3945_verify_ucode(priv)) {
2430 /* Runtime instruction load was bad;
2431 * take it all the way back down so we can try again */
2432 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2433 goto restart;
2434 }
2435
2436 /* Send pointers to protocol/runtime uCode image ... init code will
2437 * load and launch runtime uCode, which will send us another "Alive"
2438 * notification. */
2439 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2440 if (iwl3945_set_ucode_ptrs(priv)) {
2441 /* Runtime instruction load won't happen;
2442 * take it all the way back down so we can try again */
2443 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2444 goto restart;
2445 }
2446 return;
2447
2448 restart:
2449 queue_work(priv->workqueue, &priv->restart);
2450 }
2451
2452 /**
2453 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2454 * from protocol/runtime uCode (initialization uCode's
2455 * Alive gets handled by iwl3945_init_alive_start()).
2456 */
2457 static void iwl3945_alive_start(struct iwl_priv *priv)
2458 {
2459 int thermal_spin = 0;
2460 u32 rfkill;
2461
2462 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2463
2464 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2465 /* We had an error bringing up the hardware, so take it
2466 * all the way back down so we can try again */
2467 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2468 goto restart;
2469 }
2470
2471 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2472 * This is a paranoid check, because we would not have gotten the
2473 * "runtime" alive if code weren't properly loaded. */
2474 if (iwl3945_verify_ucode(priv)) {
2475 /* Runtime instruction load was bad;
2476 * take it all the way back down so we can try again */
2477 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2478 goto restart;
2479 }
2480
2481 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2482 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2483
2484 if (rfkill & 0x1) {
2485 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2486 /* if RFKILL is not on, then wait for thermal
2487 * sensor in adapter to kick in */
2488 while (iwl3945_hw_get_temperature(priv) == 0) {
2489 thermal_spin++;
2490 udelay(10);
2491 }
2492
2493 if (thermal_spin)
2494 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2495 thermal_spin * 10);
2496 } else
2497 set_bit(STATUS_RF_KILL_HW, &priv->status);
2498
2499 /* After the ALIVE response, we can send commands to 3945 uCode */
2500 set_bit(STATUS_ALIVE, &priv->status);
2501
2502 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2503 /* Enable timer to monitor the driver queues */
2504 mod_timer(&priv->monitor_recover,
2505 jiffies +
2506 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2507 }
2508
2509 if (iwl_is_rfkill(priv))
2510 return;
2511
2512 ieee80211_wake_queues(priv->hw);
2513
2514 priv->active_rate = IWL_RATES_MASK;
2515
2516 iwl_power_update_mode(priv, true);
2517
2518 if (iwl_is_associated(priv)) {
2519 struct iwl3945_rxon_cmd *active_rxon =
2520 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2521
2522 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2523 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2524 } else {
2525 /* Initialize our rx_config data */
2526 iwl_connection_init_rx_config(priv, priv->iw_mode);
2527 }
2528
2529 /* Configure Bluetooth device coexistence support */
2530 priv->cfg->ops->hcmd->send_bt_config(priv);
2531
2532 /* Configure the adapter for unassociated operation */
2533 iwlcore_commit_rxon(priv);
2534
2535 iwl3945_reg_txpower_periodic(priv);
2536
2537 iwl_leds_init(priv);
2538
2539 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2540 set_bit(STATUS_READY, &priv->status);
2541 wake_up_interruptible(&priv->wait_command_queue);
2542
2543 return;
2544
2545 restart:
2546 queue_work(priv->workqueue, &priv->restart);
2547 }
2548
2549 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2550
2551 static void __iwl3945_down(struct iwl_priv *priv)
2552 {
2553 unsigned long flags;
2554 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2555 struct ieee80211_conf *conf = NULL;
2556
2557 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2558
2559 conf = ieee80211_get_hw_conf(priv->hw);
2560
2561 if (!exit_pending)
2562 set_bit(STATUS_EXIT_PENDING, &priv->status);
2563
2564 /* Station information will now be cleared in device */
2565 iwl_clear_ucode_stations(priv, true);
2566
2567 /* Unblock any waiting calls */
2568 wake_up_interruptible_all(&priv->wait_command_queue);
2569
2570 /* Wipe out the EXIT_PENDING status bit if we are not actually
2571 * exiting the module */
2572 if (!exit_pending)
2573 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2574
2575 /* stop and reset the on-board processor */
2576 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2577
2578 /* tell the device to stop sending interrupts */
2579 spin_lock_irqsave(&priv->lock, flags);
2580 iwl_disable_interrupts(priv);
2581 spin_unlock_irqrestore(&priv->lock, flags);
2582 iwl_synchronize_irq(priv);
2583
2584 if (priv->mac80211_registered)
2585 ieee80211_stop_queues(priv->hw);
2586
2587 /* If we have not previously called iwl3945_init() then
2588 * clear all bits but the RF Kill bits and return */
2589 if (!iwl_is_init(priv)) {
2590 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2591 STATUS_RF_KILL_HW |
2592 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2593 STATUS_GEO_CONFIGURED |
2594 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2595 STATUS_EXIT_PENDING;
2596 goto exit;
2597 }
2598
2599 /* ...otherwise clear out all the status bits but the RF Kill
2600 * bit and continue taking the NIC down. */
2601 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2602 STATUS_RF_KILL_HW |
2603 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2604 STATUS_GEO_CONFIGURED |
2605 test_bit(STATUS_FW_ERROR, &priv->status) <<
2606 STATUS_FW_ERROR |
2607 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2608 STATUS_EXIT_PENDING;
2609
2610 iwl3945_hw_txq_ctx_stop(priv);
2611 iwl3945_hw_rxq_stop(priv);
2612
2613 /* Power-down device's busmaster DMA clocks */
2614 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2615 udelay(5);
2616
2617 /* Stop the device, and put it in low power state */
2618 priv->cfg->ops->lib->apm_ops.stop(priv);
2619
2620 exit:
2621 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2622
2623 if (priv->ibss_beacon)
2624 dev_kfree_skb(priv->ibss_beacon);
2625 priv->ibss_beacon = NULL;
2626
2627 /* clear out any free frames */
2628 iwl3945_clear_free_frames(priv);
2629 }
2630
2631 static void iwl3945_down(struct iwl_priv *priv)
2632 {
2633 mutex_lock(&priv->mutex);
2634 __iwl3945_down(priv);
2635 mutex_unlock(&priv->mutex);
2636
2637 iwl3945_cancel_deferred_work(priv);
2638 }
2639
2640 #define MAX_HW_RESTARTS 5
2641
2642 static int __iwl3945_up(struct iwl_priv *priv)
2643 {
2644 int rc, i;
2645
2646 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2647 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2648 return -EIO;
2649 }
2650
2651 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2652 IWL_ERR(priv, "ucode not available for device bring up\n");
2653 return -EIO;
2654 }
2655
2656 /* If platform's RF_KILL switch is NOT set to KILL */
2657 if (iwl_read32(priv, CSR_GP_CNTRL) &
2658 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2659 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2660 else {
2661 set_bit(STATUS_RF_KILL_HW, &priv->status);
2662 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2663 return -ENODEV;
2664 }
2665
2666 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2667
2668 rc = iwl3945_hw_nic_init(priv);
2669 if (rc) {
2670 IWL_ERR(priv, "Unable to int nic\n");
2671 return rc;
2672 }
2673
2674 /* make sure rfkill handshake bits are cleared */
2675 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2676 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2677 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2678
2679 /* clear (again), then enable host interrupts */
2680 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2681 iwl_enable_interrupts(priv);
2682
2683 /* really make sure rfkill handshake bits are cleared */
2684 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2685 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2686
2687 /* Copy original ucode data image from disk into backup cache.
2688 * This will be used to initialize the on-board processor's
2689 * data SRAM for a clean start when the runtime program first loads. */
2690 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2691 priv->ucode_data.len);
2692
2693 /* We return success when we resume from suspend and rf_kill is on. */
2694 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2695 return 0;
2696
2697 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2698
2699 /* load bootstrap state machine,
2700 * load bootstrap program into processor's memory,
2701 * prepare to load the "initialize" uCode */
2702 rc = priv->cfg->ops->lib->load_ucode(priv);
2703
2704 if (rc) {
2705 IWL_ERR(priv,
2706 "Unable to set up bootstrap uCode: %d\n", rc);
2707 continue;
2708 }
2709
2710 /* start card; "initialize" will load runtime ucode */
2711 iwl3945_nic_start(priv);
2712
2713 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2714
2715 return 0;
2716 }
2717
2718 set_bit(STATUS_EXIT_PENDING, &priv->status);
2719 __iwl3945_down(priv);
2720 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2721
2722 /* tried to restart and config the device for as long as our
2723 * patience could withstand */
2724 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2725 return -EIO;
2726 }
2727
2728
2729 /*****************************************************************************
2730 *
2731 * Workqueue callbacks
2732 *
2733 *****************************************************************************/
2734
2735 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2736 {
2737 struct iwl_priv *priv =
2738 container_of(data, struct iwl_priv, init_alive_start.work);
2739
2740 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2741 return;
2742
2743 mutex_lock(&priv->mutex);
2744 iwl3945_init_alive_start(priv);
2745 mutex_unlock(&priv->mutex);
2746 }
2747
2748 static void iwl3945_bg_alive_start(struct work_struct *data)
2749 {
2750 struct iwl_priv *priv =
2751 container_of(data, struct iwl_priv, alive_start.work);
2752
2753 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2754 return;
2755
2756 mutex_lock(&priv->mutex);
2757 iwl3945_alive_start(priv);
2758 mutex_unlock(&priv->mutex);
2759 }
2760
2761 /*
2762 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2763 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2764 * *is* readable even when device has been SW_RESET into low power mode
2765 * (e.g. during RF KILL).
2766 */
2767 static void iwl3945_rfkill_poll(struct work_struct *data)
2768 {
2769 struct iwl_priv *priv =
2770 container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2771 bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2772 bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2773 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2774
2775 if (new_rfkill != old_rfkill) {
2776 if (new_rfkill)
2777 set_bit(STATUS_RF_KILL_HW, &priv->status);
2778 else
2779 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2780
2781 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2782
2783 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2784 new_rfkill ? "disable radio" : "enable radio");
2785 }
2786
2787 /* Keep this running, even if radio now enabled. This will be
2788 * cancelled in mac_start() if system decides to start again */
2789 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2790 round_jiffies_relative(2 * HZ));
2791
2792 }
2793
2794 void iwl3945_request_scan(struct iwl_priv *priv)
2795 {
2796 struct iwl_host_cmd cmd = {
2797 .id = REPLY_SCAN_CMD,
2798 .len = sizeof(struct iwl3945_scan_cmd),
2799 .flags = CMD_SIZE_HUGE,
2800 };
2801 struct iwl3945_scan_cmd *scan;
2802 struct ieee80211_conf *conf = NULL;
2803 u8 n_probes = 0;
2804 enum ieee80211_band band;
2805 bool is_active = false;
2806
2807 conf = ieee80211_get_hw_conf(priv->hw);
2808
2809 cancel_delayed_work(&priv->scan_check);
2810
2811 if (!iwl_is_ready(priv)) {
2812 IWL_WARN(priv, "request scan called when driver not ready.\n");
2813 goto done;
2814 }
2815
2816 /* Make sure the scan wasn't canceled before this queued work
2817 * was given the chance to run... */
2818 if (!test_bit(STATUS_SCANNING, &priv->status))
2819 goto done;
2820
2821 /* This should never be called or scheduled if there is currently
2822 * a scan active in the hardware. */
2823 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2824 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2825 "Ignoring second request.\n");
2826 goto done;
2827 }
2828
2829 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2830 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2831 goto done;
2832 }
2833
2834 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2835 IWL_DEBUG_HC(priv,
2836 "Scan request while abort pending. Queuing.\n");
2837 goto done;
2838 }
2839
2840 if (iwl_is_rfkill(priv)) {
2841 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2842 goto done;
2843 }
2844
2845 if (!test_bit(STATUS_READY, &priv->status)) {
2846 IWL_DEBUG_HC(priv,
2847 "Scan request while uninitialized. Queuing.\n");
2848 goto done;
2849 }
2850
2851 if (!priv->scan_cmd) {
2852 priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2853 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2854 if (!priv->scan_cmd) {
2855 IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2856 goto done;
2857 }
2858 }
2859 scan = priv->scan_cmd;
2860 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2861
2862 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2863 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2864
2865 if (iwl_is_associated(priv)) {
2866 u16 interval = 0;
2867 u32 extra;
2868 u32 suspend_time = 100;
2869 u32 scan_suspend_time = 100;
2870 unsigned long flags;
2871
2872 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2873
2874 spin_lock_irqsave(&priv->lock, flags);
2875 interval = priv->beacon_int;
2876 spin_unlock_irqrestore(&priv->lock, flags);
2877
2878 scan->suspend_time = 0;
2879 scan->max_out_time = cpu_to_le32(200 * 1024);
2880 if (!interval)
2881 interval = suspend_time;
2882 /*
2883 * suspend time format:
2884 * 0-19: beacon interval in usec (time before exec.)
2885 * 20-23: 0
2886 * 24-31: number of beacons (suspend between channels)
2887 */
2888
2889 extra = (suspend_time / interval) << 24;
2890 scan_suspend_time = 0xFF0FFFFF &
2891 (extra | ((suspend_time % interval) * 1024));
2892
2893 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2894 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2895 scan_suspend_time, interval);
2896 }
2897
2898 if (priv->is_internal_short_scan) {
2899 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
2900 } else if (priv->scan_request->n_ssids) {
2901 int i, p = 0;
2902 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2903 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2904 /* always does wildcard anyway */
2905 if (!priv->scan_request->ssids[i].ssid_len)
2906 continue;
2907 scan->direct_scan[p].id = WLAN_EID_SSID;
2908 scan->direct_scan[p].len =
2909 priv->scan_request->ssids[i].ssid_len;
2910 memcpy(scan->direct_scan[p].ssid,
2911 priv->scan_request->ssids[i].ssid,
2912 priv->scan_request->ssids[i].ssid_len);
2913 n_probes++;
2914 p++;
2915 }
2916 is_active = true;
2917 } else
2918 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2919
2920 /* We don't build a direct scan probe request; the uCode will do
2921 * that based on the direct_mask added to each channel entry */
2922 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2923 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2924 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2925
2926 /* flags + rate selection */
2927
2928 switch (priv->scan_band) {
2929 case IEEE80211_BAND_2GHZ:
2930 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2931 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2932 scan->good_CRC_th = 0;
2933 band = IEEE80211_BAND_2GHZ;
2934 break;
2935 case IEEE80211_BAND_5GHZ:
2936 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2937 /*
2938 * If active scaning is requested but a certain channel
2939 * is marked passive, we can do active scanning if we
2940 * detect transmissions.
2941 */
2942 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2943 IWL_GOOD_CRC_TH_DISABLED;
2944 band = IEEE80211_BAND_5GHZ;
2945 break;
2946 default:
2947 IWL_WARN(priv, "Invalid scan band\n");
2948 goto done;
2949 }
2950
2951 if (!priv->is_internal_short_scan) {
2952 scan->tx_cmd.len = cpu_to_le16(
2953 iwl_fill_probe_req(priv,
2954 (struct ieee80211_mgmt *)scan->data,
2955 priv->scan_request->ie,
2956 priv->scan_request->ie_len,
2957 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2958 } else {
2959 scan->tx_cmd.len = cpu_to_le16(
2960 iwl_fill_probe_req(priv,
2961 (struct ieee80211_mgmt *)scan->data,
2962 NULL, 0,
2963 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2964 }
2965 /* select Rx antennas */
2966 scan->flags |= iwl3945_get_antenna_flags(priv);
2967
2968 scan->channel_count =
2969 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2970 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
2971
2972 if (scan->channel_count == 0) {
2973 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2974 goto done;
2975 }
2976
2977 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2978 scan->channel_count * sizeof(struct iwl3945_scan_channel);
2979 cmd.data = scan;
2980 scan->len = cpu_to_le16(cmd.len);
2981
2982 set_bit(STATUS_SCAN_HW, &priv->status);
2983 if (iwl_send_cmd_sync(priv, &cmd))
2984 goto done;
2985
2986 queue_delayed_work(priv->workqueue, &priv->scan_check,
2987 IWL_SCAN_CHECK_WATCHDOG);
2988
2989 return;
2990
2991 done:
2992 /* can not perform scan make sure we clear scanning
2993 * bits from status so next scan request can be performed.
2994 * if we dont clear scanning status bit here all next scan
2995 * will fail
2996 */
2997 clear_bit(STATUS_SCAN_HW, &priv->status);
2998 clear_bit(STATUS_SCANNING, &priv->status);
2999
3000 /* inform mac80211 scan aborted */
3001 queue_work(priv->workqueue, &priv->scan_completed);
3002 }
3003
3004 static void iwl3945_bg_restart(struct work_struct *data)
3005 {
3006 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3007
3008 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3009 return;
3010
3011 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3012 mutex_lock(&priv->mutex);
3013 priv->vif = NULL;
3014 priv->is_open = 0;
3015 mutex_unlock(&priv->mutex);
3016 iwl3945_down(priv);
3017 ieee80211_restart_hw(priv->hw);
3018 } else {
3019 iwl3945_down(priv);
3020
3021 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3022 return;
3023
3024 mutex_lock(&priv->mutex);
3025 __iwl3945_up(priv);
3026 mutex_unlock(&priv->mutex);
3027 }
3028 }
3029
3030 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3031 {
3032 struct iwl_priv *priv =
3033 container_of(data, struct iwl_priv, rx_replenish);
3034
3035 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3036 return;
3037
3038 mutex_lock(&priv->mutex);
3039 iwl3945_rx_replenish(priv);
3040 mutex_unlock(&priv->mutex);
3041 }
3042
3043 void iwl3945_post_associate(struct iwl_priv *priv)
3044 {
3045 int rc = 0;
3046 struct ieee80211_conf *conf = NULL;
3047
3048 if (priv->iw_mode == NL80211_IFTYPE_AP) {
3049 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3050 return;
3051 }
3052
3053
3054 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3055 priv->assoc_id, priv->active_rxon.bssid_addr);
3056
3057 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3058 return;
3059
3060 if (!priv->vif || !priv->is_open)
3061 return;
3062
3063 iwl_scan_cancel_timeout(priv, 200);
3064
3065 conf = ieee80211_get_hw_conf(priv->hw);
3066
3067 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3068 iwlcore_commit_rxon(priv);
3069
3070 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3071 iwl_setup_rxon_timing(priv);
3072 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3073 sizeof(priv->rxon_timing), &priv->rxon_timing);
3074 if (rc)
3075 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3076 "Attempting to continue.\n");
3077
3078 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3079
3080 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3081
3082 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3083 priv->assoc_id, priv->beacon_int);
3084
3085 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3086 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3087 else
3088 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3089
3090 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3091 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
3092 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3093 else
3094 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3095
3096 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3097 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3098
3099 }
3100
3101 iwlcore_commit_rxon(priv);
3102
3103 switch (priv->iw_mode) {
3104 case NL80211_IFTYPE_STATION:
3105 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3106 break;
3107
3108 case NL80211_IFTYPE_ADHOC:
3109
3110 priv->assoc_id = 1;
3111 iwl_add_local_station(priv, priv->bssid, false);
3112 iwl3945_sync_sta(priv, IWL_STA_ID,
3113 (priv->band == IEEE80211_BAND_5GHZ) ?
3114 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3115 CMD_ASYNC);
3116 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3117
3118 iwl3945_send_beacon_cmd(priv);
3119
3120 break;
3121
3122 default:
3123 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3124 __func__, priv->iw_mode);
3125 break;
3126 }
3127 }
3128
3129 /*****************************************************************************
3130 *
3131 * mac80211 entry point functions
3132 *
3133 *****************************************************************************/
3134
3135 #define UCODE_READY_TIMEOUT (2 * HZ)
3136
3137 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3138 {
3139 struct iwl_priv *priv = hw->priv;
3140 int ret;
3141
3142 IWL_DEBUG_MAC80211(priv, "enter\n");
3143
3144 /* we should be verifying the device is ready to be opened */
3145 mutex_lock(&priv->mutex);
3146
3147 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3148 * ucode filename and max sizes are card-specific. */
3149
3150 if (!priv->ucode_code.len) {
3151 ret = iwl3945_read_ucode(priv);
3152 if (ret) {
3153 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3154 mutex_unlock(&priv->mutex);
3155 goto out_release_irq;
3156 }
3157 }
3158
3159 ret = __iwl3945_up(priv);
3160
3161 mutex_unlock(&priv->mutex);
3162
3163 if (ret)
3164 goto out_release_irq;
3165
3166 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3167
3168 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3169 * mac80211 will not be run successfully. */
3170 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3171 test_bit(STATUS_READY, &priv->status),
3172 UCODE_READY_TIMEOUT);
3173 if (!ret) {
3174 if (!test_bit(STATUS_READY, &priv->status)) {
3175 IWL_ERR(priv,
3176 "Wait for START_ALIVE timeout after %dms.\n",
3177 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3178 ret = -ETIMEDOUT;
3179 goto out_release_irq;
3180 }
3181 }
3182
3183 /* ucode is running and will send rfkill notifications,
3184 * no need to poll the killswitch state anymore */
3185 cancel_delayed_work(&priv->_3945.rfkill_poll);
3186
3187 iwl_led_start(priv);
3188
3189 priv->is_open = 1;
3190 IWL_DEBUG_MAC80211(priv, "leave\n");
3191 return 0;
3192
3193 out_release_irq:
3194 priv->is_open = 0;
3195 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3196 return ret;
3197 }
3198
3199 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3200 {
3201 struct iwl_priv *priv = hw->priv;
3202
3203 IWL_DEBUG_MAC80211(priv, "enter\n");
3204
3205 if (!priv->is_open) {
3206 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3207 return;
3208 }
3209
3210 priv->is_open = 0;
3211
3212 if (iwl_is_ready_rf(priv)) {
3213 /* stop mac, cancel any scan request and clear
3214 * RXON_FILTER_ASSOC_MSK BIT
3215 */
3216 mutex_lock(&priv->mutex);
3217 iwl_scan_cancel_timeout(priv, 100);
3218 mutex_unlock(&priv->mutex);
3219 }
3220
3221 iwl3945_down(priv);
3222
3223 flush_workqueue(priv->workqueue);
3224
3225 /* start polling the killswitch state again */
3226 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
3227 round_jiffies_relative(2 * HZ));
3228
3229 IWL_DEBUG_MAC80211(priv, "leave\n");
3230 }
3231
3232 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3233 {
3234 struct iwl_priv *priv = hw->priv;
3235
3236 IWL_DEBUG_MAC80211(priv, "enter\n");
3237
3238 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3239 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3240
3241 if (iwl3945_tx_skb(priv, skb))
3242 dev_kfree_skb_any(skb);
3243
3244 IWL_DEBUG_MAC80211(priv, "leave\n");
3245 return NETDEV_TX_OK;
3246 }
3247
3248 void iwl3945_config_ap(struct iwl_priv *priv)
3249 {
3250 int rc = 0;
3251
3252 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3253 return;
3254
3255 /* The following should be done only at AP bring up */
3256 if (!(iwl_is_associated(priv))) {
3257
3258 /* RXON - unassoc (to set timing command) */
3259 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3260 iwlcore_commit_rxon(priv);
3261
3262 /* RXON Timing */
3263 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3264 iwl_setup_rxon_timing(priv);
3265 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3266 sizeof(priv->rxon_timing),
3267 &priv->rxon_timing);
3268 if (rc)
3269 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3270 "Attempting to continue.\n");
3271
3272 /* FIXME: what should be the assoc_id for AP? */
3273 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3274 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3275 priv->staging_rxon.flags |=
3276 RXON_FLG_SHORT_PREAMBLE_MSK;
3277 else
3278 priv->staging_rxon.flags &=
3279 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3280
3281 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3282 if (priv->assoc_capability &
3283 WLAN_CAPABILITY_SHORT_SLOT_TIME)
3284 priv->staging_rxon.flags |=
3285 RXON_FLG_SHORT_SLOT_MSK;
3286 else
3287 priv->staging_rxon.flags &=
3288 ~RXON_FLG_SHORT_SLOT_MSK;
3289
3290 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3291 priv->staging_rxon.flags &=
3292 ~RXON_FLG_SHORT_SLOT_MSK;
3293 }
3294 /* restore RXON assoc */
3295 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3296 iwlcore_commit_rxon(priv);
3297 iwl_add_local_station(priv, iwl_bcast_addr, false);
3298 }
3299 iwl3945_send_beacon_cmd(priv);
3300
3301 /* FIXME - we need to add code here to detect a totally new
3302 * configuration, reset the AP, unassoc, rxon timing, assoc,
3303 * clear sta table, add BCAST sta... */
3304 }
3305
3306 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3307 struct ieee80211_vif *vif,
3308 struct ieee80211_sta *sta,
3309 struct ieee80211_key_conf *key)
3310 {
3311 struct iwl_priv *priv = hw->priv;
3312 const u8 *addr;
3313 int ret = 0;
3314 u8 sta_id = IWL_INVALID_STATION;
3315 u8 static_key;
3316
3317 IWL_DEBUG_MAC80211(priv, "enter\n");
3318
3319 if (iwl3945_mod_params.sw_crypto) {
3320 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3321 return -EOPNOTSUPP;
3322 }
3323
3324 addr = sta ? sta->addr : iwl_bcast_addr;
3325 static_key = !iwl_is_associated(priv);
3326
3327 if (!static_key) {
3328 sta_id = iwl_find_station(priv, addr);
3329 if (sta_id == IWL_INVALID_STATION) {
3330 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
3331 addr);
3332 return -EINVAL;
3333 }
3334 }
3335
3336 mutex_lock(&priv->mutex);
3337 iwl_scan_cancel_timeout(priv, 100);
3338
3339 switch (cmd) {
3340 case SET_KEY:
3341 if (static_key)
3342 ret = iwl3945_set_static_key(priv, key);
3343 else
3344 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3345 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3346 break;
3347 case DISABLE_KEY:
3348 if (static_key)
3349 ret = iwl3945_remove_static_key(priv);
3350 else
3351 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3352 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3353 break;
3354 default:
3355 ret = -EINVAL;
3356 }
3357
3358 mutex_unlock(&priv->mutex);
3359 IWL_DEBUG_MAC80211(priv, "leave\n");
3360
3361 return ret;
3362 }
3363
3364 static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
3365 struct ieee80211_vif *vif,
3366 struct ieee80211_sta *sta)
3367 {
3368 struct iwl_priv *priv = hw->priv;
3369 int ret;
3370 bool is_ap = priv->iw_mode == NL80211_IFTYPE_STATION;
3371 u8 sta_id;
3372
3373 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3374 sta->addr);
3375
3376 ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3377 &sta_id);
3378 if (ret) {
3379 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3380 sta->addr, ret);
3381 /* Should we return success if return code is EEXIST ? */
3382 return ret;
3383 }
3384
3385 /* Initialize rate scaling */
3386 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3387 sta->addr);
3388 iwl3945_rs_rate_init(priv, sta, sta_id);
3389
3390 return 0;
3391
3392
3393
3394 return ret;
3395 }
3396 /*****************************************************************************
3397 *
3398 * sysfs attributes
3399 *
3400 *****************************************************************************/
3401
3402 #ifdef CONFIG_IWLWIFI_DEBUG
3403
3404 /*
3405 * The following adds a new attribute to the sysfs representation
3406 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3407 * used for controlling the debug level.
3408 *
3409 * See the level definitions in iwl for details.
3410 *
3411 * The debug_level being managed using sysfs below is a per device debug
3412 * level that is used instead of the global debug level if it (the per
3413 * device debug level) is set.
3414 */
3415 static ssize_t show_debug_level(struct device *d,
3416 struct device_attribute *attr, char *buf)
3417 {
3418 struct iwl_priv *priv = dev_get_drvdata(d);
3419 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3420 }
3421 static ssize_t store_debug_level(struct device *d,
3422 struct device_attribute *attr,
3423 const char *buf, size_t count)
3424 {
3425 struct iwl_priv *priv = dev_get_drvdata(d);
3426 unsigned long val;
3427 int ret;
3428
3429 ret = strict_strtoul(buf, 0, &val);
3430 if (ret)
3431 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3432 else {
3433 priv->debug_level = val;
3434 if (iwl_alloc_traffic_mem(priv))
3435 IWL_ERR(priv,
3436 "Not enough memory to generate traffic log\n");
3437 }
3438 return strnlen(buf, count);
3439 }
3440
3441 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3442 show_debug_level, store_debug_level);
3443
3444 #endif /* CONFIG_IWLWIFI_DEBUG */
3445
3446 static ssize_t show_temperature(struct device *d,
3447 struct device_attribute *attr, char *buf)
3448 {
3449 struct iwl_priv *priv = dev_get_drvdata(d);
3450
3451 if (!iwl_is_alive(priv))
3452 return -EAGAIN;
3453
3454 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3455 }
3456
3457 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3458
3459 static ssize_t show_tx_power(struct device *d,
3460 struct device_attribute *attr, char *buf)
3461 {
3462 struct iwl_priv *priv = dev_get_drvdata(d);
3463 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3464 }
3465
3466 static ssize_t store_tx_power(struct device *d,
3467 struct device_attribute *attr,
3468 const char *buf, size_t count)
3469 {
3470 struct iwl_priv *priv = dev_get_drvdata(d);
3471 char *p = (char *)buf;
3472 u32 val;
3473
3474 val = simple_strtoul(p, &p, 10);
3475 if (p == buf)
3476 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3477 else
3478 iwl3945_hw_reg_set_txpower(priv, val);
3479
3480 return count;
3481 }
3482
3483 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3484
3485 static ssize_t show_flags(struct device *d,
3486 struct device_attribute *attr, char *buf)
3487 {
3488 struct iwl_priv *priv = dev_get_drvdata(d);
3489
3490 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3491 }
3492
3493 static ssize_t store_flags(struct device *d,
3494 struct device_attribute *attr,
3495 const char *buf, size_t count)
3496 {
3497 struct iwl_priv *priv = dev_get_drvdata(d);
3498 u32 flags = simple_strtoul(buf, NULL, 0);
3499
3500 mutex_lock(&priv->mutex);
3501 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3502 /* Cancel any currently running scans... */
3503 if (iwl_scan_cancel_timeout(priv, 100))
3504 IWL_WARN(priv, "Could not cancel scan.\n");
3505 else {
3506 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3507 flags);
3508 priv->staging_rxon.flags = cpu_to_le32(flags);
3509 iwlcore_commit_rxon(priv);
3510 }
3511 }
3512 mutex_unlock(&priv->mutex);
3513
3514 return count;
3515 }
3516
3517 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3518
3519 static ssize_t show_filter_flags(struct device *d,
3520 struct device_attribute *attr, char *buf)
3521 {
3522 struct iwl_priv *priv = dev_get_drvdata(d);
3523
3524 return sprintf(buf, "0x%04X\n",
3525 le32_to_cpu(priv->active_rxon.filter_flags));
3526 }
3527
3528 static ssize_t store_filter_flags(struct device *d,
3529 struct device_attribute *attr,
3530 const char *buf, size_t count)
3531 {
3532 struct iwl_priv *priv = dev_get_drvdata(d);
3533 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3534
3535 mutex_lock(&priv->mutex);
3536 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3537 /* Cancel any currently running scans... */
3538 if (iwl_scan_cancel_timeout(priv, 100))
3539 IWL_WARN(priv, "Could not cancel scan.\n");
3540 else {
3541 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3542 "0x%04X\n", filter_flags);
3543 priv->staging_rxon.filter_flags =
3544 cpu_to_le32(filter_flags);
3545 iwlcore_commit_rxon(priv);
3546 }
3547 }
3548 mutex_unlock(&priv->mutex);
3549
3550 return count;
3551 }
3552
3553 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3554 store_filter_flags);
3555
3556 static ssize_t show_measurement(struct device *d,
3557 struct device_attribute *attr, char *buf)
3558 {
3559 struct iwl_priv *priv = dev_get_drvdata(d);
3560 struct iwl_spectrum_notification measure_report;
3561 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3562 u8 *data = (u8 *)&measure_report;
3563 unsigned long flags;
3564
3565 spin_lock_irqsave(&priv->lock, flags);
3566 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3567 spin_unlock_irqrestore(&priv->lock, flags);
3568 return 0;
3569 }
3570 memcpy(&measure_report, &priv->measure_report, size);
3571 priv->measurement_status = 0;
3572 spin_unlock_irqrestore(&priv->lock, flags);
3573
3574 while (size && (PAGE_SIZE - len)) {
3575 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3576 PAGE_SIZE - len, 1);
3577 len = strlen(buf);
3578 if (PAGE_SIZE - len)
3579 buf[len++] = '\n';
3580
3581 ofs += 16;
3582 size -= min(size, 16U);
3583 }
3584
3585 return len;
3586 }
3587
3588 static ssize_t store_measurement(struct device *d,
3589 struct device_attribute *attr,
3590 const char *buf, size_t count)
3591 {
3592 struct iwl_priv *priv = dev_get_drvdata(d);
3593 struct ieee80211_measurement_params params = {
3594 .channel = le16_to_cpu(priv->active_rxon.channel),
3595 .start_time = cpu_to_le64(priv->_3945.last_tsf),
3596 .duration = cpu_to_le16(1),
3597 };
3598 u8 type = IWL_MEASURE_BASIC;
3599 u8 buffer[32];
3600 u8 channel;
3601
3602 if (count) {
3603 char *p = buffer;
3604 strncpy(buffer, buf, min(sizeof(buffer), count));
3605 channel = simple_strtoul(p, NULL, 0);
3606 if (channel)
3607 params.channel = channel;
3608
3609 p = buffer;
3610 while (*p && *p != ' ')
3611 p++;
3612 if (*p)
3613 type = simple_strtoul(p + 1, NULL, 0);
3614 }
3615
3616 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3617 "channel %d (for '%s')\n", type, params.channel, buf);
3618 iwl3945_get_measurement(priv, &params, type);
3619
3620 return count;
3621 }
3622
3623 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3624 show_measurement, store_measurement);
3625
3626 static ssize_t store_retry_rate(struct device *d,
3627 struct device_attribute *attr,
3628 const char *buf, size_t count)
3629 {
3630 struct iwl_priv *priv = dev_get_drvdata(d);
3631
3632 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3633 if (priv->retry_rate <= 0)
3634 priv->retry_rate = 1;
3635
3636 return count;
3637 }
3638
3639 static ssize_t show_retry_rate(struct device *d,
3640 struct device_attribute *attr, char *buf)
3641 {
3642 struct iwl_priv *priv = dev_get_drvdata(d);
3643 return sprintf(buf, "%d", priv->retry_rate);
3644 }
3645
3646 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3647 store_retry_rate);
3648
3649
3650 static ssize_t show_channels(struct device *d,
3651 struct device_attribute *attr, char *buf)
3652 {
3653 /* all this shit doesn't belong into sysfs anyway */
3654 return 0;
3655 }
3656
3657 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3658
3659 static ssize_t show_antenna(struct device *d,
3660 struct device_attribute *attr, char *buf)
3661 {
3662 struct iwl_priv *priv = dev_get_drvdata(d);
3663
3664 if (!iwl_is_alive(priv))
3665 return -EAGAIN;
3666
3667 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3668 }
3669
3670 static ssize_t store_antenna(struct device *d,
3671 struct device_attribute *attr,
3672 const char *buf, size_t count)
3673 {
3674 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3675 int ant;
3676
3677 if (count == 0)
3678 return 0;
3679
3680 if (sscanf(buf, "%1i", &ant) != 1) {
3681 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3682 return count;
3683 }
3684
3685 if ((ant >= 0) && (ant <= 2)) {
3686 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3687 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3688 } else
3689 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3690
3691
3692 return count;
3693 }
3694
3695 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3696
3697 static ssize_t show_status(struct device *d,
3698 struct device_attribute *attr, char *buf)
3699 {
3700 struct iwl_priv *priv = dev_get_drvdata(d);
3701 if (!iwl_is_alive(priv))
3702 return -EAGAIN;
3703 return sprintf(buf, "0x%08x\n", (int)priv->status);
3704 }
3705
3706 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3707
3708 static ssize_t dump_error_log(struct device *d,
3709 struct device_attribute *attr,
3710 const char *buf, size_t count)
3711 {
3712 struct iwl_priv *priv = dev_get_drvdata(d);
3713 char *p = (char *)buf;
3714
3715 if (p[0] == '1')
3716 iwl3945_dump_nic_error_log(priv);
3717
3718 return strnlen(buf, count);
3719 }
3720
3721 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3722
3723 /*****************************************************************************
3724 *
3725 * driver setup and tear down
3726 *
3727 *****************************************************************************/
3728
3729 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3730 {
3731 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3732
3733 init_waitqueue_head(&priv->wait_command_queue);
3734
3735 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3736 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3737 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3738 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3739 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3740 INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
3741 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3742 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3743 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
3744
3745 iwl3945_hw_setup_deferred_work(priv);
3746
3747 if (priv->cfg->ops->lib->recover_from_tx_stall) {
3748 init_timer(&priv->monitor_recover);
3749 priv->monitor_recover.data = (unsigned long)priv;
3750 priv->monitor_recover.function =
3751 priv->cfg->ops->lib->recover_from_tx_stall;
3752 }
3753
3754 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3755 iwl3945_irq_tasklet, (unsigned long)priv);
3756 }
3757
3758 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3759 {
3760 iwl3945_hw_cancel_deferred_work(priv);
3761
3762 cancel_delayed_work_sync(&priv->init_alive_start);
3763 cancel_delayed_work(&priv->scan_check);
3764 cancel_delayed_work(&priv->alive_start);
3765 cancel_work_sync(&priv->beacon_update);
3766 if (priv->cfg->ops->lib->recover_from_tx_stall)
3767 del_timer_sync(&priv->monitor_recover);
3768 }
3769
3770 static struct attribute *iwl3945_sysfs_entries[] = {
3771 &dev_attr_antenna.attr,
3772 &dev_attr_channels.attr,
3773 &dev_attr_dump_errors.attr,
3774 &dev_attr_flags.attr,
3775 &dev_attr_filter_flags.attr,
3776 &dev_attr_measurement.attr,
3777 &dev_attr_retry_rate.attr,
3778 &dev_attr_status.attr,
3779 &dev_attr_temperature.attr,
3780 &dev_attr_tx_power.attr,
3781 #ifdef CONFIG_IWLWIFI_DEBUG
3782 &dev_attr_debug_level.attr,
3783 #endif
3784 NULL
3785 };
3786
3787 static struct attribute_group iwl3945_attribute_group = {
3788 .name = NULL, /* put in device directory */
3789 .attrs = iwl3945_sysfs_entries,
3790 };
3791
3792 static struct ieee80211_ops iwl3945_hw_ops = {
3793 .tx = iwl3945_mac_tx,
3794 .start = iwl3945_mac_start,
3795 .stop = iwl3945_mac_stop,
3796 .add_interface = iwl_mac_add_interface,
3797 .remove_interface = iwl_mac_remove_interface,
3798 .config = iwl_mac_config,
3799 .configure_filter = iwl_configure_filter,
3800 .set_key = iwl3945_mac_set_key,
3801 .conf_tx = iwl_mac_conf_tx,
3802 .reset_tsf = iwl_mac_reset_tsf,
3803 .bss_info_changed = iwl_bss_info_changed,
3804 .hw_scan = iwl_mac_hw_scan,
3805 .sta_add = iwl3945_mac_sta_add,
3806 .sta_remove = iwl_mac_sta_remove,
3807 };
3808
3809 static int iwl3945_init_drv(struct iwl_priv *priv)
3810 {
3811 int ret;
3812 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3813
3814 priv->retry_rate = 1;
3815 priv->ibss_beacon = NULL;
3816
3817 spin_lock_init(&priv->sta_lock);
3818 spin_lock_init(&priv->hcmd_lock);
3819
3820 INIT_LIST_HEAD(&priv->free_frames);
3821
3822 mutex_init(&priv->mutex);
3823 mutex_init(&priv->sync_cmd_mutex);
3824
3825 priv->ieee_channels = NULL;
3826 priv->ieee_rates = NULL;
3827 priv->band = IEEE80211_BAND_2GHZ;
3828
3829 priv->iw_mode = NL80211_IFTYPE_STATION;
3830 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3831
3832 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3833
3834 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3835 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3836 eeprom->version);
3837 ret = -EINVAL;
3838 goto err;
3839 }
3840 ret = iwl_init_channel_map(priv);
3841 if (ret) {
3842 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3843 goto err;
3844 }
3845
3846 /* Set up txpower settings in driver for all channels */
3847 if (iwl3945_txpower_set_from_eeprom(priv)) {
3848 ret = -EIO;
3849 goto err_free_channel_map;
3850 }
3851
3852 ret = iwlcore_init_geos(priv);
3853 if (ret) {
3854 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3855 goto err_free_channel_map;
3856 }
3857 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3858
3859 return 0;
3860
3861 err_free_channel_map:
3862 iwl_free_channel_map(priv);
3863 err:
3864 return ret;
3865 }
3866
3867 static int iwl3945_setup_mac(struct iwl_priv *priv)
3868 {
3869 int ret;
3870 struct ieee80211_hw *hw = priv->hw;
3871
3872 hw->rate_control_algorithm = "iwl-3945-rs";
3873 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3874
3875 /* Tell mac80211 our characteristics */
3876 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3877 IEEE80211_HW_SPECTRUM_MGMT;
3878
3879 if (!priv->cfg->broken_powersave)
3880 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3881 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3882
3883 hw->wiphy->interface_modes =
3884 BIT(NL80211_IFTYPE_STATION) |
3885 BIT(NL80211_IFTYPE_ADHOC);
3886
3887 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3888 WIPHY_FLAG_DISABLE_BEACON_HINTS;
3889
3890 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3891 /* we create the 802.11 header and a zero-length SSID element */
3892 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
3893
3894 /* Default value; 4 EDCA QOS priorities */
3895 hw->queues = 4;
3896
3897 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3898 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3899 &priv->bands[IEEE80211_BAND_2GHZ];
3900
3901 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3902 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3903 &priv->bands[IEEE80211_BAND_5GHZ];
3904
3905 ret = ieee80211_register_hw(priv->hw);
3906 if (ret) {
3907 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3908 return ret;
3909 }
3910 priv->mac80211_registered = 1;
3911
3912 return 0;
3913 }
3914
3915 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3916 {
3917 int err = 0;
3918 struct iwl_priv *priv;
3919 struct ieee80211_hw *hw;
3920 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3921 struct iwl3945_eeprom *eeprom;
3922 unsigned long flags;
3923
3924 /***********************
3925 * 1. Allocating HW data
3926 * ********************/
3927
3928 /* mac80211 allocates memory for this device instance, including
3929 * space for this driver's private structure */
3930 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
3931 if (hw == NULL) {
3932 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
3933 err = -ENOMEM;
3934 goto out;
3935 }
3936 priv = hw->priv;
3937 SET_IEEE80211_DEV(hw, &pdev->dev);
3938
3939 /*
3940 * Disabling hardware scan means that mac80211 will perform scans
3941 * "the hard way", rather than using device's scan.
3942 */
3943 if (iwl3945_mod_params.disable_hw_scan) {
3944 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
3945 iwl3945_hw_ops.hw_scan = NULL;
3946 }
3947
3948
3949 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3950 priv->cfg = cfg;
3951 priv->pci_dev = pdev;
3952 priv->inta_mask = CSR_INI_SET_MASK;
3953
3954 #ifdef CONFIG_IWLWIFI_DEBUG
3955 atomic_set(&priv->restrict_refcnt, 0);
3956 #endif
3957 if (iwl_alloc_traffic_mem(priv))
3958 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3959
3960 /***************************
3961 * 2. Initializing PCI bus
3962 * *************************/
3963 if (pci_enable_device(pdev)) {
3964 err = -ENODEV;
3965 goto out_ieee80211_free_hw;
3966 }
3967
3968 pci_set_master(pdev);
3969
3970 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3971 if (!err)
3972 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3973 if (err) {
3974 IWL_WARN(priv, "No suitable DMA available.\n");
3975 goto out_pci_disable_device;
3976 }
3977
3978 pci_set_drvdata(pdev, priv);
3979 err = pci_request_regions(pdev, DRV_NAME);
3980 if (err)
3981 goto out_pci_disable_device;
3982
3983 /***********************
3984 * 3. Read REV Register
3985 * ********************/
3986 priv->hw_base = pci_iomap(pdev, 0, 0);
3987 if (!priv->hw_base) {
3988 err = -ENODEV;
3989 goto out_pci_release_regions;
3990 }
3991
3992 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3993 (unsigned long long) pci_resource_len(pdev, 0));
3994 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3995
3996 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3997 * PCI Tx retries from interfering with C3 CPU state */
3998 pci_write_config_byte(pdev, 0x41, 0x00);
3999
4000 /* these spin locks will be used in apm_ops.init and EEPROM access
4001 * we should init now
4002 */
4003 spin_lock_init(&priv->reg_lock);
4004 spin_lock_init(&priv->lock);
4005
4006 /*
4007 * stop and reset the on-board processor just in case it is in a
4008 * strange state ... like being left stranded by a primary kernel
4009 * and this is now the kdump kernel trying to start up
4010 */
4011 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4012
4013 /***********************
4014 * 4. Read EEPROM
4015 * ********************/
4016
4017 /* Read the EEPROM */
4018 err = iwl_eeprom_init(priv);
4019 if (err) {
4020 IWL_ERR(priv, "Unable to init EEPROM\n");
4021 goto out_iounmap;
4022 }
4023 /* MAC Address location in EEPROM same for 3945/4965 */
4024 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4025 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
4026 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
4027 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4028
4029 /***********************
4030 * 5. Setup HW Constants
4031 * ********************/
4032 /* Device-specific setup */
4033 if (iwl3945_hw_set_hw_params(priv)) {
4034 IWL_ERR(priv, "failed to set hw settings\n");
4035 goto out_eeprom_free;
4036 }
4037
4038 /***********************
4039 * 6. Setup priv
4040 * ********************/
4041
4042 err = iwl3945_init_drv(priv);
4043 if (err) {
4044 IWL_ERR(priv, "initializing driver failed\n");
4045 goto out_unset_hw_params;
4046 }
4047
4048 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4049 priv->cfg->name);
4050
4051 /***********************
4052 * 7. Setup Services
4053 * ********************/
4054
4055 spin_lock_irqsave(&priv->lock, flags);
4056 iwl_disable_interrupts(priv);
4057 spin_unlock_irqrestore(&priv->lock, flags);
4058
4059 pci_enable_msi(priv->pci_dev);
4060
4061 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4062 IRQF_SHARED, DRV_NAME, priv);
4063 if (err) {
4064 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4065 goto out_disable_msi;
4066 }
4067
4068 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4069 if (err) {
4070 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4071 goto out_release_irq;
4072 }
4073
4074 iwl_set_rxon_channel(priv,
4075 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4076 iwl3945_setup_deferred_work(priv);
4077 iwl3945_setup_rx_handlers(priv);
4078 iwl_power_initialize(priv);
4079
4080 /*********************************
4081 * 8. Setup and Register mac80211
4082 * *******************************/
4083
4084 iwl_enable_interrupts(priv);
4085
4086 err = iwl3945_setup_mac(priv);
4087 if (err)
4088 goto out_remove_sysfs;
4089
4090 err = iwl_dbgfs_register(priv, DRV_NAME);
4091 if (err)
4092 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4093
4094 /* Start monitoring the killswitch */
4095 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
4096 2 * HZ);
4097
4098 return 0;
4099
4100 out_remove_sysfs:
4101 destroy_workqueue(priv->workqueue);
4102 priv->workqueue = NULL;
4103 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4104 out_release_irq:
4105 free_irq(priv->pci_dev->irq, priv);
4106 out_disable_msi:
4107 pci_disable_msi(priv->pci_dev);
4108 iwlcore_free_geos(priv);
4109 iwl_free_channel_map(priv);
4110 out_unset_hw_params:
4111 iwl3945_unset_hw_params(priv);
4112 out_eeprom_free:
4113 iwl_eeprom_free(priv);
4114 out_iounmap:
4115 pci_iounmap(pdev, priv->hw_base);
4116 out_pci_release_regions:
4117 pci_release_regions(pdev);
4118 out_pci_disable_device:
4119 pci_set_drvdata(pdev, NULL);
4120 pci_disable_device(pdev);
4121 out_ieee80211_free_hw:
4122 iwl_free_traffic_mem(priv);
4123 ieee80211_free_hw(priv->hw);
4124 out:
4125 return err;
4126 }
4127
4128 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4129 {
4130 struct iwl_priv *priv = pci_get_drvdata(pdev);
4131 unsigned long flags;
4132
4133 if (!priv)
4134 return;
4135
4136 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4137
4138 iwl_dbgfs_unregister(priv);
4139
4140 set_bit(STATUS_EXIT_PENDING, &priv->status);
4141
4142 if (priv->mac80211_registered) {
4143 ieee80211_unregister_hw(priv->hw);
4144 priv->mac80211_registered = 0;
4145 } else {
4146 iwl3945_down(priv);
4147 }
4148
4149 /*
4150 * Make sure device is reset to low power before unloading driver.
4151 * This may be redundant with iwl_down(), but there are paths to
4152 * run iwl_down() without calling apm_ops.stop(), and there are
4153 * paths to avoid running iwl_down() at all before leaving driver.
4154 * This (inexpensive) call *makes sure* device is reset.
4155 */
4156 priv->cfg->ops->lib->apm_ops.stop(priv);
4157
4158 /* make sure we flush any pending irq or
4159 * tasklet for the driver
4160 */
4161 spin_lock_irqsave(&priv->lock, flags);
4162 iwl_disable_interrupts(priv);
4163 spin_unlock_irqrestore(&priv->lock, flags);
4164
4165 iwl_synchronize_irq(priv);
4166
4167 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4168
4169 cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
4170
4171 iwl3945_dealloc_ucode_pci(priv);
4172
4173 if (priv->rxq.bd)
4174 iwl3945_rx_queue_free(priv, &priv->rxq);
4175 iwl3945_hw_txq_ctx_free(priv);
4176
4177 iwl3945_unset_hw_params(priv);
4178
4179 /*netif_stop_queue(dev); */
4180 flush_workqueue(priv->workqueue);
4181
4182 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4183 * priv->workqueue... so we can't take down the workqueue
4184 * until now... */
4185 destroy_workqueue(priv->workqueue);
4186 priv->workqueue = NULL;
4187 iwl_free_traffic_mem(priv);
4188
4189 free_irq(pdev->irq, priv);
4190 pci_disable_msi(pdev);
4191
4192 pci_iounmap(pdev, priv->hw_base);
4193 pci_release_regions(pdev);
4194 pci_disable_device(pdev);
4195 pci_set_drvdata(pdev, NULL);
4196
4197 iwl_free_channel_map(priv);
4198 iwlcore_free_geos(priv);
4199 kfree(priv->scan_cmd);
4200 if (priv->ibss_beacon)
4201 dev_kfree_skb(priv->ibss_beacon);
4202
4203 ieee80211_free_hw(priv->hw);
4204 }
4205
4206
4207 /*****************************************************************************
4208 *
4209 * driver and module entry point
4210 *
4211 *****************************************************************************/
4212
4213 static struct pci_driver iwl3945_driver = {
4214 .name = DRV_NAME,
4215 .id_table = iwl3945_hw_card_ids,
4216 .probe = iwl3945_pci_probe,
4217 .remove = __devexit_p(iwl3945_pci_remove),
4218 #ifdef CONFIG_PM
4219 .suspend = iwl_pci_suspend,
4220 .resume = iwl_pci_resume,
4221 #endif
4222 };
4223
4224 static int __init iwl3945_init(void)
4225 {
4226
4227 int ret;
4228 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4229 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4230
4231 ret = iwl3945_rate_control_register();
4232 if (ret) {
4233 printk(KERN_ERR DRV_NAME
4234 "Unable to register rate control algorithm: %d\n", ret);
4235 return ret;
4236 }
4237
4238 ret = pci_register_driver(&iwl3945_driver);
4239 if (ret) {
4240 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4241 goto error_register;
4242 }
4243
4244 return ret;
4245
4246 error_register:
4247 iwl3945_rate_control_unregister();
4248 return ret;
4249 }
4250
4251 static void __exit iwl3945_exit(void)
4252 {
4253 pci_unregister_driver(&iwl3945_driver);
4254 iwl3945_rate_control_unregister();
4255 }
4256
4257 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4258
4259 module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
4260 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4261 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
4262 MODULE_PARM_DESC(swcrypto,
4263 "using software crypto (default 1 [software])\n");
4264 #ifdef CONFIG_IWLWIFI_DEBUG
4265 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4266 MODULE_PARM_DESC(debug, "debug output mask");
4267 #endif
4268 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
4269 int, S_IRUGO);
4270 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4271 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
4272 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4273
4274 module_exit(iwl3945_exit);
4275 module_init(iwl3945_init);
Linux kernel - Deliverables
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