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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/slab.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/sched.h>
38 #include <linux/skbuff.h>
39 #include <linux/netdevice.h>
40 #include <linux/wireless.h>
41 #include <linux/firmware.h>
42 #include <linux/etherdevice.h>
43 #include <linux/if_arp.h>
44
45 #include <net/ieee80211_radiotap.h>
46 #include <net/mac80211.h>
47
48 #include <asm/div64.h>
49
50 #define DRV_NAME "iwl3945"
51
52 #include "iwl-fh.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-commands.h"
55 #include "iwl-sta.h"
56 #include "iwl-3945.h"
57 #include "iwl-core.h"
58 #include "iwl-helpers.h"
59 #include "iwl-dev.h"
60 #include "iwl-spectrum.h"
61
62 /*
63 * module name, copyright, version, etc.
64 */
65
66 #define DRV_DESCRIPTION \
67 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 /*
76 * add "s" to indicate spectrum measurement included.
77 * we add it here to be consistent with previous releases in which
78 * this was configurable.
79 */
80 #define DRV_VERSION IWLWIFI_VERSION VD "s"
81 #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
82 #define DRV_AUTHOR "<ilw@linux.intel.com>"
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88
89 /* module parameters */
90 struct iwl_mod_params iwl3945_mod_params = {
91 .sw_crypto = 1,
92 .restart_fw = 1,
93 /* the rest are 0 by default */
94 };
95
96 /**
97 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
98 * @priv: eeprom and antenna fields are used to determine antenna flags
99 *
100 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
101 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
102 *
103 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
104 * IWL_ANTENNA_MAIN - Force MAIN antenna
105 * IWL_ANTENNA_AUX - Force AUX antenna
106 */
107 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
108 {
109 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
110
111 switch (iwl3945_mod_params.antenna) {
112 case IWL_ANTENNA_DIVERSITY:
113 return 0;
114
115 case IWL_ANTENNA_MAIN:
116 if (eeprom->antenna_switch_type)
117 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
118 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
119
120 case IWL_ANTENNA_AUX:
121 if (eeprom->antenna_switch_type)
122 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
123 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
124 }
125
126 /* bad antenna selector value */
127 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
128 iwl3945_mod_params.antenna);
129
130 return 0; /* "diversity" is default if error */
131 }
132
133 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
134 struct ieee80211_key_conf *keyconf,
135 u8 sta_id)
136 {
137 unsigned long flags;
138 __le16 key_flags = 0;
139 int ret;
140
141 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
142 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
143
144 if (sta_id == priv->hw_params.bcast_sta_id)
145 key_flags |= STA_KEY_MULTICAST_MSK;
146
147 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
148 keyconf->hw_key_idx = keyconf->keyidx;
149 key_flags &= ~STA_KEY_FLG_INVALID;
150
151 spin_lock_irqsave(&priv->sta_lock, flags);
152 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
153 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
154 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
155 keyconf->keylen);
156
157 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
158 keyconf->keylen);
159
160 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
161 == STA_KEY_FLG_NO_ENC)
162 priv->stations[sta_id].sta.key.key_offset =
163 iwl_get_free_ucode_key_index(priv);
164 /* else, we are overriding an existing key => no need to allocated room
165 * in uCode. */
166
167 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
168 "no space for a new key");
169
170 priv->stations[sta_id].sta.key.key_flags = key_flags;
171 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
172 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
173
174 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
175
176 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
177
178 spin_unlock_irqrestore(&priv->sta_lock, flags);
179
180 return ret;
181 }
182
183 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
184 struct ieee80211_key_conf *keyconf,
185 u8 sta_id)
186 {
187 return -EOPNOTSUPP;
188 }
189
190 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
191 struct ieee80211_key_conf *keyconf,
192 u8 sta_id)
193 {
194 return -EOPNOTSUPP;
195 }
196
197 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
198 {
199 unsigned long flags;
200
201 spin_lock_irqsave(&priv->sta_lock, flags);
202 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
203 memset(&priv->stations[sta_id].sta.key, 0,
204 sizeof(struct iwl4965_keyinfo));
205 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
206 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
207 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
208 spin_unlock_irqrestore(&priv->sta_lock, flags);
209
210 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
211 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
212 return 0;
213 }
214
215 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
216 struct ieee80211_key_conf *keyconf, u8 sta_id)
217 {
218 int ret = 0;
219
220 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
221
222 switch (keyconf->alg) {
223 case ALG_CCMP:
224 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
225 break;
226 case ALG_TKIP:
227 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
228 break;
229 case ALG_WEP:
230 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
231 break;
232 default:
233 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
234 ret = -EINVAL;
235 }
236
237 IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
238 keyconf->alg, keyconf->keylen, keyconf->keyidx,
239 sta_id, ret);
240
241 return ret;
242 }
243
244 static int iwl3945_remove_static_key(struct iwl_priv *priv)
245 {
246 int ret = -EOPNOTSUPP;
247
248 return ret;
249 }
250
251 static int iwl3945_set_static_key(struct iwl_priv *priv,
252 struct ieee80211_key_conf *key)
253 {
254 if (key->alg == ALG_WEP)
255 return -EOPNOTSUPP;
256
257 IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
258 return -EINVAL;
259 }
260
261 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
262 {
263 struct list_head *element;
264
265 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
266 priv->frames_count);
267
268 while (!list_empty(&priv->free_frames)) {
269 element = priv->free_frames.next;
270 list_del(element);
271 kfree(list_entry(element, struct iwl3945_frame, list));
272 priv->frames_count--;
273 }
274
275 if (priv->frames_count) {
276 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
277 priv->frames_count);
278 priv->frames_count = 0;
279 }
280 }
281
282 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
283 {
284 struct iwl3945_frame *frame;
285 struct list_head *element;
286 if (list_empty(&priv->free_frames)) {
287 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
288 if (!frame) {
289 IWL_ERR(priv, "Could not allocate frame!\n");
290 return NULL;
291 }
292
293 priv->frames_count++;
294 return frame;
295 }
296
297 element = priv->free_frames.next;
298 list_del(element);
299 return list_entry(element, struct iwl3945_frame, list);
300 }
301
302 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
303 {
304 memset(frame, 0, sizeof(*frame));
305 list_add(&frame->list, &priv->free_frames);
306 }
307
308 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
309 struct ieee80211_hdr *hdr,
310 int left)
311 {
312
313 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
314 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
315 (priv->iw_mode != NL80211_IFTYPE_AP)))
316 return 0;
317
318 if (priv->ibss_beacon->len > left)
319 return 0;
320
321 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
322
323 return priv->ibss_beacon->len;
324 }
325
326 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
327 {
328 struct iwl3945_frame *frame;
329 unsigned int frame_size;
330 int rc;
331 u8 rate;
332
333 frame = iwl3945_get_free_frame(priv);
334
335 if (!frame) {
336 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
337 "command.\n");
338 return -ENOMEM;
339 }
340
341 rate = iwl_rate_get_lowest_plcp(priv);
342
343 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
344
345 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
346 &frame->u.cmd[0]);
347
348 iwl3945_free_frame(priv, frame);
349
350 return rc;
351 }
352
353 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
354 {
355 if (priv->_3945.shared_virt)
356 dma_free_coherent(&priv->pci_dev->dev,
357 sizeof(struct iwl3945_shared),
358 priv->_3945.shared_virt,
359 priv->_3945.shared_phys);
360 }
361
362 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
363 struct ieee80211_tx_info *info,
364 struct iwl_device_cmd *cmd,
365 struct sk_buff *skb_frag,
366 int sta_id)
367 {
368 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
369 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
370
371 switch (keyinfo->alg) {
372 case ALG_CCMP:
373 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
374 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
375 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
376 break;
377
378 case ALG_TKIP:
379 break;
380
381 case ALG_WEP:
382 tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
383 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
384
385 if (keyinfo->keylen == 13)
386 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
387
388 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
389
390 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
391 "with key %d\n", info->control.hw_key->hw_key_idx);
392 break;
393
394 default:
395 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
396 break;
397 }
398 }
399
400 /*
401 * handle build REPLY_TX command notification.
402 */
403 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
404 struct iwl_device_cmd *cmd,
405 struct ieee80211_tx_info *info,
406 struct ieee80211_hdr *hdr, u8 std_id)
407 {
408 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
409 __le32 tx_flags = tx_cmd->tx_flags;
410 __le16 fc = hdr->frame_control;
411
412 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
413 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
414 tx_flags |= TX_CMD_FLG_ACK_MSK;
415 if (ieee80211_is_mgmt(fc))
416 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
417 if (ieee80211_is_probe_resp(fc) &&
418 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
419 tx_flags |= TX_CMD_FLG_TSF_MSK;
420 } else {
421 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
422 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
423 }
424
425 tx_cmd->sta_id = std_id;
426 if (ieee80211_has_morefrags(fc))
427 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
428
429 if (ieee80211_is_data_qos(fc)) {
430 u8 *qc = ieee80211_get_qos_ctl(hdr);
431 tx_cmd->tid_tspec = qc[0] & 0xf;
432 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
433 } else {
434 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
435 }
436
437 priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
438
439 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
440 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
441
442 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
443 if (ieee80211_is_mgmt(fc)) {
444 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
445 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
446 else
447 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
448 } else {
449 tx_cmd->timeout.pm_frame_timeout = 0;
450 }
451
452 tx_cmd->driver_txop = 0;
453 tx_cmd->tx_flags = tx_flags;
454 tx_cmd->next_frame_len = 0;
455 }
456
457 /*
458 * start REPLY_TX command process
459 */
460 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
461 {
462 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
463 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
464 struct iwl3945_tx_cmd *tx_cmd;
465 struct iwl_tx_queue *txq = NULL;
466 struct iwl_queue *q = NULL;
467 struct iwl_device_cmd *out_cmd;
468 struct iwl_cmd_meta *out_meta;
469 dma_addr_t phys_addr;
470 dma_addr_t txcmd_phys;
471 int txq_id = skb_get_queue_mapping(skb);
472 u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
473 u8 id;
474 u8 unicast;
475 u8 sta_id;
476 u8 tid = 0;
477 u16 seq_number = 0;
478 __le16 fc;
479 u8 wait_write_ptr = 0;
480 u8 *qc = NULL;
481 unsigned long flags;
482
483 spin_lock_irqsave(&priv->lock, flags);
484 if (iwl_is_rfkill(priv)) {
485 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
486 goto drop_unlock;
487 }
488
489 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
490 IWL_ERR(priv, "ERROR: No TX rate available.\n");
491 goto drop_unlock;
492 }
493
494 unicast = !is_multicast_ether_addr(hdr->addr1);
495 id = 0;
496
497 fc = hdr->frame_control;
498
499 #ifdef CONFIG_IWLWIFI_DEBUG
500 if (ieee80211_is_auth(fc))
501 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
502 else if (ieee80211_is_assoc_req(fc))
503 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
504 else if (ieee80211_is_reassoc_req(fc))
505 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
506 #endif
507
508 spin_unlock_irqrestore(&priv->lock, flags);
509
510 hdr_len = ieee80211_hdrlen(fc);
511
512 /* Find index into station table for destination station */
513 if (!info->control.sta)
514 sta_id = priv->hw_params.bcast_sta_id;
515 else
516 sta_id = iwl_sta_id(info->control.sta);
517 if (sta_id == IWL_INVALID_STATION) {
518 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
519 hdr->addr1);
520 goto drop;
521 }
522
523 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
524
525 if (ieee80211_is_data_qos(fc)) {
526 qc = ieee80211_get_qos_ctl(hdr);
527 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
528 if (unlikely(tid >= MAX_TID_COUNT))
529 goto drop;
530 seq_number = priv->stations[sta_id].tid[tid].seq_number &
531 IEEE80211_SCTL_SEQ;
532 hdr->seq_ctrl = cpu_to_le16(seq_number) |
533 (hdr->seq_ctrl &
534 cpu_to_le16(IEEE80211_SCTL_FRAG));
535 seq_number += 0x10;
536 }
537
538 /* Descriptor for chosen Tx queue */
539 txq = &priv->txq[txq_id];
540 q = &txq->q;
541
542 if ((iwl_queue_space(q) < q->high_mark))
543 goto drop;
544
545 spin_lock_irqsave(&priv->lock, flags);
546
547 idx = get_cmd_index(q, q->write_ptr, 0);
548
549 /* Set up driver data for this TFD */
550 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
551 txq->txb[q->write_ptr].skb[0] = skb;
552
553 /* Init first empty entry in queue's array of Tx/cmd buffers */
554 out_cmd = txq->cmd[idx];
555 out_meta = &txq->meta[idx];
556 tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
557 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
558 memset(tx_cmd, 0, sizeof(*tx_cmd));
559
560 /*
561 * Set up the Tx-command (not MAC!) header.
562 * Store the chosen Tx queue and TFD index within the sequence field;
563 * after Tx, uCode's Tx response will return this value so driver can
564 * locate the frame within the tx queue and do post-tx processing.
565 */
566 out_cmd->hdr.cmd = REPLY_TX;
567 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
568 INDEX_TO_SEQ(q->write_ptr)));
569
570 /* Copy MAC header from skb into command buffer */
571 memcpy(tx_cmd->hdr, hdr, hdr_len);
572
573
574 if (info->control.hw_key)
575 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
576
577 /* TODO need this for burst mode later on */
578 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
579
580 /* set is_hcca to 0; it probably will never be implemented */
581 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
582
583 /* Total # bytes to be transmitted */
584 len = (u16)skb->len;
585 tx_cmd->len = cpu_to_le16(len);
586
587 iwl_dbg_log_tx_data_frame(priv, len, hdr);
588 iwl_update_stats(priv, true, fc, len);
589 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
590 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
591
592 if (!ieee80211_has_morefrags(hdr->frame_control)) {
593 txq->need_update = 1;
594 if (qc)
595 priv->stations[sta_id].tid[tid].seq_number = seq_number;
596 } else {
597 wait_write_ptr = 1;
598 txq->need_update = 0;
599 }
600
601 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
602 le16_to_cpu(out_cmd->hdr.sequence));
603 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
604 iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
605 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
606 ieee80211_hdrlen(fc));
607
608 /*
609 * Use the first empty entry in this queue's command buffer array
610 * to contain the Tx command and MAC header concatenated together
611 * (payload data will be in another buffer).
612 * Size of this varies, due to varying MAC header length.
613 * If end is not dword aligned, we'll have 2 extra bytes at the end
614 * of the MAC header (device reads on dword boundaries).
615 * We'll tell device about this padding later.
616 */
617 len = sizeof(struct iwl3945_tx_cmd) +
618 sizeof(struct iwl_cmd_header) + hdr_len;
619
620 len_org = len;
621 len = (len + 3) & ~3;
622
623 if (len_org != len)
624 len_org = 1;
625 else
626 len_org = 0;
627
628 /* Physical address of this Tx command's header (not MAC header!),
629 * within command buffer array. */
630 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
631 len, PCI_DMA_TODEVICE);
632 /* we do not map meta data ... so we can safely access address to
633 * provide to unmap command*/
634 pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
635 pci_unmap_len_set(out_meta, len, len);
636
637 /* Add buffer containing Tx command and MAC(!) header to TFD's
638 * first entry */
639 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
640 txcmd_phys, len, 1, 0);
641
642
643 /* Set up TFD's 2nd entry to point directly to remainder of skb,
644 * if any (802.11 null frames have no payload). */
645 len = skb->len - hdr_len;
646 if (len) {
647 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
648 len, PCI_DMA_TODEVICE);
649 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
650 phys_addr, len,
651 0, U32_PAD(len));
652 }
653
654
655 /* Tell device the write index *just past* this latest filled TFD */
656 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
657 iwl_txq_update_write_ptr(priv, txq);
658 spin_unlock_irqrestore(&priv->lock, flags);
659
660 if ((iwl_queue_space(q) < q->high_mark)
661 && priv->mac80211_registered) {
662 if (wait_write_ptr) {
663 spin_lock_irqsave(&priv->lock, flags);
664 txq->need_update = 1;
665 iwl_txq_update_write_ptr(priv, txq);
666 spin_unlock_irqrestore(&priv->lock, flags);
667 }
668
669 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
670 }
671
672 return 0;
673
674 drop_unlock:
675 spin_unlock_irqrestore(&priv->lock, flags);
676 drop:
677 return -1;
678 }
679
680 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
681 #define BEACON_TIME_MASK_HIGH 0xFF000000
682 #define TIME_UNIT 1024
683
684 /*
685 * extended beacon time format
686 * time in usec will be changed into a 32-bit value in 8:24 format
687 * the high 1 byte is the beacon counts
688 * the lower 3 bytes is the time in usec within one beacon interval
689 */
690
691 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
692 {
693 u32 quot;
694 u32 rem;
695 u32 interval = beacon_interval * 1024;
696
697 if (!interval || !usec)
698 return 0;
699
700 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
701 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
702
703 return (quot << 24) + rem;
704 }
705
706 /* base is usually what we get from ucode with each received frame,
707 * the same as HW timer counter counting down
708 */
709
710 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
711 {
712 u32 base_low = base & BEACON_TIME_MASK_LOW;
713 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
714 u32 interval = beacon_interval * TIME_UNIT;
715 u32 res = (base & BEACON_TIME_MASK_HIGH) +
716 (addon & BEACON_TIME_MASK_HIGH);
717
718 if (base_low > addon_low)
719 res += base_low - addon_low;
720 else if (base_low < addon_low) {
721 res += interval + base_low - addon_low;
722 res += (1 << 24);
723 } else
724 res += (1 << 24);
725
726 return cpu_to_le32(res);
727 }
728
729 static int iwl3945_get_measurement(struct iwl_priv *priv,
730 struct ieee80211_measurement_params *params,
731 u8 type)
732 {
733 struct iwl_spectrum_cmd spectrum;
734 struct iwl_rx_packet *pkt;
735 struct iwl_host_cmd cmd = {
736 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
737 .data = (void *)&spectrum,
738 .flags = CMD_WANT_SKB,
739 };
740 u32 add_time = le64_to_cpu(params->start_time);
741 int rc;
742 int spectrum_resp_status;
743 int duration = le16_to_cpu(params->duration);
744
745 if (iwl_is_associated(priv))
746 add_time =
747 iwl3945_usecs_to_beacons(
748 le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
749 le16_to_cpu(priv->rxon_timing.beacon_interval));
750
751 memset(&spectrum, 0, sizeof(spectrum));
752
753 spectrum.channel_count = cpu_to_le16(1);
754 spectrum.flags =
755 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
756 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
757 cmd.len = sizeof(spectrum);
758 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
759
760 if (iwl_is_associated(priv))
761 spectrum.start_time =
762 iwl3945_add_beacon_time(priv->_3945.last_beacon_time,
763 add_time,
764 le16_to_cpu(priv->rxon_timing.beacon_interval));
765 else
766 spectrum.start_time = 0;
767
768 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
769 spectrum.channels[0].channel = params->channel;
770 spectrum.channels[0].type = type;
771 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
772 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
773 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
774
775 rc = iwl_send_cmd_sync(priv, &cmd);
776 if (rc)
777 return rc;
778
779 pkt = (struct iwl_rx_packet *)cmd.reply_page;
780 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
781 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
782 rc = -EIO;
783 }
784
785 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
786 switch (spectrum_resp_status) {
787 case 0: /* Command will be handled */
788 if (pkt->u.spectrum.id != 0xff) {
789 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
790 pkt->u.spectrum.id);
791 priv->measurement_status &= ~MEASUREMENT_READY;
792 }
793 priv->measurement_status |= MEASUREMENT_ACTIVE;
794 rc = 0;
795 break;
796
797 case 1: /* Command will not be handled */
798 rc = -EAGAIN;
799 break;
800 }
801
802 iwl_free_pages(priv, cmd.reply_page);
803
804 return rc;
805 }
806
807 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
808 struct iwl_rx_mem_buffer *rxb)
809 {
810 struct iwl_rx_packet *pkt = rxb_addr(rxb);
811 struct iwl_alive_resp *palive;
812 struct delayed_work *pwork;
813
814 palive = &pkt->u.alive_frame;
815
816 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
817 "0x%01X 0x%01X\n",
818 palive->is_valid, palive->ver_type,
819 palive->ver_subtype);
820
821 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
822 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
823 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
824 sizeof(struct iwl_alive_resp));
825 pwork = &priv->init_alive_start;
826 } else {
827 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
828 memcpy(&priv->card_alive, &pkt->u.alive_frame,
829 sizeof(struct iwl_alive_resp));
830 pwork = &priv->alive_start;
831 iwl3945_disable_events(priv);
832 }
833
834 /* We delay the ALIVE response by 5ms to
835 * give the HW RF Kill time to activate... */
836 if (palive->is_valid == UCODE_VALID_OK)
837 queue_delayed_work(priv->workqueue, pwork,
838 msecs_to_jiffies(5));
839 else
840 IWL_WARN(priv, "uCode did not respond OK.\n");
841 }
842
843 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
844 struct iwl_rx_mem_buffer *rxb)
845 {
846 #ifdef CONFIG_IWLWIFI_DEBUG
847 struct iwl_rx_packet *pkt = rxb_addr(rxb);
848 #endif
849
850 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
851 }
852
853 static void iwl3945_bg_beacon_update(struct work_struct *work)
854 {
855 struct iwl_priv *priv =
856 container_of(work, struct iwl_priv, beacon_update);
857 struct sk_buff *beacon;
858
859 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
860 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
861
862 if (!beacon) {
863 IWL_ERR(priv, "update beacon failed\n");
864 return;
865 }
866
867 mutex_lock(&priv->mutex);
868 /* new beacon skb is allocated every time; dispose previous.*/
869 if (priv->ibss_beacon)
870 dev_kfree_skb(priv->ibss_beacon);
871
872 priv->ibss_beacon = beacon;
873 mutex_unlock(&priv->mutex);
874
875 iwl3945_send_beacon_cmd(priv);
876 }
877
878 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
879 struct iwl_rx_mem_buffer *rxb)
880 {
881 #ifdef CONFIG_IWLWIFI_DEBUG
882 struct iwl_rx_packet *pkt = rxb_addr(rxb);
883 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
884 u8 rate = beacon->beacon_notify_hdr.rate;
885
886 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
887 "tsf %d %d rate %d\n",
888 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
889 beacon->beacon_notify_hdr.failure_frame,
890 le32_to_cpu(beacon->ibss_mgr_status),
891 le32_to_cpu(beacon->high_tsf),
892 le32_to_cpu(beacon->low_tsf), rate);
893 #endif
894
895 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
896 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
897 queue_work(priv->workqueue, &priv->beacon_update);
898 }
899
900 /* Handle notification from uCode that card's power state is changing
901 * due to software, hardware, or critical temperature RFKILL */
902 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
903 struct iwl_rx_mem_buffer *rxb)
904 {
905 struct iwl_rx_packet *pkt = rxb_addr(rxb);
906 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
907 unsigned long status = priv->status;
908
909 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
910 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
911 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
912
913 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
914 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
915
916 if (flags & HW_CARD_DISABLED)
917 set_bit(STATUS_RF_KILL_HW, &priv->status);
918 else
919 clear_bit(STATUS_RF_KILL_HW, &priv->status);
920
921
922 iwl_scan_cancel(priv);
923
924 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
925 test_bit(STATUS_RF_KILL_HW, &priv->status)))
926 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
927 test_bit(STATUS_RF_KILL_HW, &priv->status));
928 else
929 wake_up_interruptible(&priv->wait_command_queue);
930 }
931
932 /**
933 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
934 *
935 * Setup the RX handlers for each of the reply types sent from the uCode
936 * to the host.
937 *
938 * This function chains into the hardware specific files for them to setup
939 * any hardware specific handlers as well.
940 */
941 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
942 {
943 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
944 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
945 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
946 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
947 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
948 iwl_rx_spectrum_measure_notif;
949 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
950 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
951 iwl_rx_pm_debug_statistics_notif;
952 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
953
954 /*
955 * The same handler is used for both the REPLY to a discrete
956 * statistics request from the host as well as for the periodic
957 * statistics notifications (after received beacons) from the uCode.
958 */
959 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
960 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
961
962 iwl_setup_rx_scan_handlers(priv);
963 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
964
965 /* Set up hardware specific Rx handlers */
966 iwl3945_hw_rx_handler_setup(priv);
967 }
968
969 /************************** RX-FUNCTIONS ****************************/
970 /*
971 * Rx theory of operation
972 *
973 * The host allocates 32 DMA target addresses and passes the host address
974 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
975 * 0 to 31
976 *
977 * Rx Queue Indexes
978 * The host/firmware share two index registers for managing the Rx buffers.
979 *
980 * The READ index maps to the first position that the firmware may be writing
981 * to -- the driver can read up to (but not including) this position and get
982 * good data.
983 * The READ index is managed by the firmware once the card is enabled.
984 *
985 * The WRITE index maps to the last position the driver has read from -- the
986 * position preceding WRITE is the last slot the firmware can place a packet.
987 *
988 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
989 * WRITE = READ.
990 *
991 * During initialization, the host sets up the READ queue position to the first
992 * INDEX position, and WRITE to the last (READ - 1 wrapped)
993 *
994 * When the firmware places a packet in a buffer, it will advance the READ index
995 * and fire the RX interrupt. The driver can then query the READ index and
996 * process as many packets as possible, moving the WRITE index forward as it
997 * resets the Rx queue buffers with new memory.
998 *
999 * The management in the driver is as follows:
1000 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
1001 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1002 * to replenish the iwl->rxq->rx_free.
1003 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1004 * iwl->rxq is replenished and the READ INDEX is updated (updating the
1005 * 'processed' and 'read' driver indexes as well)
1006 * + A received packet is processed and handed to the kernel network stack,
1007 * detached from the iwl->rxq. The driver 'processed' index is updated.
1008 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1009 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1010 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
1011 * were enough free buffers and RX_STALLED is set it is cleared.
1012 *
1013 *
1014 * Driver sequence:
1015 *
1016 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
1017 * iwl3945_rx_queue_restock
1018 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1019 * queue, updates firmware pointers, and updates
1020 * the WRITE index. If insufficient rx_free buffers
1021 * are available, schedules iwl3945_rx_replenish
1022 *
1023 * -- enable interrupts --
1024 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
1025 * READ INDEX, detaching the SKB from the pool.
1026 * Moves the packet buffer from queue to rx_used.
1027 * Calls iwl3945_rx_queue_restock to refill any empty
1028 * slots.
1029 * ...
1030 *
1031 */
1032
1033 /**
1034 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1035 */
1036 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1037 dma_addr_t dma_addr)
1038 {
1039 return cpu_to_le32((u32)dma_addr);
1040 }
1041
1042 /**
1043 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1044 *
1045 * If there are slots in the RX queue that need to be restocked,
1046 * and we have free pre-allocated buffers, fill the ranks as much
1047 * as we can, pulling from rx_free.
1048 *
1049 * This moves the 'write' index forward to catch up with 'processed', and
1050 * also updates the memory address in the firmware to reference the new
1051 * target buffer.
1052 */
1053 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
1054 {
1055 struct iwl_rx_queue *rxq = &priv->rxq;
1056 struct list_head *element;
1057 struct iwl_rx_mem_buffer *rxb;
1058 unsigned long flags;
1059 int write;
1060
1061 spin_lock_irqsave(&rxq->lock, flags);
1062 write = rxq->write & ~0x7;
1063 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1064 /* Get next free Rx buffer, remove from free list */
1065 element = rxq->rx_free.next;
1066 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1067 list_del(element);
1068
1069 /* Point to Rx buffer via next RBD in circular buffer */
1070 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1071 rxq->queue[rxq->write] = rxb;
1072 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1073 rxq->free_count--;
1074 }
1075 spin_unlock_irqrestore(&rxq->lock, flags);
1076 /* If the pre-allocated buffer pool is dropping low, schedule to
1077 * refill it */
1078 if (rxq->free_count <= RX_LOW_WATERMARK)
1079 queue_work(priv->workqueue, &priv->rx_replenish);
1080
1081
1082 /* If we've added more space for the firmware to place data, tell it.
1083 * Increment device's write pointer in multiples of 8. */
1084 if ((rxq->write_actual != (rxq->write & ~0x7))
1085 || (abs(rxq->write - rxq->read) > 7)) {
1086 spin_lock_irqsave(&rxq->lock, flags);
1087 rxq->need_update = 1;
1088 spin_unlock_irqrestore(&rxq->lock, flags);
1089 iwl_rx_queue_update_write_ptr(priv, rxq);
1090 }
1091 }
1092
1093 /**
1094 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1095 *
1096 * When moving to rx_free an SKB is allocated for the slot.
1097 *
1098 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1099 * This is called as a scheduled work item (except for during initialization)
1100 */
1101 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1102 {
1103 struct iwl_rx_queue *rxq = &priv->rxq;
1104 struct list_head *element;
1105 struct iwl_rx_mem_buffer *rxb;
1106 struct page *page;
1107 unsigned long flags;
1108 gfp_t gfp_mask = priority;
1109
1110 while (1) {
1111 spin_lock_irqsave(&rxq->lock, flags);
1112
1113 if (list_empty(&rxq->rx_used)) {
1114 spin_unlock_irqrestore(&rxq->lock, flags);
1115 return;
1116 }
1117 spin_unlock_irqrestore(&rxq->lock, flags);
1118
1119 if (rxq->free_count > RX_LOW_WATERMARK)
1120 gfp_mask |= __GFP_NOWARN;
1121
1122 if (priv->hw_params.rx_page_order > 0)
1123 gfp_mask |= __GFP_COMP;
1124
1125 /* Alloc a new receive buffer */
1126 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1127 if (!page) {
1128 if (net_ratelimit())
1129 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1130 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1131 net_ratelimit())
1132 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1133 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1134 rxq->free_count);
1135 /* We don't reschedule replenish work here -- we will
1136 * call the restock method and if it still needs
1137 * more buffers it will schedule replenish */
1138 break;
1139 }
1140
1141 spin_lock_irqsave(&rxq->lock, flags);
1142 if (list_empty(&rxq->rx_used)) {
1143 spin_unlock_irqrestore(&rxq->lock, flags);
1144 __free_pages(page, priv->hw_params.rx_page_order);
1145 return;
1146 }
1147 element = rxq->rx_used.next;
1148 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1149 list_del(element);
1150 spin_unlock_irqrestore(&rxq->lock, flags);
1151
1152 rxb->page = page;
1153 /* Get physical address of RB/SKB */
1154 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1155 PAGE_SIZE << priv->hw_params.rx_page_order,
1156 PCI_DMA_FROMDEVICE);
1157
1158 spin_lock_irqsave(&rxq->lock, flags);
1159
1160 list_add_tail(&rxb->list, &rxq->rx_free);
1161 rxq->free_count++;
1162 priv->alloc_rxb_page++;
1163
1164 spin_unlock_irqrestore(&rxq->lock, flags);
1165 }
1166 }
1167
1168 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1169 {
1170 unsigned long flags;
1171 int i;
1172 spin_lock_irqsave(&rxq->lock, flags);
1173 INIT_LIST_HEAD(&rxq->rx_free);
1174 INIT_LIST_HEAD(&rxq->rx_used);
1175 /* Fill the rx_used queue with _all_ of the Rx buffers */
1176 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1177 /* In the reset function, these buffers may have been allocated
1178 * to an SKB, so we need to unmap and free potential storage */
1179 if (rxq->pool[i].page != NULL) {
1180 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1181 PAGE_SIZE << priv->hw_params.rx_page_order,
1182 PCI_DMA_FROMDEVICE);
1183 __iwl_free_pages(priv, rxq->pool[i].page);
1184 rxq->pool[i].page = NULL;
1185 }
1186 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1187 }
1188
1189 /* Set us so that we have processed and used all buffers, but have
1190 * not restocked the Rx queue with fresh buffers */
1191 rxq->read = rxq->write = 0;
1192 rxq->write_actual = 0;
1193 rxq->free_count = 0;
1194 spin_unlock_irqrestore(&rxq->lock, flags);
1195 }
1196
1197 void iwl3945_rx_replenish(void *data)
1198 {
1199 struct iwl_priv *priv = data;
1200 unsigned long flags;
1201
1202 iwl3945_rx_allocate(priv, GFP_KERNEL);
1203
1204 spin_lock_irqsave(&priv->lock, flags);
1205 iwl3945_rx_queue_restock(priv);
1206 spin_unlock_irqrestore(&priv->lock, flags);
1207 }
1208
1209 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1210 {
1211 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1212
1213 iwl3945_rx_queue_restock(priv);
1214 }
1215
1216
1217 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1218 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1219 * This free routine walks the list of POOL entries and if SKB is set to
1220 * non NULL it is unmapped and freed
1221 */
1222 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1223 {
1224 int i;
1225 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1226 if (rxq->pool[i].page != NULL) {
1227 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1228 PAGE_SIZE << priv->hw_params.rx_page_order,
1229 PCI_DMA_FROMDEVICE);
1230 __iwl_free_pages(priv, rxq->pool[i].page);
1231 rxq->pool[i].page = NULL;
1232 }
1233 }
1234
1235 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1236 rxq->dma_addr);
1237 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1238 rxq->rb_stts, rxq->rb_stts_dma);
1239 rxq->bd = NULL;
1240 rxq->rb_stts = NULL;
1241 }
1242
1243
1244 /* Convert linear signal-to-noise ratio into dB */
1245 static u8 ratio2dB[100] = {
1246 /* 0 1 2 3 4 5 6 7 8 9 */
1247 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1248 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1249 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1250 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1251 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1252 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1253 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1254 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1255 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1256 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1257 };
1258
1259 /* Calculates a relative dB value from a ratio of linear
1260 * (i.e. not dB) signal levels.
1261 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1262 int iwl3945_calc_db_from_ratio(int sig_ratio)
1263 {
1264 /* 1000:1 or higher just report as 60 dB */
1265 if (sig_ratio >= 1000)
1266 return 60;
1267
1268 /* 100:1 or higher, divide by 10 and use table,
1269 * add 20 dB to make up for divide by 10 */
1270 if (sig_ratio >= 100)
1271 return 20 + (int)ratio2dB[sig_ratio/10];
1272
1273 /* We shouldn't see this */
1274 if (sig_ratio < 1)
1275 return 0;
1276
1277 /* Use table for ratios 1:1 - 99:1 */
1278 return (int)ratio2dB[sig_ratio];
1279 }
1280
1281 /**
1282 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1283 *
1284 * Uses the priv->rx_handlers callback function array to invoke
1285 * the appropriate handlers, including command responses,
1286 * frame-received notifications, and other notifications.
1287 */
1288 static void iwl3945_rx_handle(struct iwl_priv *priv)
1289 {
1290 struct iwl_rx_mem_buffer *rxb;
1291 struct iwl_rx_packet *pkt;
1292 struct iwl_rx_queue *rxq = &priv->rxq;
1293 u32 r, i;
1294 int reclaim;
1295 unsigned long flags;
1296 u8 fill_rx = 0;
1297 u32 count = 8;
1298 int total_empty = 0;
1299
1300 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1301 * buffer that the driver may process (last buffer filled by ucode). */
1302 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1303 i = rxq->read;
1304
1305 /* calculate total frames need to be restock after handling RX */
1306 total_empty = r - rxq->write_actual;
1307 if (total_empty < 0)
1308 total_empty += RX_QUEUE_SIZE;
1309
1310 if (total_empty > (RX_QUEUE_SIZE / 2))
1311 fill_rx = 1;
1312 /* Rx interrupt, but nothing sent from uCode */
1313 if (i == r)
1314 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1315
1316 while (i != r) {
1317 rxb = rxq->queue[i];
1318
1319 /* If an RXB doesn't have a Rx queue slot associated with it,
1320 * then a bug has been introduced in the queue refilling
1321 * routines -- catch it here */
1322 BUG_ON(rxb == NULL);
1323
1324 rxq->queue[i] = NULL;
1325
1326 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1327 PAGE_SIZE << priv->hw_params.rx_page_order,
1328 PCI_DMA_FROMDEVICE);
1329 pkt = rxb_addr(rxb);
1330
1331 trace_iwlwifi_dev_rx(priv, pkt,
1332 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
1333
1334 /* Reclaim a command buffer only if this packet is a response
1335 * to a (driver-originated) command.
1336 * If the packet (e.g. Rx frame) originated from uCode,
1337 * there is no command buffer to reclaim.
1338 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1339 * but apparently a few don't get set; catch them here. */
1340 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1341 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1342 (pkt->hdr.cmd != REPLY_TX);
1343
1344 /* Based on type of command response or notification,
1345 * handle those that need handling via function in
1346 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1347 if (priv->rx_handlers[pkt->hdr.cmd]) {
1348 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1349 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1350 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1351 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1352 } else {
1353 /* No handling needed */
1354 IWL_DEBUG_RX(priv,
1355 "r %d i %d No handler needed for %s, 0x%02x\n",
1356 r, i, get_cmd_string(pkt->hdr.cmd),
1357 pkt->hdr.cmd);
1358 }
1359
1360 /*
1361 * XXX: After here, we should always check rxb->page
1362 * against NULL before touching it or its virtual
1363 * memory (pkt). Because some rx_handler might have
1364 * already taken or freed the pages.
1365 */
1366
1367 if (reclaim) {
1368 /* Invoke any callbacks, transfer the buffer to caller,
1369 * and fire off the (possibly) blocking iwl_send_cmd()
1370 * as we reclaim the driver command queue */
1371 if (rxb->page)
1372 iwl_tx_cmd_complete(priv, rxb);
1373 else
1374 IWL_WARN(priv, "Claim null rxb?\n");
1375 }
1376
1377 /* Reuse the page if possible. For notification packets and
1378 * SKBs that fail to Rx correctly, add them back into the
1379 * rx_free list for reuse later. */
1380 spin_lock_irqsave(&rxq->lock, flags);
1381 if (rxb->page != NULL) {
1382 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1383 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1384 PCI_DMA_FROMDEVICE);
1385 list_add_tail(&rxb->list, &rxq->rx_free);
1386 rxq->free_count++;
1387 } else
1388 list_add_tail(&rxb->list, &rxq->rx_used);
1389
1390 spin_unlock_irqrestore(&rxq->lock, flags);
1391
1392 i = (i + 1) & RX_QUEUE_MASK;
1393 /* If there are a lot of unused frames,
1394 * restock the Rx queue so ucode won't assert. */
1395 if (fill_rx) {
1396 count++;
1397 if (count >= 8) {
1398 rxq->read = i;
1399 iwl3945_rx_replenish_now(priv);
1400 count = 0;
1401 }
1402 }
1403 }
1404
1405 /* Backtrack one entry */
1406 rxq->read = i;
1407 if (fill_rx)
1408 iwl3945_rx_replenish_now(priv);
1409 else
1410 iwl3945_rx_queue_restock(priv);
1411 }
1412
1413 /* call this function to flush any scheduled tasklet */
1414 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1415 {
1416 /* wait to make sure we flush pending tasklet*/
1417 synchronize_irq(priv->pci_dev->irq);
1418 tasklet_kill(&priv->irq_tasklet);
1419 }
1420
1421 static const char *desc_lookup(int i)
1422 {
1423 switch (i) {
1424 case 1:
1425 return "FAIL";
1426 case 2:
1427 return "BAD_PARAM";
1428 case 3:
1429 return "BAD_CHECKSUM";
1430 case 4:
1431 return "NMI_INTERRUPT";
1432 case 5:
1433 return "SYSASSERT";
1434 case 6:
1435 return "FATAL_ERROR";
1436 }
1437
1438 return "UNKNOWN";
1439 }
1440
1441 #define ERROR_START_OFFSET (1 * sizeof(u32))
1442 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1443
1444 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1445 {
1446 u32 i;
1447 u32 desc, time, count, base, data1;
1448 u32 blink1, blink2, ilink1, ilink2;
1449
1450 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1451
1452 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1453 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1454 return;
1455 }
1456
1457
1458 count = iwl_read_targ_mem(priv, base);
1459
1460 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1461 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1462 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1463 priv->status, count);
1464 }
1465
1466 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1467 "ilink1 nmiPC Line\n");
1468 for (i = ERROR_START_OFFSET;
1469 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1470 i += ERROR_ELEM_SIZE) {
1471 desc = iwl_read_targ_mem(priv, base + i);
1472 time =
1473 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1474 blink1 =
1475 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1476 blink2 =
1477 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1478 ilink1 =
1479 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1480 ilink2 =
1481 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1482 data1 =
1483 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1484
1485 IWL_ERR(priv,
1486 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1487 desc_lookup(desc), desc, time, blink1, blink2,
1488 ilink1, ilink2, data1);
1489 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1490 0, blink1, blink2, ilink1, ilink2);
1491 }
1492 }
1493
1494 #define EVENT_START_OFFSET (6 * sizeof(u32))
1495
1496 /**
1497 * iwl3945_print_event_log - Dump error event log to syslog
1498 *
1499 */
1500 static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1501 u32 num_events, u32 mode,
1502 int pos, char **buf, size_t bufsz)
1503 {
1504 u32 i;
1505 u32 base; /* SRAM byte address of event log header */
1506 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1507 u32 ptr; /* SRAM byte address of log data */
1508 u32 ev, time, data; /* event log data */
1509 unsigned long reg_flags;
1510
1511 if (num_events == 0)
1512 return pos;
1513
1514 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1515
1516 if (mode == 0)
1517 event_size = 2 * sizeof(u32);
1518 else
1519 event_size = 3 * sizeof(u32);
1520
1521 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1522
1523 /* Make sure device is powered up for SRAM reads */
1524 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1525 iwl_grab_nic_access(priv);
1526
1527 /* Set starting address; reads will auto-increment */
1528 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1529 rmb();
1530
1531 /* "time" is actually "data" for mode 0 (no timestamp).
1532 * place event id # at far right for easier visual parsing. */
1533 for (i = 0; i < num_events; i++) {
1534 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1535 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1536 if (mode == 0) {
1537 /* data, ev */
1538 if (bufsz) {
1539 pos += scnprintf(*buf + pos, bufsz - pos,
1540 "0x%08x:%04u\n",
1541 time, ev);
1542 } else {
1543 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1544 trace_iwlwifi_dev_ucode_event(priv, 0,
1545 time, ev);
1546 }
1547 } else {
1548 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1549 if (bufsz) {
1550 pos += scnprintf(*buf + pos, bufsz - pos,
1551 "%010u:0x%08x:%04u\n",
1552 time, data, ev);
1553 } else {
1554 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1555 time, data, ev);
1556 trace_iwlwifi_dev_ucode_event(priv, time,
1557 data, ev);
1558 }
1559 }
1560 }
1561
1562 /* Allow device to power down */
1563 iwl_release_nic_access(priv);
1564 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1565 return pos;
1566 }
1567
1568 /**
1569 * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1570 */
1571 static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1572 u32 num_wraps, u32 next_entry,
1573 u32 size, u32 mode,
1574 int pos, char **buf, size_t bufsz)
1575 {
1576 /*
1577 * display the newest DEFAULT_LOG_ENTRIES entries
1578 * i.e the entries just before the next ont that uCode would fill.
1579 */
1580 if (num_wraps) {
1581 if (next_entry < size) {
1582 pos = iwl3945_print_event_log(priv,
1583 capacity - (size - next_entry),
1584 size - next_entry, mode,
1585 pos, buf, bufsz);
1586 pos = iwl3945_print_event_log(priv, 0,
1587 next_entry, mode,
1588 pos, buf, bufsz);
1589 } else
1590 pos = iwl3945_print_event_log(priv, next_entry - size,
1591 size, mode,
1592 pos, buf, bufsz);
1593 } else {
1594 if (next_entry < size)
1595 pos = iwl3945_print_event_log(priv, 0,
1596 next_entry, mode,
1597 pos, buf, bufsz);
1598 else
1599 pos = iwl3945_print_event_log(priv, next_entry - size,
1600 size, mode,
1601 pos, buf, bufsz);
1602 }
1603 return pos;
1604 }
1605
1606 #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1607
1608 int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1609 char **buf, bool display)
1610 {
1611 u32 base; /* SRAM byte address of event log header */
1612 u32 capacity; /* event log capacity in # entries */
1613 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1614 u32 num_wraps; /* # times uCode wrapped to top of log */
1615 u32 next_entry; /* index of next entry to be written by uCode */
1616 u32 size; /* # entries that we'll print */
1617 int pos = 0;
1618 size_t bufsz = 0;
1619
1620 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1621 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1622 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1623 return -EINVAL;
1624 }
1625
1626 /* event log header */
1627 capacity = iwl_read_targ_mem(priv, base);
1628 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1629 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1630 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1631
1632 if (capacity > priv->cfg->max_event_log_size) {
1633 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1634 capacity, priv->cfg->max_event_log_size);
1635 capacity = priv->cfg->max_event_log_size;
1636 }
1637
1638 if (next_entry > priv->cfg->max_event_log_size) {
1639 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1640 next_entry, priv->cfg->max_event_log_size);
1641 next_entry = priv->cfg->max_event_log_size;
1642 }
1643
1644 size = num_wraps ? capacity : next_entry;
1645
1646 /* bail out if nothing in log */
1647 if (size == 0) {
1648 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1649 return pos;
1650 }
1651
1652 #ifdef CONFIG_IWLWIFI_DEBUG
1653 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1654 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1655 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1656 #else
1657 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1658 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1659 #endif
1660
1661 IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1662 size);
1663
1664 #ifdef CONFIG_IWLWIFI_DEBUG
1665 if (display) {
1666 if (full_log)
1667 bufsz = capacity * 48;
1668 else
1669 bufsz = size * 48;
1670 *buf = kmalloc(bufsz, GFP_KERNEL);
1671 if (!*buf)
1672 return -ENOMEM;
1673 }
1674 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1675 /* if uCode has wrapped back to top of log,
1676 * start at the oldest entry,
1677 * i.e the next one that uCode would fill.
1678 */
1679 if (num_wraps)
1680 pos = iwl3945_print_event_log(priv, next_entry,
1681 capacity - next_entry, mode,
1682 pos, buf, bufsz);
1683
1684 /* (then/else) start at top of log */
1685 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1686 pos, buf, bufsz);
1687 } else
1688 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1689 next_entry, size, mode,
1690 pos, buf, bufsz);
1691 #else
1692 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1693 next_entry, size, mode,
1694 pos, buf, bufsz);
1695 #endif
1696 return pos;
1697 }
1698
1699 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1700 {
1701 u32 inta, handled = 0;
1702 u32 inta_fh;
1703 unsigned long flags;
1704 #ifdef CONFIG_IWLWIFI_DEBUG
1705 u32 inta_mask;
1706 #endif
1707
1708 spin_lock_irqsave(&priv->lock, flags);
1709
1710 /* Ack/clear/reset pending uCode interrupts.
1711 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1712 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1713 inta = iwl_read32(priv, CSR_INT);
1714 iwl_write32(priv, CSR_INT, inta);
1715
1716 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1717 * Any new interrupts that happen after this, either while we're
1718 * in this tasklet, or later, will show up in next ISR/tasklet. */
1719 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1720 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1721
1722 #ifdef CONFIG_IWLWIFI_DEBUG
1723 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1724 /* just for debug */
1725 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1726 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1727 inta, inta_mask, inta_fh);
1728 }
1729 #endif
1730
1731 spin_unlock_irqrestore(&priv->lock, flags);
1732
1733 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1734 * atomic, make sure that inta covers all the interrupts that
1735 * we've discovered, even if FH interrupt came in just after
1736 * reading CSR_INT. */
1737 if (inta_fh & CSR39_FH_INT_RX_MASK)
1738 inta |= CSR_INT_BIT_FH_RX;
1739 if (inta_fh & CSR39_FH_INT_TX_MASK)
1740 inta |= CSR_INT_BIT_FH_TX;
1741
1742 /* Now service all interrupt bits discovered above. */
1743 if (inta & CSR_INT_BIT_HW_ERR) {
1744 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1745
1746 /* Tell the device to stop sending interrupts */
1747 iwl_disable_interrupts(priv);
1748
1749 priv->isr_stats.hw++;
1750 iwl_irq_handle_error(priv);
1751
1752 handled |= CSR_INT_BIT_HW_ERR;
1753
1754 return;
1755 }
1756
1757 #ifdef CONFIG_IWLWIFI_DEBUG
1758 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1759 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1760 if (inta & CSR_INT_BIT_SCD) {
1761 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1762 "the frame/frames.\n");
1763 priv->isr_stats.sch++;
1764 }
1765
1766 /* Alive notification via Rx interrupt will do the real work */
1767 if (inta & CSR_INT_BIT_ALIVE) {
1768 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1769 priv->isr_stats.alive++;
1770 }
1771 }
1772 #endif
1773 /* Safely ignore these bits for debug checks below */
1774 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1775
1776 /* Error detected by uCode */
1777 if (inta & CSR_INT_BIT_SW_ERR) {
1778 IWL_ERR(priv, "Microcode SW error detected. "
1779 "Restarting 0x%X.\n", inta);
1780 priv->isr_stats.sw++;
1781 priv->isr_stats.sw_err = inta;
1782 iwl_irq_handle_error(priv);
1783 handled |= CSR_INT_BIT_SW_ERR;
1784 }
1785
1786 /* uCode wakes up after power-down sleep */
1787 if (inta & CSR_INT_BIT_WAKEUP) {
1788 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1789 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1790 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1791 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1792 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1793 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1794 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1795 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1796
1797 priv->isr_stats.wakeup++;
1798 handled |= CSR_INT_BIT_WAKEUP;
1799 }
1800
1801 /* All uCode command responses, including Tx command responses,
1802 * Rx "responses" (frame-received notification), and other
1803 * notifications from uCode come through here*/
1804 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1805 iwl3945_rx_handle(priv);
1806 priv->isr_stats.rx++;
1807 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1808 }
1809
1810 if (inta & CSR_INT_BIT_FH_TX) {
1811 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1812 priv->isr_stats.tx++;
1813
1814 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1815 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1816 (FH39_SRVC_CHNL), 0x0);
1817 handled |= CSR_INT_BIT_FH_TX;
1818 }
1819
1820 if (inta & ~handled) {
1821 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1822 priv->isr_stats.unhandled++;
1823 }
1824
1825 if (inta & ~priv->inta_mask) {
1826 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1827 inta & ~priv->inta_mask);
1828 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1829 }
1830
1831 /* Re-enable all interrupts */
1832 /* only Re-enable if disabled by irq */
1833 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1834 iwl_enable_interrupts(priv);
1835
1836 #ifdef CONFIG_IWLWIFI_DEBUG
1837 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1838 inta = iwl_read32(priv, CSR_INT);
1839 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1840 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1841 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1842 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1843 }
1844 #endif
1845 }
1846
1847 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1848 enum ieee80211_band band,
1849 u8 is_active, u8 n_probes,
1850 struct iwl3945_scan_channel *scan_ch,
1851 struct ieee80211_vif *vif)
1852 {
1853 struct ieee80211_channel *chan;
1854 const struct ieee80211_supported_band *sband;
1855 const struct iwl_channel_info *ch_info;
1856 u16 passive_dwell = 0;
1857 u16 active_dwell = 0;
1858 int added, i;
1859
1860 sband = iwl_get_hw_mode(priv, band);
1861 if (!sband)
1862 return 0;
1863
1864 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1865 passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1866
1867 if (passive_dwell <= active_dwell)
1868 passive_dwell = active_dwell + 1;
1869
1870 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1871 chan = priv->scan_request->channels[i];
1872
1873 if (chan->band != band)
1874 continue;
1875
1876 scan_ch->channel = chan->hw_value;
1877
1878 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1879 if (!is_channel_valid(ch_info)) {
1880 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1881 scan_ch->channel);
1882 continue;
1883 }
1884
1885 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1886 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1887 /* If passive , set up for auto-switch
1888 * and use long active_dwell time.
1889 */
1890 if (!is_active || is_channel_passive(ch_info) ||
1891 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1892 scan_ch->type = 0; /* passive */
1893 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1894 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1895 } else {
1896 scan_ch->type = 1; /* active */
1897 }
1898
1899 /* Set direct probe bits. These may be used both for active
1900 * scan channels (probes gets sent right away),
1901 * or for passive channels (probes get se sent only after
1902 * hearing clear Rx packet).*/
1903 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1904 if (n_probes)
1905 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1906 } else {
1907 /* uCode v1 does not allow setting direct probe bits on
1908 * passive channel. */
1909 if ((scan_ch->type & 1) && n_probes)
1910 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1911 }
1912
1913 /* Set txpower levels to defaults */
1914 scan_ch->tpc.dsp_atten = 110;
1915 /* scan_pwr_info->tpc.dsp_atten; */
1916
1917 /*scan_pwr_info->tpc.tx_gain; */
1918 if (band == IEEE80211_BAND_5GHZ)
1919 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1920 else {
1921 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1922 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1923 * power level:
1924 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1925 */
1926 }
1927
1928 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1929 scan_ch->channel,
1930 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1931 (scan_ch->type & 1) ?
1932 active_dwell : passive_dwell);
1933
1934 scan_ch++;
1935 added++;
1936 }
1937
1938 IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1939 return added;
1940 }
1941
1942 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1943 struct ieee80211_rate *rates)
1944 {
1945 int i;
1946
1947 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1948 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1949 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1950 rates[i].hw_value_short = i;
1951 rates[i].flags = 0;
1952 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1953 /*
1954 * If CCK != 1M then set short preamble rate flag.
1955 */
1956 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1957 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1958 }
1959 }
1960 }
1961
1962 /******************************************************************************
1963 *
1964 * uCode download functions
1965 *
1966 ******************************************************************************/
1967
1968 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1969 {
1970 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1971 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1972 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1973 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1974 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1975 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1976 }
1977
1978 /**
1979 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1980 * looking at all data.
1981 */
1982 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1983 {
1984 u32 val;
1985 u32 save_len = len;
1986 int rc = 0;
1987 u32 errcnt;
1988
1989 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1990
1991 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1992 IWL39_RTC_INST_LOWER_BOUND);
1993
1994 errcnt = 0;
1995 for (; len > 0; len -= sizeof(u32), image++) {
1996 /* read data comes through single port, auto-incr addr */
1997 /* NOTE: Use the debugless read so we don't flood kernel log
1998 * if IWL_DL_IO is set */
1999 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2000 if (val != le32_to_cpu(*image)) {
2001 IWL_ERR(priv, "uCode INST section is invalid at "
2002 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2003 save_len - len, val, le32_to_cpu(*image));
2004 rc = -EIO;
2005 errcnt++;
2006 if (errcnt >= 20)
2007 break;
2008 }
2009 }
2010
2011
2012 if (!errcnt)
2013 IWL_DEBUG_INFO(priv,
2014 "ucode image in INSTRUCTION memory is good\n");
2015
2016 return rc;
2017 }
2018
2019
2020 /**
2021 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
2022 * using sample data 100 bytes apart. If these sample points are good,
2023 * it's a pretty good bet that everything between them is good, too.
2024 */
2025 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
2026 {
2027 u32 val;
2028 int rc = 0;
2029 u32 errcnt = 0;
2030 u32 i;
2031
2032 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
2033
2034 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
2035 /* read data comes through single port, auto-incr addr */
2036 /* NOTE: Use the debugless read so we don't flood kernel log
2037 * if IWL_DL_IO is set */
2038 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2039 i + IWL39_RTC_INST_LOWER_BOUND);
2040 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2041 if (val != le32_to_cpu(*image)) {
2042 #if 0 /* Enable this if you want to see details */
2043 IWL_ERR(priv, "uCode INST section is invalid at "
2044 "offset 0x%x, is 0x%x, s/b 0x%x\n",
2045 i, val, *image);
2046 #endif
2047 rc = -EIO;
2048 errcnt++;
2049 if (errcnt >= 3)
2050 break;
2051 }
2052 }
2053
2054 return rc;
2055 }
2056
2057
2058 /**
2059 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2060 * and verify its contents
2061 */
2062 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2063 {
2064 __le32 *image;
2065 u32 len;
2066 int rc = 0;
2067
2068 /* Try bootstrap */
2069 image = (__le32 *)priv->ucode_boot.v_addr;
2070 len = priv->ucode_boot.len;
2071 rc = iwl3945_verify_inst_sparse(priv, image, len);
2072 if (rc == 0) {
2073 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2074 return 0;
2075 }
2076
2077 /* Try initialize */
2078 image = (__le32 *)priv->ucode_init.v_addr;
2079 len = priv->ucode_init.len;
2080 rc = iwl3945_verify_inst_sparse(priv, image, len);
2081 if (rc == 0) {
2082 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2083 return 0;
2084 }
2085
2086 /* Try runtime/protocol */
2087 image = (__le32 *)priv->ucode_code.v_addr;
2088 len = priv->ucode_code.len;
2089 rc = iwl3945_verify_inst_sparse(priv, image, len);
2090 if (rc == 0) {
2091 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2092 return 0;
2093 }
2094
2095 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2096
2097 /* Since nothing seems to match, show first several data entries in
2098 * instruction SRAM, so maybe visual inspection will give a clue.
2099 * Selection of bootstrap image (vs. other images) is arbitrary. */
2100 image = (__le32 *)priv->ucode_boot.v_addr;
2101 len = priv->ucode_boot.len;
2102 rc = iwl3945_verify_inst_full(priv, image, len);
2103
2104 return rc;
2105 }
2106
2107 static void iwl3945_nic_start(struct iwl_priv *priv)
2108 {
2109 /* Remove all resets to allow NIC to operate */
2110 iwl_write32(priv, CSR_RESET, 0);
2111 }
2112
2113 #define IWL3945_UCODE_GET(item) \
2114 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
2115 { \
2116 return le32_to_cpu(ucode->u.v1.item); \
2117 }
2118
2119 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
2120 {
2121 return 24;
2122 }
2123
2124 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
2125 {
2126 return (u8 *) ucode->u.v1.data;
2127 }
2128
2129 IWL3945_UCODE_GET(inst_size);
2130 IWL3945_UCODE_GET(data_size);
2131 IWL3945_UCODE_GET(init_size);
2132 IWL3945_UCODE_GET(init_data_size);
2133 IWL3945_UCODE_GET(boot_size);
2134
2135 /**
2136 * iwl3945_read_ucode - Read uCode images from disk file.
2137 *
2138 * Copy into buffers for card to fetch via bus-mastering
2139 */
2140 static int iwl3945_read_ucode(struct iwl_priv *priv)
2141 {
2142 const struct iwl_ucode_header *ucode;
2143 int ret = -EINVAL, index;
2144 const struct firmware *ucode_raw;
2145 /* firmware file name contains uCode/driver compatibility version */
2146 const char *name_pre = priv->cfg->fw_name_pre;
2147 const unsigned int api_max = priv->cfg->ucode_api_max;
2148 const unsigned int api_min = priv->cfg->ucode_api_min;
2149 char buf[25];
2150 u8 *src;
2151 size_t len;
2152 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2153
2154 /* Ask kernel firmware_class module to get the boot firmware off disk.
2155 * request_firmware() is synchronous, file is in memory on return. */
2156 for (index = api_max; index >= api_min; index--) {
2157 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2158 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2159 if (ret < 0) {
2160 IWL_ERR(priv, "%s firmware file req failed: %d\n",
2161 buf, ret);
2162 if (ret == -ENOENT)
2163 continue;
2164 else
2165 goto error;
2166 } else {
2167 if (index < api_max)
2168 IWL_ERR(priv, "Loaded firmware %s, "
2169 "which is deprecated. "
2170 " Please use API v%u instead.\n",
2171 buf, api_max);
2172 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2173 "(%zd bytes) from disk\n",
2174 buf, ucode_raw->size);
2175 break;
2176 }
2177 }
2178
2179 if (ret < 0)
2180 goto error;
2181
2182 /* Make sure that we got at least our header! */
2183 if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) {
2184 IWL_ERR(priv, "File size way too small!\n");
2185 ret = -EINVAL;
2186 goto err_release;
2187 }
2188
2189 /* Data from ucode file: header followed by uCode images */
2190 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2191
2192 priv->ucode_ver = le32_to_cpu(ucode->ver);
2193 api_ver = IWL_UCODE_API(priv->ucode_ver);
2194 inst_size = iwl3945_ucode_get_inst_size(ucode);
2195 data_size = iwl3945_ucode_get_data_size(ucode);
2196 init_size = iwl3945_ucode_get_init_size(ucode);
2197 init_data_size = iwl3945_ucode_get_init_data_size(ucode);
2198 boot_size = iwl3945_ucode_get_boot_size(ucode);
2199 src = iwl3945_ucode_get_data(ucode);
2200
2201 /* api_ver should match the api version forming part of the
2202 * firmware filename ... but we don't check for that and only rely
2203 * on the API version read from firmware header from here on forward */
2204
2205 if (api_ver < api_min || api_ver > api_max) {
2206 IWL_ERR(priv, "Driver unable to support your firmware API. "
2207 "Driver supports v%u, firmware is v%u.\n",
2208 api_max, api_ver);
2209 priv->ucode_ver = 0;
2210 ret = -EINVAL;
2211 goto err_release;
2212 }
2213 if (api_ver != api_max)
2214 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2215 "got %u. New firmware can be obtained "
2216 "from http://www.intellinuxwireless.org.\n",
2217 api_max, api_ver);
2218
2219 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2220 IWL_UCODE_MAJOR(priv->ucode_ver),
2221 IWL_UCODE_MINOR(priv->ucode_ver),
2222 IWL_UCODE_API(priv->ucode_ver),
2223 IWL_UCODE_SERIAL(priv->ucode_ver));
2224
2225 snprintf(priv->hw->wiphy->fw_version,
2226 sizeof(priv->hw->wiphy->fw_version),
2227 "%u.%u.%u.%u",
2228 IWL_UCODE_MAJOR(priv->ucode_ver),
2229 IWL_UCODE_MINOR(priv->ucode_ver),
2230 IWL_UCODE_API(priv->ucode_ver),
2231 IWL_UCODE_SERIAL(priv->ucode_ver));
2232
2233 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2234 priv->ucode_ver);
2235 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2236 inst_size);
2237 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2238 data_size);
2239 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2240 init_size);
2241 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2242 init_data_size);
2243 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2244 boot_size);
2245
2246
2247 /* Verify size of file vs. image size info in file's header */
2248 if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
2249 inst_size + data_size + init_size +
2250 init_data_size + boot_size) {
2251
2252 IWL_DEBUG_INFO(priv,
2253 "uCode file size %zd does not match expected size\n",
2254 ucode_raw->size);
2255 ret = -EINVAL;
2256 goto err_release;
2257 }
2258
2259 /* Verify that uCode images will fit in card's SRAM */
2260 if (inst_size > IWL39_MAX_INST_SIZE) {
2261 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2262 inst_size);
2263 ret = -EINVAL;
2264 goto err_release;
2265 }
2266
2267 if (data_size > IWL39_MAX_DATA_SIZE) {
2268 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2269 data_size);
2270 ret = -EINVAL;
2271 goto err_release;
2272 }
2273 if (init_size > IWL39_MAX_INST_SIZE) {
2274 IWL_DEBUG_INFO(priv,
2275 "uCode init instr len %d too large to fit in\n",
2276 init_size);
2277 ret = -EINVAL;
2278 goto err_release;
2279 }
2280 if (init_data_size > IWL39_MAX_DATA_SIZE) {
2281 IWL_DEBUG_INFO(priv,
2282 "uCode init data len %d too large to fit in\n",
2283 init_data_size);
2284 ret = -EINVAL;
2285 goto err_release;
2286 }
2287 if (boot_size > IWL39_MAX_BSM_SIZE) {
2288 IWL_DEBUG_INFO(priv,
2289 "uCode boot instr len %d too large to fit in\n",
2290 boot_size);
2291 ret = -EINVAL;
2292 goto err_release;
2293 }
2294
2295 /* Allocate ucode buffers for card's bus-master loading ... */
2296
2297 /* Runtime instructions and 2 copies of data:
2298 * 1) unmodified from disk
2299 * 2) backup cache for save/restore during power-downs */
2300 priv->ucode_code.len = inst_size;
2301 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2302
2303 priv->ucode_data.len = data_size;
2304 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2305
2306 priv->ucode_data_backup.len = data_size;
2307 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2308
2309 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2310 !priv->ucode_data_backup.v_addr)
2311 goto err_pci_alloc;
2312
2313 /* Initialization instructions and data */
2314 if (init_size && init_data_size) {
2315 priv->ucode_init.len = init_size;
2316 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2317
2318 priv->ucode_init_data.len = init_data_size;
2319 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2320
2321 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2322 goto err_pci_alloc;
2323 }
2324
2325 /* Bootstrap (instructions only, no data) */
2326 if (boot_size) {
2327 priv->ucode_boot.len = boot_size;
2328 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2329
2330 if (!priv->ucode_boot.v_addr)
2331 goto err_pci_alloc;
2332 }
2333
2334 /* Copy images into buffers for card's bus-master reads ... */
2335
2336 /* Runtime instructions (first block of data in file) */
2337 len = inst_size;
2338 IWL_DEBUG_INFO(priv,
2339 "Copying (but not loading) uCode instr len %zd\n", len);
2340 memcpy(priv->ucode_code.v_addr, src, len);
2341 src += len;
2342
2343 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2344 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2345
2346 /* Runtime data (2nd block)
2347 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2348 len = data_size;
2349 IWL_DEBUG_INFO(priv,
2350 "Copying (but not loading) uCode data len %zd\n", len);
2351 memcpy(priv->ucode_data.v_addr, src, len);
2352 memcpy(priv->ucode_data_backup.v_addr, src, len);
2353 src += len;
2354
2355 /* Initialization instructions (3rd block) */
2356 if (init_size) {
2357 len = init_size;
2358 IWL_DEBUG_INFO(priv,
2359 "Copying (but not loading) init instr len %zd\n", len);
2360 memcpy(priv->ucode_init.v_addr, src, len);
2361 src += len;
2362 }
2363
2364 /* Initialization data (4th block) */
2365 if (init_data_size) {
2366 len = init_data_size;
2367 IWL_DEBUG_INFO(priv,
2368 "Copying (but not loading) init data len %zd\n", len);
2369 memcpy(priv->ucode_init_data.v_addr, src, len);
2370 src += len;
2371 }
2372
2373 /* Bootstrap instructions (5th block) */
2374 len = boot_size;
2375 IWL_DEBUG_INFO(priv,
2376 "Copying (but not loading) boot instr len %zd\n", len);
2377 memcpy(priv->ucode_boot.v_addr, src, len);
2378
2379 /* We have our copies now, allow OS release its copies */
2380 release_firmware(ucode_raw);
2381 return 0;
2382
2383 err_pci_alloc:
2384 IWL_ERR(priv, "failed to allocate pci memory\n");
2385 ret = -ENOMEM;
2386 iwl3945_dealloc_ucode_pci(priv);
2387
2388 err_release:
2389 release_firmware(ucode_raw);
2390
2391 error:
2392 return ret;
2393 }
2394
2395
2396 /**
2397 * iwl3945_set_ucode_ptrs - Set uCode address location
2398 *
2399 * Tell initialization uCode where to find runtime uCode.
2400 *
2401 * BSM registers initially contain pointers to initialization uCode.
2402 * We need to replace them to load runtime uCode inst and data,
2403 * and to save runtime data when powering down.
2404 */
2405 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2406 {
2407 dma_addr_t pinst;
2408 dma_addr_t pdata;
2409
2410 /* bits 31:0 for 3945 */
2411 pinst = priv->ucode_code.p_addr;
2412 pdata = priv->ucode_data_backup.p_addr;
2413
2414 /* Tell bootstrap uCode where to find image to load */
2415 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2416 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2417 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2418 priv->ucode_data.len);
2419
2420 /* Inst byte count must be last to set up, bit 31 signals uCode
2421 * that all new ptr/size info is in place */
2422 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2423 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2424
2425 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2426
2427 return 0;
2428 }
2429
2430 /**
2431 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2432 *
2433 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2434 *
2435 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2436 */
2437 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2438 {
2439 /* Check alive response for "valid" sign from uCode */
2440 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2441 /* We had an error bringing up the hardware, so take it
2442 * all the way back down so we can try again */
2443 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2444 goto restart;
2445 }
2446
2447 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2448 * This is a paranoid check, because we would not have gotten the
2449 * "initialize" alive if code weren't properly loaded. */
2450 if (iwl3945_verify_ucode(priv)) {
2451 /* Runtime instruction load was bad;
2452 * take it all the way back down so we can try again */
2453 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2454 goto restart;
2455 }
2456
2457 /* Send pointers to protocol/runtime uCode image ... init code will
2458 * load and launch runtime uCode, which will send us another "Alive"
2459 * notification. */
2460 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2461 if (iwl3945_set_ucode_ptrs(priv)) {
2462 /* Runtime instruction load won't happen;
2463 * take it all the way back down so we can try again */
2464 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2465 goto restart;
2466 }
2467 return;
2468
2469 restart:
2470 queue_work(priv->workqueue, &priv->restart);
2471 }
2472
2473 /**
2474 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2475 * from protocol/runtime uCode (initialization uCode's
2476 * Alive gets handled by iwl3945_init_alive_start()).
2477 */
2478 static void iwl3945_alive_start(struct iwl_priv *priv)
2479 {
2480 int thermal_spin = 0;
2481 u32 rfkill;
2482
2483 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2484
2485 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2486 /* We had an error bringing up the hardware, so take it
2487 * all the way back down so we can try again */
2488 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2489 goto restart;
2490 }
2491
2492 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2493 * This is a paranoid check, because we would not have gotten the
2494 * "runtime" alive if code weren't properly loaded. */
2495 if (iwl3945_verify_ucode(priv)) {
2496 /* Runtime instruction load was bad;
2497 * take it all the way back down so we can try again */
2498 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2499 goto restart;
2500 }
2501
2502 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2503 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2504
2505 if (rfkill & 0x1) {
2506 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2507 /* if RFKILL is not on, then wait for thermal
2508 * sensor in adapter to kick in */
2509 while (iwl3945_hw_get_temperature(priv) == 0) {
2510 thermal_spin++;
2511 udelay(10);
2512 }
2513
2514 if (thermal_spin)
2515 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2516 thermal_spin * 10);
2517 } else
2518 set_bit(STATUS_RF_KILL_HW, &priv->status);
2519
2520 /* After the ALIVE response, we can send commands to 3945 uCode */
2521 set_bit(STATUS_ALIVE, &priv->status);
2522
2523 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2524 /* Enable timer to monitor the driver queues */
2525 mod_timer(&priv->monitor_recover,
2526 jiffies +
2527 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2528 }
2529
2530 if (iwl_is_rfkill(priv))
2531 return;
2532
2533 ieee80211_wake_queues(priv->hw);
2534
2535 priv->active_rate = IWL_RATES_MASK;
2536
2537 iwl_power_update_mode(priv, true);
2538
2539 if (iwl_is_associated(priv)) {
2540 struct iwl3945_rxon_cmd *active_rxon =
2541 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2542
2543 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2544 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2545 } else {
2546 /* Initialize our rx_config data */
2547 iwl_connection_init_rx_config(priv, NULL);
2548 }
2549
2550 /* Configure Bluetooth device coexistence support */
2551 priv->cfg->ops->hcmd->send_bt_config(priv);
2552
2553 /* Configure the adapter for unassociated operation */
2554 iwlcore_commit_rxon(priv);
2555
2556 iwl3945_reg_txpower_periodic(priv);
2557
2558 iwl_leds_init(priv);
2559
2560 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2561 set_bit(STATUS_READY, &priv->status);
2562 wake_up_interruptible(&priv->wait_command_queue);
2563
2564 return;
2565
2566 restart:
2567 queue_work(priv->workqueue, &priv->restart);
2568 }
2569
2570 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2571
2572 static void __iwl3945_down(struct iwl_priv *priv)
2573 {
2574 unsigned long flags;
2575 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2576 struct ieee80211_conf *conf = NULL;
2577
2578 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2579
2580 conf = ieee80211_get_hw_conf(priv->hw);
2581
2582 if (!exit_pending)
2583 set_bit(STATUS_EXIT_PENDING, &priv->status);
2584
2585 /* Station information will now be cleared in device */
2586 iwl_clear_ucode_stations(priv);
2587 iwl_dealloc_bcast_station(priv);
2588 iwl_clear_driver_stations(priv);
2589
2590 /* Unblock any waiting calls */
2591 wake_up_interruptible_all(&priv->wait_command_queue);
2592
2593 /* Wipe out the EXIT_PENDING status bit if we are not actually
2594 * exiting the module */
2595 if (!exit_pending)
2596 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2597
2598 /* stop and reset the on-board processor */
2599 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2600
2601 /* tell the device to stop sending interrupts */
2602 spin_lock_irqsave(&priv->lock, flags);
2603 iwl_disable_interrupts(priv);
2604 spin_unlock_irqrestore(&priv->lock, flags);
2605 iwl_synchronize_irq(priv);
2606
2607 if (priv->mac80211_registered)
2608 ieee80211_stop_queues(priv->hw);
2609
2610 /* If we have not previously called iwl3945_init() then
2611 * clear all bits but the RF Kill bits and return */
2612 if (!iwl_is_init(priv)) {
2613 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2614 STATUS_RF_KILL_HW |
2615 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2616 STATUS_GEO_CONFIGURED |
2617 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2618 STATUS_EXIT_PENDING;
2619 goto exit;
2620 }
2621
2622 /* ...otherwise clear out all the status bits but the RF Kill
2623 * bit and continue taking the NIC down. */
2624 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2625 STATUS_RF_KILL_HW |
2626 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2627 STATUS_GEO_CONFIGURED |
2628 test_bit(STATUS_FW_ERROR, &priv->status) <<
2629 STATUS_FW_ERROR |
2630 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2631 STATUS_EXIT_PENDING;
2632
2633 iwl3945_hw_txq_ctx_stop(priv);
2634 iwl3945_hw_rxq_stop(priv);
2635
2636 /* Power-down device's busmaster DMA clocks */
2637 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2638 udelay(5);
2639
2640 /* Stop the device, and put it in low power state */
2641 priv->cfg->ops->lib->apm_ops.stop(priv);
2642
2643 exit:
2644 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2645
2646 if (priv->ibss_beacon)
2647 dev_kfree_skb(priv->ibss_beacon);
2648 priv->ibss_beacon = NULL;
2649
2650 /* clear out any free frames */
2651 iwl3945_clear_free_frames(priv);
2652 }
2653
2654 static void iwl3945_down(struct iwl_priv *priv)
2655 {
2656 mutex_lock(&priv->mutex);
2657 __iwl3945_down(priv);
2658 mutex_unlock(&priv->mutex);
2659
2660 iwl3945_cancel_deferred_work(priv);
2661 }
2662
2663 #define MAX_HW_RESTARTS 5
2664
2665 static int __iwl3945_up(struct iwl_priv *priv)
2666 {
2667 int rc, i;
2668
2669 rc = iwl_alloc_bcast_station(priv, false);
2670 if (rc)
2671 return rc;
2672
2673 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2674 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2675 return -EIO;
2676 }
2677
2678 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2679 IWL_ERR(priv, "ucode not available for device bring up\n");
2680 return -EIO;
2681 }
2682
2683 /* If platform's RF_KILL switch is NOT set to KILL */
2684 if (iwl_read32(priv, CSR_GP_CNTRL) &
2685 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2686 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2687 else {
2688 set_bit(STATUS_RF_KILL_HW, &priv->status);
2689 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2690 return -ENODEV;
2691 }
2692
2693 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2694
2695 rc = iwl3945_hw_nic_init(priv);
2696 if (rc) {
2697 IWL_ERR(priv, "Unable to int nic\n");
2698 return rc;
2699 }
2700
2701 /* make sure rfkill handshake bits are cleared */
2702 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2703 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2704 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2705
2706 /* clear (again), then enable host interrupts */
2707 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2708 iwl_enable_interrupts(priv);
2709
2710 /* really make sure rfkill handshake bits are cleared */
2711 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2712 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2713
2714 /* Copy original ucode data image from disk into backup cache.
2715 * This will be used to initialize the on-board processor's
2716 * data SRAM for a clean start when the runtime program first loads. */
2717 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2718 priv->ucode_data.len);
2719
2720 /* We return success when we resume from suspend and rf_kill is on. */
2721 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2722 return 0;
2723
2724 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2725
2726 /* load bootstrap state machine,
2727 * load bootstrap program into processor's memory,
2728 * prepare to load the "initialize" uCode */
2729 rc = priv->cfg->ops->lib->load_ucode(priv);
2730
2731 if (rc) {
2732 IWL_ERR(priv,
2733 "Unable to set up bootstrap uCode: %d\n", rc);
2734 continue;
2735 }
2736
2737 /* start card; "initialize" will load runtime ucode */
2738 iwl3945_nic_start(priv);
2739
2740 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2741
2742 return 0;
2743 }
2744
2745 set_bit(STATUS_EXIT_PENDING, &priv->status);
2746 __iwl3945_down(priv);
2747 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2748
2749 /* tried to restart and config the device for as long as our
2750 * patience could withstand */
2751 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2752 return -EIO;
2753 }
2754
2755
2756 /*****************************************************************************
2757 *
2758 * Workqueue callbacks
2759 *
2760 *****************************************************************************/
2761
2762 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2763 {
2764 struct iwl_priv *priv =
2765 container_of(data, struct iwl_priv, init_alive_start.work);
2766
2767 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2768 return;
2769
2770 mutex_lock(&priv->mutex);
2771 iwl3945_init_alive_start(priv);
2772 mutex_unlock(&priv->mutex);
2773 }
2774
2775 static void iwl3945_bg_alive_start(struct work_struct *data)
2776 {
2777 struct iwl_priv *priv =
2778 container_of(data, struct iwl_priv, alive_start.work);
2779
2780 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2781 return;
2782
2783 mutex_lock(&priv->mutex);
2784 iwl3945_alive_start(priv);
2785 mutex_unlock(&priv->mutex);
2786 }
2787
2788 /*
2789 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2790 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2791 * *is* readable even when device has been SW_RESET into low power mode
2792 * (e.g. during RF KILL).
2793 */
2794 static void iwl3945_rfkill_poll(struct work_struct *data)
2795 {
2796 struct iwl_priv *priv =
2797 container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2798 bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2799 bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2800 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2801
2802 if (new_rfkill != old_rfkill) {
2803 if (new_rfkill)
2804 set_bit(STATUS_RF_KILL_HW, &priv->status);
2805 else
2806 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2807
2808 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2809
2810 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2811 new_rfkill ? "disable radio" : "enable radio");
2812 }
2813
2814 /* Keep this running, even if radio now enabled. This will be
2815 * cancelled in mac_start() if system decides to start again */
2816 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2817 round_jiffies_relative(2 * HZ));
2818
2819 }
2820
2821 void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
2822 {
2823 struct iwl_host_cmd cmd = {
2824 .id = REPLY_SCAN_CMD,
2825 .len = sizeof(struct iwl3945_scan_cmd),
2826 .flags = CMD_SIZE_HUGE,
2827 };
2828 struct iwl3945_scan_cmd *scan;
2829 struct ieee80211_conf *conf = NULL;
2830 u8 n_probes = 0;
2831 enum ieee80211_band band;
2832 bool is_active = false;
2833
2834 conf = ieee80211_get_hw_conf(priv->hw);
2835
2836 cancel_delayed_work(&priv->scan_check);
2837
2838 if (!iwl_is_ready(priv)) {
2839 IWL_WARN(priv, "request scan called when driver not ready.\n");
2840 goto done;
2841 }
2842
2843 /* Make sure the scan wasn't canceled before this queued work
2844 * was given the chance to run... */
2845 if (!test_bit(STATUS_SCANNING, &priv->status))
2846 goto done;
2847
2848 /* This should never be called or scheduled if there is currently
2849 * a scan active in the hardware. */
2850 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2851 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
2852 "Ignoring second request.\n");
2853 goto done;
2854 }
2855
2856 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2857 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2858 goto done;
2859 }
2860
2861 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2862 IWL_DEBUG_HC(priv,
2863 "Scan request while abort pending. Queuing.\n");
2864 goto done;
2865 }
2866
2867 if (iwl_is_rfkill(priv)) {
2868 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2869 goto done;
2870 }
2871
2872 if (!test_bit(STATUS_READY, &priv->status)) {
2873 IWL_DEBUG_HC(priv,
2874 "Scan request while uninitialized. Queuing.\n");
2875 goto done;
2876 }
2877
2878 if (!priv->scan_cmd) {
2879 priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2880 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2881 if (!priv->scan_cmd) {
2882 IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2883 goto done;
2884 }
2885 }
2886 scan = priv->scan_cmd;
2887 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2888
2889 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2890 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2891
2892 if (iwl_is_associated(priv)) {
2893 u16 interval = 0;
2894 u32 extra;
2895 u32 suspend_time = 100;
2896 u32 scan_suspend_time = 100;
2897 unsigned long flags;
2898
2899 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2900
2901 spin_lock_irqsave(&priv->lock, flags);
2902 interval = vif ? vif->bss_conf.beacon_int : 0;
2903 spin_unlock_irqrestore(&priv->lock, flags);
2904
2905 scan->suspend_time = 0;
2906 scan->max_out_time = cpu_to_le32(200 * 1024);
2907 if (!interval)
2908 interval = suspend_time;
2909 /*
2910 * suspend time format:
2911 * 0-19: beacon interval in usec (time before exec.)
2912 * 20-23: 0
2913 * 24-31: number of beacons (suspend between channels)
2914 */
2915
2916 extra = (suspend_time / interval) << 24;
2917 scan_suspend_time = 0xFF0FFFFF &
2918 (extra | ((suspend_time % interval) * 1024));
2919
2920 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2921 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2922 scan_suspend_time, interval);
2923 }
2924
2925 if (priv->is_internal_short_scan) {
2926 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
2927 } else if (priv->scan_request->n_ssids) {
2928 int i, p = 0;
2929 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2930 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2931 /* always does wildcard anyway */
2932 if (!priv->scan_request->ssids[i].ssid_len)
2933 continue;
2934 scan->direct_scan[p].id = WLAN_EID_SSID;
2935 scan->direct_scan[p].len =
2936 priv->scan_request->ssids[i].ssid_len;
2937 memcpy(scan->direct_scan[p].ssid,
2938 priv->scan_request->ssids[i].ssid,
2939 priv->scan_request->ssids[i].ssid_len);
2940 n_probes++;
2941 p++;
2942 }
2943 is_active = true;
2944 } else
2945 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2946
2947 /* We don't build a direct scan probe request; the uCode will do
2948 * that based on the direct_mask added to each channel entry */
2949 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2950 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2951 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2952
2953 /* flags + rate selection */
2954
2955 switch (priv->scan_band) {
2956 case IEEE80211_BAND_2GHZ:
2957 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2958 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2959 scan->good_CRC_th = 0;
2960 band = IEEE80211_BAND_2GHZ;
2961 break;
2962 case IEEE80211_BAND_5GHZ:
2963 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2964 /*
2965 * If active scaning is requested but a certain channel
2966 * is marked passive, we can do active scanning if we
2967 * detect transmissions.
2968 */
2969 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2970 IWL_GOOD_CRC_TH_DISABLED;
2971 band = IEEE80211_BAND_5GHZ;
2972 break;
2973 default:
2974 IWL_WARN(priv, "Invalid scan band\n");
2975 goto done;
2976 }
2977
2978 if (!priv->is_internal_short_scan) {
2979 scan->tx_cmd.len = cpu_to_le16(
2980 iwl_fill_probe_req(priv,
2981 (struct ieee80211_mgmt *)scan->data,
2982 priv->scan_request->ie,
2983 priv->scan_request->ie_len,
2984 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2985 } else {
2986 scan->tx_cmd.len = cpu_to_le16(
2987 iwl_fill_probe_req(priv,
2988 (struct ieee80211_mgmt *)scan->data,
2989 NULL, 0,
2990 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2991 }
2992 /* select Rx antennas */
2993 scan->flags |= iwl3945_get_antenna_flags(priv);
2994
2995 scan->channel_count =
2996 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2997 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
2998
2999 if (scan->channel_count == 0) {
3000 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
3001 goto done;
3002 }
3003
3004 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
3005 scan->channel_count * sizeof(struct iwl3945_scan_channel);
3006 cmd.data = scan;
3007 scan->len = cpu_to_le16(cmd.len);
3008
3009 set_bit(STATUS_SCAN_HW, &priv->status);
3010 if (iwl_send_cmd_sync(priv, &cmd))
3011 goto done;
3012
3013 queue_delayed_work(priv->workqueue, &priv->scan_check,
3014 IWL_SCAN_CHECK_WATCHDOG);
3015
3016 return;
3017
3018 done:
3019 /* can not perform scan make sure we clear scanning
3020 * bits from status so next scan request can be performed.
3021 * if we dont clear scanning status bit here all next scan
3022 * will fail
3023 */
3024 clear_bit(STATUS_SCAN_HW, &priv->status);
3025 clear_bit(STATUS_SCANNING, &priv->status);
3026
3027 /* inform mac80211 scan aborted */
3028 queue_work(priv->workqueue, &priv->scan_completed);
3029 }
3030
3031 static void iwl3945_bg_restart(struct work_struct *data)
3032 {
3033 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3034
3035 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3036 return;
3037
3038 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3039 mutex_lock(&priv->mutex);
3040 priv->vif = NULL;
3041 priv->is_open = 0;
3042 mutex_unlock(&priv->mutex);
3043 iwl3945_down(priv);
3044 ieee80211_restart_hw(priv->hw);
3045 } else {
3046 iwl3945_down(priv);
3047
3048 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3049 return;
3050
3051 mutex_lock(&priv->mutex);
3052 __iwl3945_up(priv);
3053 mutex_unlock(&priv->mutex);
3054 }
3055 }
3056
3057 static void iwl3945_bg_rx_replenish(struct work_struct *data)
3058 {
3059 struct iwl_priv *priv =
3060 container_of(data, struct iwl_priv, rx_replenish);
3061
3062 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3063 return;
3064
3065 mutex_lock(&priv->mutex);
3066 iwl3945_rx_replenish(priv);
3067 mutex_unlock(&priv->mutex);
3068 }
3069
3070 void iwl3945_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3071 {
3072 int rc = 0;
3073 struct ieee80211_conf *conf = NULL;
3074
3075 if (!vif || !priv->is_open)
3076 return;
3077
3078 if (vif->type == NL80211_IFTYPE_AP) {
3079 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3080 return;
3081 }
3082
3083 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3084 vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3085
3086 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3087 return;
3088
3089 iwl_scan_cancel_timeout(priv, 200);
3090
3091 conf = ieee80211_get_hw_conf(priv->hw);
3092
3093 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3094 iwlcore_commit_rxon(priv);
3095
3096 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3097 iwl_setup_rxon_timing(priv, vif);
3098 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3099 sizeof(priv->rxon_timing), &priv->rxon_timing);
3100 if (rc)
3101 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3102 "Attempting to continue.\n");
3103
3104 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3105
3106 priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3107
3108 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3109 vif->bss_conf.aid, vif->bss_conf.beacon_int);
3110
3111 if (vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3112 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3113 else
3114 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3115
3116 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3117 if (vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
3118 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3119 else
3120 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3121
3122 if (vif->type == NL80211_IFTYPE_ADHOC)
3123 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3124 }
3125
3126 iwlcore_commit_rxon(priv);
3127
3128 switch (vif->type) {
3129 case NL80211_IFTYPE_STATION:
3130 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3131 break;
3132 case NL80211_IFTYPE_ADHOC:
3133 iwl3945_send_beacon_cmd(priv);
3134 break;
3135 default:
3136 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3137 __func__, vif->type);
3138 break;
3139 }
3140 }
3141
3142 /*****************************************************************************
3143 *
3144 * mac80211 entry point functions
3145 *
3146 *****************************************************************************/
3147
3148 #define UCODE_READY_TIMEOUT (2 * HZ)
3149
3150 static int iwl3945_mac_start(struct ieee80211_hw *hw)
3151 {
3152 struct iwl_priv *priv = hw->priv;
3153 int ret;
3154
3155 IWL_DEBUG_MAC80211(priv, "enter\n");
3156
3157 /* we should be verifying the device is ready to be opened */
3158 mutex_lock(&priv->mutex);
3159
3160 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
3161 * ucode filename and max sizes are card-specific. */
3162
3163 if (!priv->ucode_code.len) {
3164 ret = iwl3945_read_ucode(priv);
3165 if (ret) {
3166 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
3167 mutex_unlock(&priv->mutex);
3168 goto out_release_irq;
3169 }
3170 }
3171
3172 ret = __iwl3945_up(priv);
3173
3174 mutex_unlock(&priv->mutex);
3175
3176 if (ret)
3177 goto out_release_irq;
3178
3179 IWL_DEBUG_INFO(priv, "Start UP work.\n");
3180
3181 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
3182 * mac80211 will not be run successfully. */
3183 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3184 test_bit(STATUS_READY, &priv->status),
3185 UCODE_READY_TIMEOUT);
3186 if (!ret) {
3187 if (!test_bit(STATUS_READY, &priv->status)) {
3188 IWL_ERR(priv,
3189 "Wait for START_ALIVE timeout after %dms.\n",
3190 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3191 ret = -ETIMEDOUT;
3192 goto out_release_irq;
3193 }
3194 }
3195
3196 /* ucode is running and will send rfkill notifications,
3197 * no need to poll the killswitch state anymore */
3198 cancel_delayed_work(&priv->_3945.rfkill_poll);
3199
3200 iwl_led_start(priv);
3201
3202 priv->is_open = 1;
3203 IWL_DEBUG_MAC80211(priv, "leave\n");
3204 return 0;
3205
3206 out_release_irq:
3207 priv->is_open = 0;
3208 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
3209 return ret;
3210 }
3211
3212 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
3213 {
3214 struct iwl_priv *priv = hw->priv;
3215
3216 IWL_DEBUG_MAC80211(priv, "enter\n");
3217
3218 if (!priv->is_open) {
3219 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
3220 return;
3221 }
3222
3223 priv->is_open = 0;
3224
3225 if (iwl_is_ready_rf(priv)) {
3226 /* stop mac, cancel any scan request and clear
3227 * RXON_FILTER_ASSOC_MSK BIT
3228 */
3229 mutex_lock(&priv->mutex);
3230 iwl_scan_cancel_timeout(priv, 100);
3231 mutex_unlock(&priv->mutex);
3232 }
3233
3234 iwl3945_down(priv);
3235
3236 flush_workqueue(priv->workqueue);
3237
3238 /* start polling the killswitch state again */
3239 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
3240 round_jiffies_relative(2 * HZ));
3241
3242 IWL_DEBUG_MAC80211(priv, "leave\n");
3243 }
3244
3245 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3246 {
3247 struct iwl_priv *priv = hw->priv;
3248
3249 IWL_DEBUG_MAC80211(priv, "enter\n");
3250
3251 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3252 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3253
3254 if (iwl3945_tx_skb(priv, skb))
3255 dev_kfree_skb_any(skb);
3256
3257 IWL_DEBUG_MAC80211(priv, "leave\n");
3258 return NETDEV_TX_OK;
3259 }
3260
3261 void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3262 {
3263 int rc = 0;
3264
3265 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3266 return;
3267
3268 /* The following should be done only at AP bring up */
3269 if (!(iwl_is_associated(priv))) {
3270
3271 /* RXON - unassoc (to set timing command) */
3272 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3273 iwlcore_commit_rxon(priv);
3274
3275 /* RXON Timing */
3276 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3277 iwl_setup_rxon_timing(priv, vif);
3278 rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3279 sizeof(priv->rxon_timing),
3280 &priv->rxon_timing);
3281 if (rc)
3282 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3283 "Attempting to continue.\n");
3284
3285 priv->staging_rxon.assoc_id = 0;
3286
3287 if (vif->bss_conf.assoc_capability &
3288 WLAN_CAPABILITY_SHORT_PREAMBLE)
3289 priv->staging_rxon.flags |=
3290 RXON_FLG_SHORT_PREAMBLE_MSK;
3291 else
3292 priv->staging_rxon.flags &=
3293 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3294
3295 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3296 if (vif->bss_conf.assoc_capability &
3297 WLAN_CAPABILITY_SHORT_SLOT_TIME)
3298 priv->staging_rxon.flags |=
3299 RXON_FLG_SHORT_SLOT_MSK;
3300 else
3301 priv->staging_rxon.flags &=
3302 ~RXON_FLG_SHORT_SLOT_MSK;
3303
3304 if (vif->type == NL80211_IFTYPE_ADHOC)
3305 priv->staging_rxon.flags &=
3306 ~RXON_FLG_SHORT_SLOT_MSK;
3307 }
3308 /* restore RXON assoc */
3309 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3310 iwlcore_commit_rxon(priv);
3311 }
3312 iwl3945_send_beacon_cmd(priv);
3313
3314 /* FIXME - we need to add code here to detect a totally new
3315 * configuration, reset the AP, unassoc, rxon timing, assoc,
3316 * clear sta table, add BCAST sta... */
3317 }
3318
3319 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3320 struct ieee80211_vif *vif,
3321 struct ieee80211_sta *sta,
3322 struct ieee80211_key_conf *key)
3323 {
3324 struct iwl_priv *priv = hw->priv;
3325 int ret = 0;
3326 u8 sta_id = IWL_INVALID_STATION;
3327 u8 static_key;
3328
3329 IWL_DEBUG_MAC80211(priv, "enter\n");
3330
3331 if (iwl3945_mod_params.sw_crypto) {
3332 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3333 return -EOPNOTSUPP;
3334 }
3335
3336 static_key = !iwl_is_associated(priv);
3337
3338 if (!static_key) {
3339 if (!sta) {
3340 sta_id = priv->hw_params.bcast_sta_id;
3341 } else {
3342 sta_id = iwl_sta_id(sta);
3343 if (sta_id == IWL_INVALID_STATION) {
3344 IWL_DEBUG_MAC80211(priv,
3345 "leave - %pM not in station map.\n",
3346 sta->addr);
3347 return -EINVAL;
3348 }
3349 }
3350 }
3351
3352 mutex_lock(&priv->mutex);
3353 iwl_scan_cancel_timeout(priv, 100);
3354
3355 switch (cmd) {
3356 case SET_KEY:
3357 if (static_key)
3358 ret = iwl3945_set_static_key(priv, key);
3359 else
3360 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3361 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3362 break;
3363 case DISABLE_KEY:
3364 if (static_key)
3365 ret = iwl3945_remove_static_key(priv);
3366 else
3367 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3368 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3369 break;
3370 default:
3371 ret = -EINVAL;
3372 }
3373
3374 mutex_unlock(&priv->mutex);
3375 IWL_DEBUG_MAC80211(priv, "leave\n");
3376
3377 return ret;
3378 }
3379
3380 static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
3381 struct ieee80211_vif *vif,
3382 struct ieee80211_sta *sta)
3383 {
3384 struct iwl_priv *priv = hw->priv;
3385 struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3386 int ret;
3387 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3388 u8 sta_id;
3389
3390 sta_priv->common.sta_id = IWL_INVALID_STATION;
3391
3392 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3393 sta->addr);
3394
3395 ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3396 &sta_id);
3397 if (ret) {
3398 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3399 sta->addr, ret);
3400 /* Should we return success if return code is EEXIST ? */
3401 return ret;
3402 }
3403
3404 sta_priv->common.sta_id = sta_id;
3405
3406 /* Initialize rate scaling */
3407 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3408 sta->addr);
3409 iwl3945_rs_rate_init(priv, sta, sta_id);
3410
3411 return 0;
3412 }
3413 /*****************************************************************************
3414 *
3415 * sysfs attributes
3416 *
3417 *****************************************************************************/
3418
3419 #ifdef CONFIG_IWLWIFI_DEBUG
3420
3421 /*
3422 * The following adds a new attribute to the sysfs representation
3423 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3424 * used for controlling the debug level.
3425 *
3426 * See the level definitions in iwl for details.
3427 *
3428 * The debug_level being managed using sysfs below is a per device debug
3429 * level that is used instead of the global debug level if it (the per
3430 * device debug level) is set.
3431 */
3432 static ssize_t show_debug_level(struct device *d,
3433 struct device_attribute *attr, char *buf)
3434 {
3435 struct iwl_priv *priv = dev_get_drvdata(d);
3436 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3437 }
3438 static ssize_t store_debug_level(struct device *d,
3439 struct device_attribute *attr,
3440 const char *buf, size_t count)
3441 {
3442 struct iwl_priv *priv = dev_get_drvdata(d);
3443 unsigned long val;
3444 int ret;
3445
3446 ret = strict_strtoul(buf, 0, &val);
3447 if (ret)
3448 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3449 else {
3450 priv->debug_level = val;
3451 if (iwl_alloc_traffic_mem(priv))
3452 IWL_ERR(priv,
3453 "Not enough memory to generate traffic log\n");
3454 }
3455 return strnlen(buf, count);
3456 }
3457
3458 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3459 show_debug_level, store_debug_level);
3460
3461 #endif /* CONFIG_IWLWIFI_DEBUG */
3462
3463 static ssize_t show_temperature(struct device *d,
3464 struct device_attribute *attr, char *buf)
3465 {
3466 struct iwl_priv *priv = dev_get_drvdata(d);
3467
3468 if (!iwl_is_alive(priv))
3469 return -EAGAIN;
3470
3471 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3472 }
3473
3474 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3475
3476 static ssize_t show_tx_power(struct device *d,
3477 struct device_attribute *attr, char *buf)
3478 {
3479 struct iwl_priv *priv = dev_get_drvdata(d);
3480 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3481 }
3482
3483 static ssize_t store_tx_power(struct device *d,
3484 struct device_attribute *attr,
3485 const char *buf, size_t count)
3486 {
3487 struct iwl_priv *priv = dev_get_drvdata(d);
3488 char *p = (char *)buf;
3489 u32 val;
3490
3491 val = simple_strtoul(p, &p, 10);
3492 if (p == buf)
3493 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3494 else
3495 iwl3945_hw_reg_set_txpower(priv, val);
3496
3497 return count;
3498 }
3499
3500 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3501
3502 static ssize_t show_flags(struct device *d,
3503 struct device_attribute *attr, char *buf)
3504 {
3505 struct iwl_priv *priv = dev_get_drvdata(d);
3506
3507 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
3508 }
3509
3510 static ssize_t store_flags(struct device *d,
3511 struct device_attribute *attr,
3512 const char *buf, size_t count)
3513 {
3514 struct iwl_priv *priv = dev_get_drvdata(d);
3515 u32 flags = simple_strtoul(buf, NULL, 0);
3516
3517 mutex_lock(&priv->mutex);
3518 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
3519 /* Cancel any currently running scans... */
3520 if (iwl_scan_cancel_timeout(priv, 100))
3521 IWL_WARN(priv, "Could not cancel scan.\n");
3522 else {
3523 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3524 flags);
3525 priv->staging_rxon.flags = cpu_to_le32(flags);
3526 iwlcore_commit_rxon(priv);
3527 }
3528 }
3529 mutex_unlock(&priv->mutex);
3530
3531 return count;
3532 }
3533
3534 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
3535
3536 static ssize_t show_filter_flags(struct device *d,
3537 struct device_attribute *attr, char *buf)
3538 {
3539 struct iwl_priv *priv = dev_get_drvdata(d);
3540
3541 return sprintf(buf, "0x%04X\n",
3542 le32_to_cpu(priv->active_rxon.filter_flags));
3543 }
3544
3545 static ssize_t store_filter_flags(struct device *d,
3546 struct device_attribute *attr,
3547 const char *buf, size_t count)
3548 {
3549 struct iwl_priv *priv = dev_get_drvdata(d);
3550 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3551
3552 mutex_lock(&priv->mutex);
3553 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3554 /* Cancel any currently running scans... */
3555 if (iwl_scan_cancel_timeout(priv, 100))
3556 IWL_WARN(priv, "Could not cancel scan.\n");
3557 else {
3558 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3559 "0x%04X\n", filter_flags);
3560 priv->staging_rxon.filter_flags =
3561 cpu_to_le32(filter_flags);
3562 iwlcore_commit_rxon(priv);
3563 }
3564 }
3565 mutex_unlock(&priv->mutex);
3566
3567 return count;
3568 }
3569
3570 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3571 store_filter_flags);
3572
3573 static ssize_t show_measurement(struct device *d,
3574 struct device_attribute *attr, char *buf)
3575 {
3576 struct iwl_priv *priv = dev_get_drvdata(d);
3577 struct iwl_spectrum_notification measure_report;
3578 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3579 u8 *data = (u8 *)&measure_report;
3580 unsigned long flags;
3581
3582 spin_lock_irqsave(&priv->lock, flags);
3583 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3584 spin_unlock_irqrestore(&priv->lock, flags);
3585 return 0;
3586 }
3587 memcpy(&measure_report, &priv->measure_report, size);
3588 priv->measurement_status = 0;
3589 spin_unlock_irqrestore(&priv->lock, flags);
3590
3591 while (size && (PAGE_SIZE - len)) {
3592 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3593 PAGE_SIZE - len, 1);
3594 len = strlen(buf);
3595 if (PAGE_SIZE - len)
3596 buf[len++] = '\n';
3597
3598 ofs += 16;
3599 size -= min(size, 16U);
3600 }
3601
3602 return len;
3603 }
3604
3605 static ssize_t store_measurement(struct device *d,
3606 struct device_attribute *attr,
3607 const char *buf, size_t count)
3608 {
3609 struct iwl_priv *priv = dev_get_drvdata(d);
3610 struct ieee80211_measurement_params params = {
3611 .channel = le16_to_cpu(priv->active_rxon.channel),
3612 .start_time = cpu_to_le64(priv->_3945.last_tsf),
3613 .duration = cpu_to_le16(1),
3614 };
3615 u8 type = IWL_MEASURE_BASIC;
3616 u8 buffer[32];
3617 u8 channel;
3618
3619 if (count) {
3620 char *p = buffer;
3621 strncpy(buffer, buf, min(sizeof(buffer), count));
3622 channel = simple_strtoul(p, NULL, 0);
3623 if (channel)
3624 params.channel = channel;
3625
3626 p = buffer;
3627 while (*p && *p != ' ')
3628 p++;
3629 if (*p)
3630 type = simple_strtoul(p + 1, NULL, 0);
3631 }
3632
3633 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3634 "channel %d (for '%s')\n", type, params.channel, buf);
3635 iwl3945_get_measurement(priv, &params, type);
3636
3637 return count;
3638 }
3639
3640 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3641 show_measurement, store_measurement);
3642
3643 static ssize_t store_retry_rate(struct device *d,
3644 struct device_attribute *attr,
3645 const char *buf, size_t count)
3646 {
3647 struct iwl_priv *priv = dev_get_drvdata(d);
3648
3649 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3650 if (priv->retry_rate <= 0)
3651 priv->retry_rate = 1;
3652
3653 return count;
3654 }
3655
3656 static ssize_t show_retry_rate(struct device *d,
3657 struct device_attribute *attr, char *buf)
3658 {
3659 struct iwl_priv *priv = dev_get_drvdata(d);
3660 return sprintf(buf, "%d", priv->retry_rate);
3661 }
3662
3663 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
3664 store_retry_rate);
3665
3666
3667 static ssize_t show_channels(struct device *d,
3668 struct device_attribute *attr, char *buf)
3669 {
3670 /* all this shit doesn't belong into sysfs anyway */
3671 return 0;
3672 }
3673
3674 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
3675
3676 static ssize_t show_antenna(struct device *d,
3677 struct device_attribute *attr, char *buf)
3678 {
3679 struct iwl_priv *priv = dev_get_drvdata(d);
3680
3681 if (!iwl_is_alive(priv))
3682 return -EAGAIN;
3683
3684 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3685 }
3686
3687 static ssize_t store_antenna(struct device *d,
3688 struct device_attribute *attr,
3689 const char *buf, size_t count)
3690 {
3691 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3692 int ant;
3693
3694 if (count == 0)
3695 return 0;
3696
3697 if (sscanf(buf, "%1i", &ant) != 1) {
3698 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3699 return count;
3700 }
3701
3702 if ((ant >= 0) && (ant <= 2)) {
3703 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3704 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3705 } else
3706 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3707
3708
3709 return count;
3710 }
3711
3712 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
3713
3714 static ssize_t show_status(struct device *d,
3715 struct device_attribute *attr, char *buf)
3716 {
3717 struct iwl_priv *priv = dev_get_drvdata(d);
3718 if (!iwl_is_alive(priv))
3719 return -EAGAIN;
3720 return sprintf(buf, "0x%08x\n", (int)priv->status);
3721 }
3722
3723 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
3724
3725 static ssize_t dump_error_log(struct device *d,
3726 struct device_attribute *attr,
3727 const char *buf, size_t count)
3728 {
3729 struct iwl_priv *priv = dev_get_drvdata(d);
3730 char *p = (char *)buf;
3731
3732 if (p[0] == '1')
3733 iwl3945_dump_nic_error_log(priv);
3734
3735 return strnlen(buf, count);
3736 }
3737
3738 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
3739
3740 /*****************************************************************************
3741 *
3742 * driver setup and tear down
3743 *
3744 *****************************************************************************/
3745
3746 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3747 {
3748 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3749
3750 init_waitqueue_head(&priv->wait_command_queue);
3751
3752 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3753 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3754 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
3755 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3756 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3757 INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
3758 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
3759 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
3760 INIT_WORK(&priv->start_internal_scan, iwl_bg_start_internal_scan);
3761 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
3762
3763 iwl3945_hw_setup_deferred_work(priv);
3764
3765 if (priv->cfg->ops->lib->recover_from_tx_stall) {
3766 init_timer(&priv->monitor_recover);
3767 priv->monitor_recover.data = (unsigned long)priv;
3768 priv->monitor_recover.function =
3769 priv->cfg->ops->lib->recover_from_tx_stall;
3770 }
3771
3772 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3773 iwl3945_irq_tasklet, (unsigned long)priv);
3774 }
3775
3776 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3777 {
3778 iwl3945_hw_cancel_deferred_work(priv);
3779
3780 cancel_delayed_work_sync(&priv->init_alive_start);
3781 cancel_delayed_work(&priv->scan_check);
3782 cancel_delayed_work(&priv->alive_start);
3783 cancel_work_sync(&priv->start_internal_scan);
3784 cancel_work_sync(&priv->beacon_update);
3785 if (priv->cfg->ops->lib->recover_from_tx_stall)
3786 del_timer_sync(&priv->monitor_recover);
3787 }
3788
3789 static struct attribute *iwl3945_sysfs_entries[] = {
3790 &dev_attr_antenna.attr,
3791 &dev_attr_channels.attr,
3792 &dev_attr_dump_errors.attr,
3793 &dev_attr_flags.attr,
3794 &dev_attr_filter_flags.attr,
3795 &dev_attr_measurement.attr,
3796 &dev_attr_retry_rate.attr,
3797 &dev_attr_status.attr,
3798 &dev_attr_temperature.attr,
3799 &dev_attr_tx_power.attr,
3800 #ifdef CONFIG_IWLWIFI_DEBUG
3801 &dev_attr_debug_level.attr,
3802 #endif
3803 NULL
3804 };
3805
3806 static struct attribute_group iwl3945_attribute_group = {
3807 .name = NULL, /* put in device directory */
3808 .attrs = iwl3945_sysfs_entries,
3809 };
3810
3811 static struct ieee80211_ops iwl3945_hw_ops = {
3812 .tx = iwl3945_mac_tx,
3813 .start = iwl3945_mac_start,
3814 .stop = iwl3945_mac_stop,
3815 .add_interface = iwl_mac_add_interface,
3816 .remove_interface = iwl_mac_remove_interface,
3817 .config = iwl_mac_config,
3818 .configure_filter = iwl_configure_filter,
3819 .set_key = iwl3945_mac_set_key,
3820 .conf_tx = iwl_mac_conf_tx,
3821 .reset_tsf = iwl_mac_reset_tsf,
3822 .bss_info_changed = iwl_bss_info_changed,
3823 .hw_scan = iwl_mac_hw_scan,
3824 .sta_add = iwl3945_mac_sta_add,
3825 .sta_remove = iwl_mac_sta_remove,
3826 };
3827
3828 static int iwl3945_init_drv(struct iwl_priv *priv)
3829 {
3830 int ret;
3831 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3832
3833 priv->retry_rate = 1;
3834 priv->ibss_beacon = NULL;
3835
3836 spin_lock_init(&priv->sta_lock);
3837 spin_lock_init(&priv->hcmd_lock);
3838
3839 INIT_LIST_HEAD(&priv->free_frames);
3840
3841 mutex_init(&priv->mutex);
3842 mutex_init(&priv->sync_cmd_mutex);
3843
3844 priv->ieee_channels = NULL;
3845 priv->ieee_rates = NULL;
3846 priv->band = IEEE80211_BAND_2GHZ;
3847
3848 priv->iw_mode = NL80211_IFTYPE_STATION;
3849 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3850
3851 priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
3852
3853 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3854 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3855 eeprom->version);
3856 ret = -EINVAL;
3857 goto err;
3858 }
3859 ret = iwl_init_channel_map(priv);
3860 if (ret) {
3861 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3862 goto err;
3863 }
3864
3865 /* Set up txpower settings in driver for all channels */
3866 if (iwl3945_txpower_set_from_eeprom(priv)) {
3867 ret = -EIO;
3868 goto err_free_channel_map;
3869 }
3870
3871 ret = iwlcore_init_geos(priv);
3872 if (ret) {
3873 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3874 goto err_free_channel_map;
3875 }
3876 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3877
3878 return 0;
3879
3880 err_free_channel_map:
3881 iwl_free_channel_map(priv);
3882 err:
3883 return ret;
3884 }
3885
3886 #define IWL3945_MAX_PROBE_REQUEST 200
3887
3888 static int iwl3945_setup_mac(struct iwl_priv *priv)
3889 {
3890 int ret;
3891 struct ieee80211_hw *hw = priv->hw;
3892
3893 hw->rate_control_algorithm = "iwl-3945-rs";
3894 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3895 hw->vif_data_size = sizeof(struct iwl_vif_priv);
3896
3897 /* Tell mac80211 our characteristics */
3898 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3899 IEEE80211_HW_SPECTRUM_MGMT;
3900
3901 if (!priv->cfg->broken_powersave)
3902 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3903 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3904
3905 hw->wiphy->interface_modes =
3906 BIT(NL80211_IFTYPE_STATION) |
3907 BIT(NL80211_IFTYPE_ADHOC);
3908
3909 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3910 WIPHY_FLAG_DISABLE_BEACON_HINTS;
3911
3912 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3913 /* we create the 802.11 header and a zero-length SSID element */
3914 hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
3915
3916 /* Default value; 4 EDCA QOS priorities */
3917 hw->queues = 4;
3918
3919 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3920 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3921 &priv->bands[IEEE80211_BAND_2GHZ];
3922
3923 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3924 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3925 &priv->bands[IEEE80211_BAND_5GHZ];
3926
3927 ret = ieee80211_register_hw(priv->hw);
3928 if (ret) {
3929 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3930 return ret;
3931 }
3932 priv->mac80211_registered = 1;
3933
3934 return 0;
3935 }
3936
3937 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3938 {
3939 int err = 0;
3940 struct iwl_priv *priv;
3941 struct ieee80211_hw *hw;
3942 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3943 struct iwl3945_eeprom *eeprom;
3944 unsigned long flags;
3945
3946 /***********************
3947 * 1. Allocating HW data
3948 * ********************/
3949
3950 /* mac80211 allocates memory for this device instance, including
3951 * space for this driver's private structure */
3952 hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
3953 if (hw == NULL) {
3954 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
3955 err = -ENOMEM;
3956 goto out;
3957 }
3958 priv = hw->priv;
3959 SET_IEEE80211_DEV(hw, &pdev->dev);
3960
3961 /*
3962 * Disabling hardware scan means that mac80211 will perform scans
3963 * "the hard way", rather than using device's scan.
3964 */
3965 if (iwl3945_mod_params.disable_hw_scan) {
3966 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
3967 iwl3945_hw_ops.hw_scan = NULL;
3968 }
3969
3970
3971 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3972 priv->cfg = cfg;
3973 priv->pci_dev = pdev;
3974 priv->inta_mask = CSR_INI_SET_MASK;
3975
3976 #ifdef CONFIG_IWLWIFI_DEBUG
3977 atomic_set(&priv->restrict_refcnt, 0);
3978 #endif
3979 if (iwl_alloc_traffic_mem(priv))
3980 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3981
3982 /***************************
3983 * 2. Initializing PCI bus
3984 * *************************/
3985 if (pci_enable_device(pdev)) {
3986 err = -ENODEV;
3987 goto out_ieee80211_free_hw;
3988 }
3989
3990 pci_set_master(pdev);
3991
3992 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3993 if (!err)
3994 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3995 if (err) {
3996 IWL_WARN(priv, "No suitable DMA available.\n");
3997 goto out_pci_disable_device;
3998 }
3999
4000 pci_set_drvdata(pdev, priv);
4001 err = pci_request_regions(pdev, DRV_NAME);
4002 if (err)
4003 goto out_pci_disable_device;
4004
4005 /***********************
4006 * 3. Read REV Register
4007 * ********************/
4008 priv->hw_base = pci_iomap(pdev, 0, 0);
4009 if (!priv->hw_base) {
4010 err = -ENODEV;
4011 goto out_pci_release_regions;
4012 }
4013
4014 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4015 (unsigned long long) pci_resource_len(pdev, 0));
4016 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4017
4018 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4019 * PCI Tx retries from interfering with C3 CPU state */
4020 pci_write_config_byte(pdev, 0x41, 0x00);
4021
4022 /* these spin locks will be used in apm_ops.init and EEPROM access
4023 * we should init now
4024 */
4025 spin_lock_init(&priv->reg_lock);
4026 spin_lock_init(&priv->lock);
4027
4028 /*
4029 * stop and reset the on-board processor just in case it is in a
4030 * strange state ... like being left stranded by a primary kernel
4031 * and this is now the kdump kernel trying to start up
4032 */
4033 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4034
4035 /***********************
4036 * 4. Read EEPROM
4037 * ********************/
4038
4039 /* Read the EEPROM */
4040 err = iwl_eeprom_init(priv);
4041 if (err) {
4042 IWL_ERR(priv, "Unable to init EEPROM\n");
4043 goto out_iounmap;
4044 }
4045 /* MAC Address location in EEPROM same for 3945/4965 */
4046 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
4047 memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
4048 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
4049 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
4050
4051 /***********************
4052 * 5. Setup HW Constants
4053 * ********************/
4054 /* Device-specific setup */
4055 if (iwl3945_hw_set_hw_params(priv)) {
4056 IWL_ERR(priv, "failed to set hw settings\n");
4057 goto out_eeprom_free;
4058 }
4059
4060 /***********************
4061 * 6. Setup priv
4062 * ********************/
4063
4064 err = iwl3945_init_drv(priv);
4065 if (err) {
4066 IWL_ERR(priv, "initializing driver failed\n");
4067 goto out_unset_hw_params;
4068 }
4069
4070 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
4071 priv->cfg->name);
4072
4073 /***********************
4074 * 7. Setup Services
4075 * ********************/
4076
4077 spin_lock_irqsave(&priv->lock, flags);
4078 iwl_disable_interrupts(priv);
4079 spin_unlock_irqrestore(&priv->lock, flags);
4080
4081 pci_enable_msi(priv->pci_dev);
4082
4083 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4084 IRQF_SHARED, DRV_NAME, priv);
4085 if (err) {
4086 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4087 goto out_disable_msi;
4088 }
4089
4090 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4091 if (err) {
4092 IWL_ERR(priv, "failed to create sysfs device attributes\n");
4093 goto out_release_irq;
4094 }
4095
4096 iwl_set_rxon_channel(priv,
4097 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4098 iwl3945_setup_deferred_work(priv);
4099 iwl3945_setup_rx_handlers(priv);
4100 iwl_power_initialize(priv);
4101
4102 /*********************************
4103 * 8. Setup and Register mac80211
4104 * *******************************/
4105
4106 iwl_enable_interrupts(priv);
4107
4108 err = iwl3945_setup_mac(priv);
4109 if (err)
4110 goto out_remove_sysfs;
4111
4112 err = iwl_dbgfs_register(priv, DRV_NAME);
4113 if (err)
4114 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
4115
4116 /* Start monitoring the killswitch */
4117 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
4118 2 * HZ);
4119
4120 return 0;
4121
4122 out_remove_sysfs:
4123 destroy_workqueue(priv->workqueue);
4124 priv->workqueue = NULL;
4125 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4126 out_release_irq:
4127 free_irq(priv->pci_dev->irq, priv);
4128 out_disable_msi:
4129 pci_disable_msi(priv->pci_dev);
4130 iwlcore_free_geos(priv);
4131 iwl_free_channel_map(priv);
4132 out_unset_hw_params:
4133 iwl3945_unset_hw_params(priv);
4134 out_eeprom_free:
4135 iwl_eeprom_free(priv);
4136 out_iounmap:
4137 pci_iounmap(pdev, priv->hw_base);
4138 out_pci_release_regions:
4139 pci_release_regions(pdev);
4140 out_pci_disable_device:
4141 pci_set_drvdata(pdev, NULL);
4142 pci_disable_device(pdev);
4143 out_ieee80211_free_hw:
4144 iwl_free_traffic_mem(priv);
4145 ieee80211_free_hw(priv->hw);
4146 out:
4147 return err;
4148 }
4149
4150 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4151 {
4152 struct iwl_priv *priv = pci_get_drvdata(pdev);
4153 unsigned long flags;
4154
4155 if (!priv)
4156 return;
4157
4158 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4159
4160 iwl_dbgfs_unregister(priv);
4161
4162 set_bit(STATUS_EXIT_PENDING, &priv->status);
4163
4164 if (priv->mac80211_registered) {
4165 ieee80211_unregister_hw(priv->hw);
4166 priv->mac80211_registered = 0;
4167 } else {
4168 iwl3945_down(priv);
4169 }
4170
4171 /*
4172 * Make sure device is reset to low power before unloading driver.
4173 * This may be redundant with iwl_down(), but there are paths to
4174 * run iwl_down() without calling apm_ops.stop(), and there are
4175 * paths to avoid running iwl_down() at all before leaving driver.
4176 * This (inexpensive) call *makes sure* device is reset.
4177 */
4178 priv->cfg->ops->lib->apm_ops.stop(priv);
4179
4180 /* make sure we flush any pending irq or
4181 * tasklet for the driver
4182 */
4183 spin_lock_irqsave(&priv->lock, flags);
4184 iwl_disable_interrupts(priv);
4185 spin_unlock_irqrestore(&priv->lock, flags);
4186
4187 iwl_synchronize_irq(priv);
4188
4189 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
4190
4191 cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
4192
4193 iwl3945_dealloc_ucode_pci(priv);
4194
4195 if (priv->rxq.bd)
4196 iwl3945_rx_queue_free(priv, &priv->rxq);
4197 iwl3945_hw_txq_ctx_free(priv);
4198
4199 iwl3945_unset_hw_params(priv);
4200
4201 /*netif_stop_queue(dev); */
4202 flush_workqueue(priv->workqueue);
4203
4204 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
4205 * priv->workqueue... so we can't take down the workqueue
4206 * until now... */
4207 destroy_workqueue(priv->workqueue);
4208 priv->workqueue = NULL;
4209 iwl_free_traffic_mem(priv);
4210
4211 free_irq(pdev->irq, priv);
4212 pci_disable_msi(pdev);
4213
4214 pci_iounmap(pdev, priv->hw_base);
4215 pci_release_regions(pdev);
4216 pci_disable_device(pdev);
4217 pci_set_drvdata(pdev, NULL);
4218
4219 iwl_free_channel_map(priv);
4220 iwlcore_free_geos(priv);
4221 kfree(priv->scan_cmd);
4222 if (priv->ibss_beacon)
4223 dev_kfree_skb(priv->ibss_beacon);
4224
4225 ieee80211_free_hw(priv->hw);
4226 }
4227
4228
4229 /*****************************************************************************
4230 *
4231 * driver and module entry point
4232 *
4233 *****************************************************************************/
4234
4235 static struct pci_driver iwl3945_driver = {
4236 .name = DRV_NAME,
4237 .id_table = iwl3945_hw_card_ids,
4238 .probe = iwl3945_pci_probe,
4239 .remove = __devexit_p(iwl3945_pci_remove),
4240 #ifdef CONFIG_PM
4241 .suspend = iwl_pci_suspend,
4242 .resume = iwl_pci_resume,
4243 #endif
4244 };
4245
4246 static int __init iwl3945_init(void)
4247 {
4248
4249 int ret;
4250 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4251 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4252
4253 ret = iwl3945_rate_control_register();
4254 if (ret) {
4255 printk(KERN_ERR DRV_NAME
4256 "Unable to register rate control algorithm: %d\n", ret);
4257 return ret;
4258 }
4259
4260 ret = pci_register_driver(&iwl3945_driver);
4261 if (ret) {
4262 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4263 goto error_register;
4264 }
4265
4266 return ret;
4267
4268 error_register:
4269 iwl3945_rate_control_unregister();
4270 return ret;
4271 }
4272
4273 static void __exit iwl3945_exit(void)
4274 {
4275 pci_unregister_driver(&iwl3945_driver);
4276 iwl3945_rate_control_unregister();
4277 }
4278
4279 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4280
4281 module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
4282 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4283 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
4284 MODULE_PARM_DESC(swcrypto,
4285 "using software crypto (default 1 [software])\n");
4286 #ifdef CONFIG_IWLWIFI_DEBUG
4287 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4288 MODULE_PARM_DESC(debug, "debug output mask");
4289 #endif
4290 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
4291 int, S_IRUGO);
4292 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4293 module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
4294 MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4295
4296 module_exit(iwl3945_exit);
4297 module_init(iwl3945_init);
Linux kernel - Deliverables
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