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iwlwifi: Fix HT compilation breakage caused by cfg80211 API for channels/bitrates...
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #include "iwl-4965.h"
49 #include "iwl-helpers.h"
50
51 #ifdef CONFIG_IWL4965_DEBUG
52 u32 iwl4965_debug_level;
53 #endif
54
55 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
56 struct iwl4965_tx_queue *txq);
57
58 /******************************************************************************
59 *
60 * module boiler plate
61 *
62 ******************************************************************************/
63
64 /* module parameters */
65 static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
66 static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
67 static int iwl4965_param_disable; /* def: enable radio */
68 static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
69 int iwl4965_param_hwcrypto; /* def: using software encryption */
70 static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
71 int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
72 int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
73
74 /*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
80
81 #ifdef CONFIG_IWL4965_DEBUG
82 #define VD "d"
83 #else
84 #define VD
85 #endif
86
87 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
88 #define VS "s"
89 #else
90 #define VS
91 #endif
92
93 #define IWLWIFI_VERSION "1.2.23k" VD VS
94 #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
95 #define DRV_VERSION IWLWIFI_VERSION
96
97 /* Change firmware file name, using "-" and incrementing number,
98 * *only* when uCode interface or architecture changes so that it
99 * is not compatible with earlier drivers.
100 * This number will also appear in << 8 position of 1st dword of uCode file */
101 #define IWL4965_UCODE_API "-1"
102
103 MODULE_DESCRIPTION(DRV_DESCRIPTION);
104 MODULE_VERSION(DRV_VERSION);
105 MODULE_AUTHOR(DRV_COPYRIGHT);
106 MODULE_LICENSE("GPL");
107
108 __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
109 {
110 u16 fc = le16_to_cpu(hdr->frame_control);
111 int hdr_len = ieee80211_get_hdrlen(fc);
112
113 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
114 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
115 return NULL;
116 }
117
118 static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
119 struct iwl4965_priv *priv, enum ieee80211_band band)
120 {
121 return priv->hw->wiphy->bands[band];
122 }
123
124 static int iwl4965_is_empty_essid(const char *essid, int essid_len)
125 {
126 /* Single white space is for Linksys APs */
127 if (essid_len == 1 && essid[0] == ' ')
128 return 1;
129
130 /* Otherwise, if the entire essid is 0, we assume it is hidden */
131 while (essid_len) {
132 essid_len--;
133 if (essid[essid_len] != '\0')
134 return 0;
135 }
136
137 return 1;
138 }
139
140 static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
141 {
142 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
143 const char *s = essid;
144 char *d = escaped;
145
146 if (iwl4965_is_empty_essid(essid, essid_len)) {
147 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
148 return escaped;
149 }
150
151 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
152 while (essid_len--) {
153 if (*s == '\0') {
154 *d++ = '\\';
155 *d++ = '0';
156 s++;
157 } else
158 *d++ = *s++;
159 }
160 *d = '\0';
161 return escaped;
162 }
163
164 static void iwl4965_print_hex_dump(int level, void *p, u32 len)
165 {
166 #ifdef CONFIG_IWL4965_DEBUG
167 if (!(iwl4965_debug_level & level))
168 return;
169
170 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
171 p, len, 1);
172 #endif
173 }
174
175 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
176 * DMA services
177 *
178 * Theory of operation
179 *
180 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
181 * of buffer descriptors, each of which points to one or more data buffers for
182 * the device to read from or fill. Driver and device exchange status of each
183 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
184 * entries in each circular buffer, to protect against confusing empty and full
185 * queue states.
186 *
187 * The device reads or writes the data in the queues via the device's several
188 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
189 *
190 * For Tx queue, there are low mark and high mark limits. If, after queuing
191 * the packet for Tx, free space become < low mark, Tx queue stopped. When
192 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
193 * Tx queue resumed.
194 *
195 * The 4965 operates with up to 17 queues: One receive queue, one transmit
196 * queue (#4) for sending commands to the device firmware, and 15 other
197 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
198 *
199 * See more detailed info in iwl-4965-hw.h.
200 ***************************************************/
201
202 int iwl4965_queue_space(const struct iwl4965_queue *q)
203 {
204 int s = q->read_ptr - q->write_ptr;
205
206 if (q->read_ptr > q->write_ptr)
207 s -= q->n_bd;
208
209 if (s <= 0)
210 s += q->n_window;
211 /* keep some reserve to not confuse empty and full situations */
212 s -= 2;
213 if (s < 0)
214 s = 0;
215 return s;
216 }
217
218 /**
219 * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
220 * @index -- current index
221 * @n_bd -- total number of entries in queue (must be power of 2)
222 */
223 static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
224 {
225 return ++index & (n_bd - 1);
226 }
227
228 /**
229 * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
230 * @index -- current index
231 * @n_bd -- total number of entries in queue (must be power of 2)
232 */
233 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
234 {
235 return --index & (n_bd - 1);
236 }
237
238 static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
239 {
240 return q->write_ptr > q->read_ptr ?
241 (i >= q->read_ptr && i < q->write_ptr) :
242 !(i < q->read_ptr && i >= q->write_ptr);
243 }
244
245 static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
246 {
247 /* This is for scan command, the big buffer at end of command array */
248 if (is_huge)
249 return q->n_window; /* must be power of 2 */
250
251 /* Otherwise, use normal size buffers */
252 return index & (q->n_window - 1);
253 }
254
255 /**
256 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
257 */
258 static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
259 int count, int slots_num, u32 id)
260 {
261 q->n_bd = count;
262 q->n_window = slots_num;
263 q->id = id;
264
265 /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
266 * and iwl4965_queue_dec_wrap are broken. */
267 BUG_ON(!is_power_of_2(count));
268
269 /* slots_num must be power-of-two size, otherwise
270 * get_cmd_index is broken. */
271 BUG_ON(!is_power_of_2(slots_num));
272
273 q->low_mark = q->n_window / 4;
274 if (q->low_mark < 4)
275 q->low_mark = 4;
276
277 q->high_mark = q->n_window / 8;
278 if (q->high_mark < 2)
279 q->high_mark = 2;
280
281 q->write_ptr = q->read_ptr = 0;
282
283 return 0;
284 }
285
286 /**
287 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
288 */
289 static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
290 struct iwl4965_tx_queue *txq, u32 id)
291 {
292 struct pci_dev *dev = priv->pci_dev;
293
294 /* Driver private data, only for Tx (not command) queues,
295 * not shared with device. */
296 if (id != IWL_CMD_QUEUE_NUM) {
297 txq->txb = kmalloc(sizeof(txq->txb[0]) *
298 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
299 if (!txq->txb) {
300 IWL_ERROR("kmalloc for auxiliary BD "
301 "structures failed\n");
302 goto error;
303 }
304 } else
305 txq->txb = NULL;
306
307 /* Circular buffer of transmit frame descriptors (TFDs),
308 * shared with device */
309 txq->bd = pci_alloc_consistent(dev,
310 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
311 &txq->q.dma_addr);
312
313 if (!txq->bd) {
314 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
315 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
316 goto error;
317 }
318 txq->q.id = id;
319
320 return 0;
321
322 error:
323 if (txq->txb) {
324 kfree(txq->txb);
325 txq->txb = NULL;
326 }
327
328 return -ENOMEM;
329 }
330
331 /**
332 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
333 */
334 int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
335 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
336 {
337 struct pci_dev *dev = priv->pci_dev;
338 int len;
339 int rc = 0;
340
341 /*
342 * Alloc buffer array for commands (Tx or other types of commands).
343 * For the command queue (#4), allocate command space + one big
344 * command for scan, since scan command is very huge; the system will
345 * not have two scans at the same time, so only one is needed.
346 * For normal Tx queues (all other queues), no super-size command
347 * space is needed.
348 */
349 len = sizeof(struct iwl4965_cmd) * slots_num;
350 if (txq_id == IWL_CMD_QUEUE_NUM)
351 len += IWL_MAX_SCAN_SIZE;
352 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
353 if (!txq->cmd)
354 return -ENOMEM;
355
356 /* Alloc driver data array and TFD circular buffer */
357 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
358 if (rc) {
359 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
360
361 return -ENOMEM;
362 }
363 txq->need_update = 0;
364
365 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
366 * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
367 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
368
369 /* Initialize queue's high/low-water marks, and head/tail indexes */
370 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
371
372 /* Tell device where to find queue */
373 iwl4965_hw_tx_queue_init(priv, txq);
374
375 return 0;
376 }
377
378 /**
379 * iwl4965_tx_queue_free - Deallocate DMA queue.
380 * @txq: Transmit queue to deallocate.
381 *
382 * Empty queue by removing and destroying all BD's.
383 * Free all buffers.
384 * 0-fill, but do not free "txq" descriptor structure.
385 */
386 void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
387 {
388 struct iwl4965_queue *q = &txq->q;
389 struct pci_dev *dev = priv->pci_dev;
390 int len;
391
392 if (q->n_bd == 0)
393 return;
394
395 /* first, empty all BD's */
396 for (; q->write_ptr != q->read_ptr;
397 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
398 iwl4965_hw_txq_free_tfd(priv, txq);
399
400 len = sizeof(struct iwl4965_cmd) * q->n_window;
401 if (q->id == IWL_CMD_QUEUE_NUM)
402 len += IWL_MAX_SCAN_SIZE;
403
404 /* De-alloc array of command/tx buffers */
405 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
406
407 /* De-alloc circular buffer of TFDs */
408 if (txq->q.n_bd)
409 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
410 txq->q.n_bd, txq->bd, txq->q.dma_addr);
411
412 /* De-alloc array of per-TFD driver data */
413 if (txq->txb) {
414 kfree(txq->txb);
415 txq->txb = NULL;
416 }
417
418 /* 0-fill queue descriptor structure */
419 memset(txq, 0, sizeof(*txq));
420 }
421
422 const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
423
424 /*************** STATION TABLE MANAGEMENT ****
425 * mac80211 should be examined to determine if sta_info is duplicating
426 * the functionality provided here
427 */
428
429 /**************************************************************/
430
431 #if 0 /* temporary disable till we add real remove station */
432 /**
433 * iwl4965_remove_station - Remove driver's knowledge of station.
434 *
435 * NOTE: This does not remove station from device's station table.
436 */
437 static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
438 {
439 int index = IWL_INVALID_STATION;
440 int i;
441 unsigned long flags;
442
443 spin_lock_irqsave(&priv->sta_lock, flags);
444
445 if (is_ap)
446 index = IWL_AP_ID;
447 else if (is_broadcast_ether_addr(addr))
448 index = priv->hw_setting.bcast_sta_id;
449 else
450 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
451 if (priv->stations[i].used &&
452 !compare_ether_addr(priv->stations[i].sta.sta.addr,
453 addr)) {
454 index = i;
455 break;
456 }
457
458 if (unlikely(index == IWL_INVALID_STATION))
459 goto out;
460
461 if (priv->stations[index].used) {
462 priv->stations[index].used = 0;
463 priv->num_stations--;
464 }
465
466 BUG_ON(priv->num_stations < 0);
467
468 out:
469 spin_unlock_irqrestore(&priv->sta_lock, flags);
470 return 0;
471 }
472 #endif
473
474 /**
475 * iwl4965_clear_stations_table - Clear the driver's station table
476 *
477 * NOTE: This does not clear or otherwise alter the device's station table.
478 */
479 static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
480 {
481 unsigned long flags;
482
483 spin_lock_irqsave(&priv->sta_lock, flags);
484
485 priv->num_stations = 0;
486 memset(priv->stations, 0, sizeof(priv->stations));
487
488 spin_unlock_irqrestore(&priv->sta_lock, flags);
489 }
490
491 /**
492 * iwl4965_add_station_flags - Add station to tables in driver and device
493 */
494 u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
495 int is_ap, u8 flags, void *ht_data)
496 {
497 int i;
498 int index = IWL_INVALID_STATION;
499 struct iwl4965_station_entry *station;
500 unsigned long flags_spin;
501 DECLARE_MAC_BUF(mac);
502
503 spin_lock_irqsave(&priv->sta_lock, flags_spin);
504 if (is_ap)
505 index = IWL_AP_ID;
506 else if (is_broadcast_ether_addr(addr))
507 index = priv->hw_setting.bcast_sta_id;
508 else
509 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
510 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
511 addr)) {
512 index = i;
513 break;
514 }
515
516 if (!priv->stations[i].used &&
517 index == IWL_INVALID_STATION)
518 index = i;
519 }
520
521
522 /* These two conditions have the same outcome, but keep them separate
523 since they have different meanings */
524 if (unlikely(index == IWL_INVALID_STATION)) {
525 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
526 return index;
527 }
528
529 if (priv->stations[index].used &&
530 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
531 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
532 return index;
533 }
534
535
536 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
537 station = &priv->stations[index];
538 station->used = 1;
539 priv->num_stations++;
540
541 /* Set up the REPLY_ADD_STA command to send to device */
542 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
543 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
544 station->sta.mode = 0;
545 station->sta.sta.sta_id = index;
546 station->sta.station_flags = 0;
547
548 #ifdef CONFIG_IWL4965_HT
549 /* BCAST station and IBSS stations do not work in HT mode */
550 if (index != priv->hw_setting.bcast_sta_id &&
551 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
552 iwl4965_set_ht_add_station(priv, index,
553 (struct ieee80211_ht_info *) ht_data);
554 #endif /*CONFIG_IWL4965_HT*/
555
556 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
557
558 /* Add station to device's station table */
559 iwl4965_send_add_station(priv, &station->sta, flags);
560 return index;
561
562 }
563
564 /*************** DRIVER STATUS FUNCTIONS *****/
565
566 static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
567 {
568 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
569 * set but EXIT_PENDING is not */
570 return test_bit(STATUS_READY, &priv->status) &&
571 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
572 !test_bit(STATUS_EXIT_PENDING, &priv->status);
573 }
574
575 static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
576 {
577 return test_bit(STATUS_ALIVE, &priv->status);
578 }
579
580 static inline int iwl4965_is_init(struct iwl4965_priv *priv)
581 {
582 return test_bit(STATUS_INIT, &priv->status);
583 }
584
585 static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
586 {
587 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
588 test_bit(STATUS_RF_KILL_SW, &priv->status);
589 }
590
591 static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
592 {
593
594 if (iwl4965_is_rfkill(priv))
595 return 0;
596
597 return iwl4965_is_ready(priv);
598 }
599
600 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
601
602 #define IWL_CMD(x) case x : return #x
603
604 static const char *get_cmd_string(u8 cmd)
605 {
606 switch (cmd) {
607 IWL_CMD(REPLY_ALIVE);
608 IWL_CMD(REPLY_ERROR);
609 IWL_CMD(REPLY_RXON);
610 IWL_CMD(REPLY_RXON_ASSOC);
611 IWL_CMD(REPLY_QOS_PARAM);
612 IWL_CMD(REPLY_RXON_TIMING);
613 IWL_CMD(REPLY_ADD_STA);
614 IWL_CMD(REPLY_REMOVE_STA);
615 IWL_CMD(REPLY_REMOVE_ALL_STA);
616 IWL_CMD(REPLY_TX);
617 IWL_CMD(REPLY_RATE_SCALE);
618 IWL_CMD(REPLY_LEDS_CMD);
619 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
620 IWL_CMD(RADAR_NOTIFICATION);
621 IWL_CMD(REPLY_QUIET_CMD);
622 IWL_CMD(REPLY_CHANNEL_SWITCH);
623 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
624 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
625 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
626 IWL_CMD(POWER_TABLE_CMD);
627 IWL_CMD(PM_SLEEP_NOTIFICATION);
628 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
629 IWL_CMD(REPLY_SCAN_CMD);
630 IWL_CMD(REPLY_SCAN_ABORT_CMD);
631 IWL_CMD(SCAN_START_NOTIFICATION);
632 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
633 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
634 IWL_CMD(BEACON_NOTIFICATION);
635 IWL_CMD(REPLY_TX_BEACON);
636 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
637 IWL_CMD(QUIET_NOTIFICATION);
638 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
639 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
640 IWL_CMD(REPLY_BT_CONFIG);
641 IWL_CMD(REPLY_STATISTICS_CMD);
642 IWL_CMD(STATISTICS_NOTIFICATION);
643 IWL_CMD(REPLY_CARD_STATE_CMD);
644 IWL_CMD(CARD_STATE_NOTIFICATION);
645 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
646 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
647 IWL_CMD(SENSITIVITY_CMD);
648 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
649 IWL_CMD(REPLY_RX_PHY_CMD);
650 IWL_CMD(REPLY_RX_MPDU_CMD);
651 IWL_CMD(REPLY_4965_RX);
652 IWL_CMD(REPLY_COMPRESSED_BA);
653 default:
654 return "UNKNOWN";
655
656 }
657 }
658
659 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
660
661 /**
662 * iwl4965_enqueue_hcmd - enqueue a uCode command
663 * @priv: device private data point
664 * @cmd: a point to the ucode command structure
665 *
666 * The function returns < 0 values to indicate the operation is
667 * failed. On success, it turns the index (> 0) of command in the
668 * command queue.
669 */
670 static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
671 {
672 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
673 struct iwl4965_queue *q = &txq->q;
674 struct iwl4965_tfd_frame *tfd;
675 u32 *control_flags;
676 struct iwl4965_cmd *out_cmd;
677 u32 idx;
678 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
679 dma_addr_t phys_addr;
680 int ret;
681 unsigned long flags;
682
683 /* If any of the command structures end up being larger than
684 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
685 * we will need to increase the size of the TFD entries */
686 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
687 !(cmd->meta.flags & CMD_SIZE_HUGE));
688
689 if (iwl4965_is_rfkill(priv)) {
690 IWL_DEBUG_INFO("Not sending command - RF KILL");
691 return -EIO;
692 }
693
694 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
695 IWL_ERROR("No space for Tx\n");
696 return -ENOSPC;
697 }
698
699 spin_lock_irqsave(&priv->hcmd_lock, flags);
700
701 tfd = &txq->bd[q->write_ptr];
702 memset(tfd, 0, sizeof(*tfd));
703
704 control_flags = (u32 *) tfd;
705
706 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
707 out_cmd = &txq->cmd[idx];
708
709 out_cmd->hdr.cmd = cmd->id;
710 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
711 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
712
713 /* At this point, the out_cmd now has all of the incoming cmd
714 * information */
715
716 out_cmd->hdr.flags = 0;
717 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
718 INDEX_TO_SEQ(q->write_ptr));
719 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
720 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
721
722 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
723 offsetof(struct iwl4965_cmd, hdr);
724 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
725
726 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
727 "%d bytes at %d[%d]:%d\n",
728 get_cmd_string(out_cmd->hdr.cmd),
729 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
730 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
731
732 txq->need_update = 1;
733
734 /* Set up entry in queue's byte count circular buffer */
735 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
736
737 /* Increment and update queue's write index */
738 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
739 iwl4965_tx_queue_update_write_ptr(priv, txq);
740
741 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
742 return ret ? ret : idx;
743 }
744
745 static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
746 {
747 int ret;
748
749 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
750
751 /* An asynchronous command can not expect an SKB to be set. */
752 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
753
754 /* An asynchronous command MUST have a callback. */
755 BUG_ON(!cmd->meta.u.callback);
756
757 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
758 return -EBUSY;
759
760 ret = iwl4965_enqueue_hcmd(priv, cmd);
761 if (ret < 0) {
762 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
763 get_cmd_string(cmd->id), ret);
764 return ret;
765 }
766 return 0;
767 }
768
769 static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
770 {
771 int cmd_idx;
772 int ret;
773 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
774
775 BUG_ON(cmd->meta.flags & CMD_ASYNC);
776
777 /* A synchronous command can not have a callback set. */
778 BUG_ON(cmd->meta.u.callback != NULL);
779
780 if (atomic_xchg(&entry, 1)) {
781 IWL_ERROR("Error sending %s: Already sending a host command\n",
782 get_cmd_string(cmd->id));
783 return -EBUSY;
784 }
785
786 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
787
788 if (cmd->meta.flags & CMD_WANT_SKB)
789 cmd->meta.source = &cmd->meta;
790
791 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
792 if (cmd_idx < 0) {
793 ret = cmd_idx;
794 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
795 get_cmd_string(cmd->id), ret);
796 goto out;
797 }
798
799 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
800 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
801 HOST_COMPLETE_TIMEOUT);
802 if (!ret) {
803 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
804 IWL_ERROR("Error sending %s: time out after %dms.\n",
805 get_cmd_string(cmd->id),
806 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
807
808 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
809 ret = -ETIMEDOUT;
810 goto cancel;
811 }
812 }
813
814 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
815 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
816 get_cmd_string(cmd->id));
817 ret = -ECANCELED;
818 goto fail;
819 }
820 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
821 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
822 get_cmd_string(cmd->id));
823 ret = -EIO;
824 goto fail;
825 }
826 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
827 IWL_ERROR("Error: Response NULL in '%s'\n",
828 get_cmd_string(cmd->id));
829 ret = -EIO;
830 goto out;
831 }
832
833 ret = 0;
834 goto out;
835
836 cancel:
837 if (cmd->meta.flags & CMD_WANT_SKB) {
838 struct iwl4965_cmd *qcmd;
839
840 /* Cancel the CMD_WANT_SKB flag for the cmd in the
841 * TX cmd queue. Otherwise in case the cmd comes
842 * in later, it will possibly set an invalid
843 * address (cmd->meta.source). */
844 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
845 qcmd->meta.flags &= ~CMD_WANT_SKB;
846 }
847 fail:
848 if (cmd->meta.u.skb) {
849 dev_kfree_skb_any(cmd->meta.u.skb);
850 cmd->meta.u.skb = NULL;
851 }
852 out:
853 atomic_set(&entry, 0);
854 return ret;
855 }
856
857 int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
858 {
859 if (cmd->meta.flags & CMD_ASYNC)
860 return iwl4965_send_cmd_async(priv, cmd);
861
862 return iwl4965_send_cmd_sync(priv, cmd);
863 }
864
865 int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
866 {
867 struct iwl4965_host_cmd cmd = {
868 .id = id,
869 .len = len,
870 .data = data,
871 };
872
873 return iwl4965_send_cmd_sync(priv, &cmd);
874 }
875
876 static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
877 {
878 struct iwl4965_host_cmd cmd = {
879 .id = id,
880 .len = sizeof(val),
881 .data = &val,
882 };
883
884 return iwl4965_send_cmd_sync(priv, &cmd);
885 }
886
887 int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
888 {
889 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
890 }
891
892 /**
893 * iwl4965_rxon_add_station - add station into station table.
894 *
895 * there is only one AP station with id= IWL_AP_ID
896 * NOTE: mutex must be held before calling this fnction
897 */
898 static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
899 const u8 *addr, int is_ap)
900 {
901 u8 sta_id;
902
903 /* Add station to device's station table */
904 #ifdef CONFIG_IWL4965_HT
905 struct ieee80211_conf *conf = &priv->hw->conf;
906 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
907
908 if ((is_ap) &&
909 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
910 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
911 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
912 0, cur_ht_config);
913 else
914 #endif /* CONFIG_IWL4965_HT */
915 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
916 0, NULL);
917
918 /* Set up default rate scaling table in device's station table */
919 iwl4965_add_station(priv, addr, is_ap);
920
921 return sta_id;
922 }
923
924 /**
925 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
926 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
927 * @channel: Any channel valid for the requested phymode
928
929 * In addition to setting the staging RXON, priv->phymode is also set.
930 *
931 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
932 * in the staging RXON flag structure based on the phymode
933 */
934 static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
935 enum ieee80211_band band,
936 u16 channel)
937 {
938 if (!iwl4965_get_channel_info(priv, band, channel)) {
939 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
940 channel, band);
941 return -EINVAL;
942 }
943
944 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
945 (priv->band == band))
946 return 0;
947
948 priv->staging_rxon.channel = cpu_to_le16(channel);
949 if (band == IEEE80211_BAND_5GHZ)
950 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
951 else
952 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
953
954 priv->band = band;
955
956 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
957
958 return 0;
959 }
960
961 /**
962 * iwl4965_check_rxon_cmd - validate RXON structure is valid
963 *
964 * NOTE: This is really only useful during development and can eventually
965 * be #ifdef'd out once the driver is stable and folks aren't actively
966 * making changes
967 */
968 static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
969 {
970 int error = 0;
971 int counter = 1;
972
973 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
974 error |= le32_to_cpu(rxon->flags &
975 (RXON_FLG_TGJ_NARROW_BAND_MSK |
976 RXON_FLG_RADAR_DETECT_MSK));
977 if (error)
978 IWL_WARNING("check 24G fields %d | %d\n",
979 counter++, error);
980 } else {
981 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
982 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
983 if (error)
984 IWL_WARNING("check 52 fields %d | %d\n",
985 counter++, error);
986 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
987 if (error)
988 IWL_WARNING("check 52 CCK %d | %d\n",
989 counter++, error);
990 }
991 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
992 if (error)
993 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
994
995 /* make sure basic rates 6Mbps and 1Mbps are supported */
996 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
997 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
998 if (error)
999 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
1000
1001 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
1002 if (error)
1003 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
1004
1005 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
1006 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
1007 if (error)
1008 IWL_WARNING("check CCK and short slot %d | %d\n",
1009 counter++, error);
1010
1011 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
1012 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
1013 if (error)
1014 IWL_WARNING("check CCK & auto detect %d | %d\n",
1015 counter++, error);
1016
1017 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
1018 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
1019 if (error)
1020 IWL_WARNING("check TGG and auto detect %d | %d\n",
1021 counter++, error);
1022
1023 if (error)
1024 IWL_WARNING("Tuning to channel %d\n",
1025 le16_to_cpu(rxon->channel));
1026
1027 if (error) {
1028 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
1029 return -1;
1030 }
1031 return 0;
1032 }
1033
1034 /**
1035 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
1036 * @priv: staging_rxon is compared to active_rxon
1037 *
1038 * If the RXON structure is changing enough to require a new tune,
1039 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1040 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1041 */
1042 static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
1043 {
1044
1045 /* These items are only settable from the full RXON command */
1046 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1047 compare_ether_addr(priv->staging_rxon.bssid_addr,
1048 priv->active_rxon.bssid_addr) ||
1049 compare_ether_addr(priv->staging_rxon.node_addr,
1050 priv->active_rxon.node_addr) ||
1051 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1052 priv->active_rxon.wlap_bssid_addr) ||
1053 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1054 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1055 (priv->staging_rxon.air_propagation !=
1056 priv->active_rxon.air_propagation) ||
1057 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1058 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1059 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1060 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1061 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1062 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1063 return 1;
1064
1065 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1066 * be updated with the RXON_ASSOC command -- however only some
1067 * flag transitions are allowed using RXON_ASSOC */
1068
1069 /* Check if we are not switching bands */
1070 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1071 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1072 return 1;
1073
1074 /* Check if we are switching association toggle */
1075 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1076 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1077 return 1;
1078
1079 return 0;
1080 }
1081
1082 static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
1083 {
1084 int rc = 0;
1085 struct iwl4965_rx_packet *res = NULL;
1086 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1087 struct iwl4965_host_cmd cmd = {
1088 .id = REPLY_RXON_ASSOC,
1089 .len = sizeof(rxon_assoc),
1090 .meta.flags = CMD_WANT_SKB,
1091 .data = &rxon_assoc,
1092 };
1093 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1094 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
1095
1096 if ((rxon1->flags == rxon2->flags) &&
1097 (rxon1->filter_flags == rxon2->filter_flags) &&
1098 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1099 (rxon1->ofdm_ht_single_stream_basic_rates ==
1100 rxon2->ofdm_ht_single_stream_basic_rates) &&
1101 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1102 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1103 (rxon1->rx_chain == rxon2->rx_chain) &&
1104 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1105 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1106 return 0;
1107 }
1108
1109 rxon_assoc.flags = priv->staging_rxon.flags;
1110 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1111 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1112 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1113 rxon_assoc.reserved = 0;
1114 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1115 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1116 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1117 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1118 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1119
1120 rc = iwl4965_send_cmd_sync(priv, &cmd);
1121 if (rc)
1122 return rc;
1123
1124 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1125 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1126 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1127 rc = -EIO;
1128 }
1129
1130 priv->alloc_rxb_skb--;
1131 dev_kfree_skb_any(cmd.meta.u.skb);
1132
1133 return rc;
1134 }
1135
1136 /**
1137 * iwl4965_commit_rxon - commit staging_rxon to hardware
1138 *
1139 * The RXON command in staging_rxon is committed to the hardware and
1140 * the active_rxon structure is updated with the new data. This
1141 * function correctly transitions out of the RXON_ASSOC_MSK state if
1142 * a HW tune is required based on the RXON structure changes.
1143 */
1144 static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
1145 {
1146 /* cast away the const for active_rxon in this function */
1147 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1148 DECLARE_MAC_BUF(mac);
1149 int rc = 0;
1150
1151 if (!iwl4965_is_alive(priv))
1152 return -1;
1153
1154 /* always get timestamp with Rx frame */
1155 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1156
1157 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
1158 if (rc) {
1159 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1160 return -EINVAL;
1161 }
1162
1163 /* If we don't need to send a full RXON, we can use
1164 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
1165 * and other flags for the current radio configuration. */
1166 if (!iwl4965_full_rxon_required(priv)) {
1167 rc = iwl4965_send_rxon_assoc(priv);
1168 if (rc) {
1169 IWL_ERROR("Error setting RXON_ASSOC "
1170 "configuration (%d).\n", rc);
1171 return rc;
1172 }
1173
1174 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1175
1176 return 0;
1177 }
1178
1179 /* station table will be cleared */
1180 priv->assoc_station_added = 0;
1181
1182 #ifdef CONFIG_IWL4965_SENSITIVITY
1183 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1184 if (!priv->error_recovering)
1185 priv->start_calib = 0;
1186
1187 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1188 #endif /* CONFIG_IWL4965_SENSITIVITY */
1189
1190 /* If we are currently associated and the new config requires
1191 * an RXON_ASSOC and the new config wants the associated mask enabled,
1192 * we must clear the associated from the active configuration
1193 * before we apply the new config */
1194 if (iwl4965_is_associated(priv) &&
1195 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1196 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1197 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1198
1199 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1200 sizeof(struct iwl4965_rxon_cmd),
1201 &priv->active_rxon);
1202
1203 /* If the mask clearing failed then we set
1204 * active_rxon back to what it was previously */
1205 if (rc) {
1206 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1207 IWL_ERROR("Error clearing ASSOC_MSK on current "
1208 "configuration (%d).\n", rc);
1209 return rc;
1210 }
1211 }
1212
1213 IWL_DEBUG_INFO("Sending RXON\n"
1214 "* with%s RXON_FILTER_ASSOC_MSK\n"
1215 "* channel = %d\n"
1216 "* bssid = %s\n",
1217 ((priv->staging_rxon.filter_flags &
1218 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1219 le16_to_cpu(priv->staging_rxon.channel),
1220 print_mac(mac, priv->staging_rxon.bssid_addr));
1221
1222 /* Apply the new configuration */
1223 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1224 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
1225 if (rc) {
1226 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1227 return rc;
1228 }
1229
1230 iwl4965_clear_stations_table(priv);
1231
1232 #ifdef CONFIG_IWL4965_SENSITIVITY
1233 if (!priv->error_recovering)
1234 priv->start_calib = 0;
1235
1236 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1237 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
1238 #endif /* CONFIG_IWL4965_SENSITIVITY */
1239
1240 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1241
1242 /* If we issue a new RXON command which required a tune then we must
1243 * send a new TXPOWER command or we won't be able to Tx any frames */
1244 rc = iwl4965_hw_reg_send_txpower(priv);
1245 if (rc) {
1246 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1247 return rc;
1248 }
1249
1250 /* Add the broadcast address so we can send broadcast frames */
1251 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
1252 IWL_INVALID_STATION) {
1253 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1254 return -EIO;
1255 }
1256
1257 /* If we have set the ASSOC_MSK and we are in BSS mode then
1258 * add the IWL_AP_ID to the station rate table */
1259 if (iwl4965_is_associated(priv) &&
1260 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
1261 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
1262 == IWL_INVALID_STATION) {
1263 IWL_ERROR("Error adding AP address for transmit.\n");
1264 return -EIO;
1265 }
1266 priv->assoc_station_added = 1;
1267 }
1268
1269 return 0;
1270 }
1271
1272 static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
1273 {
1274 struct iwl4965_bt_cmd bt_cmd = {
1275 .flags = 3,
1276 .lead_time = 0xAA,
1277 .max_kill = 1,
1278 .kill_ack_mask = 0,
1279 .kill_cts_mask = 0,
1280 };
1281
1282 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1283 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
1284 }
1285
1286 static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
1287 {
1288 int rc = 0;
1289 struct iwl4965_rx_packet *res;
1290 struct iwl4965_host_cmd cmd = {
1291 .id = REPLY_SCAN_ABORT_CMD,
1292 .meta.flags = CMD_WANT_SKB,
1293 };
1294
1295 /* If there isn't a scan actively going on in the hardware
1296 * then we are in between scan bands and not actually
1297 * actively scanning, so don't send the abort command */
1298 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1299 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1300 return 0;
1301 }
1302
1303 rc = iwl4965_send_cmd_sync(priv, &cmd);
1304 if (rc) {
1305 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1306 return rc;
1307 }
1308
1309 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1310 if (res->u.status != CAN_ABORT_STATUS) {
1311 /* The scan abort will return 1 for success or
1312 * 2 for "failure". A failure condition can be
1313 * due to simply not being in an active scan which
1314 * can occur if we send the scan abort before we
1315 * the microcode has notified us that a scan is
1316 * completed. */
1317 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1318 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1319 clear_bit(STATUS_SCAN_HW, &priv->status);
1320 }
1321
1322 dev_kfree_skb_any(cmd.meta.u.skb);
1323
1324 return rc;
1325 }
1326
1327 static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
1328 struct iwl4965_cmd *cmd,
1329 struct sk_buff *skb)
1330 {
1331 return 1;
1332 }
1333
1334 /*
1335 * CARD_STATE_CMD
1336 *
1337 * Use: Sets the device's internal card state to enable, disable, or halt
1338 *
1339 * When in the 'enable' state the card operates as normal.
1340 * When in the 'disable' state, the card enters into a low power mode.
1341 * When in the 'halt' state, the card is shut down and must be fully
1342 * restarted to come back on.
1343 */
1344 static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
1345 {
1346 struct iwl4965_host_cmd cmd = {
1347 .id = REPLY_CARD_STATE_CMD,
1348 .len = sizeof(u32),
1349 .data = &flags,
1350 .meta.flags = meta_flag,
1351 };
1352
1353 if (meta_flag & CMD_ASYNC)
1354 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
1355
1356 return iwl4965_send_cmd(priv, &cmd);
1357 }
1358
1359 static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
1360 struct iwl4965_cmd *cmd, struct sk_buff *skb)
1361 {
1362 struct iwl4965_rx_packet *res = NULL;
1363
1364 if (!skb) {
1365 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1366 return 1;
1367 }
1368
1369 res = (struct iwl4965_rx_packet *)skb->data;
1370 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1371 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1372 res->hdr.flags);
1373 return 1;
1374 }
1375
1376 switch (res->u.add_sta.status) {
1377 case ADD_STA_SUCCESS_MSK:
1378 break;
1379 default:
1380 break;
1381 }
1382
1383 /* We didn't cache the SKB; let the caller free it */
1384 return 1;
1385 }
1386
1387 int iwl4965_send_add_station(struct iwl4965_priv *priv,
1388 struct iwl4965_addsta_cmd *sta, u8 flags)
1389 {
1390 struct iwl4965_rx_packet *res = NULL;
1391 int rc = 0;
1392 struct iwl4965_host_cmd cmd = {
1393 .id = REPLY_ADD_STA,
1394 .len = sizeof(struct iwl4965_addsta_cmd),
1395 .meta.flags = flags,
1396 .data = sta,
1397 };
1398
1399 if (flags & CMD_ASYNC)
1400 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
1401 else
1402 cmd.meta.flags |= CMD_WANT_SKB;
1403
1404 rc = iwl4965_send_cmd(priv, &cmd);
1405
1406 if (rc || (flags & CMD_ASYNC))
1407 return rc;
1408
1409 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
1410 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1411 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1412 res->hdr.flags);
1413 rc = -EIO;
1414 }
1415
1416 if (rc == 0) {
1417 switch (res->u.add_sta.status) {
1418 case ADD_STA_SUCCESS_MSK:
1419 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1420 break;
1421 default:
1422 rc = -EIO;
1423 IWL_WARNING("REPLY_ADD_STA failed\n");
1424 break;
1425 }
1426 }
1427
1428 priv->alloc_rxb_skb--;
1429 dev_kfree_skb_any(cmd.meta.u.skb);
1430
1431 return rc;
1432 }
1433
1434 static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
1435 struct ieee80211_key_conf *keyconf,
1436 u8 sta_id)
1437 {
1438 unsigned long flags;
1439 __le16 key_flags = 0;
1440
1441 switch (keyconf->alg) {
1442 case ALG_CCMP:
1443 key_flags |= STA_KEY_FLG_CCMP;
1444 key_flags |= cpu_to_le16(
1445 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1446 key_flags &= ~STA_KEY_FLG_INVALID;
1447 break;
1448 case ALG_TKIP:
1449 case ALG_WEP:
1450 default:
1451 return -EINVAL;
1452 }
1453 spin_lock_irqsave(&priv->sta_lock, flags);
1454 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1455 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1456 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1457 keyconf->keylen);
1458
1459 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1460 keyconf->keylen);
1461 priv->stations[sta_id].sta.key.key_flags = key_flags;
1462 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1463 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1464
1465 spin_unlock_irqrestore(&priv->sta_lock, flags);
1466
1467 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1468 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1469 return 0;
1470 }
1471
1472 static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
1473 {
1474 unsigned long flags;
1475
1476 spin_lock_irqsave(&priv->sta_lock, flags);
1477 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1478 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
1479 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1480 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1481 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1482 spin_unlock_irqrestore(&priv->sta_lock, flags);
1483
1484 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1485 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1486 return 0;
1487 }
1488
1489 static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
1490 {
1491 struct list_head *element;
1492
1493 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1494 priv->frames_count);
1495
1496 while (!list_empty(&priv->free_frames)) {
1497 element = priv->free_frames.next;
1498 list_del(element);
1499 kfree(list_entry(element, struct iwl4965_frame, list));
1500 priv->frames_count--;
1501 }
1502
1503 if (priv->frames_count) {
1504 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1505 priv->frames_count);
1506 priv->frames_count = 0;
1507 }
1508 }
1509
1510 static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
1511 {
1512 struct iwl4965_frame *frame;
1513 struct list_head *element;
1514 if (list_empty(&priv->free_frames)) {
1515 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1516 if (!frame) {
1517 IWL_ERROR("Could not allocate frame!\n");
1518 return NULL;
1519 }
1520
1521 priv->frames_count++;
1522 return frame;
1523 }
1524
1525 element = priv->free_frames.next;
1526 list_del(element);
1527 return list_entry(element, struct iwl4965_frame, list);
1528 }
1529
1530 static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
1531 {
1532 memset(frame, 0, sizeof(*frame));
1533 list_add(&frame->list, &priv->free_frames);
1534 }
1535
1536 unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
1537 struct ieee80211_hdr *hdr,
1538 const u8 *dest, int left)
1539 {
1540
1541 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
1542 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1543 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1544 return 0;
1545
1546 if (priv->ibss_beacon->len > left)
1547 return 0;
1548
1549 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1550
1551 return priv->ibss_beacon->len;
1552 }
1553
1554 int iwl4965_rate_index_from_plcp(int plcp)
1555 {
1556 int i = 0;
1557
1558 /* 4965 HT rate format */
1559 if (plcp & RATE_MCS_HT_MSK) {
1560 i = (plcp & 0xff);
1561
1562 if (i >= IWL_RATE_MIMO_6M_PLCP)
1563 i = i - IWL_RATE_MIMO_6M_PLCP;
1564
1565 i += IWL_FIRST_OFDM_RATE;
1566 /* skip 9M not supported in ht*/
1567 if (i >= IWL_RATE_9M_INDEX)
1568 i += 1;
1569 if ((i >= IWL_FIRST_OFDM_RATE) &&
1570 (i <= IWL_LAST_OFDM_RATE))
1571 return i;
1572
1573 /* 4965 legacy rate format, search for match in table */
1574 } else {
1575 for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
1576 if (iwl4965_rates[i].plcp == (plcp &0xFF))
1577 return i;
1578 }
1579 return -1;
1580 }
1581
1582 static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
1583 {
1584 u8 i;
1585
1586 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1587 i = iwl4965_rates[i].next_ieee) {
1588 if (rate_mask & (1 << i))
1589 return iwl4965_rates[i].plcp;
1590 }
1591
1592 return IWL_RATE_INVALID;
1593 }
1594
1595 static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
1596 {
1597 struct iwl4965_frame *frame;
1598 unsigned int frame_size;
1599 int rc;
1600 u8 rate;
1601
1602 frame = iwl4965_get_free_frame(priv);
1603
1604 if (!frame) {
1605 IWL_ERROR("Could not obtain free frame buffer for beacon "
1606 "command.\n");
1607 return -ENOMEM;
1608 }
1609
1610 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1611 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
1612 0xFF0);
1613 if (rate == IWL_INVALID_RATE)
1614 rate = IWL_RATE_6M_PLCP;
1615 } else {
1616 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1617 if (rate == IWL_INVALID_RATE)
1618 rate = IWL_RATE_1M_PLCP;
1619 }
1620
1621 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
1622
1623 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1624 &frame->u.cmd[0]);
1625
1626 iwl4965_free_frame(priv, frame);
1627
1628 return rc;
1629 }
1630
1631 /******************************************************************************
1632 *
1633 * EEPROM related functions
1634 *
1635 ******************************************************************************/
1636
1637 static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
1638 {
1639 memcpy(mac, priv->eeprom.mac_address, 6);
1640 }
1641
1642 static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
1643 {
1644 iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1645 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
1646 }
1647
1648 /**
1649 * iwl4965_eeprom_init - read EEPROM contents
1650 *
1651 * Load the EEPROM contents from adapter into priv->eeprom
1652 *
1653 * NOTE: This routine uses the non-debug IO access functions.
1654 */
1655 int iwl4965_eeprom_init(struct iwl4965_priv *priv)
1656 {
1657 u16 *e = (u16 *)&priv->eeprom;
1658 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
1659 u32 r;
1660 int sz = sizeof(priv->eeprom);
1661 int rc;
1662 int i;
1663 u16 addr;
1664
1665 /* The EEPROM structure has several padding buffers within it
1666 * and when adding new EEPROM maps is subject to programmer errors
1667 * which may be very difficult to identify without explicitly
1668 * checking the resulting size of the eeprom map. */
1669 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1670
1671 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1672 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1673 return -ENOENT;
1674 }
1675
1676 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1677 rc = iwl4965_eeprom_acquire_semaphore(priv);
1678 if (rc < 0) {
1679 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1680 return -ENOENT;
1681 }
1682
1683 /* eeprom is an array of 16bit values */
1684 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1685 _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
1686 _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1687
1688 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1689 i += IWL_EEPROM_ACCESS_DELAY) {
1690 r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
1691 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1692 break;
1693 udelay(IWL_EEPROM_ACCESS_DELAY);
1694 }
1695
1696 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1697 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1698 rc = -ETIMEDOUT;
1699 goto done;
1700 }
1701 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1702 }
1703 rc = 0;
1704
1705 done:
1706 iwl4965_eeprom_release_semaphore(priv);
1707 return rc;
1708 }
1709
1710 /******************************************************************************
1711 *
1712 * Misc. internal state and helper functions
1713 *
1714 ******************************************************************************/
1715 #ifdef CONFIG_IWL4965_DEBUG
1716
1717 /**
1718 * iwl4965_report_frame - dump frame to syslog during debug sessions
1719 *
1720 * You may hack this function to show different aspects of received frames,
1721 * including selective frame dumps.
1722 * group100 parameter selects whether to show 1 out of 100 good frames.
1723 *
1724 * TODO: This was originally written for 3945, need to audit for
1725 * proper operation with 4965.
1726 */
1727 void iwl4965_report_frame(struct iwl4965_priv *priv,
1728 struct iwl4965_rx_packet *pkt,
1729 struct ieee80211_hdr *header, int group100)
1730 {
1731 u32 to_us;
1732 u32 print_summary = 0;
1733 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1734 u32 hundred = 0;
1735 u32 dataframe = 0;
1736 u16 fc;
1737 u16 seq_ctl;
1738 u16 channel;
1739 u16 phy_flags;
1740 int rate_sym;
1741 u16 length;
1742 u16 status;
1743 u16 bcn_tmr;
1744 u32 tsf_low;
1745 u64 tsf;
1746 u8 rssi;
1747 u8 agc;
1748 u16 sig_avg;
1749 u16 noise_diff;
1750 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1751 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1752 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
1753 u8 *data = IWL_RX_DATA(pkt);
1754
1755 /* MAC header */
1756 fc = le16_to_cpu(header->frame_control);
1757 seq_ctl = le16_to_cpu(header->seq_ctrl);
1758
1759 /* metadata */
1760 channel = le16_to_cpu(rx_hdr->channel);
1761 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1762 rate_sym = rx_hdr->rate;
1763 length = le16_to_cpu(rx_hdr->len);
1764
1765 /* end-of-frame status and timestamp */
1766 status = le32_to_cpu(rx_end->status);
1767 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1768 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1769 tsf = le64_to_cpu(rx_end->timestamp);
1770
1771 /* signal statistics */
1772 rssi = rx_stats->rssi;
1773 agc = rx_stats->agc;
1774 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1775 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1776
1777 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1778
1779 /* if data frame is to us and all is good,
1780 * (optionally) print summary for only 1 out of every 100 */
1781 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1782 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1783 dataframe = 1;
1784 if (!group100)
1785 print_summary = 1; /* print each frame */
1786 else if (priv->framecnt_to_us < 100) {
1787 priv->framecnt_to_us++;
1788 print_summary = 0;
1789 } else {
1790 priv->framecnt_to_us = 0;
1791 print_summary = 1;
1792 hundred = 1;
1793 }
1794 } else {
1795 /* print summary for all other frames */
1796 print_summary = 1;
1797 }
1798
1799 if (print_summary) {
1800 char *title;
1801 u32 rate;
1802
1803 if (hundred)
1804 title = "100Frames";
1805 else if (fc & IEEE80211_FCTL_RETRY)
1806 title = "Retry";
1807 else if (ieee80211_is_assoc_response(fc))
1808 title = "AscRsp";
1809 else if (ieee80211_is_reassoc_response(fc))
1810 title = "RasRsp";
1811 else if (ieee80211_is_probe_response(fc)) {
1812 title = "PrbRsp";
1813 print_dump = 1; /* dump frame contents */
1814 } else if (ieee80211_is_beacon(fc)) {
1815 title = "Beacon";
1816 print_dump = 1; /* dump frame contents */
1817 } else if (ieee80211_is_atim(fc))
1818 title = "ATIM";
1819 else if (ieee80211_is_auth(fc))
1820 title = "Auth";
1821 else if (ieee80211_is_deauth(fc))
1822 title = "DeAuth";
1823 else if (ieee80211_is_disassoc(fc))
1824 title = "DisAssoc";
1825 else
1826 title = "Frame";
1827
1828 rate = iwl4965_rate_index_from_plcp(rate_sym);
1829 if (rate == -1)
1830 rate = 0;
1831 else
1832 rate = iwl4965_rates[rate].ieee / 2;
1833
1834 /* print frame summary.
1835 * MAC addresses show just the last byte (for brevity),
1836 * but you can hack it to show more, if you'd like to. */
1837 if (dataframe)
1838 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1839 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1840 title, fc, header->addr1[5],
1841 length, rssi, channel, rate);
1842 else {
1843 /* src/dst addresses assume managed mode */
1844 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1845 "src=0x%02x, rssi=%u, tim=%lu usec, "
1846 "phy=0x%02x, chnl=%d\n",
1847 title, fc, header->addr1[5],
1848 header->addr3[5], rssi,
1849 tsf_low - priv->scan_start_tsf,
1850 phy_flags, channel);
1851 }
1852 }
1853 if (print_dump)
1854 iwl4965_print_hex_dump(IWL_DL_RX, data, length);
1855 }
1856 #endif
1857
1858 static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
1859 {
1860 if (priv->hw_setting.shared_virt)
1861 pci_free_consistent(priv->pci_dev,
1862 sizeof(struct iwl4965_shared),
1863 priv->hw_setting.shared_virt,
1864 priv->hw_setting.shared_phys);
1865 }
1866
1867 /**
1868 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
1869 *
1870 * return : set the bit for each supported rate insert in ie
1871 */
1872 static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1873 u16 basic_rate, int *left)
1874 {
1875 u16 ret_rates = 0, bit;
1876 int i;
1877 u8 *cnt = ie;
1878 u8 *rates = ie + 1;
1879
1880 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1881 if (bit & supported_rate) {
1882 ret_rates |= bit;
1883 rates[*cnt] = iwl4965_rates[i].ieee |
1884 ((bit & basic_rate) ? 0x80 : 0x00);
1885 (*cnt)++;
1886 (*left)--;
1887 if ((*left <= 0) ||
1888 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1889 break;
1890 }
1891 }
1892
1893 return ret_rates;
1894 }
1895
1896 /**
1897 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
1898 */
1899 static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
1900 enum ieee80211_band band,
1901 struct ieee80211_mgmt *frame,
1902 int left, int is_direct)
1903 {
1904 int len = 0;
1905 u8 *pos = NULL;
1906 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
1907 #ifdef CONFIG_IWL4965_HT
1908 const struct ieee80211_supported_band *sband =
1909 iwl4965_get_hw_mode(priv, band);
1910 #endif /* CONFIG_IWL4965_HT */
1911
1912 /* Make sure there is enough space for the probe request,
1913 * two mandatory IEs and the data */
1914 left -= 24;
1915 if (left < 0)
1916 return 0;
1917 len += 24;
1918
1919 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1920 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
1921 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1922 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
1923 frame->seq_ctrl = 0;
1924
1925 /* fill in our indirect SSID IE */
1926 /* ...next IE... */
1927
1928 left -= 2;
1929 if (left < 0)
1930 return 0;
1931 len += 2;
1932 pos = &(frame->u.probe_req.variable[0]);
1933 *pos++ = WLAN_EID_SSID;
1934 *pos++ = 0;
1935
1936 /* fill in our direct SSID IE... */
1937 if (is_direct) {
1938 /* ...next IE... */
1939 left -= 2 + priv->essid_len;
1940 if (left < 0)
1941 return 0;
1942 /* ... fill it in... */
1943 *pos++ = WLAN_EID_SSID;
1944 *pos++ = priv->essid_len;
1945 memcpy(pos, priv->essid, priv->essid_len);
1946 pos += priv->essid_len;
1947 len += 2 + priv->essid_len;
1948 }
1949
1950 /* fill in supported rate */
1951 /* ...next IE... */
1952 left -= 2;
1953 if (left < 0)
1954 return 0;
1955
1956 /* ... fill it in... */
1957 *pos++ = WLAN_EID_SUPP_RATES;
1958 *pos = 0;
1959
1960 /* exclude 60M rate */
1961 active_rates = priv->rates_mask;
1962 active_rates &= ~IWL_RATE_60M_MASK;
1963
1964 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
1965
1966 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1967 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
1968 active_rate_basic, &left);
1969 active_rates &= ~ret_rates;
1970
1971 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
1972 active_rate_basic, &left);
1973 active_rates &= ~ret_rates;
1974
1975 len += 2 + *pos;
1976 pos += (*pos) + 1;
1977 if (active_rates == 0)
1978 goto fill_end;
1979
1980 /* fill in supported extended rate */
1981 /* ...next IE... */
1982 left -= 2;
1983 if (left < 0)
1984 return 0;
1985 /* ... fill it in... */
1986 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1987 *pos = 0;
1988 iwl4965_supported_rate_to_ie(pos, active_rates,
1989 active_rate_basic, &left);
1990 if (*pos > 0)
1991 len += 2 + *pos;
1992
1993 #ifdef CONFIG_IWL4965_HT
1994 if (sband && sband->ht_info.ht_supported) {
1995 struct ieee80211_ht_cap *ht_cap;
1996 pos += (*pos) + 1;
1997 *pos++ = WLAN_EID_HT_CAPABILITY;
1998 *pos++ = sizeof(struct ieee80211_ht_cap);
1999 ht_cap = (struct ieee80211_ht_cap *)pos;
2000 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
2001 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
2002 ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
2003 IEEE80211_HT_CAP_AMPDU_FACTOR) |
2004 ((sband->ht_info.ampdu_density << 2) &
2005 IEEE80211_HT_CAP_AMPDU_DENSITY);
2006 len += 2 + sizeof(struct ieee80211_ht_cap);
2007 }
2008 #endif /*CONFIG_IWL4965_HT */
2009
2010 fill_end:
2011 return (u16)len;
2012 }
2013
2014 /*
2015 * QoS support
2016 */
2017 #ifdef CONFIG_IWL4965_QOS
2018 static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
2019 struct iwl4965_qosparam_cmd *qos)
2020 {
2021
2022 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
2023 sizeof(struct iwl4965_qosparam_cmd), qos);
2024 }
2025
2026 static void iwl4965_reset_qos(struct iwl4965_priv *priv)
2027 {
2028 u16 cw_min = 15;
2029 u16 cw_max = 1023;
2030 u8 aifs = 2;
2031 u8 is_legacy = 0;
2032 unsigned long flags;
2033 int i;
2034
2035 spin_lock_irqsave(&priv->lock, flags);
2036 priv->qos_data.qos_active = 0;
2037
2038 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
2039 if (priv->qos_data.qos_enable)
2040 priv->qos_data.qos_active = 1;
2041 if (!(priv->active_rate & 0xfff0)) {
2042 cw_min = 31;
2043 is_legacy = 1;
2044 }
2045 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2046 if (priv->qos_data.qos_enable)
2047 priv->qos_data.qos_active = 1;
2048 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
2049 cw_min = 31;
2050 is_legacy = 1;
2051 }
2052
2053 if (priv->qos_data.qos_active)
2054 aifs = 3;
2055
2056 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
2057 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
2058 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
2059 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
2060 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
2061
2062 if (priv->qos_data.qos_active) {
2063 i = 1;
2064 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
2065 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
2066 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
2067 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2068 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2069
2070 i = 2;
2071 priv->qos_data.def_qos_parm.ac[i].cw_min =
2072 cpu_to_le16((cw_min + 1) / 2 - 1);
2073 priv->qos_data.def_qos_parm.ac[i].cw_max =
2074 cpu_to_le16(cw_max);
2075 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2076 if (is_legacy)
2077 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2078 cpu_to_le16(6016);
2079 else
2080 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2081 cpu_to_le16(3008);
2082 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2083
2084 i = 3;
2085 priv->qos_data.def_qos_parm.ac[i].cw_min =
2086 cpu_to_le16((cw_min + 1) / 4 - 1);
2087 priv->qos_data.def_qos_parm.ac[i].cw_max =
2088 cpu_to_le16((cw_max + 1) / 2 - 1);
2089 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2090 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2091 if (is_legacy)
2092 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2093 cpu_to_le16(3264);
2094 else
2095 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2096 cpu_to_le16(1504);
2097 } else {
2098 for (i = 1; i < 4; i++) {
2099 priv->qos_data.def_qos_parm.ac[i].cw_min =
2100 cpu_to_le16(cw_min);
2101 priv->qos_data.def_qos_parm.ac[i].cw_max =
2102 cpu_to_le16(cw_max);
2103 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2104 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2105 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2106 }
2107 }
2108 IWL_DEBUG_QOS("set QoS to default \n");
2109
2110 spin_unlock_irqrestore(&priv->lock, flags);
2111 }
2112
2113 static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
2114 {
2115 unsigned long flags;
2116
2117 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2118 return;
2119
2120 if (!priv->qos_data.qos_enable)
2121 return;
2122
2123 spin_lock_irqsave(&priv->lock, flags);
2124 priv->qos_data.def_qos_parm.qos_flags = 0;
2125
2126 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2127 !priv->qos_data.qos_cap.q_AP.txop_request)
2128 priv->qos_data.def_qos_parm.qos_flags |=
2129 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2130 if (priv->qos_data.qos_active)
2131 priv->qos_data.def_qos_parm.qos_flags |=
2132 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2133
2134 #ifdef CONFIG_IWL4965_HT
2135 if (priv->current_ht_config.is_ht)
2136 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
2137 #endif /* CONFIG_IWL4965_HT */
2138
2139 spin_unlock_irqrestore(&priv->lock, flags);
2140
2141 if (force || iwl4965_is_associated(priv)) {
2142 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
2143 priv->qos_data.qos_active,
2144 priv->qos_data.def_qos_parm.qos_flags);
2145
2146 iwl4965_send_qos_params_command(priv,
2147 &(priv->qos_data.def_qos_parm));
2148 }
2149 }
2150
2151 #endif /* CONFIG_IWL4965_QOS */
2152 /*
2153 * Power management (not Tx power!) functions
2154 */
2155 #define MSEC_TO_USEC 1024
2156
2157 #define NOSLP __constant_cpu_to_le16(0), 0, 0
2158 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
2159 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2160 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2161 __constant_cpu_to_le32(X1), \
2162 __constant_cpu_to_le32(X2), \
2163 __constant_cpu_to_le32(X3), \
2164 __constant_cpu_to_le32(X4)}
2165
2166
2167 /* default power management (not Tx power) table values */
2168 /* for tim 0-10 */
2169 static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
2170 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2171 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2172 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2173 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2174 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2175 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2176 };
2177
2178 /* for tim > 10 */
2179 static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
2180 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2181 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2182 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2183 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2184 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2185 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2186 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2187 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2188 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2189 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2190 };
2191
2192 int iwl4965_power_init_handle(struct iwl4965_priv *priv)
2193 {
2194 int rc = 0, i;
2195 struct iwl4965_power_mgr *pow_data;
2196 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
2197 u16 pci_pm;
2198
2199 IWL_DEBUG_POWER("Initialize power \n");
2200
2201 pow_data = &(priv->power_data);
2202
2203 memset(pow_data, 0, sizeof(*pow_data));
2204
2205 pow_data->active_index = IWL_POWER_RANGE_0;
2206 pow_data->dtim_val = 0xffff;
2207
2208 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2209 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2210
2211 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2212 if (rc != 0)
2213 return 0;
2214 else {
2215 struct iwl4965_powertable_cmd *cmd;
2216
2217 IWL_DEBUG_POWER("adjust power command flags\n");
2218
2219 for (i = 0; i < IWL_POWER_AC; i++) {
2220 cmd = &pow_data->pwr_range_0[i].cmd;
2221
2222 if (pci_pm & 0x1)
2223 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2224 else
2225 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2226 }
2227 }
2228 return rc;
2229 }
2230
2231 static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
2232 struct iwl4965_powertable_cmd *cmd, u32 mode)
2233 {
2234 int rc = 0, i;
2235 u8 skip;
2236 u32 max_sleep = 0;
2237 struct iwl4965_power_vec_entry *range;
2238 u8 period = 0;
2239 struct iwl4965_power_mgr *pow_data;
2240
2241 if (mode > IWL_POWER_INDEX_5) {
2242 IWL_DEBUG_POWER("Error invalid power mode \n");
2243 return -1;
2244 }
2245 pow_data = &(priv->power_data);
2246
2247 if (pow_data->active_index == IWL_POWER_RANGE_0)
2248 range = &pow_data->pwr_range_0[0];
2249 else
2250 range = &pow_data->pwr_range_1[1];
2251
2252 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
2253
2254 #ifdef IWL_MAC80211_DISABLE
2255 if (priv->assoc_network != NULL) {
2256 unsigned long flags;
2257
2258 period = priv->assoc_network->tim.tim_period;
2259 }
2260 #endif /*IWL_MAC80211_DISABLE */
2261 skip = range[mode].no_dtim;
2262
2263 if (period == 0) {
2264 period = 1;
2265 skip = 0;
2266 }
2267
2268 if (skip == 0) {
2269 max_sleep = period;
2270 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2271 } else {
2272 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2273 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2274 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2275 }
2276
2277 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2278 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2279 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2280 }
2281
2282 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2283 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2284 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2285 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2286 le32_to_cpu(cmd->sleep_interval[0]),
2287 le32_to_cpu(cmd->sleep_interval[1]),
2288 le32_to_cpu(cmd->sleep_interval[2]),
2289 le32_to_cpu(cmd->sleep_interval[3]),
2290 le32_to_cpu(cmd->sleep_interval[4]));
2291
2292 return rc;
2293 }
2294
2295 static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
2296 {
2297 u32 uninitialized_var(final_mode);
2298 int rc;
2299 struct iwl4965_powertable_cmd cmd;
2300
2301 /* If on battery, set to 3,
2302 * if plugged into AC power, set to CAM ("continuously aware mode"),
2303 * else user level */
2304 switch (mode) {
2305 case IWL_POWER_BATTERY:
2306 final_mode = IWL_POWER_INDEX_3;
2307 break;
2308 case IWL_POWER_AC:
2309 final_mode = IWL_POWER_MODE_CAM;
2310 break;
2311 default:
2312 final_mode = mode;
2313 break;
2314 }
2315
2316 cmd.keep_alive_beacons = 0;
2317
2318 iwl4965_update_power_cmd(priv, &cmd, final_mode);
2319
2320 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2321
2322 if (final_mode == IWL_POWER_MODE_CAM)
2323 clear_bit(STATUS_POWER_PMI, &priv->status);
2324 else
2325 set_bit(STATUS_POWER_PMI, &priv->status);
2326
2327 return rc;
2328 }
2329
2330 int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
2331 {
2332 /* Filter incoming packets to determine if they are targeted toward
2333 * this network, discarding packets coming from ourselves */
2334 switch (priv->iw_mode) {
2335 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2336 /* packets from our adapter are dropped (echo) */
2337 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2338 return 0;
2339 /* {broad,multi}cast packets to our IBSS go through */
2340 if (is_multicast_ether_addr(header->addr1))
2341 return !compare_ether_addr(header->addr3, priv->bssid);
2342 /* packets to our adapter go through */
2343 return !compare_ether_addr(header->addr1, priv->mac_addr);
2344 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2345 /* packets from our adapter are dropped (echo) */
2346 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2347 return 0;
2348 /* {broad,multi}cast packets to our BSS go through */
2349 if (is_multicast_ether_addr(header->addr1))
2350 return !compare_ether_addr(header->addr2, priv->bssid);
2351 /* packets to our adapter go through */
2352 return !compare_ether_addr(header->addr1, priv->mac_addr);
2353 }
2354
2355 return 1;
2356 }
2357
2358 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2359
2360 static const char *iwl4965_get_tx_fail_reason(u32 status)
2361 {
2362 switch (status & TX_STATUS_MSK) {
2363 case TX_STATUS_SUCCESS:
2364 return "SUCCESS";
2365 TX_STATUS_ENTRY(SHORT_LIMIT);
2366 TX_STATUS_ENTRY(LONG_LIMIT);
2367 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2368 TX_STATUS_ENTRY(MGMNT_ABORT);
2369 TX_STATUS_ENTRY(NEXT_FRAG);
2370 TX_STATUS_ENTRY(LIFE_EXPIRE);
2371 TX_STATUS_ENTRY(DEST_PS);
2372 TX_STATUS_ENTRY(ABORTED);
2373 TX_STATUS_ENTRY(BT_RETRY);
2374 TX_STATUS_ENTRY(STA_INVALID);
2375 TX_STATUS_ENTRY(FRAG_DROPPED);
2376 TX_STATUS_ENTRY(TID_DISABLE);
2377 TX_STATUS_ENTRY(FRAME_FLUSHED);
2378 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2379 TX_STATUS_ENTRY(TX_LOCKED);
2380 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2381 }
2382
2383 return "UNKNOWN";
2384 }
2385
2386 /**
2387 * iwl4965_scan_cancel - Cancel any currently executing HW scan
2388 *
2389 * NOTE: priv->mutex is not required before calling this function
2390 */
2391 static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
2392 {
2393 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2394 clear_bit(STATUS_SCANNING, &priv->status);
2395 return 0;
2396 }
2397
2398 if (test_bit(STATUS_SCANNING, &priv->status)) {
2399 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2400 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2401 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2402 queue_work(priv->workqueue, &priv->abort_scan);
2403
2404 } else
2405 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2406
2407 return test_bit(STATUS_SCANNING, &priv->status);
2408 }
2409
2410 return 0;
2411 }
2412
2413 /**
2414 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
2415 * @ms: amount of time to wait (in milliseconds) for scan to abort
2416 *
2417 * NOTE: priv->mutex must be held before calling this function
2418 */
2419 static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
2420 {
2421 unsigned long now = jiffies;
2422 int ret;
2423
2424 ret = iwl4965_scan_cancel(priv);
2425 if (ret && ms) {
2426 mutex_unlock(&priv->mutex);
2427 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2428 test_bit(STATUS_SCANNING, &priv->status))
2429 msleep(1);
2430 mutex_lock(&priv->mutex);
2431
2432 return test_bit(STATUS_SCANNING, &priv->status);
2433 }
2434
2435 return ret;
2436 }
2437
2438 static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
2439 {
2440 /* Reset ieee stats */
2441
2442 /* We don't reset the net_device_stats (ieee->stats) on
2443 * re-association */
2444
2445 priv->last_seq_num = -1;
2446 priv->last_frag_num = -1;
2447 priv->last_packet_time = 0;
2448
2449 iwl4965_scan_cancel(priv);
2450 }
2451
2452 #define MAX_UCODE_BEACON_INTERVAL 4096
2453 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2454
2455 static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
2456 {
2457 u16 new_val = 0;
2458 u16 beacon_factor = 0;
2459
2460 beacon_factor =
2461 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2462 / MAX_UCODE_BEACON_INTERVAL;
2463 new_val = beacon_val / beacon_factor;
2464
2465 return cpu_to_le16(new_val);
2466 }
2467
2468 static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
2469 {
2470 u64 interval_tm_unit;
2471 u64 tsf, result;
2472 unsigned long flags;
2473 struct ieee80211_conf *conf = NULL;
2474 u16 beacon_int = 0;
2475
2476 conf = ieee80211_get_hw_conf(priv->hw);
2477
2478 spin_lock_irqsave(&priv->lock, flags);
2479 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2480 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2481
2482 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2483
2484 tsf = priv->timestamp1;
2485 tsf = ((tsf << 32) | priv->timestamp0);
2486
2487 beacon_int = priv->beacon_int;
2488 spin_unlock_irqrestore(&priv->lock, flags);
2489
2490 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2491 if (beacon_int == 0) {
2492 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2493 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2494 } else {
2495 priv->rxon_timing.beacon_interval =
2496 cpu_to_le16(beacon_int);
2497 priv->rxon_timing.beacon_interval =
2498 iwl4965_adjust_beacon_interval(
2499 le16_to_cpu(priv->rxon_timing.beacon_interval));
2500 }
2501
2502 priv->rxon_timing.atim_window = 0;
2503 } else {
2504 priv->rxon_timing.beacon_interval =
2505 iwl4965_adjust_beacon_interval(conf->beacon_int);
2506 /* TODO: we need to get atim_window from upper stack
2507 * for now we set to 0 */
2508 priv->rxon_timing.atim_window = 0;
2509 }
2510
2511 interval_tm_unit =
2512 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2513 result = do_div(tsf, interval_tm_unit);
2514 priv->rxon_timing.beacon_init_val =
2515 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2516
2517 IWL_DEBUG_ASSOC
2518 ("beacon interval %d beacon timer %d beacon tim %d\n",
2519 le16_to_cpu(priv->rxon_timing.beacon_interval),
2520 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2521 le16_to_cpu(priv->rxon_timing.atim_window));
2522 }
2523
2524 static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
2525 {
2526 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2527 IWL_ERROR("APs don't scan.\n");
2528 return 0;
2529 }
2530
2531 if (!iwl4965_is_ready_rf(priv)) {
2532 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2533 return -EIO;
2534 }
2535
2536 if (test_bit(STATUS_SCANNING, &priv->status)) {
2537 IWL_DEBUG_SCAN("Scan already in progress.\n");
2538 return -EAGAIN;
2539 }
2540
2541 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2542 IWL_DEBUG_SCAN("Scan request while abort pending. "
2543 "Queuing.\n");
2544 return -EAGAIN;
2545 }
2546
2547 IWL_DEBUG_INFO("Starting scan...\n");
2548 priv->scan_bands = 2;
2549 set_bit(STATUS_SCANNING, &priv->status);
2550 priv->scan_start = jiffies;
2551 priv->scan_pass_start = priv->scan_start;
2552
2553 queue_work(priv->workqueue, &priv->request_scan);
2554
2555 return 0;
2556 }
2557
2558 static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
2559 {
2560 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
2561
2562 if (hw_decrypt)
2563 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2564 else
2565 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2566
2567 return 0;
2568 }
2569
2570 static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
2571 enum ieee80211_band band)
2572 {
2573 if (band == IEEE80211_BAND_5GHZ) {
2574 priv->staging_rxon.flags &=
2575 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2576 | RXON_FLG_CCK_MSK);
2577 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2578 } else {
2579 /* Copied from iwl4965_bg_post_associate() */
2580 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2581 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2582 else
2583 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2584
2585 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2586 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2587
2588 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2589 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2590 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2591 }
2592 }
2593
2594 /*
2595 * initialize rxon structure with default values from eeprom
2596 */
2597 static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
2598 {
2599 const struct iwl4965_channel_info *ch_info;
2600
2601 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2602
2603 switch (priv->iw_mode) {
2604 case IEEE80211_IF_TYPE_AP:
2605 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2606 break;
2607
2608 case IEEE80211_IF_TYPE_STA:
2609 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2610 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2611 break;
2612
2613 case IEEE80211_IF_TYPE_IBSS:
2614 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2615 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2616 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2617 RXON_FILTER_ACCEPT_GRP_MSK;
2618 break;
2619
2620 case IEEE80211_IF_TYPE_MNTR:
2621 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2622 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2623 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2624 break;
2625 }
2626
2627 #if 0
2628 /* TODO: Figure out when short_preamble would be set and cache from
2629 * that */
2630 if (!hw_to_local(priv->hw)->short_preamble)
2631 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2632 else
2633 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2634 #endif
2635
2636 ch_info = iwl4965_get_channel_info(priv, priv->band,
2637 le16_to_cpu(priv->staging_rxon.channel));
2638
2639 if (!ch_info)
2640 ch_info = &priv->channel_info[0];
2641
2642 /*
2643 * in some case A channels are all non IBSS
2644 * in this case force B/G channel
2645 */
2646 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2647 !(is_channel_ibss(ch_info)))
2648 ch_info = &priv->channel_info[0];
2649
2650 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2651 priv->band = ch_info->band;
2652
2653 iwl4965_set_flags_for_phymode(priv, priv->band);
2654
2655 priv->staging_rxon.ofdm_basic_rates =
2656 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2657 priv->staging_rxon.cck_basic_rates =
2658 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2659
2660 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2661 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2662 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2663 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2664 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2665 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2666 iwl4965_set_rxon_chain(priv);
2667 }
2668
2669 static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
2670 {
2671 if (mode == IEEE80211_IF_TYPE_IBSS) {
2672 const struct iwl4965_channel_info *ch_info;
2673
2674 ch_info = iwl4965_get_channel_info(priv,
2675 priv->band,
2676 le16_to_cpu(priv->staging_rxon.channel));
2677
2678 if (!ch_info || !is_channel_ibss(ch_info)) {
2679 IWL_ERROR("channel %d not IBSS channel\n",
2680 le16_to_cpu(priv->staging_rxon.channel));
2681 return -EINVAL;
2682 }
2683 }
2684
2685 priv->iw_mode = mode;
2686
2687 iwl4965_connection_init_rx_config(priv);
2688 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2689
2690 iwl4965_clear_stations_table(priv);
2691
2692 /* dont commit rxon if rf-kill is on*/
2693 if (!iwl4965_is_ready_rf(priv))
2694 return -EAGAIN;
2695
2696 cancel_delayed_work(&priv->scan_check);
2697 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2698 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2699 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2700 return -EAGAIN;
2701 }
2702
2703 iwl4965_commit_rxon(priv);
2704
2705 return 0;
2706 }
2707
2708 static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
2709 struct ieee80211_tx_control *ctl,
2710 struct iwl4965_cmd *cmd,
2711 struct sk_buff *skb_frag,
2712 int last_frag)
2713 {
2714 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2715
2716 switch (keyinfo->alg) {
2717 case ALG_CCMP:
2718 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2719 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2720 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2721 break;
2722
2723 case ALG_TKIP:
2724 #if 0
2725 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2726
2727 if (last_frag)
2728 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2729 8);
2730 else
2731 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2732 #endif
2733 break;
2734
2735 case ALG_WEP:
2736 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2737 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2738
2739 if (keyinfo->keylen == 13)
2740 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2741
2742 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2743
2744 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2745 "with key %d\n", ctl->key_idx);
2746 break;
2747
2748 default:
2749 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2750 break;
2751 }
2752 }
2753
2754 /*
2755 * handle build REPLY_TX command notification.
2756 */
2757 static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
2758 struct iwl4965_cmd *cmd,
2759 struct ieee80211_tx_control *ctrl,
2760 struct ieee80211_hdr *hdr,
2761 int is_unicast, u8 std_id)
2762 {
2763 __le16 *qc;
2764 u16 fc = le16_to_cpu(hdr->frame_control);
2765 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2766
2767 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2768 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2769 tx_flags |= TX_CMD_FLG_ACK_MSK;
2770 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2771 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2772 if (ieee80211_is_probe_response(fc) &&
2773 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2774 tx_flags |= TX_CMD_FLG_TSF_MSK;
2775 } else {
2776 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2777 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2778 }
2779
2780 if (ieee80211_is_back_request(fc))
2781 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2782
2783
2784 cmd->cmd.tx.sta_id = std_id;
2785 if (ieee80211_get_morefrag(hdr))
2786 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2787
2788 qc = ieee80211_get_qos_ctrl(hdr);
2789 if (qc) {
2790 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2791 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2792 } else
2793 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2794
2795 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2796 tx_flags |= TX_CMD_FLG_RTS_MSK;
2797 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2798 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2799 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2800 tx_flags |= TX_CMD_FLG_CTS_MSK;
2801 }
2802
2803 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2804 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2805
2806 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2807 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2808 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2809 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2810 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2811 else
2812 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2813 } else
2814 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2815
2816 cmd->cmd.tx.driver_txop = 0;
2817 cmd->cmd.tx.tx_flags = tx_flags;
2818 cmd->cmd.tx.next_frame_len = 0;
2819 }
2820
2821 /**
2822 * iwl4965_get_sta_id - Find station's index within station table
2823 *
2824 * If new IBSS station, create new entry in station table
2825 */
2826 static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
2827 struct ieee80211_hdr *hdr)
2828 {
2829 int sta_id;
2830 u16 fc = le16_to_cpu(hdr->frame_control);
2831 DECLARE_MAC_BUF(mac);
2832
2833 /* If this frame is broadcast or management, use broadcast station id */
2834 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2835 is_multicast_ether_addr(hdr->addr1))
2836 return priv->hw_setting.bcast_sta_id;
2837
2838 switch (priv->iw_mode) {
2839
2840 /* If we are a client station in a BSS network, use the special
2841 * AP station entry (that's the only station we communicate with) */
2842 case IEEE80211_IF_TYPE_STA:
2843 return IWL_AP_ID;
2844
2845 /* If we are an AP, then find the station, or use BCAST */
2846 case IEEE80211_IF_TYPE_AP:
2847 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2848 if (sta_id != IWL_INVALID_STATION)
2849 return sta_id;
2850 return priv->hw_setting.bcast_sta_id;
2851
2852 /* If this frame is going out to an IBSS network, find the station,
2853 * or create a new station table entry */
2854 case IEEE80211_IF_TYPE_IBSS:
2855 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
2856 if (sta_id != IWL_INVALID_STATION)
2857 return sta_id;
2858
2859 /* Create new station table entry */
2860 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2861 0, CMD_ASYNC, NULL);
2862
2863 if (sta_id != IWL_INVALID_STATION)
2864 return sta_id;
2865
2866 IWL_DEBUG_DROP("Station %s not in station map. "
2867 "Defaulting to broadcast...\n",
2868 print_mac(mac, hdr->addr1));
2869 iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2870 return priv->hw_setting.bcast_sta_id;
2871
2872 default:
2873 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2874 return priv->hw_setting.bcast_sta_id;
2875 }
2876 }
2877
2878 /*
2879 * start REPLY_TX command process
2880 */
2881 static int iwl4965_tx_skb(struct iwl4965_priv *priv,
2882 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2883 {
2884 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2885 struct iwl4965_tfd_frame *tfd;
2886 u32 *control_flags;
2887 int txq_id = ctl->queue;
2888 struct iwl4965_tx_queue *txq = NULL;
2889 struct iwl4965_queue *q = NULL;
2890 dma_addr_t phys_addr;
2891 dma_addr_t txcmd_phys;
2892 dma_addr_t scratch_phys;
2893 struct iwl4965_cmd *out_cmd = NULL;
2894 u16 len, idx, len_org;
2895 u8 id, hdr_len, unicast;
2896 u8 sta_id;
2897 u16 seq_number = 0;
2898 u16 fc;
2899 __le16 *qc;
2900 u8 wait_write_ptr = 0;
2901 unsigned long flags;
2902 int rc;
2903
2904 spin_lock_irqsave(&priv->lock, flags);
2905 if (iwl4965_is_rfkill(priv)) {
2906 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2907 goto drop_unlock;
2908 }
2909
2910 if (!priv->vif) {
2911 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
2912 goto drop_unlock;
2913 }
2914
2915 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
2916 IWL_ERROR("ERROR: No TX rate available.\n");
2917 goto drop_unlock;
2918 }
2919
2920 unicast = !is_multicast_ether_addr(hdr->addr1);
2921 id = 0;
2922
2923 fc = le16_to_cpu(hdr->frame_control);
2924
2925 #ifdef CONFIG_IWL4965_DEBUG
2926 if (ieee80211_is_auth(fc))
2927 IWL_DEBUG_TX("Sending AUTH frame\n");
2928 else if (ieee80211_is_assoc_request(fc))
2929 IWL_DEBUG_TX("Sending ASSOC frame\n");
2930 else if (ieee80211_is_reassoc_request(fc))
2931 IWL_DEBUG_TX("Sending REASSOC frame\n");
2932 #endif
2933
2934 /* drop all data frame if we are not associated */
2935 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
2936 (!iwl4965_is_associated(priv) ||
2937 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
2938 !priv->assoc_station_added)) {
2939 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
2940 goto drop_unlock;
2941 }
2942
2943 spin_unlock_irqrestore(&priv->lock, flags);
2944
2945 hdr_len = ieee80211_get_hdrlen(fc);
2946
2947 /* Find (or create) index into station table for destination station */
2948 sta_id = iwl4965_get_sta_id(priv, hdr);
2949 if (sta_id == IWL_INVALID_STATION) {
2950 DECLARE_MAC_BUF(mac);
2951
2952 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2953 print_mac(mac, hdr->addr1));
2954 goto drop;
2955 }
2956
2957 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2958
2959 qc = ieee80211_get_qos_ctrl(hdr);
2960 if (qc) {
2961 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2962 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2963 IEEE80211_SCTL_SEQ;
2964 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2965 (hdr->seq_ctrl &
2966 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2967 seq_number += 0x10;
2968 #ifdef CONFIG_IWL4965_HT
2969 /* aggregation is on for this <sta,tid> */
2970 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
2971 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
2972 priv->stations[sta_id].tid[tid].tfds_in_queue++;
2973 #endif /* CONFIG_IWL4965_HT */
2974 }
2975
2976 /* Descriptor for chosen Tx queue */
2977 txq = &priv->txq[txq_id];
2978 q = &txq->q;
2979
2980 spin_lock_irqsave(&priv->lock, flags);
2981
2982 /* Set up first empty TFD within this queue's circular TFD buffer */
2983 tfd = &txq->bd[q->write_ptr];
2984 memset(tfd, 0, sizeof(*tfd));
2985 control_flags = (u32 *) tfd;
2986 idx = get_cmd_index(q, q->write_ptr, 0);
2987
2988 /* Set up driver data for this TFD */
2989 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
2990 txq->txb[q->write_ptr].skb[0] = skb;
2991 memcpy(&(txq->txb[q->write_ptr].status.control),
2992 ctl, sizeof(struct ieee80211_tx_control));
2993
2994 /* Set up first empty entry in queue's array of Tx/cmd buffers */
2995 out_cmd = &txq->cmd[idx];
2996 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2997 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2998
2999 /*
3000 * Set up the Tx-command (not MAC!) header.
3001 * Store the chosen Tx queue and TFD index within the sequence field;
3002 * after Tx, uCode's Tx response will return this value so driver can
3003 * locate the frame within the tx queue and do post-tx processing.
3004 */
3005 out_cmd->hdr.cmd = REPLY_TX;
3006 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
3007 INDEX_TO_SEQ(q->write_ptr)));
3008
3009 /* Copy MAC header from skb into command buffer */
3010 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
3011
3012 /*
3013 * Use the first empty entry in this queue's command buffer array
3014 * to contain the Tx command and MAC header concatenated together
3015 * (payload data will be in another buffer).
3016 * Size of this varies, due to varying MAC header length.
3017 * If end is not dword aligned, we'll have 2 extra bytes at the end
3018 * of the MAC header (device reads on dword boundaries).
3019 * We'll tell device about this padding later.
3020 */
3021 len = priv->hw_setting.tx_cmd_len +
3022 sizeof(struct iwl4965_cmd_header) + hdr_len;
3023
3024 len_org = len;
3025 len = (len + 3) & ~3;
3026
3027 if (len_org != len)
3028 len_org = 1;
3029 else
3030 len_org = 0;
3031
3032 /* Physical address of this Tx command's header (not MAC header!),
3033 * within command buffer array. */
3034 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
3035 offsetof(struct iwl4965_cmd, hdr);
3036
3037 /* Add buffer containing Tx command and MAC(!) header to TFD's
3038 * first entry */
3039 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
3040
3041 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
3042 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
3043
3044 /* Set up TFD's 2nd entry to point directly to remainder of skb,
3045 * if any (802.11 null frames have no payload). */
3046 len = skb->len - hdr_len;
3047 if (len) {
3048 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
3049 len, PCI_DMA_TODEVICE);
3050 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
3051 }
3052
3053 /* Tell 4965 about any 2-byte padding after MAC header */
3054 if (len_org)
3055 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
3056
3057 /* Total # bytes to be transmitted */
3058 len = (u16)skb->len;
3059 out_cmd->cmd.tx.len = cpu_to_le16(len);
3060
3061 /* TODO need this for burst mode later on */
3062 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
3063
3064 /* set is_hcca to 0; it probably will never be implemented */
3065 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
3066
3067 scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
3068 offsetof(struct iwl4965_tx_cmd, scratch);
3069 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
3070 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
3071
3072 if (!ieee80211_get_morefrag(hdr)) {
3073 txq->need_update = 1;
3074 if (qc) {
3075 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
3076 priv->stations[sta_id].tid[tid].seq_number = seq_number;
3077 }
3078 } else {
3079 wait_write_ptr = 1;
3080 txq->need_update = 0;
3081 }
3082
3083 iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
3084 sizeof(out_cmd->cmd.tx));
3085
3086 iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
3087 ieee80211_get_hdrlen(fc));
3088
3089 /* Set up entry for this TFD in Tx byte-count array */
3090 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
3091
3092 /* Tell device the write index *just past* this latest filled TFD */
3093 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
3094 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
3095 spin_unlock_irqrestore(&priv->lock, flags);
3096
3097 if (rc)
3098 return rc;
3099
3100 if ((iwl4965_queue_space(q) < q->high_mark)
3101 && priv->mac80211_registered) {
3102 if (wait_write_ptr) {
3103 spin_lock_irqsave(&priv->lock, flags);
3104 txq->need_update = 1;
3105 iwl4965_tx_queue_update_write_ptr(priv, txq);
3106 spin_unlock_irqrestore(&priv->lock, flags);
3107 }
3108
3109 ieee80211_stop_queue(priv->hw, ctl->queue);
3110 }
3111
3112 return 0;
3113
3114 drop_unlock:
3115 spin_unlock_irqrestore(&priv->lock, flags);
3116 drop:
3117 return -1;
3118 }
3119
3120 static void iwl4965_set_rate(struct iwl4965_priv *priv)
3121 {
3122 const struct ieee80211_supported_band *hw = NULL;
3123 struct ieee80211_rate *rate;
3124 int i;
3125
3126 hw = iwl4965_get_hw_mode(priv, priv->band);
3127 if (!hw) {
3128 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3129 return;
3130 }
3131
3132 priv->active_rate = 0;
3133 priv->active_rate_basic = 0;
3134
3135 for (i = 0; i < hw->n_bitrates; i++) {
3136 rate = &(hw->bitrates[i]);
3137 if (rate->hw_value < IWL_RATE_COUNT)
3138 priv->active_rate |= (1 << rate->hw_value);
3139 }
3140
3141 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3142 priv->active_rate, priv->active_rate_basic);
3143
3144 /*
3145 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3146 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3147 * OFDM
3148 */
3149 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3150 priv->staging_rxon.cck_basic_rates =
3151 ((priv->active_rate_basic &
3152 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3153 else
3154 priv->staging_rxon.cck_basic_rates =
3155 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3156
3157 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3158 priv->staging_rxon.ofdm_basic_rates =
3159 ((priv->active_rate_basic &
3160 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3161 IWL_FIRST_OFDM_RATE) & 0xFF;
3162 else
3163 priv->staging_rxon.ofdm_basic_rates =
3164 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3165 }
3166
3167 static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
3168 {
3169 unsigned long flags;
3170
3171 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3172 return;
3173
3174 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3175 disable_radio ? "OFF" : "ON");
3176
3177 if (disable_radio) {
3178 iwl4965_scan_cancel(priv);
3179 /* FIXME: This is a workaround for AP */
3180 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3181 spin_lock_irqsave(&priv->lock, flags);
3182 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
3183 CSR_UCODE_SW_BIT_RFKILL);
3184 spin_unlock_irqrestore(&priv->lock, flags);
3185 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
3186 set_bit(STATUS_RF_KILL_SW, &priv->status);
3187 }
3188 return;
3189 }
3190
3191 spin_lock_irqsave(&priv->lock, flags);
3192 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3193
3194 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3195 spin_unlock_irqrestore(&priv->lock, flags);
3196
3197 /* wake up ucode */
3198 msleep(10);
3199
3200 spin_lock_irqsave(&priv->lock, flags);
3201 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3202 if (!iwl4965_grab_nic_access(priv))
3203 iwl4965_release_nic_access(priv);
3204 spin_unlock_irqrestore(&priv->lock, flags);
3205
3206 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3207 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3208 "disabled by HW switch\n");
3209 return;
3210 }
3211
3212 queue_work(priv->workqueue, &priv->restart);
3213 return;
3214 }
3215
3216 void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
3217 u32 decrypt_res, struct ieee80211_rx_status *stats)
3218 {
3219 u16 fc =
3220 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3221
3222 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3223 return;
3224
3225 if (!(fc & IEEE80211_FCTL_PROTECTED))
3226 return;
3227
3228 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3229 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3230 case RX_RES_STATUS_SEC_TYPE_TKIP:
3231 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3232 RX_RES_STATUS_BAD_ICV_MIC)
3233 stats->flag |= RX_FLAG_MMIC_ERROR;
3234 case RX_RES_STATUS_SEC_TYPE_WEP:
3235 case RX_RES_STATUS_SEC_TYPE_CCMP:
3236 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3237 RX_RES_STATUS_DECRYPT_OK) {
3238 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3239 stats->flag |= RX_FLAG_DECRYPTED;
3240 }
3241 break;
3242
3243 default:
3244 break;
3245 }
3246 }
3247
3248
3249 #define IWL_PACKET_RETRY_TIME HZ
3250
3251 int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
3252 {
3253 u16 sc = le16_to_cpu(header->seq_ctrl);
3254 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3255 u16 frag = sc & IEEE80211_SCTL_FRAG;
3256 u16 *last_seq, *last_frag;
3257 unsigned long *last_time;
3258
3259 switch (priv->iw_mode) {
3260 case IEEE80211_IF_TYPE_IBSS:{
3261 struct list_head *p;
3262 struct iwl4965_ibss_seq *entry = NULL;
3263 u8 *mac = header->addr2;
3264 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3265
3266 __list_for_each(p, &priv->ibss_mac_hash[index]) {
3267 entry = list_entry(p, struct iwl4965_ibss_seq, list);
3268 if (!compare_ether_addr(entry->mac, mac))
3269 break;
3270 }
3271 if (p == &priv->ibss_mac_hash[index]) {
3272 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3273 if (!entry) {
3274 IWL_ERROR("Cannot malloc new mac entry\n");
3275 return 0;
3276 }
3277 memcpy(entry->mac, mac, ETH_ALEN);
3278 entry->seq_num = seq;
3279 entry->frag_num = frag;
3280 entry->packet_time = jiffies;
3281 list_add(&entry->list, &priv->ibss_mac_hash[index]);
3282 return 0;
3283 }
3284 last_seq = &entry->seq_num;
3285 last_frag = &entry->frag_num;
3286 last_time = &entry->packet_time;
3287 break;
3288 }
3289 case IEEE80211_IF_TYPE_STA:
3290 last_seq = &priv->last_seq_num;
3291 last_frag = &priv->last_frag_num;
3292 last_time = &priv->last_packet_time;
3293 break;
3294 default:
3295 return 0;
3296 }
3297 if ((*last_seq == seq) &&
3298 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3299 if (*last_frag == frag)
3300 goto drop;
3301 if (*last_frag + 1 != frag)
3302 /* out-of-order fragment */
3303 goto drop;
3304 } else
3305 *last_seq = seq;
3306
3307 *last_frag = frag;
3308 *last_time = jiffies;
3309 return 0;
3310
3311 drop:
3312 return 1;
3313 }
3314
3315 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3316
3317 #include "iwl-spectrum.h"
3318
3319 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
3320 #define BEACON_TIME_MASK_HIGH 0xFF000000
3321 #define TIME_UNIT 1024
3322
3323 /*
3324 * extended beacon time format
3325 * time in usec will be changed into a 32-bit value in 8:24 format
3326 * the high 1 byte is the beacon counts
3327 * the lower 3 bytes is the time in usec within one beacon interval
3328 */
3329
3330 static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
3331 {
3332 u32 quot;
3333 u32 rem;
3334 u32 interval = beacon_interval * 1024;
3335
3336 if (!interval || !usec)
3337 return 0;
3338
3339 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3340 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3341
3342 return (quot << 24) + rem;
3343 }
3344
3345 /* base is usually what we get from ucode with each received frame,
3346 * the same as HW timer counter counting down
3347 */
3348
3349 static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3350 {
3351 u32 base_low = base & BEACON_TIME_MASK_LOW;
3352 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3353 u32 interval = beacon_interval * TIME_UNIT;
3354 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3355 (addon & BEACON_TIME_MASK_HIGH);
3356
3357 if (base_low > addon_low)
3358 res += base_low - addon_low;
3359 else if (base_low < addon_low) {
3360 res += interval + base_low - addon_low;
3361 res += (1 << 24);
3362 } else
3363 res += (1 << 24);
3364
3365 return cpu_to_le32(res);
3366 }
3367
3368 static int iwl4965_get_measurement(struct iwl4965_priv *priv,
3369 struct ieee80211_measurement_params *params,
3370 u8 type)
3371 {
3372 struct iwl4965_spectrum_cmd spectrum;
3373 struct iwl4965_rx_packet *res;
3374 struct iwl4965_host_cmd cmd = {
3375 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3376 .data = (void *)&spectrum,
3377 .meta.flags = CMD_WANT_SKB,
3378 };
3379 u32 add_time = le64_to_cpu(params->start_time);
3380 int rc;
3381 int spectrum_resp_status;
3382 int duration = le16_to_cpu(params->duration);
3383
3384 if (iwl4965_is_associated(priv))
3385 add_time =
3386 iwl4965_usecs_to_beacons(
3387 le64_to_cpu(params->start_time) - priv->last_tsf,
3388 le16_to_cpu(priv->rxon_timing.beacon_interval));
3389
3390 memset(&spectrum, 0, sizeof(spectrum));
3391
3392 spectrum.channel_count = cpu_to_le16(1);
3393 spectrum.flags =
3394 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3395 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3396 cmd.len = sizeof(spectrum);
3397 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3398
3399 if (iwl4965_is_associated(priv))
3400 spectrum.start_time =
3401 iwl4965_add_beacon_time(priv->last_beacon_time,
3402 add_time,
3403 le16_to_cpu(priv->rxon_timing.beacon_interval));
3404 else
3405 spectrum.start_time = 0;
3406
3407 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3408 spectrum.channels[0].channel = params->channel;
3409 spectrum.channels[0].type = type;
3410 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3411 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3412 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3413
3414 rc = iwl4965_send_cmd_sync(priv, &cmd);
3415 if (rc)
3416 return rc;
3417
3418 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
3419 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3420 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3421 rc = -EIO;
3422 }
3423
3424 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3425 switch (spectrum_resp_status) {
3426 case 0: /* Command will be handled */
3427 if (res->u.spectrum.id != 0xff) {
3428 IWL_DEBUG_INFO
3429 ("Replaced existing measurement: %d\n",
3430 res->u.spectrum.id);
3431 priv->measurement_status &= ~MEASUREMENT_READY;
3432 }
3433 priv->measurement_status |= MEASUREMENT_ACTIVE;
3434 rc = 0;
3435 break;
3436
3437 case 1: /* Command will not be handled */
3438 rc = -EAGAIN;
3439 break;
3440 }
3441
3442 dev_kfree_skb_any(cmd.meta.u.skb);
3443
3444 return rc;
3445 }
3446 #endif
3447
3448 static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
3449 struct iwl4965_tx_info *tx_sta)
3450 {
3451
3452 tx_sta->status.ack_signal = 0;
3453 tx_sta->status.excessive_retries = 0;
3454 tx_sta->status.queue_length = 0;
3455 tx_sta->status.queue_number = 0;
3456
3457 if (in_interrupt())
3458 ieee80211_tx_status_irqsafe(priv->hw,
3459 tx_sta->skb[0], &(tx_sta->status));
3460 else
3461 ieee80211_tx_status(priv->hw,
3462 tx_sta->skb[0], &(tx_sta->status));
3463
3464 tx_sta->skb[0] = NULL;
3465 }
3466
3467 /**
3468 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3469 *
3470 * When FW advances 'R' index, all entries between old and new 'R' index
3471 * need to be reclaimed. As result, some free space forms. If there is
3472 * enough free space (> low mark), wake the stack that feeds us.
3473 */
3474 int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
3475 {
3476 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3477 struct iwl4965_queue *q = &txq->q;
3478 int nfreed = 0;
3479
3480 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3481 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3482 "is out of range [0-%d] %d %d.\n", txq_id,
3483 index, q->n_bd, q->write_ptr, q->read_ptr);
3484 return 0;
3485 }
3486
3487 for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
3488 q->read_ptr != index;
3489 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3490 if (txq_id != IWL_CMD_QUEUE_NUM) {
3491 iwl4965_txstatus_to_ieee(priv,
3492 &(txq->txb[txq->q.read_ptr]));
3493 iwl4965_hw_txq_free_tfd(priv, txq);
3494 } else if (nfreed > 1) {
3495 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3496 q->write_ptr, q->read_ptr);
3497 queue_work(priv->workqueue, &priv->restart);
3498 }
3499 nfreed++;
3500 }
3501
3502 /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3503 (txq_id != IWL_CMD_QUEUE_NUM) &&
3504 priv->mac80211_registered)
3505 ieee80211_wake_queue(priv->hw, txq_id); */
3506
3507
3508 return nfreed;
3509 }
3510
3511 static int iwl4965_is_tx_success(u32 status)
3512 {
3513 status &= TX_STATUS_MSK;
3514 return (status == TX_STATUS_SUCCESS)
3515 || (status == TX_STATUS_DIRECT_DONE);
3516 }
3517
3518 /******************************************************************************
3519 *
3520 * Generic RX handler implementations
3521 *
3522 ******************************************************************************/
3523 #ifdef CONFIG_IWL4965_HT
3524
3525 static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
3526 struct ieee80211_hdr *hdr)
3527 {
3528 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3529 return IWL_AP_ID;
3530 else {
3531 u8 *da = ieee80211_get_DA(hdr);
3532 return iwl4965_hw_find_station(priv, da);
3533 }
3534 }
3535
3536 static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
3537 struct iwl4965_priv *priv, int txq_id, int idx)
3538 {
3539 if (priv->txq[txq_id].txb[idx].skb[0])
3540 return (struct ieee80211_hdr *)priv->txq[txq_id].
3541 txb[idx].skb[0]->data;
3542 return NULL;
3543 }
3544
3545 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
3546 {
3547 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3548 tx_resp->frame_count);
3549 return le32_to_cpu(*scd_ssn) & MAX_SN;
3550
3551 }
3552
3553 /**
3554 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3555 */
3556 static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
3557 struct iwl4965_ht_agg *agg,
3558 struct iwl4965_tx_resp_agg *tx_resp,
3559 u16 start_idx)
3560 {
3561 u16 status;
3562 struct agg_tx_status *frame_status = &tx_resp->status;
3563 struct ieee80211_tx_status *tx_status = NULL;
3564 struct ieee80211_hdr *hdr = NULL;
3565 int i, sh;
3566 int txq_id, idx;
3567 u16 seq;
3568
3569 if (agg->wait_for_ba)
3570 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
3571
3572 agg->frame_count = tx_resp->frame_count;
3573 agg->start_idx = start_idx;
3574 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3575 agg->bitmap = 0;
3576
3577 /* # frames attempted by Tx command */
3578 if (agg->frame_count == 1) {
3579 /* Only one frame was attempted; no block-ack will arrive */
3580 status = le16_to_cpu(frame_status[0].status);
3581 seq = le16_to_cpu(frame_status[0].sequence);
3582 idx = SEQ_TO_INDEX(seq);
3583 txq_id = SEQ_TO_QUEUE(seq);
3584
3585 /* FIXME: code repetition */
3586 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3587 agg->frame_count, agg->start_idx, idx);
3588
3589 tx_status = &(priv->txq[txq_id].txb[idx].status);
3590 tx_status->retry_count = tx_resp->failure_frame;
3591 tx_status->queue_number = status & 0xff;
3592 tx_status->queue_length = tx_resp->failure_rts;
3593 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
3594 tx_status->flags = iwl4965_is_tx_success(status)?
3595 IEEE80211_TX_STATUS_ACK : 0;
3596 /* FIXME Wrong Rate
3597 tx_status->control.tx_rate =
3598 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags); */
3599 /* FIXME: code repetition end */
3600
3601 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3602 status & 0xff, tx_resp->failure_frame);
3603 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
3604 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
3605
3606 agg->wait_for_ba = 0;
3607 } else {
3608 /* Two or more frames were attempted; expect block-ack */
3609 u64 bitmap = 0;
3610 int start = agg->start_idx;
3611
3612 /* Construct bit-map of pending frames within Tx window */
3613 for (i = 0; i < agg->frame_count; i++) {
3614 u16 sc;
3615 status = le16_to_cpu(frame_status[i].status);
3616 seq = le16_to_cpu(frame_status[i].sequence);
3617 idx = SEQ_TO_INDEX(seq);
3618 txq_id = SEQ_TO_QUEUE(seq);
3619
3620 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3621 AGG_TX_STATE_ABORT_MSK))
3622 continue;
3623
3624 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3625 agg->frame_count, txq_id, idx);
3626
3627 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
3628
3629 sc = le16_to_cpu(hdr->seq_ctrl);
3630 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3631 IWL_ERROR("BUG_ON idx doesn't match seq control"
3632 " idx=%d, seq_idx=%d, seq=%d\n",
3633 idx, SEQ_TO_SN(sc),
3634 hdr->seq_ctrl);
3635 return -1;
3636 }
3637
3638 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3639 i, idx, SEQ_TO_SN(sc));
3640
3641 sh = idx - start;
3642 if (sh > 64) {
3643 sh = (start - idx) + 0xff;
3644 bitmap = bitmap << sh;
3645 sh = 0;
3646 start = idx;
3647 } else if (sh < -64)
3648 sh = 0xff - (start - idx);
3649 else if (sh < 0) {
3650 sh = start - idx;
3651 start = idx;
3652 bitmap = bitmap << sh;
3653 sh = 0;
3654 }
3655 bitmap |= (1 << sh);
3656 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3657 start, (u32)(bitmap & 0xFFFFFFFF));
3658 }
3659
3660 agg->bitmap = bitmap;
3661 agg->start_idx = start;
3662 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3663 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
3664 agg->frame_count, agg->start_idx,
3665 agg->bitmap);
3666
3667 if (bitmap)
3668 agg->wait_for_ba = 1;
3669 }
3670 return 0;
3671 }
3672 #endif
3673
3674 /**
3675 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3676 */
3677 static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
3678 struct iwl4965_rx_mem_buffer *rxb)
3679 {
3680 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3681 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3682 int txq_id = SEQ_TO_QUEUE(sequence);
3683 int index = SEQ_TO_INDEX(sequence);
3684 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3685 struct ieee80211_tx_status *tx_status;
3686 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3687 u32 status = le32_to_cpu(tx_resp->status);
3688 #ifdef CONFIG_IWL4965_HT
3689 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3690 struct ieee80211_hdr *hdr;
3691 __le16 *qc;
3692 #endif
3693
3694 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3695 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3696 "is out of range [0-%d] %d %d\n", txq_id,
3697 index, txq->q.n_bd, txq->q.write_ptr,
3698 txq->q.read_ptr);
3699 return;
3700 }
3701
3702 #ifdef CONFIG_IWL4965_HT
3703 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3704 qc = ieee80211_get_qos_ctrl(hdr);
3705
3706 if (qc)
3707 tid = le16_to_cpu(*qc) & 0xf;
3708
3709 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3710 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3711 IWL_ERROR("Station not known\n");
3712 return;
3713 }
3714
3715 if (txq->sched_retry) {
3716 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
3717 struct iwl4965_ht_agg *agg = NULL;
3718
3719 if (!qc)
3720 return;
3721
3722 agg = &priv->stations[sta_id].tid[tid].agg;
3723
3724 iwl4965_tx_status_reply_tx(priv, agg,
3725 (struct iwl4965_tx_resp_agg *)tx_resp, index);
3726
3727 if ((tx_resp->frame_count == 1) &&
3728 !iwl4965_is_tx_success(status)) {
3729 /* TODO: send BAR */
3730 }
3731
3732 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3733 int freed;
3734 index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
3735 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3736 "%d index %d\n", scd_ssn , index);
3737 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3738 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3739
3740 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3741 txq_id >= 0 && priv->mac80211_registered &&
3742 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3743 ieee80211_wake_queue(priv->hw, txq_id);
3744
3745 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3746 }
3747 } else {
3748 #endif /* CONFIG_IWL4965_HT */
3749 tx_status = &(txq->txb[txq->q.read_ptr].status);
3750
3751 tx_status->retry_count = tx_resp->failure_frame;
3752 tx_status->queue_number = status;
3753 tx_status->queue_length = tx_resp->bt_kill_count;
3754 tx_status->queue_length |= tx_resp->failure_rts;
3755
3756 tx_status->flags =
3757 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3758
3759 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
3760 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
3761 status, le32_to_cpu(tx_resp->rate_n_flags),
3762 tx_resp->failure_frame);
3763
3764 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3765 if (index != -1) {
3766 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3767 #ifdef CONFIG_IWL4965_HT
3768 if (tid != MAX_TID_COUNT)
3769 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3770 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3771 (txq_id >= 0) &&
3772 priv->mac80211_registered)
3773 ieee80211_wake_queue(priv->hw, txq_id);
3774 if (tid != MAX_TID_COUNT)
3775 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3776 #endif
3777 }
3778 #ifdef CONFIG_IWL4965_HT
3779 }
3780 #endif /* CONFIG_IWL4965_HT */
3781
3782 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3783 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3784 }
3785
3786
3787 static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
3788 struct iwl4965_rx_mem_buffer *rxb)
3789 {
3790 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3791 struct iwl4965_alive_resp *palive;
3792 struct delayed_work *pwork;
3793
3794 palive = &pkt->u.alive_frame;
3795
3796 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3797 "0x%01X 0x%01X\n",
3798 palive->is_valid, palive->ver_type,
3799 palive->ver_subtype);
3800
3801 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3802 IWL_DEBUG_INFO("Initialization Alive received.\n");
3803 memcpy(&priv->card_alive_init,
3804 &pkt->u.alive_frame,
3805 sizeof(struct iwl4965_init_alive_resp));
3806 pwork = &priv->init_alive_start;
3807 } else {
3808 IWL_DEBUG_INFO("Runtime Alive received.\n");
3809 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3810 sizeof(struct iwl4965_alive_resp));
3811 pwork = &priv->alive_start;
3812 }
3813
3814 /* We delay the ALIVE response by 5ms to
3815 * give the HW RF Kill time to activate... */
3816 if (palive->is_valid == UCODE_VALID_OK)
3817 queue_delayed_work(priv->workqueue, pwork,
3818 msecs_to_jiffies(5));
3819 else
3820 IWL_WARNING("uCode did not respond OK.\n");
3821 }
3822
3823 static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
3824 struct iwl4965_rx_mem_buffer *rxb)
3825 {
3826 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3827
3828 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3829 return;
3830 }
3831
3832 static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
3833 struct iwl4965_rx_mem_buffer *rxb)
3834 {
3835 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3836
3837 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3838 "seq 0x%04X ser 0x%08X\n",
3839 le32_to_cpu(pkt->u.err_resp.error_type),
3840 get_cmd_string(pkt->u.err_resp.cmd_id),
3841 pkt->u.err_resp.cmd_id,
3842 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3843 le32_to_cpu(pkt->u.err_resp.error_info));
3844 }
3845
3846 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3847
3848 static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
3849 {
3850 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3851 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3852 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
3853 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3854 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3855 rxon->channel = csa->channel;
3856 priv->staging_rxon.channel = csa->channel;
3857 }
3858
3859 static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
3860 struct iwl4965_rx_mem_buffer *rxb)
3861 {
3862 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
3863 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3864 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
3865
3866 if (!report->state) {
3867 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3868 "Spectrum Measure Notification: Start\n");
3869 return;
3870 }
3871
3872 memcpy(&priv->measure_report, report, sizeof(*report));
3873 priv->measurement_status |= MEASUREMENT_READY;
3874 #endif
3875 }
3876
3877 static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
3878 struct iwl4965_rx_mem_buffer *rxb)
3879 {
3880 #ifdef CONFIG_IWL4965_DEBUG
3881 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3882 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
3883 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3884 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3885 #endif
3886 }
3887
3888 static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
3889 struct iwl4965_rx_mem_buffer *rxb)
3890 {
3891 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3892 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3893 "notification for %s:\n",
3894 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3895 iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3896 }
3897
3898 static void iwl4965_bg_beacon_update(struct work_struct *work)
3899 {
3900 struct iwl4965_priv *priv =
3901 container_of(work, struct iwl4965_priv, beacon_update);
3902 struct sk_buff *beacon;
3903
3904 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3905 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
3906
3907 if (!beacon) {
3908 IWL_ERROR("update beacon failed\n");
3909 return;
3910 }
3911
3912 mutex_lock(&priv->mutex);
3913 /* new beacon skb is allocated every time; dispose previous.*/
3914 if (priv->ibss_beacon)
3915 dev_kfree_skb(priv->ibss_beacon);
3916
3917 priv->ibss_beacon = beacon;
3918 mutex_unlock(&priv->mutex);
3919
3920 iwl4965_send_beacon_cmd(priv);
3921 }
3922
3923 static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
3924 struct iwl4965_rx_mem_buffer *rxb)
3925 {
3926 #ifdef CONFIG_IWL4965_DEBUG
3927 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3928 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3929 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
3930
3931 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3932 "tsf %d %d rate %d\n",
3933 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3934 beacon->beacon_notify_hdr.failure_frame,
3935 le32_to_cpu(beacon->ibss_mgr_status),
3936 le32_to_cpu(beacon->high_tsf),
3937 le32_to_cpu(beacon->low_tsf), rate);
3938 #endif
3939
3940 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3941 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3942 queue_work(priv->workqueue, &priv->beacon_update);
3943 }
3944
3945 /* Service response to REPLY_SCAN_CMD (0x80) */
3946 static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
3947 struct iwl4965_rx_mem_buffer *rxb)
3948 {
3949 #ifdef CONFIG_IWL4965_DEBUG
3950 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3951 struct iwl4965_scanreq_notification *notif =
3952 (struct iwl4965_scanreq_notification *)pkt->u.raw;
3953
3954 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3955 #endif
3956 }
3957
3958 /* Service SCAN_START_NOTIFICATION (0x82) */
3959 static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
3960 struct iwl4965_rx_mem_buffer *rxb)
3961 {
3962 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3963 struct iwl4965_scanstart_notification *notif =
3964 (struct iwl4965_scanstart_notification *)pkt->u.raw;
3965 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3966 IWL_DEBUG_SCAN("Scan start: "
3967 "%d [802.11%s] "
3968 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3969 notif->channel,
3970 notif->band ? "bg" : "a",
3971 notif->tsf_high,
3972 notif->tsf_low, notif->status, notif->beacon_timer);
3973 }
3974
3975 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3976 static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
3977 struct iwl4965_rx_mem_buffer *rxb)
3978 {
3979 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3980 struct iwl4965_scanresults_notification *notif =
3981 (struct iwl4965_scanresults_notification *)pkt->u.raw;
3982
3983 IWL_DEBUG_SCAN("Scan ch.res: "
3984 "%d [802.11%s] "
3985 "(TSF: 0x%08X:%08X) - %d "
3986 "elapsed=%lu usec (%dms since last)\n",
3987 notif->channel,
3988 notif->band ? "bg" : "a",
3989 le32_to_cpu(notif->tsf_high),
3990 le32_to_cpu(notif->tsf_low),
3991 le32_to_cpu(notif->statistics[0]),
3992 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3993 jiffies_to_msecs(elapsed_jiffies
3994 (priv->last_scan_jiffies, jiffies)));
3995
3996 priv->last_scan_jiffies = jiffies;
3997 priv->next_scan_jiffies = 0;
3998 }
3999
4000 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
4001 static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
4002 struct iwl4965_rx_mem_buffer *rxb)
4003 {
4004 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4005 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
4006
4007 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
4008 scan_notif->scanned_channels,
4009 scan_notif->tsf_low,
4010 scan_notif->tsf_high, scan_notif->status);
4011
4012 /* The HW is no longer scanning */
4013 clear_bit(STATUS_SCAN_HW, &priv->status);
4014
4015 /* The scan completion notification came in, so kill that timer... */
4016 cancel_delayed_work(&priv->scan_check);
4017
4018 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
4019 (priv->scan_bands == 2) ? "2.4" : "5.2",
4020 jiffies_to_msecs(elapsed_jiffies
4021 (priv->scan_pass_start, jiffies)));
4022
4023 /* Remove this scanned band from the list
4024 * of pending bands to scan */
4025 priv->scan_bands--;
4026
4027 /* If a request to abort was given, or the scan did not succeed
4028 * then we reset the scan state machine and terminate,
4029 * re-queuing another scan if one has been requested */
4030 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
4031 IWL_DEBUG_INFO("Aborted scan completed.\n");
4032 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
4033 } else {
4034 /* If there are more bands on this scan pass reschedule */
4035 if (priv->scan_bands > 0)
4036 goto reschedule;
4037 }
4038
4039 priv->last_scan_jiffies = jiffies;
4040 priv->next_scan_jiffies = 0;
4041 IWL_DEBUG_INFO("Setting scan to off\n");
4042
4043 clear_bit(STATUS_SCANNING, &priv->status);
4044
4045 IWL_DEBUG_INFO("Scan took %dms\n",
4046 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
4047
4048 queue_work(priv->workqueue, &priv->scan_completed);
4049
4050 return;
4051
4052 reschedule:
4053 priv->scan_pass_start = jiffies;
4054 queue_work(priv->workqueue, &priv->request_scan);
4055 }
4056
4057 /* Handle notification from uCode that card's power state is changing
4058 * due to software, hardware, or critical temperature RFKILL */
4059 static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
4060 struct iwl4965_rx_mem_buffer *rxb)
4061 {
4062 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4063 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4064 unsigned long status = priv->status;
4065
4066 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
4067 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4068 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
4069
4070 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
4071 RF_CARD_DISABLED)) {
4072
4073 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
4074 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4075
4076 if (!iwl4965_grab_nic_access(priv)) {
4077 iwl4965_write_direct32(
4078 priv, HBUS_TARG_MBX_C,
4079 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4080
4081 iwl4965_release_nic_access(priv);
4082 }
4083
4084 if (!(flags & RXON_CARD_DISABLED)) {
4085 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
4086 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4087 if (!iwl4965_grab_nic_access(priv)) {
4088 iwl4965_write_direct32(
4089 priv, HBUS_TARG_MBX_C,
4090 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4091
4092 iwl4965_release_nic_access(priv);
4093 }
4094 }
4095
4096 if (flags & RF_CARD_DISABLED) {
4097 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
4098 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
4099 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4100 if (!iwl4965_grab_nic_access(priv))
4101 iwl4965_release_nic_access(priv);
4102 }
4103 }
4104
4105 if (flags & HW_CARD_DISABLED)
4106 set_bit(STATUS_RF_KILL_HW, &priv->status);
4107 else
4108 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4109
4110
4111 if (flags & SW_CARD_DISABLED)
4112 set_bit(STATUS_RF_KILL_SW, &priv->status);
4113 else
4114 clear_bit(STATUS_RF_KILL_SW, &priv->status);
4115
4116 if (!(flags & RXON_CARD_DISABLED))
4117 iwl4965_scan_cancel(priv);
4118
4119 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
4120 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
4121 (test_bit(STATUS_RF_KILL_SW, &status) !=
4122 test_bit(STATUS_RF_KILL_SW, &priv->status)))
4123 queue_work(priv->workqueue, &priv->rf_kill);
4124 else
4125 wake_up_interruptible(&priv->wait_command_queue);
4126 }
4127
4128 /**
4129 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
4130 *
4131 * Setup the RX handlers for each of the reply types sent from the uCode
4132 * to the host.
4133 *
4134 * This function chains into the hardware specific files for them to setup
4135 * any hardware specific handlers as well.
4136 */
4137 static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
4138 {
4139 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
4140 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
4141 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
4142 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
4143 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
4144 iwl4965_rx_spectrum_measure_notif;
4145 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
4146 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
4147 iwl4965_rx_pm_debug_statistics_notif;
4148 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
4149
4150 /*
4151 * The same handler is used for both the REPLY to a discrete
4152 * statistics request from the host as well as for the periodic
4153 * statistics notifications (after received beacons) from the uCode.
4154 */
4155 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
4156 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
4157
4158 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
4159 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
4160 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
4161 iwl4965_rx_scan_results_notif;
4162 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
4163 iwl4965_rx_scan_complete_notif;
4164 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
4165 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
4166
4167 /* Set up hardware specific Rx handlers */
4168 iwl4965_hw_rx_handler_setup(priv);
4169 }
4170
4171 /**
4172 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
4173 * @rxb: Rx buffer to reclaim
4174 *
4175 * If an Rx buffer has an async callback associated with it the callback
4176 * will be executed. The attached skb (if present) will only be freed
4177 * if the callback returns 1
4178 */
4179 static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
4180 struct iwl4965_rx_mem_buffer *rxb)
4181 {
4182 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
4183 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
4184 int txq_id = SEQ_TO_QUEUE(sequence);
4185 int index = SEQ_TO_INDEX(sequence);
4186 int huge = sequence & SEQ_HUGE_FRAME;
4187 int cmd_index;
4188 struct iwl4965_cmd *cmd;
4189
4190 /* If a Tx command is being handled and it isn't in the actual
4191 * command queue then there a command routing bug has been introduced
4192 * in the queue management code. */
4193 if (txq_id != IWL_CMD_QUEUE_NUM)
4194 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
4195 txq_id, pkt->hdr.cmd);
4196 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
4197
4198 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
4199 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
4200
4201 /* Input error checking is done when commands are added to queue. */
4202 if (cmd->meta.flags & CMD_WANT_SKB) {
4203 cmd->meta.source->u.skb = rxb->skb;
4204 rxb->skb = NULL;
4205 } else if (cmd->meta.u.callback &&
4206 !cmd->meta.u.callback(priv, cmd, rxb->skb))
4207 rxb->skb = NULL;
4208
4209 iwl4965_tx_queue_reclaim(priv, txq_id, index);
4210
4211 if (!(cmd->meta.flags & CMD_ASYNC)) {
4212 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4213 wake_up_interruptible(&priv->wait_command_queue);
4214 }
4215 }
4216
4217 /************************** RX-FUNCTIONS ****************************/
4218 /*
4219 * Rx theory of operation
4220 *
4221 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
4222 * each of which point to Receive Buffers to be filled by 4965. These get
4223 * used not only for Rx frames, but for any command response or notification
4224 * from the 4965. The driver and 4965 manage the Rx buffers by means
4225 * of indexes into the circular buffer.
4226 *
4227 * Rx Queue Indexes
4228 * The host/firmware share two index registers for managing the Rx buffers.
4229 *
4230 * The READ index maps to the first position that the firmware may be writing
4231 * to -- the driver can read up to (but not including) this position and get
4232 * good data.
4233 * The READ index is managed by the firmware once the card is enabled.
4234 *
4235 * The WRITE index maps to the last position the driver has read from -- the
4236 * position preceding WRITE is the last slot the firmware can place a packet.
4237 *
4238 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
4239 * WRITE = READ.
4240 *
4241 * During initialization, the host sets up the READ queue position to the first
4242 * INDEX position, and WRITE to the last (READ - 1 wrapped)
4243 *
4244 * When the firmware places a packet in a buffer, it will advance the READ index
4245 * and fire the RX interrupt. The driver can then query the READ index and
4246 * process as many packets as possible, moving the WRITE index forward as it
4247 * resets the Rx queue buffers with new memory.
4248 *
4249 * The management in the driver is as follows:
4250 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
4251 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
4252 * to replenish the iwl->rxq->rx_free.
4253 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
4254 * iwl->rxq is replenished and the READ INDEX is updated (updating the
4255 * 'processed' and 'read' driver indexes as well)
4256 * + A received packet is processed and handed to the kernel network stack,
4257 * detached from the iwl->rxq. The driver 'processed' index is updated.
4258 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
4259 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
4260 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
4261 * were enough free buffers and RX_STALLED is set it is cleared.
4262 *
4263 *
4264 * Driver sequence:
4265 *
4266 * iwl4965_rx_queue_alloc() Allocates rx_free
4267 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
4268 * iwl4965_rx_queue_restock
4269 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
4270 * queue, updates firmware pointers, and updates
4271 * the WRITE index. If insufficient rx_free buffers
4272 * are available, schedules iwl4965_rx_replenish
4273 *
4274 * -- enable interrupts --
4275 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
4276 * READ INDEX, detaching the SKB from the pool.
4277 * Moves the packet buffer from queue to rx_used.
4278 * Calls iwl4965_rx_queue_restock to refill any empty
4279 * slots.
4280 * ...
4281 *
4282 */
4283
4284 /**
4285 * iwl4965_rx_queue_space - Return number of free slots available in queue.
4286 */
4287 static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
4288 {
4289 int s = q->read - q->write;
4290 if (s <= 0)
4291 s += RX_QUEUE_SIZE;
4292 /* keep some buffer to not confuse full and empty queue */
4293 s -= 2;
4294 if (s < 0)
4295 s = 0;
4296 return s;
4297 }
4298
4299 /**
4300 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
4301 */
4302 int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
4303 {
4304 u32 reg = 0;
4305 int rc = 0;
4306 unsigned long flags;
4307
4308 spin_lock_irqsave(&q->lock, flags);
4309
4310 if (q->need_update == 0)
4311 goto exit_unlock;
4312
4313 /* If power-saving is in use, make sure device is awake */
4314 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4315 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4316
4317 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4318 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4319 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4320 goto exit_unlock;
4321 }
4322
4323 rc = iwl4965_grab_nic_access(priv);
4324 if (rc)
4325 goto exit_unlock;
4326
4327 /* Device expects a multiple of 8 */
4328 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
4329 q->write & ~0x7);
4330 iwl4965_release_nic_access(priv);
4331
4332 /* Else device is assumed to be awake */
4333 } else
4334 /* Device expects a multiple of 8 */
4335 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
4336
4337
4338 q->need_update = 0;
4339
4340 exit_unlock:
4341 spin_unlock_irqrestore(&q->lock, flags);
4342 return rc;
4343 }
4344
4345 /**
4346 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
4347 */
4348 static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
4349 dma_addr_t dma_addr)
4350 {
4351 return cpu_to_le32((u32)(dma_addr >> 8));
4352 }
4353
4354
4355 /**
4356 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
4357 *
4358 * If there are slots in the RX queue that need to be restocked,
4359 * and we have free pre-allocated buffers, fill the ranks as much
4360 * as we can, pulling from rx_free.
4361 *
4362 * This moves the 'write' index forward to catch up with 'processed', and
4363 * also updates the memory address in the firmware to reference the new
4364 * target buffer.
4365 */
4366 static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
4367 {
4368 struct iwl4965_rx_queue *rxq = &priv->rxq;
4369 struct list_head *element;
4370 struct iwl4965_rx_mem_buffer *rxb;
4371 unsigned long flags;
4372 int write, rc;
4373
4374 spin_lock_irqsave(&rxq->lock, flags);
4375 write = rxq->write & ~0x7;
4376 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
4377 /* Get next free Rx buffer, remove from free list */
4378 element = rxq->rx_free.next;
4379 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4380 list_del(element);
4381
4382 /* Point to Rx buffer via next RBD in circular buffer */
4383 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4384 rxq->queue[rxq->write] = rxb;
4385 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4386 rxq->free_count--;
4387 }
4388 spin_unlock_irqrestore(&rxq->lock, flags);
4389 /* If the pre-allocated buffer pool is dropping low, schedule to
4390 * refill it */
4391 if (rxq->free_count <= RX_LOW_WATERMARK)
4392 queue_work(priv->workqueue, &priv->rx_replenish);
4393
4394
4395 /* If we've added more space for the firmware to place data, tell it.
4396 * Increment device's write pointer in multiples of 8. */
4397 if ((write != (rxq->write & ~0x7))
4398 || (abs(rxq->write - rxq->read) > 7)) {
4399 spin_lock_irqsave(&rxq->lock, flags);
4400 rxq->need_update = 1;
4401 spin_unlock_irqrestore(&rxq->lock, flags);
4402 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
4403 if (rc)
4404 return rc;
4405 }
4406
4407 return 0;
4408 }
4409
4410 /**
4411 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
4412 *
4413 * When moving to rx_free an SKB is allocated for the slot.
4414 *
4415 * Also restock the Rx queue via iwl4965_rx_queue_restock.
4416 * This is called as a scheduled work item (except for during initialization)
4417 */
4418 static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
4419 {
4420 struct iwl4965_rx_queue *rxq = &priv->rxq;
4421 struct list_head *element;
4422 struct iwl4965_rx_mem_buffer *rxb;
4423 unsigned long flags;
4424 spin_lock_irqsave(&rxq->lock, flags);
4425 while (!list_empty(&rxq->rx_used)) {
4426 element = rxq->rx_used.next;
4427 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
4428
4429 /* Alloc a new receive buffer */
4430 rxb->skb =
4431 alloc_skb(priv->hw_setting.rx_buf_size,
4432 __GFP_NOWARN | GFP_ATOMIC);
4433 if (!rxb->skb) {
4434 if (net_ratelimit())
4435 printk(KERN_CRIT DRV_NAME
4436 ": Can not allocate SKB buffers\n");
4437 /* We don't reschedule replenish work here -- we will
4438 * call the restock method and if it still needs
4439 * more buffers it will schedule replenish */
4440 break;
4441 }
4442 priv->alloc_rxb_skb++;
4443 list_del(element);
4444
4445 /* Get physical address of RB/SKB */
4446 rxb->dma_addr =
4447 pci_map_single(priv->pci_dev, rxb->skb->data,
4448 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
4449 list_add_tail(&rxb->list, &rxq->rx_free);
4450 rxq->free_count++;
4451 }
4452 spin_unlock_irqrestore(&rxq->lock, flags);
4453 }
4454
4455 /*
4456 * this should be called while priv->lock is locked
4457 */
4458 static void __iwl4965_rx_replenish(void *data)
4459 {
4460 struct iwl4965_priv *priv = data;
4461
4462 iwl4965_rx_allocate(priv);
4463 iwl4965_rx_queue_restock(priv);
4464 }
4465
4466
4467 void iwl4965_rx_replenish(void *data)
4468 {
4469 struct iwl4965_priv *priv = data;
4470 unsigned long flags;
4471
4472 iwl4965_rx_allocate(priv);
4473
4474 spin_lock_irqsave(&priv->lock, flags);
4475 iwl4965_rx_queue_restock(priv);
4476 spin_unlock_irqrestore(&priv->lock, flags);
4477 }
4478
4479 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4480 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
4481 * This free routine walks the list of POOL entries and if SKB is set to
4482 * non NULL it is unmapped and freed
4483 */
4484 static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4485 {
4486 int i;
4487 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4488 if (rxq->pool[i].skb != NULL) {
4489 pci_unmap_single(priv->pci_dev,
4490 rxq->pool[i].dma_addr,
4491 priv->hw_setting.rx_buf_size,
4492 PCI_DMA_FROMDEVICE);
4493 dev_kfree_skb(rxq->pool[i].skb);
4494 }
4495 }
4496
4497 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4498 rxq->dma_addr);
4499 rxq->bd = NULL;
4500 }
4501
4502 int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
4503 {
4504 struct iwl4965_rx_queue *rxq = &priv->rxq;
4505 struct pci_dev *dev = priv->pci_dev;
4506 int i;
4507
4508 spin_lock_init(&rxq->lock);
4509 INIT_LIST_HEAD(&rxq->rx_free);
4510 INIT_LIST_HEAD(&rxq->rx_used);
4511
4512 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4513 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4514 if (!rxq->bd)
4515 return -ENOMEM;
4516
4517 /* Fill the rx_used queue with _all_ of the Rx buffers */
4518 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4519 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4520
4521 /* Set us so that we have processed and used all buffers, but have
4522 * not restocked the Rx queue with fresh buffers */
4523 rxq->read = rxq->write = 0;
4524 rxq->free_count = 0;
4525 rxq->need_update = 0;
4526 return 0;
4527 }
4528
4529 void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
4530 {
4531 unsigned long flags;
4532 int i;
4533 spin_lock_irqsave(&rxq->lock, flags);
4534 INIT_LIST_HEAD(&rxq->rx_free);
4535 INIT_LIST_HEAD(&rxq->rx_used);
4536 /* Fill the rx_used queue with _all_ of the Rx buffers */
4537 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4538 /* In the reset function, these buffers may have been allocated
4539 * to an SKB, so we need to unmap and free potential storage */
4540 if (rxq->pool[i].skb != NULL) {
4541 pci_unmap_single(priv->pci_dev,
4542 rxq->pool[i].dma_addr,
4543 priv->hw_setting.rx_buf_size,
4544 PCI_DMA_FROMDEVICE);
4545 priv->alloc_rxb_skb--;
4546 dev_kfree_skb(rxq->pool[i].skb);
4547 rxq->pool[i].skb = NULL;
4548 }
4549 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4550 }
4551
4552 /* Set us so that we have processed and used all buffers, but have
4553 * not restocked the Rx queue with fresh buffers */
4554 rxq->read = rxq->write = 0;
4555 rxq->free_count = 0;
4556 spin_unlock_irqrestore(&rxq->lock, flags);
4557 }
4558
4559 /* Convert linear signal-to-noise ratio into dB */
4560 static u8 ratio2dB[100] = {
4561 /* 0 1 2 3 4 5 6 7 8 9 */
4562 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4563 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4564 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4565 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4566 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4567 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4568 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4569 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4570 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4571 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4572 };
4573
4574 /* Calculates a relative dB value from a ratio of linear
4575 * (i.e. not dB) signal levels.
4576 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4577 int iwl4965_calc_db_from_ratio(int sig_ratio)
4578 {
4579 /* 1000:1 or higher just report as 60 dB */
4580 if (sig_ratio >= 1000)
4581 return 60;
4582
4583 /* 100:1 or higher, divide by 10 and use table,
4584 * add 20 dB to make up for divide by 10 */
4585 if (sig_ratio >= 100)
4586 return (20 + (int)ratio2dB[sig_ratio/10]);
4587
4588 /* We shouldn't see this */
4589 if (sig_ratio < 1)
4590 return 0;
4591
4592 /* Use table for ratios 1:1 - 99:1 */
4593 return (int)ratio2dB[sig_ratio];
4594 }
4595
4596 #define PERFECT_RSSI (-20) /* dBm */
4597 #define WORST_RSSI (-95) /* dBm */
4598 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4599
4600 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
4601 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4602 * about formulas used below. */
4603 int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
4604 {
4605 int sig_qual;
4606 int degradation = PERFECT_RSSI - rssi_dbm;
4607
4608 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4609 * as indicator; formula is (signal dbm - noise dbm).
4610 * SNR at or above 40 is a great signal (100%).
4611 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4612 * Weakest usable signal is usually 10 - 15 dB SNR. */
4613 if (noise_dbm) {
4614 if (rssi_dbm - noise_dbm >= 40)
4615 return 100;
4616 else if (rssi_dbm < noise_dbm)
4617 return 0;
4618 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4619
4620 /* Else use just the signal level.
4621 * This formula is a least squares fit of data points collected and
4622 * compared with a reference system that had a percentage (%) display
4623 * for signal quality. */
4624 } else
4625 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4626 (15 * RSSI_RANGE + 62 * degradation)) /
4627 (RSSI_RANGE * RSSI_RANGE);
4628
4629 if (sig_qual > 100)
4630 sig_qual = 100;
4631 else if (sig_qual < 1)
4632 sig_qual = 0;
4633
4634 return sig_qual;
4635 }
4636
4637 /**
4638 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
4639 *
4640 * Uses the priv->rx_handlers callback function array to invoke
4641 * the appropriate handlers, including command responses,
4642 * frame-received notifications, and other notifications.
4643 */
4644 static void iwl4965_rx_handle(struct iwl4965_priv *priv)
4645 {
4646 struct iwl4965_rx_mem_buffer *rxb;
4647 struct iwl4965_rx_packet *pkt;
4648 struct iwl4965_rx_queue *rxq = &priv->rxq;
4649 u32 r, i;
4650 int reclaim;
4651 unsigned long flags;
4652 u8 fill_rx = 0;
4653 u32 count = 8;
4654
4655 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4656 * buffer that the driver may process (last buffer filled by ucode). */
4657 r = iwl4965_hw_get_rx_read(priv);
4658 i = rxq->read;
4659
4660 /* Rx interrupt, but nothing sent from uCode */
4661 if (i == r)
4662 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4663
4664 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4665 fill_rx = 1;
4666
4667 while (i != r) {
4668 rxb = rxq->queue[i];
4669
4670 /* If an RXB doesn't have a Rx queue slot associated with it,
4671 * then a bug has been introduced in the queue refilling
4672 * routines -- catch it here */
4673 BUG_ON(rxb == NULL);
4674
4675 rxq->queue[i] = NULL;
4676
4677 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4678 priv->hw_setting.rx_buf_size,
4679 PCI_DMA_FROMDEVICE);
4680 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
4681
4682 /* Reclaim a command buffer only if this packet is a response
4683 * to a (driver-originated) command.
4684 * If the packet (e.g. Rx frame) originated from uCode,
4685 * there is no command buffer to reclaim.
4686 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4687 * but apparently a few don't get set; catch them here. */
4688 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4689 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4690 (pkt->hdr.cmd != REPLY_4965_RX) &&
4691 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
4692 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4693 (pkt->hdr.cmd != REPLY_TX);
4694
4695 /* Based on type of command response or notification,
4696 * handle those that need handling via function in
4697 * rx_handlers table. See iwl4965_setup_rx_handlers() */
4698 if (priv->rx_handlers[pkt->hdr.cmd]) {
4699 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4700 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4701 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4702 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4703 } else {
4704 /* No handling needed */
4705 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4706 "r %d i %d No handler needed for %s, 0x%02x\n",
4707 r, i, get_cmd_string(pkt->hdr.cmd),
4708 pkt->hdr.cmd);
4709 }
4710
4711 if (reclaim) {
4712 /* Invoke any callbacks, transfer the skb to caller, and
4713 * fire off the (possibly) blocking iwl4965_send_cmd()
4714 * as we reclaim the driver command queue */
4715 if (rxb && rxb->skb)
4716 iwl4965_tx_cmd_complete(priv, rxb);
4717 else
4718 IWL_WARNING("Claim null rxb?\n");
4719 }
4720
4721 /* For now we just don't re-use anything. We can tweak this
4722 * later to try and re-use notification packets and SKBs that
4723 * fail to Rx correctly */
4724 if (rxb->skb != NULL) {
4725 priv->alloc_rxb_skb--;
4726 dev_kfree_skb_any(rxb->skb);
4727 rxb->skb = NULL;
4728 }
4729
4730 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4731 priv->hw_setting.rx_buf_size,
4732 PCI_DMA_FROMDEVICE);
4733 spin_lock_irqsave(&rxq->lock, flags);
4734 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4735 spin_unlock_irqrestore(&rxq->lock, flags);
4736 i = (i + 1) & RX_QUEUE_MASK;
4737 /* If there are a lot of unused frames,
4738 * restock the Rx queue so ucode wont assert. */
4739 if (fill_rx) {
4740 count++;
4741 if (count >= 8) {
4742 priv->rxq.read = i;
4743 __iwl4965_rx_replenish(priv);
4744 count = 0;
4745 }
4746 }
4747 }
4748
4749 /* Backtrack one entry */
4750 priv->rxq.read = i;
4751 iwl4965_rx_queue_restock(priv);
4752 }
4753
4754 /**
4755 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4756 */
4757 static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
4758 struct iwl4965_tx_queue *txq)
4759 {
4760 u32 reg = 0;
4761 int rc = 0;
4762 int txq_id = txq->q.id;
4763
4764 if (txq->need_update == 0)
4765 return rc;
4766
4767 /* if we're trying to save power */
4768 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4769 /* wake up nic if it's powered down ...
4770 * uCode will wake up, and interrupt us again, so next
4771 * time we'll skip this part. */
4772 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4773
4774 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4775 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4776 iwl4965_set_bit(priv, CSR_GP_CNTRL,
4777 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4778 return rc;
4779 }
4780
4781 /* restore this queue's parameters in nic hardware. */
4782 rc = iwl4965_grab_nic_access(priv);
4783 if (rc)
4784 return rc;
4785 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
4786 txq->q.write_ptr | (txq_id << 8));
4787 iwl4965_release_nic_access(priv);
4788
4789 /* else not in power-save mode, uCode will never sleep when we're
4790 * trying to tx (during RFKILL, we're not trying to tx). */
4791 } else
4792 iwl4965_write32(priv, HBUS_TARG_WRPTR,
4793 txq->q.write_ptr | (txq_id << 8));
4794
4795 txq->need_update = 0;
4796
4797 return rc;
4798 }
4799
4800 #ifdef CONFIG_IWL4965_DEBUG
4801 static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
4802 {
4803 DECLARE_MAC_BUF(mac);
4804
4805 IWL_DEBUG_RADIO("RX CONFIG:\n");
4806 iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4807 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4808 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4809 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4810 le32_to_cpu(rxon->filter_flags));
4811 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4812 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4813 rxon->ofdm_basic_rates);
4814 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4815 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4816 print_mac(mac, rxon->node_addr));
4817 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4818 print_mac(mac, rxon->bssid_addr));
4819 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4820 }
4821 #endif
4822
4823 static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
4824 {
4825 IWL_DEBUG_ISR("Enabling interrupts\n");
4826 set_bit(STATUS_INT_ENABLED, &priv->status);
4827 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4828 }
4829
4830 static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
4831 {
4832 clear_bit(STATUS_INT_ENABLED, &priv->status);
4833
4834 /* disable interrupts from uCode/NIC to host */
4835 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
4836
4837 /* acknowledge/clear/reset any interrupts still pending
4838 * from uCode or flow handler (Rx/Tx DMA) */
4839 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4840 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4841 IWL_DEBUG_ISR("Disabled interrupts\n");
4842 }
4843
4844 static const char *desc_lookup(int i)
4845 {
4846 switch (i) {
4847 case 1:
4848 return "FAIL";
4849 case 2:
4850 return "BAD_PARAM";
4851 case 3:
4852 return "BAD_CHECKSUM";
4853 case 4:
4854 return "NMI_INTERRUPT";
4855 case 5:
4856 return "SYSASSERT";
4857 case 6:
4858 return "FATAL_ERROR";
4859 }
4860
4861 return "UNKNOWN";
4862 }
4863
4864 #define ERROR_START_OFFSET (1 * sizeof(u32))
4865 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4866
4867 static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
4868 {
4869 u32 data2, line;
4870 u32 desc, time, count, base, data1;
4871 u32 blink1, blink2, ilink1, ilink2;
4872 int rc;
4873
4874 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4875
4876 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
4877 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4878 return;
4879 }
4880
4881 rc = iwl4965_grab_nic_access(priv);
4882 if (rc) {
4883 IWL_WARNING("Can not read from adapter at this time.\n");
4884 return;
4885 }
4886
4887 count = iwl4965_read_targ_mem(priv, base);
4888
4889 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4890 IWL_ERROR("Start IWL Error Log Dump:\n");
4891 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4892 priv->status, priv->config, count);
4893 }
4894
4895 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4896 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4897 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4898 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4899 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4900 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4901 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4902 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4903 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
4904
4905 IWL_ERROR("Desc Time "
4906 "data1 data2 line\n");
4907 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4908 desc_lookup(desc), desc, time, data1, data2, line);
4909 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4910 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4911 ilink1, ilink2);
4912
4913 iwl4965_release_nic_access(priv);
4914 }
4915
4916 #define EVENT_START_OFFSET (4 * sizeof(u32))
4917
4918 /**
4919 * iwl4965_print_event_log - Dump error event log to syslog
4920 *
4921 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
4922 */
4923 static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
4924 u32 num_events, u32 mode)
4925 {
4926 u32 i;
4927 u32 base; /* SRAM byte address of event log header */
4928 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4929 u32 ptr; /* SRAM byte address of log data */
4930 u32 ev, time, data; /* event log data */
4931
4932 if (num_events == 0)
4933 return;
4934
4935 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4936
4937 if (mode == 0)
4938 event_size = 2 * sizeof(u32);
4939 else
4940 event_size = 3 * sizeof(u32);
4941
4942 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4943
4944 /* "time" is actually "data" for mode 0 (no timestamp).
4945 * place event id # at far right for easier visual parsing. */
4946 for (i = 0; i < num_events; i++) {
4947 ev = iwl4965_read_targ_mem(priv, ptr);
4948 ptr += sizeof(u32);
4949 time = iwl4965_read_targ_mem(priv, ptr);
4950 ptr += sizeof(u32);
4951 if (mode == 0)
4952 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4953 else {
4954 data = iwl4965_read_targ_mem(priv, ptr);
4955 ptr += sizeof(u32);
4956 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4957 }
4958 }
4959 }
4960
4961 static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
4962 {
4963 int rc;
4964 u32 base; /* SRAM byte address of event log header */
4965 u32 capacity; /* event log capacity in # entries */
4966 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4967 u32 num_wraps; /* # times uCode wrapped to top of log */
4968 u32 next_entry; /* index of next entry to be written by uCode */
4969 u32 size; /* # entries that we'll print */
4970
4971 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4972 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
4973 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4974 return;
4975 }
4976
4977 rc = iwl4965_grab_nic_access(priv);
4978 if (rc) {
4979 IWL_WARNING("Can not read from adapter at this time.\n");
4980 return;
4981 }
4982
4983 /* event log header */
4984 capacity = iwl4965_read_targ_mem(priv, base);
4985 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
4986 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
4987 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
4988
4989 size = num_wraps ? capacity : next_entry;
4990
4991 /* bail out if nothing in log */
4992 if (size == 0) {
4993 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4994 iwl4965_release_nic_access(priv);
4995 return;
4996 }
4997
4998 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4999 size, num_wraps);
5000
5001 /* if uCode has wrapped back to top of log, start at the oldest entry,
5002 * i.e the next one that uCode would fill. */
5003 if (num_wraps)
5004 iwl4965_print_event_log(priv, next_entry,
5005 capacity - next_entry, mode);
5006
5007 /* (then/else) start at top of log */
5008 iwl4965_print_event_log(priv, 0, next_entry, mode);
5009
5010 iwl4965_release_nic_access(priv);
5011 }
5012
5013 /**
5014 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
5015 */
5016 static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
5017 {
5018 /* Set the FW error flag -- cleared on iwl4965_down */
5019 set_bit(STATUS_FW_ERROR, &priv->status);
5020
5021 /* Cancel currently queued command. */
5022 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
5023
5024 #ifdef CONFIG_IWL4965_DEBUG
5025 if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
5026 iwl4965_dump_nic_error_log(priv);
5027 iwl4965_dump_nic_event_log(priv);
5028 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
5029 }
5030 #endif
5031
5032 wake_up_interruptible(&priv->wait_command_queue);
5033
5034 /* Keep the restart process from trying to send host
5035 * commands by clearing the INIT status bit */
5036 clear_bit(STATUS_READY, &priv->status);
5037
5038 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5039 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
5040 "Restarting adapter due to uCode error.\n");
5041
5042 if (iwl4965_is_associated(priv)) {
5043 memcpy(&priv->recovery_rxon, &priv->active_rxon,
5044 sizeof(priv->recovery_rxon));
5045 priv->error_recovering = 1;
5046 }
5047 queue_work(priv->workqueue, &priv->restart);
5048 }
5049 }
5050
5051 static void iwl4965_error_recovery(struct iwl4965_priv *priv)
5052 {
5053 unsigned long flags;
5054
5055 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
5056 sizeof(priv->staging_rxon));
5057 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5058 iwl4965_commit_rxon(priv);
5059
5060 iwl4965_rxon_add_station(priv, priv->bssid, 1);
5061
5062 spin_lock_irqsave(&priv->lock, flags);
5063 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
5064 priv->error_recovering = 0;
5065 spin_unlock_irqrestore(&priv->lock, flags);
5066 }
5067
5068 static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
5069 {
5070 u32 inta, handled = 0;
5071 u32 inta_fh;
5072 unsigned long flags;
5073 #ifdef CONFIG_IWL4965_DEBUG
5074 u32 inta_mask;
5075 #endif
5076
5077 spin_lock_irqsave(&priv->lock, flags);
5078
5079 /* Ack/clear/reset pending uCode interrupts.
5080 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
5081 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
5082 inta = iwl4965_read32(priv, CSR_INT);
5083 iwl4965_write32(priv, CSR_INT, inta);
5084
5085 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
5086 * Any new interrupts that happen after this, either while we're
5087 * in this tasklet, or later, will show up in next ISR/tasklet. */
5088 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5089 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
5090
5091 #ifdef CONFIG_IWL4965_DEBUG
5092 if (iwl4965_debug_level & IWL_DL_ISR) {
5093 /* just for debug */
5094 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5095 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5096 inta, inta_mask, inta_fh);
5097 }
5098 #endif
5099
5100 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
5101 * atomic, make sure that inta covers all the interrupts that
5102 * we've discovered, even if FH interrupt came in just after
5103 * reading CSR_INT. */
5104 if (inta_fh & CSR_FH_INT_RX_MASK)
5105 inta |= CSR_INT_BIT_FH_RX;
5106 if (inta_fh & CSR_FH_INT_TX_MASK)
5107 inta |= CSR_INT_BIT_FH_TX;
5108
5109 /* Now service all interrupt bits discovered above. */
5110 if (inta & CSR_INT_BIT_HW_ERR) {
5111 IWL_ERROR("Microcode HW error detected. Restarting.\n");
5112
5113 /* Tell the device to stop sending interrupts */
5114 iwl4965_disable_interrupts(priv);
5115
5116 iwl4965_irq_handle_error(priv);
5117
5118 handled |= CSR_INT_BIT_HW_ERR;
5119
5120 spin_unlock_irqrestore(&priv->lock, flags);
5121
5122 return;
5123 }
5124
5125 #ifdef CONFIG_IWL4965_DEBUG
5126 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5127 /* NIC fires this, but we don't use it, redundant with WAKEUP */
5128 if (inta & CSR_INT_BIT_SCD)
5129 IWL_DEBUG_ISR("Scheduler finished to transmit "
5130 "the frame/frames.\n");
5131
5132 /* Alive notification via Rx interrupt will do the real work */
5133 if (inta & CSR_INT_BIT_ALIVE)
5134 IWL_DEBUG_ISR("Alive interrupt\n");
5135 }
5136 #endif
5137 /* Safely ignore these bits for debug checks below */
5138 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
5139
5140 /* HW RF KILL switch toggled */
5141 if (inta & CSR_INT_BIT_RF_KILL) {
5142 int hw_rf_kill = 0;
5143 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
5144 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
5145 hw_rf_kill = 1;
5146
5147 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
5148 "RF_KILL bit toggled to %s.\n",
5149 hw_rf_kill ? "disable radio":"enable radio");
5150
5151 /* Queue restart only if RF_KILL switch was set to "kill"
5152 * when we loaded driver, and is now set to "enable".
5153 * After we're Alive, RF_KILL gets handled by
5154 * iwl_rx_card_state_notif() */
5155 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
5156 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5157 queue_work(priv->workqueue, &priv->restart);
5158 }
5159
5160 handled |= CSR_INT_BIT_RF_KILL;
5161 }
5162
5163 /* Chip got too hot and stopped itself */
5164 if (inta & CSR_INT_BIT_CT_KILL) {
5165 IWL_ERROR("Microcode CT kill error detected.\n");
5166 handled |= CSR_INT_BIT_CT_KILL;
5167 }
5168
5169 /* Error detected by uCode */
5170 if (inta & CSR_INT_BIT_SW_ERR) {
5171 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
5172 inta);
5173 iwl4965_irq_handle_error(priv);
5174 handled |= CSR_INT_BIT_SW_ERR;
5175 }
5176
5177 /* uCode wakes up after power-down sleep */
5178 if (inta & CSR_INT_BIT_WAKEUP) {
5179 IWL_DEBUG_ISR("Wakeup interrupt\n");
5180 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
5181 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
5182 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
5183 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
5184 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
5185 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
5186 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
5187
5188 handled |= CSR_INT_BIT_WAKEUP;
5189 }
5190
5191 /* All uCode command responses, including Tx command responses,
5192 * Rx "responses" (frame-received notification), and other
5193 * notifications from uCode come through here*/
5194 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
5195 iwl4965_rx_handle(priv);
5196 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
5197 }
5198
5199 if (inta & CSR_INT_BIT_FH_TX) {
5200 IWL_DEBUG_ISR("Tx interrupt\n");
5201 handled |= CSR_INT_BIT_FH_TX;
5202 }
5203
5204 if (inta & ~handled)
5205 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
5206
5207 if (inta & ~CSR_INI_SET_MASK) {
5208 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
5209 inta & ~CSR_INI_SET_MASK);
5210 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
5211 }
5212
5213 /* Re-enable all interrupts */
5214 iwl4965_enable_interrupts(priv);
5215
5216 #ifdef CONFIG_IWL4965_DEBUG
5217 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5218 inta = iwl4965_read32(priv, CSR_INT);
5219 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5220 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5221 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
5222 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
5223 }
5224 #endif
5225 spin_unlock_irqrestore(&priv->lock, flags);
5226 }
5227
5228 static irqreturn_t iwl4965_isr(int irq, void *data)
5229 {
5230 struct iwl4965_priv *priv = data;
5231 u32 inta, inta_mask;
5232 u32 inta_fh;
5233 if (!priv)
5234 return IRQ_NONE;
5235
5236 spin_lock(&priv->lock);
5237
5238 /* Disable (but don't clear!) interrupts here to avoid
5239 * back-to-back ISRs and sporadic interrupts from our NIC.
5240 * If we have something to service, the tasklet will re-enable ints.
5241 * If we *don't* have something, we'll re-enable before leaving here. */
5242 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
5243 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
5244
5245 /* Discover which interrupts are active/pending */
5246 inta = iwl4965_read32(priv, CSR_INT);
5247 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5248
5249 /* Ignore interrupt if there's nothing in NIC to service.
5250 * This may be due to IRQ shared with another device,
5251 * or due to sporadic interrupts thrown from our NIC. */
5252 if (!inta && !inta_fh) {
5253 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5254 goto none;
5255 }
5256
5257 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
5258 /* Hardware disappeared. It might have already raised
5259 * an interrupt */
5260 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
5261 goto unplugged;
5262 }
5263
5264 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5265 inta, inta_mask, inta_fh);
5266
5267 inta &= ~CSR_INT_BIT_SCD;
5268
5269 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
5270 if (likely(inta || inta_fh))
5271 tasklet_schedule(&priv->irq_tasklet);
5272
5273 unplugged:
5274 spin_unlock(&priv->lock);
5275 return IRQ_HANDLED;
5276
5277 none:
5278 /* re-enable interrupts here since we don't have anything to service. */
5279 iwl4965_enable_interrupts(priv);
5280 spin_unlock(&priv->lock);
5281 return IRQ_NONE;
5282 }
5283
5284 /************************** EEPROM BANDS ****************************
5285 *
5286 * The iwl4965_eeprom_band definitions below provide the mapping from the
5287 * EEPROM contents to the specific channel number supported for each
5288 * band.
5289 *
5290 * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
5291 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5292 * The specific geography and calibration information for that channel
5293 * is contained in the eeprom map itself.
5294 *
5295 * During init, we copy the eeprom information and channel map
5296 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5297 *
5298 * channel_map_24/52 provides the index in the channel_info array for a
5299 * given channel. We have to have two separate maps as there is channel
5300 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5301 * band_2
5302 *
5303 * A value of 0xff stored in the channel_map indicates that the channel
5304 * is not supported by the hardware at all.
5305 *
5306 * A value of 0xfe in the channel_map indicates that the channel is not
5307 * valid for Tx with the current hardware. This means that
5308 * while the system can tune and receive on a given channel, it may not
5309 * be able to associate or transmit any frames on that
5310 * channel. There is no corresponding channel information for that
5311 * entry.
5312 *
5313 *********************************************************************/
5314
5315 /* 2.4 GHz */
5316 static const u8 iwl4965_eeprom_band_1[14] = {
5317 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5318 };
5319
5320 /* 5.2 GHz bands */
5321 static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
5322 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5323 };
5324
5325 static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
5326 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5327 };
5328
5329 static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
5330 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5331 };
5332
5333 static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
5334 145, 149, 153, 157, 161, 165
5335 };
5336
5337 static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
5338 1, 2, 3, 4, 5, 6, 7
5339 };
5340
5341 static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
5342 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5343 };
5344
5345 static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
5346 int band,
5347 int *eeprom_ch_count,
5348 const struct iwl4965_eeprom_channel
5349 **eeprom_ch_info,
5350 const u8 **eeprom_ch_index)
5351 {
5352 switch (band) {
5353 case 1: /* 2.4GHz band */
5354 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
5355 *eeprom_ch_info = priv->eeprom.band_1_channels;
5356 *eeprom_ch_index = iwl4965_eeprom_band_1;
5357 break;
5358 case 2: /* 4.9GHz band */
5359 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
5360 *eeprom_ch_info = priv->eeprom.band_2_channels;
5361 *eeprom_ch_index = iwl4965_eeprom_band_2;
5362 break;
5363 case 3: /* 5.2GHz band */
5364 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
5365 *eeprom_ch_info = priv->eeprom.band_3_channels;
5366 *eeprom_ch_index = iwl4965_eeprom_band_3;
5367 break;
5368 case 4: /* 5.5GHz band */
5369 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
5370 *eeprom_ch_info = priv->eeprom.band_4_channels;
5371 *eeprom_ch_index = iwl4965_eeprom_band_4;
5372 break;
5373 case 5: /* 5.7GHz band */
5374 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
5375 *eeprom_ch_info = priv->eeprom.band_5_channels;
5376 *eeprom_ch_index = iwl4965_eeprom_band_5;
5377 break;
5378 case 6: /* 2.4GHz FAT channels */
5379 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
5380 *eeprom_ch_info = priv->eeprom.band_24_channels;
5381 *eeprom_ch_index = iwl4965_eeprom_band_6;
5382 break;
5383 case 7: /* 5 GHz FAT channels */
5384 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
5385 *eeprom_ch_info = priv->eeprom.band_52_channels;
5386 *eeprom_ch_index = iwl4965_eeprom_band_7;
5387 break;
5388 default:
5389 BUG();
5390 return;
5391 }
5392 }
5393
5394 /**
5395 * iwl4965_get_channel_info - Find driver's private channel info
5396 *
5397 * Based on band and channel number.
5398 */
5399 const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
5400 enum ieee80211_band band, u16 channel)
5401 {
5402 int i;
5403
5404 switch (band) {
5405 case IEEE80211_BAND_5GHZ:
5406 for (i = 14; i < priv->channel_count; i++) {
5407 if (priv->channel_info[i].channel == channel)
5408 return &priv->channel_info[i];
5409 }
5410 break;
5411 case IEEE80211_BAND_2GHZ:
5412 if (channel >= 1 && channel <= 14)
5413 return &priv->channel_info[channel - 1];
5414 break;
5415 default:
5416 BUG();
5417 }
5418
5419 return NULL;
5420 }
5421
5422 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5423 ? # x " " : "")
5424
5425 /**
5426 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5427 */
5428 static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
5429 {
5430 int eeprom_ch_count = 0;
5431 const u8 *eeprom_ch_index = NULL;
5432 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
5433 int band, ch;
5434 struct iwl4965_channel_info *ch_info;
5435
5436 if (priv->channel_count) {
5437 IWL_DEBUG_INFO("Channel map already initialized.\n");
5438 return 0;
5439 }
5440
5441 if (priv->eeprom.version < 0x2f) {
5442 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5443 priv->eeprom.version);
5444 return -EINVAL;
5445 }
5446
5447 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5448
5449 priv->channel_count =
5450 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5451 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5452 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5453 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5454 ARRAY_SIZE(iwl4965_eeprom_band_5);
5455
5456 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5457
5458 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
5459 priv->channel_count, GFP_KERNEL);
5460 if (!priv->channel_info) {
5461 IWL_ERROR("Could not allocate channel_info\n");
5462 priv->channel_count = 0;
5463 return -ENOMEM;
5464 }
5465
5466 ch_info = priv->channel_info;
5467
5468 /* Loop through the 5 EEPROM bands adding them in order to the
5469 * channel map we maintain (that contains additional information than
5470 * what just in the EEPROM) */
5471 for (band = 1; band <= 5; band++) {
5472
5473 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5474 &eeprom_ch_info, &eeprom_ch_index);
5475
5476 /* Loop through each band adding each of the channels */
5477 for (ch = 0; ch < eeprom_ch_count; ch++) {
5478 ch_info->channel = eeprom_ch_index[ch];
5479 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
5480 IEEE80211_BAND_5GHZ;
5481
5482 /* permanently store EEPROM's channel regulatory flags
5483 * and max power in channel info database. */
5484 ch_info->eeprom = eeprom_ch_info[ch];
5485
5486 /* Copy the run-time flags so they are there even on
5487 * invalid channels */
5488 ch_info->flags = eeprom_ch_info[ch].flags;
5489
5490 if (!(is_channel_valid(ch_info))) {
5491 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5492 "No traffic\n",
5493 ch_info->channel,
5494 ch_info->flags,
5495 is_channel_a_band(ch_info) ?
5496 "5.2" : "2.4");
5497 ch_info++;
5498 continue;
5499 }
5500
5501 /* Initialize regulatory-based run-time data */
5502 ch_info->max_power_avg = ch_info->curr_txpow =
5503 eeprom_ch_info[ch].max_power_avg;
5504 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5505 ch_info->min_power = 0;
5506
5507 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5508 " %ddBm): Ad-Hoc %ssupported\n",
5509 ch_info->channel,
5510 is_channel_a_band(ch_info) ?
5511 "5.2" : "2.4",
5512 CHECK_AND_PRINT(IBSS),
5513 CHECK_AND_PRINT(ACTIVE),
5514 CHECK_AND_PRINT(RADAR),
5515 CHECK_AND_PRINT(WIDE),
5516 CHECK_AND_PRINT(NARROW),
5517 CHECK_AND_PRINT(DFS),
5518 eeprom_ch_info[ch].flags,
5519 eeprom_ch_info[ch].max_power_avg,
5520 ((eeprom_ch_info[ch].
5521 flags & EEPROM_CHANNEL_IBSS)
5522 && !(eeprom_ch_info[ch].
5523 flags & EEPROM_CHANNEL_RADAR))
5524 ? "" : "not ");
5525
5526 /* Set the user_txpower_limit to the highest power
5527 * supported by any channel */
5528 if (eeprom_ch_info[ch].max_power_avg >
5529 priv->user_txpower_limit)
5530 priv->user_txpower_limit =
5531 eeprom_ch_info[ch].max_power_avg;
5532
5533 ch_info++;
5534 }
5535 }
5536
5537 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
5538 for (band = 6; band <= 7; band++) {
5539 enum ieee80211_band ieeeband;
5540 u8 fat_extension_chan;
5541
5542 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
5543 &eeprom_ch_info, &eeprom_ch_index);
5544
5545 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
5546 ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
5547
5548 /* Loop through each band adding each of the channels */
5549 for (ch = 0; ch < eeprom_ch_count; ch++) {
5550
5551 if ((band == 6) &&
5552 ((eeprom_ch_index[ch] == 5) ||
5553 (eeprom_ch_index[ch] == 6) ||
5554 (eeprom_ch_index[ch] == 7)))
5555 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5556 else
5557 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5558
5559 /* Set up driver's info for lower half */
5560 iwl4965_set_fat_chan_info(priv, ieeeband,
5561 eeprom_ch_index[ch],
5562 &(eeprom_ch_info[ch]),
5563 fat_extension_chan);
5564
5565 /* Set up driver's info for upper half */
5566 iwl4965_set_fat_chan_info(priv, ieeeband,
5567 (eeprom_ch_index[ch] + 4),
5568 &(eeprom_ch_info[ch]),
5569 HT_IE_EXT_CHANNEL_BELOW);
5570 }
5571 }
5572
5573 return 0;
5574 }
5575
5576 /*
5577 * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
5578 */
5579 static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
5580 {
5581 kfree(priv->channel_info);
5582 priv->channel_count = 0;
5583 }
5584
5585 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5586 * sending probe req. This should be set long enough to hear probe responses
5587 * from more than one AP. */
5588 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5589 #define IWL_ACTIVE_DWELL_TIME_52 (10)
5590
5591 /* For faster active scanning, scan will move to the next channel if fewer than
5592 * PLCP_QUIET_THRESH packets are heard on this channel within
5593 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5594 * time if it's a quiet channel (nothing responded to our probe, and there's
5595 * no other traffic).
5596 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5597 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5598 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5599
5600 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5601 * Must be set longer than active dwell time.
5602 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5603 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5604 #define IWL_PASSIVE_DWELL_TIME_52 (10)
5605 #define IWL_PASSIVE_DWELL_BASE (100)
5606 #define IWL_CHANNEL_TUNE_TIME 5
5607
5608 static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
5609 enum ieee80211_band band)
5610 {
5611 if (band == IEEE80211_BAND_5GHZ)
5612 return IWL_ACTIVE_DWELL_TIME_52;
5613 else
5614 return IWL_ACTIVE_DWELL_TIME_24;
5615 }
5616
5617 static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
5618 enum ieee80211_band band)
5619 {
5620 u16 active = iwl4965_get_active_dwell_time(priv, band);
5621 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
5622 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5623 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5624
5625 if (iwl4965_is_associated(priv)) {
5626 /* If we're associated, we clamp the maximum passive
5627 * dwell time to be 98% of the beacon interval (minus
5628 * 2 * channel tune time) */
5629 passive = priv->beacon_int;
5630 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5631 passive = IWL_PASSIVE_DWELL_BASE;
5632 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5633 }
5634
5635 if (passive <= active)
5636 passive = active + 1;
5637
5638 return passive;
5639 }
5640
5641 static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
5642 enum ieee80211_band band,
5643 u8 is_active, u8 direct_mask,
5644 struct iwl4965_scan_channel *scan_ch)
5645 {
5646 const struct ieee80211_channel *channels = NULL;
5647 const struct ieee80211_supported_band *sband;
5648 const struct iwl4965_channel_info *ch_info;
5649 u16 passive_dwell = 0;
5650 u16 active_dwell = 0;
5651 int added, i;
5652
5653 sband = iwl4965_get_hw_mode(priv, band);
5654 if (!sband)
5655 return 0;
5656
5657 channels = sband->channels;
5658
5659 active_dwell = iwl4965_get_active_dwell_time(priv, band);
5660 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
5661
5662 for (i = 0, added = 0; i < sband->n_channels; i++) {
5663 if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
5664 le16_to_cpu(priv->active_rxon.channel)) {
5665 if (iwl4965_is_associated(priv)) {
5666 IWL_DEBUG_SCAN
5667 ("Skipping current channel %d\n",
5668 le16_to_cpu(priv->active_rxon.channel));
5669 continue;
5670 }
5671 } else if (priv->only_active_channel)
5672 continue;
5673
5674 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
5675
5676 ch_info = iwl4965_get_channel_info(priv, band,
5677 scan_ch->channel);
5678 if (!is_channel_valid(ch_info)) {
5679 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5680 scan_ch->channel);
5681 continue;
5682 }
5683
5684 if (!is_active || is_channel_passive(ch_info) ||
5685 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
5686 scan_ch->type = 0; /* passive */
5687 else
5688 scan_ch->type = 1; /* active */
5689
5690 if (scan_ch->type & 1)
5691 scan_ch->type |= (direct_mask << 1);
5692
5693 if (is_channel_narrow(ch_info))
5694 scan_ch->type |= (1 << 7);
5695
5696 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5697 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5698
5699 /* Set txpower levels to defaults */
5700 scan_ch->tpc.dsp_atten = 110;
5701 /* scan_pwr_info->tpc.dsp_atten; */
5702
5703 /*scan_pwr_info->tpc.tx_gain; */
5704 if (band == IEEE80211_BAND_5GHZ)
5705 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5706 else {
5707 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5708 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5709 * power level:
5710 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
5711 */
5712 }
5713
5714 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5715 scan_ch->channel,
5716 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5717 (scan_ch->type & 1) ?
5718 active_dwell : passive_dwell);
5719
5720 scan_ch++;
5721 added++;
5722 }
5723
5724 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5725 return added;
5726 }
5727
5728 static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
5729 struct ieee80211_rate *rates)
5730 {
5731 int i;
5732
5733 for (i = 0; i < IWL_RATE_COUNT; i++) {
5734 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
5735 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5736 rates[i].hw_value_short = i;
5737 rates[i].flags = 0;
5738 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
5739 /*
5740 * If CCK != 1M then set short preamble rate flag.
5741 */
5742 rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
5743 0 : IEEE80211_RATE_SHORT_PREAMBLE;
5744 }
5745 }
5746 }
5747
5748 /**
5749 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
5750 */
5751 static int iwl4965_init_geos(struct iwl4965_priv *priv)
5752 {
5753 struct iwl4965_channel_info *ch;
5754 struct ieee80211_supported_band *band;
5755 struct ieee80211_channel *channels;
5756 struct ieee80211_channel *geo_ch;
5757 struct ieee80211_rate *rates;
5758 int i = 0;
5759
5760 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5761 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
5762 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5763 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5764 return 0;
5765 }
5766
5767 channels = kzalloc(sizeof(struct ieee80211_channel) *
5768 priv->channel_count, GFP_KERNEL);
5769 if (!channels)
5770 return -ENOMEM;
5771
5772 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5773 GFP_KERNEL);
5774 if (!rates) {
5775 kfree(channels);
5776 return -ENOMEM;
5777 }
5778
5779 /* 5.2GHz channels start after the 2.4GHz channels */
5780 band = &priv->bands[IEEE80211_BAND_5GHZ];
5781 band->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
5782 band->bitrates = &rates[4];
5783 band->n_bitrates = 8; /* just OFDM */
5784
5785 iwl4965_init_ht_hw_capab(&band->ht_info, IEEE80211_BAND_5GHZ);
5786
5787 band = &priv->bands[IEEE80211_BAND_2GHZ];
5788 band->channels = channels;
5789 band->bitrates = rates;
5790 band->n_bitrates = 12; /* OFDM & CCK */
5791
5792 iwl4965_init_ht_hw_capab(&band->ht_info, IEEE80211_BAND_2GHZ);
5793
5794 priv->ieee_channels = channels;
5795 priv->ieee_rates = rates;
5796
5797 iwl4965_init_hw_rates(priv, rates);
5798
5799 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5800 ch = &priv->channel_info[i];
5801
5802 if (!is_channel_valid(ch)) {
5803 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5804 "skipping.\n",
5805 ch->channel, is_channel_a_band(ch) ?
5806 "5.2" : "2.4");
5807 continue;
5808 }
5809
5810 if (is_channel_a_band(ch)) {
5811 geo_ch = &priv->bands[IEEE80211_BAND_5GHZ].channels[priv->bands[IEEE80211_BAND_5GHZ].n_channels++];
5812 } else
5813 geo_ch = &priv->bands[IEEE80211_BAND_2GHZ].channels[priv->bands[IEEE80211_BAND_2GHZ].n_channels++];
5814
5815 geo_ch->center_freq = ieee80211chan2mhz(ch->channel);
5816 geo_ch->max_power = ch->max_power_avg;
5817 geo_ch->max_antenna_gain = 0xff;
5818 geo_ch->hw_value = ch->channel;
5819
5820 if (is_channel_valid(ch)) {
5821 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5822 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
5823
5824 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5825 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
5826
5827 if (ch->flags & EEPROM_CHANNEL_RADAR)
5828 geo_ch->flags |= IEEE80211_CHAN_RADAR;
5829
5830 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5831 priv->max_channel_txpower_limit =
5832 ch->max_power_avg;
5833 } else
5834 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
5835 }
5836
5837 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && priv->is_abg) {
5838 printk(KERN_INFO DRV_NAME
5839 ": Incorrectly detected BG card as ABG. Please send "
5840 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5841 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5842 priv->is_abg = 0;
5843 }
5844
5845 printk(KERN_INFO DRV_NAME
5846 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5847 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5848 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
5849
5850 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
5851 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
5852
5853 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5854
5855 return 0;
5856 }
5857
5858 /*
5859 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
5860 */
5861 static void iwl4965_free_geos(struct iwl4965_priv *priv)
5862 {
5863 kfree(priv->ieee_channels);
5864 kfree(priv->ieee_rates);
5865 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5866 }
5867
5868 /******************************************************************************
5869 *
5870 * uCode download functions
5871 *
5872 ******************************************************************************/
5873
5874 static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
5875 {
5876 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5877 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5878 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5879 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5880 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5881 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5882 }
5883
5884 /**
5885 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
5886 * looking at all data.
5887 */
5888 static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
5889 u32 len)
5890 {
5891 u32 val;
5892 u32 save_len = len;
5893 int rc = 0;
5894 u32 errcnt;
5895
5896 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5897
5898 rc = iwl4965_grab_nic_access(priv);
5899 if (rc)
5900 return rc;
5901
5902 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5903
5904 errcnt = 0;
5905 for (; len > 0; len -= sizeof(u32), image++) {
5906 /* read data comes through single port, auto-incr addr */
5907 /* NOTE: Use the debugless read so we don't flood kernel log
5908 * if IWL_DL_IO is set */
5909 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5910 if (val != le32_to_cpu(*image)) {
5911 IWL_ERROR("uCode INST section is invalid at "
5912 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5913 save_len - len, val, le32_to_cpu(*image));
5914 rc = -EIO;
5915 errcnt++;
5916 if (errcnt >= 20)
5917 break;
5918 }
5919 }
5920
5921 iwl4965_release_nic_access(priv);
5922
5923 if (!errcnt)
5924 IWL_DEBUG_INFO
5925 ("ucode image in INSTRUCTION memory is good\n");
5926
5927 return rc;
5928 }
5929
5930
5931 /**
5932 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
5933 * using sample data 100 bytes apart. If these sample points are good,
5934 * it's a pretty good bet that everything between them is good, too.
5935 */
5936 static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
5937 {
5938 u32 val;
5939 int rc = 0;
5940 u32 errcnt = 0;
5941 u32 i;
5942
5943 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5944
5945 rc = iwl4965_grab_nic_access(priv);
5946 if (rc)
5947 return rc;
5948
5949 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5950 /* read data comes through single port, auto-incr addr */
5951 /* NOTE: Use the debugless read so we don't flood kernel log
5952 * if IWL_DL_IO is set */
5953 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5954 i + RTC_INST_LOWER_BOUND);
5955 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5956 if (val != le32_to_cpu(*image)) {
5957 #if 0 /* Enable this if you want to see details */
5958 IWL_ERROR("uCode INST section is invalid at "
5959 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5960 i, val, *image);
5961 #endif
5962 rc = -EIO;
5963 errcnt++;
5964 if (errcnt >= 3)
5965 break;
5966 }
5967 }
5968
5969 iwl4965_release_nic_access(priv);
5970
5971 return rc;
5972 }
5973
5974
5975 /**
5976 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
5977 * and verify its contents
5978 */
5979 static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
5980 {
5981 __le32 *image;
5982 u32 len;
5983 int rc = 0;
5984
5985 /* Try bootstrap */
5986 image = (__le32 *)priv->ucode_boot.v_addr;
5987 len = priv->ucode_boot.len;
5988 rc = iwl4965_verify_inst_sparse(priv, image, len);
5989 if (rc == 0) {
5990 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5991 return 0;
5992 }
5993
5994 /* Try initialize */
5995 image = (__le32 *)priv->ucode_init.v_addr;
5996 len = priv->ucode_init.len;
5997 rc = iwl4965_verify_inst_sparse(priv, image, len);
5998 if (rc == 0) {
5999 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
6000 return 0;
6001 }
6002
6003 /* Try runtime/protocol */
6004 image = (__le32 *)priv->ucode_code.v_addr;
6005 len = priv->ucode_code.len;
6006 rc = iwl4965_verify_inst_sparse(priv, image, len);
6007 if (rc == 0) {
6008 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
6009 return 0;
6010 }
6011
6012 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
6013
6014 /* Since nothing seems to match, show first several data entries in
6015 * instruction SRAM, so maybe visual inspection will give a clue.
6016 * Selection of bootstrap image (vs. other images) is arbitrary. */
6017 image = (__le32 *)priv->ucode_boot.v_addr;
6018 len = priv->ucode_boot.len;
6019 rc = iwl4965_verify_inst_full(priv, image, len);
6020
6021 return rc;
6022 }
6023
6024
6025 /* check contents of special bootstrap uCode SRAM */
6026 static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
6027 {
6028 __le32 *image = priv->ucode_boot.v_addr;
6029 u32 len = priv->ucode_boot.len;
6030 u32 reg;
6031 u32 val;
6032
6033 IWL_DEBUG_INFO("Begin verify bsm\n");
6034
6035 /* verify BSM SRAM contents */
6036 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
6037 for (reg = BSM_SRAM_LOWER_BOUND;
6038 reg < BSM_SRAM_LOWER_BOUND + len;
6039 reg += sizeof(u32), image ++) {
6040 val = iwl4965_read_prph(priv, reg);
6041 if (val != le32_to_cpu(*image)) {
6042 IWL_ERROR("BSM uCode verification failed at "
6043 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
6044 BSM_SRAM_LOWER_BOUND,
6045 reg - BSM_SRAM_LOWER_BOUND, len,
6046 val, le32_to_cpu(*image));
6047 return -EIO;
6048 }
6049 }
6050
6051 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
6052
6053 return 0;
6054 }
6055
6056 /**
6057 * iwl4965_load_bsm - Load bootstrap instructions
6058 *
6059 * BSM operation:
6060 *
6061 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
6062 * in special SRAM that does not power down during RFKILL. When powering back
6063 * up after power-saving sleeps (or during initial uCode load), the BSM loads
6064 * the bootstrap program into the on-board processor, and starts it.
6065 *
6066 * The bootstrap program loads (via DMA) instructions and data for a new
6067 * program from host DRAM locations indicated by the host driver in the
6068 * BSM_DRAM_* registers. Once the new program is loaded, it starts
6069 * automatically.
6070 *
6071 * When initializing the NIC, the host driver points the BSM to the
6072 * "initialize" uCode image. This uCode sets up some internal data, then
6073 * notifies host via "initialize alive" that it is complete.
6074 *
6075 * The host then replaces the BSM_DRAM_* pointer values to point to the
6076 * normal runtime uCode instructions and a backup uCode data cache buffer
6077 * (filled initially with starting data values for the on-board processor),
6078 * then triggers the "initialize" uCode to load and launch the runtime uCode,
6079 * which begins normal operation.
6080 *
6081 * When doing a power-save shutdown, runtime uCode saves data SRAM into
6082 * the backup data cache in DRAM before SRAM is powered down.
6083 *
6084 * When powering back up, the BSM loads the bootstrap program. This reloads
6085 * the runtime uCode instructions and the backup data cache into SRAM,
6086 * and re-launches the runtime uCode from where it left off.
6087 */
6088 static int iwl4965_load_bsm(struct iwl4965_priv *priv)
6089 {
6090 __le32 *image = priv->ucode_boot.v_addr;
6091 u32 len = priv->ucode_boot.len;
6092 dma_addr_t pinst;
6093 dma_addr_t pdata;
6094 u32 inst_len;
6095 u32 data_len;
6096 int rc;
6097 int i;
6098 u32 done;
6099 u32 reg_offset;
6100
6101 IWL_DEBUG_INFO("Begin load bsm\n");
6102
6103 /* make sure bootstrap program is no larger than BSM's SRAM size */
6104 if (len > IWL_MAX_BSM_SIZE)
6105 return -EINVAL;
6106
6107 /* Tell bootstrap uCode where to find the "Initialize" uCode
6108 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
6109 * NOTE: iwl4965_initialize_alive_start() will replace these values,
6110 * after the "initialize" uCode has run, to point to
6111 * runtime/protocol instructions and backup data cache. */
6112 pinst = priv->ucode_init.p_addr >> 4;
6113 pdata = priv->ucode_init_data.p_addr >> 4;
6114 inst_len = priv->ucode_init.len;
6115 data_len = priv->ucode_init_data.len;
6116
6117 rc = iwl4965_grab_nic_access(priv);
6118 if (rc)
6119 return rc;
6120
6121 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6122 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6123 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
6124 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
6125
6126 /* Fill BSM memory with bootstrap instructions */
6127 for (reg_offset = BSM_SRAM_LOWER_BOUND;
6128 reg_offset < BSM_SRAM_LOWER_BOUND + len;
6129 reg_offset += sizeof(u32), image++)
6130 _iwl4965_write_prph(priv, reg_offset,
6131 le32_to_cpu(*image));
6132
6133 rc = iwl4965_verify_bsm(priv);
6134 if (rc) {
6135 iwl4965_release_nic_access(priv);
6136 return rc;
6137 }
6138
6139 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
6140 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
6141 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
6142 RTC_INST_LOWER_BOUND);
6143 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
6144
6145 /* Load bootstrap code into instruction SRAM now,
6146 * to prepare to load "initialize" uCode */
6147 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
6148 BSM_WR_CTRL_REG_BIT_START);
6149
6150 /* Wait for load of bootstrap uCode to finish */
6151 for (i = 0; i < 100; i++) {
6152 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
6153 if (!(done & BSM_WR_CTRL_REG_BIT_START))
6154 break;
6155 udelay(10);
6156 }
6157 if (i < 100)
6158 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
6159 else {
6160 IWL_ERROR("BSM write did not complete!\n");
6161 return -EIO;
6162 }
6163
6164 /* Enable future boot loads whenever power management unit triggers it
6165 * (e.g. when powering back up after power-save shutdown) */
6166 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
6167 BSM_WR_CTRL_REG_BIT_START_EN);
6168
6169 iwl4965_release_nic_access(priv);
6170
6171 return 0;
6172 }
6173
6174 static void iwl4965_nic_start(struct iwl4965_priv *priv)
6175 {
6176 /* Remove all resets to allow NIC to operate */
6177 iwl4965_write32(priv, CSR_RESET, 0);
6178 }
6179
6180
6181 /**
6182 * iwl4965_read_ucode - Read uCode images from disk file.
6183 *
6184 * Copy into buffers for card to fetch via bus-mastering
6185 */
6186 static int iwl4965_read_ucode(struct iwl4965_priv *priv)
6187 {
6188 struct iwl4965_ucode *ucode;
6189 int ret;
6190 const struct firmware *ucode_raw;
6191 const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
6192 u8 *src;
6193 size_t len;
6194 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
6195
6196 /* Ask kernel firmware_class module to get the boot firmware off disk.
6197 * request_firmware() is synchronous, file is in memory on return. */
6198 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
6199 if (ret < 0) {
6200 IWL_ERROR("%s firmware file req failed: Reason %d\n",
6201 name, ret);
6202 goto error;
6203 }
6204
6205 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
6206 name, ucode_raw->size);
6207
6208 /* Make sure that we got at least our header! */
6209 if (ucode_raw->size < sizeof(*ucode)) {
6210 IWL_ERROR("File size way too small!\n");
6211 ret = -EINVAL;
6212 goto err_release;
6213 }
6214
6215 /* Data from ucode file: header followed by uCode images */
6216 ucode = (void *)ucode_raw->data;
6217
6218 ver = le32_to_cpu(ucode->ver);
6219 inst_size = le32_to_cpu(ucode->inst_size);
6220 data_size = le32_to_cpu(ucode->data_size);
6221 init_size = le32_to_cpu(ucode->init_size);
6222 init_data_size = le32_to_cpu(ucode->init_data_size);
6223 boot_size = le32_to_cpu(ucode->boot_size);
6224
6225 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
6226 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
6227 inst_size);
6228 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
6229 data_size);
6230 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
6231 init_size);
6232 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
6233 init_data_size);
6234 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
6235 boot_size);
6236
6237 /* Verify size of file vs. image size info in file's header */
6238 if (ucode_raw->size < sizeof(*ucode) +
6239 inst_size + data_size + init_size +
6240 init_data_size + boot_size) {
6241
6242 IWL_DEBUG_INFO("uCode file size %d too small\n",
6243 (int)ucode_raw->size);
6244 ret = -EINVAL;
6245 goto err_release;
6246 }
6247
6248 /* Verify that uCode images will fit in card's SRAM */
6249 if (inst_size > IWL_MAX_INST_SIZE) {
6250 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
6251 inst_size);
6252 ret = -EINVAL;
6253 goto err_release;
6254 }
6255
6256 if (data_size > IWL_MAX_DATA_SIZE) {
6257 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
6258 data_size);
6259 ret = -EINVAL;
6260 goto err_release;
6261 }
6262 if (init_size > IWL_MAX_INST_SIZE) {
6263 IWL_DEBUG_INFO
6264 ("uCode init instr len %d too large to fit in\n",
6265 init_size);
6266 ret = -EINVAL;
6267 goto err_release;
6268 }
6269 if (init_data_size > IWL_MAX_DATA_SIZE) {
6270 IWL_DEBUG_INFO
6271 ("uCode init data len %d too large to fit in\n",
6272 init_data_size);
6273 ret = -EINVAL;
6274 goto err_release;
6275 }
6276 if (boot_size > IWL_MAX_BSM_SIZE) {
6277 IWL_DEBUG_INFO
6278 ("uCode boot instr len %d too large to fit in\n",
6279 boot_size);
6280 ret = -EINVAL;
6281 goto err_release;
6282 }
6283
6284 /* Allocate ucode buffers for card's bus-master loading ... */
6285
6286 /* Runtime instructions and 2 copies of data:
6287 * 1) unmodified from disk
6288 * 2) backup cache for save/restore during power-downs */
6289 priv->ucode_code.len = inst_size;
6290 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
6291
6292 priv->ucode_data.len = data_size;
6293 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
6294
6295 priv->ucode_data_backup.len = data_size;
6296 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
6297
6298 /* Initialization instructions and data */
6299 if (init_size && init_data_size) {
6300 priv->ucode_init.len = init_size;
6301 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
6302
6303 priv->ucode_init_data.len = init_data_size;
6304 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6305
6306 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6307 goto err_pci_alloc;
6308 }
6309
6310 /* Bootstrap (instructions only, no data) */
6311 if (boot_size) {
6312 priv->ucode_boot.len = boot_size;
6313 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
6314
6315 if (!priv->ucode_boot.v_addr)
6316 goto err_pci_alloc;
6317 }
6318
6319 /* Copy images into buffers for card's bus-master reads ... */
6320
6321 /* Runtime instructions (first block of data in file) */
6322 src = &ucode->data[0];
6323 len = priv->ucode_code.len;
6324 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
6325 memcpy(priv->ucode_code.v_addr, src, len);
6326 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6327 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6328
6329 /* Runtime data (2nd block)
6330 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
6331 src = &ucode->data[inst_size];
6332 len = priv->ucode_data.len;
6333 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
6334 memcpy(priv->ucode_data.v_addr, src, len);
6335 memcpy(priv->ucode_data_backup.v_addr, src, len);
6336
6337 /* Initialization instructions (3rd block) */
6338 if (init_size) {
6339 src = &ucode->data[inst_size + data_size];
6340 len = priv->ucode_init.len;
6341 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6342 len);
6343 memcpy(priv->ucode_init.v_addr, src, len);
6344 }
6345
6346 /* Initialization data (4th block) */
6347 if (init_data_size) {
6348 src = &ucode->data[inst_size + data_size + init_size];
6349 len = priv->ucode_init_data.len;
6350 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6351 len);
6352 memcpy(priv->ucode_init_data.v_addr, src, len);
6353 }
6354
6355 /* Bootstrap instructions (5th block) */
6356 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6357 len = priv->ucode_boot.len;
6358 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
6359 memcpy(priv->ucode_boot.v_addr, src, len);
6360
6361 /* We have our copies now, allow OS release its copies */
6362 release_firmware(ucode_raw);
6363 return 0;
6364
6365 err_pci_alloc:
6366 IWL_ERROR("failed to allocate pci memory\n");
6367 ret = -ENOMEM;
6368 iwl4965_dealloc_ucode_pci(priv);
6369
6370 err_release:
6371 release_firmware(ucode_raw);
6372
6373 error:
6374 return ret;
6375 }
6376
6377
6378 /**
6379 * iwl4965_set_ucode_ptrs - Set uCode address location
6380 *
6381 * Tell initialization uCode where to find runtime uCode.
6382 *
6383 * BSM registers initially contain pointers to initialization uCode.
6384 * We need to replace them to load runtime uCode inst and data,
6385 * and to save runtime data when powering down.
6386 */
6387 static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
6388 {
6389 dma_addr_t pinst;
6390 dma_addr_t pdata;
6391 int rc = 0;
6392 unsigned long flags;
6393
6394 /* bits 35:4 for 4965 */
6395 pinst = priv->ucode_code.p_addr >> 4;
6396 pdata = priv->ucode_data_backup.p_addr >> 4;
6397
6398 spin_lock_irqsave(&priv->lock, flags);
6399 rc = iwl4965_grab_nic_access(priv);
6400 if (rc) {
6401 spin_unlock_irqrestore(&priv->lock, flags);
6402 return rc;
6403 }
6404
6405 /* Tell bootstrap uCode where to find image to load */
6406 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6407 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6408 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6409 priv->ucode_data.len);
6410
6411 /* Inst bytecount must be last to set up, bit 31 signals uCode
6412 * that all new ptr/size info is in place */
6413 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6414 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6415
6416 iwl4965_release_nic_access(priv);
6417
6418 spin_unlock_irqrestore(&priv->lock, flags);
6419
6420 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6421
6422 return rc;
6423 }
6424
6425 /**
6426 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
6427 *
6428 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6429 *
6430 * The 4965 "initialize" ALIVE reply contains calibration data for:
6431 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6432 * (3945 does not contain this data).
6433 *
6434 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6435 */
6436 static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
6437 {
6438 /* Check alive response for "valid" sign from uCode */
6439 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6440 /* We had an error bringing up the hardware, so take it
6441 * all the way back down so we can try again */
6442 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6443 goto restart;
6444 }
6445
6446 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6447 * This is a paranoid check, because we would not have gotten the
6448 * "initialize" alive if code weren't properly loaded. */
6449 if (iwl4965_verify_ucode(priv)) {
6450 /* Runtime instruction load was bad;
6451 * take it all the way back down so we can try again */
6452 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6453 goto restart;
6454 }
6455
6456 /* Calculate temperature */
6457 priv->temperature = iwl4965_get_temperature(priv);
6458
6459 /* Send pointers to protocol/runtime uCode image ... init code will
6460 * load and launch runtime uCode, which will send us another "Alive"
6461 * notification. */
6462 IWL_DEBUG_INFO("Initialization Alive received.\n");
6463 if (iwl4965_set_ucode_ptrs(priv)) {
6464 /* Runtime instruction load won't happen;
6465 * take it all the way back down so we can try again */
6466 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6467 goto restart;
6468 }
6469 return;
6470
6471 restart:
6472 queue_work(priv->workqueue, &priv->restart);
6473 }
6474
6475
6476 /**
6477 * iwl4965_alive_start - called after REPLY_ALIVE notification received
6478 * from protocol/runtime uCode (initialization uCode's
6479 * Alive gets handled by iwl4965_init_alive_start()).
6480 */
6481 static void iwl4965_alive_start(struct iwl4965_priv *priv)
6482 {
6483 int rc = 0;
6484
6485 IWL_DEBUG_INFO("Runtime Alive received.\n");
6486
6487 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6488 /* We had an error bringing up the hardware, so take it
6489 * all the way back down so we can try again */
6490 IWL_DEBUG_INFO("Alive failed.\n");
6491 goto restart;
6492 }
6493
6494 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6495 * This is a paranoid check, because we would not have gotten the
6496 * "runtime" alive if code weren't properly loaded. */
6497 if (iwl4965_verify_ucode(priv)) {
6498 /* Runtime instruction load was bad;
6499 * take it all the way back down so we can try again */
6500 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6501 goto restart;
6502 }
6503
6504 iwl4965_clear_stations_table(priv);
6505
6506 rc = iwl4965_alive_notify(priv);
6507 if (rc) {
6508 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6509 rc);
6510 goto restart;
6511 }
6512
6513 /* After the ALIVE response, we can send host commands to 4965 uCode */
6514 set_bit(STATUS_ALIVE, &priv->status);
6515
6516 /* Clear out the uCode error bit if it is set */
6517 clear_bit(STATUS_FW_ERROR, &priv->status);
6518
6519 if (iwl4965_is_rfkill(priv))
6520 return;
6521
6522 ieee80211_start_queues(priv->hw);
6523
6524 priv->active_rate = priv->rates_mask;
6525 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6526
6527 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6528
6529 if (iwl4965_is_associated(priv)) {
6530 struct iwl4965_rxon_cmd *active_rxon =
6531 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
6532
6533 memcpy(&priv->staging_rxon, &priv->active_rxon,
6534 sizeof(priv->staging_rxon));
6535 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6536 } else {
6537 /* Initialize our rx_config data */
6538 iwl4965_connection_init_rx_config(priv);
6539 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6540 }
6541
6542 /* Configure Bluetooth device coexistence support */
6543 iwl4965_send_bt_config(priv);
6544
6545 /* Configure the adapter for unassociated operation */
6546 iwl4965_commit_rxon(priv);
6547
6548 /* At this point, the NIC is initialized and operational */
6549 priv->notif_missed_beacons = 0;
6550 set_bit(STATUS_READY, &priv->status);
6551
6552 iwl4965_rf_kill_ct_config(priv);
6553
6554 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6555 wake_up_interruptible(&priv->wait_command_queue);
6556
6557 if (priv->error_recovering)
6558 iwl4965_error_recovery(priv);
6559
6560 return;
6561
6562 restart:
6563 queue_work(priv->workqueue, &priv->restart);
6564 }
6565
6566 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
6567
6568 static void __iwl4965_down(struct iwl4965_priv *priv)
6569 {
6570 unsigned long flags;
6571 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6572 struct ieee80211_conf *conf = NULL;
6573
6574 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6575
6576 conf = ieee80211_get_hw_conf(priv->hw);
6577
6578 if (!exit_pending)
6579 set_bit(STATUS_EXIT_PENDING, &priv->status);
6580
6581 iwl4965_clear_stations_table(priv);
6582
6583 /* Unblock any waiting calls */
6584 wake_up_interruptible_all(&priv->wait_command_queue);
6585
6586 /* Wipe out the EXIT_PENDING status bit if we are not actually
6587 * exiting the module */
6588 if (!exit_pending)
6589 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6590
6591 /* stop and reset the on-board processor */
6592 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6593
6594 /* tell the device to stop sending interrupts */
6595 iwl4965_disable_interrupts(priv);
6596
6597 if (priv->mac80211_registered)
6598 ieee80211_stop_queues(priv->hw);
6599
6600 /* If we have not previously called iwl4965_init() then
6601 * clear all bits but the RF Kill and SUSPEND bits and return */
6602 if (!iwl4965_is_init(priv)) {
6603 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6604 STATUS_RF_KILL_HW |
6605 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6606 STATUS_RF_KILL_SW |
6607 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6608 STATUS_GEO_CONFIGURED |
6609 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6610 STATUS_IN_SUSPEND;
6611 goto exit;
6612 }
6613
6614 /* ...otherwise clear out all the status bits but the RF Kill and
6615 * SUSPEND bits and continue taking the NIC down. */
6616 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6617 STATUS_RF_KILL_HW |
6618 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6619 STATUS_RF_KILL_SW |
6620 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6621 STATUS_GEO_CONFIGURED |
6622 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6623 STATUS_IN_SUSPEND |
6624 test_bit(STATUS_FW_ERROR, &priv->status) <<
6625 STATUS_FW_ERROR;
6626
6627 spin_lock_irqsave(&priv->lock, flags);
6628 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6629 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6630 spin_unlock_irqrestore(&priv->lock, flags);
6631
6632 iwl4965_hw_txq_ctx_stop(priv);
6633 iwl4965_hw_rxq_stop(priv);
6634
6635 spin_lock_irqsave(&priv->lock, flags);
6636 if (!iwl4965_grab_nic_access(priv)) {
6637 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
6638 APMG_CLK_VAL_DMA_CLK_RQT);
6639 iwl4965_release_nic_access(priv);
6640 }
6641 spin_unlock_irqrestore(&priv->lock, flags);
6642
6643 udelay(5);
6644
6645 iwl4965_hw_nic_stop_master(priv);
6646 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6647 iwl4965_hw_nic_reset(priv);
6648
6649 exit:
6650 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
6651
6652 if (priv->ibss_beacon)
6653 dev_kfree_skb(priv->ibss_beacon);
6654 priv->ibss_beacon = NULL;
6655
6656 /* clear out any free frames */
6657 iwl4965_clear_free_frames(priv);
6658 }
6659
6660 static void iwl4965_down(struct iwl4965_priv *priv)
6661 {
6662 mutex_lock(&priv->mutex);
6663 __iwl4965_down(priv);
6664 mutex_unlock(&priv->mutex);
6665
6666 iwl4965_cancel_deferred_work(priv);
6667 }
6668
6669 #define MAX_HW_RESTARTS 5
6670
6671 static int __iwl4965_up(struct iwl4965_priv *priv)
6672 {
6673 int rc, i;
6674
6675 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6676 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6677 return -EIO;
6678 }
6679
6680 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6681 IWL_WARNING("Radio disabled by SW RF kill (module "
6682 "parameter)\n");
6683 return -ENODEV;
6684 }
6685
6686 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6687 IWL_ERROR("ucode not available for device bringup\n");
6688 return -EIO;
6689 }
6690
6691 /* If platform's RF_KILL switch is NOT set to KILL */
6692 if (iwl4965_read32(priv, CSR_GP_CNTRL) &
6693 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6694 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6695 else {
6696 set_bit(STATUS_RF_KILL_HW, &priv->status);
6697 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6698 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6699 return -ENODEV;
6700 }
6701 }
6702
6703 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6704
6705 rc = iwl4965_hw_nic_init(priv);
6706 if (rc) {
6707 IWL_ERROR("Unable to int nic\n");
6708 return rc;
6709 }
6710
6711 /* make sure rfkill handshake bits are cleared */
6712 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6713 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6714 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6715
6716 /* clear (again), then enable host interrupts */
6717 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6718 iwl4965_enable_interrupts(priv);
6719
6720 /* really make sure rfkill handshake bits are cleared */
6721 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6722 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6723
6724 /* Copy original ucode data image from disk into backup cache.
6725 * This will be used to initialize the on-board processor's
6726 * data SRAM for a clean start when the runtime program first loads. */
6727 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6728 priv->ucode_data.len);
6729
6730 /* We return success when we resume from suspend and rf_kill is on. */
6731 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6732 return 0;
6733
6734 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6735
6736 iwl4965_clear_stations_table(priv);
6737
6738 /* load bootstrap state machine,
6739 * load bootstrap program into processor's memory,
6740 * prepare to load the "initialize" uCode */
6741 rc = iwl4965_load_bsm(priv);
6742
6743 if (rc) {
6744 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6745 continue;
6746 }
6747
6748 /* start card; "initialize" will load runtime ucode */
6749 iwl4965_nic_start(priv);
6750
6751 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6752
6753 return 0;
6754 }
6755
6756 set_bit(STATUS_EXIT_PENDING, &priv->status);
6757 __iwl4965_down(priv);
6758
6759 /* tried to restart and config the device for as long as our
6760 * patience could withstand */
6761 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6762 return -EIO;
6763 }
6764
6765
6766 /*****************************************************************************
6767 *
6768 * Workqueue callbacks
6769 *
6770 *****************************************************************************/
6771
6772 static void iwl4965_bg_init_alive_start(struct work_struct *data)
6773 {
6774 struct iwl4965_priv *priv =
6775 container_of(data, struct iwl4965_priv, init_alive_start.work);
6776
6777 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6778 return;
6779
6780 mutex_lock(&priv->mutex);
6781 iwl4965_init_alive_start(priv);
6782 mutex_unlock(&priv->mutex);
6783 }
6784
6785 static void iwl4965_bg_alive_start(struct work_struct *data)
6786 {
6787 struct iwl4965_priv *priv =
6788 container_of(data, struct iwl4965_priv, alive_start.work);
6789
6790 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6791 return;
6792
6793 mutex_lock(&priv->mutex);
6794 iwl4965_alive_start(priv);
6795 mutex_unlock(&priv->mutex);
6796 }
6797
6798 static void iwl4965_bg_rf_kill(struct work_struct *work)
6799 {
6800 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
6801
6802 wake_up_interruptible(&priv->wait_command_queue);
6803
6804 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6805 return;
6806
6807 mutex_lock(&priv->mutex);
6808
6809 if (!iwl4965_is_rfkill(priv)) {
6810 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6811 "HW and/or SW RF Kill no longer active, restarting "
6812 "device\n");
6813 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6814 queue_work(priv->workqueue, &priv->restart);
6815 } else {
6816
6817 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6818 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6819 "disabled by SW switch\n");
6820 else
6821 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6822 "Kill switch must be turned off for "
6823 "wireless networking to work.\n");
6824 }
6825 mutex_unlock(&priv->mutex);
6826 }
6827
6828 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6829
6830 static void iwl4965_bg_scan_check(struct work_struct *data)
6831 {
6832 struct iwl4965_priv *priv =
6833 container_of(data, struct iwl4965_priv, scan_check.work);
6834
6835 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6836 return;
6837
6838 mutex_lock(&priv->mutex);
6839 if (test_bit(STATUS_SCANNING, &priv->status) ||
6840 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6841 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6842 "Scan completion watchdog resetting adapter (%dms)\n",
6843 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6844
6845 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6846 iwl4965_send_scan_abort(priv);
6847 }
6848 mutex_unlock(&priv->mutex);
6849 }
6850
6851 static void iwl4965_bg_request_scan(struct work_struct *data)
6852 {
6853 struct iwl4965_priv *priv =
6854 container_of(data, struct iwl4965_priv, request_scan);
6855 struct iwl4965_host_cmd cmd = {
6856 .id = REPLY_SCAN_CMD,
6857 .len = sizeof(struct iwl4965_scan_cmd),
6858 .meta.flags = CMD_SIZE_HUGE,
6859 };
6860 int rc = 0;
6861 struct iwl4965_scan_cmd *scan;
6862 struct ieee80211_conf *conf = NULL;
6863 u16 cmd_len;
6864 enum ieee80211_band band;
6865 u8 direct_mask;
6866
6867 conf = ieee80211_get_hw_conf(priv->hw);
6868
6869 mutex_lock(&priv->mutex);
6870
6871 if (!iwl4965_is_ready(priv)) {
6872 IWL_WARNING("request scan called when driver not ready.\n");
6873 goto done;
6874 }
6875
6876 /* Make sure the scan wasn't cancelled before this queued work
6877 * was given the chance to run... */
6878 if (!test_bit(STATUS_SCANNING, &priv->status))
6879 goto done;
6880
6881 /* This should never be called or scheduled if there is currently
6882 * a scan active in the hardware. */
6883 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6884 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6885 "Ignoring second request.\n");
6886 rc = -EIO;
6887 goto done;
6888 }
6889
6890 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6891 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6892 goto done;
6893 }
6894
6895 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6896 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6897 goto done;
6898 }
6899
6900 if (iwl4965_is_rfkill(priv)) {
6901 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6902 goto done;
6903 }
6904
6905 if (!test_bit(STATUS_READY, &priv->status)) {
6906 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6907 goto done;
6908 }
6909
6910 if (!priv->scan_bands) {
6911 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6912 goto done;
6913 }
6914
6915 if (!priv->scan) {
6916 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
6917 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6918 if (!priv->scan) {
6919 rc = -ENOMEM;
6920 goto done;
6921 }
6922 }
6923 scan = priv->scan;
6924 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
6925
6926 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6927 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6928
6929 if (iwl4965_is_associated(priv)) {
6930 u16 interval = 0;
6931 u32 extra;
6932 u32 suspend_time = 100;
6933 u32 scan_suspend_time = 100;
6934 unsigned long flags;
6935
6936 IWL_DEBUG_INFO("Scanning while associated...\n");
6937
6938 spin_lock_irqsave(&priv->lock, flags);
6939 interval = priv->beacon_int;
6940 spin_unlock_irqrestore(&priv->lock, flags);
6941
6942 scan->suspend_time = 0;
6943 scan->max_out_time = cpu_to_le32(200 * 1024);
6944 if (!interval)
6945 interval = suspend_time;
6946
6947 extra = (suspend_time / interval) << 22;
6948 scan_suspend_time = (extra |
6949 ((suspend_time % interval) * 1024));
6950 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6951 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6952 scan_suspend_time, interval);
6953 }
6954
6955 /* We should add the ability for user to lock to PASSIVE ONLY */
6956 if (priv->one_direct_scan) {
6957 IWL_DEBUG_SCAN
6958 ("Kicking off one direct scan for '%s'\n",
6959 iwl4965_escape_essid(priv->direct_ssid,
6960 priv->direct_ssid_len));
6961 scan->direct_scan[0].id = WLAN_EID_SSID;
6962 scan->direct_scan[0].len = priv->direct_ssid_len;
6963 memcpy(scan->direct_scan[0].ssid,
6964 priv->direct_ssid, priv->direct_ssid_len);
6965 direct_mask = 1;
6966 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
6967 scan->direct_scan[0].id = WLAN_EID_SSID;
6968 scan->direct_scan[0].len = priv->essid_len;
6969 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6970 direct_mask = 1;
6971 } else
6972 direct_mask = 0;
6973
6974 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6975 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6976 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6977
6978
6979 switch (priv->scan_bands) {
6980 case 2:
6981 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6982 scan->tx_cmd.rate_n_flags =
6983 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
6984 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
6985
6986 scan->good_CRC_th = 0;
6987 band = IEEE80211_BAND_2GHZ;
6988 break;
6989
6990 case 1:
6991 scan->tx_cmd.rate_n_flags =
6992 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
6993 RATE_MCS_ANT_B_MSK);
6994 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6995 band = IEEE80211_BAND_5GHZ;
6996 break;
6997
6998 default:
6999 IWL_WARNING("Invalid scan band count\n");
7000 goto done;
7001 }
7002
7003 /* We don't build a direct scan probe request; the uCode will do
7004 * that based on the direct_mask added to each channel entry */
7005 cmd_len = iwl4965_fill_probe_req(priv, band,
7006 (struct ieee80211_mgmt *)scan->data,
7007 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
7008
7009 scan->tx_cmd.len = cpu_to_le16(cmd_len);
7010 /* select Rx chains */
7011
7012 /* Force use of chains B and C (0x6) for scan Rx.
7013 * Avoid A (0x1) because of its off-channel reception on A-band.
7014 * MIMO is not used here, but value is required to make uCode happy. */
7015 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
7016 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
7017 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
7018 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
7019
7020 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
7021 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
7022
7023 if (direct_mask)
7024 IWL_DEBUG_SCAN
7025 ("Initiating direct scan for %s.\n",
7026 iwl4965_escape_essid(priv->essid, priv->essid_len));
7027 else
7028 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
7029
7030 scan->channel_count =
7031 iwl4965_get_channels_for_scan(
7032 priv, band, 1, /* active */
7033 direct_mask,
7034 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
7035
7036 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
7037 scan->channel_count * sizeof(struct iwl4965_scan_channel);
7038 cmd.data = scan;
7039 scan->len = cpu_to_le16(cmd.len);
7040
7041 set_bit(STATUS_SCAN_HW, &priv->status);
7042 rc = iwl4965_send_cmd_sync(priv, &cmd);
7043 if (rc)
7044 goto done;
7045
7046 queue_delayed_work(priv->workqueue, &priv->scan_check,
7047 IWL_SCAN_CHECK_WATCHDOG);
7048
7049 mutex_unlock(&priv->mutex);
7050 return;
7051
7052 done:
7053 /* inform mac80211 scan aborted */
7054 queue_work(priv->workqueue, &priv->scan_completed);
7055 mutex_unlock(&priv->mutex);
7056 }
7057
7058 static void iwl4965_bg_up(struct work_struct *data)
7059 {
7060 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
7061
7062 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7063 return;
7064
7065 mutex_lock(&priv->mutex);
7066 __iwl4965_up(priv);
7067 mutex_unlock(&priv->mutex);
7068 }
7069
7070 static void iwl4965_bg_restart(struct work_struct *data)
7071 {
7072 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
7073
7074 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7075 return;
7076
7077 iwl4965_down(priv);
7078 queue_work(priv->workqueue, &priv->up);
7079 }
7080
7081 static void iwl4965_bg_rx_replenish(struct work_struct *data)
7082 {
7083 struct iwl4965_priv *priv =
7084 container_of(data, struct iwl4965_priv, rx_replenish);
7085
7086 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7087 return;
7088
7089 mutex_lock(&priv->mutex);
7090 iwl4965_rx_replenish(priv);
7091 mutex_unlock(&priv->mutex);
7092 }
7093
7094 #define IWL_DELAY_NEXT_SCAN (HZ*2)
7095
7096 static void iwl4965_bg_post_associate(struct work_struct *data)
7097 {
7098 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
7099 post_associate.work);
7100
7101 int rc = 0;
7102 struct ieee80211_conf *conf = NULL;
7103 DECLARE_MAC_BUF(mac);
7104
7105 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7106 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
7107 return;
7108 }
7109
7110 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
7111 priv->assoc_id,
7112 print_mac(mac, priv->active_rxon.bssid_addr));
7113
7114
7115 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7116 return;
7117
7118 mutex_lock(&priv->mutex);
7119
7120 if (!priv->vif || !priv->is_open) {
7121 mutex_unlock(&priv->mutex);
7122 return;
7123 }
7124 iwl4965_scan_cancel_timeout(priv, 200);
7125
7126 conf = ieee80211_get_hw_conf(priv->hw);
7127
7128 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7129 iwl4965_commit_rxon(priv);
7130
7131 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7132 iwl4965_setup_rxon_timing(priv);
7133 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7134 sizeof(priv->rxon_timing), &priv->rxon_timing);
7135 if (rc)
7136 IWL_WARNING("REPLY_RXON_TIMING failed - "
7137 "Attempting to continue.\n");
7138
7139 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7140
7141 #ifdef CONFIG_IWL4965_HT
7142 if (priv->current_ht_config.is_ht)
7143 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
7144 #endif /* CONFIG_IWL4965_HT*/
7145 iwl4965_set_rxon_chain(priv);
7146 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7147
7148 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
7149 priv->assoc_id, priv->beacon_int);
7150
7151 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7152 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7153 else
7154 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7155
7156 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7157 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
7158 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
7159 else
7160 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7161
7162 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7163 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7164
7165 }
7166
7167 iwl4965_commit_rxon(priv);
7168
7169 switch (priv->iw_mode) {
7170 case IEEE80211_IF_TYPE_STA:
7171 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
7172 break;
7173
7174 case IEEE80211_IF_TYPE_IBSS:
7175
7176 /* clear out the station table */
7177 iwl4965_clear_stations_table(priv);
7178
7179 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7180 iwl4965_rxon_add_station(priv, priv->bssid, 0);
7181 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
7182 iwl4965_send_beacon_cmd(priv);
7183
7184 break;
7185
7186 default:
7187 IWL_ERROR("%s Should not be called in %d mode\n",
7188 __FUNCTION__, priv->iw_mode);
7189 break;
7190 }
7191
7192 iwl4965_sequence_reset(priv);
7193
7194 #ifdef CONFIG_IWL4965_SENSITIVITY
7195 /* Enable Rx differential gain and sensitivity calibrations */
7196 iwl4965_chain_noise_reset(priv);
7197 priv->start_calib = 1;
7198 #endif /* CONFIG_IWL4965_SENSITIVITY */
7199
7200 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7201 priv->assoc_station_added = 1;
7202
7203 #ifdef CONFIG_IWL4965_QOS
7204 iwl4965_activate_qos(priv, 0);
7205 #endif /* CONFIG_IWL4965_QOS */
7206 /* we have just associated, don't start scan too early */
7207 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
7208 mutex_unlock(&priv->mutex);
7209 }
7210
7211 static void iwl4965_bg_abort_scan(struct work_struct *work)
7212 {
7213 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
7214
7215 if (!iwl4965_is_ready(priv))
7216 return;
7217
7218 mutex_lock(&priv->mutex);
7219
7220 set_bit(STATUS_SCAN_ABORTING, &priv->status);
7221 iwl4965_send_scan_abort(priv);
7222
7223 mutex_unlock(&priv->mutex);
7224 }
7225
7226 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
7227
7228 static void iwl4965_bg_scan_completed(struct work_struct *work)
7229 {
7230 struct iwl4965_priv *priv =
7231 container_of(work, struct iwl4965_priv, scan_completed);
7232
7233 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
7234
7235 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7236 return;
7237
7238 if (test_bit(STATUS_CONF_PENDING, &priv->status))
7239 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
7240
7241 ieee80211_scan_completed(priv->hw);
7242
7243 /* Since setting the TXPOWER may have been deferred while
7244 * performing the scan, fire one off */
7245 mutex_lock(&priv->mutex);
7246 iwl4965_hw_reg_send_txpower(priv);
7247 mutex_unlock(&priv->mutex);
7248 }
7249
7250 /*****************************************************************************
7251 *
7252 * mac80211 entry point functions
7253 *
7254 *****************************************************************************/
7255
7256 #define UCODE_READY_TIMEOUT (2 * HZ)
7257
7258 static int iwl4965_mac_start(struct ieee80211_hw *hw)
7259 {
7260 struct iwl4965_priv *priv = hw->priv;
7261 int ret;
7262
7263 IWL_DEBUG_MAC80211("enter\n");
7264
7265 if (pci_enable_device(priv->pci_dev)) {
7266 IWL_ERROR("Fail to pci_enable_device\n");
7267 return -ENODEV;
7268 }
7269 pci_restore_state(priv->pci_dev);
7270 pci_enable_msi(priv->pci_dev);
7271
7272 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
7273 DRV_NAME, priv);
7274 if (ret) {
7275 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
7276 goto out_disable_msi;
7277 }
7278
7279 /* we should be verifying the device is ready to be opened */
7280 mutex_lock(&priv->mutex);
7281
7282 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
7283 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
7284 * ucode filename and max sizes are card-specific. */
7285
7286 if (!priv->ucode_code.len) {
7287 ret = iwl4965_read_ucode(priv);
7288 if (ret) {
7289 IWL_ERROR("Could not read microcode: %d\n", ret);
7290 mutex_unlock(&priv->mutex);
7291 goto out_release_irq;
7292 }
7293 }
7294
7295 ret = __iwl4965_up(priv);
7296
7297 mutex_unlock(&priv->mutex);
7298
7299 if (ret)
7300 goto out_release_irq;
7301
7302 IWL_DEBUG_INFO("Start UP work done.\n");
7303
7304 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
7305 return 0;
7306
7307 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
7308 * mac80211 will not be run successfully. */
7309 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
7310 test_bit(STATUS_READY, &priv->status),
7311 UCODE_READY_TIMEOUT);
7312 if (!ret) {
7313 if (!test_bit(STATUS_READY, &priv->status)) {
7314 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
7315 jiffies_to_msecs(UCODE_READY_TIMEOUT));
7316 ret = -ETIMEDOUT;
7317 goto out_release_irq;
7318 }
7319 }
7320
7321 priv->is_open = 1;
7322 IWL_DEBUG_MAC80211("leave\n");
7323 return 0;
7324
7325 out_release_irq:
7326 free_irq(priv->pci_dev->irq, priv);
7327 out_disable_msi:
7328 pci_disable_msi(priv->pci_dev);
7329 pci_disable_device(priv->pci_dev);
7330 priv->is_open = 0;
7331 IWL_DEBUG_MAC80211("leave - failed\n");
7332 return ret;
7333 }
7334
7335 static void iwl4965_mac_stop(struct ieee80211_hw *hw)
7336 {
7337 struct iwl4965_priv *priv = hw->priv;
7338
7339 IWL_DEBUG_MAC80211("enter\n");
7340
7341 if (!priv->is_open) {
7342 IWL_DEBUG_MAC80211("leave - skip\n");
7343 return;
7344 }
7345
7346 priv->is_open = 0;
7347
7348 if (iwl4965_is_ready_rf(priv)) {
7349 /* stop mac, cancel any scan request and clear
7350 * RXON_FILTER_ASSOC_MSK BIT
7351 */
7352 mutex_lock(&priv->mutex);
7353 iwl4965_scan_cancel_timeout(priv, 100);
7354 cancel_delayed_work(&priv->post_associate);
7355 mutex_unlock(&priv->mutex);
7356 }
7357
7358 iwl4965_down(priv);
7359
7360 flush_workqueue(priv->workqueue);
7361 free_irq(priv->pci_dev->irq, priv);
7362 pci_disable_msi(priv->pci_dev);
7363 pci_save_state(priv->pci_dev);
7364 pci_disable_device(priv->pci_dev);
7365
7366 IWL_DEBUG_MAC80211("leave\n");
7367 }
7368
7369 static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
7370 struct ieee80211_tx_control *ctl)
7371 {
7372 struct iwl4965_priv *priv = hw->priv;
7373
7374 IWL_DEBUG_MAC80211("enter\n");
7375
7376 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7377 IWL_DEBUG_MAC80211("leave - monitor\n");
7378 return -1;
7379 }
7380
7381 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7382 ctl->tx_rate->bitrate);
7383
7384 if (iwl4965_tx_skb(priv, skb, ctl))
7385 dev_kfree_skb_any(skb);
7386
7387 IWL_DEBUG_MAC80211("leave\n");
7388 return 0;
7389 }
7390
7391 static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
7392 struct ieee80211_if_init_conf *conf)
7393 {
7394 struct iwl4965_priv *priv = hw->priv;
7395 unsigned long flags;
7396 DECLARE_MAC_BUF(mac);
7397
7398 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
7399
7400 if (priv->vif) {
7401 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
7402 return -EOPNOTSUPP;
7403 }
7404
7405 spin_lock_irqsave(&priv->lock, flags);
7406 priv->vif = conf->vif;
7407
7408 spin_unlock_irqrestore(&priv->lock, flags);
7409
7410 mutex_lock(&priv->mutex);
7411
7412 if (conf->mac_addr) {
7413 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7414 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7415 }
7416
7417 if (iwl4965_is_ready(priv))
7418 iwl4965_set_mode(priv, conf->type);
7419
7420 mutex_unlock(&priv->mutex);
7421
7422 IWL_DEBUG_MAC80211("leave\n");
7423 return 0;
7424 }
7425
7426 /**
7427 * iwl4965_mac_config - mac80211 config callback
7428 *
7429 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7430 * be set inappropriately and the driver currently sets the hardware up to
7431 * use it whenever needed.
7432 */
7433 static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7434 {
7435 struct iwl4965_priv *priv = hw->priv;
7436 const struct iwl4965_channel_info *ch_info;
7437 unsigned long flags;
7438 int ret = 0;
7439
7440 mutex_lock(&priv->mutex);
7441 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
7442
7443 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7444
7445 if (!iwl4965_is_ready(priv)) {
7446 IWL_DEBUG_MAC80211("leave - not ready\n");
7447 ret = -EIO;
7448 goto out;
7449 }
7450
7451 if (unlikely(!iwl4965_param_disable_hw_scan &&
7452 test_bit(STATUS_SCANNING, &priv->status))) {
7453 IWL_DEBUG_MAC80211("leave - scanning\n");
7454 set_bit(STATUS_CONF_PENDING, &priv->status);
7455 mutex_unlock(&priv->mutex);
7456 return 0;
7457 }
7458
7459 spin_lock_irqsave(&priv->lock, flags);
7460
7461 ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
7462 ieee80211_frequency_to_channel(conf->channel->center_freq));
7463 if (!is_channel_valid(ch_info)) {
7464 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7465 spin_unlock_irqrestore(&priv->lock, flags);
7466 ret = -EINVAL;
7467 goto out;
7468 }
7469
7470 #ifdef CONFIG_IWL4965_HT
7471 /* if we are switching from ht to 2.4 clear flags
7472 * from any ht related info since 2.4 does not
7473 * support ht */
7474 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
7475 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7476 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7477 #endif
7478 )
7479 priv->staging_rxon.flags = 0;
7480 #endif /* CONFIG_IWL4965_HT */
7481
7482 iwl4965_set_rxon_channel(priv, conf->channel->band,
7483 ieee80211_frequency_to_channel(conf->channel->center_freq));
7484
7485 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
7486
7487 /* The list of supported rates and rate mask can be different
7488 * for each band; since the band may have changed, reset
7489 * the rate mask to what mac80211 lists */
7490 iwl4965_set_rate(priv);
7491
7492 spin_unlock_irqrestore(&priv->lock, flags);
7493
7494 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7495 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7496 iwl4965_hw_channel_switch(priv, conf->channel);
7497 goto out;
7498 }
7499 #endif
7500
7501 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
7502
7503 if (!conf->radio_enabled) {
7504 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7505 goto out;
7506 }
7507
7508 if (iwl4965_is_rfkill(priv)) {
7509 IWL_DEBUG_MAC80211("leave - RF kill\n");
7510 ret = -EIO;
7511 goto out;
7512 }
7513
7514 iwl4965_set_rate(priv);
7515
7516 if (memcmp(&priv->active_rxon,
7517 &priv->staging_rxon, sizeof(priv->staging_rxon)))
7518 iwl4965_commit_rxon(priv);
7519 else
7520 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7521
7522 IWL_DEBUG_MAC80211("leave\n");
7523
7524 out:
7525 clear_bit(STATUS_CONF_PENDING, &priv->status);
7526 mutex_unlock(&priv->mutex);
7527 return ret;
7528 }
7529
7530 static void iwl4965_config_ap(struct iwl4965_priv *priv)
7531 {
7532 int rc = 0;
7533
7534 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7535 return;
7536
7537 /* The following should be done only at AP bring up */
7538 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7539
7540 /* RXON - unassoc (to set timing command) */
7541 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7542 iwl4965_commit_rxon(priv);
7543
7544 /* RXON Timing */
7545 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7546 iwl4965_setup_rxon_timing(priv);
7547 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7548 sizeof(priv->rxon_timing), &priv->rxon_timing);
7549 if (rc)
7550 IWL_WARNING("REPLY_RXON_TIMING failed - "
7551 "Attempting to continue.\n");
7552
7553 iwl4965_set_rxon_chain(priv);
7554
7555 /* FIXME: what should be the assoc_id for AP? */
7556 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7557 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7558 priv->staging_rxon.flags |=
7559 RXON_FLG_SHORT_PREAMBLE_MSK;
7560 else
7561 priv->staging_rxon.flags &=
7562 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7563
7564 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7565 if (priv->assoc_capability &
7566 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7567 priv->staging_rxon.flags |=
7568 RXON_FLG_SHORT_SLOT_MSK;
7569 else
7570 priv->staging_rxon.flags &=
7571 ~RXON_FLG_SHORT_SLOT_MSK;
7572
7573 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7574 priv->staging_rxon.flags &=
7575 ~RXON_FLG_SHORT_SLOT_MSK;
7576 }
7577 /* restore RXON assoc */
7578 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7579 iwl4965_commit_rxon(priv);
7580 #ifdef CONFIG_IWL4965_QOS
7581 iwl4965_activate_qos(priv, 1);
7582 #endif
7583 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7584 }
7585 iwl4965_send_beacon_cmd(priv);
7586
7587 /* FIXME - we need to add code here to detect a totally new
7588 * configuration, reset the AP, unassoc, rxon timing, assoc,
7589 * clear sta table, add BCAST sta... */
7590 }
7591
7592 static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
7593 struct ieee80211_vif *vif,
7594 struct ieee80211_if_conf *conf)
7595 {
7596 struct iwl4965_priv *priv = hw->priv;
7597 DECLARE_MAC_BUF(mac);
7598 unsigned long flags;
7599 int rc;
7600
7601 if (conf == NULL)
7602 return -EIO;
7603
7604 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7605 (!conf->beacon || !conf->ssid_len)) {
7606 IWL_DEBUG_MAC80211
7607 ("Leaving in AP mode because HostAPD is not ready.\n");
7608 return 0;
7609 }
7610
7611 if (!iwl4965_is_alive(priv))
7612 return -EAGAIN;
7613
7614 mutex_lock(&priv->mutex);
7615
7616 if (conf->bssid)
7617 IWL_DEBUG_MAC80211("bssid: %s\n",
7618 print_mac(mac, conf->bssid));
7619
7620 /*
7621 * very dubious code was here; the probe filtering flag is never set:
7622 *
7623 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7624 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7625 */
7626 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
7627 IWL_DEBUG_MAC80211("leave - scanning\n");
7628 mutex_unlock(&priv->mutex);
7629 return 0;
7630 }
7631
7632 if (priv->vif != vif) {
7633 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7634 mutex_unlock(&priv->mutex);
7635 return 0;
7636 }
7637
7638 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7639 if (!conf->bssid) {
7640 conf->bssid = priv->mac_addr;
7641 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7642 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7643 print_mac(mac, conf->bssid));
7644 }
7645 if (priv->ibss_beacon)
7646 dev_kfree_skb(priv->ibss_beacon);
7647
7648 priv->ibss_beacon = conf->beacon;
7649 }
7650
7651 if (iwl4965_is_rfkill(priv))
7652 goto done;
7653
7654 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7655 !is_multicast_ether_addr(conf->bssid)) {
7656 /* If there is currently a HW scan going on in the background
7657 * then we need to cancel it else the RXON below will fail. */
7658 if (iwl4965_scan_cancel_timeout(priv, 100)) {
7659 IWL_WARNING("Aborted scan still in progress "
7660 "after 100ms\n");
7661 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7662 mutex_unlock(&priv->mutex);
7663 return -EAGAIN;
7664 }
7665 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7666
7667 /* TODO: Audit driver for usage of these members and see
7668 * if mac80211 deprecates them (priv->bssid looks like it
7669 * shouldn't be there, but I haven't scanned the IBSS code
7670 * to verify) - jpk */
7671 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7672
7673 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7674 iwl4965_config_ap(priv);
7675 else {
7676 rc = iwl4965_commit_rxon(priv);
7677 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7678 iwl4965_rxon_add_station(
7679 priv, priv->active_rxon.bssid_addr, 1);
7680 }
7681
7682 } else {
7683 iwl4965_scan_cancel_timeout(priv, 100);
7684 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7685 iwl4965_commit_rxon(priv);
7686 }
7687
7688 done:
7689 spin_lock_irqsave(&priv->lock, flags);
7690 if (!conf->ssid_len)
7691 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7692 else
7693 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7694
7695 priv->essid_len = conf->ssid_len;
7696 spin_unlock_irqrestore(&priv->lock, flags);
7697
7698 IWL_DEBUG_MAC80211("leave\n");
7699 mutex_unlock(&priv->mutex);
7700
7701 return 0;
7702 }
7703
7704 static void iwl4965_configure_filter(struct ieee80211_hw *hw,
7705 unsigned int changed_flags,
7706 unsigned int *total_flags,
7707 int mc_count, struct dev_addr_list *mc_list)
7708 {
7709 /*
7710 * XXX: dummy
7711 * see also iwl4965_connection_init_rx_config
7712 */
7713 *total_flags = 0;
7714 }
7715
7716 static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
7717 struct ieee80211_if_init_conf *conf)
7718 {
7719 struct iwl4965_priv *priv = hw->priv;
7720
7721 IWL_DEBUG_MAC80211("enter\n");
7722
7723 mutex_lock(&priv->mutex);
7724
7725 if (iwl4965_is_ready_rf(priv)) {
7726 iwl4965_scan_cancel_timeout(priv, 100);
7727 cancel_delayed_work(&priv->post_associate);
7728 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7729 iwl4965_commit_rxon(priv);
7730 }
7731 if (priv->vif == conf->vif) {
7732 priv->vif = NULL;
7733 memset(priv->bssid, 0, ETH_ALEN);
7734 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7735 priv->essid_len = 0;
7736 }
7737 mutex_unlock(&priv->mutex);
7738
7739 IWL_DEBUG_MAC80211("leave\n");
7740
7741 }
7742
7743 static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
7744 struct ieee80211_vif *vif,
7745 struct ieee80211_bss_conf *bss_conf,
7746 u32 changes)
7747 {
7748 struct iwl4965_priv *priv = hw->priv;
7749
7750 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
7751 if (bss_conf->use_short_preamble)
7752 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7753 else
7754 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7755 }
7756
7757 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
7758 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
7759 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7760 else
7761 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7762 }
7763
7764 if (changes & BSS_CHANGED_ASSOC) {
7765 /*
7766 * TODO:
7767 * do stuff instead of sniffing assoc resp
7768 */
7769 }
7770
7771 if (iwl4965_is_associated(priv))
7772 iwl4965_send_rxon_assoc(priv);
7773 }
7774
7775 static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7776 {
7777 int rc = 0;
7778 unsigned long flags;
7779 struct iwl4965_priv *priv = hw->priv;
7780
7781 IWL_DEBUG_MAC80211("enter\n");
7782
7783 mutex_lock(&priv->mutex);
7784 spin_lock_irqsave(&priv->lock, flags);
7785
7786 if (!iwl4965_is_ready_rf(priv)) {
7787 rc = -EIO;
7788 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7789 goto out_unlock;
7790 }
7791
7792 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7793 rc = -EIO;
7794 IWL_ERROR("ERROR: APs don't scan\n");
7795 goto out_unlock;
7796 }
7797
7798 /* we don't schedule scan within next_scan_jiffies period */
7799 if (priv->next_scan_jiffies &&
7800 time_after(priv->next_scan_jiffies, jiffies)) {
7801 rc = -EAGAIN;
7802 goto out_unlock;
7803 }
7804 /* if we just finished scan ask for delay */
7805 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7806 IWL_DELAY_NEXT_SCAN, jiffies)) {
7807 rc = -EAGAIN;
7808 goto out_unlock;
7809 }
7810 if (len) {
7811 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7812 iwl4965_escape_essid(ssid, len), (int)len);
7813
7814 priv->one_direct_scan = 1;
7815 priv->direct_ssid_len = (u8)
7816 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7817 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7818 } else
7819 priv->one_direct_scan = 0;
7820
7821 rc = iwl4965_scan_initiate(priv);
7822
7823 IWL_DEBUG_MAC80211("leave\n");
7824
7825 out_unlock:
7826 spin_unlock_irqrestore(&priv->lock, flags);
7827 mutex_unlock(&priv->mutex);
7828
7829 return rc;
7830 }
7831
7832 static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7833 const u8 *local_addr, const u8 *addr,
7834 struct ieee80211_key_conf *key)
7835 {
7836 struct iwl4965_priv *priv = hw->priv;
7837 DECLARE_MAC_BUF(mac);
7838 int rc = 0;
7839 u8 sta_id;
7840
7841 IWL_DEBUG_MAC80211("enter\n");
7842
7843 if (!iwl4965_param_hwcrypto) {
7844 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7845 return -EOPNOTSUPP;
7846 }
7847
7848 if (is_zero_ether_addr(addr))
7849 /* only support pairwise keys */
7850 return -EOPNOTSUPP;
7851
7852 sta_id = iwl4965_hw_find_station(priv, addr);
7853 if (sta_id == IWL_INVALID_STATION) {
7854 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7855 print_mac(mac, addr));
7856 return -EINVAL;
7857 }
7858
7859 mutex_lock(&priv->mutex);
7860
7861 iwl4965_scan_cancel_timeout(priv, 100);
7862
7863 switch (cmd) {
7864 case SET_KEY:
7865 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
7866 if (!rc) {
7867 iwl4965_set_rxon_hwcrypto(priv, 1);
7868 iwl4965_commit_rxon(priv);
7869 key->hw_key_idx = sta_id;
7870 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7871 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7872 }
7873 break;
7874 case DISABLE_KEY:
7875 rc = iwl4965_clear_sta_key_info(priv, sta_id);
7876 if (!rc) {
7877 iwl4965_set_rxon_hwcrypto(priv, 0);
7878 iwl4965_commit_rxon(priv);
7879 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7880 }
7881 break;
7882 default:
7883 rc = -EINVAL;
7884 }
7885
7886 IWL_DEBUG_MAC80211("leave\n");
7887 mutex_unlock(&priv->mutex);
7888
7889 return rc;
7890 }
7891
7892 static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7893 const struct ieee80211_tx_queue_params *params)
7894 {
7895 struct iwl4965_priv *priv = hw->priv;
7896 #ifdef CONFIG_IWL4965_QOS
7897 unsigned long flags;
7898 int q;
7899 #endif /* CONFIG_IWL4965_QOS */
7900
7901 IWL_DEBUG_MAC80211("enter\n");
7902
7903 if (!iwl4965_is_ready_rf(priv)) {
7904 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7905 return -EIO;
7906 }
7907
7908 if (queue >= AC_NUM) {
7909 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7910 return 0;
7911 }
7912
7913 #ifdef CONFIG_IWL4965_QOS
7914 if (!priv->qos_data.qos_enable) {
7915 priv->qos_data.qos_active = 0;
7916 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7917 return 0;
7918 }
7919 q = AC_NUM - 1 - queue;
7920
7921 spin_lock_irqsave(&priv->lock, flags);
7922
7923 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7924 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7925 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7926 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7927 cpu_to_le16((params->burst_time * 100));
7928
7929 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7930 priv->qos_data.qos_active = 1;
7931
7932 spin_unlock_irqrestore(&priv->lock, flags);
7933
7934 mutex_lock(&priv->mutex);
7935 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7936 iwl4965_activate_qos(priv, 1);
7937 else if (priv->assoc_id && iwl4965_is_associated(priv))
7938 iwl4965_activate_qos(priv, 0);
7939
7940 mutex_unlock(&priv->mutex);
7941
7942 #endif /*CONFIG_IWL4965_QOS */
7943
7944 IWL_DEBUG_MAC80211("leave\n");
7945 return 0;
7946 }
7947
7948 static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
7949 struct ieee80211_tx_queue_stats *stats)
7950 {
7951 struct iwl4965_priv *priv = hw->priv;
7952 int i, avail;
7953 struct iwl4965_tx_queue *txq;
7954 struct iwl4965_queue *q;
7955 unsigned long flags;
7956
7957 IWL_DEBUG_MAC80211("enter\n");
7958
7959 if (!iwl4965_is_ready_rf(priv)) {
7960 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7961 return -EIO;
7962 }
7963
7964 spin_lock_irqsave(&priv->lock, flags);
7965
7966 for (i = 0; i < AC_NUM; i++) {
7967 txq = &priv->txq[i];
7968 q = &txq->q;
7969 avail = iwl4965_queue_space(q);
7970
7971 stats->data[i].len = q->n_window - avail;
7972 stats->data[i].limit = q->n_window - q->high_mark;
7973 stats->data[i].count = q->n_window;
7974
7975 }
7976 spin_unlock_irqrestore(&priv->lock, flags);
7977
7978 IWL_DEBUG_MAC80211("leave\n");
7979
7980 return 0;
7981 }
7982
7983 static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
7984 struct ieee80211_low_level_stats *stats)
7985 {
7986 IWL_DEBUG_MAC80211("enter\n");
7987 IWL_DEBUG_MAC80211("leave\n");
7988
7989 return 0;
7990 }
7991
7992 static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
7993 {
7994 IWL_DEBUG_MAC80211("enter\n");
7995 IWL_DEBUG_MAC80211("leave\n");
7996
7997 return 0;
7998 }
7999
8000 static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
8001 {
8002 struct iwl4965_priv *priv = hw->priv;
8003 unsigned long flags;
8004
8005 mutex_lock(&priv->mutex);
8006 IWL_DEBUG_MAC80211("enter\n");
8007
8008 priv->lq_mngr.lq_ready = 0;
8009 #ifdef CONFIG_IWL4965_HT
8010 spin_lock_irqsave(&priv->lock, flags);
8011 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
8012 spin_unlock_irqrestore(&priv->lock, flags);
8013 #endif /* CONFIG_IWL4965_HT */
8014
8015 #ifdef CONFIG_IWL4965_QOS
8016 iwl4965_reset_qos(priv);
8017 #endif
8018
8019 cancel_delayed_work(&priv->post_associate);
8020
8021 spin_lock_irqsave(&priv->lock, flags);
8022 priv->assoc_id = 0;
8023 priv->assoc_capability = 0;
8024 priv->call_post_assoc_from_beacon = 0;
8025 priv->assoc_station_added = 0;
8026
8027 /* new association get rid of ibss beacon skb */
8028 if (priv->ibss_beacon)
8029 dev_kfree_skb(priv->ibss_beacon);
8030
8031 priv->ibss_beacon = NULL;
8032
8033 priv->beacon_int = priv->hw->conf.beacon_int;
8034 priv->timestamp1 = 0;
8035 priv->timestamp0 = 0;
8036 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
8037 priv->beacon_int = 0;
8038
8039 spin_unlock_irqrestore(&priv->lock, flags);
8040
8041 if (!iwl4965_is_ready_rf(priv)) {
8042 IWL_DEBUG_MAC80211("leave - not ready\n");
8043 mutex_unlock(&priv->mutex);
8044 return;
8045 }
8046
8047 /* we are restarting association process
8048 * clear RXON_FILTER_ASSOC_MSK bit
8049 */
8050 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
8051 iwl4965_scan_cancel_timeout(priv, 100);
8052 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
8053 iwl4965_commit_rxon(priv);
8054 }
8055
8056 /* Per mac80211.h: This is only used in IBSS mode... */
8057 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8058
8059 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
8060 mutex_unlock(&priv->mutex);
8061 return;
8062 }
8063
8064 priv->only_active_channel = 0;
8065
8066 iwl4965_set_rate(priv);
8067
8068 mutex_unlock(&priv->mutex);
8069
8070 IWL_DEBUG_MAC80211("leave\n");
8071 }
8072
8073 static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
8074 struct ieee80211_tx_control *control)
8075 {
8076 struct iwl4965_priv *priv = hw->priv;
8077 unsigned long flags;
8078
8079 mutex_lock(&priv->mutex);
8080 IWL_DEBUG_MAC80211("enter\n");
8081
8082 if (!iwl4965_is_ready_rf(priv)) {
8083 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8084 mutex_unlock(&priv->mutex);
8085 return -EIO;
8086 }
8087
8088 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8089 IWL_DEBUG_MAC80211("leave - not IBSS\n");
8090 mutex_unlock(&priv->mutex);
8091 return -EIO;
8092 }
8093
8094 spin_lock_irqsave(&priv->lock, flags);
8095
8096 if (priv->ibss_beacon)
8097 dev_kfree_skb(priv->ibss_beacon);
8098
8099 priv->ibss_beacon = skb;
8100
8101 priv->assoc_id = 0;
8102
8103 IWL_DEBUG_MAC80211("leave\n");
8104 spin_unlock_irqrestore(&priv->lock, flags);
8105
8106 #ifdef CONFIG_IWL4965_QOS
8107 iwl4965_reset_qos(priv);
8108 #endif
8109
8110 queue_work(priv->workqueue, &priv->post_associate.work);
8111
8112 mutex_unlock(&priv->mutex);
8113
8114 return 0;
8115 }
8116
8117 #ifdef CONFIG_IWL4965_HT
8118
8119 static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
8120 struct iwl4965_priv *priv)
8121 {
8122 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
8123 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
8124 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
8125
8126 IWL_DEBUG_MAC80211("enter: \n");
8127
8128 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
8129 iwl_conf->is_ht = 0;
8130 return;
8131 }
8132
8133 iwl_conf->is_ht = 1;
8134 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8135
8136 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
8137 iwl_conf->sgf |= 0x1;
8138 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
8139 iwl_conf->sgf |= 0x2;
8140
8141 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
8142 iwl_conf->max_amsdu_size =
8143 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
8144 iwl_conf->supported_chan_width =
8145 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
8146 iwl_conf->tx_mimo_ps_mode =
8147 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
8148 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
8149
8150 iwl_conf->control_channel = ht_bss_conf->primary_channel;
8151 iwl_conf->extension_chan_offset =
8152 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
8153 iwl_conf->tx_chan_width =
8154 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
8155 iwl_conf->ht_protection =
8156 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
8157 iwl_conf->non_GF_STA_present =
8158 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
8159
8160 IWL_DEBUG_MAC80211("control channel %d\n",
8161 iwl_conf->control_channel);
8162 IWL_DEBUG_MAC80211("leave\n");
8163 }
8164
8165 static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
8166 struct ieee80211_conf *conf)
8167 {
8168 struct iwl4965_priv *priv = hw->priv;
8169
8170 IWL_DEBUG_MAC80211("enter: \n");
8171
8172 iwl4965_ht_info_fill(conf, priv);
8173 iwl4965_set_rxon_chain(priv);
8174
8175 if (priv && priv->assoc_id &&
8176 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
8177 unsigned long flags;
8178
8179 spin_lock_irqsave(&priv->lock, flags);
8180 if (priv->beacon_int)
8181 queue_work(priv->workqueue, &priv->post_associate.work);
8182 else
8183 priv->call_post_assoc_from_beacon = 1;
8184 spin_unlock_irqrestore(&priv->lock, flags);
8185 }
8186
8187 IWL_DEBUG_MAC80211("leave:\n");
8188 return 0;
8189 }
8190
8191 #endif /*CONFIG_IWL4965_HT*/
8192
8193 /*****************************************************************************
8194 *
8195 * sysfs attributes
8196 *
8197 *****************************************************************************/
8198
8199 #ifdef CONFIG_IWL4965_DEBUG
8200
8201 /*
8202 * The following adds a new attribute to the sysfs representation
8203 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
8204 * used for controlling the debug level.
8205 *
8206 * See the level definitions in iwl for details.
8207 */
8208
8209 static ssize_t show_debug_level(struct device_driver *d, char *buf)
8210 {
8211 return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
8212 }
8213 static ssize_t store_debug_level(struct device_driver *d,
8214 const char *buf, size_t count)
8215 {
8216 char *p = (char *)buf;
8217 u32 val;
8218
8219 val = simple_strtoul(p, &p, 0);
8220 if (p == buf)
8221 printk(KERN_INFO DRV_NAME
8222 ": %s is not in hex or decimal form.\n", buf);
8223 else
8224 iwl4965_debug_level = val;
8225
8226 return strnlen(buf, count);
8227 }
8228
8229 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
8230 show_debug_level, store_debug_level);
8231
8232 #endif /* CONFIG_IWL4965_DEBUG */
8233
8234 static ssize_t show_rf_kill(struct device *d,
8235 struct device_attribute *attr, char *buf)
8236 {
8237 /*
8238 * 0 - RF kill not enabled
8239 * 1 - SW based RF kill active (sysfs)
8240 * 2 - HW based RF kill active
8241 * 3 - Both HW and SW based RF kill active
8242 */
8243 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8244 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
8245 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
8246
8247 return sprintf(buf, "%i\n", val);
8248 }
8249
8250 static ssize_t store_rf_kill(struct device *d,
8251 struct device_attribute *attr,
8252 const char *buf, size_t count)
8253 {
8254 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8255
8256 mutex_lock(&priv->mutex);
8257 iwl4965_radio_kill_sw(priv, buf[0] == '1');
8258 mutex_unlock(&priv->mutex);
8259
8260 return count;
8261 }
8262
8263 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
8264
8265 static ssize_t show_temperature(struct device *d,
8266 struct device_attribute *attr, char *buf)
8267 {
8268 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8269
8270 if (!iwl4965_is_alive(priv))
8271 return -EAGAIN;
8272
8273 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
8274 }
8275
8276 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
8277
8278 static ssize_t show_rs_window(struct device *d,
8279 struct device_attribute *attr,
8280 char *buf)
8281 {
8282 struct iwl4965_priv *priv = d->driver_data;
8283 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
8284 }
8285 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8286
8287 static ssize_t show_tx_power(struct device *d,
8288 struct device_attribute *attr, char *buf)
8289 {
8290 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8291 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8292 }
8293
8294 static ssize_t store_tx_power(struct device *d,
8295 struct device_attribute *attr,
8296 const char *buf, size_t count)
8297 {
8298 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8299 char *p = (char *)buf;
8300 u32 val;
8301
8302 val = simple_strtoul(p, &p, 10);
8303 if (p == buf)
8304 printk(KERN_INFO DRV_NAME
8305 ": %s is not in decimal form.\n", buf);
8306 else
8307 iwl4965_hw_reg_set_txpower(priv, val);
8308
8309 return count;
8310 }
8311
8312 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8313
8314 static ssize_t show_flags(struct device *d,
8315 struct device_attribute *attr, char *buf)
8316 {
8317 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8318
8319 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8320 }
8321
8322 static ssize_t store_flags(struct device *d,
8323 struct device_attribute *attr,
8324 const char *buf, size_t count)
8325 {
8326 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8327 u32 flags = simple_strtoul(buf, NULL, 0);
8328
8329 mutex_lock(&priv->mutex);
8330 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8331 /* Cancel any currently running scans... */
8332 if (iwl4965_scan_cancel_timeout(priv, 100))
8333 IWL_WARNING("Could not cancel scan.\n");
8334 else {
8335 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8336 flags);
8337 priv->staging_rxon.flags = cpu_to_le32(flags);
8338 iwl4965_commit_rxon(priv);
8339 }
8340 }
8341 mutex_unlock(&priv->mutex);
8342
8343 return count;
8344 }
8345
8346 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8347
8348 static ssize_t show_filter_flags(struct device *d,
8349 struct device_attribute *attr, char *buf)
8350 {
8351 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8352
8353 return sprintf(buf, "0x%04X\n",
8354 le32_to_cpu(priv->active_rxon.filter_flags));
8355 }
8356
8357 static ssize_t store_filter_flags(struct device *d,
8358 struct device_attribute *attr,
8359 const char *buf, size_t count)
8360 {
8361 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8362 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8363
8364 mutex_lock(&priv->mutex);
8365 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8366 /* Cancel any currently running scans... */
8367 if (iwl4965_scan_cancel_timeout(priv, 100))
8368 IWL_WARNING("Could not cancel scan.\n");
8369 else {
8370 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8371 "0x%04X\n", filter_flags);
8372 priv->staging_rxon.filter_flags =
8373 cpu_to_le32(filter_flags);
8374 iwl4965_commit_rxon(priv);
8375 }
8376 }
8377 mutex_unlock(&priv->mutex);
8378
8379 return count;
8380 }
8381
8382 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8383 store_filter_flags);
8384
8385 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
8386
8387 static ssize_t show_measurement(struct device *d,
8388 struct device_attribute *attr, char *buf)
8389 {
8390 struct iwl4965_priv *priv = dev_get_drvdata(d);
8391 struct iwl4965_spectrum_notification measure_report;
8392 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8393 u8 *data = (u8 *) & measure_report;
8394 unsigned long flags;
8395
8396 spin_lock_irqsave(&priv->lock, flags);
8397 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8398 spin_unlock_irqrestore(&priv->lock, flags);
8399 return 0;
8400 }
8401 memcpy(&measure_report, &priv->measure_report, size);
8402 priv->measurement_status = 0;
8403 spin_unlock_irqrestore(&priv->lock, flags);
8404
8405 while (size && (PAGE_SIZE - len)) {
8406 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8407 PAGE_SIZE - len, 1);
8408 len = strlen(buf);
8409 if (PAGE_SIZE - len)
8410 buf[len++] = '\n';
8411
8412 ofs += 16;
8413 size -= min(size, 16U);
8414 }
8415
8416 return len;
8417 }
8418
8419 static ssize_t store_measurement(struct device *d,
8420 struct device_attribute *attr,
8421 const char *buf, size_t count)
8422 {
8423 struct iwl4965_priv *priv = dev_get_drvdata(d);
8424 struct ieee80211_measurement_params params = {
8425 .channel = le16_to_cpu(priv->active_rxon.channel),
8426 .start_time = cpu_to_le64(priv->last_tsf),
8427 .duration = cpu_to_le16(1),
8428 };
8429 u8 type = IWL_MEASURE_BASIC;
8430 u8 buffer[32];
8431 u8 channel;
8432
8433 if (count) {
8434 char *p = buffer;
8435 strncpy(buffer, buf, min(sizeof(buffer), count));
8436 channel = simple_strtoul(p, NULL, 0);
8437 if (channel)
8438 params.channel = channel;
8439
8440 p = buffer;
8441 while (*p && *p != ' ')
8442 p++;
8443 if (*p)
8444 type = simple_strtoul(p + 1, NULL, 0);
8445 }
8446
8447 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8448 "channel %d (for '%s')\n", type, params.channel, buf);
8449 iwl4965_get_measurement(priv, &params, type);
8450
8451 return count;
8452 }
8453
8454 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8455 show_measurement, store_measurement);
8456 #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
8457
8458 static ssize_t store_retry_rate(struct device *d,
8459 struct device_attribute *attr,
8460 const char *buf, size_t count)
8461 {
8462 struct iwl4965_priv *priv = dev_get_drvdata(d);
8463
8464 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8465 if (priv->retry_rate <= 0)
8466 priv->retry_rate = 1;
8467
8468 return count;
8469 }
8470
8471 static ssize_t show_retry_rate(struct device *d,
8472 struct device_attribute *attr, char *buf)
8473 {
8474 struct iwl4965_priv *priv = dev_get_drvdata(d);
8475 return sprintf(buf, "%d", priv->retry_rate);
8476 }
8477
8478 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8479 store_retry_rate);
8480
8481 static ssize_t store_power_level(struct device *d,
8482 struct device_attribute *attr,
8483 const char *buf, size_t count)
8484 {
8485 struct iwl4965_priv *priv = dev_get_drvdata(d);
8486 int rc;
8487 int mode;
8488
8489 mode = simple_strtoul(buf, NULL, 0);
8490 mutex_lock(&priv->mutex);
8491
8492 if (!iwl4965_is_ready(priv)) {
8493 rc = -EAGAIN;
8494 goto out;
8495 }
8496
8497 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8498 mode = IWL_POWER_AC;
8499 else
8500 mode |= IWL_POWER_ENABLED;
8501
8502 if (mode != priv->power_mode) {
8503 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
8504 if (rc) {
8505 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8506 goto out;
8507 }
8508 priv->power_mode = mode;
8509 }
8510
8511 rc = count;
8512
8513 out:
8514 mutex_unlock(&priv->mutex);
8515 return rc;
8516 }
8517
8518 #define MAX_WX_STRING 80
8519
8520 /* Values are in microsecond */
8521 static const s32 timeout_duration[] = {
8522 350000,
8523 250000,
8524 75000,
8525 37000,
8526 25000,
8527 };
8528 static const s32 period_duration[] = {
8529 400000,
8530 700000,
8531 1000000,
8532 1000000,
8533 1000000
8534 };
8535
8536 static ssize_t show_power_level(struct device *d,
8537 struct device_attribute *attr, char *buf)
8538 {
8539 struct iwl4965_priv *priv = dev_get_drvdata(d);
8540 int level = IWL_POWER_LEVEL(priv->power_mode);
8541 char *p = buf;
8542
8543 p += sprintf(p, "%d ", level);
8544 switch (level) {
8545 case IWL_POWER_MODE_CAM:
8546 case IWL_POWER_AC:
8547 p += sprintf(p, "(AC)");
8548 break;
8549 case IWL_POWER_BATTERY:
8550 p += sprintf(p, "(BATTERY)");
8551 break;
8552 default:
8553 p += sprintf(p,
8554 "(Timeout %dms, Period %dms)",
8555 timeout_duration[level - 1] / 1000,
8556 period_duration[level - 1] / 1000);
8557 }
8558
8559 if (!(priv->power_mode & IWL_POWER_ENABLED))
8560 p += sprintf(p, " OFF\n");
8561 else
8562 p += sprintf(p, " \n");
8563
8564 return (p - buf + 1);
8565
8566 }
8567
8568 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8569 store_power_level);
8570
8571 static ssize_t show_channels(struct device *d,
8572 struct device_attribute *attr, char *buf)
8573 {
8574 /* all this shit doesn't belong into sysfs anyway */
8575 return 0;
8576 }
8577
8578 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8579
8580 static ssize_t show_statistics(struct device *d,
8581 struct device_attribute *attr, char *buf)
8582 {
8583 struct iwl4965_priv *priv = dev_get_drvdata(d);
8584 u32 size = sizeof(struct iwl4965_notif_statistics);
8585 u32 len = 0, ofs = 0;
8586 u8 *data = (u8 *) & priv->statistics;
8587 int rc = 0;
8588
8589 if (!iwl4965_is_alive(priv))
8590 return -EAGAIN;
8591
8592 mutex_lock(&priv->mutex);
8593 rc = iwl4965_send_statistics_request(priv);
8594 mutex_unlock(&priv->mutex);
8595
8596 if (rc) {
8597 len = sprintf(buf,
8598 "Error sending statistics request: 0x%08X\n", rc);
8599 return len;
8600 }
8601
8602 while (size && (PAGE_SIZE - len)) {
8603 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8604 PAGE_SIZE - len, 1);
8605 len = strlen(buf);
8606 if (PAGE_SIZE - len)
8607 buf[len++] = '\n';
8608
8609 ofs += 16;
8610 size -= min(size, 16U);
8611 }
8612
8613 return len;
8614 }
8615
8616 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8617
8618 static ssize_t show_antenna(struct device *d,
8619 struct device_attribute *attr, char *buf)
8620 {
8621 struct iwl4965_priv *priv = dev_get_drvdata(d);
8622
8623 if (!iwl4965_is_alive(priv))
8624 return -EAGAIN;
8625
8626 return sprintf(buf, "%d\n", priv->antenna);
8627 }
8628
8629 static ssize_t store_antenna(struct device *d,
8630 struct device_attribute *attr,
8631 const char *buf, size_t count)
8632 {
8633 int ant;
8634 struct iwl4965_priv *priv = dev_get_drvdata(d);
8635
8636 if (count == 0)
8637 return 0;
8638
8639 if (sscanf(buf, "%1i", &ant) != 1) {
8640 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8641 return count;
8642 }
8643
8644 if ((ant >= 0) && (ant <= 2)) {
8645 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8646 priv->antenna = (enum iwl4965_antenna)ant;
8647 } else
8648 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8649
8650
8651 return count;
8652 }
8653
8654 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8655
8656 static ssize_t show_status(struct device *d,
8657 struct device_attribute *attr, char *buf)
8658 {
8659 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8660 if (!iwl4965_is_alive(priv))
8661 return -EAGAIN;
8662 return sprintf(buf, "0x%08x\n", (int)priv->status);
8663 }
8664
8665 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8666
8667 static ssize_t dump_error_log(struct device *d,
8668 struct device_attribute *attr,
8669 const char *buf, size_t count)
8670 {
8671 char *p = (char *)buf;
8672
8673 if (p[0] == '1')
8674 iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
8675
8676 return strnlen(buf, count);
8677 }
8678
8679 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8680
8681 static ssize_t dump_event_log(struct device *d,
8682 struct device_attribute *attr,
8683 const char *buf, size_t count)
8684 {
8685 char *p = (char *)buf;
8686
8687 if (p[0] == '1')
8688 iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
8689
8690 return strnlen(buf, count);
8691 }
8692
8693 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8694
8695 /*****************************************************************************
8696 *
8697 * driver setup and teardown
8698 *
8699 *****************************************************************************/
8700
8701 static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
8702 {
8703 priv->workqueue = create_workqueue(DRV_NAME);
8704
8705 init_waitqueue_head(&priv->wait_command_queue);
8706
8707 INIT_WORK(&priv->up, iwl4965_bg_up);
8708 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8709 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8710 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8711 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8712 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8713 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8714 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8715 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8716 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8717 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8718 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
8719
8720 iwl4965_hw_setup_deferred_work(priv);
8721
8722 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8723 iwl4965_irq_tasklet, (unsigned long)priv);
8724 }
8725
8726 static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
8727 {
8728 iwl4965_hw_cancel_deferred_work(priv);
8729
8730 cancel_delayed_work_sync(&priv->init_alive_start);
8731 cancel_delayed_work(&priv->scan_check);
8732 cancel_delayed_work(&priv->alive_start);
8733 cancel_delayed_work(&priv->post_associate);
8734 cancel_work_sync(&priv->beacon_update);
8735 }
8736
8737 static struct attribute *iwl4965_sysfs_entries[] = {
8738 &dev_attr_antenna.attr,
8739 &dev_attr_channels.attr,
8740 &dev_attr_dump_errors.attr,
8741 &dev_attr_dump_events.attr,
8742 &dev_attr_flags.attr,
8743 &dev_attr_filter_flags.attr,
8744 #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
8745 &dev_attr_measurement.attr,
8746 #endif
8747 &dev_attr_power_level.attr,
8748 &dev_attr_retry_rate.attr,
8749 &dev_attr_rf_kill.attr,
8750 &dev_attr_rs_window.attr,
8751 &dev_attr_statistics.attr,
8752 &dev_attr_status.attr,
8753 &dev_attr_temperature.attr,
8754 &dev_attr_tx_power.attr,
8755
8756 NULL
8757 };
8758
8759 static struct attribute_group iwl4965_attribute_group = {
8760 .name = NULL, /* put in device directory */
8761 .attrs = iwl4965_sysfs_entries,
8762 };
8763
8764 static struct ieee80211_ops iwl4965_hw_ops = {
8765 .tx = iwl4965_mac_tx,
8766 .start = iwl4965_mac_start,
8767 .stop = iwl4965_mac_stop,
8768 .add_interface = iwl4965_mac_add_interface,
8769 .remove_interface = iwl4965_mac_remove_interface,
8770 .config = iwl4965_mac_config,
8771 .config_interface = iwl4965_mac_config_interface,
8772 .configure_filter = iwl4965_configure_filter,
8773 .set_key = iwl4965_mac_set_key,
8774 .get_stats = iwl4965_mac_get_stats,
8775 .get_tx_stats = iwl4965_mac_get_tx_stats,
8776 .conf_tx = iwl4965_mac_conf_tx,
8777 .get_tsf = iwl4965_mac_get_tsf,
8778 .reset_tsf = iwl4965_mac_reset_tsf,
8779 .beacon_update = iwl4965_mac_beacon_update,
8780 .bss_info_changed = iwl4965_bss_info_changed,
8781 #ifdef CONFIG_IWL4965_HT
8782 .conf_ht = iwl4965_mac_conf_ht,
8783 .ampdu_action = iwl4965_mac_ampdu_action,
8784 #endif /* CONFIG_IWL4965_HT */
8785 .hw_scan = iwl4965_mac_hw_scan
8786 };
8787
8788 static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8789 {
8790 int err = 0;
8791 struct iwl4965_priv *priv;
8792 struct ieee80211_hw *hw;
8793 int i;
8794 DECLARE_MAC_BUF(mac);
8795
8796 /* Disabling hardware scan means that mac80211 will perform scans
8797 * "the hard way", rather than using device's scan. */
8798 if (iwl4965_param_disable_hw_scan) {
8799 IWL_DEBUG_INFO("Disabling hw_scan\n");
8800 iwl4965_hw_ops.hw_scan = NULL;
8801 }
8802
8803 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8804 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
8805 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8806 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8807 err = -EINVAL;
8808 goto out;
8809 }
8810
8811 /* mac80211 allocates memory for this device instance, including
8812 * space for this driver's private structure */
8813 hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
8814 if (hw == NULL) {
8815 IWL_ERROR("Can not allocate network device\n");
8816 err = -ENOMEM;
8817 goto out;
8818 }
8819 SET_IEEE80211_DEV(hw, &pdev->dev);
8820
8821 hw->rate_control_algorithm = "iwl-4965-rs";
8822
8823 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8824 priv = hw->priv;
8825 priv->hw = hw;
8826
8827 priv->pci_dev = pdev;
8828 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
8829 #ifdef CONFIG_IWL4965_DEBUG
8830 iwl4965_debug_level = iwl4965_param_debug;
8831 atomic_set(&priv->restrict_refcnt, 0);
8832 #endif
8833 priv->retry_rate = 1;
8834
8835 priv->ibss_beacon = NULL;
8836
8837 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8838 * the range of signal quality values that we'll provide.
8839 * Negative values for level/noise indicate that we'll provide dBm.
8840 * For WE, at least, non-0 values here *enable* display of values
8841 * in app (iwconfig). */
8842 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8843 hw->max_noise = -20; /* noise level, negative indicates dBm */
8844 hw->max_signal = 100; /* link quality indication (%) */
8845
8846 /* Tell mac80211 our Tx characteristics */
8847 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8848
8849 /* Default value; 4 EDCA QOS priorities */
8850 hw->queues = 4;
8851 #ifdef CONFIG_IWL4965_HT
8852 /* Enhanced value; more queues, to support 11n aggregation */
8853 hw->queues = 16;
8854 #endif /* CONFIG_IWL4965_HT */
8855
8856 spin_lock_init(&priv->lock);
8857 spin_lock_init(&priv->power_data.lock);
8858 spin_lock_init(&priv->sta_lock);
8859 spin_lock_init(&priv->hcmd_lock);
8860 spin_lock_init(&priv->lq_mngr.lock);
8861
8862 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8863 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8864
8865 INIT_LIST_HEAD(&priv->free_frames);
8866
8867 mutex_init(&priv->mutex);
8868 if (pci_enable_device(pdev)) {
8869 err = -ENODEV;
8870 goto out_ieee80211_free_hw;
8871 }
8872
8873 pci_set_master(pdev);
8874
8875 /* Clear the driver's (not device's) station table */
8876 iwl4965_clear_stations_table(priv);
8877
8878 priv->data_retry_limit = -1;
8879 priv->ieee_channels = NULL;
8880 priv->ieee_rates = NULL;
8881 priv->band = IEEE80211_BAND_2GHZ;
8882
8883 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8884 if (!err)
8885 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8886 if (err) {
8887 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8888 goto out_pci_disable_device;
8889 }
8890
8891 pci_set_drvdata(pdev, priv);
8892 err = pci_request_regions(pdev, DRV_NAME);
8893 if (err)
8894 goto out_pci_disable_device;
8895
8896 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8897 * PCI Tx retries from interfering with C3 CPU state */
8898 pci_write_config_byte(pdev, 0x41, 0x00);
8899
8900 priv->hw_base = pci_iomap(pdev, 0, 0);
8901 if (!priv->hw_base) {
8902 err = -ENODEV;
8903 goto out_pci_release_regions;
8904 }
8905
8906 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8907 (unsigned long long) pci_resource_len(pdev, 0));
8908 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8909
8910 /* Initialize module parameter values here */
8911
8912 /* Disable radio (SW RF KILL) via parameter when loading driver */
8913 if (iwl4965_param_disable) {
8914 set_bit(STATUS_RF_KILL_SW, &priv->status);
8915 IWL_DEBUG_INFO("Radio disabled.\n");
8916 }
8917
8918 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8919
8920 priv->ps_mode = 0;
8921 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
8922 priv->valid_antenna = 0x7; /* assume all 3 connected */
8923 priv->ps_mode = IWL_MIMO_PS_NONE;
8924
8925 /* Choose which receivers/antennas to use */
8926 iwl4965_set_rxon_chain(priv);
8927
8928 printk(KERN_INFO DRV_NAME
8929 ": Detected Intel Wireless WiFi Link 4965AGN\n");
8930
8931 /* Device-specific setup */
8932 if (iwl4965_hw_set_hw_setting(priv)) {
8933 IWL_ERROR("failed to set hw settings\n");
8934 goto out_iounmap;
8935 }
8936
8937 #ifdef CONFIG_IWL4965_QOS
8938 if (iwl4965_param_qos_enable)
8939 priv->qos_data.qos_enable = 1;
8940
8941 iwl4965_reset_qos(priv);
8942
8943 priv->qos_data.qos_active = 0;
8944 priv->qos_data.qos_cap.val = 0;
8945 #endif /* CONFIG_IWL4965_QOS */
8946
8947 iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
8948 iwl4965_setup_deferred_work(priv);
8949 iwl4965_setup_rx_handlers(priv);
8950
8951 priv->rates_mask = IWL_RATES_MASK;
8952 /* If power management is turned on, default to AC mode */
8953 priv->power_mode = IWL_POWER_AC;
8954 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8955
8956 iwl4965_disable_interrupts(priv);
8957
8958 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
8959 if (err) {
8960 IWL_ERROR("failed to create sysfs device attributes\n");
8961 goto out_release_irq;
8962 }
8963
8964 /* nic init */
8965 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8966 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8967
8968 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8969 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
8970 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8971 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8972 if (err < 0) {
8973 IWL_DEBUG_INFO("Failed to init the card\n");
8974 goto out_remove_sysfs;
8975 }
8976 /* Read the EEPROM */
8977 err = iwl4965_eeprom_init(priv);
8978 if (err) {
8979 IWL_ERROR("Unable to init EEPROM\n");
8980 goto out_remove_sysfs;
8981 }
8982 /* MAC Address location in EEPROM same for 3945/4965 */
8983 get_eeprom_mac(priv, priv->mac_addr);
8984 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8985 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8986
8987 err = iwl4965_init_channel_map(priv);
8988 if (err) {
8989 IWL_ERROR("initializing regulatory failed: %d\n", err);
8990 goto out_remove_sysfs;
8991 }
8992
8993 err = iwl4965_init_geos(priv);
8994 if (err) {
8995 IWL_ERROR("initializing geos failed: %d\n", err);
8996 goto out_free_channel_map;
8997 }
8998
8999 iwl4965_rate_control_register(priv->hw);
9000 err = ieee80211_register_hw(priv->hw);
9001 if (err) {
9002 IWL_ERROR("Failed to register network device (error %d)\n", err);
9003 goto out_free_geos;
9004 }
9005
9006 priv->hw->conf.beacon_int = 100;
9007 priv->mac80211_registered = 1;
9008 pci_save_state(pdev);
9009 pci_disable_device(pdev);
9010
9011 return 0;
9012
9013 out_free_geos:
9014 iwl4965_free_geos(priv);
9015 out_free_channel_map:
9016 iwl4965_free_channel_map(priv);
9017 out_remove_sysfs:
9018 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9019
9020 out_release_irq:
9021 destroy_workqueue(priv->workqueue);
9022 priv->workqueue = NULL;
9023 iwl4965_unset_hw_setting(priv);
9024
9025 out_iounmap:
9026 pci_iounmap(pdev, priv->hw_base);
9027 out_pci_release_regions:
9028 pci_release_regions(pdev);
9029 out_pci_disable_device:
9030 pci_disable_device(pdev);
9031 pci_set_drvdata(pdev, NULL);
9032 out_ieee80211_free_hw:
9033 ieee80211_free_hw(priv->hw);
9034 out:
9035 return err;
9036 }
9037
9038 static void iwl4965_pci_remove(struct pci_dev *pdev)
9039 {
9040 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9041 struct list_head *p, *q;
9042 int i;
9043
9044 if (!priv)
9045 return;
9046
9047 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
9048
9049 set_bit(STATUS_EXIT_PENDING, &priv->status);
9050
9051 iwl4965_down(priv);
9052
9053 /* Free MAC hash list for ADHOC */
9054 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
9055 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
9056 list_del(p);
9057 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
9058 }
9059 }
9060
9061 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
9062
9063 iwl4965_dealloc_ucode_pci(priv);
9064
9065 if (priv->rxq.bd)
9066 iwl4965_rx_queue_free(priv, &priv->rxq);
9067 iwl4965_hw_txq_ctx_free(priv);
9068
9069 iwl4965_unset_hw_setting(priv);
9070 iwl4965_clear_stations_table(priv);
9071
9072 if (priv->mac80211_registered) {
9073 ieee80211_unregister_hw(priv->hw);
9074 iwl4965_rate_control_unregister(priv->hw);
9075 }
9076
9077 /*netif_stop_queue(dev); */
9078 flush_workqueue(priv->workqueue);
9079
9080 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
9081 * priv->workqueue... so we can't take down the workqueue
9082 * until now... */
9083 destroy_workqueue(priv->workqueue);
9084 priv->workqueue = NULL;
9085
9086 pci_iounmap(pdev, priv->hw_base);
9087 pci_release_regions(pdev);
9088 pci_disable_device(pdev);
9089 pci_set_drvdata(pdev, NULL);
9090
9091 iwl4965_free_channel_map(priv);
9092 iwl4965_free_geos(priv);
9093
9094 if (priv->ibss_beacon)
9095 dev_kfree_skb(priv->ibss_beacon);
9096
9097 ieee80211_free_hw(priv->hw);
9098 }
9099
9100 #ifdef CONFIG_PM
9101
9102 static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
9103 {
9104 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9105
9106 if (priv->is_open) {
9107 set_bit(STATUS_IN_SUSPEND, &priv->status);
9108 iwl4965_mac_stop(priv->hw);
9109 priv->is_open = 1;
9110 }
9111
9112 pci_set_power_state(pdev, PCI_D3hot);
9113
9114 return 0;
9115 }
9116
9117 static int iwl4965_pci_resume(struct pci_dev *pdev)
9118 {
9119 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
9120
9121 pci_set_power_state(pdev, PCI_D0);
9122
9123 if (priv->is_open)
9124 iwl4965_mac_start(priv->hw);
9125
9126 clear_bit(STATUS_IN_SUSPEND, &priv->status);
9127 return 0;
9128 }
9129
9130 #endif /* CONFIG_PM */
9131
9132 /*****************************************************************************
9133 *
9134 * driver and module entry point
9135 *
9136 *****************************************************************************/
9137
9138 static struct pci_driver iwl4965_driver = {
9139 .name = DRV_NAME,
9140 .id_table = iwl4965_hw_card_ids,
9141 .probe = iwl4965_pci_probe,
9142 .remove = __devexit_p(iwl4965_pci_remove),
9143 #ifdef CONFIG_PM
9144 .suspend = iwl4965_pci_suspend,
9145 .resume = iwl4965_pci_resume,
9146 #endif
9147 };
9148
9149 static int __init iwl4965_init(void)
9150 {
9151
9152 int ret;
9153 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
9154 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
9155 ret = pci_register_driver(&iwl4965_driver);
9156 if (ret) {
9157 IWL_ERROR("Unable to initialize PCI module\n");
9158 return ret;
9159 }
9160 #ifdef CONFIG_IWL4965_DEBUG
9161 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
9162 if (ret) {
9163 IWL_ERROR("Unable to create driver sysfs file\n");
9164 pci_unregister_driver(&iwl4965_driver);
9165 return ret;
9166 }
9167 #endif
9168
9169 return ret;
9170 }
9171
9172 static void __exit iwl4965_exit(void)
9173 {
9174 #ifdef CONFIG_IWL4965_DEBUG
9175 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
9176 #endif
9177 pci_unregister_driver(&iwl4965_driver);
9178 }
9179
9180 module_param_named(antenna, iwl4965_param_antenna, int, 0444);
9181 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
9182 module_param_named(disable, iwl4965_param_disable, int, 0444);
9183 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
9184 module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
9185 MODULE_PARM_DESC(hwcrypto,
9186 "using hardware crypto engine (default 0 [software])\n");
9187 module_param_named(debug, iwl4965_param_debug, int, 0444);
9188 MODULE_PARM_DESC(debug, "debug output mask");
9189 module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
9190 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
9191
9192 module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
9193 MODULE_PARM_DESC(queues_num, "number of hw queues.");
9194
9195 /* QoS */
9196 module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
9197 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
9198 module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
9199 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
9200
9201 module_exit(iwl4965_exit);
9202 module_init(iwl4965_init);
Linux kernel - Deliverables
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