2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.10"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init
)(void *rxd
, dma_addr_t next_dma_addr
);
86 void (*rxd_refill
)(void *rxd
, dma_addr_t addr
, int len
);
87 int (*rxd_process
)(void *rxd
, struct ieee80211_rx_status
*status
);
90 struct mwl8k_device_info
{
94 struct rxd_ops
*rxd_ops
;
98 struct mwl8k_rx_queue
{
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma
)
115 struct mwl8k_tx_queue
{
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats
;
123 struct mwl8k_tx_desc
*txd
;
125 struct sk_buff
**skb
;
128 /* Pointers to the firmware data and meta information about it. */
129 struct mwl8k_firmware
{
130 /* Boot helper code */
131 struct firmware
*helper
;
134 struct firmware
*ucode
;
140 struct ieee80211_hw
*hw
;
142 struct pci_dev
*pdev
;
144 struct mwl8k_device_info
*device_info
;
146 struct rxd_ops
*rxd_ops
;
148 /* firmware files and meta data */
149 struct mwl8k_firmware fw
;
151 /* firmware access */
152 struct mutex fw_mutex
;
153 struct task_struct
*fw_mutex_owner
;
155 struct completion
*hostcmd_wait
;
157 /* lock held over TX and TX reap */
160 /* TX quiesce completion, protected by fw_mutex and tx_lock */
161 struct completion
*tx_wait
;
163 struct ieee80211_vif
*vif
;
165 struct ieee80211_channel
*current_channel
;
167 /* power management status cookie from firmware */
169 dma_addr_t cookie_dma
;
176 * Running count of TX packets in flight, to avoid
177 * iterating over the transmit rings each time.
181 struct mwl8k_rx_queue rxq
[MWL8K_RX_QUEUES
];
182 struct mwl8k_tx_queue txq
[MWL8K_TX_QUEUES
];
185 struct ieee80211_supported_band band
;
186 struct ieee80211_channel channels
[14];
187 struct ieee80211_rate rates
[13];
190 bool radio_short_preamble
;
191 bool sniffer_enabled
;
194 /* XXX need to convert this to handle multiple interfaces */
196 u8 capture_bssid
[ETH_ALEN
];
197 struct sk_buff
*beacon_skb
;
200 * This FJ worker has to be global as it is scheduled from the
201 * RX handler. At this point we don't know which interface it
202 * belongs to until the list of bssids waiting to complete join
205 struct work_struct finalize_join_worker
;
207 /* Tasklet to reclaim TX descriptors and buffers after tx */
208 struct tasklet_struct tx_reclaim_task
;
211 /* Per interface specific private data */
213 /* backpointer to parent config block */
214 struct mwl8k_priv
*priv
;
216 /* BSS config of AP or IBSS from mac80211*/
217 struct ieee80211_bss_conf bss_info
;
219 /* BSSID of AP or IBSS */
221 u8 mac_addr
[ETH_ALEN
];
224 * Subset of supported legacy rates.
225 * Intersection of AP and STA supported rates.
227 struct ieee80211_rate legacy_rates
[13];
229 /* number of supported legacy rates */
232 /* Index into station database.Returned by update_sta_db call */
235 /* Non AMPDU sequence number assigned by driver */
239 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
241 static const struct ieee80211_channel mwl8k_channels
[] = {
242 { .center_freq
= 2412, .hw_value
= 1, },
243 { .center_freq
= 2417, .hw_value
= 2, },
244 { .center_freq
= 2422, .hw_value
= 3, },
245 { .center_freq
= 2427, .hw_value
= 4, },
246 { .center_freq
= 2432, .hw_value
= 5, },
247 { .center_freq
= 2437, .hw_value
= 6, },
248 { .center_freq
= 2442, .hw_value
= 7, },
249 { .center_freq
= 2447, .hw_value
= 8, },
250 { .center_freq
= 2452, .hw_value
= 9, },
251 { .center_freq
= 2457, .hw_value
= 10, },
252 { .center_freq
= 2462, .hw_value
= 11, },
255 static const struct ieee80211_rate mwl8k_rates
[] = {
256 { .bitrate
= 10, .hw_value
= 2, },
257 { .bitrate
= 20, .hw_value
= 4, },
258 { .bitrate
= 55, .hw_value
= 11, },
259 { .bitrate
= 110, .hw_value
= 22, },
260 { .bitrate
= 220, .hw_value
= 44, },
261 { .bitrate
= 60, .hw_value
= 12, },
262 { .bitrate
= 90, .hw_value
= 18, },
263 { .bitrate
= 120, .hw_value
= 24, },
264 { .bitrate
= 180, .hw_value
= 36, },
265 { .bitrate
= 240, .hw_value
= 48, },
266 { .bitrate
= 360, .hw_value
= 72, },
267 { .bitrate
= 480, .hw_value
= 96, },
268 { .bitrate
= 540, .hw_value
= 108, },
271 /* Set or get info from Firmware */
272 #define MWL8K_CMD_SET 0x0001
273 #define MWL8K_CMD_GET 0x0000
275 /* Firmware command codes */
276 #define MWL8K_CMD_CODE_DNLD 0x0001
277 #define MWL8K_CMD_GET_HW_SPEC 0x0003
278 #define MWL8K_CMD_SET_HW_SPEC 0x0004
279 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
280 #define MWL8K_CMD_GET_STAT 0x0014
281 #define MWL8K_CMD_RADIO_CONTROL 0x001c
282 #define MWL8K_CMD_RF_TX_POWER 0x001e
283 #define MWL8K_CMD_RF_ANTENNA 0x0020
284 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
285 #define MWL8K_CMD_SET_POST_SCAN 0x0108
286 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
287 #define MWL8K_CMD_SET_AID 0x010d
288 #define MWL8K_CMD_SET_RATE 0x0110
289 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
290 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
291 #define MWL8K_CMD_SET_SLOT 0x0114
292 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
293 #define MWL8K_CMD_SET_WMM_MODE 0x0123
294 #define MWL8K_CMD_MIMO_CONFIG 0x0125
295 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
296 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
297 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
298 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
299 #define MWL8K_CMD_UPDATE_STADB 0x1123
301 static const char *mwl8k_cmd_name(u16 cmd
, char *buf
, int bufsize
)
303 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
304 snprintf(buf, bufsize, "%s", #x);\
307 switch (cmd
& ~0x8000) {
308 MWL8K_CMDNAME(CODE_DNLD
);
309 MWL8K_CMDNAME(GET_HW_SPEC
);
310 MWL8K_CMDNAME(SET_HW_SPEC
);
311 MWL8K_CMDNAME(MAC_MULTICAST_ADR
);
312 MWL8K_CMDNAME(GET_STAT
);
313 MWL8K_CMDNAME(RADIO_CONTROL
);
314 MWL8K_CMDNAME(RF_TX_POWER
);
315 MWL8K_CMDNAME(RF_ANTENNA
);
316 MWL8K_CMDNAME(SET_PRE_SCAN
);
317 MWL8K_CMDNAME(SET_POST_SCAN
);
318 MWL8K_CMDNAME(SET_RF_CHANNEL
);
319 MWL8K_CMDNAME(SET_AID
);
320 MWL8K_CMDNAME(SET_RATE
);
321 MWL8K_CMDNAME(SET_FINALIZE_JOIN
);
322 MWL8K_CMDNAME(RTS_THRESHOLD
);
323 MWL8K_CMDNAME(SET_SLOT
);
324 MWL8K_CMDNAME(SET_EDCA_PARAMS
);
325 MWL8K_CMDNAME(SET_WMM_MODE
);
326 MWL8K_CMDNAME(MIMO_CONFIG
);
327 MWL8K_CMDNAME(USE_FIXED_RATE
);
328 MWL8K_CMDNAME(ENABLE_SNIFFER
);
329 MWL8K_CMDNAME(SET_MAC_ADDR
);
330 MWL8K_CMDNAME(SET_RATEADAPT_MODE
);
331 MWL8K_CMDNAME(UPDATE_STADB
);
333 snprintf(buf
, bufsize
, "0x%x", cmd
);
340 /* Hardware and firmware reset */
341 static void mwl8k_hw_reset(struct mwl8k_priv
*priv
)
343 iowrite32(MWL8K_H2A_INT_RESET
,
344 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
345 iowrite32(MWL8K_H2A_INT_RESET
,
346 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
350 /* Release fw image */
351 static void mwl8k_release_fw(struct firmware
**fw
)
355 release_firmware(*fw
);
359 static void mwl8k_release_firmware(struct mwl8k_priv
*priv
)
361 mwl8k_release_fw(&priv
->fw
.ucode
);
362 mwl8k_release_fw(&priv
->fw
.helper
);
365 /* Request fw image */
366 static int mwl8k_request_fw(struct mwl8k_priv
*priv
,
367 const char *fname
, struct firmware
**fw
)
369 /* release current image */
371 mwl8k_release_fw(fw
);
373 return request_firmware((const struct firmware
**)fw
,
374 fname
, &priv
->pdev
->dev
);
377 static int mwl8k_request_firmware(struct mwl8k_priv
*priv
)
379 struct mwl8k_device_info
*di
= priv
->device_info
;
382 if (di
->helper_image
!= NULL
) {
383 rc
= mwl8k_request_fw(priv
, di
->helper_image
, &priv
->fw
.helper
);
385 printk(KERN_ERR
"%s: Error requesting helper "
386 "firmware file %s\n", pci_name(priv
->pdev
),
392 rc
= mwl8k_request_fw(priv
, di
->fw_image
, &priv
->fw
.ucode
);
394 printk(KERN_ERR
"%s: Error requesting firmware file %s\n",
395 pci_name(priv
->pdev
), di
->fw_image
);
396 mwl8k_release_fw(&priv
->fw
.helper
);
403 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
404 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
406 struct mwl8k_cmd_pkt
{
412 } __attribute__((packed
));
418 mwl8k_send_fw_load_cmd(struct mwl8k_priv
*priv
, void *data
, int length
)
420 void __iomem
*regs
= priv
->regs
;
424 dma_addr
= pci_map_single(priv
->pdev
, data
, length
, PCI_DMA_TODEVICE
);
425 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
428 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
429 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
430 iowrite32(MWL8K_H2A_INT_DOORBELL
,
431 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
432 iowrite32(MWL8K_H2A_INT_DUMMY
,
433 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
439 int_code
= ioread32(regs
+ MWL8K_HIU_INT_CODE
);
440 if (int_code
== MWL8K_INT_CODE_CMD_FINISHED
) {
441 iowrite32(0, regs
+ MWL8K_HIU_INT_CODE
);
449 pci_unmap_single(priv
->pdev
, dma_addr
, length
, PCI_DMA_TODEVICE
);
451 return loops
? 0 : -ETIMEDOUT
;
454 static int mwl8k_load_fw_image(struct mwl8k_priv
*priv
,
455 const u8
*data
, size_t length
)
457 struct mwl8k_cmd_pkt
*cmd
;
461 cmd
= kmalloc(sizeof(*cmd
) + 256, GFP_KERNEL
);
465 cmd
->code
= cpu_to_le16(MWL8K_CMD_CODE_DNLD
);
471 int block_size
= length
> 256 ? 256 : length
;
473 memcpy(cmd
->payload
, data
+ done
, block_size
);
474 cmd
->length
= cpu_to_le16(block_size
);
476 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
,
477 sizeof(*cmd
) + block_size
);
482 length
-= block_size
;
487 rc
= mwl8k_send_fw_load_cmd(priv
, cmd
, sizeof(*cmd
));
495 static int mwl8k_feed_fw_image(struct mwl8k_priv
*priv
,
496 const u8
*data
, size_t length
)
498 unsigned char *buffer
;
499 int may_continue
, rc
= 0;
500 u32 done
, prev_block_size
;
502 buffer
= kmalloc(1024, GFP_KERNEL
);
509 while (may_continue
> 0) {
512 block_size
= ioread32(priv
->regs
+ MWL8K_HIU_SCRATCH
);
513 if (block_size
& 1) {
517 done
+= prev_block_size
;
518 length
-= prev_block_size
;
521 if (block_size
> 1024 || block_size
> length
) {
531 if (block_size
== 0) {
538 prev_block_size
= block_size
;
539 memcpy(buffer
, data
+ done
, block_size
);
541 rc
= mwl8k_send_fw_load_cmd(priv
, buffer
, block_size
);
546 if (!rc
&& length
!= 0)
554 static int mwl8k_load_firmware(struct ieee80211_hw
*hw
)
556 struct mwl8k_priv
*priv
= hw
->priv
;
557 struct firmware
*fw
= priv
->fw
.ucode
;
558 struct mwl8k_device_info
*di
= priv
->device_info
;
562 if (!memcmp(fw
->data
, "\x01\x00\x00\x00", 4)) {
563 struct firmware
*helper
= priv
->fw
.helper
;
565 if (helper
== NULL
) {
566 printk(KERN_ERR
"%s: helper image needed but none "
567 "given\n", pci_name(priv
->pdev
));
571 rc
= mwl8k_load_fw_image(priv
, helper
->data
, helper
->size
);
573 printk(KERN_ERR
"%s: unable to load firmware "
574 "helper image\n", pci_name(priv
->pdev
));
579 rc
= mwl8k_feed_fw_image(priv
, fw
->data
, fw
->size
);
581 rc
= mwl8k_load_fw_image(priv
, fw
->data
, fw
->size
);
585 printk(KERN_ERR
"%s: unable to load firmware image\n",
586 pci_name(priv
->pdev
));
590 if (di
->modes
& BIT(NL80211_IFTYPE_AP
))
591 iowrite32(MWL8K_MODE_AP
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
593 iowrite32(MWL8K_MODE_STA
, priv
->regs
+ MWL8K_HIU_GEN_PTR
);
600 ready_code
= ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
601 if (ready_code
== MWL8K_FWAP_READY
) {
604 } else if (ready_code
== MWL8K_FWSTA_READY
) {
613 return loops
? 0 : -ETIMEDOUT
;
618 * Defines shared between transmission and reception.
620 /* HT control fields for firmware */
625 } __attribute__((packed
));
627 /* Firmware Station database operations */
628 #define MWL8K_STA_DB_ADD_ENTRY 0
629 #define MWL8K_STA_DB_MODIFY_ENTRY 1
630 #define MWL8K_STA_DB_DEL_ENTRY 2
631 #define MWL8K_STA_DB_FLUSH 3
633 /* Peer Entry flags - used to define the type of the peer node */
634 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
636 #define MWL8K_IEEE_LEGACY_DATA_RATES 13
637 #define MWL8K_MCS_BITMAP_SIZE 16
639 struct peer_capability_info
{
640 /* Peer type - AP vs. STA. */
643 /* Basic 802.11 capabilities from assoc resp. */
646 /* Set if peer supports 802.11n high throughput (HT). */
649 /* Valid if HT is supported. */
651 __u8 extended_ht_caps
;
652 struct ewc_ht_info ewc_info
;
654 /* Legacy rate table. Intersection of our rates and peer rates. */
655 __u8 legacy_rates
[MWL8K_IEEE_LEGACY_DATA_RATES
];
657 /* HT rate table. Intersection of our rates and peer rates. */
658 __u8 ht_rates
[MWL8K_MCS_BITMAP_SIZE
];
661 /* If set, interoperability mode, no proprietary extensions. */
665 __le16 amsdu_enabled
;
666 } __attribute__((packed
));
668 /* Inline functions to manipulate QoS field in data descriptor. */
669 static inline u16
mwl8k_qos_setbit_eosp(u16 qos
)
671 u16 val_mask
= 1 << 4;
673 /* End of Service Period Bit 4 */
674 return qos
| val_mask
;
677 static inline u16
mwl8k_qos_setbit_ack(u16 qos
, u8 ack_policy
)
681 u16 qos_mask
= ~(val_mask
<< shift
);
683 /* Ack Policy Bit 5-6 */
684 return (qos
& qos_mask
) | ((ack_policy
& val_mask
) << shift
);
687 static inline u16
mwl8k_qos_setbit_amsdu(u16 qos
)
689 u16 val_mask
= 1 << 7;
691 /* AMSDU present Bit 7 */
692 return qos
| val_mask
;
695 static inline u16
mwl8k_qos_setbit_qlen(u16 qos
, u8 len
)
699 u16 qos_mask
= ~(val_mask
<< shift
);
701 /* Queue Length Bits 8-15 */
702 return (qos
& qos_mask
) | ((len
& val_mask
) << shift
);
705 /* DMA header used by firmware and hardware. */
706 struct mwl8k_dma_data
{
708 struct ieee80211_hdr wh
;
709 } __attribute__((packed
));
711 /* Routines to add/remove DMA header from skb. */
712 static inline void mwl8k_remove_dma_header(struct sk_buff
*skb
)
714 struct mwl8k_dma_data
*tr
= (struct mwl8k_dma_data
*)skb
->data
;
715 void *dst
, *src
= &tr
->wh
;
716 int hdrlen
= ieee80211_hdrlen(tr
->wh
.frame_control
);
717 u16 space
= sizeof(struct mwl8k_dma_data
) - hdrlen
;
719 dst
= (void *)tr
+ space
;
721 memmove(dst
, src
, hdrlen
);
722 skb_pull(skb
, space
);
726 static inline void mwl8k_add_dma_header(struct sk_buff
*skb
)
728 struct ieee80211_hdr
*wh
;
730 struct mwl8k_dma_data
*tr
;
732 wh
= (struct ieee80211_hdr
*)skb
->data
;
733 hdrlen
= ieee80211_hdrlen(wh
->frame_control
);
737 * Copy up/down the 802.11 header; the firmware requires
738 * we present a 2-byte payload length followed by a
739 * 4-address header (w/o QoS), followed (optionally) by
740 * any WEP/ExtIV header (but only filled in for CCMP).
742 if (hdrlen
!= sizeof(struct mwl8k_dma_data
))
743 skb_push(skb
, sizeof(struct mwl8k_dma_data
) - hdrlen
);
745 tr
= (struct mwl8k_dma_data
*)skb
->data
;
747 memmove(&tr
->wh
, wh
, hdrlen
);
750 memset(tr
->wh
.addr4
, 0, ETH_ALEN
);
753 * Firmware length is the length of the fully formed "802.11
754 * payload". That is, everything except for the 802.11 header.
755 * This includes all crypto material including the MIC.
757 tr
->fwlen
= cpu_to_le16(pktlen
- hdrlen
);
762 * Packet reception for 88w8366.
764 struct mwl8k_rxd_8366
{
768 __le32 pkt_phys_addr
;
769 __le32 next_rxd_phys_addr
;
773 __le32 hw_noise_floor_info
;
780 } __attribute__((packed
));
782 #define MWL8K_8366_RX_CTRL_OWNED_BY_HOST 0x80
784 static void mwl8k_rxd_8366_init(void *_rxd
, dma_addr_t next_dma_addr
)
786 struct mwl8k_rxd_8366
*rxd
= _rxd
;
788 rxd
->next_rxd_phys_addr
= cpu_to_le32(next_dma_addr
);
789 rxd
->rx_ctrl
= MWL8K_8366_RX_CTRL_OWNED_BY_HOST
;
792 static void mwl8k_rxd_8366_refill(void *_rxd
, dma_addr_t addr
, int len
)
794 struct mwl8k_rxd_8366
*rxd
= _rxd
;
796 rxd
->pkt_len
= cpu_to_le16(len
);
797 rxd
->pkt_phys_addr
= cpu_to_le32(addr
);
803 mwl8k_rxd_8366_process(void *_rxd
, struct ieee80211_rx_status
*status
)
805 struct mwl8k_rxd_8366
*rxd
= _rxd
;
807 if (!(rxd
->rx_ctrl
& MWL8K_8366_RX_CTRL_OWNED_BY_HOST
))
811 memset(status
, 0, sizeof(*status
));
813 status
->signal
= -rxd
->rssi
;
814 status
->noise
= -rxd
->noise_floor
;
816 if (rxd
->rate
& 0x80) {
817 status
->flag
|= RX_FLAG_HT
;
818 status
->rate_idx
= rxd
->rate
& 0x7f;
822 for (i
= 0; i
< ARRAY_SIZE(mwl8k_rates
); i
++) {
823 if (mwl8k_rates
[i
].hw_value
== rxd
->rate
) {
824 status
->rate_idx
= i
;
830 status
->band
= IEEE80211_BAND_2GHZ
;
831 status
->freq
= ieee80211_channel_to_frequency(rxd
->channel
);
833 return le16_to_cpu(rxd
->pkt_len
);
836 static struct rxd_ops rxd_8366_ops
= {
837 .rxd_size
= sizeof(struct mwl8k_rxd_8366
),
838 .rxd_init
= mwl8k_rxd_8366_init
,
839 .rxd_refill
= mwl8k_rxd_8366_refill
,
840 .rxd_process
= mwl8k_rxd_8366_process
,
844 * Packet reception for 88w8687.
846 struct mwl8k_rxd_8687
{
850 __le32 pkt_phys_addr
;
851 __le32 next_rxd_phys_addr
;
861 } __attribute__((packed
));
863 #define MWL8K_8687_RATE_INFO_SHORTPRE 0x8000
864 #define MWL8K_8687_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
865 #define MWL8K_8687_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
866 #define MWL8K_8687_RATE_INFO_40MHZ 0x0004
867 #define MWL8K_8687_RATE_INFO_SHORTGI 0x0002
868 #define MWL8K_8687_RATE_INFO_MCS_FORMAT 0x0001
870 #define MWL8K_8687_RX_CTRL_OWNED_BY_HOST 0x02
872 static void mwl8k_rxd_8687_init(void *_rxd
, dma_addr_t next_dma_addr
)
874 struct mwl8k_rxd_8687
*rxd
= _rxd
;
876 rxd
->next_rxd_phys_addr
= cpu_to_le32(next_dma_addr
);
877 rxd
->rx_ctrl
= MWL8K_8687_RX_CTRL_OWNED_BY_HOST
;
880 static void mwl8k_rxd_8687_refill(void *_rxd
, dma_addr_t addr
, int len
)
882 struct mwl8k_rxd_8687
*rxd
= _rxd
;
884 rxd
->pkt_len
= cpu_to_le16(len
);
885 rxd
->pkt_phys_addr
= cpu_to_le32(addr
);
891 mwl8k_rxd_8687_process(void *_rxd
, struct ieee80211_rx_status
*status
)
893 struct mwl8k_rxd_8687
*rxd
= _rxd
;
896 if (!(rxd
->rx_ctrl
& MWL8K_8687_RX_CTRL_OWNED_BY_HOST
))
900 rate_info
= le16_to_cpu(rxd
->rate_info
);
902 memset(status
, 0, sizeof(*status
));
904 status
->signal
= -rxd
->rssi
;
905 status
->noise
= -rxd
->noise_level
;
906 status
->qual
= rxd
->link_quality
;
907 status
->antenna
= MWL8K_8687_RATE_INFO_ANTSELECT(rate_info
);
908 status
->rate_idx
= MWL8K_8687_RATE_INFO_RATEID(rate_info
);
910 if (rate_info
& MWL8K_8687_RATE_INFO_SHORTPRE
)
911 status
->flag
|= RX_FLAG_SHORTPRE
;
912 if (rate_info
& MWL8K_8687_RATE_INFO_40MHZ
)
913 status
->flag
|= RX_FLAG_40MHZ
;
914 if (rate_info
& MWL8K_8687_RATE_INFO_SHORTGI
)
915 status
->flag
|= RX_FLAG_SHORT_GI
;
916 if (rate_info
& MWL8K_8687_RATE_INFO_MCS_FORMAT
)
917 status
->flag
|= RX_FLAG_HT
;
919 status
->band
= IEEE80211_BAND_2GHZ
;
920 status
->freq
= ieee80211_channel_to_frequency(rxd
->channel
);
922 return le16_to_cpu(rxd
->pkt_len
);
925 static struct rxd_ops rxd_8687_ops
= {
926 .rxd_size
= sizeof(struct mwl8k_rxd_8687
),
927 .rxd_init
= mwl8k_rxd_8687_init
,
928 .rxd_refill
= mwl8k_rxd_8687_refill
,
929 .rxd_process
= mwl8k_rxd_8687_process
,
933 #define MWL8K_RX_DESCS 256
934 #define MWL8K_RX_MAXSZ 3800
936 static int mwl8k_rxq_init(struct ieee80211_hw
*hw
, int index
)
938 struct mwl8k_priv
*priv
= hw
->priv
;
939 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
947 size
= MWL8K_RX_DESCS
* priv
->rxd_ops
->rxd_size
;
949 rxq
->rxd
= pci_alloc_consistent(priv
->pdev
, size
, &rxq
->rxd_dma
);
950 if (rxq
->rxd
== NULL
) {
951 printk(KERN_ERR
"%s: failed to alloc RX descriptors\n",
952 wiphy_name(hw
->wiphy
));
955 memset(rxq
->rxd
, 0, size
);
957 rxq
->buf
= kmalloc(MWL8K_RX_DESCS
* sizeof(*rxq
->buf
), GFP_KERNEL
);
958 if (rxq
->buf
== NULL
) {
959 printk(KERN_ERR
"%s: failed to alloc RX skbuff list\n",
960 wiphy_name(hw
->wiphy
));
961 pci_free_consistent(priv
->pdev
, size
, rxq
->rxd
, rxq
->rxd_dma
);
964 memset(rxq
->buf
, 0, MWL8K_RX_DESCS
* sizeof(*rxq
->buf
));
966 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
970 dma_addr_t next_dma_addr
;
972 desc_size
= priv
->rxd_ops
->rxd_size
;
973 rxd
= rxq
->rxd
+ (i
* priv
->rxd_ops
->rxd_size
);
976 if (nexti
== MWL8K_RX_DESCS
)
978 next_dma_addr
= rxq
->rxd_dma
+ (nexti
* desc_size
);
980 priv
->rxd_ops
->rxd_init(rxd
, next_dma_addr
);
986 static int rxq_refill(struct ieee80211_hw
*hw
, int index
, int limit
)
988 struct mwl8k_priv
*priv
= hw
->priv
;
989 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
993 while (rxq
->rxd_count
< MWL8K_RX_DESCS
&& limit
--) {
999 skb
= dev_alloc_skb(MWL8K_RX_MAXSZ
);
1003 addr
= pci_map_single(priv
->pdev
, skb
->data
,
1004 MWL8K_RX_MAXSZ
, DMA_FROM_DEVICE
);
1008 if (rxq
->tail
== MWL8K_RX_DESCS
)
1010 rxq
->buf
[rx
].skb
= skb
;
1011 pci_unmap_addr_set(&rxq
->buf
[rx
], dma
, addr
);
1013 rxd
= rxq
->rxd
+ (rx
* priv
->rxd_ops
->rxd_size
);
1014 priv
->rxd_ops
->rxd_refill(rxd
, addr
, MWL8K_RX_MAXSZ
);
1022 /* Must be called only when the card's reception is completely halted */
1023 static void mwl8k_rxq_deinit(struct ieee80211_hw
*hw
, int index
)
1025 struct mwl8k_priv
*priv
= hw
->priv
;
1026 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
1029 for (i
= 0; i
< MWL8K_RX_DESCS
; i
++) {
1030 if (rxq
->buf
[i
].skb
!= NULL
) {
1031 pci_unmap_single(priv
->pdev
,
1032 pci_unmap_addr(&rxq
->buf
[i
], dma
),
1033 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
1034 pci_unmap_addr_set(&rxq
->buf
[i
], dma
, 0);
1036 kfree_skb(rxq
->buf
[i
].skb
);
1037 rxq
->buf
[i
].skb
= NULL
;
1044 pci_free_consistent(priv
->pdev
,
1045 MWL8K_RX_DESCS
* priv
->rxd_ops
->rxd_size
,
1046 rxq
->rxd
, rxq
->rxd_dma
);
1052 * Scan a list of BSSIDs to process for finalize join.
1053 * Allows for extension to process multiple BSSIDs.
1056 mwl8k_capture_bssid(struct mwl8k_priv
*priv
, struct ieee80211_hdr
*wh
)
1058 return priv
->capture_beacon
&&
1059 ieee80211_is_beacon(wh
->frame_control
) &&
1060 !compare_ether_addr(wh
->addr3
, priv
->capture_bssid
);
1063 static inline void mwl8k_save_beacon(struct ieee80211_hw
*hw
,
1064 struct sk_buff
*skb
)
1066 struct mwl8k_priv
*priv
= hw
->priv
;
1068 priv
->capture_beacon
= false;
1069 memset(priv
->capture_bssid
, 0, ETH_ALEN
);
1072 * Use GFP_ATOMIC as rxq_process is called from
1073 * the primary interrupt handler, memory allocation call
1076 priv
->beacon_skb
= skb_copy(skb
, GFP_ATOMIC
);
1077 if (priv
->beacon_skb
!= NULL
)
1078 ieee80211_queue_work(hw
, &priv
->finalize_join_worker
);
1081 static int rxq_process(struct ieee80211_hw
*hw
, int index
, int limit
)
1083 struct mwl8k_priv
*priv
= hw
->priv
;
1084 struct mwl8k_rx_queue
*rxq
= priv
->rxq
+ index
;
1088 while (rxq
->rxd_count
&& limit
--) {
1089 struct sk_buff
*skb
;
1092 struct ieee80211_rx_status status
;
1094 skb
= rxq
->buf
[rxq
->head
].skb
;
1098 rxd
= rxq
->rxd
+ (rxq
->head
* priv
->rxd_ops
->rxd_size
);
1100 pkt_len
= priv
->rxd_ops
->rxd_process(rxd
, &status
);
1104 rxq
->buf
[rxq
->head
].skb
= NULL
;
1106 pci_unmap_single(priv
->pdev
,
1107 pci_unmap_addr(&rxq
->buf
[rxq
->head
], dma
),
1108 MWL8K_RX_MAXSZ
, PCI_DMA_FROMDEVICE
);
1109 pci_unmap_addr_set(&rxq
->buf
[rxq
->head
], dma
, 0);
1112 if (rxq
->head
== MWL8K_RX_DESCS
)
1117 skb_put(skb
, pkt_len
);
1118 mwl8k_remove_dma_header(skb
);
1121 * Check for a pending join operation. Save a
1122 * copy of the beacon and schedule a tasklet to
1123 * send a FINALIZE_JOIN command to the firmware.
1125 if (mwl8k_capture_bssid(priv
, (void *)skb
->data
))
1126 mwl8k_save_beacon(hw
, skb
);
1128 memcpy(IEEE80211_SKB_RXCB(skb
), &status
, sizeof(status
));
1129 ieee80211_rx_irqsafe(hw
, skb
);
1139 * Packet transmission.
1142 /* Transmit packet ACK policy */
1143 #define MWL8K_TXD_ACK_POLICY_NORMAL 0
1144 #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1146 #define MWL8K_TXD_STATUS_OK 0x00000001
1147 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1148 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1149 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1150 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1152 struct mwl8k_tx_desc
{
1157 __le32 pkt_phys_addr
;
1159 __u8 dest_MAC_addr
[ETH_ALEN
];
1160 __le32 next_txd_phys_addr
;
1165 } __attribute__((packed
));
1167 #define MWL8K_TX_DESCS 128
1169 static int mwl8k_txq_init(struct ieee80211_hw
*hw
, int index
)
1171 struct mwl8k_priv
*priv
= hw
->priv
;
1172 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1176 memset(&txq
->stats
, 0, sizeof(struct ieee80211_tx_queue_stats
));
1177 txq
->stats
.limit
= MWL8K_TX_DESCS
;
1181 size
= MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
);
1183 txq
->txd
= pci_alloc_consistent(priv
->pdev
, size
, &txq
->txd_dma
);
1184 if (txq
->txd
== NULL
) {
1185 printk(KERN_ERR
"%s: failed to alloc TX descriptors\n",
1186 wiphy_name(hw
->wiphy
));
1189 memset(txq
->txd
, 0, size
);
1191 txq
->skb
= kmalloc(MWL8K_TX_DESCS
* sizeof(*txq
->skb
), GFP_KERNEL
);
1192 if (txq
->skb
== NULL
) {
1193 printk(KERN_ERR
"%s: failed to alloc TX skbuff list\n",
1194 wiphy_name(hw
->wiphy
));
1195 pci_free_consistent(priv
->pdev
, size
, txq
->txd
, txq
->txd_dma
);
1198 memset(txq
->skb
, 0, MWL8K_TX_DESCS
* sizeof(*txq
->skb
));
1200 for (i
= 0; i
< MWL8K_TX_DESCS
; i
++) {
1201 struct mwl8k_tx_desc
*tx_desc
;
1204 tx_desc
= txq
->txd
+ i
;
1205 nexti
= (i
+ 1) % MWL8K_TX_DESCS
;
1207 tx_desc
->status
= 0;
1208 tx_desc
->next_txd_phys_addr
=
1209 cpu_to_le32(txq
->txd_dma
+ nexti
* sizeof(*tx_desc
));
1215 static inline void mwl8k_tx_start(struct mwl8k_priv
*priv
)
1217 iowrite32(MWL8K_H2A_INT_PPA_READY
,
1218 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1219 iowrite32(MWL8K_H2A_INT_DUMMY
,
1220 priv
->regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1221 ioread32(priv
->regs
+ MWL8K_HIU_INT_CODE
);
1224 struct mwl8k_txq_info
{
1233 static int mwl8k_scan_tx_ring(struct mwl8k_priv
*priv
,
1234 struct mwl8k_txq_info
*txinfo
)
1236 int count
, desc
, status
;
1237 struct mwl8k_tx_queue
*txq
;
1238 struct mwl8k_tx_desc
*tx_desc
;
1241 memset(txinfo
, 0, MWL8K_TX_QUEUES
* sizeof(struct mwl8k_txq_info
));
1243 for (count
= 0; count
< MWL8K_TX_QUEUES
; count
++) {
1244 txq
= priv
->txq
+ count
;
1245 txinfo
[count
].len
= txq
->stats
.len
;
1246 txinfo
[count
].head
= txq
->head
;
1247 txinfo
[count
].tail
= txq
->tail
;
1248 for (desc
= 0; desc
< MWL8K_TX_DESCS
; desc
++) {
1249 tx_desc
= txq
->txd
+ desc
;
1250 status
= le32_to_cpu(tx_desc
->status
);
1252 if (status
& MWL8K_TXD_STATUS_FW_OWNED
)
1253 txinfo
[count
].fw_owned
++;
1255 txinfo
[count
].drv_owned
++;
1257 if (tx_desc
->pkt_len
== 0)
1258 txinfo
[count
].unused
++;
1266 * Must be called with priv->fw_mutex held and tx queues stopped.
1268 static int mwl8k_tx_wait_empty(struct ieee80211_hw
*hw
)
1270 struct mwl8k_priv
*priv
= hw
->priv
;
1271 DECLARE_COMPLETION_ONSTACK(tx_wait
);
1273 unsigned long timeout
;
1277 spin_lock_bh(&priv
->tx_lock
);
1278 count
= priv
->pending_tx_pkts
;
1280 priv
->tx_wait
= &tx_wait
;
1281 spin_unlock_bh(&priv
->tx_lock
);
1284 struct mwl8k_txq_info txinfo
[MWL8K_TX_QUEUES
];
1288 timeout
= wait_for_completion_timeout(&tx_wait
,
1289 msecs_to_jiffies(5000));
1293 spin_lock_bh(&priv
->tx_lock
);
1294 priv
->tx_wait
= NULL
;
1295 newcount
= priv
->pending_tx_pkts
;
1296 mwl8k_scan_tx_ring(priv
, txinfo
);
1297 spin_unlock_bh(&priv
->tx_lock
);
1299 printk(KERN_ERR
"%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n",
1300 __func__
, __LINE__
, count
, newcount
);
1302 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++)
1303 printk(KERN_ERR
"TXQ:%u L:%u H:%u T:%u FW:%u "
1309 txinfo
[index
].fw_owned
,
1310 txinfo
[index
].drv_owned
,
1311 txinfo
[index
].unused
);
1319 #define MWL8K_TXD_SUCCESS(status) \
1320 ((status) & (MWL8K_TXD_STATUS_OK | \
1321 MWL8K_TXD_STATUS_OK_RETRY | \
1322 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1324 static void mwl8k_txq_reclaim(struct ieee80211_hw
*hw
, int index
, int force
)
1326 struct mwl8k_priv
*priv
= hw
->priv
;
1327 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1330 while (txq
->stats
.len
> 0) {
1332 struct mwl8k_tx_desc
*tx_desc
;
1335 struct sk_buff
*skb
;
1336 struct ieee80211_tx_info
*info
;
1340 tx_desc
= txq
->txd
+ tx
;
1342 status
= le32_to_cpu(tx_desc
->status
);
1344 if (status
& MWL8K_TXD_STATUS_FW_OWNED
) {
1348 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
);
1351 txq
->head
= (tx
+ 1) % MWL8K_TX_DESCS
;
1352 BUG_ON(txq
->stats
.len
== 0);
1354 priv
->pending_tx_pkts
--;
1356 addr
= le32_to_cpu(tx_desc
->pkt_phys_addr
);
1357 size
= le16_to_cpu(tx_desc
->pkt_len
);
1359 txq
->skb
[tx
] = NULL
;
1361 BUG_ON(skb
== NULL
);
1362 pci_unmap_single(priv
->pdev
, addr
, size
, PCI_DMA_TODEVICE
);
1364 mwl8k_remove_dma_header(skb
);
1366 /* Mark descriptor as unused */
1367 tx_desc
->pkt_phys_addr
= 0;
1368 tx_desc
->pkt_len
= 0;
1370 info
= IEEE80211_SKB_CB(skb
);
1371 ieee80211_tx_info_clear_status(info
);
1372 if (MWL8K_TXD_SUCCESS(status
))
1373 info
->flags
|= IEEE80211_TX_STAT_ACK
;
1375 ieee80211_tx_status_irqsafe(hw
, skb
);
1380 if (wake
&& priv
->radio_on
&& !mutex_is_locked(&priv
->fw_mutex
))
1381 ieee80211_wake_queue(hw
, index
);
1384 /* must be called only when the card's transmit is completely halted */
1385 static void mwl8k_txq_deinit(struct ieee80211_hw
*hw
, int index
)
1387 struct mwl8k_priv
*priv
= hw
->priv
;
1388 struct mwl8k_tx_queue
*txq
= priv
->txq
+ index
;
1390 mwl8k_txq_reclaim(hw
, index
, 1);
1395 pci_free_consistent(priv
->pdev
,
1396 MWL8K_TX_DESCS
* sizeof(struct mwl8k_tx_desc
),
1397 txq
->txd
, txq
->txd_dma
);
1402 mwl8k_txq_xmit(struct ieee80211_hw
*hw
, int index
, struct sk_buff
*skb
)
1404 struct mwl8k_priv
*priv
= hw
->priv
;
1405 struct ieee80211_tx_info
*tx_info
;
1406 struct mwl8k_vif
*mwl8k_vif
;
1407 struct ieee80211_hdr
*wh
;
1408 struct mwl8k_tx_queue
*txq
;
1409 struct mwl8k_tx_desc
*tx
;
1415 wh
= (struct ieee80211_hdr
*)skb
->data
;
1416 if (ieee80211_is_data_qos(wh
->frame_control
))
1417 qos
= le16_to_cpu(*((__le16
*)ieee80211_get_qos_ctl(wh
)));
1421 mwl8k_add_dma_header(skb
);
1422 wh
= &((struct mwl8k_dma_data
*)skb
->data
)->wh
;
1424 tx_info
= IEEE80211_SKB_CB(skb
);
1425 mwl8k_vif
= MWL8K_VIF(tx_info
->control
.vif
);
1427 if (tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
) {
1428 u16 seqno
= mwl8k_vif
->seqno
;
1430 wh
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
1431 wh
->seq_ctrl
|= cpu_to_le16(seqno
<< 4);
1432 mwl8k_vif
->seqno
= seqno
++ % 4096;
1435 /* Setup firmware control bit fields for each frame type. */
1438 if (ieee80211_is_mgmt(wh
->frame_control
) ||
1439 ieee80211_is_ctl(wh
->frame_control
)) {
1441 qos
= mwl8k_qos_setbit_eosp(qos
);
1442 /* Set Queue size to unspecified */
1443 qos
= mwl8k_qos_setbit_qlen(qos
, 0xff);
1444 } else if (ieee80211_is_data(wh
->frame_control
)) {
1446 if (is_multicast_ether_addr(wh
->addr1
))
1447 txstatus
|= MWL8K_TXD_STATUS_MULTICAST_TX
;
1449 /* Send pkt in an aggregate if AMPDU frame. */
1450 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1451 qos
= mwl8k_qos_setbit_ack(qos
,
1452 MWL8K_TXD_ACK_POLICY_BLOCKACK
);
1454 qos
= mwl8k_qos_setbit_ack(qos
,
1455 MWL8K_TXD_ACK_POLICY_NORMAL
);
1457 if (qos
& IEEE80211_QOS_CONTROL_A_MSDU_PRESENT
)
1458 qos
= mwl8k_qos_setbit_amsdu(qos
);
1461 dma
= pci_map_single(priv
->pdev
, skb
->data
,
1462 skb
->len
, PCI_DMA_TODEVICE
);
1464 if (pci_dma_mapping_error(priv
->pdev
, dma
)) {
1465 printk(KERN_DEBUG
"%s: failed to dma map skb, "
1466 "dropping TX frame.\n", wiphy_name(hw
->wiphy
));
1468 return NETDEV_TX_OK
;
1471 spin_lock_bh(&priv
->tx_lock
);
1473 txq
= priv
->txq
+ index
;
1475 BUG_ON(txq
->skb
[txq
->tail
] != NULL
);
1476 txq
->skb
[txq
->tail
] = skb
;
1478 tx
= txq
->txd
+ txq
->tail
;
1479 tx
->data_rate
= txdatarate
;
1480 tx
->tx_priority
= index
;
1481 tx
->qos_control
= cpu_to_le16(qos
);
1482 tx
->pkt_phys_addr
= cpu_to_le32(dma
);
1483 tx
->pkt_len
= cpu_to_le16(skb
->len
);
1485 tx
->peer_id
= mwl8k_vif
->peer_id
;
1487 tx
->status
= cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED
| txstatus
);
1491 priv
->pending_tx_pkts
++;
1494 if (txq
->tail
== MWL8K_TX_DESCS
)
1497 if (txq
->head
== txq
->tail
)
1498 ieee80211_stop_queue(hw
, index
);
1500 mwl8k_tx_start(priv
);
1502 spin_unlock_bh(&priv
->tx_lock
);
1504 return NETDEV_TX_OK
;
1511 * We have the following requirements for issuing firmware commands:
1512 * - Some commands require that the packet transmit path is idle when
1513 * the command is issued. (For simplicity, we'll just quiesce the
1514 * transmit path for every command.)
1515 * - There are certain sequences of commands that need to be issued to
1516 * the hardware sequentially, with no other intervening commands.
1518 * This leads to an implementation of a "firmware lock" as a mutex that
1519 * can be taken recursively, and which is taken by both the low-level
1520 * command submission function (mwl8k_post_cmd) as well as any users of
1521 * that function that require issuing of an atomic sequence of commands,
1522 * and quiesces the transmit path whenever it's taken.
1524 static int mwl8k_fw_lock(struct ieee80211_hw
*hw
)
1526 struct mwl8k_priv
*priv
= hw
->priv
;
1528 if (priv
->fw_mutex_owner
!= current
) {
1531 mutex_lock(&priv
->fw_mutex
);
1532 ieee80211_stop_queues(hw
);
1534 rc
= mwl8k_tx_wait_empty(hw
);
1536 ieee80211_wake_queues(hw
);
1537 mutex_unlock(&priv
->fw_mutex
);
1542 priv
->fw_mutex_owner
= current
;
1545 priv
->fw_mutex_depth
++;
1550 static void mwl8k_fw_unlock(struct ieee80211_hw
*hw
)
1552 struct mwl8k_priv
*priv
= hw
->priv
;
1554 if (!--priv
->fw_mutex_depth
) {
1555 ieee80211_wake_queues(hw
);
1556 priv
->fw_mutex_owner
= NULL
;
1557 mutex_unlock(&priv
->fw_mutex
);
1563 * Command processing.
1566 /* Timeout firmware commands after 2000ms */
1567 #define MWL8K_CMD_TIMEOUT_MS 2000
1569 static int mwl8k_post_cmd(struct ieee80211_hw
*hw
, struct mwl8k_cmd_pkt
*cmd
)
1571 DECLARE_COMPLETION_ONSTACK(cmd_wait
);
1572 struct mwl8k_priv
*priv
= hw
->priv
;
1573 void __iomem
*regs
= priv
->regs
;
1574 dma_addr_t dma_addr
;
1575 unsigned int dma_size
;
1577 unsigned long timeout
= 0;
1580 cmd
->result
= 0xffff;
1581 dma_size
= le16_to_cpu(cmd
->length
);
1582 dma_addr
= pci_map_single(priv
->pdev
, cmd
, dma_size
,
1583 PCI_DMA_BIDIRECTIONAL
);
1584 if (pci_dma_mapping_error(priv
->pdev
, dma_addr
))
1587 rc
= mwl8k_fw_lock(hw
);
1589 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1590 PCI_DMA_BIDIRECTIONAL
);
1594 priv
->hostcmd_wait
= &cmd_wait
;
1595 iowrite32(dma_addr
, regs
+ MWL8K_HIU_GEN_PTR
);
1596 iowrite32(MWL8K_H2A_INT_DOORBELL
,
1597 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1598 iowrite32(MWL8K_H2A_INT_DUMMY
,
1599 regs
+ MWL8K_HIU_H2A_INTERRUPT_EVENTS
);
1601 timeout
= wait_for_completion_timeout(&cmd_wait
,
1602 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS
));
1604 priv
->hostcmd_wait
= NULL
;
1606 mwl8k_fw_unlock(hw
);
1608 pci_unmap_single(priv
->pdev
, dma_addr
, dma_size
,
1609 PCI_DMA_BIDIRECTIONAL
);
1612 printk(KERN_ERR
"%s: Command %s timeout after %u ms\n",
1613 wiphy_name(hw
->wiphy
),
1614 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1615 MWL8K_CMD_TIMEOUT_MS
);
1618 rc
= cmd
->result
? -EINVAL
: 0;
1620 printk(KERN_ERR
"%s: Command %s error 0x%x\n",
1621 wiphy_name(hw
->wiphy
),
1622 mwl8k_cmd_name(cmd
->code
, buf
, sizeof(buf
)),
1623 le16_to_cpu(cmd
->result
));
1630 * CMD_GET_HW_SPEC (STA version).
1632 struct mwl8k_cmd_get_hw_spec_sta
{
1633 struct mwl8k_cmd_pkt header
;
1635 __u8 host_interface
;
1637 __u8 perm_addr
[ETH_ALEN
];
1642 __u8 mcs_bitmap
[16];
1643 __le32 rx_queue_ptr
;
1644 __le32 num_tx_queues
;
1645 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1647 __le32 num_tx_desc_per_queue
;
1649 } __attribute__((packed
));
1651 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw
*hw
)
1653 struct mwl8k_priv
*priv
= hw
->priv
;
1654 struct mwl8k_cmd_get_hw_spec_sta
*cmd
;
1658 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1662 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1663 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1665 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1666 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1667 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rxd_dma
);
1668 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1669 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1670 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].txd_dma
);
1671 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1672 cmd
->total_rxd
= cpu_to_le32(MWL8K_RX_DESCS
);
1674 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1677 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1678 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1679 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1680 priv
->hw_rev
= cmd
->hw_rev
;
1688 * CMD_GET_HW_SPEC (AP version).
1690 struct mwl8k_cmd_get_hw_spec_ap
{
1691 struct mwl8k_cmd_pkt header
;
1693 __u8 host_interface
;
1696 __u8 perm_addr
[ETH_ALEN
];
1707 } __attribute__((packed
));
1709 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw
*hw
)
1711 struct mwl8k_priv
*priv
= hw
->priv
;
1712 struct mwl8k_cmd_get_hw_spec_ap
*cmd
;
1715 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1719 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_HW_SPEC
);
1720 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1722 memset(cmd
->perm_addr
, 0xff, sizeof(cmd
->perm_addr
));
1723 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1725 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1730 SET_IEEE80211_PERM_ADDR(hw
, cmd
->perm_addr
);
1731 priv
->num_mcaddrs
= le16_to_cpu(cmd
->num_mcaddrs
);
1732 priv
->fw_rev
= le32_to_cpu(cmd
->fw_rev
);
1733 priv
->hw_rev
= cmd
->hw_rev
;
1735 off
= le32_to_cpu(cmd
->wcbbase0
) & 0xffff;
1736 iowrite32(cpu_to_le32(priv
->txq
[0].txd_dma
), priv
->sram
+ off
);
1738 off
= le32_to_cpu(cmd
->rxwrptr
) & 0xffff;
1739 iowrite32(cpu_to_le32(priv
->rxq
[0].rxd_dma
), priv
->sram
+ off
);
1741 off
= le32_to_cpu(cmd
->rxrdptr
) & 0xffff;
1742 iowrite32(cpu_to_le32(priv
->rxq
[0].rxd_dma
), priv
->sram
+ off
);
1744 off
= le32_to_cpu(cmd
->wcbbase1
) & 0xffff;
1745 iowrite32(cpu_to_le32(priv
->txq
[1].txd_dma
), priv
->sram
+ off
);
1747 off
= le32_to_cpu(cmd
->wcbbase2
) & 0xffff;
1748 iowrite32(cpu_to_le32(priv
->txq
[2].txd_dma
), priv
->sram
+ off
);
1750 off
= le32_to_cpu(cmd
->wcbbase3
) & 0xffff;
1751 iowrite32(cpu_to_le32(priv
->txq
[3].txd_dma
), priv
->sram
+ off
);
1761 struct mwl8k_cmd_set_hw_spec
{
1762 struct mwl8k_cmd_pkt header
;
1764 __u8 host_interface
;
1766 __u8 perm_addr
[ETH_ALEN
];
1771 __le32 rx_queue_ptr
;
1772 __le32 num_tx_queues
;
1773 __le32 tx_queue_ptrs
[MWL8K_TX_QUEUES
];
1775 __le32 num_tx_desc_per_queue
;
1777 } __attribute__((packed
));
1779 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1781 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw
*hw
)
1783 struct mwl8k_priv
*priv
= hw
->priv
;
1784 struct mwl8k_cmd_set_hw_spec
*cmd
;
1788 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1792 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_HW_SPEC
);
1793 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1795 cmd
->ps_cookie
= cpu_to_le32(priv
->cookie_dma
);
1796 cmd
->rx_queue_ptr
= cpu_to_le32(priv
->rxq
[0].rxd_dma
);
1797 cmd
->num_tx_queues
= cpu_to_le32(MWL8K_TX_QUEUES
);
1798 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
1799 cmd
->tx_queue_ptrs
[i
] = cpu_to_le32(priv
->txq
[i
].txd_dma
);
1800 cmd
->flags
= cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT
);
1801 cmd
->num_tx_desc_per_queue
= cpu_to_le32(MWL8K_TX_DESCS
);
1802 cmd
->total_rxd
= cpu_to_le32(MWL8K_RX_DESCS
);
1804 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1811 * CMD_MAC_MULTICAST_ADR.
1813 struct mwl8k_cmd_mac_multicast_adr
{
1814 struct mwl8k_cmd_pkt header
;
1817 __u8 addr
[0][ETH_ALEN
];
1820 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1821 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1822 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1823 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1825 static struct mwl8k_cmd_pkt
*
1826 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw
*hw
, int allmulti
,
1827 int mc_count
, struct dev_addr_list
*mclist
)
1829 struct mwl8k_priv
*priv
= hw
->priv
;
1830 struct mwl8k_cmd_mac_multicast_adr
*cmd
;
1833 if (allmulti
|| mc_count
> priv
->num_mcaddrs
) {
1838 size
= sizeof(*cmd
) + mc_count
* ETH_ALEN
;
1840 cmd
= kzalloc(size
, GFP_ATOMIC
);
1844 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR
);
1845 cmd
->header
.length
= cpu_to_le16(size
);
1846 cmd
->action
= cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED
|
1847 MWL8K_ENABLE_RX_BROADCAST
);
1850 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST
);
1851 } else if (mc_count
) {
1854 cmd
->action
|= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST
);
1855 cmd
->numaddr
= cpu_to_le16(mc_count
);
1856 for (i
= 0; i
< mc_count
&& mclist
; i
++) {
1857 if (mclist
->da_addrlen
!= ETH_ALEN
) {
1861 memcpy(cmd
->addr
[i
], mclist
->da_addr
, ETH_ALEN
);
1862 mclist
= mclist
->next
;
1866 return &cmd
->header
;
1870 * CMD_802_11_GET_STAT.
1872 struct mwl8k_cmd_802_11_get_stat
{
1873 struct mwl8k_cmd_pkt header
;
1875 } __attribute__((packed
));
1877 #define MWL8K_STAT_ACK_FAILURE 9
1878 #define MWL8K_STAT_RTS_FAILURE 12
1879 #define MWL8K_STAT_FCS_ERROR 24
1880 #define MWL8K_STAT_RTS_SUCCESS 11
1882 static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw
*hw
,
1883 struct ieee80211_low_level_stats
*stats
)
1885 struct mwl8k_cmd_802_11_get_stat
*cmd
;
1888 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1892 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_GET_STAT
);
1893 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1895 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1897 stats
->dot11ACKFailureCount
=
1898 le32_to_cpu(cmd
->stats
[MWL8K_STAT_ACK_FAILURE
]);
1899 stats
->dot11RTSFailureCount
=
1900 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_FAILURE
]);
1901 stats
->dot11FCSErrorCount
=
1902 le32_to_cpu(cmd
->stats
[MWL8K_STAT_FCS_ERROR
]);
1903 stats
->dot11RTSSuccessCount
=
1904 le32_to_cpu(cmd
->stats
[MWL8K_STAT_RTS_SUCCESS
]);
1912 * CMD_802_11_RADIO_CONTROL.
1914 struct mwl8k_cmd_802_11_radio_control
{
1915 struct mwl8k_cmd_pkt header
;
1919 } __attribute__((packed
));
1922 mwl8k_cmd_802_11_radio_control(struct ieee80211_hw
*hw
, bool enable
, bool force
)
1924 struct mwl8k_priv
*priv
= hw
->priv
;
1925 struct mwl8k_cmd_802_11_radio_control
*cmd
;
1928 if (enable
== priv
->radio_on
&& !force
)
1931 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1935 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RADIO_CONTROL
);
1936 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1937 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
1938 cmd
->control
= cpu_to_le16(priv
->radio_short_preamble
? 3 : 1);
1939 cmd
->radio_on
= cpu_to_le16(enable
? 0x0001 : 0x0000);
1941 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
1945 priv
->radio_on
= enable
;
1950 static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw
*hw
)
1952 return mwl8k_cmd_802_11_radio_control(hw
, 0, 0);
1955 static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw
*hw
)
1957 return mwl8k_cmd_802_11_radio_control(hw
, 1, 0);
1961 mwl8k_set_radio_preamble(struct ieee80211_hw
*hw
, bool short_preamble
)
1963 struct mwl8k_priv
*priv
;
1965 if (hw
== NULL
|| hw
->priv
== NULL
)
1969 priv
->radio_short_preamble
= short_preamble
;
1971 return mwl8k_cmd_802_11_radio_control(hw
, 1, 1);
1975 * CMD_802_11_RF_TX_POWER.
1977 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1979 struct mwl8k_cmd_802_11_rf_tx_power
{
1980 struct mwl8k_cmd_pkt header
;
1982 __le16 support_level
;
1983 __le16 current_level
;
1985 __le16 power_level_list
[MWL8K_TX_POWER_LEVEL_TOTAL
];
1986 } __attribute__((packed
));
1988 static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw
*hw
, int dBm
)
1990 struct mwl8k_cmd_802_11_rf_tx_power
*cmd
;
1993 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
1997 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_TX_POWER
);
1998 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
1999 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2000 cmd
->support_level
= cpu_to_le16(dBm
);
2002 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2011 struct mwl8k_cmd_rf_antenna
{
2012 struct mwl8k_cmd_pkt header
;
2015 } __attribute__((packed
));
2017 #define MWL8K_RF_ANTENNA_RX 1
2018 #define MWL8K_RF_ANTENNA_TX 2
2021 mwl8k_cmd_rf_antenna(struct ieee80211_hw
*hw
, int antenna
, int mask
)
2023 struct mwl8k_cmd_rf_antenna
*cmd
;
2026 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2030 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RF_ANTENNA
);
2031 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2032 cmd
->antenna
= cpu_to_le16(antenna
);
2033 cmd
->mode
= cpu_to_le16(mask
);
2035 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2044 struct mwl8k_cmd_set_pre_scan
{
2045 struct mwl8k_cmd_pkt header
;
2046 } __attribute__((packed
));
2048 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw
*hw
)
2050 struct mwl8k_cmd_set_pre_scan
*cmd
;
2053 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2057 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN
);
2058 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2060 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2067 * CMD_SET_POST_SCAN.
2069 struct mwl8k_cmd_set_post_scan
{
2070 struct mwl8k_cmd_pkt header
;
2072 __u8 bssid
[ETH_ALEN
];
2073 } __attribute__((packed
));
2076 mwl8k_cmd_set_post_scan(struct ieee80211_hw
*hw
, __u8
*mac
)
2078 struct mwl8k_cmd_set_post_scan
*cmd
;
2081 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2085 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_POST_SCAN
);
2086 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2088 memcpy(cmd
->bssid
, mac
, ETH_ALEN
);
2090 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2097 * CMD_SET_RF_CHANNEL.
2099 struct mwl8k_cmd_set_rf_channel
{
2100 struct mwl8k_cmd_pkt header
;
2102 __u8 current_channel
;
2103 __le32 channel_flags
;
2104 } __attribute__((packed
));
2106 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw
*hw
,
2107 struct ieee80211_channel
*channel
)
2109 struct mwl8k_cmd_set_rf_channel
*cmd
;
2112 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2116 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL
);
2117 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2118 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2119 cmd
->current_channel
= channel
->hw_value
;
2120 if (channel
->band
== IEEE80211_BAND_2GHZ
)
2121 cmd
->channel_flags
= cpu_to_le32(0x00000081);
2123 cmd
->channel_flags
= cpu_to_le32(0x00000000);
2125 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2134 struct mwl8k_cmd_set_slot
{
2135 struct mwl8k_cmd_pkt header
;
2138 } __attribute__((packed
));
2140 static int mwl8k_cmd_set_slot(struct ieee80211_hw
*hw
, bool short_slot_time
)
2142 struct mwl8k_cmd_set_slot
*cmd
;
2145 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2149 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_SLOT
);
2150 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2151 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2152 cmd
->short_slot
= short_slot_time
;
2154 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2163 struct mwl8k_cmd_mimo_config
{
2164 struct mwl8k_cmd_pkt header
;
2166 __u8 rx_antenna_map
;
2167 __u8 tx_antenna_map
;
2168 } __attribute__((packed
));
2170 static int mwl8k_cmd_mimo_config(struct ieee80211_hw
*hw
, __u8 rx
, __u8 tx
)
2172 struct mwl8k_cmd_mimo_config
*cmd
;
2175 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2179 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_MIMO_CONFIG
);
2180 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2181 cmd
->action
= cpu_to_le32((u32
)MWL8K_CMD_SET
);
2182 cmd
->rx_antenna_map
= rx
;
2183 cmd
->tx_antenna_map
= tx
;
2185 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2192 * CMD_ENABLE_SNIFFER.
2194 struct mwl8k_cmd_enable_sniffer
{
2195 struct mwl8k_cmd_pkt header
;
2197 } __attribute__((packed
));
2199 static int mwl8k_enable_sniffer(struct ieee80211_hw
*hw
, bool enable
)
2201 struct mwl8k_cmd_enable_sniffer
*cmd
;
2204 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2208 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER
);
2209 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2210 cmd
->action
= cpu_to_le32(!!enable
);
2212 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2221 struct mwl8k_cmd_set_mac_addr
{
2222 struct mwl8k_cmd_pkt header
;
2226 __u8 mac_addr
[ETH_ALEN
];
2228 __u8 mac_addr
[ETH_ALEN
];
2230 } __attribute__((packed
));
2232 static int mwl8k_set_mac_addr(struct ieee80211_hw
*hw
, u8
*mac
)
2234 struct mwl8k_priv
*priv
= hw
->priv
;
2235 struct mwl8k_cmd_set_mac_addr
*cmd
;
2238 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2242 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR
);
2243 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2245 cmd
->mbss
.mac_type
= 0;
2246 memcpy(cmd
->mbss
.mac_addr
, mac
, ETH_ALEN
);
2248 memcpy(cmd
->mac_addr
, mac
, ETH_ALEN
);
2251 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2259 * CMD_SET_RATEADAPT_MODE.
2261 struct mwl8k_cmd_set_rate_adapt_mode
{
2262 struct mwl8k_cmd_pkt header
;
2265 } __attribute__((packed
));
2267 static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw
*hw
, __u16 mode
)
2269 struct mwl8k_cmd_set_rate_adapt_mode
*cmd
;
2272 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2276 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE
);
2277 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2278 cmd
->action
= cpu_to_le16(MWL8K_CMD_SET
);
2279 cmd
->mode
= cpu_to_le16(mode
);
2281 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2290 struct mwl8k_cmd_set_wmm
{
2291 struct mwl8k_cmd_pkt header
;
2293 } __attribute__((packed
));
2295 static int mwl8k_set_wmm(struct ieee80211_hw
*hw
, bool enable
)
2297 struct mwl8k_priv
*priv
= hw
->priv
;
2298 struct mwl8k_cmd_set_wmm
*cmd
;
2301 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2305 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_WMM_MODE
);
2306 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2307 cmd
->action
= cpu_to_le16(!!enable
);
2309 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2313 priv
->wmm_enabled
= enable
;
2319 * CMD_SET_RTS_THRESHOLD.
2321 struct mwl8k_cmd_rts_threshold
{
2322 struct mwl8k_cmd_pkt header
;
2325 } __attribute__((packed
));
2327 static int mwl8k_rts_threshold(struct ieee80211_hw
*hw
,
2328 u16 action
, u16 threshold
)
2330 struct mwl8k_cmd_rts_threshold
*cmd
;
2333 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2337 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD
);
2338 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2339 cmd
->action
= cpu_to_le16(action
);
2340 cmd
->threshold
= cpu_to_le16(threshold
);
2342 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2349 * CMD_SET_EDCA_PARAMS.
2351 struct mwl8k_cmd_set_edca_params
{
2352 struct mwl8k_cmd_pkt header
;
2354 /* See MWL8K_SET_EDCA_XXX below */
2357 /* TX opportunity in units of 32 us */
2362 /* Log exponent of max contention period: 0...15 */
2365 /* Log exponent of min contention period: 0...15 */
2368 /* Adaptive interframe spacing in units of 32us */
2371 /* TX queue to configure */
2375 /* Log exponent of max contention period: 0...15 */
2378 /* Log exponent of min contention period: 0...15 */
2381 /* Adaptive interframe spacing in units of 32us */
2384 /* TX queue to configure */
2388 } __attribute__((packed
));
2390 #define MWL8K_SET_EDCA_CW 0x01
2391 #define MWL8K_SET_EDCA_TXOP 0x02
2392 #define MWL8K_SET_EDCA_AIFS 0x04
2394 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2395 MWL8K_SET_EDCA_TXOP | \
2396 MWL8K_SET_EDCA_AIFS)
2399 mwl8k_set_edca_params(struct ieee80211_hw
*hw
, __u8 qnum
,
2400 __u16 cw_min
, __u16 cw_max
,
2401 __u8 aifs
, __u16 txop
)
2403 struct mwl8k_priv
*priv
= hw
->priv
;
2404 struct mwl8k_cmd_set_edca_params
*cmd
;
2407 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2412 * Queues 0 (BE) and 1 (BK) are swapped in hardware for
2415 qnum
^= !(qnum
>> 1);
2417 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS
);
2418 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2419 cmd
->action
= cpu_to_le16(MWL8K_SET_EDCA_ALL
);
2420 cmd
->txop
= cpu_to_le16(txop
);
2422 cmd
->ap
.log_cw_max
= cpu_to_le32(ilog2(cw_max
+ 1));
2423 cmd
->ap
.log_cw_min
= cpu_to_le32(ilog2(cw_min
+ 1));
2424 cmd
->ap
.aifs
= aifs
;
2427 cmd
->sta
.log_cw_max
= (u8
)ilog2(cw_max
+ 1);
2428 cmd
->sta
.log_cw_min
= (u8
)ilog2(cw_min
+ 1);
2429 cmd
->sta
.aifs
= aifs
;
2430 cmd
->sta
.txq
= qnum
;
2433 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2440 * CMD_FINALIZE_JOIN.
2443 /* FJ beacon buffer size is compiled into the firmware. */
2444 #define MWL8K_FJ_BEACON_MAXLEN 128
2446 struct mwl8k_cmd_finalize_join
{
2447 struct mwl8k_cmd_pkt header
;
2448 __le32 sleep_interval
; /* Number of beacon periods to sleep */
2449 __u8 beacon_data
[MWL8K_FJ_BEACON_MAXLEN
];
2450 } __attribute__((packed
));
2452 static int mwl8k_finalize_join(struct ieee80211_hw
*hw
, void *frame
,
2453 __u16 framelen
, __u16 dtim
)
2455 struct mwl8k_cmd_finalize_join
*cmd
;
2456 struct ieee80211_mgmt
*payload
= frame
;
2464 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2468 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN
);
2469 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2470 cmd
->sleep_interval
= cpu_to_le32(dtim
? dtim
: 1);
2472 hdrlen
= ieee80211_hdrlen(payload
->frame_control
);
2474 payload_len
= framelen
> hdrlen
? framelen
- hdrlen
: 0;
2476 /* XXX TBD Might just have to abort and return an error */
2477 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2478 printk(KERN_ERR
"%s(): WARNING: Incomplete beacon "
2479 "sent to firmware. Sz=%u MAX=%u\n", __func__
,
2480 payload_len
, MWL8K_FJ_BEACON_MAXLEN
);
2482 if (payload_len
> MWL8K_FJ_BEACON_MAXLEN
)
2483 payload_len
= MWL8K_FJ_BEACON_MAXLEN
;
2485 if (payload
&& payload_len
)
2486 memcpy(cmd
->beacon_data
, &payload
->u
.beacon
, payload_len
);
2488 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2496 struct mwl8k_cmd_update_sta_db
{
2497 struct mwl8k_cmd_pkt header
;
2499 /* See STADB_ACTION_TYPE */
2502 /* Peer MAC address */
2503 __u8 peer_addr
[ETH_ALEN
];
2507 /* Peer info - valid during add/update. */
2508 struct peer_capability_info peer_info
;
2509 } __attribute__((packed
));
2511 static int mwl8k_cmd_update_sta_db(struct ieee80211_hw
*hw
,
2512 struct ieee80211_vif
*vif
, __u32 action
)
2514 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2515 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2516 struct mwl8k_cmd_update_sta_db
*cmd
;
2517 struct peer_capability_info
*peer_info
;
2518 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2522 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2526 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_UPDATE_STADB
);
2527 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2529 cmd
->action
= cpu_to_le32(action
);
2530 peer_info
= &cmd
->peer_info
;
2531 memcpy(cmd
->peer_addr
, mv_vif
->bssid
, ETH_ALEN
);
2534 case MWL8K_STA_DB_ADD_ENTRY
:
2535 case MWL8K_STA_DB_MODIFY_ENTRY
:
2536 /* Build peer_info block */
2537 peer_info
->peer_type
= MWL8K_PEER_TYPE_ACCESSPOINT
;
2538 peer_info
->basic_caps
= cpu_to_le16(info
->assoc_capability
);
2539 peer_info
->interop
= 1;
2540 peer_info
->amsdu_enabled
= 0;
2542 rates
= peer_info
->legacy_rates
;
2543 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2544 rates
[count
] = bitrates
[count
].hw_value
;
2546 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2548 mv_vif
->peer_id
= peer_info
->station_id
;
2552 case MWL8K_STA_DB_DEL_ENTRY
:
2553 case MWL8K_STA_DB_FLUSH
:
2555 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2557 mv_vif
->peer_id
= 0;
2568 #define MWL8K_RATE_INDEX_MAX_ARRAY 14
2570 #define MWL8K_FRAME_PROT_DISABLED 0x00
2571 #define MWL8K_FRAME_PROT_11G 0x07
2572 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2573 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2575 struct mwl8k_cmd_update_set_aid
{
2576 struct mwl8k_cmd_pkt header
;
2579 /* AP's MAC address (BSSID) */
2580 __u8 bssid
[ETH_ALEN
];
2581 __le16 protection_mode
;
2582 __u8 supp_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2583 } __attribute__((packed
));
2585 static int mwl8k_cmd_set_aid(struct ieee80211_hw
*hw
,
2586 struct ieee80211_vif
*vif
)
2588 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2589 struct ieee80211_bss_conf
*info
= &mv_vif
->bss_info
;
2590 struct mwl8k_cmd_update_set_aid
*cmd
;
2591 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2596 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2600 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_AID
);
2601 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2602 cmd
->aid
= cpu_to_le16(info
->aid
);
2604 memcpy(cmd
->bssid
, mv_vif
->bssid
, ETH_ALEN
);
2606 if (info
->use_cts_prot
) {
2607 prot_mode
= MWL8K_FRAME_PROT_11G
;
2609 switch (info
->ht_operation_mode
&
2610 IEEE80211_HT_OP_MODE_PROTECTION
) {
2611 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ
:
2612 prot_mode
= MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY
;
2614 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED
:
2615 prot_mode
= MWL8K_FRAME_PROT_11N_HT_ALL
;
2618 prot_mode
= MWL8K_FRAME_PROT_DISABLED
;
2622 cmd
->protection_mode
= cpu_to_le16(prot_mode
);
2624 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2625 cmd
->supp_rates
[count
] = bitrates
[count
].hw_value
;
2627 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2636 struct mwl8k_cmd_update_rateset
{
2637 struct mwl8k_cmd_pkt header
;
2638 __u8 legacy_rates
[MWL8K_RATE_INDEX_MAX_ARRAY
];
2640 /* Bitmap for supported MCS codes. */
2641 __u8 mcs_set
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2642 __u8 reserved
[MWL8K_IEEE_LEGACY_DATA_RATES
];
2643 } __attribute__((packed
));
2645 static int mwl8k_update_rateset(struct ieee80211_hw
*hw
,
2646 struct ieee80211_vif
*vif
)
2648 struct mwl8k_vif
*mv_vif
= MWL8K_VIF(vif
);
2649 struct mwl8k_cmd_update_rateset
*cmd
;
2650 struct ieee80211_rate
*bitrates
= mv_vif
->legacy_rates
;
2654 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2658 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_SET_RATE
);
2659 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2661 for (count
= 0; count
< mv_vif
->legacy_nrates
; count
++)
2662 cmd
->legacy_rates
[count
] = bitrates
[count
].hw_value
;
2664 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2671 * CMD_USE_FIXED_RATE.
2673 #define MWL8K_RATE_TABLE_SIZE 8
2674 #define MWL8K_UCAST_RATE 0
2675 #define MWL8K_USE_AUTO_RATE 0x0002
2677 struct mwl8k_rate_entry
{
2678 /* Set to 1 if HT rate, 0 if legacy. */
2681 /* Set to 1 to use retry_count field. */
2682 __le32 enable_retry
;
2684 /* Specified legacy rate or MCS. */
2687 /* Number of allowed retries. */
2689 } __attribute__((packed
));
2691 struct mwl8k_rate_table
{
2692 /* 1 to allow specified rate and below */
2693 __le32 allow_rate_drop
;
2695 struct mwl8k_rate_entry rate_entry
[MWL8K_RATE_TABLE_SIZE
];
2696 } __attribute__((packed
));
2698 struct mwl8k_cmd_use_fixed_rate
{
2699 struct mwl8k_cmd_pkt header
;
2701 struct mwl8k_rate_table rate_table
;
2703 /* Unicast, Broadcast or Multicast */
2707 } __attribute__((packed
));
2709 static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw
*hw
,
2710 u32 action
, u32 rate_type
, struct mwl8k_rate_table
*rate_table
)
2712 struct mwl8k_cmd_use_fixed_rate
*cmd
;
2716 cmd
= kzalloc(sizeof(*cmd
), GFP_KERNEL
);
2720 cmd
->header
.code
= cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE
);
2721 cmd
->header
.length
= cpu_to_le16(sizeof(*cmd
));
2723 cmd
->action
= cpu_to_le32(action
);
2724 cmd
->rate_type
= cpu_to_le32(rate_type
);
2726 if (rate_table
!= NULL
) {
2728 * Copy over each field manually so that endian
2729 * conversion can be done.
2731 cmd
->rate_table
.allow_rate_drop
=
2732 cpu_to_le32(rate_table
->allow_rate_drop
);
2733 cmd
->rate_table
.num_rates
=
2734 cpu_to_le32(rate_table
->num_rates
);
2736 for (count
= 0; count
< rate_table
->num_rates
; count
++) {
2737 struct mwl8k_rate_entry
*dst
=
2738 &cmd
->rate_table
.rate_entry
[count
];
2739 struct mwl8k_rate_entry
*src
=
2740 &rate_table
->rate_entry
[count
];
2742 dst
->is_ht_rate
= cpu_to_le32(src
->is_ht_rate
);
2743 dst
->enable_retry
= cpu_to_le32(src
->enable_retry
);
2744 dst
->rate
= cpu_to_le32(src
->rate
);
2745 dst
->retry_count
= cpu_to_le32(src
->retry_count
);
2749 rc
= mwl8k_post_cmd(hw
, &cmd
->header
);
2757 * Interrupt handling.
2759 static irqreturn_t
mwl8k_interrupt(int irq
, void *dev_id
)
2761 struct ieee80211_hw
*hw
= dev_id
;
2762 struct mwl8k_priv
*priv
= hw
->priv
;
2765 status
= ioread32(priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2766 iowrite32(~status
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
2771 if (status
& MWL8K_A2H_INT_TX_DONE
)
2772 tasklet_schedule(&priv
->tx_reclaim_task
);
2774 if (status
& MWL8K_A2H_INT_RX_READY
) {
2775 while (rxq_process(hw
, 0, 1))
2776 rxq_refill(hw
, 0, 1);
2779 if (status
& MWL8K_A2H_INT_OPC_DONE
) {
2780 if (priv
->hostcmd_wait
!= NULL
)
2781 complete(priv
->hostcmd_wait
);
2784 if (status
& MWL8K_A2H_INT_QUEUE_EMPTY
) {
2785 if (!mutex_is_locked(&priv
->fw_mutex
) &&
2786 priv
->radio_on
&& priv
->pending_tx_pkts
)
2787 mwl8k_tx_start(priv
);
2795 * Core driver operations.
2797 static int mwl8k_tx(struct ieee80211_hw
*hw
, struct sk_buff
*skb
)
2799 struct mwl8k_priv
*priv
= hw
->priv
;
2800 int index
= skb_get_queue_mapping(skb
);
2803 if (priv
->current_channel
== NULL
) {
2804 printk(KERN_DEBUG
"%s: dropped TX frame since radio "
2805 "disabled\n", wiphy_name(hw
->wiphy
));
2807 return NETDEV_TX_OK
;
2810 rc
= mwl8k_txq_xmit(hw
, index
, skb
);
2815 static int mwl8k_start(struct ieee80211_hw
*hw
)
2817 struct mwl8k_priv
*priv
= hw
->priv
;
2820 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
2821 IRQF_SHARED
, MWL8K_NAME
, hw
);
2823 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
2824 wiphy_name(hw
->wiphy
));
2828 /* Enable tx reclaim tasklet */
2829 tasklet_enable(&priv
->tx_reclaim_task
);
2831 /* Enable interrupts */
2832 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2834 rc
= mwl8k_fw_lock(hw
);
2836 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2840 rc
= mwl8k_enable_sniffer(hw
, 0);
2843 rc
= mwl8k_cmd_set_pre_scan(hw
);
2846 rc
= mwl8k_cmd_set_post_scan(hw
,
2847 "\x00\x00\x00\x00\x00\x00");
2851 rc
= mwl8k_cmd_setrateadaptmode(hw
, 0);
2854 rc
= mwl8k_set_wmm(hw
, 0);
2856 mwl8k_fw_unlock(hw
);
2860 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2861 free_irq(priv
->pdev
->irq
, hw
);
2862 tasklet_disable(&priv
->tx_reclaim_task
);
2868 static void mwl8k_stop(struct ieee80211_hw
*hw
)
2870 struct mwl8k_priv
*priv
= hw
->priv
;
2873 mwl8k_cmd_802_11_radio_disable(hw
);
2875 ieee80211_stop_queues(hw
);
2877 /* Disable interrupts */
2878 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
2879 free_irq(priv
->pdev
->irq
, hw
);
2881 /* Stop finalize join worker */
2882 cancel_work_sync(&priv
->finalize_join_worker
);
2883 if (priv
->beacon_skb
!= NULL
)
2884 dev_kfree_skb(priv
->beacon_skb
);
2886 /* Stop tx reclaim tasklet */
2887 tasklet_disable(&priv
->tx_reclaim_task
);
2889 /* Return all skbs to mac80211 */
2890 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
2891 mwl8k_txq_reclaim(hw
, i
, 1);
2894 static int mwl8k_add_interface(struct ieee80211_hw
*hw
,
2895 struct ieee80211_if_init_conf
*conf
)
2897 struct mwl8k_priv
*priv
= hw
->priv
;
2898 struct mwl8k_vif
*mwl8k_vif
;
2901 * We only support one active interface at a time.
2903 if (priv
->vif
!= NULL
)
2907 * We only support managed interfaces for now.
2909 if (conf
->type
!= NL80211_IFTYPE_STATION
)
2913 * Reject interface creation if sniffer mode is active, as
2914 * STA operation is mutually exclusive with hardware sniffer
2917 if (priv
->sniffer_enabled
) {
2918 printk(KERN_INFO
"%s: unable to create STA "
2919 "interface due to sniffer mode being enabled\n",
2920 wiphy_name(hw
->wiphy
));
2924 /* Clean out driver private area */
2925 mwl8k_vif
= MWL8K_VIF(conf
->vif
);
2926 memset(mwl8k_vif
, 0, sizeof(*mwl8k_vif
));
2928 /* Set and save the mac address */
2929 mwl8k_set_mac_addr(hw
, conf
->mac_addr
);
2930 memcpy(mwl8k_vif
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
2932 /* Back pointer to parent config block */
2933 mwl8k_vif
->priv
= priv
;
2935 /* Setup initial PHY parameters */
2936 memcpy(mwl8k_vif
->legacy_rates
,
2937 priv
->rates
, sizeof(mwl8k_vif
->legacy_rates
));
2938 mwl8k_vif
->legacy_nrates
= ARRAY_SIZE(priv
->rates
);
2940 /* Set Initial sequence number to zero */
2941 mwl8k_vif
->seqno
= 0;
2943 priv
->vif
= conf
->vif
;
2944 priv
->current_channel
= NULL
;
2949 static void mwl8k_remove_interface(struct ieee80211_hw
*hw
,
2950 struct ieee80211_if_init_conf
*conf
)
2952 struct mwl8k_priv
*priv
= hw
->priv
;
2954 if (priv
->vif
== NULL
)
2957 mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
2962 static int mwl8k_config(struct ieee80211_hw
*hw
, u32 changed
)
2964 struct ieee80211_conf
*conf
= &hw
->conf
;
2965 struct mwl8k_priv
*priv
= hw
->priv
;
2968 if (conf
->flags
& IEEE80211_CONF_IDLE
) {
2969 mwl8k_cmd_802_11_radio_disable(hw
);
2970 priv
->current_channel
= NULL
;
2974 rc
= mwl8k_fw_lock(hw
);
2978 rc
= mwl8k_cmd_802_11_radio_enable(hw
);
2982 rc
= mwl8k_cmd_set_rf_channel(hw
, conf
->channel
);
2986 priv
->current_channel
= conf
->channel
;
2988 if (conf
->power_level
> 18)
2989 conf
->power_level
= 18;
2990 rc
= mwl8k_cmd_802_11_rf_tx_power(hw
, conf
->power_level
);
2995 rc
= mwl8k_cmd_rf_antenna(hw
, MWL8K_RF_ANTENNA_RX
, 0x7);
2997 rc
= mwl8k_cmd_rf_antenna(hw
, MWL8K_RF_ANTENNA_TX
, 0x7);
2999 rc
= mwl8k_cmd_mimo_config(hw
, 0x7, 0x7);
3003 mwl8k_fw_unlock(hw
);
3008 static void mwl8k_bss_info_changed(struct ieee80211_hw
*hw
,
3009 struct ieee80211_vif
*vif
,
3010 struct ieee80211_bss_conf
*info
,
3013 struct mwl8k_priv
*priv
= hw
->priv
;
3014 struct mwl8k_vif
*mwl8k_vif
= MWL8K_VIF(vif
);
3017 if (changed
& BSS_CHANGED_BSSID
)
3018 memcpy(mwl8k_vif
->bssid
, info
->bssid
, ETH_ALEN
);
3020 if ((changed
& BSS_CHANGED_ASSOC
) == 0)
3023 priv
->capture_beacon
= false;
3025 rc
= mwl8k_fw_lock(hw
);
3030 memcpy(&mwl8k_vif
->bss_info
, info
,
3031 sizeof(struct ieee80211_bss_conf
));
3034 rc
= mwl8k_update_rateset(hw
, vif
);
3038 /* Turn on rate adaptation */
3039 rc
= mwl8k_cmd_use_fixed_rate(hw
, MWL8K_USE_AUTO_RATE
,
3040 MWL8K_UCAST_RATE
, NULL
);
3044 /* Set radio preamble */
3045 rc
= mwl8k_set_radio_preamble(hw
, info
->use_short_preamble
);
3050 rc
= mwl8k_cmd_set_slot(hw
, info
->use_short_slot
);
3054 /* Update peer rate info */
3055 rc
= mwl8k_cmd_update_sta_db(hw
, vif
,
3056 MWL8K_STA_DB_MODIFY_ENTRY
);
3061 rc
= mwl8k_cmd_set_aid(hw
, vif
);
3066 * Finalize the join. Tell rx handler to process
3067 * next beacon from our BSSID.
3069 memcpy(priv
->capture_bssid
, mwl8k_vif
->bssid
, ETH_ALEN
);
3070 priv
->capture_beacon
= true;
3072 rc
= mwl8k_cmd_update_sta_db(hw
, vif
, MWL8K_STA_DB_DEL_ENTRY
);
3073 memset(&mwl8k_vif
->bss_info
, 0,
3074 sizeof(struct ieee80211_bss_conf
));
3075 memset(mwl8k_vif
->bssid
, 0, ETH_ALEN
);
3079 mwl8k_fw_unlock(hw
);
3082 static u64
mwl8k_prepare_multicast(struct ieee80211_hw
*hw
,
3083 int mc_count
, struct dev_addr_list
*mclist
)
3085 struct mwl8k_cmd_pkt
*cmd
;
3088 * Synthesize and return a command packet that programs the
3089 * hardware multicast address filter. At this point we don't
3090 * know whether FIF_ALLMULTI is being requested, but if it is,
3091 * we'll end up throwing this packet away and creating a new
3092 * one in mwl8k_configure_filter().
3094 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 0, mc_count
, mclist
);
3096 return (unsigned long)cmd
;
3100 mwl8k_configure_filter_sniffer(struct ieee80211_hw
*hw
,
3101 unsigned int changed_flags
,
3102 unsigned int *total_flags
)
3104 struct mwl8k_priv
*priv
= hw
->priv
;
3107 * Hardware sniffer mode is mutually exclusive with STA
3108 * operation, so refuse to enable sniffer mode if a STA
3109 * interface is active.
3111 if (priv
->vif
!= NULL
) {
3112 if (net_ratelimit())
3113 printk(KERN_INFO
"%s: not enabling sniffer "
3114 "mode because STA interface is active\n",
3115 wiphy_name(hw
->wiphy
));
3119 if (!priv
->sniffer_enabled
) {
3120 if (mwl8k_enable_sniffer(hw
, 1))
3122 priv
->sniffer_enabled
= true;
3125 *total_flags
&= FIF_PROMISC_IN_BSS
| FIF_ALLMULTI
|
3126 FIF_BCN_PRBRESP_PROMISC
| FIF_CONTROL
|
3132 static void mwl8k_configure_filter(struct ieee80211_hw
*hw
,
3133 unsigned int changed_flags
,
3134 unsigned int *total_flags
,
3137 struct mwl8k_priv
*priv
= hw
->priv
;
3138 struct mwl8k_cmd_pkt
*cmd
= (void *)(unsigned long)multicast
;
3141 * AP firmware doesn't allow fine-grained control over
3142 * the receive filter.
3145 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
3151 * Enable hardware sniffer mode if FIF_CONTROL or
3152 * FIF_OTHER_BSS is requested.
3154 if (*total_flags
& (FIF_CONTROL
| FIF_OTHER_BSS
) &&
3155 mwl8k_configure_filter_sniffer(hw
, changed_flags
, total_flags
)) {
3160 /* Clear unsupported feature flags */
3161 *total_flags
&= FIF_ALLMULTI
| FIF_BCN_PRBRESP_PROMISC
;
3163 if (mwl8k_fw_lock(hw
))
3166 if (priv
->sniffer_enabled
) {
3167 mwl8k_enable_sniffer(hw
, 0);
3168 priv
->sniffer_enabled
= false;
3171 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
3172 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
) {
3174 * Disable the BSS filter.
3176 mwl8k_cmd_set_pre_scan(hw
);
3181 * Enable the BSS filter.
3183 * If there is an active STA interface, use that
3184 * interface's BSSID, otherwise use a dummy one
3185 * (where the OUI part needs to be nonzero for
3186 * the BSSID to be accepted by POST_SCAN).
3188 bssid
= "\x01\x00\x00\x00\x00\x00";
3189 if (priv
->vif
!= NULL
)
3190 bssid
= MWL8K_VIF(priv
->vif
)->bssid
;
3192 mwl8k_cmd_set_post_scan(hw
, bssid
);
3197 * If FIF_ALLMULTI is being requested, throw away the command
3198 * packet that ->prepare_multicast() built and replace it with
3199 * a command packet that enables reception of all multicast
3202 if (*total_flags
& FIF_ALLMULTI
) {
3204 cmd
= __mwl8k_cmd_mac_multicast_adr(hw
, 1, 0, NULL
);
3208 mwl8k_post_cmd(hw
, cmd
);
3212 mwl8k_fw_unlock(hw
);
3215 static int mwl8k_set_rts_threshold(struct ieee80211_hw
*hw
, u32 value
)
3217 return mwl8k_rts_threshold(hw
, MWL8K_CMD_SET
, value
);
3220 static int mwl8k_conf_tx(struct ieee80211_hw
*hw
, u16 queue
,
3221 const struct ieee80211_tx_queue_params
*params
)
3223 struct mwl8k_priv
*priv
= hw
->priv
;
3226 rc
= mwl8k_fw_lock(hw
);
3228 if (!priv
->wmm_enabled
)
3229 rc
= mwl8k_set_wmm(hw
, 1);
3232 rc
= mwl8k_set_edca_params(hw
, queue
,
3238 mwl8k_fw_unlock(hw
);
3244 static int mwl8k_get_tx_stats(struct ieee80211_hw
*hw
,
3245 struct ieee80211_tx_queue_stats
*stats
)
3247 struct mwl8k_priv
*priv
= hw
->priv
;
3248 struct mwl8k_tx_queue
*txq
;
3251 spin_lock_bh(&priv
->tx_lock
);
3252 for (index
= 0; index
< MWL8K_TX_QUEUES
; index
++) {
3253 txq
= priv
->txq
+ index
;
3254 memcpy(&stats
[index
], &txq
->stats
,
3255 sizeof(struct ieee80211_tx_queue_stats
));
3257 spin_unlock_bh(&priv
->tx_lock
);
3262 static int mwl8k_get_stats(struct ieee80211_hw
*hw
,
3263 struct ieee80211_low_level_stats
*stats
)
3265 return mwl8k_cmd_802_11_get_stat(hw
, stats
);
3268 static const struct ieee80211_ops mwl8k_ops
= {
3270 .start
= mwl8k_start
,
3272 .add_interface
= mwl8k_add_interface
,
3273 .remove_interface
= mwl8k_remove_interface
,
3274 .config
= mwl8k_config
,
3275 .bss_info_changed
= mwl8k_bss_info_changed
,
3276 .prepare_multicast
= mwl8k_prepare_multicast
,
3277 .configure_filter
= mwl8k_configure_filter
,
3278 .set_rts_threshold
= mwl8k_set_rts_threshold
,
3279 .conf_tx
= mwl8k_conf_tx
,
3280 .get_tx_stats
= mwl8k_get_tx_stats
,
3281 .get_stats
= mwl8k_get_stats
,
3284 static void mwl8k_tx_reclaim_handler(unsigned long data
)
3287 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*) data
;
3288 struct mwl8k_priv
*priv
= hw
->priv
;
3290 spin_lock_bh(&priv
->tx_lock
);
3291 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3292 mwl8k_txq_reclaim(hw
, i
, 0);
3294 if (priv
->tx_wait
!= NULL
&& !priv
->pending_tx_pkts
) {
3295 complete(priv
->tx_wait
);
3296 priv
->tx_wait
= NULL
;
3298 spin_unlock_bh(&priv
->tx_lock
);
3301 static void mwl8k_finalize_join_worker(struct work_struct
*work
)
3303 struct mwl8k_priv
*priv
=
3304 container_of(work
, struct mwl8k_priv
, finalize_join_worker
);
3305 struct sk_buff
*skb
= priv
->beacon_skb
;
3306 u8 dtim
= MWL8K_VIF(priv
->vif
)->bss_info
.dtim_period
;
3308 mwl8k_finalize_join(priv
->hw
, skb
->data
, skb
->len
, dtim
);
3311 priv
->beacon_skb
= NULL
;
3319 static struct mwl8k_device_info mwl8k_info_tbl
[] __devinitdata
= {
3321 .part_name
= "88w8687",
3322 .helper_image
= "mwl8k/helper_8687.fw",
3323 .fw_image
= "mwl8k/fmimage_8687.fw",
3324 .rxd_ops
= &rxd_8687_ops
,
3325 .modes
= BIT(NL80211_IFTYPE_STATION
),
3328 .part_name
= "88w8366",
3329 .helper_image
= "mwl8k/helper_8366.fw",
3330 .fw_image
= "mwl8k/fmimage_8366.fw",
3331 .rxd_ops
= &rxd_8366_ops
,
3336 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table
) = {
3337 { PCI_VDEVICE(MARVELL
, 0x2a2b), .driver_data
= MWL8687
, },
3338 { PCI_VDEVICE(MARVELL
, 0x2a30), .driver_data
= MWL8687
, },
3339 { PCI_VDEVICE(MARVELL
, 0x2a40), .driver_data
= MWL8366
, },
3342 MODULE_DEVICE_TABLE(pci
, mwl8k_pci_id_table
);
3344 static int __devinit
mwl8k_probe(struct pci_dev
*pdev
,
3345 const struct pci_device_id
*id
)
3347 static int printed_version
= 0;
3348 struct ieee80211_hw
*hw
;
3349 struct mwl8k_priv
*priv
;
3353 if (!printed_version
) {
3354 printk(KERN_INFO
"%s version %s\n", MWL8K_DESC
, MWL8K_VERSION
);
3355 printed_version
= 1;
3358 rc
= pci_enable_device(pdev
);
3360 printk(KERN_ERR
"%s: Cannot enable new PCI device\n",
3365 rc
= pci_request_regions(pdev
, MWL8K_NAME
);
3367 printk(KERN_ERR
"%s: Cannot obtain PCI resources\n",
3372 pci_set_master(pdev
);
3374 hw
= ieee80211_alloc_hw(sizeof(*priv
), &mwl8k_ops
);
3376 printk(KERN_ERR
"%s: ieee80211 alloc failed\n", MWL8K_NAME
);
3384 priv
->device_info
= &mwl8k_info_tbl
[id
->driver_data
];
3385 priv
->rxd_ops
= priv
->device_info
->rxd_ops
;
3386 priv
->sniffer_enabled
= false;
3387 priv
->wmm_enabled
= false;
3388 priv
->pending_tx_pkts
= 0;
3390 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
3391 pci_set_drvdata(pdev
, hw
);
3393 priv
->sram
= pci_iomap(pdev
, 0, 0x10000);
3394 if (priv
->sram
== NULL
) {
3395 printk(KERN_ERR
"%s: Cannot map device SRAM\n",
3396 wiphy_name(hw
->wiphy
));
3401 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3402 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3404 priv
->regs
= pci_iomap(pdev
, 1, 0x10000);
3405 if (priv
->regs
== NULL
) {
3406 priv
->regs
= pci_iomap(pdev
, 2, 0x10000);
3407 if (priv
->regs
== NULL
) {
3408 printk(KERN_ERR
"%s: Cannot map device registers\n",
3409 wiphy_name(hw
->wiphy
));
3414 memcpy(priv
->channels
, mwl8k_channels
, sizeof(mwl8k_channels
));
3415 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
3416 priv
->band
.channels
= priv
->channels
;
3417 priv
->band
.n_channels
= ARRAY_SIZE(mwl8k_channels
);
3418 priv
->band
.bitrates
= priv
->rates
;
3419 priv
->band
.n_bitrates
= ARRAY_SIZE(mwl8k_rates
);
3420 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
3422 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(mwl8k_rates
));
3423 memcpy(priv
->rates
, mwl8k_rates
, sizeof(mwl8k_rates
));
3426 * Extra headroom is the size of the required DMA header
3427 * minus the size of the smallest 802.11 frame (CTS frame).
3429 hw
->extra_tx_headroom
=
3430 sizeof(struct mwl8k_dma_data
) - sizeof(struct ieee80211_cts
);
3432 hw
->channel_change_time
= 10;
3434 hw
->queues
= MWL8K_TX_QUEUES
;
3436 hw
->wiphy
->interface_modes
= priv
->device_info
->modes
;
3438 /* Set rssi and noise values to dBm */
3439 hw
->flags
|= IEEE80211_HW_SIGNAL_DBM
| IEEE80211_HW_NOISE_DBM
;
3440 hw
->vif_data_size
= sizeof(struct mwl8k_vif
);
3443 /* Set default radio state and preamble */
3445 priv
->radio_short_preamble
= 0;
3447 /* Finalize join worker */
3448 INIT_WORK(&priv
->finalize_join_worker
, mwl8k_finalize_join_worker
);
3450 /* TX reclaim tasklet */
3451 tasklet_init(&priv
->tx_reclaim_task
,
3452 mwl8k_tx_reclaim_handler
, (unsigned long)hw
);
3453 tasklet_disable(&priv
->tx_reclaim_task
);
3455 /* Power management cookie */
3456 priv
->cookie
= pci_alloc_consistent(priv
->pdev
, 4, &priv
->cookie_dma
);
3457 if (priv
->cookie
== NULL
)
3460 rc
= mwl8k_rxq_init(hw
, 0);
3463 rxq_refill(hw
, 0, INT_MAX
);
3465 mutex_init(&priv
->fw_mutex
);
3466 priv
->fw_mutex_owner
= NULL
;
3467 priv
->fw_mutex_depth
= 0;
3468 priv
->hostcmd_wait
= NULL
;
3470 spin_lock_init(&priv
->tx_lock
);
3472 priv
->tx_wait
= NULL
;
3474 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++) {
3475 rc
= mwl8k_txq_init(hw
, i
);
3477 goto err_free_queues
;
3480 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS
);
3481 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3482 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL
);
3483 iowrite32(0xffffffff, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK
);
3485 rc
= request_irq(priv
->pdev
->irq
, &mwl8k_interrupt
,
3486 IRQF_SHARED
, MWL8K_NAME
, hw
);
3488 printk(KERN_ERR
"%s: failed to register IRQ handler\n",
3489 wiphy_name(hw
->wiphy
));
3490 goto err_free_queues
;
3493 /* Reset firmware and hardware */
3494 mwl8k_hw_reset(priv
);
3496 /* Ask userland hotplug daemon for the device firmware */
3497 rc
= mwl8k_request_firmware(priv
);
3499 printk(KERN_ERR
"%s: Firmware files not found\n",
3500 wiphy_name(hw
->wiphy
));
3504 /* Load firmware into hardware */
3505 rc
= mwl8k_load_firmware(hw
);
3507 printk(KERN_ERR
"%s: Cannot start firmware\n",
3508 wiphy_name(hw
->wiphy
));
3509 goto err_stop_firmware
;
3512 /* Reclaim memory once firmware is successfully loaded */
3513 mwl8k_release_firmware(priv
);
3516 * Temporarily enable interrupts. Initial firmware host
3517 * commands use interrupts and avoids polling. Disable
3518 * interrupts when done.
3520 iowrite32(MWL8K_A2H_EVENTS
, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3522 /* Get config data, mac addrs etc */
3524 rc
= mwl8k_cmd_get_hw_spec_ap(hw
);
3526 rc
= mwl8k_cmd_set_hw_spec(hw
);
3528 rc
= mwl8k_cmd_get_hw_spec_sta(hw
);
3531 printk(KERN_ERR
"%s: Cannot initialise firmware\n",
3532 wiphy_name(hw
->wiphy
));
3533 goto err_stop_firmware
;
3536 /* Turn radio off */
3537 rc
= mwl8k_cmd_802_11_radio_disable(hw
);
3539 printk(KERN_ERR
"%s: Cannot disable\n", wiphy_name(hw
->wiphy
));
3540 goto err_stop_firmware
;
3543 /* Clear MAC address */
3544 rc
= mwl8k_set_mac_addr(hw
, "\x00\x00\x00\x00\x00\x00");
3546 printk(KERN_ERR
"%s: Cannot clear MAC address\n",
3547 wiphy_name(hw
->wiphy
));
3548 goto err_stop_firmware
;
3551 /* Disable interrupts */
3552 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3553 free_irq(priv
->pdev
->irq
, hw
);
3555 rc
= ieee80211_register_hw(hw
);
3557 printk(KERN_ERR
"%s: Cannot register device\n",
3558 wiphy_name(hw
->wiphy
));
3559 goto err_stop_firmware
;
3562 printk(KERN_INFO
"%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3563 wiphy_name(hw
->wiphy
), priv
->device_info
->part_name
,
3564 priv
->hw_rev
, hw
->wiphy
->perm_addr
,
3565 priv
->ap_fw
? "AP" : "STA",
3566 (priv
->fw_rev
>> 24) & 0xff, (priv
->fw_rev
>> 16) & 0xff,
3567 (priv
->fw_rev
>> 8) & 0xff, priv
->fw_rev
& 0xff);
3572 mwl8k_hw_reset(priv
);
3573 mwl8k_release_firmware(priv
);
3576 iowrite32(0, priv
->regs
+ MWL8K_HIU_A2H_INTERRUPT_MASK
);
3577 free_irq(priv
->pdev
->irq
, hw
);
3580 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3581 mwl8k_txq_deinit(hw
, i
);
3582 mwl8k_rxq_deinit(hw
, 0);
3585 if (priv
->cookie
!= NULL
)
3586 pci_free_consistent(priv
->pdev
, 4,
3587 priv
->cookie
, priv
->cookie_dma
);
3589 if (priv
->regs
!= NULL
)
3590 pci_iounmap(pdev
, priv
->regs
);
3592 if (priv
->sram
!= NULL
)
3593 pci_iounmap(pdev
, priv
->sram
);
3595 pci_set_drvdata(pdev
, NULL
);
3596 ieee80211_free_hw(hw
);
3599 pci_release_regions(pdev
);
3600 pci_disable_device(pdev
);
3605 static void __devexit
mwl8k_shutdown(struct pci_dev
*pdev
)
3607 printk(KERN_ERR
"===>%s(%u)\n", __func__
, __LINE__
);
3610 static void __devexit
mwl8k_remove(struct pci_dev
*pdev
)
3612 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
3613 struct mwl8k_priv
*priv
;
3620 ieee80211_stop_queues(hw
);
3622 ieee80211_unregister_hw(hw
);
3624 /* Remove tx reclaim tasklet */
3625 tasklet_kill(&priv
->tx_reclaim_task
);
3628 mwl8k_hw_reset(priv
);
3630 /* Return all skbs to mac80211 */
3631 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3632 mwl8k_txq_reclaim(hw
, i
, 1);
3634 for (i
= 0; i
< MWL8K_TX_QUEUES
; i
++)
3635 mwl8k_txq_deinit(hw
, i
);
3637 mwl8k_rxq_deinit(hw
, 0);
3639 pci_free_consistent(priv
->pdev
, 4, priv
->cookie
, priv
->cookie_dma
);
3641 pci_iounmap(pdev
, priv
->regs
);
3642 pci_iounmap(pdev
, priv
->sram
);
3643 pci_set_drvdata(pdev
, NULL
);
3644 ieee80211_free_hw(hw
);
3645 pci_release_regions(pdev
);
3646 pci_disable_device(pdev
);
3649 static struct pci_driver mwl8k_driver
= {
3651 .id_table
= mwl8k_pci_id_table
,
3652 .probe
= mwl8k_probe
,
3653 .remove
= __devexit_p(mwl8k_remove
),
3654 .shutdown
= __devexit_p(mwl8k_shutdown
),
3657 static int __init
mwl8k_init(void)
3659 return pci_register_driver(&mwl8k_driver
);
3662 static void __exit
mwl8k_exit(void)
3664 pci_unregister_driver(&mwl8k_driver
);
3667 module_init(mwl8k_init
);
3668 module_exit(mwl8k_exit
);
3670 MODULE_DESCRIPTION(MWL8K_DESC
);
3671 MODULE_VERSION(MWL8K_VERSION
);
3672 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
3673 MODULE_LICENSE("GPL");