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mwl8k: convert the priv->vif pointer to a list of vifs
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
26
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
30
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
51
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
68
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
79
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
82
83 struct rxd_ops {
84 int rxd_size;
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
88 __le16 *qos);
89 };
90
91 struct mwl8k_device_info {
92 char *part_name;
93 char *helper_image;
94 char *fw_image;
95 struct rxd_ops *ap_rxd_ops;
96 };
97
98 struct mwl8k_rx_queue {
99 int rxd_count;
100
101 /* hw receives here */
102 int head;
103
104 /* refill descs here */
105 int tail;
106
107 void *rxd;
108 dma_addr_t rxd_dma;
109 struct {
110 struct sk_buff *skb;
111 DECLARE_PCI_UNMAP_ADDR(dma)
112 } *buf;
113 };
114
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
117 int head;
118
119 /* sw appends here */
120 int tail;
121
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
124 dma_addr_t txd_dma;
125 struct sk_buff **skb;
126 };
127
128 struct mwl8k_priv {
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
131
132 struct mwl8k_device_info *device_info;
133
134 void __iomem *sram;
135 void __iomem *regs;
136
137 /* firmware */
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
140
141 /* hardware/firmware parameters */
142 bool ap_fw;
143 struct rxd_ops *rxd_ops;
144 struct ieee80211_supported_band band_24;
145 struct ieee80211_channel channels_24[14];
146 struct ieee80211_rate rates_24[14];
147 struct ieee80211_supported_band band_50;
148 struct ieee80211_channel channels_50[4];
149 struct ieee80211_rate rates_50[9];
150
151 /* firmware access */
152 struct mutex fw_mutex;
153 struct task_struct *fw_mutex_owner;
154 int fw_mutex_depth;
155 struct completion *hostcmd_wait;
156
157 /* lock held over TX and TX reap */
158 spinlock_t tx_lock;
159
160 /* TX quiesce completion, protected by fw_mutex and tx_lock */
161 struct completion *tx_wait;
162
163 /* List of interfaces. */
164 struct list_head vif_list;
165
166 /* power management status cookie from firmware */
167 u32 *cookie;
168 dma_addr_t cookie_dma;
169
170 u16 num_mcaddrs;
171 u8 hw_rev;
172 u32 fw_rev;
173
174 /*
175 * Running count of TX packets in flight, to avoid
176 * iterating over the transmit rings each time.
177 */
178 int pending_tx_pkts;
179
180 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
181 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
182
183 bool radio_on;
184 bool radio_short_preamble;
185 bool sniffer_enabled;
186 bool wmm_enabled;
187
188 struct work_struct sta_notify_worker;
189 spinlock_t sta_notify_list_lock;
190 struct list_head sta_notify_list;
191
192 /* XXX need to convert this to handle multiple interfaces */
193 bool capture_beacon;
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
196
197 /*
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
201 * is checked.
202 */
203 struct work_struct finalize_join_worker;
204
205 /* Tasklet to perform TX reclaim. */
206 struct tasklet_struct poll_tx_task;
207
208 /* Tasklet to perform RX. */
209 struct tasklet_struct poll_rx_task;
210 };
211
212 /* Per interface specific private data */
213 struct mwl8k_vif {
214 struct list_head list;
215 struct ieee80211_vif *vif;
216
217 /* Non AMPDU sequence number assigned by driver. */
218 u16 seqno;
219 };
220 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
221
222 struct mwl8k_sta {
223 /* Index into station database. Returned by UPDATE_STADB. */
224 u8 peer_id;
225 };
226 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
227
228 static const struct ieee80211_channel mwl8k_channels_24[] = {
229 { .center_freq = 2412, .hw_value = 1, },
230 { .center_freq = 2417, .hw_value = 2, },
231 { .center_freq = 2422, .hw_value = 3, },
232 { .center_freq = 2427, .hw_value = 4, },
233 { .center_freq = 2432, .hw_value = 5, },
234 { .center_freq = 2437, .hw_value = 6, },
235 { .center_freq = 2442, .hw_value = 7, },
236 { .center_freq = 2447, .hw_value = 8, },
237 { .center_freq = 2452, .hw_value = 9, },
238 { .center_freq = 2457, .hw_value = 10, },
239 { .center_freq = 2462, .hw_value = 11, },
240 { .center_freq = 2467, .hw_value = 12, },
241 { .center_freq = 2472, .hw_value = 13, },
242 { .center_freq = 2484, .hw_value = 14, },
243 };
244
245 static const struct ieee80211_rate mwl8k_rates_24[] = {
246 { .bitrate = 10, .hw_value = 2, },
247 { .bitrate = 20, .hw_value = 4, },
248 { .bitrate = 55, .hw_value = 11, },
249 { .bitrate = 110, .hw_value = 22, },
250 { .bitrate = 220, .hw_value = 44, },
251 { .bitrate = 60, .hw_value = 12, },
252 { .bitrate = 90, .hw_value = 18, },
253 { .bitrate = 120, .hw_value = 24, },
254 { .bitrate = 180, .hw_value = 36, },
255 { .bitrate = 240, .hw_value = 48, },
256 { .bitrate = 360, .hw_value = 72, },
257 { .bitrate = 480, .hw_value = 96, },
258 { .bitrate = 540, .hw_value = 108, },
259 { .bitrate = 720, .hw_value = 144, },
260 };
261
262 static const struct ieee80211_channel mwl8k_channels_50[] = {
263 { .center_freq = 5180, .hw_value = 36, },
264 { .center_freq = 5200, .hw_value = 40, },
265 { .center_freq = 5220, .hw_value = 44, },
266 { .center_freq = 5240, .hw_value = 48, },
267 };
268
269 static const struct ieee80211_rate mwl8k_rates_50[] = {
270 { .bitrate = 60, .hw_value = 12, },
271 { .bitrate = 90, .hw_value = 18, },
272 { .bitrate = 120, .hw_value = 24, },
273 { .bitrate = 180, .hw_value = 36, },
274 { .bitrate = 240, .hw_value = 48, },
275 { .bitrate = 360, .hw_value = 72, },
276 { .bitrate = 480, .hw_value = 96, },
277 { .bitrate = 540, .hw_value = 108, },
278 { .bitrate = 720, .hw_value = 144, },
279 };
280
281 /* Set or get info from Firmware */
282 #define MWL8K_CMD_SET 0x0001
283 #define MWL8K_CMD_GET 0x0000
284
285 /* Firmware command codes */
286 #define MWL8K_CMD_CODE_DNLD 0x0001
287 #define MWL8K_CMD_GET_HW_SPEC 0x0003
288 #define MWL8K_CMD_SET_HW_SPEC 0x0004
289 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
290 #define MWL8K_CMD_GET_STAT 0x0014
291 #define MWL8K_CMD_RADIO_CONTROL 0x001c
292 #define MWL8K_CMD_RF_TX_POWER 0x001e
293 #define MWL8K_CMD_RF_ANTENNA 0x0020
294 #define MWL8K_CMD_SET_BEACON 0x0100
295 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
296 #define MWL8K_CMD_SET_POST_SCAN 0x0108
297 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
298 #define MWL8K_CMD_SET_AID 0x010d
299 #define MWL8K_CMD_SET_RATE 0x0110
300 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
301 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
302 #define MWL8K_CMD_SET_SLOT 0x0114
303 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
304 #define MWL8K_CMD_SET_WMM_MODE 0x0123
305 #define MWL8K_CMD_MIMO_CONFIG 0x0125
306 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
307 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
308 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
309 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
310 #define MWL8K_CMD_BSS_START 0x1100
311 #define MWL8K_CMD_SET_NEW_STN 0x1111
312 #define MWL8K_CMD_UPDATE_STADB 0x1123
313
314 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
315 {
316 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
317 snprintf(buf, bufsize, "%s", #x);\
318 return buf;\
319 } while (0)
320 switch (cmd & ~0x8000) {
321 MWL8K_CMDNAME(CODE_DNLD);
322 MWL8K_CMDNAME(GET_HW_SPEC);
323 MWL8K_CMDNAME(SET_HW_SPEC);
324 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
325 MWL8K_CMDNAME(GET_STAT);
326 MWL8K_CMDNAME(RADIO_CONTROL);
327 MWL8K_CMDNAME(RF_TX_POWER);
328 MWL8K_CMDNAME(RF_ANTENNA);
329 MWL8K_CMDNAME(SET_BEACON);
330 MWL8K_CMDNAME(SET_PRE_SCAN);
331 MWL8K_CMDNAME(SET_POST_SCAN);
332 MWL8K_CMDNAME(SET_RF_CHANNEL);
333 MWL8K_CMDNAME(SET_AID);
334 MWL8K_CMDNAME(SET_RATE);
335 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
336 MWL8K_CMDNAME(RTS_THRESHOLD);
337 MWL8K_CMDNAME(SET_SLOT);
338 MWL8K_CMDNAME(SET_EDCA_PARAMS);
339 MWL8K_CMDNAME(SET_WMM_MODE);
340 MWL8K_CMDNAME(MIMO_CONFIG);
341 MWL8K_CMDNAME(USE_FIXED_RATE);
342 MWL8K_CMDNAME(ENABLE_SNIFFER);
343 MWL8K_CMDNAME(SET_MAC_ADDR);
344 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
345 MWL8K_CMDNAME(BSS_START);
346 MWL8K_CMDNAME(SET_NEW_STN);
347 MWL8K_CMDNAME(UPDATE_STADB);
348 default:
349 snprintf(buf, bufsize, "0x%x", cmd);
350 }
351 #undef MWL8K_CMDNAME
352
353 return buf;
354 }
355
356 /* Hardware and firmware reset */
357 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
358 {
359 iowrite32(MWL8K_H2A_INT_RESET,
360 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
361 iowrite32(MWL8K_H2A_INT_RESET,
362 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
363 msleep(20);
364 }
365
366 /* Release fw image */
367 static void mwl8k_release_fw(struct firmware **fw)
368 {
369 if (*fw == NULL)
370 return;
371 release_firmware(*fw);
372 *fw = NULL;
373 }
374
375 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
376 {
377 mwl8k_release_fw(&priv->fw_ucode);
378 mwl8k_release_fw(&priv->fw_helper);
379 }
380
381 /* Request fw image */
382 static int mwl8k_request_fw(struct mwl8k_priv *priv,
383 const char *fname, struct firmware **fw)
384 {
385 /* release current image */
386 if (*fw != NULL)
387 mwl8k_release_fw(fw);
388
389 return request_firmware((const struct firmware **)fw,
390 fname, &priv->pdev->dev);
391 }
392
393 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
394 {
395 struct mwl8k_device_info *di = priv->device_info;
396 int rc;
397
398 if (di->helper_image != NULL) {
399 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
400 if (rc) {
401 printk(KERN_ERR "%s: Error requesting helper "
402 "firmware file %s\n", pci_name(priv->pdev),
403 di->helper_image);
404 return rc;
405 }
406 }
407
408 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
409 if (rc) {
410 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
411 pci_name(priv->pdev), di->fw_image);
412 mwl8k_release_fw(&priv->fw_helper);
413 return rc;
414 }
415
416 return 0;
417 }
418
419 struct mwl8k_cmd_pkt {
420 __le16 code;
421 __le16 length;
422 __le16 seq_num;
423 __le16 result;
424 char payload[0];
425 } __attribute__((packed));
426
427 /*
428 * Firmware loading.
429 */
430 static int
431 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
432 {
433 void __iomem *regs = priv->regs;
434 dma_addr_t dma_addr;
435 int loops;
436
437 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
438 if (pci_dma_mapping_error(priv->pdev, dma_addr))
439 return -ENOMEM;
440
441 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
442 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
443 iowrite32(MWL8K_H2A_INT_DOORBELL,
444 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
445 iowrite32(MWL8K_H2A_INT_DUMMY,
446 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
447
448 loops = 1000;
449 do {
450 u32 int_code;
451
452 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
453 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
454 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
455 break;
456 }
457
458 cond_resched();
459 udelay(1);
460 } while (--loops);
461
462 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
463
464 return loops ? 0 : -ETIMEDOUT;
465 }
466
467 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
468 const u8 *data, size_t length)
469 {
470 struct mwl8k_cmd_pkt *cmd;
471 int done;
472 int rc = 0;
473
474 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
475 if (cmd == NULL)
476 return -ENOMEM;
477
478 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
479 cmd->seq_num = 0;
480 cmd->result = 0;
481
482 done = 0;
483 while (length) {
484 int block_size = length > 256 ? 256 : length;
485
486 memcpy(cmd->payload, data + done, block_size);
487 cmd->length = cpu_to_le16(block_size);
488
489 rc = mwl8k_send_fw_load_cmd(priv, cmd,
490 sizeof(*cmd) + block_size);
491 if (rc)
492 break;
493
494 done += block_size;
495 length -= block_size;
496 }
497
498 if (!rc) {
499 cmd->length = 0;
500 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
501 }
502
503 kfree(cmd);
504
505 return rc;
506 }
507
508 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
509 const u8 *data, size_t length)
510 {
511 unsigned char *buffer;
512 int may_continue, rc = 0;
513 u32 done, prev_block_size;
514
515 buffer = kmalloc(1024, GFP_KERNEL);
516 if (buffer == NULL)
517 return -ENOMEM;
518
519 done = 0;
520 prev_block_size = 0;
521 may_continue = 1000;
522 while (may_continue > 0) {
523 u32 block_size;
524
525 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
526 if (block_size & 1) {
527 block_size &= ~1;
528 may_continue--;
529 } else {
530 done += prev_block_size;
531 length -= prev_block_size;
532 }
533
534 if (block_size > 1024 || block_size > length) {
535 rc = -EOVERFLOW;
536 break;
537 }
538
539 if (length == 0) {
540 rc = 0;
541 break;
542 }
543
544 if (block_size == 0) {
545 rc = -EPROTO;
546 may_continue--;
547 udelay(1);
548 continue;
549 }
550
551 prev_block_size = block_size;
552 memcpy(buffer, data + done, block_size);
553
554 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
555 if (rc)
556 break;
557 }
558
559 if (!rc && length != 0)
560 rc = -EREMOTEIO;
561
562 kfree(buffer);
563
564 return rc;
565 }
566
567 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
568 {
569 struct mwl8k_priv *priv = hw->priv;
570 struct firmware *fw = priv->fw_ucode;
571 int rc;
572 int loops;
573
574 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
575 struct firmware *helper = priv->fw_helper;
576
577 if (helper == NULL) {
578 printk(KERN_ERR "%s: helper image needed but none "
579 "given\n", pci_name(priv->pdev));
580 return -EINVAL;
581 }
582
583 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
584 if (rc) {
585 printk(KERN_ERR "%s: unable to load firmware "
586 "helper image\n", pci_name(priv->pdev));
587 return rc;
588 }
589 msleep(5);
590
591 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
592 } else {
593 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
594 }
595
596 if (rc) {
597 printk(KERN_ERR "%s: unable to load firmware image\n",
598 pci_name(priv->pdev));
599 return rc;
600 }
601
602 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
603
604 loops = 500000;
605 do {
606 u32 ready_code;
607
608 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
609 if (ready_code == MWL8K_FWAP_READY) {
610 priv->ap_fw = 1;
611 break;
612 } else if (ready_code == MWL8K_FWSTA_READY) {
613 priv->ap_fw = 0;
614 break;
615 }
616
617 cond_resched();
618 udelay(1);
619 } while (--loops);
620
621 return loops ? 0 : -ETIMEDOUT;
622 }
623
624
625 /* DMA header used by firmware and hardware. */
626 struct mwl8k_dma_data {
627 __le16 fwlen;
628 struct ieee80211_hdr wh;
629 char data[0];
630 } __attribute__((packed));
631
632 /* Routines to add/remove DMA header from skb. */
633 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
634 {
635 struct mwl8k_dma_data *tr;
636 int hdrlen;
637
638 tr = (struct mwl8k_dma_data *)skb->data;
639 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
640
641 if (hdrlen != sizeof(tr->wh)) {
642 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
643 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
644 *((__le16 *)(tr->data - 2)) = qos;
645 } else {
646 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
647 }
648 }
649
650 if (hdrlen != sizeof(*tr))
651 skb_pull(skb, sizeof(*tr) - hdrlen);
652 }
653
654 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
655 {
656 struct ieee80211_hdr *wh;
657 int hdrlen;
658 struct mwl8k_dma_data *tr;
659
660 /*
661 * Add a firmware DMA header; the firmware requires that we
662 * present a 2-byte payload length followed by a 4-address
663 * header (without QoS field), followed (optionally) by any
664 * WEP/ExtIV header (but only filled in for CCMP).
665 */
666 wh = (struct ieee80211_hdr *)skb->data;
667
668 hdrlen = ieee80211_hdrlen(wh->frame_control);
669 if (hdrlen != sizeof(*tr))
670 skb_push(skb, sizeof(*tr) - hdrlen);
671
672 if (ieee80211_is_data_qos(wh->frame_control))
673 hdrlen -= 2;
674
675 tr = (struct mwl8k_dma_data *)skb->data;
676 if (wh != &tr->wh)
677 memmove(&tr->wh, wh, hdrlen);
678 if (hdrlen != sizeof(tr->wh))
679 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
680
681 /*
682 * Firmware length is the length of the fully formed "802.11
683 * payload". That is, everything except for the 802.11 header.
684 * This includes all crypto material including the MIC.
685 */
686 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
687 }
688
689
690 /*
691 * Packet reception for 88w8366 AP firmware.
692 */
693 struct mwl8k_rxd_8366_ap {
694 __le16 pkt_len;
695 __u8 sq2;
696 __u8 rate;
697 __le32 pkt_phys_addr;
698 __le32 next_rxd_phys_addr;
699 __le16 qos_control;
700 __le16 htsig2;
701 __le32 hw_rssi_info;
702 __le32 hw_noise_floor_info;
703 __u8 noise_floor;
704 __u8 pad0[3];
705 __u8 rssi;
706 __u8 rx_status;
707 __u8 channel;
708 __u8 rx_ctrl;
709 } __attribute__((packed));
710
711 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
712 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
713 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
714
715 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
716
717 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
718 {
719 struct mwl8k_rxd_8366_ap *rxd = _rxd;
720
721 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
722 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
723 }
724
725 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
726 {
727 struct mwl8k_rxd_8366_ap *rxd = _rxd;
728
729 rxd->pkt_len = cpu_to_le16(len);
730 rxd->pkt_phys_addr = cpu_to_le32(addr);
731 wmb();
732 rxd->rx_ctrl = 0;
733 }
734
735 static int
736 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
737 __le16 *qos)
738 {
739 struct mwl8k_rxd_8366_ap *rxd = _rxd;
740
741 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
742 return -1;
743 rmb();
744
745 memset(status, 0, sizeof(*status));
746
747 status->signal = -rxd->rssi;
748 status->noise = -rxd->noise_floor;
749
750 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
751 status->flag |= RX_FLAG_HT;
752 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
753 status->flag |= RX_FLAG_40MHZ;
754 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
755 } else {
756 int i;
757
758 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
759 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
760 status->rate_idx = i;
761 break;
762 }
763 }
764 }
765
766 if (rxd->channel > 14) {
767 status->band = IEEE80211_BAND_5GHZ;
768 if (!(status->flag & RX_FLAG_HT))
769 status->rate_idx -= 5;
770 } else {
771 status->band = IEEE80211_BAND_2GHZ;
772 }
773 status->freq = ieee80211_channel_to_frequency(rxd->channel);
774
775 *qos = rxd->qos_control;
776
777 return le16_to_cpu(rxd->pkt_len);
778 }
779
780 static struct rxd_ops rxd_8366_ap_ops = {
781 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
782 .rxd_init = mwl8k_rxd_8366_ap_init,
783 .rxd_refill = mwl8k_rxd_8366_ap_refill,
784 .rxd_process = mwl8k_rxd_8366_ap_process,
785 };
786
787 /*
788 * Packet reception for STA firmware.
789 */
790 struct mwl8k_rxd_sta {
791 __le16 pkt_len;
792 __u8 link_quality;
793 __u8 noise_level;
794 __le32 pkt_phys_addr;
795 __le32 next_rxd_phys_addr;
796 __le16 qos_control;
797 __le16 rate_info;
798 __le32 pad0[4];
799 __u8 rssi;
800 __u8 channel;
801 __le16 pad1;
802 __u8 rx_ctrl;
803 __u8 rx_status;
804 __u8 pad2[2];
805 } __attribute__((packed));
806
807 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
808 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
809 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
810 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
811 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
812 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
813
814 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
815
816 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
817 {
818 struct mwl8k_rxd_sta *rxd = _rxd;
819
820 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
821 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
822 }
823
824 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
825 {
826 struct mwl8k_rxd_sta *rxd = _rxd;
827
828 rxd->pkt_len = cpu_to_le16(len);
829 rxd->pkt_phys_addr = cpu_to_le32(addr);
830 wmb();
831 rxd->rx_ctrl = 0;
832 }
833
834 static int
835 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
836 __le16 *qos)
837 {
838 struct mwl8k_rxd_sta *rxd = _rxd;
839 u16 rate_info;
840
841 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
842 return -1;
843 rmb();
844
845 rate_info = le16_to_cpu(rxd->rate_info);
846
847 memset(status, 0, sizeof(*status));
848
849 status->signal = -rxd->rssi;
850 status->noise = -rxd->noise_level;
851 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
852 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
853
854 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
855 status->flag |= RX_FLAG_SHORTPRE;
856 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
857 status->flag |= RX_FLAG_40MHZ;
858 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
859 status->flag |= RX_FLAG_SHORT_GI;
860 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
861 status->flag |= RX_FLAG_HT;
862
863 if (rxd->channel > 14) {
864 status->band = IEEE80211_BAND_5GHZ;
865 if (!(status->flag & RX_FLAG_HT))
866 status->rate_idx -= 5;
867 } else {
868 status->band = IEEE80211_BAND_2GHZ;
869 }
870 status->freq = ieee80211_channel_to_frequency(rxd->channel);
871
872 *qos = rxd->qos_control;
873
874 return le16_to_cpu(rxd->pkt_len);
875 }
876
877 static struct rxd_ops rxd_sta_ops = {
878 .rxd_size = sizeof(struct mwl8k_rxd_sta),
879 .rxd_init = mwl8k_rxd_sta_init,
880 .rxd_refill = mwl8k_rxd_sta_refill,
881 .rxd_process = mwl8k_rxd_sta_process,
882 };
883
884
885 #define MWL8K_RX_DESCS 256
886 #define MWL8K_RX_MAXSZ 3800
887
888 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
889 {
890 struct mwl8k_priv *priv = hw->priv;
891 struct mwl8k_rx_queue *rxq = priv->rxq + index;
892 int size;
893 int i;
894
895 rxq->rxd_count = 0;
896 rxq->head = 0;
897 rxq->tail = 0;
898
899 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
900
901 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
902 if (rxq->rxd == NULL) {
903 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
904 wiphy_name(hw->wiphy));
905 return -ENOMEM;
906 }
907 memset(rxq->rxd, 0, size);
908
909 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
910 if (rxq->buf == NULL) {
911 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
912 wiphy_name(hw->wiphy));
913 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
914 return -ENOMEM;
915 }
916 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
917
918 for (i = 0; i < MWL8K_RX_DESCS; i++) {
919 int desc_size;
920 void *rxd;
921 int nexti;
922 dma_addr_t next_dma_addr;
923
924 desc_size = priv->rxd_ops->rxd_size;
925 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
926
927 nexti = i + 1;
928 if (nexti == MWL8K_RX_DESCS)
929 nexti = 0;
930 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
931
932 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
933 }
934
935 return 0;
936 }
937
938 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
939 {
940 struct mwl8k_priv *priv = hw->priv;
941 struct mwl8k_rx_queue *rxq = priv->rxq + index;
942 int refilled;
943
944 refilled = 0;
945 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
946 struct sk_buff *skb;
947 dma_addr_t addr;
948 int rx;
949 void *rxd;
950
951 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
952 if (skb == NULL)
953 break;
954
955 addr = pci_map_single(priv->pdev, skb->data,
956 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
957
958 rxq->rxd_count++;
959 rx = rxq->tail++;
960 if (rxq->tail == MWL8K_RX_DESCS)
961 rxq->tail = 0;
962 rxq->buf[rx].skb = skb;
963 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
964
965 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
966 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
967
968 refilled++;
969 }
970
971 return refilled;
972 }
973
974 /* Must be called only when the card's reception is completely halted */
975 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
976 {
977 struct mwl8k_priv *priv = hw->priv;
978 struct mwl8k_rx_queue *rxq = priv->rxq + index;
979 int i;
980
981 for (i = 0; i < MWL8K_RX_DESCS; i++) {
982 if (rxq->buf[i].skb != NULL) {
983 pci_unmap_single(priv->pdev,
984 pci_unmap_addr(&rxq->buf[i], dma),
985 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
986 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
987
988 kfree_skb(rxq->buf[i].skb);
989 rxq->buf[i].skb = NULL;
990 }
991 }
992
993 kfree(rxq->buf);
994 rxq->buf = NULL;
995
996 pci_free_consistent(priv->pdev,
997 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
998 rxq->rxd, rxq->rxd_dma);
999 rxq->rxd = NULL;
1000 }
1001
1002
1003 /*
1004 * Scan a list of BSSIDs to process for finalize join.
1005 * Allows for extension to process multiple BSSIDs.
1006 */
1007 static inline int
1008 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1009 {
1010 return priv->capture_beacon &&
1011 ieee80211_is_beacon(wh->frame_control) &&
1012 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1013 }
1014
1015 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1016 struct sk_buff *skb)
1017 {
1018 struct mwl8k_priv *priv = hw->priv;
1019
1020 priv->capture_beacon = false;
1021 memset(priv->capture_bssid, 0, ETH_ALEN);
1022
1023 /*
1024 * Use GFP_ATOMIC as rxq_process is called from
1025 * the primary interrupt handler, memory allocation call
1026 * must not sleep.
1027 */
1028 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1029 if (priv->beacon_skb != NULL)
1030 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1031 }
1032
1033 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1034 {
1035 struct mwl8k_priv *priv = hw->priv;
1036 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1037 int processed;
1038
1039 processed = 0;
1040 while (rxq->rxd_count && limit--) {
1041 struct sk_buff *skb;
1042 void *rxd;
1043 int pkt_len;
1044 struct ieee80211_rx_status status;
1045 __le16 qos;
1046
1047 skb = rxq->buf[rxq->head].skb;
1048 if (skb == NULL)
1049 break;
1050
1051 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1052
1053 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1054 if (pkt_len < 0)
1055 break;
1056
1057 rxq->buf[rxq->head].skb = NULL;
1058
1059 pci_unmap_single(priv->pdev,
1060 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1061 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1062 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1063
1064 rxq->head++;
1065 if (rxq->head == MWL8K_RX_DESCS)
1066 rxq->head = 0;
1067
1068 rxq->rxd_count--;
1069
1070 skb_put(skb, pkt_len);
1071 mwl8k_remove_dma_header(skb, qos);
1072
1073 /*
1074 * Check for a pending join operation. Save a
1075 * copy of the beacon and schedule a tasklet to
1076 * send a FINALIZE_JOIN command to the firmware.
1077 */
1078 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1079 mwl8k_save_beacon(hw, skb);
1080
1081 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1082 ieee80211_rx_irqsafe(hw, skb);
1083
1084 processed++;
1085 }
1086
1087 return processed;
1088 }
1089
1090
1091 /*
1092 * Packet transmission.
1093 */
1094
1095 #define MWL8K_TXD_STATUS_OK 0x00000001
1096 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1097 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1098 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1099 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1100
1101 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1102 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1103 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1104 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1105 #define MWL8K_QOS_EOSP 0x0010
1106
1107 struct mwl8k_tx_desc {
1108 __le32 status;
1109 __u8 data_rate;
1110 __u8 tx_priority;
1111 __le16 qos_control;
1112 __le32 pkt_phys_addr;
1113 __le16 pkt_len;
1114 __u8 dest_MAC_addr[ETH_ALEN];
1115 __le32 next_txd_phys_addr;
1116 __le32 reserved;
1117 __le16 rate_info;
1118 __u8 peer_id;
1119 __u8 tx_frag_cnt;
1120 } __attribute__((packed));
1121
1122 #define MWL8K_TX_DESCS 128
1123
1124 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1125 {
1126 struct mwl8k_priv *priv = hw->priv;
1127 struct mwl8k_tx_queue *txq = priv->txq + index;
1128 int size;
1129 int i;
1130
1131 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1132 txq->stats.limit = MWL8K_TX_DESCS;
1133 txq->head = 0;
1134 txq->tail = 0;
1135
1136 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1137
1138 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1139 if (txq->txd == NULL) {
1140 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1141 wiphy_name(hw->wiphy));
1142 return -ENOMEM;
1143 }
1144 memset(txq->txd, 0, size);
1145
1146 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1147 if (txq->skb == NULL) {
1148 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1149 wiphy_name(hw->wiphy));
1150 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1151 return -ENOMEM;
1152 }
1153 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1154
1155 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1156 struct mwl8k_tx_desc *tx_desc;
1157 int nexti;
1158
1159 tx_desc = txq->txd + i;
1160 nexti = (i + 1) % MWL8K_TX_DESCS;
1161
1162 tx_desc->status = 0;
1163 tx_desc->next_txd_phys_addr =
1164 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1165 }
1166
1167 return 0;
1168 }
1169
1170 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1171 {
1172 iowrite32(MWL8K_H2A_INT_PPA_READY,
1173 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1174 iowrite32(MWL8K_H2A_INT_DUMMY,
1175 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1176 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1177 }
1178
1179 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1180 {
1181 struct mwl8k_priv *priv = hw->priv;
1182 int i;
1183
1184 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1185 struct mwl8k_tx_queue *txq = priv->txq + i;
1186 int fw_owned = 0;
1187 int drv_owned = 0;
1188 int unused = 0;
1189 int desc;
1190
1191 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1192 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1193 u32 status;
1194
1195 status = le32_to_cpu(tx_desc->status);
1196 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1197 fw_owned++;
1198 else
1199 drv_owned++;
1200
1201 if (tx_desc->pkt_len == 0)
1202 unused++;
1203 }
1204
1205 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1206 "fw_owned=%d drv_owned=%d unused=%d\n",
1207 wiphy_name(hw->wiphy), i,
1208 txq->stats.len, txq->head, txq->tail,
1209 fw_owned, drv_owned, unused);
1210 }
1211 }
1212
1213 /*
1214 * Must be called with priv->fw_mutex held and tx queues stopped.
1215 */
1216 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1217
1218 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1219 {
1220 struct mwl8k_priv *priv = hw->priv;
1221 DECLARE_COMPLETION_ONSTACK(tx_wait);
1222 int retry;
1223 int rc;
1224
1225 might_sleep();
1226
1227 /*
1228 * The TX queues are stopped at this point, so this test
1229 * doesn't need to take ->tx_lock.
1230 */
1231 if (!priv->pending_tx_pkts)
1232 return 0;
1233
1234 retry = 0;
1235 rc = 0;
1236
1237 spin_lock_bh(&priv->tx_lock);
1238 priv->tx_wait = &tx_wait;
1239 while (!rc) {
1240 int oldcount;
1241 unsigned long timeout;
1242
1243 oldcount = priv->pending_tx_pkts;
1244
1245 spin_unlock_bh(&priv->tx_lock);
1246 timeout = wait_for_completion_timeout(&tx_wait,
1247 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1248 spin_lock_bh(&priv->tx_lock);
1249
1250 if (timeout) {
1251 WARN_ON(priv->pending_tx_pkts);
1252 if (retry) {
1253 printk(KERN_NOTICE "%s: tx rings drained\n",
1254 wiphy_name(hw->wiphy));
1255 }
1256 break;
1257 }
1258
1259 if (priv->pending_tx_pkts < oldcount) {
1260 printk(KERN_NOTICE "%s: waiting for tx rings "
1261 "to drain (%d -> %d pkts)\n",
1262 wiphy_name(hw->wiphy), oldcount,
1263 priv->pending_tx_pkts);
1264 retry = 1;
1265 continue;
1266 }
1267
1268 priv->tx_wait = NULL;
1269
1270 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1271 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1272 mwl8k_dump_tx_rings(hw);
1273
1274 rc = -ETIMEDOUT;
1275 }
1276 spin_unlock_bh(&priv->tx_lock);
1277
1278 return rc;
1279 }
1280
1281 #define MWL8K_TXD_SUCCESS(status) \
1282 ((status) & (MWL8K_TXD_STATUS_OK | \
1283 MWL8K_TXD_STATUS_OK_RETRY | \
1284 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1285
1286 static int
1287 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1288 {
1289 struct mwl8k_priv *priv = hw->priv;
1290 struct mwl8k_tx_queue *txq = priv->txq + index;
1291 int processed;
1292
1293 processed = 0;
1294 while (txq->stats.len > 0 && limit--) {
1295 int tx;
1296 struct mwl8k_tx_desc *tx_desc;
1297 unsigned long addr;
1298 int size;
1299 struct sk_buff *skb;
1300 struct ieee80211_tx_info *info;
1301 u32 status;
1302
1303 tx = txq->head;
1304 tx_desc = txq->txd + tx;
1305
1306 status = le32_to_cpu(tx_desc->status);
1307
1308 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1309 if (!force)
1310 break;
1311 tx_desc->status &=
1312 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1313 }
1314
1315 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1316 BUG_ON(txq->stats.len == 0);
1317 txq->stats.len--;
1318 priv->pending_tx_pkts--;
1319
1320 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1321 size = le16_to_cpu(tx_desc->pkt_len);
1322 skb = txq->skb[tx];
1323 txq->skb[tx] = NULL;
1324
1325 BUG_ON(skb == NULL);
1326 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1327
1328 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1329
1330 /* Mark descriptor as unused */
1331 tx_desc->pkt_phys_addr = 0;
1332 tx_desc->pkt_len = 0;
1333
1334 info = IEEE80211_SKB_CB(skb);
1335 ieee80211_tx_info_clear_status(info);
1336 if (MWL8K_TXD_SUCCESS(status))
1337 info->flags |= IEEE80211_TX_STAT_ACK;
1338
1339 ieee80211_tx_status_irqsafe(hw, skb);
1340
1341 processed++;
1342 }
1343
1344 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1345 ieee80211_wake_queue(hw, index);
1346
1347 return processed;
1348 }
1349
1350 /* must be called only when the card's transmit is completely halted */
1351 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1352 {
1353 struct mwl8k_priv *priv = hw->priv;
1354 struct mwl8k_tx_queue *txq = priv->txq + index;
1355
1356 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1357
1358 kfree(txq->skb);
1359 txq->skb = NULL;
1360
1361 pci_free_consistent(priv->pdev,
1362 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1363 txq->txd, txq->txd_dma);
1364 txq->txd = NULL;
1365 }
1366
1367 static int
1368 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1369 {
1370 struct mwl8k_priv *priv = hw->priv;
1371 struct ieee80211_tx_info *tx_info;
1372 struct mwl8k_vif *mwl8k_vif;
1373 struct ieee80211_hdr *wh;
1374 struct mwl8k_tx_queue *txq;
1375 struct mwl8k_tx_desc *tx;
1376 dma_addr_t dma;
1377 u32 txstatus;
1378 u8 txdatarate;
1379 u16 qos;
1380
1381 wh = (struct ieee80211_hdr *)skb->data;
1382 if (ieee80211_is_data_qos(wh->frame_control))
1383 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1384 else
1385 qos = 0;
1386
1387 mwl8k_add_dma_header(skb);
1388 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1389
1390 tx_info = IEEE80211_SKB_CB(skb);
1391 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1392
1393 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1394 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1395 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1396 mwl8k_vif->seqno += 0x10;
1397 }
1398
1399 /* Setup firmware control bit fields for each frame type. */
1400 txstatus = 0;
1401 txdatarate = 0;
1402 if (ieee80211_is_mgmt(wh->frame_control) ||
1403 ieee80211_is_ctl(wh->frame_control)) {
1404 txdatarate = 0;
1405 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1406 } else if (ieee80211_is_data(wh->frame_control)) {
1407 txdatarate = 1;
1408 if (is_multicast_ether_addr(wh->addr1))
1409 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1410
1411 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1412 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1413 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1414 else
1415 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1416 }
1417
1418 dma = pci_map_single(priv->pdev, skb->data,
1419 skb->len, PCI_DMA_TODEVICE);
1420
1421 if (pci_dma_mapping_error(priv->pdev, dma)) {
1422 printk(KERN_DEBUG "%s: failed to dma map skb, "
1423 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1424 dev_kfree_skb(skb);
1425 return NETDEV_TX_OK;
1426 }
1427
1428 spin_lock_bh(&priv->tx_lock);
1429
1430 txq = priv->txq + index;
1431
1432 BUG_ON(txq->skb[txq->tail] != NULL);
1433 txq->skb[txq->tail] = skb;
1434
1435 tx = txq->txd + txq->tail;
1436 tx->data_rate = txdatarate;
1437 tx->tx_priority = index;
1438 tx->qos_control = cpu_to_le16(qos);
1439 tx->pkt_phys_addr = cpu_to_le32(dma);
1440 tx->pkt_len = cpu_to_le16(skb->len);
1441 tx->rate_info = 0;
1442 if (!priv->ap_fw && tx_info->control.sta != NULL)
1443 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1444 else
1445 tx->peer_id = 0;
1446 wmb();
1447 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1448
1449 txq->stats.count++;
1450 txq->stats.len++;
1451 priv->pending_tx_pkts++;
1452
1453 txq->tail++;
1454 if (txq->tail == MWL8K_TX_DESCS)
1455 txq->tail = 0;
1456
1457 if (txq->head == txq->tail)
1458 ieee80211_stop_queue(hw, index);
1459
1460 mwl8k_tx_start(priv);
1461
1462 spin_unlock_bh(&priv->tx_lock);
1463
1464 return NETDEV_TX_OK;
1465 }
1466
1467
1468 /*
1469 * Firmware access.
1470 *
1471 * We have the following requirements for issuing firmware commands:
1472 * - Some commands require that the packet transmit path is idle when
1473 * the command is issued. (For simplicity, we'll just quiesce the
1474 * transmit path for every command.)
1475 * - There are certain sequences of commands that need to be issued to
1476 * the hardware sequentially, with no other intervening commands.
1477 *
1478 * This leads to an implementation of a "firmware lock" as a mutex that
1479 * can be taken recursively, and which is taken by both the low-level
1480 * command submission function (mwl8k_post_cmd) as well as any users of
1481 * that function that require issuing of an atomic sequence of commands,
1482 * and quiesces the transmit path whenever it's taken.
1483 */
1484 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1485 {
1486 struct mwl8k_priv *priv = hw->priv;
1487
1488 if (priv->fw_mutex_owner != current) {
1489 int rc;
1490
1491 mutex_lock(&priv->fw_mutex);
1492 ieee80211_stop_queues(hw);
1493
1494 rc = mwl8k_tx_wait_empty(hw);
1495 if (rc) {
1496 ieee80211_wake_queues(hw);
1497 mutex_unlock(&priv->fw_mutex);
1498
1499 return rc;
1500 }
1501
1502 priv->fw_mutex_owner = current;
1503 }
1504
1505 priv->fw_mutex_depth++;
1506
1507 return 0;
1508 }
1509
1510 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1511 {
1512 struct mwl8k_priv *priv = hw->priv;
1513
1514 if (!--priv->fw_mutex_depth) {
1515 ieee80211_wake_queues(hw);
1516 priv->fw_mutex_owner = NULL;
1517 mutex_unlock(&priv->fw_mutex);
1518 }
1519 }
1520
1521
1522 /*
1523 * Command processing.
1524 */
1525
1526 /* Timeout firmware commands after 10s */
1527 #define MWL8K_CMD_TIMEOUT_MS 10000
1528
1529 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1530 {
1531 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1532 struct mwl8k_priv *priv = hw->priv;
1533 void __iomem *regs = priv->regs;
1534 dma_addr_t dma_addr;
1535 unsigned int dma_size;
1536 int rc;
1537 unsigned long timeout = 0;
1538 u8 buf[32];
1539
1540 cmd->result = 0xffff;
1541 dma_size = le16_to_cpu(cmd->length);
1542 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1543 PCI_DMA_BIDIRECTIONAL);
1544 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1545 return -ENOMEM;
1546
1547 rc = mwl8k_fw_lock(hw);
1548 if (rc) {
1549 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1550 PCI_DMA_BIDIRECTIONAL);
1551 return rc;
1552 }
1553
1554 priv->hostcmd_wait = &cmd_wait;
1555 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1556 iowrite32(MWL8K_H2A_INT_DOORBELL,
1557 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1558 iowrite32(MWL8K_H2A_INT_DUMMY,
1559 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1560
1561 timeout = wait_for_completion_timeout(&cmd_wait,
1562 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1563
1564 priv->hostcmd_wait = NULL;
1565
1566 mwl8k_fw_unlock(hw);
1567
1568 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1569 PCI_DMA_BIDIRECTIONAL);
1570
1571 if (!timeout) {
1572 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1573 wiphy_name(hw->wiphy),
1574 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1575 MWL8K_CMD_TIMEOUT_MS);
1576 rc = -ETIMEDOUT;
1577 } else {
1578 int ms;
1579
1580 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1581
1582 rc = cmd->result ? -EINVAL : 0;
1583 if (rc)
1584 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1585 wiphy_name(hw->wiphy),
1586 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1587 le16_to_cpu(cmd->result));
1588 else if (ms > 2000)
1589 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1590 wiphy_name(hw->wiphy),
1591 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1592 ms);
1593 }
1594
1595 return rc;
1596 }
1597
1598 /*
1599 * Setup code shared between STA and AP firmware images.
1600 */
1601 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1602 {
1603 struct mwl8k_priv *priv = hw->priv;
1604
1605 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1606 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1607
1608 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1609 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1610
1611 priv->band_24.band = IEEE80211_BAND_2GHZ;
1612 priv->band_24.channels = priv->channels_24;
1613 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1614 priv->band_24.bitrates = priv->rates_24;
1615 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1616
1617 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1618 }
1619
1620 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1621 {
1622 struct mwl8k_priv *priv = hw->priv;
1623
1624 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1625 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1626
1627 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1628 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1629
1630 priv->band_50.band = IEEE80211_BAND_5GHZ;
1631 priv->band_50.channels = priv->channels_50;
1632 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1633 priv->band_50.bitrates = priv->rates_50;
1634 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1635
1636 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1637 }
1638
1639 /*
1640 * CMD_GET_HW_SPEC (STA version).
1641 */
1642 struct mwl8k_cmd_get_hw_spec_sta {
1643 struct mwl8k_cmd_pkt header;
1644 __u8 hw_rev;
1645 __u8 host_interface;
1646 __le16 num_mcaddrs;
1647 __u8 perm_addr[ETH_ALEN];
1648 __le16 region_code;
1649 __le32 fw_rev;
1650 __le32 ps_cookie;
1651 __le32 caps;
1652 __u8 mcs_bitmap[16];
1653 __le32 rx_queue_ptr;
1654 __le32 num_tx_queues;
1655 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1656 __le32 caps2;
1657 __le32 num_tx_desc_per_queue;
1658 __le32 total_rxd;
1659 } __attribute__((packed));
1660
1661 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1662 #define MWL8K_CAP_GREENFIELD 0x08000000
1663 #define MWL8K_CAP_AMPDU 0x04000000
1664 #define MWL8K_CAP_RX_STBC 0x01000000
1665 #define MWL8K_CAP_TX_STBC 0x00800000
1666 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1667 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1668 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1669 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1670 #define MWL8K_CAP_DELAY_BA 0x00003000
1671 #define MWL8K_CAP_MIMO 0x00000200
1672 #define MWL8K_CAP_40MHZ 0x00000100
1673 #define MWL8K_CAP_BAND_MASK 0x00000007
1674 #define MWL8K_CAP_5GHZ 0x00000004
1675 #define MWL8K_CAP_2GHZ4 0x00000001
1676
1677 static void
1678 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1679 struct ieee80211_supported_band *band, u32 cap)
1680 {
1681 int rx_streams;
1682 int tx_streams;
1683
1684 band->ht_cap.ht_supported = 1;
1685
1686 if (cap & MWL8K_CAP_MAX_AMSDU)
1687 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1688 if (cap & MWL8K_CAP_GREENFIELD)
1689 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1690 if (cap & MWL8K_CAP_AMPDU) {
1691 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1692 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1693 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1694 }
1695 if (cap & MWL8K_CAP_RX_STBC)
1696 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1697 if (cap & MWL8K_CAP_TX_STBC)
1698 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1699 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1700 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1701 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1702 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1703 if (cap & MWL8K_CAP_DELAY_BA)
1704 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1705 if (cap & MWL8K_CAP_40MHZ)
1706 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1707
1708 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1709 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1710
1711 band->ht_cap.mcs.rx_mask[0] = 0xff;
1712 if (rx_streams >= 2)
1713 band->ht_cap.mcs.rx_mask[1] = 0xff;
1714 if (rx_streams >= 3)
1715 band->ht_cap.mcs.rx_mask[2] = 0xff;
1716 band->ht_cap.mcs.rx_mask[4] = 0x01;
1717 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1718
1719 if (rx_streams != tx_streams) {
1720 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1721 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1722 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1723 }
1724 }
1725
1726 static void
1727 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1728 {
1729 struct mwl8k_priv *priv = hw->priv;
1730
1731 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1732 mwl8k_setup_2ghz_band(hw);
1733 if (caps & MWL8K_CAP_MIMO)
1734 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1735 }
1736
1737 if (caps & MWL8K_CAP_5GHZ) {
1738 mwl8k_setup_5ghz_band(hw);
1739 if (caps & MWL8K_CAP_MIMO)
1740 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1741 }
1742 }
1743
1744 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1745 {
1746 struct mwl8k_priv *priv = hw->priv;
1747 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1748 int rc;
1749 int i;
1750
1751 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1752 if (cmd == NULL)
1753 return -ENOMEM;
1754
1755 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1756 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1757
1758 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1759 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1760 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1761 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1762 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1763 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1764 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1765 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1766
1767 rc = mwl8k_post_cmd(hw, &cmd->header);
1768
1769 if (!rc) {
1770 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1771 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1772 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1773 priv->hw_rev = cmd->hw_rev;
1774 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1775 }
1776
1777 kfree(cmd);
1778 return rc;
1779 }
1780
1781 /*
1782 * CMD_GET_HW_SPEC (AP version).
1783 */
1784 struct mwl8k_cmd_get_hw_spec_ap {
1785 struct mwl8k_cmd_pkt header;
1786 __u8 hw_rev;
1787 __u8 host_interface;
1788 __le16 num_wcb;
1789 __le16 num_mcaddrs;
1790 __u8 perm_addr[ETH_ALEN];
1791 __le16 region_code;
1792 __le16 num_antenna;
1793 __le32 fw_rev;
1794 __le32 wcbbase0;
1795 __le32 rxwrptr;
1796 __le32 rxrdptr;
1797 __le32 ps_cookie;
1798 __le32 wcbbase1;
1799 __le32 wcbbase2;
1800 __le32 wcbbase3;
1801 } __attribute__((packed));
1802
1803 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1804 {
1805 struct mwl8k_priv *priv = hw->priv;
1806 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1807 int rc;
1808
1809 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1810 if (cmd == NULL)
1811 return -ENOMEM;
1812
1813 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1814 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1815
1816 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1817 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1818
1819 rc = mwl8k_post_cmd(hw, &cmd->header);
1820
1821 if (!rc) {
1822 int off;
1823
1824 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1825 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1826 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1827 priv->hw_rev = cmd->hw_rev;
1828 mwl8k_setup_2ghz_band(hw);
1829
1830 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1831 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1832
1833 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1834 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1835
1836 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1837 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1838
1839 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1840 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1841
1842 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1843 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1844
1845 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1846 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1847 }
1848
1849 kfree(cmd);
1850 return rc;
1851 }
1852
1853 /*
1854 * CMD_SET_HW_SPEC.
1855 */
1856 struct mwl8k_cmd_set_hw_spec {
1857 struct mwl8k_cmd_pkt header;
1858 __u8 hw_rev;
1859 __u8 host_interface;
1860 __le16 num_mcaddrs;
1861 __u8 perm_addr[ETH_ALEN];
1862 __le16 region_code;
1863 __le32 fw_rev;
1864 __le32 ps_cookie;
1865 __le32 caps;
1866 __le32 rx_queue_ptr;
1867 __le32 num_tx_queues;
1868 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1869 __le32 flags;
1870 __le32 num_tx_desc_per_queue;
1871 __le32 total_rxd;
1872 } __attribute__((packed));
1873
1874 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1875 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1876 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1877
1878 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1879 {
1880 struct mwl8k_priv *priv = hw->priv;
1881 struct mwl8k_cmd_set_hw_spec *cmd;
1882 int rc;
1883 int i;
1884
1885 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1886 if (cmd == NULL)
1887 return -ENOMEM;
1888
1889 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1890 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1891
1892 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1893 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1894 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1895 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1896 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1897 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1898 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1899 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1900 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1901 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1902
1903 rc = mwl8k_post_cmd(hw, &cmd->header);
1904 kfree(cmd);
1905
1906 return rc;
1907 }
1908
1909 /*
1910 * CMD_MAC_MULTICAST_ADR.
1911 */
1912 struct mwl8k_cmd_mac_multicast_adr {
1913 struct mwl8k_cmd_pkt header;
1914 __le16 action;
1915 __le16 numaddr;
1916 __u8 addr[0][ETH_ALEN];
1917 };
1918
1919 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1920 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1921 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1922 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1923
1924 static struct mwl8k_cmd_pkt *
1925 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1926 int mc_count, struct dev_addr_list *mclist)
1927 {
1928 struct mwl8k_priv *priv = hw->priv;
1929 struct mwl8k_cmd_mac_multicast_adr *cmd;
1930 int size;
1931
1932 if (allmulti || mc_count > priv->num_mcaddrs) {
1933 allmulti = 1;
1934 mc_count = 0;
1935 }
1936
1937 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1938
1939 cmd = kzalloc(size, GFP_ATOMIC);
1940 if (cmd == NULL)
1941 return NULL;
1942
1943 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1944 cmd->header.length = cpu_to_le16(size);
1945 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1946 MWL8K_ENABLE_RX_BROADCAST);
1947
1948 if (allmulti) {
1949 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1950 } else if (mc_count) {
1951 int i;
1952
1953 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1954 cmd->numaddr = cpu_to_le16(mc_count);
1955 for (i = 0; i < mc_count && mclist; i++) {
1956 if (mclist->da_addrlen != ETH_ALEN) {
1957 kfree(cmd);
1958 return NULL;
1959 }
1960 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1961 mclist = mclist->next;
1962 }
1963 }
1964
1965 return &cmd->header;
1966 }
1967
1968 /*
1969 * CMD_GET_STAT.
1970 */
1971 struct mwl8k_cmd_get_stat {
1972 struct mwl8k_cmd_pkt header;
1973 __le32 stats[64];
1974 } __attribute__((packed));
1975
1976 #define MWL8K_STAT_ACK_FAILURE 9
1977 #define MWL8K_STAT_RTS_FAILURE 12
1978 #define MWL8K_STAT_FCS_ERROR 24
1979 #define MWL8K_STAT_RTS_SUCCESS 11
1980
1981 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1982 struct ieee80211_low_level_stats *stats)
1983 {
1984 struct mwl8k_cmd_get_stat *cmd;
1985 int rc;
1986
1987 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1988 if (cmd == NULL)
1989 return -ENOMEM;
1990
1991 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1992 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1993
1994 rc = mwl8k_post_cmd(hw, &cmd->header);
1995 if (!rc) {
1996 stats->dot11ACKFailureCount =
1997 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1998 stats->dot11RTSFailureCount =
1999 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2000 stats->dot11FCSErrorCount =
2001 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2002 stats->dot11RTSSuccessCount =
2003 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2004 }
2005 kfree(cmd);
2006
2007 return rc;
2008 }
2009
2010 /*
2011 * CMD_RADIO_CONTROL.
2012 */
2013 struct mwl8k_cmd_radio_control {
2014 struct mwl8k_cmd_pkt header;
2015 __le16 action;
2016 __le16 control;
2017 __le16 radio_on;
2018 } __attribute__((packed));
2019
2020 static int
2021 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2022 {
2023 struct mwl8k_priv *priv = hw->priv;
2024 struct mwl8k_cmd_radio_control *cmd;
2025 int rc;
2026
2027 if (enable == priv->radio_on && !force)
2028 return 0;
2029
2030 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2031 if (cmd == NULL)
2032 return -ENOMEM;
2033
2034 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2035 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2036 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2037 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2038 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2039
2040 rc = mwl8k_post_cmd(hw, &cmd->header);
2041 kfree(cmd);
2042
2043 if (!rc)
2044 priv->radio_on = enable;
2045
2046 return rc;
2047 }
2048
2049 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2050 {
2051 return mwl8k_cmd_radio_control(hw, 0, 0);
2052 }
2053
2054 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2055 {
2056 return mwl8k_cmd_radio_control(hw, 1, 0);
2057 }
2058
2059 static int
2060 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2061 {
2062 struct mwl8k_priv *priv = hw->priv;
2063
2064 priv->radio_short_preamble = short_preamble;
2065
2066 return mwl8k_cmd_radio_control(hw, 1, 1);
2067 }
2068
2069 /*
2070 * CMD_RF_TX_POWER.
2071 */
2072 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
2073
2074 struct mwl8k_cmd_rf_tx_power {
2075 struct mwl8k_cmd_pkt header;
2076 __le16 action;
2077 __le16 support_level;
2078 __le16 current_level;
2079 __le16 reserved;
2080 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2081 } __attribute__((packed));
2082
2083 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2084 {
2085 struct mwl8k_cmd_rf_tx_power *cmd;
2086 int rc;
2087
2088 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2089 if (cmd == NULL)
2090 return -ENOMEM;
2091
2092 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2093 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2094 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2095 cmd->support_level = cpu_to_le16(dBm);
2096
2097 rc = mwl8k_post_cmd(hw, &cmd->header);
2098 kfree(cmd);
2099
2100 return rc;
2101 }
2102
2103 /*
2104 * CMD_RF_ANTENNA.
2105 */
2106 struct mwl8k_cmd_rf_antenna {
2107 struct mwl8k_cmd_pkt header;
2108 __le16 antenna;
2109 __le16 mode;
2110 } __attribute__((packed));
2111
2112 #define MWL8K_RF_ANTENNA_RX 1
2113 #define MWL8K_RF_ANTENNA_TX 2
2114
2115 static int
2116 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2117 {
2118 struct mwl8k_cmd_rf_antenna *cmd;
2119 int rc;
2120
2121 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2122 if (cmd == NULL)
2123 return -ENOMEM;
2124
2125 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2126 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2127 cmd->antenna = cpu_to_le16(antenna);
2128 cmd->mode = cpu_to_le16(mask);
2129
2130 rc = mwl8k_post_cmd(hw, &cmd->header);
2131 kfree(cmd);
2132
2133 return rc;
2134 }
2135
2136 /*
2137 * CMD_SET_BEACON.
2138 */
2139 struct mwl8k_cmd_set_beacon {
2140 struct mwl8k_cmd_pkt header;
2141 __le16 beacon_len;
2142 __u8 beacon[0];
2143 };
2144
2145 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, u8 *beacon, int len)
2146 {
2147 struct mwl8k_cmd_set_beacon *cmd;
2148 int rc;
2149
2150 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2151 if (cmd == NULL)
2152 return -ENOMEM;
2153
2154 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2155 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2156 cmd->beacon_len = cpu_to_le16(len);
2157 memcpy(cmd->beacon, beacon, len);
2158
2159 rc = mwl8k_post_cmd(hw, &cmd->header);
2160 kfree(cmd);
2161
2162 return rc;
2163 }
2164
2165 /*
2166 * CMD_SET_PRE_SCAN.
2167 */
2168 struct mwl8k_cmd_set_pre_scan {
2169 struct mwl8k_cmd_pkt header;
2170 } __attribute__((packed));
2171
2172 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2173 {
2174 struct mwl8k_cmd_set_pre_scan *cmd;
2175 int rc;
2176
2177 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2178 if (cmd == NULL)
2179 return -ENOMEM;
2180
2181 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2182 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2183
2184 rc = mwl8k_post_cmd(hw, &cmd->header);
2185 kfree(cmd);
2186
2187 return rc;
2188 }
2189
2190 /*
2191 * CMD_SET_POST_SCAN.
2192 */
2193 struct mwl8k_cmd_set_post_scan {
2194 struct mwl8k_cmd_pkt header;
2195 __le32 isibss;
2196 __u8 bssid[ETH_ALEN];
2197 } __attribute__((packed));
2198
2199 static int
2200 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2201 {
2202 struct mwl8k_cmd_set_post_scan *cmd;
2203 int rc;
2204
2205 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2206 if (cmd == NULL)
2207 return -ENOMEM;
2208
2209 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2210 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2211 cmd->isibss = 0;
2212 memcpy(cmd->bssid, mac, ETH_ALEN);
2213
2214 rc = mwl8k_post_cmd(hw, &cmd->header);
2215 kfree(cmd);
2216
2217 return rc;
2218 }
2219
2220 /*
2221 * CMD_SET_RF_CHANNEL.
2222 */
2223 struct mwl8k_cmd_set_rf_channel {
2224 struct mwl8k_cmd_pkt header;
2225 __le16 action;
2226 __u8 current_channel;
2227 __le32 channel_flags;
2228 } __attribute__((packed));
2229
2230 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2231 struct ieee80211_conf *conf)
2232 {
2233 struct ieee80211_channel *channel = conf->channel;
2234 struct mwl8k_cmd_set_rf_channel *cmd;
2235 int rc;
2236
2237 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2238 if (cmd == NULL)
2239 return -ENOMEM;
2240
2241 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2242 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2243 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2244 cmd->current_channel = channel->hw_value;
2245
2246 if (channel->band == IEEE80211_BAND_2GHZ)
2247 cmd->channel_flags |= cpu_to_le32(0x00000001);
2248 else if (channel->band == IEEE80211_BAND_5GHZ)
2249 cmd->channel_flags |= cpu_to_le32(0x00000004);
2250
2251 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2252 conf->channel_type == NL80211_CHAN_HT20)
2253 cmd->channel_flags |= cpu_to_le32(0x00000080);
2254 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2255 cmd->channel_flags |= cpu_to_le32(0x000001900);
2256 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2257 cmd->channel_flags |= cpu_to_le32(0x000000900);
2258
2259 rc = mwl8k_post_cmd(hw, &cmd->header);
2260 kfree(cmd);
2261
2262 return rc;
2263 }
2264
2265 /*
2266 * CMD_SET_AID.
2267 */
2268 #define MWL8K_FRAME_PROT_DISABLED 0x00
2269 #define MWL8K_FRAME_PROT_11G 0x07
2270 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2271 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2272
2273 struct mwl8k_cmd_update_set_aid {
2274 struct mwl8k_cmd_pkt header;
2275 __le16 aid;
2276
2277 /* AP's MAC address (BSSID) */
2278 __u8 bssid[ETH_ALEN];
2279 __le16 protection_mode;
2280 __u8 supp_rates[14];
2281 } __attribute__((packed));
2282
2283 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2284 {
2285 int i;
2286 int j;
2287
2288 /*
2289 * Clear nonstandard rates 4 and 13.
2290 */
2291 mask &= 0x1fef;
2292
2293 for (i = 0, j = 0; i < 14; i++) {
2294 if (mask & (1 << i))
2295 rates[j++] = mwl8k_rates_24[i].hw_value;
2296 }
2297 }
2298
2299 static int
2300 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2301 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2302 {
2303 struct mwl8k_cmd_update_set_aid *cmd;
2304 u16 prot_mode;
2305 int rc;
2306
2307 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2308 if (cmd == NULL)
2309 return -ENOMEM;
2310
2311 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2312 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2313 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2314 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2315
2316 if (vif->bss_conf.use_cts_prot) {
2317 prot_mode = MWL8K_FRAME_PROT_11G;
2318 } else {
2319 switch (vif->bss_conf.ht_operation_mode &
2320 IEEE80211_HT_OP_MODE_PROTECTION) {
2321 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2322 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2323 break;
2324 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2325 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2326 break;
2327 default:
2328 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2329 break;
2330 }
2331 }
2332 cmd->protection_mode = cpu_to_le16(prot_mode);
2333
2334 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2335
2336 rc = mwl8k_post_cmd(hw, &cmd->header);
2337 kfree(cmd);
2338
2339 return rc;
2340 }
2341
2342 /*
2343 * CMD_SET_RATE.
2344 */
2345 struct mwl8k_cmd_set_rate {
2346 struct mwl8k_cmd_pkt header;
2347 __u8 legacy_rates[14];
2348
2349 /* Bitmap for supported MCS codes. */
2350 __u8 mcs_set[16];
2351 __u8 reserved[16];
2352 } __attribute__((packed));
2353
2354 static int
2355 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2356 u32 legacy_rate_mask, u8 *mcs_rates)
2357 {
2358 struct mwl8k_cmd_set_rate *cmd;
2359 int rc;
2360
2361 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2362 if (cmd == NULL)
2363 return -ENOMEM;
2364
2365 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2366 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2367 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2368 memcpy(cmd->mcs_set, mcs_rates, 16);
2369
2370 rc = mwl8k_post_cmd(hw, &cmd->header);
2371 kfree(cmd);
2372
2373 return rc;
2374 }
2375
2376 /*
2377 * CMD_FINALIZE_JOIN.
2378 */
2379 #define MWL8K_FJ_BEACON_MAXLEN 128
2380
2381 struct mwl8k_cmd_finalize_join {
2382 struct mwl8k_cmd_pkt header;
2383 __le32 sleep_interval; /* Number of beacon periods to sleep */
2384 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2385 } __attribute__((packed));
2386
2387 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2388 int framelen, int dtim)
2389 {
2390 struct mwl8k_cmd_finalize_join *cmd;
2391 struct ieee80211_mgmt *payload = frame;
2392 int payload_len;
2393 int rc;
2394
2395 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2396 if (cmd == NULL)
2397 return -ENOMEM;
2398
2399 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2400 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2401 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2402
2403 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2404 if (payload_len < 0)
2405 payload_len = 0;
2406 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2407 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2408
2409 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2410
2411 rc = mwl8k_post_cmd(hw, &cmd->header);
2412 kfree(cmd);
2413
2414 return rc;
2415 }
2416
2417 /*
2418 * CMD_SET_RTS_THRESHOLD.
2419 */
2420 struct mwl8k_cmd_set_rts_threshold {
2421 struct mwl8k_cmd_pkt header;
2422 __le16 action;
2423 __le16 threshold;
2424 } __attribute__((packed));
2425
2426 static int
2427 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2428 {
2429 struct mwl8k_cmd_set_rts_threshold *cmd;
2430 int rc;
2431
2432 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2433 if (cmd == NULL)
2434 return -ENOMEM;
2435
2436 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2437 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2438 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2439 cmd->threshold = cpu_to_le16(rts_thresh);
2440
2441 rc = mwl8k_post_cmd(hw, &cmd->header);
2442 kfree(cmd);
2443
2444 return rc;
2445 }
2446
2447 /*
2448 * CMD_SET_SLOT.
2449 */
2450 struct mwl8k_cmd_set_slot {
2451 struct mwl8k_cmd_pkt header;
2452 __le16 action;
2453 __u8 short_slot;
2454 } __attribute__((packed));
2455
2456 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2457 {
2458 struct mwl8k_cmd_set_slot *cmd;
2459 int rc;
2460
2461 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2462 if (cmd == NULL)
2463 return -ENOMEM;
2464
2465 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2466 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2467 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2468 cmd->short_slot = short_slot_time;
2469
2470 rc = mwl8k_post_cmd(hw, &cmd->header);
2471 kfree(cmd);
2472
2473 return rc;
2474 }
2475
2476 /*
2477 * CMD_SET_EDCA_PARAMS.
2478 */
2479 struct mwl8k_cmd_set_edca_params {
2480 struct mwl8k_cmd_pkt header;
2481
2482 /* See MWL8K_SET_EDCA_XXX below */
2483 __le16 action;
2484
2485 /* TX opportunity in units of 32 us */
2486 __le16 txop;
2487
2488 union {
2489 struct {
2490 /* Log exponent of max contention period: 0...15 */
2491 __le32 log_cw_max;
2492
2493 /* Log exponent of min contention period: 0...15 */
2494 __le32 log_cw_min;
2495
2496 /* Adaptive interframe spacing in units of 32us */
2497 __u8 aifs;
2498
2499 /* TX queue to configure */
2500 __u8 txq;
2501 } ap;
2502 struct {
2503 /* Log exponent of max contention period: 0...15 */
2504 __u8 log_cw_max;
2505
2506 /* Log exponent of min contention period: 0...15 */
2507 __u8 log_cw_min;
2508
2509 /* Adaptive interframe spacing in units of 32us */
2510 __u8 aifs;
2511
2512 /* TX queue to configure */
2513 __u8 txq;
2514 } sta;
2515 };
2516 } __attribute__((packed));
2517
2518 #define MWL8K_SET_EDCA_CW 0x01
2519 #define MWL8K_SET_EDCA_TXOP 0x02
2520 #define MWL8K_SET_EDCA_AIFS 0x04
2521
2522 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2523 MWL8K_SET_EDCA_TXOP | \
2524 MWL8K_SET_EDCA_AIFS)
2525
2526 static int
2527 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2528 __u16 cw_min, __u16 cw_max,
2529 __u8 aifs, __u16 txop)
2530 {
2531 struct mwl8k_priv *priv = hw->priv;
2532 struct mwl8k_cmd_set_edca_params *cmd;
2533 int rc;
2534
2535 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2536 if (cmd == NULL)
2537 return -ENOMEM;
2538
2539 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2540 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2541 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2542 cmd->txop = cpu_to_le16(txop);
2543 if (priv->ap_fw) {
2544 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2545 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2546 cmd->ap.aifs = aifs;
2547 cmd->ap.txq = qnum;
2548 } else {
2549 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2550 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2551 cmd->sta.aifs = aifs;
2552 cmd->sta.txq = qnum;
2553 }
2554
2555 rc = mwl8k_post_cmd(hw, &cmd->header);
2556 kfree(cmd);
2557
2558 return rc;
2559 }
2560
2561 /*
2562 * CMD_SET_WMM_MODE.
2563 */
2564 struct mwl8k_cmd_set_wmm_mode {
2565 struct mwl8k_cmd_pkt header;
2566 __le16 action;
2567 } __attribute__((packed));
2568
2569 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2570 {
2571 struct mwl8k_priv *priv = hw->priv;
2572 struct mwl8k_cmd_set_wmm_mode *cmd;
2573 int rc;
2574
2575 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2576 if (cmd == NULL)
2577 return -ENOMEM;
2578
2579 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2580 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2581 cmd->action = cpu_to_le16(!!enable);
2582
2583 rc = mwl8k_post_cmd(hw, &cmd->header);
2584 kfree(cmd);
2585
2586 if (!rc)
2587 priv->wmm_enabled = enable;
2588
2589 return rc;
2590 }
2591
2592 /*
2593 * CMD_MIMO_CONFIG.
2594 */
2595 struct mwl8k_cmd_mimo_config {
2596 struct mwl8k_cmd_pkt header;
2597 __le32 action;
2598 __u8 rx_antenna_map;
2599 __u8 tx_antenna_map;
2600 } __attribute__((packed));
2601
2602 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2603 {
2604 struct mwl8k_cmd_mimo_config *cmd;
2605 int rc;
2606
2607 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2608 if (cmd == NULL)
2609 return -ENOMEM;
2610
2611 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2612 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2613 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2614 cmd->rx_antenna_map = rx;
2615 cmd->tx_antenna_map = tx;
2616
2617 rc = mwl8k_post_cmd(hw, &cmd->header);
2618 kfree(cmd);
2619
2620 return rc;
2621 }
2622
2623 /*
2624 * CMD_USE_FIXED_RATE (STA version).
2625 */
2626 struct mwl8k_cmd_use_fixed_rate_sta {
2627 struct mwl8k_cmd_pkt header;
2628 __le32 action;
2629 __le32 allow_rate_drop;
2630 __le32 num_rates;
2631 struct {
2632 __le32 is_ht_rate;
2633 __le32 enable_retry;
2634 __le32 rate;
2635 __le32 retry_count;
2636 } rate_entry[8];
2637 __le32 rate_type;
2638 __le32 reserved1;
2639 __le32 reserved2;
2640 } __attribute__((packed));
2641
2642 #define MWL8K_USE_AUTO_RATE 0x0002
2643 #define MWL8K_UCAST_RATE 0
2644
2645 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2646 {
2647 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2648 int rc;
2649
2650 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2651 if (cmd == NULL)
2652 return -ENOMEM;
2653
2654 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2655 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2656 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2657 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2658
2659 rc = mwl8k_post_cmd(hw, &cmd->header);
2660 kfree(cmd);
2661
2662 return rc;
2663 }
2664
2665 /*
2666 * CMD_USE_FIXED_RATE (AP version).
2667 */
2668 struct mwl8k_cmd_use_fixed_rate_ap {
2669 struct mwl8k_cmd_pkt header;
2670 __le32 action;
2671 __le32 allow_rate_drop;
2672 __le32 num_rates;
2673 struct mwl8k_rate_entry_ap {
2674 __le32 is_ht_rate;
2675 __le32 enable_retry;
2676 __le32 rate;
2677 __le32 retry_count;
2678 } rate_entry[4];
2679 u8 multicast_rate;
2680 u8 multicast_rate_type;
2681 u8 management_rate;
2682 } __attribute__((packed));
2683
2684 static int
2685 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2686 {
2687 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2688 int rc;
2689
2690 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2691 if (cmd == NULL)
2692 return -ENOMEM;
2693
2694 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2695 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2696 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2697 cmd->multicast_rate = mcast;
2698 cmd->management_rate = mgmt;
2699
2700 rc = mwl8k_post_cmd(hw, &cmd->header);
2701 kfree(cmd);
2702
2703 return rc;
2704 }
2705
2706 /*
2707 * CMD_ENABLE_SNIFFER.
2708 */
2709 struct mwl8k_cmd_enable_sniffer {
2710 struct mwl8k_cmd_pkt header;
2711 __le32 action;
2712 } __attribute__((packed));
2713
2714 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2715 {
2716 struct mwl8k_cmd_enable_sniffer *cmd;
2717 int rc;
2718
2719 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2720 if (cmd == NULL)
2721 return -ENOMEM;
2722
2723 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2724 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2725 cmd->action = cpu_to_le32(!!enable);
2726
2727 rc = mwl8k_post_cmd(hw, &cmd->header);
2728 kfree(cmd);
2729
2730 return rc;
2731 }
2732
2733 /*
2734 * CMD_SET_MAC_ADDR.
2735 */
2736 struct mwl8k_cmd_set_mac_addr {
2737 struct mwl8k_cmd_pkt header;
2738 union {
2739 struct {
2740 __le16 mac_type;
2741 __u8 mac_addr[ETH_ALEN];
2742 } mbss;
2743 __u8 mac_addr[ETH_ALEN];
2744 };
2745 } __attribute__((packed));
2746
2747 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2748 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2749
2750 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2751 {
2752 struct mwl8k_priv *priv = hw->priv;
2753 struct mwl8k_cmd_set_mac_addr *cmd;
2754 int rc;
2755
2756 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2757 if (cmd == NULL)
2758 return -ENOMEM;
2759
2760 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2761 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2762 if (priv->ap_fw) {
2763 cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
2764 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2765 } else {
2766 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2767 }
2768
2769 rc = mwl8k_post_cmd(hw, &cmd->header);
2770 kfree(cmd);
2771
2772 return rc;
2773 }
2774
2775 /*
2776 * CMD_SET_RATEADAPT_MODE.
2777 */
2778 struct mwl8k_cmd_set_rate_adapt_mode {
2779 struct mwl8k_cmd_pkt header;
2780 __le16 action;
2781 __le16 mode;
2782 } __attribute__((packed));
2783
2784 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2785 {
2786 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2787 int rc;
2788
2789 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2790 if (cmd == NULL)
2791 return -ENOMEM;
2792
2793 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2794 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2795 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2796 cmd->mode = cpu_to_le16(mode);
2797
2798 rc = mwl8k_post_cmd(hw, &cmd->header);
2799 kfree(cmd);
2800
2801 return rc;
2802 }
2803
2804 /*
2805 * CMD_BSS_START.
2806 */
2807 struct mwl8k_cmd_bss_start {
2808 struct mwl8k_cmd_pkt header;
2809 __le32 enable;
2810 } __attribute__((packed));
2811
2812 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, int enable)
2813 {
2814 struct mwl8k_cmd_bss_start *cmd;
2815 int rc;
2816
2817 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2818 if (cmd == NULL)
2819 return -ENOMEM;
2820
2821 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2822 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2823 cmd->enable = cpu_to_le32(enable);
2824
2825 rc = mwl8k_post_cmd(hw, &cmd->header);
2826 kfree(cmd);
2827
2828 return rc;
2829 }
2830
2831 /*
2832 * CMD_SET_NEW_STN.
2833 */
2834 struct mwl8k_cmd_set_new_stn {
2835 struct mwl8k_cmd_pkt header;
2836 __le16 aid;
2837 __u8 mac_addr[6];
2838 __le16 stn_id;
2839 __le16 action;
2840 __le16 rsvd;
2841 __le32 legacy_rates;
2842 __u8 ht_rates[4];
2843 __le16 cap_info;
2844 __le16 ht_capabilities_info;
2845 __u8 mac_ht_param_info;
2846 __u8 rev;
2847 __u8 control_channel;
2848 __u8 add_channel;
2849 __le16 op_mode;
2850 __le16 stbc;
2851 __u8 add_qos_info;
2852 __u8 is_qos_sta;
2853 __le32 fw_sta_ptr;
2854 } __attribute__((packed));
2855
2856 #define MWL8K_STA_ACTION_ADD 0
2857 #define MWL8K_STA_ACTION_REMOVE 2
2858
2859 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2860 struct ieee80211_vif *vif,
2861 struct ieee80211_sta *sta)
2862 {
2863 struct mwl8k_cmd_set_new_stn *cmd;
2864 u32 rates;
2865 int rc;
2866
2867 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2868 if (cmd == NULL)
2869 return -ENOMEM;
2870
2871 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2872 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2873 cmd->aid = cpu_to_le16(sta->aid);
2874 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2875 cmd->stn_id = cpu_to_le16(sta->aid);
2876 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2877 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
2878 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
2879 else
2880 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
2881 cmd->legacy_rates = cpu_to_le32(rates);
2882 if (sta->ht_cap.ht_supported) {
2883 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2884 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2885 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2886 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2887 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2888 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2889 ((sta->ht_cap.ampdu_density & 7) << 2);
2890 cmd->is_qos_sta = 1;
2891 }
2892
2893 rc = mwl8k_post_cmd(hw, &cmd->header);
2894 kfree(cmd);
2895
2896 return rc;
2897 }
2898
2899 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2900 struct ieee80211_vif *vif)
2901 {
2902 struct mwl8k_cmd_set_new_stn *cmd;
2903 int rc;
2904
2905 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2906 if (cmd == NULL)
2907 return -ENOMEM;
2908
2909 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2910 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2911 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2912
2913 rc = mwl8k_post_cmd(hw, &cmd->header);
2914 kfree(cmd);
2915
2916 return rc;
2917 }
2918
2919 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2920 struct ieee80211_vif *vif, u8 *addr)
2921 {
2922 struct mwl8k_cmd_set_new_stn *cmd;
2923 int rc;
2924
2925 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2926 if (cmd == NULL)
2927 return -ENOMEM;
2928
2929 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2930 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2931 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2932 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2933
2934 rc = mwl8k_post_cmd(hw, &cmd->header);
2935 kfree(cmd);
2936
2937 return rc;
2938 }
2939
2940 /*
2941 * CMD_UPDATE_STADB.
2942 */
2943 struct ewc_ht_info {
2944 __le16 control1;
2945 __le16 control2;
2946 __le16 control3;
2947 } __attribute__((packed));
2948
2949 struct peer_capability_info {
2950 /* Peer type - AP vs. STA. */
2951 __u8 peer_type;
2952
2953 /* Basic 802.11 capabilities from assoc resp. */
2954 __le16 basic_caps;
2955
2956 /* Set if peer supports 802.11n high throughput (HT). */
2957 __u8 ht_support;
2958
2959 /* Valid if HT is supported. */
2960 __le16 ht_caps;
2961 __u8 extended_ht_caps;
2962 struct ewc_ht_info ewc_info;
2963
2964 /* Legacy rate table. Intersection of our rates and peer rates. */
2965 __u8 legacy_rates[12];
2966
2967 /* HT rate table. Intersection of our rates and peer rates. */
2968 __u8 ht_rates[16];
2969 __u8 pad[16];
2970
2971 /* If set, interoperability mode, no proprietary extensions. */
2972 __u8 interop;
2973 __u8 pad2;
2974 __u8 station_id;
2975 __le16 amsdu_enabled;
2976 } __attribute__((packed));
2977
2978 struct mwl8k_cmd_update_stadb {
2979 struct mwl8k_cmd_pkt header;
2980
2981 /* See STADB_ACTION_TYPE */
2982 __le32 action;
2983
2984 /* Peer MAC address */
2985 __u8 peer_addr[ETH_ALEN];
2986
2987 __le32 reserved;
2988
2989 /* Peer info - valid during add/update. */
2990 struct peer_capability_info peer_info;
2991 } __attribute__((packed));
2992
2993 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2994 #define MWL8K_STA_DB_DEL_ENTRY 2
2995
2996 /* Peer Entry flags - used to define the type of the peer node */
2997 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2998
2999 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3000 struct ieee80211_vif *vif,
3001 struct ieee80211_sta *sta)
3002 {
3003 struct mwl8k_cmd_update_stadb *cmd;
3004 struct peer_capability_info *p;
3005 u32 rates;
3006 int rc;
3007
3008 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3009 if (cmd == NULL)
3010 return -ENOMEM;
3011
3012 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3013 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3014 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3015 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3016
3017 p = &cmd->peer_info;
3018 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3019 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3020 p->ht_support = sta->ht_cap.ht_supported;
3021 p->ht_caps = sta->ht_cap.cap;
3022 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3023 ((sta->ht_cap.ampdu_density & 7) << 2);
3024 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3025 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3026 else
3027 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3028 legacy_rate_mask_to_array(p->legacy_rates, rates);
3029 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3030 p->interop = 1;
3031 p->amsdu_enabled = 0;
3032
3033 rc = mwl8k_post_cmd(hw, &cmd->header);
3034 kfree(cmd);
3035
3036 return rc ? rc : p->station_id;
3037 }
3038
3039 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3040 struct ieee80211_vif *vif, u8 *addr)
3041 {
3042 struct mwl8k_cmd_update_stadb *cmd;
3043 int rc;
3044
3045 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3046 if (cmd == NULL)
3047 return -ENOMEM;
3048
3049 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3050 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3051 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3052 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3053
3054 rc = mwl8k_post_cmd(hw, &cmd->header);
3055 kfree(cmd);
3056
3057 return rc;
3058 }
3059
3060
3061 /*
3062 * Interrupt handling.
3063 */
3064 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3065 {
3066 struct ieee80211_hw *hw = dev_id;
3067 struct mwl8k_priv *priv = hw->priv;
3068 u32 status;
3069
3070 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3071 if (!status)
3072 return IRQ_NONE;
3073
3074 if (status & MWL8K_A2H_INT_TX_DONE) {
3075 status &= ~MWL8K_A2H_INT_TX_DONE;
3076 tasklet_schedule(&priv->poll_tx_task);
3077 }
3078
3079 if (status & MWL8K_A2H_INT_RX_READY) {
3080 status &= ~MWL8K_A2H_INT_RX_READY;
3081 tasklet_schedule(&priv->poll_rx_task);
3082 }
3083
3084 if (status)
3085 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3086
3087 if (status & MWL8K_A2H_INT_OPC_DONE) {
3088 if (priv->hostcmd_wait != NULL)
3089 complete(priv->hostcmd_wait);
3090 }
3091
3092 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3093 if (!mutex_is_locked(&priv->fw_mutex) &&
3094 priv->radio_on && priv->pending_tx_pkts)
3095 mwl8k_tx_start(priv);
3096 }
3097
3098 return IRQ_HANDLED;
3099 }
3100
3101 static void mwl8k_tx_poll(unsigned long data)
3102 {
3103 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3104 struct mwl8k_priv *priv = hw->priv;
3105 int limit;
3106 int i;
3107
3108 limit = 32;
3109
3110 spin_lock_bh(&priv->tx_lock);
3111
3112 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3113 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3114
3115 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3116 complete(priv->tx_wait);
3117 priv->tx_wait = NULL;
3118 }
3119
3120 spin_unlock_bh(&priv->tx_lock);
3121
3122 if (limit) {
3123 writel(~MWL8K_A2H_INT_TX_DONE,
3124 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3125 } else {
3126 tasklet_schedule(&priv->poll_tx_task);
3127 }
3128 }
3129
3130 static void mwl8k_rx_poll(unsigned long data)
3131 {
3132 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3133 struct mwl8k_priv *priv = hw->priv;
3134 int limit;
3135
3136 limit = 32;
3137 limit -= rxq_process(hw, 0, limit);
3138 limit -= rxq_refill(hw, 0, limit);
3139
3140 if (limit) {
3141 writel(~MWL8K_A2H_INT_RX_READY,
3142 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3143 } else {
3144 tasklet_schedule(&priv->poll_rx_task);
3145 }
3146 }
3147
3148
3149 /*
3150 * Core driver operations.
3151 */
3152 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3153 {
3154 struct mwl8k_priv *priv = hw->priv;
3155 int index = skb_get_queue_mapping(skb);
3156 int rc;
3157
3158 if (!priv->radio_on) {
3159 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3160 "disabled\n", wiphy_name(hw->wiphy));
3161 dev_kfree_skb(skb);
3162 return NETDEV_TX_OK;
3163 }
3164
3165 rc = mwl8k_txq_xmit(hw, index, skb);
3166
3167 return rc;
3168 }
3169
3170 static int mwl8k_start(struct ieee80211_hw *hw)
3171 {
3172 struct mwl8k_priv *priv = hw->priv;
3173 int rc;
3174
3175 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3176 IRQF_SHARED, MWL8K_NAME, hw);
3177 if (rc) {
3178 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3179 wiphy_name(hw->wiphy));
3180 return -EIO;
3181 }
3182
3183 /* Enable TX reclaim and RX tasklets. */
3184 tasklet_enable(&priv->poll_tx_task);
3185 tasklet_enable(&priv->poll_rx_task);
3186
3187 /* Enable interrupts */
3188 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3189
3190 rc = mwl8k_fw_lock(hw);
3191 if (!rc) {
3192 rc = mwl8k_cmd_radio_enable(hw);
3193
3194 if (!priv->ap_fw) {
3195 if (!rc)
3196 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3197
3198 if (!rc)
3199 rc = mwl8k_cmd_set_pre_scan(hw);
3200
3201 if (!rc)
3202 rc = mwl8k_cmd_set_post_scan(hw,
3203 "\x00\x00\x00\x00\x00\x00");
3204 }
3205
3206 if (!rc)
3207 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3208
3209 if (!rc)
3210 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3211
3212 mwl8k_fw_unlock(hw);
3213 }
3214
3215 if (rc) {
3216 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3217 free_irq(priv->pdev->irq, hw);
3218 tasklet_disable(&priv->poll_tx_task);
3219 tasklet_disable(&priv->poll_rx_task);
3220 }
3221
3222 return rc;
3223 }
3224
3225 static void mwl8k_stop(struct ieee80211_hw *hw)
3226 {
3227 struct mwl8k_priv *priv = hw->priv;
3228 int i;
3229
3230 mwl8k_cmd_radio_disable(hw);
3231
3232 ieee80211_stop_queues(hw);
3233
3234 /* Disable interrupts */
3235 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3236 free_irq(priv->pdev->irq, hw);
3237
3238 /* Stop finalize join worker */
3239 cancel_work_sync(&priv->finalize_join_worker);
3240 if (priv->beacon_skb != NULL)
3241 dev_kfree_skb(priv->beacon_skb);
3242
3243 /* Stop TX reclaim and RX tasklets. */
3244 tasklet_disable(&priv->poll_tx_task);
3245 tasklet_disable(&priv->poll_rx_task);
3246
3247 /* Return all skbs to mac80211 */
3248 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3249 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3250 }
3251
3252 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3253 struct ieee80211_vif *vif)
3254 {
3255 struct mwl8k_priv *priv = hw->priv;
3256 struct mwl8k_vif *mwl8k_vif;
3257
3258 /*
3259 * We only support one active interface at a time.
3260 */
3261 if (!list_empty(&priv->vif_list))
3262 return -EBUSY;
3263
3264 /*
3265 * Reject interface creation if sniffer mode is active, as
3266 * STA operation is mutually exclusive with hardware sniffer
3267 * mode. (Sniffer mode is only used on STA firmware.)
3268 */
3269 if (priv->sniffer_enabled) {
3270 printk(KERN_INFO "%s: unable to create STA "
3271 "interface due to sniffer mode being enabled\n",
3272 wiphy_name(hw->wiphy));
3273 return -EINVAL;
3274 }
3275
3276 /* Set the mac address. */
3277 mwl8k_cmd_set_mac_addr(hw, vif->addr);
3278
3279 if (priv->ap_fw)
3280 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3281
3282 /* Setup driver private area. */
3283 mwl8k_vif = MWL8K_VIF(vif);
3284 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3285 mwl8k_vif->vif = vif;
3286 mwl8k_vif->seqno = 0;
3287
3288 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3289
3290 return 0;
3291 }
3292
3293 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3294 struct ieee80211_vif *vif)
3295 {
3296 struct mwl8k_priv *priv = hw->priv;
3297 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3298
3299 if (priv->ap_fw)
3300 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3301
3302 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3303
3304 list_del(&mwl8k_vif->list);
3305 }
3306
3307 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3308 {
3309 struct ieee80211_conf *conf = &hw->conf;
3310 struct mwl8k_priv *priv = hw->priv;
3311 int rc;
3312
3313 if (conf->flags & IEEE80211_CONF_IDLE) {
3314 mwl8k_cmd_radio_disable(hw);
3315 return 0;
3316 }
3317
3318 rc = mwl8k_fw_lock(hw);
3319 if (rc)
3320 return rc;
3321
3322 rc = mwl8k_cmd_radio_enable(hw);
3323 if (rc)
3324 goto out;
3325
3326 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3327 if (rc)
3328 goto out;
3329
3330 if (conf->power_level > 18)
3331 conf->power_level = 18;
3332 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3333 if (rc)
3334 goto out;
3335
3336 if (priv->ap_fw) {
3337 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3338 if (!rc)
3339 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3340 } else {
3341 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3342 }
3343
3344 out:
3345 mwl8k_fw_unlock(hw);
3346
3347 return rc;
3348 }
3349
3350 static void
3351 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3352 struct ieee80211_bss_conf *info, u32 changed)
3353 {
3354 struct mwl8k_priv *priv = hw->priv;
3355 u32 ap_legacy_rates;
3356 u8 ap_mcs_rates[16];
3357 int rc;
3358
3359 if (mwl8k_fw_lock(hw))
3360 return;
3361
3362 /*
3363 * No need to capture a beacon if we're no longer associated.
3364 */
3365 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3366 priv->capture_beacon = false;
3367
3368 /*
3369 * Get the AP's legacy and MCS rates.
3370 */
3371 if (vif->bss_conf.assoc) {
3372 struct ieee80211_sta *ap;
3373
3374 rcu_read_lock();
3375
3376 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3377 if (ap == NULL) {
3378 rcu_read_unlock();
3379 goto out;
3380 }
3381
3382 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3383 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3384 } else {
3385 ap_legacy_rates =
3386 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3387 }
3388 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3389
3390 rcu_read_unlock();
3391 }
3392
3393 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3394 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3395 if (rc)
3396 goto out;
3397
3398 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3399 if (rc)
3400 goto out;
3401 }
3402
3403 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3404 rc = mwl8k_set_radio_preamble(hw,
3405 vif->bss_conf.use_short_preamble);
3406 if (rc)
3407 goto out;
3408 }
3409
3410 if (changed & BSS_CHANGED_ERP_SLOT) {
3411 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3412 if (rc)
3413 goto out;
3414 }
3415
3416 if (vif->bss_conf.assoc &&
3417 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3418 BSS_CHANGED_HT))) {
3419 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3420 if (rc)
3421 goto out;
3422 }
3423
3424 if (vif->bss_conf.assoc &&
3425 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3426 /*
3427 * Finalize the join. Tell rx handler to process
3428 * next beacon from our BSSID.
3429 */
3430 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3431 priv->capture_beacon = true;
3432 }
3433
3434 out:
3435 mwl8k_fw_unlock(hw);
3436 }
3437
3438 static void
3439 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3440 struct ieee80211_bss_conf *info, u32 changed)
3441 {
3442 int rc;
3443
3444 if (mwl8k_fw_lock(hw))
3445 return;
3446
3447 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3448 rc = mwl8k_set_radio_preamble(hw,
3449 vif->bss_conf.use_short_preamble);
3450 if (rc)
3451 goto out;
3452 }
3453
3454 if (changed & BSS_CHANGED_BASIC_RATES) {
3455 int idx;
3456 int rate;
3457
3458 /*
3459 * Use lowest supported basic rate for multicasts
3460 * and management frames (such as probe responses --
3461 * beacons will always go out at 1 Mb/s).
3462 */
3463 idx = ffs(vif->bss_conf.basic_rates);
3464 if (idx)
3465 idx--;
3466
3467 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3468 rate = mwl8k_rates_24[idx].hw_value;
3469 else
3470 rate = mwl8k_rates_50[idx].hw_value;
3471
3472 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3473 }
3474
3475 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3476 struct sk_buff *skb;
3477
3478 skb = ieee80211_beacon_get(hw, vif);
3479 if (skb != NULL) {
3480 mwl8k_cmd_set_beacon(hw, skb->data, skb->len);
3481 kfree_skb(skb);
3482 }
3483 }
3484
3485 if (changed & BSS_CHANGED_BEACON_ENABLED)
3486 mwl8k_cmd_bss_start(hw, info->enable_beacon);
3487
3488 out:
3489 mwl8k_fw_unlock(hw);
3490 }
3491
3492 static void
3493 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3494 struct ieee80211_bss_conf *info, u32 changed)
3495 {
3496 struct mwl8k_priv *priv = hw->priv;
3497
3498 if (!priv->ap_fw)
3499 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3500 else
3501 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3502 }
3503
3504 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3505 int mc_count, struct dev_addr_list *mclist)
3506 {
3507 struct mwl8k_cmd_pkt *cmd;
3508
3509 /*
3510 * Synthesize and return a command packet that programs the
3511 * hardware multicast address filter. At this point we don't
3512 * know whether FIF_ALLMULTI is being requested, but if it is,
3513 * we'll end up throwing this packet away and creating a new
3514 * one in mwl8k_configure_filter().
3515 */
3516 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3517
3518 return (unsigned long)cmd;
3519 }
3520
3521 static int
3522 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3523 unsigned int changed_flags,
3524 unsigned int *total_flags)
3525 {
3526 struct mwl8k_priv *priv = hw->priv;
3527
3528 /*
3529 * Hardware sniffer mode is mutually exclusive with STA
3530 * operation, so refuse to enable sniffer mode if a STA
3531 * interface is active.
3532 */
3533 if (!list_empty(&priv->vif_list)) {
3534 if (net_ratelimit())
3535 printk(KERN_INFO "%s: not enabling sniffer "
3536 "mode because STA interface is active\n",
3537 wiphy_name(hw->wiphy));
3538 return 0;
3539 }
3540
3541 if (!priv->sniffer_enabled) {
3542 if (mwl8k_cmd_enable_sniffer(hw, 1))
3543 return 0;
3544 priv->sniffer_enabled = true;
3545 }
3546
3547 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3548 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3549 FIF_OTHER_BSS;
3550
3551 return 1;
3552 }
3553
3554 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3555 {
3556 if (!list_empty(&priv->vif_list))
3557 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3558
3559 return NULL;
3560 }
3561
3562 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3563 unsigned int changed_flags,
3564 unsigned int *total_flags,
3565 u64 multicast)
3566 {
3567 struct mwl8k_priv *priv = hw->priv;
3568 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3569
3570 /*
3571 * AP firmware doesn't allow fine-grained control over
3572 * the receive filter.
3573 */
3574 if (priv->ap_fw) {
3575 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3576 kfree(cmd);
3577 return;
3578 }
3579
3580 /*
3581 * Enable hardware sniffer mode if FIF_CONTROL or
3582 * FIF_OTHER_BSS is requested.
3583 */
3584 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3585 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3586 kfree(cmd);
3587 return;
3588 }
3589
3590 /* Clear unsupported feature flags */
3591 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3592
3593 if (mwl8k_fw_lock(hw)) {
3594 kfree(cmd);
3595 return;
3596 }
3597
3598 if (priv->sniffer_enabled) {
3599 mwl8k_cmd_enable_sniffer(hw, 0);
3600 priv->sniffer_enabled = false;
3601 }
3602
3603 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3604 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3605 /*
3606 * Disable the BSS filter.
3607 */
3608 mwl8k_cmd_set_pre_scan(hw);
3609 } else {
3610 struct mwl8k_vif *mwl8k_vif;
3611 const u8 *bssid;
3612
3613 /*
3614 * Enable the BSS filter.
3615 *
3616 * If there is an active STA interface, use that
3617 * interface's BSSID, otherwise use a dummy one
3618 * (where the OUI part needs to be nonzero for
3619 * the BSSID to be accepted by POST_SCAN).
3620 */
3621 mwl8k_vif = mwl8k_first_vif(priv);
3622 if (mwl8k_vif != NULL)
3623 bssid = mwl8k_vif->vif->bss_conf.bssid;
3624 else
3625 bssid = "\x01\x00\x00\x00\x00\x00";
3626
3627 mwl8k_cmd_set_post_scan(hw, bssid);
3628 }
3629 }
3630
3631 /*
3632 * If FIF_ALLMULTI is being requested, throw away the command
3633 * packet that ->prepare_multicast() built and replace it with
3634 * a command packet that enables reception of all multicast
3635 * packets.
3636 */
3637 if (*total_flags & FIF_ALLMULTI) {
3638 kfree(cmd);
3639 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3640 }
3641
3642 if (cmd != NULL) {
3643 mwl8k_post_cmd(hw, cmd);
3644 kfree(cmd);
3645 }
3646
3647 mwl8k_fw_unlock(hw);
3648 }
3649
3650 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3651 {
3652 return mwl8k_cmd_set_rts_threshold(hw, value);
3653 }
3654
3655 struct mwl8k_sta_notify_item
3656 {
3657 struct list_head list;
3658 struct ieee80211_vif *vif;
3659 enum sta_notify_cmd cmd;
3660 struct ieee80211_sta sta;
3661 };
3662
3663 static void
3664 mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
3665 {
3666 struct mwl8k_priv *priv = hw->priv;
3667
3668 /*
3669 * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
3670 */
3671 if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3672 int rc;
3673
3674 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3675 if (rc >= 0) {
3676 struct ieee80211_sta *sta;
3677
3678 rcu_read_lock();
3679 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3680 if (sta != NULL)
3681 MWL8K_STA(sta)->peer_id = rc;
3682 rcu_read_unlock();
3683 }
3684 } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3685 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3686 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3687 mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
3688 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3689 mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
3690 }
3691 }
3692
3693 static void mwl8k_sta_notify_worker(struct work_struct *work)
3694 {
3695 struct mwl8k_priv *priv =
3696 container_of(work, struct mwl8k_priv, sta_notify_worker);
3697 struct ieee80211_hw *hw = priv->hw;
3698
3699 spin_lock_bh(&priv->sta_notify_list_lock);
3700 while (!list_empty(&priv->sta_notify_list)) {
3701 struct mwl8k_sta_notify_item *s;
3702
3703 s = list_entry(priv->sta_notify_list.next,
3704 struct mwl8k_sta_notify_item, list);
3705 list_del(&s->list);
3706
3707 spin_unlock_bh(&priv->sta_notify_list_lock);
3708
3709 mwl8k_do_sta_notify(hw, s);
3710 kfree(s);
3711
3712 spin_lock_bh(&priv->sta_notify_list_lock);
3713 }
3714 spin_unlock_bh(&priv->sta_notify_list_lock);
3715 }
3716
3717 static void
3718 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3719 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3720 {
3721 struct mwl8k_priv *priv = hw->priv;
3722 struct mwl8k_sta_notify_item *s;
3723
3724 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3725 return;
3726
3727 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3728 if (s != NULL) {
3729 s->vif = vif;
3730 s->cmd = cmd;
3731 s->sta = *sta;
3732
3733 spin_lock(&priv->sta_notify_list_lock);
3734 list_add_tail(&s->list, &priv->sta_notify_list);
3735 spin_unlock(&priv->sta_notify_list_lock);
3736
3737 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3738 }
3739 }
3740
3741 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3742 const struct ieee80211_tx_queue_params *params)
3743 {
3744 struct mwl8k_priv *priv = hw->priv;
3745 int rc;
3746
3747 rc = mwl8k_fw_lock(hw);
3748 if (!rc) {
3749 if (!priv->wmm_enabled)
3750 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3751
3752 if (!rc)
3753 rc = mwl8k_cmd_set_edca_params(hw, queue,
3754 params->cw_min,
3755 params->cw_max,
3756 params->aifs,
3757 params->txop);
3758
3759 mwl8k_fw_unlock(hw);
3760 }
3761
3762 return rc;
3763 }
3764
3765 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3766 struct ieee80211_tx_queue_stats *stats)
3767 {
3768 struct mwl8k_priv *priv = hw->priv;
3769 struct mwl8k_tx_queue *txq;
3770 int index;
3771
3772 spin_lock_bh(&priv->tx_lock);
3773 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3774 txq = priv->txq + index;
3775 memcpy(&stats[index], &txq->stats,
3776 sizeof(struct ieee80211_tx_queue_stats));
3777 }
3778 spin_unlock_bh(&priv->tx_lock);
3779
3780 return 0;
3781 }
3782
3783 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3784 struct ieee80211_low_level_stats *stats)
3785 {
3786 return mwl8k_cmd_get_stat(hw, stats);
3787 }
3788
3789 static int
3790 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3791 enum ieee80211_ampdu_mlme_action action,
3792 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3793 {
3794 switch (action) {
3795 case IEEE80211_AMPDU_RX_START:
3796 case IEEE80211_AMPDU_RX_STOP:
3797 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3798 return -ENOTSUPP;
3799 return 0;
3800 default:
3801 return -ENOTSUPP;
3802 }
3803 }
3804
3805 static const struct ieee80211_ops mwl8k_ops = {
3806 .tx = mwl8k_tx,
3807 .start = mwl8k_start,
3808 .stop = mwl8k_stop,
3809 .add_interface = mwl8k_add_interface,
3810 .remove_interface = mwl8k_remove_interface,
3811 .config = mwl8k_config,
3812 .bss_info_changed = mwl8k_bss_info_changed,
3813 .prepare_multicast = mwl8k_prepare_multicast,
3814 .configure_filter = mwl8k_configure_filter,
3815 .set_rts_threshold = mwl8k_set_rts_threshold,
3816 .sta_notify = mwl8k_sta_notify,
3817 .conf_tx = mwl8k_conf_tx,
3818 .get_tx_stats = mwl8k_get_tx_stats,
3819 .get_stats = mwl8k_get_stats,
3820 .ampdu_action = mwl8k_ampdu_action,
3821 };
3822
3823 static void mwl8k_finalize_join_worker(struct work_struct *work)
3824 {
3825 struct mwl8k_priv *priv =
3826 container_of(work, struct mwl8k_priv, finalize_join_worker);
3827 struct sk_buff *skb = priv->beacon_skb;
3828 struct mwl8k_vif *mwl8k_vif;
3829
3830 mwl8k_vif = mwl8k_first_vif(priv);
3831 if (mwl8k_vif != NULL)
3832 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3833 mwl8k_vif->vif->bss_conf.dtim_period);
3834
3835 dev_kfree_skb(skb);
3836 priv->beacon_skb = NULL;
3837 }
3838
3839 enum {
3840 MWL8363 = 0,
3841 MWL8687,
3842 MWL8366,
3843 };
3844
3845 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3846 [MWL8363] = {
3847 .part_name = "88w8363",
3848 .helper_image = "mwl8k/helper_8363.fw",
3849 .fw_image = "mwl8k/fmimage_8363.fw",
3850 },
3851 [MWL8687] = {
3852 .part_name = "88w8687",
3853 .helper_image = "mwl8k/helper_8687.fw",
3854 .fw_image = "mwl8k/fmimage_8687.fw",
3855 },
3856 [MWL8366] = {
3857 .part_name = "88w8366",
3858 .helper_image = "mwl8k/helper_8366.fw",
3859 .fw_image = "mwl8k/fmimage_8366.fw",
3860 .ap_rxd_ops = &rxd_8366_ap_ops,
3861 },
3862 };
3863
3864 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3865 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3866 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3867 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3868 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3869 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3870
3871 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3872 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3873 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3874 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3875 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3876 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3877 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3878 { },
3879 };
3880 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3881
3882 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3883 const struct pci_device_id *id)
3884 {
3885 static int printed_version = 0;
3886 struct ieee80211_hw *hw;
3887 struct mwl8k_priv *priv;
3888 int rc;
3889 int i;
3890
3891 if (!printed_version) {
3892 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3893 printed_version = 1;
3894 }
3895
3896
3897 rc = pci_enable_device(pdev);
3898 if (rc) {
3899 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3900 MWL8K_NAME);
3901 return rc;
3902 }
3903
3904 rc = pci_request_regions(pdev, MWL8K_NAME);
3905 if (rc) {
3906 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3907 MWL8K_NAME);
3908 goto err_disable_device;
3909 }
3910
3911 pci_set_master(pdev);
3912
3913
3914 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3915 if (hw == NULL) {
3916 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3917 rc = -ENOMEM;
3918 goto err_free_reg;
3919 }
3920
3921 SET_IEEE80211_DEV(hw, &pdev->dev);
3922 pci_set_drvdata(pdev, hw);
3923
3924 priv = hw->priv;
3925 priv->hw = hw;
3926 priv->pdev = pdev;
3927 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3928
3929
3930 priv->sram = pci_iomap(pdev, 0, 0x10000);
3931 if (priv->sram == NULL) {
3932 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3933 wiphy_name(hw->wiphy));
3934 goto err_iounmap;
3935 }
3936
3937 /*
3938 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3939 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3940 */
3941 priv->regs = pci_iomap(pdev, 1, 0x10000);
3942 if (priv->regs == NULL) {
3943 priv->regs = pci_iomap(pdev, 2, 0x10000);
3944 if (priv->regs == NULL) {
3945 printk(KERN_ERR "%s: Cannot map device registers\n",
3946 wiphy_name(hw->wiphy));
3947 goto err_iounmap;
3948 }
3949 }
3950
3951
3952 /* Reset firmware and hardware */
3953 mwl8k_hw_reset(priv);
3954
3955 /* Ask userland hotplug daemon for the device firmware */
3956 rc = mwl8k_request_firmware(priv);
3957 if (rc) {
3958 printk(KERN_ERR "%s: Firmware files not found\n",
3959 wiphy_name(hw->wiphy));
3960 goto err_stop_firmware;
3961 }
3962
3963 /* Load firmware into hardware */
3964 rc = mwl8k_load_firmware(hw);
3965 if (rc) {
3966 printk(KERN_ERR "%s: Cannot start firmware\n",
3967 wiphy_name(hw->wiphy));
3968 goto err_stop_firmware;
3969 }
3970
3971 /* Reclaim memory once firmware is successfully loaded */
3972 mwl8k_release_firmware(priv);
3973
3974
3975 if (priv->ap_fw) {
3976 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3977 if (priv->rxd_ops == NULL) {
3978 printk(KERN_ERR "%s: Driver does not have AP "
3979 "firmware image support for this hardware\n",
3980 wiphy_name(hw->wiphy));
3981 goto err_stop_firmware;
3982 }
3983 } else {
3984 priv->rxd_ops = &rxd_sta_ops;
3985 }
3986
3987 priv->sniffer_enabled = false;
3988 priv->wmm_enabled = false;
3989 priv->pending_tx_pkts = 0;
3990
3991
3992 /*
3993 * Extra headroom is the size of the required DMA header
3994 * minus the size of the smallest 802.11 frame (CTS frame).
3995 */
3996 hw->extra_tx_headroom =
3997 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3998
3999 hw->channel_change_time = 10;
4000
4001 hw->queues = MWL8K_TX_QUEUES;
4002
4003 /* Set rssi and noise values to dBm */
4004 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
4005 hw->vif_data_size = sizeof(struct mwl8k_vif);
4006 hw->sta_data_size = sizeof(struct mwl8k_sta);
4007
4008 INIT_LIST_HEAD(&priv->vif_list);
4009
4010 /* Set default radio state and preamble */
4011 priv->radio_on = 0;
4012 priv->radio_short_preamble = 0;
4013
4014 /* Station database handling */
4015 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
4016 spin_lock_init(&priv->sta_notify_list_lock);
4017 INIT_LIST_HEAD(&priv->sta_notify_list);
4018
4019 /* Finalize join worker */
4020 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4021
4022 /* TX reclaim and RX tasklets. */
4023 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4024 tasklet_disable(&priv->poll_tx_task);
4025 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4026 tasklet_disable(&priv->poll_rx_task);
4027
4028 /* Power management cookie */
4029 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4030 if (priv->cookie == NULL)
4031 goto err_stop_firmware;
4032
4033 rc = mwl8k_rxq_init(hw, 0);
4034 if (rc)
4035 goto err_free_cookie;
4036 rxq_refill(hw, 0, INT_MAX);
4037
4038 mutex_init(&priv->fw_mutex);
4039 priv->fw_mutex_owner = NULL;
4040 priv->fw_mutex_depth = 0;
4041 priv->hostcmd_wait = NULL;
4042
4043 spin_lock_init(&priv->tx_lock);
4044
4045 priv->tx_wait = NULL;
4046
4047 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4048 rc = mwl8k_txq_init(hw, i);
4049 if (rc)
4050 goto err_free_queues;
4051 }
4052
4053 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4054 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4055 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4056 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4057 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4058
4059 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4060 IRQF_SHARED, MWL8K_NAME, hw);
4061 if (rc) {
4062 printk(KERN_ERR "%s: failed to register IRQ handler\n",
4063 wiphy_name(hw->wiphy));
4064 goto err_free_queues;
4065 }
4066
4067 /*
4068 * Temporarily enable interrupts. Initial firmware host
4069 * commands use interrupts and avoid polling. Disable
4070 * interrupts when done.
4071 */
4072 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4073
4074 /* Get config data, mac addrs etc */
4075 if (priv->ap_fw) {
4076 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4077 if (!rc)
4078 rc = mwl8k_cmd_set_hw_spec(hw);
4079
4080 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
4081 } else {
4082 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4083
4084 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
4085 }
4086 if (rc) {
4087 printk(KERN_ERR "%s: Cannot initialise firmware\n",
4088 wiphy_name(hw->wiphy));
4089 goto err_free_irq;
4090 }
4091
4092 /* Turn radio off */
4093 rc = mwl8k_cmd_radio_disable(hw);
4094 if (rc) {
4095 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
4096 goto err_free_irq;
4097 }
4098
4099 /* Clear MAC address */
4100 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
4101 if (rc) {
4102 printk(KERN_ERR "%s: Cannot clear MAC address\n",
4103 wiphy_name(hw->wiphy));
4104 goto err_free_irq;
4105 }
4106
4107 /* Disable interrupts */
4108 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4109 free_irq(priv->pdev->irq, hw);
4110
4111 rc = ieee80211_register_hw(hw);
4112 if (rc) {
4113 printk(KERN_ERR "%s: Cannot register device\n",
4114 wiphy_name(hw->wiphy));
4115 goto err_free_queues;
4116 }
4117
4118 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
4119 wiphy_name(hw->wiphy), priv->device_info->part_name,
4120 priv->hw_rev, hw->wiphy->perm_addr,
4121 priv->ap_fw ? "AP" : "STA",
4122 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4123 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4124
4125 return 0;
4126
4127 err_free_irq:
4128 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4129 free_irq(priv->pdev->irq, hw);
4130
4131 err_free_queues:
4132 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4133 mwl8k_txq_deinit(hw, i);
4134 mwl8k_rxq_deinit(hw, 0);
4135
4136 err_free_cookie:
4137 if (priv->cookie != NULL)
4138 pci_free_consistent(priv->pdev, 4,
4139 priv->cookie, priv->cookie_dma);
4140
4141 err_stop_firmware:
4142 mwl8k_hw_reset(priv);
4143 mwl8k_release_firmware(priv);
4144
4145 err_iounmap:
4146 if (priv->regs != NULL)
4147 pci_iounmap(pdev, priv->regs);
4148
4149 if (priv->sram != NULL)
4150 pci_iounmap(pdev, priv->sram);
4151
4152 pci_set_drvdata(pdev, NULL);
4153 ieee80211_free_hw(hw);
4154
4155 err_free_reg:
4156 pci_release_regions(pdev);
4157
4158 err_disable_device:
4159 pci_disable_device(pdev);
4160
4161 return rc;
4162 }
4163
4164 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4165 {
4166 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4167 }
4168
4169 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4170 {
4171 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4172 struct mwl8k_priv *priv;
4173 int i;
4174
4175 if (hw == NULL)
4176 return;
4177 priv = hw->priv;
4178
4179 ieee80211_stop_queues(hw);
4180
4181 ieee80211_unregister_hw(hw);
4182
4183 /* Remove TX reclaim and RX tasklets. */
4184 tasklet_kill(&priv->poll_tx_task);
4185 tasklet_kill(&priv->poll_rx_task);
4186
4187 /* Stop hardware */
4188 mwl8k_hw_reset(priv);
4189
4190 /* Return all skbs to mac80211 */
4191 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4192 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4193
4194 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4195 mwl8k_txq_deinit(hw, i);
4196
4197 mwl8k_rxq_deinit(hw, 0);
4198
4199 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4200
4201 pci_iounmap(pdev, priv->regs);
4202 pci_iounmap(pdev, priv->sram);
4203 pci_set_drvdata(pdev, NULL);
4204 ieee80211_free_hw(hw);
4205 pci_release_regions(pdev);
4206 pci_disable_device(pdev);
4207 }
4208
4209 static struct pci_driver mwl8k_driver = {
4210 .name = MWL8K_NAME,
4211 .id_table = mwl8k_pci_id_table,
4212 .probe = mwl8k_probe,
4213 .remove = __devexit_p(mwl8k_remove),
4214 .shutdown = __devexit_p(mwl8k_shutdown),
4215 };
4216
4217 static int __init mwl8k_init(void)
4218 {
4219 return pci_register_driver(&mwl8k_driver);
4220 }
4221
4222 static void __exit mwl8k_exit(void)
4223 {
4224 pci_unregister_driver(&mwl8k_driver);
4225 }
4226
4227 module_init(mwl8k_init);
4228 module_exit(mwl8k_exit);
4229
4230 MODULE_DESCRIPTION(MWL8K_DESC);
4231 MODULE_VERSION(MWL8K_VERSION);
4232 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4233 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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