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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/kaber/nf-next-2.6
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
1 /*
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27 #include <linux/delay.h>
28 #include <linux/etherdevice.h>
29 #include <linux/init.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/usb.h>
34
35 #include "rt2x00.h"
36 #include "rt2x00usb.h"
37 #include "rt2500usb.h"
38
39 /*
40 * Allow hardware encryption to be disabled.
41 */
42 static int modparam_nohwcrypt = 0;
43 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
44 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
45
46 /*
47 * Register access.
48 * All access to the CSR registers will go through the methods
49 * rt2500usb_register_read and rt2500usb_register_write.
50 * BBP and RF register require indirect register access,
51 * and use the CSR registers BBPCSR and RFCSR to achieve this.
52 * These indirect registers work with busy bits,
53 * and we will try maximal REGISTER_BUSY_COUNT times to access
54 * the register while taking a REGISTER_BUSY_DELAY us delay
55 * between each attampt. When the busy bit is still set at that time,
56 * the access attempt is considered to have failed,
57 * and we will print an error.
58 * If the csr_mutex is already held then the _lock variants must
59 * be used instead.
60 */
61 static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
62 const unsigned int offset,
63 u16 *value)
64 {
65 __le16 reg;
66 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
67 USB_VENDOR_REQUEST_IN, offset,
68 &reg, sizeof(reg), REGISTER_TIMEOUT);
69 *value = le16_to_cpu(reg);
70 }
71
72 static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
73 const unsigned int offset,
74 u16 *value)
75 {
76 __le16 reg;
77 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
78 USB_VENDOR_REQUEST_IN, offset,
79 &reg, sizeof(reg), REGISTER_TIMEOUT);
80 *value = le16_to_cpu(reg);
81 }
82
83 static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
84 const unsigned int offset,
85 void *value, const u16 length)
86 {
87 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
88 USB_VENDOR_REQUEST_IN, offset,
89 value, length,
90 REGISTER_TIMEOUT16(length));
91 }
92
93 static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
94 const unsigned int offset,
95 u16 value)
96 {
97 __le16 reg = cpu_to_le16(value);
98 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
99 USB_VENDOR_REQUEST_OUT, offset,
100 &reg, sizeof(reg), REGISTER_TIMEOUT);
101 }
102
103 static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
104 const unsigned int offset,
105 u16 value)
106 {
107 __le16 reg = cpu_to_le16(value);
108 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
109 USB_VENDOR_REQUEST_OUT, offset,
110 &reg, sizeof(reg), REGISTER_TIMEOUT);
111 }
112
113 static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
114 const unsigned int offset,
115 void *value, const u16 length)
116 {
117 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
118 USB_VENDOR_REQUEST_OUT, offset,
119 value, length,
120 REGISTER_TIMEOUT16(length));
121 }
122
123 static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
124 const unsigned int offset,
125 struct rt2x00_field16 field,
126 u16 *reg)
127 {
128 unsigned int i;
129
130 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
131 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
132 if (!rt2x00_get_field16(*reg, field))
133 return 1;
134 udelay(REGISTER_BUSY_DELAY);
135 }
136
137 ERROR(rt2x00dev, "Indirect register access failed: "
138 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
139 *reg = ~0;
140
141 return 0;
142 }
143
144 #define WAIT_FOR_BBP(__dev, __reg) \
145 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
146 #define WAIT_FOR_RF(__dev, __reg) \
147 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
148
149 static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
150 const unsigned int word, const u8 value)
151 {
152 u16 reg;
153
154 mutex_lock(&rt2x00dev->csr_mutex);
155
156 /*
157 * Wait until the BBP becomes available, afterwards we
158 * can safely write the new data into the register.
159 */
160 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
161 reg = 0;
162 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
163 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
164 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
165
166 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
167 }
168
169 mutex_unlock(&rt2x00dev->csr_mutex);
170 }
171
172 static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
173 const unsigned int word, u8 *value)
174 {
175 u16 reg;
176
177 mutex_lock(&rt2x00dev->csr_mutex);
178
179 /*
180 * Wait until the BBP becomes available, afterwards we
181 * can safely write the read request into the register.
182 * After the data has been written, we wait until hardware
183 * returns the correct value, if at any time the register
184 * doesn't become available in time, reg will be 0xffffffff
185 * which means we return 0xff to the caller.
186 */
187 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
188 reg = 0;
189 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
190 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
191
192 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
193
194 if (WAIT_FOR_BBP(rt2x00dev, &reg))
195 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
196 }
197
198 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
199
200 mutex_unlock(&rt2x00dev->csr_mutex);
201 }
202
203 static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
204 const unsigned int word, const u32 value)
205 {
206 u16 reg;
207
208 mutex_lock(&rt2x00dev->csr_mutex);
209
210 /*
211 * Wait until the RF becomes available, afterwards we
212 * can safely write the new data into the register.
213 */
214 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
215 reg = 0;
216 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
217 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
218
219 reg = 0;
220 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
221 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
223 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
224
225 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
226 rt2x00_rf_write(rt2x00dev, word, value);
227 }
228
229 mutex_unlock(&rt2x00dev->csr_mutex);
230 }
231
232 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
233 static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
234 const unsigned int offset,
235 u32 *value)
236 {
237 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
238 }
239
240 static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
241 const unsigned int offset,
242 u32 value)
243 {
244 rt2500usb_register_write(rt2x00dev, offset, value);
245 }
246
247 static const struct rt2x00debug rt2500usb_rt2x00debug = {
248 .owner = THIS_MODULE,
249 .csr = {
250 .read = _rt2500usb_register_read,
251 .write = _rt2500usb_register_write,
252 .flags = RT2X00DEBUGFS_OFFSET,
253 .word_base = CSR_REG_BASE,
254 .word_size = sizeof(u16),
255 .word_count = CSR_REG_SIZE / sizeof(u16),
256 },
257 .eeprom = {
258 .read = rt2x00_eeprom_read,
259 .write = rt2x00_eeprom_write,
260 .word_base = EEPROM_BASE,
261 .word_size = sizeof(u16),
262 .word_count = EEPROM_SIZE / sizeof(u16),
263 },
264 .bbp = {
265 .read = rt2500usb_bbp_read,
266 .write = rt2500usb_bbp_write,
267 .word_base = BBP_BASE,
268 .word_size = sizeof(u8),
269 .word_count = BBP_SIZE / sizeof(u8),
270 },
271 .rf = {
272 .read = rt2x00_rf_read,
273 .write = rt2500usb_rf_write,
274 .word_base = RF_BASE,
275 .word_size = sizeof(u32),
276 .word_count = RF_SIZE / sizeof(u32),
277 },
278 };
279 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
280
281 static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
282 {
283 u16 reg;
284
285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
286 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
287 }
288
289 #ifdef CONFIG_RT2X00_LIB_LEDS
290 static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
291 enum led_brightness brightness)
292 {
293 struct rt2x00_led *led =
294 container_of(led_cdev, struct rt2x00_led, led_dev);
295 unsigned int enabled = brightness != LED_OFF;
296 u16 reg;
297
298 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
299
300 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
301 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
302 else if (led->type == LED_TYPE_ACTIVITY)
303 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
304
305 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
306 }
307
308 static int rt2500usb_blink_set(struct led_classdev *led_cdev,
309 unsigned long *delay_on,
310 unsigned long *delay_off)
311 {
312 struct rt2x00_led *led =
313 container_of(led_cdev, struct rt2x00_led, led_dev);
314 u16 reg;
315
316 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
317 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
318 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
319 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
320
321 return 0;
322 }
323
324 static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
325 struct rt2x00_led *led,
326 enum led_type type)
327 {
328 led->rt2x00dev = rt2x00dev;
329 led->type = type;
330 led->led_dev.brightness_set = rt2500usb_brightness_set;
331 led->led_dev.blink_set = rt2500usb_blink_set;
332 led->flags = LED_INITIALIZED;
333 }
334 #endif /* CONFIG_RT2X00_LIB_LEDS */
335
336 /*
337 * Configuration handlers.
338 */
339
340 /*
341 * rt2500usb does not differentiate between shared and pairwise
342 * keys, so we should use the same function for both key types.
343 */
344 static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
345 struct rt2x00lib_crypto *crypto,
346 struct ieee80211_key_conf *key)
347 {
348 u32 mask;
349 u16 reg;
350 enum cipher curr_cipher;
351
352 if (crypto->cmd == SET_KEY) {
353 /*
354 * Pairwise key will always be entry 0, but this
355 * could collide with a shared key on the same
356 * position...
357 */
358 mask = TXRX_CSR0_KEY_ID.bit_mask;
359
360 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
361 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
362 reg &= mask;
363
364 if (reg && reg == mask)
365 return -ENOSPC;
366
367 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
368
369 key->hw_key_idx += reg ? ffz(reg) : 0;
370 /*
371 * Hardware requires that all keys use the same cipher
372 * (e.g. TKIP-only, AES-only, but not TKIP+AES).
373 * If this is not the first key, compare the cipher with the
374 * first one and fall back to SW crypto if not the same.
375 */
376 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
377 return -EOPNOTSUPP;
378
379 rt2500usb_register_multiwrite(rt2x00dev, reg,
380 crypto->key, sizeof(crypto->key));
381
382 /*
383 * The driver does not support the IV/EIV generation
384 * in hardware. However it demands the data to be provided
385 * both separately as well as inside the frame.
386 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
387 * to ensure rt2x00lib will not strip the data from the
388 * frame after the copy, now we must tell mac80211
389 * to generate the IV/EIV data.
390 */
391 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
392 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
393 }
394
395 /*
396 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
397 * a particular key is valid.
398 */
399 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
400 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
401 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
402
403 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
404 if (crypto->cmd == SET_KEY)
405 mask |= 1 << key->hw_key_idx;
406 else if (crypto->cmd == DISABLE_KEY)
407 mask &= ~(1 << key->hw_key_idx);
408 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
409 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
410
411 return 0;
412 }
413
414 static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
415 const unsigned int filter_flags)
416 {
417 u16 reg;
418
419 /*
420 * Start configuration steps.
421 * Note that the version error will always be dropped
422 * and broadcast frames will always be accepted since
423 * there is no filter for it at this time.
424 */
425 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
426 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
427 !(filter_flags & FIF_FCSFAIL));
428 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
429 !(filter_flags & FIF_PLCPFAIL));
430 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
431 !(filter_flags & FIF_CONTROL));
432 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
433 !(filter_flags & FIF_PROMISC_IN_BSS));
434 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
435 !(filter_flags & FIF_PROMISC_IN_BSS) &&
436 !rt2x00dev->intf_ap_count);
437 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
438 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
439 !(filter_flags & FIF_ALLMULTI));
440 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
441 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
442 }
443
444 static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
445 struct rt2x00_intf *intf,
446 struct rt2x00intf_conf *conf,
447 const unsigned int flags)
448 {
449 unsigned int bcn_preload;
450 u16 reg;
451
452 if (flags & CONFIG_UPDATE_TYPE) {
453 /*
454 * Enable beacon config
455 */
456 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
457 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
458 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
459 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
460 2 * (conf->type != NL80211_IFTYPE_STATION));
461 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
462
463 /*
464 * Enable synchronisation.
465 */
466 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
467 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
468 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
469
470 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
471 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
472 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
473 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
474 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
475 }
476
477 if (flags & CONFIG_UPDATE_MAC)
478 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
479 (3 * sizeof(__le16)));
480
481 if (flags & CONFIG_UPDATE_BSSID)
482 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
483 (3 * sizeof(__le16)));
484 }
485
486 static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
487 struct rt2x00lib_erp *erp)
488 {
489 u16 reg;
490
491 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
492 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
493 !!erp->short_preamble);
494 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
495
496 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
497
498 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
499 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, erp->beacon_int * 4);
500 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
501
502 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
503 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
504 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
505 }
506
507 static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
508 struct antenna_setup *ant)
509 {
510 u8 r2;
511 u8 r14;
512 u16 csr5;
513 u16 csr6;
514
515 /*
516 * We should never come here because rt2x00lib is supposed
517 * to catch this and send us the correct antenna explicitely.
518 */
519 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
520 ant->tx == ANTENNA_SW_DIVERSITY);
521
522 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
523 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
524 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
525 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
526
527 /*
528 * Configure the TX antenna.
529 */
530 switch (ant->tx) {
531 case ANTENNA_HW_DIVERSITY:
532 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
533 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
534 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
535 break;
536 case ANTENNA_A:
537 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
538 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
539 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
540 break;
541 case ANTENNA_B:
542 default:
543 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
544 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
545 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
546 break;
547 }
548
549 /*
550 * Configure the RX antenna.
551 */
552 switch (ant->rx) {
553 case ANTENNA_HW_DIVERSITY:
554 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
555 break;
556 case ANTENNA_A:
557 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
558 break;
559 case ANTENNA_B:
560 default:
561 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
562 break;
563 }
564
565 /*
566 * RT2525E and RT5222 need to flip TX I/Q
567 */
568 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
569 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
570 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
571 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
572
573 /*
574 * RT2525E does not need RX I/Q Flip.
575 */
576 if (rt2x00_rf(rt2x00dev, RF2525E))
577 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
578 } else {
579 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
580 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
581 }
582
583 rt2500usb_bbp_write(rt2x00dev, 2, r2);
584 rt2500usb_bbp_write(rt2x00dev, 14, r14);
585 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
586 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
587 }
588
589 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
590 struct rf_channel *rf, const int txpower)
591 {
592 /*
593 * Set TXpower.
594 */
595 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
596
597 /*
598 * For RT2525E we should first set the channel to half band higher.
599 */
600 if (rt2x00_rf(rt2x00dev, RF2525E)) {
601 static const u32 vals[] = {
602 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
603 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
604 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
605 0x00000902, 0x00000906
606 };
607
608 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
609 if (rf->rf4)
610 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
611 }
612
613 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
614 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
615 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
616 if (rf->rf4)
617 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
618 }
619
620 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
621 const int txpower)
622 {
623 u32 rf3;
624
625 rt2x00_rf_read(rt2x00dev, 3, &rf3);
626 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
627 rt2500usb_rf_write(rt2x00dev, 3, rf3);
628 }
629
630 static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
631 struct rt2x00lib_conf *libconf)
632 {
633 enum dev_state state =
634 (libconf->conf->flags & IEEE80211_CONF_PS) ?
635 STATE_SLEEP : STATE_AWAKE;
636 u16 reg;
637
638 if (state == STATE_SLEEP) {
639 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
640 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
641 rt2x00dev->beacon_int - 20);
642 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
643 libconf->conf->listen_interval - 1);
644
645 /* We must first disable autowake before it can be enabled */
646 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
647 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
648
649 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
650 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
651 } else {
652 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
653 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
654 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
655 }
656
657 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
658 }
659
660 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
661 struct rt2x00lib_conf *libconf,
662 const unsigned int flags)
663 {
664 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
665 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
666 libconf->conf->power_level);
667 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
668 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
669 rt2500usb_config_txpower(rt2x00dev,
670 libconf->conf->power_level);
671 if (flags & IEEE80211_CONF_CHANGE_PS)
672 rt2500usb_config_ps(rt2x00dev, libconf);
673 }
674
675 /*
676 * Link tuning
677 */
678 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
679 struct link_qual *qual)
680 {
681 u16 reg;
682
683 /*
684 * Update FCS error count from register.
685 */
686 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
687 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
688
689 /*
690 * Update False CCA count from register.
691 */
692 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
693 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
694 }
695
696 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
697 struct link_qual *qual)
698 {
699 u16 eeprom;
700 u16 value;
701
702 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
703 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
704 rt2500usb_bbp_write(rt2x00dev, 24, value);
705
706 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
707 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
708 rt2500usb_bbp_write(rt2x00dev, 25, value);
709
710 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
711 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
712 rt2500usb_bbp_write(rt2x00dev, 61, value);
713
714 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
715 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
716 rt2500usb_bbp_write(rt2x00dev, 17, value);
717
718 qual->vgc_level = value;
719 }
720
721 /*
722 * Initialization functions.
723 */
724 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
725 {
726 u16 reg;
727
728 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
729 USB_MODE_TEST, REGISTER_TIMEOUT);
730 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
731 0x00f0, REGISTER_TIMEOUT);
732
733 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
734 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
735 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
736
737 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
738 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
739
740 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
741 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
742 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
743 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
744 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
745
746 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
747 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
748 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
749 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
750 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
751
752 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
753 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
754 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
755 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
756 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
757 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
758
759 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
760 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
761 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
762 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
763 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
764 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
765
766 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
767 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
768 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
769 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
770 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
771 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
772
773 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
774 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
775 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
776 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
777 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
778 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
779
780 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
781 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
782 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
783 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
784 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
785 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
786
787 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
788 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
789
790 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
791 return -EBUSY;
792
793 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
794 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
795 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
796 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
797 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
798
799 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
800 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
801 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
802 } else {
803 reg = 0;
804 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
805 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
806 }
807 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
808
809 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
810 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
811 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
812 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
813
814 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
815 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
816 rt2x00dev->rx->data_size);
817 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
818
819 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
820 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
821 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
822 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
823
824 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
825 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
826 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
827
828 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
829 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
830 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
831
832 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
833 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
834 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
835
836 return 0;
837 }
838
839 static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
840 {
841 unsigned int i;
842 u8 value;
843
844 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
845 rt2500usb_bbp_read(rt2x00dev, 0, &value);
846 if ((value != 0xff) && (value != 0x00))
847 return 0;
848 udelay(REGISTER_BUSY_DELAY);
849 }
850
851 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
852 return -EACCES;
853 }
854
855 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
856 {
857 unsigned int i;
858 u16 eeprom;
859 u8 value;
860 u8 reg_id;
861
862 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
863 return -EACCES;
864
865 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
866 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
867 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
868 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
869 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
870 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
871 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
872 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
873 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
874 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
875 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
876 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
877 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
878 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
879 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
880 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
881 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
882 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
883 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
884 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
885 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
886 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
887 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
888 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
889 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
890 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
891 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
892 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
893 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
894 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
895 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
896
897 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
898 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
899
900 if (eeprom != 0xffff && eeprom != 0x0000) {
901 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
902 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
903 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
904 }
905 }
906
907 return 0;
908 }
909
910 /*
911 * Device state switch handlers.
912 */
913 static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
914 enum dev_state state)
915 {
916 u16 reg;
917
918 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
919 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
920 (state == STATE_RADIO_RX_OFF) ||
921 (state == STATE_RADIO_RX_OFF_LINK));
922 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
923 }
924
925 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
926 {
927 /*
928 * Initialize all registers.
929 */
930 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
931 rt2500usb_init_bbp(rt2x00dev)))
932 return -EIO;
933
934 return 0;
935 }
936
937 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
938 {
939 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
940 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
941
942 /*
943 * Disable synchronisation.
944 */
945 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
946
947 rt2x00usb_disable_radio(rt2x00dev);
948 }
949
950 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
951 enum dev_state state)
952 {
953 u16 reg;
954 u16 reg2;
955 unsigned int i;
956 char put_to_sleep;
957 char bbp_state;
958 char rf_state;
959
960 put_to_sleep = (state != STATE_AWAKE);
961
962 reg = 0;
963 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
964 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
965 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
966 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
967 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
968 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
969
970 /*
971 * Device is not guaranteed to be in the requested state yet.
972 * We must wait until the register indicates that the
973 * device has entered the correct state.
974 */
975 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
976 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
977 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
978 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
979 if (bbp_state == state && rf_state == state)
980 return 0;
981 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
982 msleep(30);
983 }
984
985 return -EBUSY;
986 }
987
988 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
989 enum dev_state state)
990 {
991 int retval = 0;
992
993 switch (state) {
994 case STATE_RADIO_ON:
995 retval = rt2500usb_enable_radio(rt2x00dev);
996 break;
997 case STATE_RADIO_OFF:
998 rt2500usb_disable_radio(rt2x00dev);
999 break;
1000 case STATE_RADIO_RX_ON:
1001 case STATE_RADIO_RX_ON_LINK:
1002 case STATE_RADIO_RX_OFF:
1003 case STATE_RADIO_RX_OFF_LINK:
1004 rt2500usb_toggle_rx(rt2x00dev, state);
1005 break;
1006 case STATE_RADIO_IRQ_ON:
1007 case STATE_RADIO_IRQ_OFF:
1008 /* No support, but no error either */
1009 break;
1010 case STATE_DEEP_SLEEP:
1011 case STATE_SLEEP:
1012 case STATE_STANDBY:
1013 case STATE_AWAKE:
1014 retval = rt2500usb_set_state(rt2x00dev, state);
1015 break;
1016 default:
1017 retval = -ENOTSUPP;
1018 break;
1019 }
1020
1021 if (unlikely(retval))
1022 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1023 state, retval);
1024
1025 return retval;
1026 }
1027
1028 /*
1029 * TX descriptor initialization
1030 */
1031 static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1032 struct sk_buff *skb,
1033 struct txentry_desc *txdesc)
1034 {
1035 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1036 __le32 *txd = (__le32 *) skb->data;
1037 u32 word;
1038
1039 /*
1040 * Start writing the descriptor words.
1041 */
1042 rt2x00_desc_read(txd, 0, &word);
1043 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1044 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1045 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1046 rt2x00_set_field32(&word, TXD_W0_ACK,
1047 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1048 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1049 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1050 rt2x00_set_field32(&word, TXD_W0_OFDM,
1051 (txdesc->rate_mode == RATE_MODE_OFDM));
1052 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1053 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1054 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1055 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1056 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1057 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1058 rt2x00_desc_write(txd, 0, word);
1059
1060 rt2x00_desc_read(txd, 1, &word);
1061 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
1062 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1063 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1064 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1065 rt2x00_desc_write(txd, 1, word);
1066
1067 rt2x00_desc_read(txd, 2, &word);
1068 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1069 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1070 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1071 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1072 rt2x00_desc_write(txd, 2, word);
1073
1074 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1075 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1076 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1077 }
1078
1079 /*
1080 * Register descriptor details in skb frame descriptor.
1081 */
1082 skbdesc->flags |= SKBDESC_DESC_IN_SKB;
1083 skbdesc->desc = txd;
1084 skbdesc->desc_len = TXD_DESC_SIZE;
1085 }
1086
1087 /*
1088 * TX data initialization
1089 */
1090 static void rt2500usb_beacondone(struct urb *urb);
1091
1092 static void rt2500usb_write_beacon(struct queue_entry *entry,
1093 struct txentry_desc *txdesc)
1094 {
1095 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1096 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1097 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1098 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
1099 int length;
1100 u16 reg, reg0;
1101
1102 /*
1103 * Disable beaconing while we are reloading the beacon data,
1104 * otherwise we might be sending out invalid data.
1105 */
1106 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1107 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1108 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1109
1110 /*
1111 * Add space for the descriptor in front of the skb.
1112 */
1113 skb_push(entry->skb, TXD_DESC_SIZE);
1114 memset(entry->skb->data, 0, TXD_DESC_SIZE);
1115
1116 /*
1117 * Write the TX descriptor for the beacon.
1118 */
1119 rt2500usb_write_tx_desc(rt2x00dev, entry->skb, txdesc);
1120
1121 /*
1122 * Dump beacon to userspace through debugfs.
1123 */
1124 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
1125
1126 /*
1127 * USB devices cannot blindly pass the skb->len as the
1128 * length of the data to usb_fill_bulk_urb. Pass the skb
1129 * to the driver to determine what the length should be.
1130 */
1131 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
1132
1133 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1134 entry->skb->data, length, rt2500usb_beacondone,
1135 entry);
1136
1137 /*
1138 * Second we need to create the guardian byte.
1139 * We only need a single byte, so lets recycle
1140 * the 'flags' field we are not using for beacons.
1141 */
1142 bcn_priv->guardian_data = 0;
1143 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1144 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1145 entry);
1146
1147 /*
1148 * Send out the guardian byte.
1149 */
1150 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1151
1152 /*
1153 * Enable beaconing again.
1154 */
1155 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1156 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
1157 reg0 = reg;
1158 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1159 /*
1160 * Beacon generation will fail initially.
1161 * To prevent this we need to change the TXRX_CSR19
1162 * register several times (reg0 is the same as reg
1163 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1164 * and 1 in reg).
1165 */
1166 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1167 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1168 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1169 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1170 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1171 }
1172
1173 static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
1174 {
1175 int length;
1176
1177 /*
1178 * The length _must_ be a multiple of 2,
1179 * but it must _not_ be a multiple of the USB packet size.
1180 */
1181 length = roundup(entry->skb->len, 2);
1182 length += (2 * !(length % entry->queue->usb_maxpacket));
1183
1184 return length;
1185 }
1186
1187 /*
1188 * RX control handlers
1189 */
1190 static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1191 struct rxdone_entry_desc *rxdesc)
1192 {
1193 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1194 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
1195 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1196 __le32 *rxd =
1197 (__le32 *)(entry->skb->data +
1198 (entry_priv->urb->actual_length -
1199 entry->queue->desc_size));
1200 u32 word0;
1201 u32 word1;
1202
1203 /*
1204 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1205 * frame data in rt2x00usb.
1206 */
1207 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1208 rxd = (__le32 *)skbdesc->desc;
1209
1210 /*
1211 * It is now safe to read the descriptor on all architectures.
1212 */
1213 rt2x00_desc_read(rxd, 0, &word0);
1214 rt2x00_desc_read(rxd, 1, &word1);
1215
1216 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1217 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1218 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1219 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1220
1221 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1222 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1223 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1224
1225 if (rxdesc->cipher != CIPHER_NONE) {
1226 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1227 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
1228 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1229
1230 /* ICV is located at the end of frame */
1231
1232 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1233 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1234 rxdesc->flags |= RX_FLAG_DECRYPTED;
1235 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1236 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1237 }
1238
1239 /*
1240 * Obtain the status about this packet.
1241 * When frame was received with an OFDM bitrate,
1242 * the signal is the PLCP value. If it was received with
1243 * a CCK bitrate the signal is the rate in 100kbit/s.
1244 */
1245 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1246 rxdesc->rssi =
1247 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
1248 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1249
1250 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1251 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1252 else
1253 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
1254 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1255 rxdesc->dev_flags |= RXDONE_MY_BSS;
1256
1257 /*
1258 * Adjust the skb memory window to the frame boundaries.
1259 */
1260 skb_trim(entry->skb, rxdesc->size);
1261 }
1262
1263 /*
1264 * Interrupt functions.
1265 */
1266 static void rt2500usb_beacondone(struct urb *urb)
1267 {
1268 struct queue_entry *entry = (struct queue_entry *)urb->context;
1269 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1270
1271 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
1272 return;
1273
1274 /*
1275 * Check if this was the guardian beacon,
1276 * if that was the case we need to send the real beacon now.
1277 * Otherwise we should free the sk_buffer, the device
1278 * should be doing the rest of the work now.
1279 */
1280 if (bcn_priv->guardian_urb == urb) {
1281 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1282 } else if (bcn_priv->urb == urb) {
1283 dev_kfree_skb(entry->skb);
1284 entry->skb = NULL;
1285 }
1286 }
1287
1288 /*
1289 * Device probe functions.
1290 */
1291 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1292 {
1293 u16 word;
1294 u8 *mac;
1295 u8 bbp;
1296
1297 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1298
1299 /*
1300 * Start validation of the data that has been read.
1301 */
1302 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1303 if (!is_valid_ether_addr(mac)) {
1304 random_ether_addr(mac);
1305 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
1306 }
1307
1308 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1309 if (word == 0xffff) {
1310 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1311 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1312 ANTENNA_SW_DIVERSITY);
1313 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1314 ANTENNA_SW_DIVERSITY);
1315 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1316 LED_MODE_DEFAULT);
1317 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1318 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1319 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1320 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1321 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1322 }
1323
1324 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1325 if (word == 0xffff) {
1326 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1327 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1328 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1329 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1330 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1331 }
1332
1333 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1334 if (word == 0xffff) {
1335 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1336 DEFAULT_RSSI_OFFSET);
1337 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1338 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1339 }
1340
1341 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1342 if (word == 0xffff) {
1343 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1344 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1345 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1346 }
1347
1348 /*
1349 * Switch lower vgc bound to current BBP R17 value,
1350 * lower the value a bit for better quality.
1351 */
1352 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1353 bbp -= 6;
1354
1355 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1356 if (word == 0xffff) {
1357 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1358 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1359 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1360 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1361 } else {
1362 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1363 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1364 }
1365
1366 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1367 if (word == 0xffff) {
1368 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1369 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1370 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1371 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1372 }
1373
1374 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1375 if (word == 0xffff) {
1376 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1377 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1378 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1379 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1380 }
1381
1382 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1383 if (word == 0xffff) {
1384 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1385 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1386 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1387 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1388 }
1389
1390 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1391 if (word == 0xffff) {
1392 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1393 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1394 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1395 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1396 }
1397
1398 return 0;
1399 }
1400
1401 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1402 {
1403 u16 reg;
1404 u16 value;
1405 u16 eeprom;
1406
1407 /*
1408 * Read EEPROM word for configuration.
1409 */
1410 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1411
1412 /*
1413 * Identify RF chipset.
1414 */
1415 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1416 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1417 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1418
1419 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1420 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1421 return -ENODEV;
1422 }
1423
1424 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1425 !rt2x00_rf(rt2x00dev, RF2523) &&
1426 !rt2x00_rf(rt2x00dev, RF2524) &&
1427 !rt2x00_rf(rt2x00dev, RF2525) &&
1428 !rt2x00_rf(rt2x00dev, RF2525E) &&
1429 !rt2x00_rf(rt2x00dev, RF5222)) {
1430 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1431 return -ENODEV;
1432 }
1433
1434 /*
1435 * Identify default antenna configuration.
1436 */
1437 rt2x00dev->default_ant.tx =
1438 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1439 rt2x00dev->default_ant.rx =
1440 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1441
1442 /*
1443 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1444 * I am not 100% sure about this, but the legacy drivers do not
1445 * indicate antenna swapping in software is required when
1446 * diversity is enabled.
1447 */
1448 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1449 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1450 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1451 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1452
1453 /*
1454 * Store led mode, for correct led behaviour.
1455 */
1456 #ifdef CONFIG_RT2X00_LIB_LEDS
1457 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1458
1459 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1460 if (value == LED_MODE_TXRX_ACTIVITY ||
1461 value == LED_MODE_DEFAULT ||
1462 value == LED_MODE_ASUS)
1463 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1464 LED_TYPE_ACTIVITY);
1465 #endif /* CONFIG_RT2X00_LIB_LEDS */
1466
1467 /*
1468 * Detect if this device has an hardware controlled radio.
1469 */
1470 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1471 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
1472
1473 /*
1474 * Check if the BBP tuning should be disabled.
1475 */
1476 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1477 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1478 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1479
1480 /*
1481 * Read the RSSI <-> dBm offset information.
1482 */
1483 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1484 rt2x00dev->rssi_offset =
1485 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1486
1487 return 0;
1488 }
1489
1490 /*
1491 * RF value list for RF2522
1492 * Supports: 2.4 GHz
1493 */
1494 static const struct rf_channel rf_vals_bg_2522[] = {
1495 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1496 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1497 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1498 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1499 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1500 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1501 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1502 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1503 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1504 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1505 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1506 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1507 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1508 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1509 };
1510
1511 /*
1512 * RF value list for RF2523
1513 * Supports: 2.4 GHz
1514 */
1515 static const struct rf_channel rf_vals_bg_2523[] = {
1516 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1517 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1518 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1519 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1520 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1521 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1522 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1523 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1524 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1525 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1526 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1527 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1528 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1529 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1530 };
1531
1532 /*
1533 * RF value list for RF2524
1534 * Supports: 2.4 GHz
1535 */
1536 static const struct rf_channel rf_vals_bg_2524[] = {
1537 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1538 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1539 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1540 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1541 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1542 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1543 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1544 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1545 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1546 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1547 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1548 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1549 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1550 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1551 };
1552
1553 /*
1554 * RF value list for RF2525
1555 * Supports: 2.4 GHz
1556 */
1557 static const struct rf_channel rf_vals_bg_2525[] = {
1558 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1559 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1560 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1561 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1562 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1563 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1564 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1565 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1566 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1567 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1568 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1569 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1570 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1571 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1572 };
1573
1574 /*
1575 * RF value list for RF2525e
1576 * Supports: 2.4 GHz
1577 */
1578 static const struct rf_channel rf_vals_bg_2525e[] = {
1579 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1580 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1581 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1582 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1583 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1584 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1585 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1586 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1587 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1588 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1589 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1590 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1591 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1592 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1593 };
1594
1595 /*
1596 * RF value list for RF5222
1597 * Supports: 2.4 GHz & 5.2 GHz
1598 */
1599 static const struct rf_channel rf_vals_5222[] = {
1600 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1601 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1602 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1603 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1604 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1605 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1606 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1607 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1608 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1609 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1610 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1611 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1612 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1613 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1614
1615 /* 802.11 UNI / HyperLan 2 */
1616 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1617 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1618 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1619 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1620 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1621 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1622 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1623 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1624
1625 /* 802.11 HyperLan 2 */
1626 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1627 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1628 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1629 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1630 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1631 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1632 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1633 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1634 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1635 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1636
1637 /* 802.11 UNII */
1638 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1639 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1640 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1641 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1642 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1643 };
1644
1645 static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1646 {
1647 struct hw_mode_spec *spec = &rt2x00dev->spec;
1648 struct channel_info *info;
1649 char *tx_power;
1650 unsigned int i;
1651
1652 /*
1653 * Initialize all hw fields.
1654 */
1655 rt2x00dev->hw->flags =
1656 IEEE80211_HW_RX_INCLUDES_FCS |
1657 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1658 IEEE80211_HW_SIGNAL_DBM |
1659 IEEE80211_HW_SUPPORTS_PS |
1660 IEEE80211_HW_PS_NULLFUNC_STACK;
1661
1662 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1663 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1664 rt2x00_eeprom_addr(rt2x00dev,
1665 EEPROM_MAC_ADDR_0));
1666
1667 /*
1668 * Initialize hw_mode information.
1669 */
1670 spec->supported_bands = SUPPORT_BAND_2GHZ;
1671 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1672
1673 if (rt2x00_rf(rt2x00dev, RF2522)) {
1674 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1675 spec->channels = rf_vals_bg_2522;
1676 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
1677 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1678 spec->channels = rf_vals_bg_2523;
1679 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
1680 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1681 spec->channels = rf_vals_bg_2524;
1682 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
1683 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1684 spec->channels = rf_vals_bg_2525;
1685 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1686 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1687 spec->channels = rf_vals_bg_2525e;
1688 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
1689 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1690 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1691 spec->channels = rf_vals_5222;
1692 }
1693
1694 /*
1695 * Create channel information array
1696 */
1697 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1698 if (!info)
1699 return -ENOMEM;
1700
1701 spec->channels_info = info;
1702
1703 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1704 for (i = 0; i < 14; i++)
1705 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1706
1707 if (spec->num_channels > 14) {
1708 for (i = 14; i < spec->num_channels; i++)
1709 info[i].tx_power1 = DEFAULT_TXPOWER;
1710 }
1711
1712 return 0;
1713 }
1714
1715 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1716 {
1717 int retval;
1718
1719 /*
1720 * Allocate eeprom data.
1721 */
1722 retval = rt2500usb_validate_eeprom(rt2x00dev);
1723 if (retval)
1724 return retval;
1725
1726 retval = rt2500usb_init_eeprom(rt2x00dev);
1727 if (retval)
1728 return retval;
1729
1730 /*
1731 * Initialize hw specifications.
1732 */
1733 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1734 if (retval)
1735 return retval;
1736
1737 /*
1738 * This device requires the atim queue
1739 */
1740 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1741 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
1742 if (!modparam_nohwcrypt) {
1743 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
1744 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
1745 }
1746 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1747
1748 /*
1749 * Set the rssi offset.
1750 */
1751 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1752
1753 return 0;
1754 }
1755
1756 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1757 .tx = rt2x00mac_tx,
1758 .start = rt2x00mac_start,
1759 .stop = rt2x00mac_stop,
1760 .add_interface = rt2x00mac_add_interface,
1761 .remove_interface = rt2x00mac_remove_interface,
1762 .config = rt2x00mac_config,
1763 .configure_filter = rt2x00mac_configure_filter,
1764 .set_tim = rt2x00mac_set_tim,
1765 .set_key = rt2x00mac_set_key,
1766 .get_stats = rt2x00mac_get_stats,
1767 .bss_info_changed = rt2x00mac_bss_info_changed,
1768 .conf_tx = rt2x00mac_conf_tx,
1769 .rfkill_poll = rt2x00mac_rfkill_poll,
1770 };
1771
1772 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1773 .probe_hw = rt2500usb_probe_hw,
1774 .initialize = rt2x00usb_initialize,
1775 .uninitialize = rt2x00usb_uninitialize,
1776 .clear_entry = rt2x00usb_clear_entry,
1777 .set_device_state = rt2500usb_set_device_state,
1778 .rfkill_poll = rt2500usb_rfkill_poll,
1779 .link_stats = rt2500usb_link_stats,
1780 .reset_tuner = rt2500usb_reset_tuner,
1781 .write_tx_desc = rt2500usb_write_tx_desc,
1782 .write_beacon = rt2500usb_write_beacon,
1783 .get_tx_data_len = rt2500usb_get_tx_data_len,
1784 .kick_tx_queue = rt2x00usb_kick_tx_queue,
1785 .kill_tx_queue = rt2x00usb_kill_tx_queue,
1786 .fill_rxdone = rt2500usb_fill_rxdone,
1787 .config_shared_key = rt2500usb_config_key,
1788 .config_pairwise_key = rt2500usb_config_key,
1789 .config_filter = rt2500usb_config_filter,
1790 .config_intf = rt2500usb_config_intf,
1791 .config_erp = rt2500usb_config_erp,
1792 .config_ant = rt2500usb_config_ant,
1793 .config = rt2500usb_config,
1794 };
1795
1796 static const struct data_queue_desc rt2500usb_queue_rx = {
1797 .entry_num = RX_ENTRIES,
1798 .data_size = DATA_FRAME_SIZE,
1799 .desc_size = RXD_DESC_SIZE,
1800 .priv_size = sizeof(struct queue_entry_priv_usb),
1801 };
1802
1803 static const struct data_queue_desc rt2500usb_queue_tx = {
1804 .entry_num = TX_ENTRIES,
1805 .data_size = DATA_FRAME_SIZE,
1806 .desc_size = TXD_DESC_SIZE,
1807 .priv_size = sizeof(struct queue_entry_priv_usb),
1808 };
1809
1810 static const struct data_queue_desc rt2500usb_queue_bcn = {
1811 .entry_num = BEACON_ENTRIES,
1812 .data_size = MGMT_FRAME_SIZE,
1813 .desc_size = TXD_DESC_SIZE,
1814 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1815 };
1816
1817 static const struct data_queue_desc rt2500usb_queue_atim = {
1818 .entry_num = ATIM_ENTRIES,
1819 .data_size = DATA_FRAME_SIZE,
1820 .desc_size = TXD_DESC_SIZE,
1821 .priv_size = sizeof(struct queue_entry_priv_usb),
1822 };
1823
1824 static const struct rt2x00_ops rt2500usb_ops = {
1825 .name = KBUILD_MODNAME,
1826 .max_sta_intf = 1,
1827 .max_ap_intf = 1,
1828 .eeprom_size = EEPROM_SIZE,
1829 .rf_size = RF_SIZE,
1830 .tx_queues = NUM_TX_QUEUES,
1831 .extra_tx_headroom = TXD_DESC_SIZE,
1832 .rx = &rt2500usb_queue_rx,
1833 .tx = &rt2500usb_queue_tx,
1834 .bcn = &rt2500usb_queue_bcn,
1835 .atim = &rt2500usb_queue_atim,
1836 .lib = &rt2500usb_rt2x00_ops,
1837 .hw = &rt2500usb_mac80211_ops,
1838 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1839 .debugfs = &rt2500usb_rt2x00debug,
1840 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1841 };
1842
1843 /*
1844 * rt2500usb module information.
1845 */
1846 static struct usb_device_id rt2500usb_device_table[] = {
1847 /* ASUS */
1848 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1849 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1850 /* Belkin */
1851 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1852 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1853 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1854 /* Cisco Systems */
1855 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1856 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1857 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1858 /* CNet */
1859 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
1860 /* Conceptronic */
1861 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1862 /* D-LINK */
1863 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1864 /* Gigabyte */
1865 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1866 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1867 /* Hercules */
1868 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1869 /* Melco */
1870 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
1871 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1872 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1873 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1874 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1875 /* MSI */
1876 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1877 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1878 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1879 /* Ralink */
1880 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1881 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1882 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1883 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1884 /* Sagem */
1885 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
1886 /* Siemens */
1887 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1888 /* SMC */
1889 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1890 /* Spairon */
1891 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1892 /* SURECOM */
1893 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
1894 /* Trust */
1895 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1896 /* VTech */
1897 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
1898 /* Zinwell */
1899 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1900 { 0, }
1901 };
1902
1903 MODULE_AUTHOR(DRV_PROJECT);
1904 MODULE_VERSION(DRV_VERSION);
1905 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1906 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1907 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1908 MODULE_LICENSE("GPL");
1909
1910 static struct usb_driver rt2500usb_driver = {
1911 .name = KBUILD_MODNAME,
1912 .id_table = rt2500usb_device_table,
1913 .probe = rt2x00usb_probe,
1914 .disconnect = rt2x00usb_disconnect,
1915 .suspend = rt2x00usb_suspend,
1916 .resume = rt2x00usb_resume,
1917 };
1918
1919 static int __init rt2500usb_init(void)
1920 {
1921 return usb_register(&rt2500usb_driver);
1922 }
1923
1924 static void __exit rt2500usb_exit(void)
1925 {
1926 usb_deregister(&rt2500usb_driver);
1927 }
1928
1929 module_init(rt2500usb_init);
1930 module_exit(rt2500usb_exit);
Linux kernel - Deliverables
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