projects / deliverable / linux.git / blob
? search:


ce2e893856c1826cdef15a5ee6faf495f15f680b
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2800usb.c
1 /*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2800usb
23 Abstract: rt2800usb device specific routines.
24 Supported chipsets: RT2800U.
25 */
26
27 #include <linux/crc-ccitt.h>
28 #include <linux/delay.h>
29 #include <linux/etherdevice.h>
30 #include <linux/init.h>
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/usb.h>
34
35 #include "rt2x00.h"
36 #include "rt2x00usb.h"
37 #include "rt2800lib.h"
38 #include "rt2800.h"
39 #include "rt2800usb.h"
40
41 /*
42 * Allow hardware encryption to be disabled.
43 */
44 static int modparam_nohwcrypt = 1;
45 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
46 MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
47
48 /*
49 * Firmware functions
50 */
51 static char *rt2800usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
52 {
53 return FIRMWARE_RT2870;
54 }
55
56 static bool rt2800usb_check_crc(const u8 *data, const size_t len)
57 {
58 u16 fw_crc;
59 u16 crc;
60
61 /*
62 * The last 2 bytes in the firmware array are the crc checksum itself,
63 * this means that we should never pass those 2 bytes to the crc
64 * algorithm.
65 */
66 fw_crc = (data[len - 2] << 8 | data[len - 1]);
67
68 /*
69 * Use the crc ccitt algorithm.
70 * This will return the same value as the legacy driver which
71 * used bit ordering reversion on the both the firmware bytes
72 * before input input as well as on the final output.
73 * Obviously using crc ccitt directly is much more efficient.
74 */
75 crc = crc_ccitt(~0, data, len - 2);
76
77 /*
78 * There is a small difference between the crc-itu-t + bitrev and
79 * the crc-ccitt crc calculation. In the latter method the 2 bytes
80 * will be swapped, use swab16 to convert the crc to the correct
81 * value.
82 */
83 crc = swab16(crc);
84
85 return fw_crc == crc;
86 }
87
88 static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
89 const u8 *data, const size_t len)
90 {
91 u16 chipset = (rt2x00_rev(&rt2x00dev->chip) >> 16) & 0xffff;
92 size_t offset = 0;
93
94 /*
95 * Firmware files:
96 * There are 2 variations of the rt2870 firmware.
97 * a) size: 4kb
98 * b) size: 8kb
99 * Note that (b) contains 2 seperate firmware blobs of 4k
100 * within the file. The first blob is the same firmware as (a),
101 * but the second blob is for the additional chipsets.
102 */
103 if (len != 4096 && len != 8192)
104 return FW_BAD_LENGTH;
105
106 /*
107 * Check if we need the upper 4kb firmware data or not.
108 */
109 if ((len == 4096) &&
110 (chipset != 0x2860) &&
111 (chipset != 0x2872) &&
112 (chipset != 0x3070))
113 return FW_BAD_VERSION;
114
115 /*
116 * 8kb firmware files must be checked as if it were
117 * 2 seperate firmware files.
118 */
119 while (offset < len) {
120 if (!rt2800usb_check_crc(data + offset, 4096))
121 return FW_BAD_CRC;
122
123 offset += 4096;
124 }
125
126 return FW_OK;
127 }
128
129 static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
130 const u8 *data, const size_t len)
131 {
132 unsigned int i;
133 int status;
134 u32 reg;
135 u32 offset;
136 u32 length;
137 u16 chipset = (rt2x00_rev(&rt2x00dev->chip) >> 16) & 0xffff;
138
139 /*
140 * Check which section of the firmware we need.
141 */
142 if ((chipset == 0x2860) ||
143 (chipset == 0x2872) ||
144 (chipset == 0x3070)) {
145 offset = 0;
146 length = 4096;
147 } else {
148 offset = 4096;
149 length = 4096;
150 }
151
152 /*
153 * Wait for stable hardware.
154 */
155 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
156 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
157 if (reg && reg != ~0)
158 break;
159 msleep(1);
160 }
161
162 if (i == REGISTER_BUSY_COUNT) {
163 ERROR(rt2x00dev, "Unstable hardware.\n");
164 return -EBUSY;
165 }
166
167 /*
168 * Write firmware to device.
169 */
170 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
171 USB_VENDOR_REQUEST_OUT,
172 FIRMWARE_IMAGE_BASE,
173 data + offset, length,
174 REGISTER_TIMEOUT32(length));
175
176 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
177 rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
178
179 /*
180 * Send firmware request to device to load firmware,
181 * we need to specify a long timeout time.
182 */
183 status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
184 0, USB_MODE_FIRMWARE,
185 REGISTER_TIMEOUT_FIRMWARE);
186 if (status < 0) {
187 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
188 return status;
189 }
190
191 msleep(10);
192 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
193
194 /*
195 * Send signal to firmware during boot time.
196 */
197 rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
198
199 if ((chipset == 0x3070) ||
200 (chipset == 0x3071) ||
201 (chipset == 0x3572)) {
202 udelay(200);
203 rt2800_mcu_request(rt2x00dev, MCU_CURRENT, 0, 0, 0);
204 udelay(10);
205 }
206
207 /*
208 * Wait for device to stabilize.
209 */
210 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
211 rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
212 if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY))
213 break;
214 msleep(1);
215 }
216
217 if (i == REGISTER_BUSY_COUNT) {
218 ERROR(rt2x00dev, "PBF system register not ready.\n");
219 return -EBUSY;
220 }
221
222 /*
223 * Initialize firmware.
224 */
225 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
226 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
227 msleep(1);
228
229 return 0;
230 }
231
232 /*
233 * Device state switch handlers.
234 */
235 static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
236 enum dev_state state)
237 {
238 u32 reg;
239
240 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
241 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
242 (state == STATE_RADIO_RX_ON) ||
243 (state == STATE_RADIO_RX_ON_LINK));
244 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
245 }
246
247 static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
248 {
249 unsigned int i;
250 u32 reg;
251
252 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
253 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
254 if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
255 !rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY))
256 return 0;
257
258 msleep(1);
259 }
260
261 ERROR(rt2x00dev, "WPDMA TX/RX busy, aborting.\n");
262 return -EACCES;
263 }
264
265 static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
266 {
267 u32 reg;
268 u16 word;
269
270 /*
271 * Initialize all registers.
272 */
273 if (unlikely(rt2800usb_wait_wpdma_ready(rt2x00dev) ||
274 rt2800_init_registers(rt2x00dev) ||
275 rt2800_init_bbp(rt2x00dev) ||
276 rt2800_init_rfcsr(rt2x00dev)))
277 return -EIO;
278
279 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
280 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
281 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
282
283 udelay(50);
284
285 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
286 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
287 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
288 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
289 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
290
291
292 rt2800_register_read(rt2x00dev, USB_DMA_CFG, &reg);
293 rt2x00_set_field32(&reg, USB_DMA_CFG_PHY_CLEAR, 0);
294 /* Don't use bulk in aggregation when working with USB 1.1 */
295 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_EN,
296 (rt2x00dev->rx->usb_maxpacket == 512));
297 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_TIMEOUT, 128);
298 /*
299 * Total room for RX frames in kilobytes, PBF might still exceed
300 * this limit so reduce the number to prevent errors.
301 */
302 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_LIMIT,
303 ((RX_ENTRIES * DATA_FRAME_SIZE) / 1024) - 3);
304 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_EN, 1);
305 rt2x00_set_field32(&reg, USB_DMA_CFG_TX_BULK_EN, 1);
306 rt2800_register_write(rt2x00dev, USB_DMA_CFG, reg);
307
308 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
309 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
310 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);
311 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
312
313 /*
314 * Initialize LED control
315 */
316 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED1, &word);
317 rt2800_mcu_request(rt2x00dev, MCU_LED_1, 0xff,
318 word & 0xff, (word >> 8) & 0xff);
319
320 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED2, &word);
321 rt2800_mcu_request(rt2x00dev, MCU_LED_2, 0xff,
322 word & 0xff, (word >> 8) & 0xff);
323
324 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED3, &word);
325 rt2800_mcu_request(rt2x00dev, MCU_LED_3, 0xff,
326 word & 0xff, (word >> 8) & 0xff);
327
328 return 0;
329 }
330
331 static void rt2800usb_disable_radio(struct rt2x00_dev *rt2x00dev)
332 {
333 u32 reg;
334
335 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
336 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
337 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
338 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
339
340 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
341 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0);
342 rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0);
343
344 /* Wait for DMA, ignore error */
345 rt2800usb_wait_wpdma_ready(rt2x00dev);
346
347 rt2x00usb_disable_radio(rt2x00dev);
348 }
349
350 static int rt2800usb_set_state(struct rt2x00_dev *rt2x00dev,
351 enum dev_state state)
352 {
353 if (state == STATE_AWAKE)
354 rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, 0xff, 0, 0);
355 else
356 rt2800_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 2);
357
358 return 0;
359 }
360
361 static int rt2800usb_set_device_state(struct rt2x00_dev *rt2x00dev,
362 enum dev_state state)
363 {
364 int retval = 0;
365
366 switch (state) {
367 case STATE_RADIO_ON:
368 /*
369 * Before the radio can be enabled, the device first has
370 * to be woken up. After that it needs a bit of time
371 * to be fully awake and then the radio can be enabled.
372 */
373 rt2800usb_set_state(rt2x00dev, STATE_AWAKE);
374 msleep(1);
375 retval = rt2800usb_enable_radio(rt2x00dev);
376 break;
377 case STATE_RADIO_OFF:
378 /*
379 * After the radio has been disabled, the device should
380 * be put to sleep for powersaving.
381 */
382 rt2800usb_disable_radio(rt2x00dev);
383 rt2800usb_set_state(rt2x00dev, STATE_SLEEP);
384 break;
385 case STATE_RADIO_RX_ON:
386 case STATE_RADIO_RX_ON_LINK:
387 case STATE_RADIO_RX_OFF:
388 case STATE_RADIO_RX_OFF_LINK:
389 rt2800usb_toggle_rx(rt2x00dev, state);
390 break;
391 case STATE_RADIO_IRQ_ON:
392 case STATE_RADIO_IRQ_OFF:
393 /* No support, but no error either */
394 break;
395 case STATE_DEEP_SLEEP:
396 case STATE_SLEEP:
397 case STATE_STANDBY:
398 case STATE_AWAKE:
399 retval = rt2800usb_set_state(rt2x00dev, state);
400 break;
401 default:
402 retval = -ENOTSUPP;
403 break;
404 }
405
406 if (unlikely(retval))
407 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
408 state, retval);
409
410 return retval;
411 }
412
413 /*
414 * TX descriptor initialization
415 */
416 static void rt2800usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
417 struct sk_buff *skb,
418 struct txentry_desc *txdesc)
419 {
420 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
421 __le32 *txi = skbdesc->desc;
422 __le32 *txwi = &txi[TXINFO_DESC_SIZE / sizeof(__le32)];
423 u32 word;
424
425 /*
426 * Initialize TX Info descriptor
427 */
428 rt2x00_desc_read(txwi, 0, &word);
429 rt2x00_set_field32(&word, TXWI_W0_FRAG,
430 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
431 rt2x00_set_field32(&word, TXWI_W0_MIMO_PS, 0);
432 rt2x00_set_field32(&word, TXWI_W0_CF_ACK, 0);
433 rt2x00_set_field32(&word, TXWI_W0_TS,
434 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
435 rt2x00_set_field32(&word, TXWI_W0_AMPDU,
436 test_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags));
437 rt2x00_set_field32(&word, TXWI_W0_MPDU_DENSITY, txdesc->mpdu_density);
438 rt2x00_set_field32(&word, TXWI_W0_TX_OP, txdesc->ifs);
439 rt2x00_set_field32(&word, TXWI_W0_MCS, txdesc->mcs);
440 rt2x00_set_field32(&word, TXWI_W0_BW,
441 test_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags));
442 rt2x00_set_field32(&word, TXWI_W0_SHORT_GI,
443 test_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags));
444 rt2x00_set_field32(&word, TXWI_W0_STBC, txdesc->stbc);
445 rt2x00_set_field32(&word, TXWI_W0_PHYMODE, txdesc->rate_mode);
446 rt2x00_desc_write(txwi, 0, word);
447
448 rt2x00_desc_read(txwi, 1, &word);
449 rt2x00_set_field32(&word, TXWI_W1_ACK,
450 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
451 rt2x00_set_field32(&word, TXWI_W1_NSEQ,
452 test_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags));
453 rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size);
454 rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID,
455 test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ?
456 txdesc->key_idx : 0xff);
457 rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
458 skb->len - txdesc->l2pad);
459 rt2x00_set_field32(&word, TXWI_W1_PACKETID,
460 skbdesc->entry->queue->qid + 1);
461 rt2x00_desc_write(txwi, 1, word);
462
463 /*
464 * Always write 0 to IV/EIV fields, hardware will insert the IV
465 * from the IVEIV register when TXINFO_W0_WIV is set to 0.
466 * When TXINFO_W0_WIV is set to 1 it will use the IV data
467 * from the descriptor. The TXWI_W1_WIRELESS_CLI_ID indicates which
468 * crypto entry in the registers should be used to encrypt the frame.
469 */
470 _rt2x00_desc_write(txwi, 2, 0 /* skbdesc->iv[0] */);
471 _rt2x00_desc_write(txwi, 3, 0 /* skbdesc->iv[1] */);
472
473 /*
474 * Initialize TX descriptor
475 */
476 rt2x00_desc_read(txi, 0, &word);
477 rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN,
478 skb->len + TXWI_DESC_SIZE);
479 rt2x00_set_field32(&word, TXINFO_W0_WIV,
480 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags));
481 rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2);
482 rt2x00_set_field32(&word, TXINFO_W0_SW_USE_LAST_ROUND, 0);
483 rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_NEXT_VALID, 0);
484 rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_BURST,
485 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
486 rt2x00_desc_write(txi, 0, word);
487 }
488
489 /*
490 * TX data initialization
491 */
492 static void rt2800usb_write_beacon(struct queue_entry *entry)
493 {
494 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
495 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
496 unsigned int beacon_base;
497 u32 reg;
498
499 /*
500 * Add the descriptor in front of the skb.
501 */
502 skb_push(entry->skb, entry->queue->desc_size);
503 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
504 skbdesc->desc = entry->skb->data;
505
506 /*
507 * Disable beaconing while we are reloading the beacon data,
508 * otherwise we might be sending out invalid data.
509 */
510 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
511 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
512 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
513
514 /*
515 * Write entire beacon with descriptor to register.
516 */
517 beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
518 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
519 USB_VENDOR_REQUEST_OUT, beacon_base,
520 entry->skb->data, entry->skb->len,
521 REGISTER_TIMEOUT32(entry->skb->len));
522
523 /*
524 * Clean up the beacon skb.
525 */
526 dev_kfree_skb(entry->skb);
527 entry->skb = NULL;
528 }
529
530 static int rt2800usb_get_tx_data_len(struct queue_entry *entry)
531 {
532 int length;
533
534 /*
535 * The length _must_ include 4 bytes padding,
536 * it should always be multiple of 4,
537 * but it must _not_ be a multiple of the USB packet size.
538 */
539 length = roundup(entry->skb->len + 4, 4);
540 length += (4 * !(length % entry->queue->usb_maxpacket));
541
542 return length;
543 }
544
545 static void rt2800usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
546 const enum data_queue_qid queue)
547 {
548 u32 reg;
549
550 if (queue != QID_BEACON) {
551 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
552 return;
553 }
554
555 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
556 if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) {
557 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
558 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
559 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
560 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
561 }
562 }
563
564 /*
565 * RX control handlers
566 */
567 static void rt2800usb_fill_rxdone(struct queue_entry *entry,
568 struct rxdone_entry_desc *rxdesc)
569 {
570 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
571 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
572 __le32 *rxd = (__le32 *)entry->skb->data;
573 __le32 *rxwi;
574 u32 rxd0;
575 u32 rxwi0;
576 u32 rxwi1;
577 u32 rxwi2;
578 u32 rxwi3;
579
580 /*
581 * Copy descriptor to the skbdesc->desc buffer, making it safe from
582 * moving of frame data in rt2x00usb.
583 */
584 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
585 rxd = (__le32 *)skbdesc->desc;
586 rxwi = &rxd[RXINFO_DESC_SIZE / sizeof(__le32)];
587
588 /*
589 * It is now safe to read the descriptor on all architectures.
590 */
591 rt2x00_desc_read(rxd, 0, &rxd0);
592 rt2x00_desc_read(rxwi, 0, &rxwi0);
593 rt2x00_desc_read(rxwi, 1, &rxwi1);
594 rt2x00_desc_read(rxwi, 2, &rxwi2);
595 rt2x00_desc_read(rxwi, 3, &rxwi3);
596
597 if (rt2x00_get_field32(rxd0, RXD_W0_CRC_ERROR))
598 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
599
600 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
601 rxdesc->cipher = rt2x00_get_field32(rxwi0, RXWI_W0_UDF);
602 rxdesc->cipher_status =
603 rt2x00_get_field32(rxd0, RXD_W0_CIPHER_ERROR);
604 }
605
606 if (rt2x00_get_field32(rxd0, RXD_W0_DECRYPTED)) {
607 /*
608 * Hardware has stripped IV/EIV data from 802.11 frame during
609 * decryption. Unfortunately the descriptor doesn't contain
610 * any fields with the EIV/IV data either, so they can't
611 * be restored by rt2x00lib.
612 */
613 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
614
615 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
616 rxdesc->flags |= RX_FLAG_DECRYPTED;
617 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
618 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
619 }
620
621 if (rt2x00_get_field32(rxd0, RXD_W0_MY_BSS))
622 rxdesc->dev_flags |= RXDONE_MY_BSS;
623
624 if (rt2x00_get_field32(rxd0, RXD_W0_L2PAD)) {
625 rxdesc->dev_flags |= RXDONE_L2PAD;
626 skbdesc->flags |= SKBDESC_L2_PADDED;
627 }
628
629 if (rt2x00_get_field32(rxwi1, RXWI_W1_SHORT_GI))
630 rxdesc->flags |= RX_FLAG_SHORT_GI;
631
632 if (rt2x00_get_field32(rxwi1, RXWI_W1_BW))
633 rxdesc->flags |= RX_FLAG_40MHZ;
634
635 /*
636 * Detect RX rate, always use MCS as signal type.
637 */
638 rxdesc->dev_flags |= RXDONE_SIGNAL_MCS;
639 rxdesc->rate_mode = rt2x00_get_field32(rxwi1, RXWI_W1_PHYMODE);
640 rxdesc->signal = rt2x00_get_field32(rxwi1, RXWI_W1_MCS);
641
642 /*
643 * Mask of 0x8 bit to remove the short preamble flag.
644 */
645 if (rxdesc->rate_mode == RATE_MODE_CCK)
646 rxdesc->signal &= ~0x8;
647
648 rxdesc->rssi =
649 (rt2x00_get_field32(rxwi2, RXWI_W2_RSSI0) +
650 rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1)) / 2;
651
652 rxdesc->noise =
653 (rt2x00_get_field32(rxwi3, RXWI_W3_SNR0) +
654 rt2x00_get_field32(rxwi3, RXWI_W3_SNR1)) / 2;
655
656 rxdesc->size = rt2x00_get_field32(rxwi0, RXWI_W0_MPDU_TOTAL_BYTE_COUNT);
657
658 /*
659 * Remove RXWI descriptor from start of buffer.
660 */
661 skb_pull(entry->skb, skbdesc->desc_len);
662 skb_trim(entry->skb, rxdesc->size);
663 }
664
665 /*
666 * Device probe functions.
667 */
668 static int rt2800usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
669 {
670 u16 word;
671 u8 *mac;
672 u8 default_lna_gain;
673
674 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
675
676 /*
677 * Start validation of the data that has been read.
678 */
679 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
680 if (!is_valid_ether_addr(mac)) {
681 random_ether_addr(mac);
682 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
683 }
684
685 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
686 if (word == 0xffff) {
687 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
688 rt2x00_set_field16(&word, EEPROM_ANTENNA_TXPATH, 1);
689 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820);
690 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
691 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
692 } else if (rt2x00_rev(&rt2x00dev->chip) < RT2883_VERSION) {
693 /*
694 * There is a max of 2 RX streams for RT2870 series
695 */
696 if (rt2x00_get_field16(word, EEPROM_ANTENNA_RXPATH) > 2)
697 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
698 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
699 }
700
701 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
702 if (word == 0xffff) {
703 rt2x00_set_field16(&word, EEPROM_NIC_HW_RADIO, 0);
704 rt2x00_set_field16(&word, EEPROM_NIC_DYNAMIC_TX_AGC, 0);
705 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_BG, 0);
706 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_A, 0);
707 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
708 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_BG, 0);
709 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_A, 0);
710 rt2x00_set_field16(&word, EEPROM_NIC_WPS_PBC, 0);
711 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_BG, 0);
712 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_A, 0);
713 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
714 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
715 }
716
717 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
718 if ((word & 0x00ff) == 0x00ff) {
719 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
720 rt2x00_set_field16(&word, EEPROM_FREQ_LED_MODE,
721 LED_MODE_TXRX_ACTIVITY);
722 rt2x00_set_field16(&word, EEPROM_FREQ_LED_POLARITY, 0);
723 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
724 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED1, 0x5555);
725 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED2, 0x2221);
726 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED3, 0xa9f8);
727 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
728 }
729
730 /*
731 * During the LNA validation we are going to use
732 * lna0 as correct value. Note that EEPROM_LNA
733 * is never validated.
734 */
735 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &word);
736 default_lna_gain = rt2x00_get_field16(word, EEPROM_LNA_A0);
737
738 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG, &word);
739 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG_OFFSET0)) > 10)
740 rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET0, 0);
741 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG_OFFSET1)) > 10)
742 rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET1, 0);
743 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG, word);
744
745 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &word);
746 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG2_OFFSET2)) > 10)
747 rt2x00_set_field16(&word, EEPROM_RSSI_BG2_OFFSET2, 0);
748 if (rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0x00 ||
749 rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0xff)
750 rt2x00_set_field16(&word, EEPROM_RSSI_BG2_LNA_A1,
751 default_lna_gain);
752 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG2, word);
753
754 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A, &word);
755 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET0)) > 10)
756 rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET0, 0);
757 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET1)) > 10)
758 rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET1, 0);
759 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_A, word);
760
761 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &word);
762 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A2_OFFSET2)) > 10)
763 rt2x00_set_field16(&word, EEPROM_RSSI_A2_OFFSET2, 0);
764 if (rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0x00 ||
765 rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0xff)
766 rt2x00_set_field16(&word, EEPROM_RSSI_A2_LNA_A2,
767 default_lna_gain);
768 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_A2, word);
769
770 return 0;
771 }
772
773 static int rt2800usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
774 {
775 u32 reg;
776 u16 value;
777 u16 eeprom;
778
779 /*
780 * Read EEPROM word for configuration.
781 */
782 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
783
784 /*
785 * Identify RF chipset.
786 */
787 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
788 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
789 rt2x00_set_chip(rt2x00dev, RT2870, value, reg);
790
791 /*
792 * The check for rt2860 is not a typo, some rt2870 hardware
793 * identifies itself as rt2860 in the CSR register.
794 */
795 if (!rt2x00_check_rev(&rt2x00dev->chip, 0xfff00000, 0x28600000) &&
796 !rt2x00_check_rev(&rt2x00dev->chip, 0xfff00000, 0x28700000) &&
797 !rt2x00_check_rev(&rt2x00dev->chip, 0xfff00000, 0x28800000) &&
798 !rt2x00_check_rev(&rt2x00dev->chip, 0xffff0000, 0x30700000)) {
799 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
800 return -ENODEV;
801 }
802
803 if (!rt2x00_rf(&rt2x00dev->chip, RF2820) &&
804 !rt2x00_rf(&rt2x00dev->chip, RF2850) &&
805 !rt2x00_rf(&rt2x00dev->chip, RF2720) &&
806 !rt2x00_rf(&rt2x00dev->chip, RF2750) &&
807 !rt2x00_rf(&rt2x00dev->chip, RF3020) &&
808 !rt2x00_rf(&rt2x00dev->chip, RF2020)) {
809 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
810 return -ENODEV;
811 }
812
813 /*
814 * Identify default antenna configuration.
815 */
816 rt2x00dev->default_ant.tx =
817 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH);
818 rt2x00dev->default_ant.rx =
819 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH);
820
821 /*
822 * Read frequency offset and RF programming sequence.
823 */
824 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
825 rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
826
827 /*
828 * Read external LNA informations.
829 */
830 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
831
832 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_A))
833 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
834 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG))
835 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
836
837 /*
838 * Detect if this device has an hardware controlled radio.
839 */
840 if (rt2x00_get_field16(eeprom, EEPROM_NIC_HW_RADIO))
841 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
842
843 /*
844 * Store led settings, for correct led behaviour.
845 */
846 #ifdef CONFIG_RT2X00_LIB_LEDS
847 rt2800_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
848 rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
849 rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
850
851 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ,
852 &rt2x00dev->led_mcu_reg);
853 #endif /* CONFIG_RT2X00_LIB_LEDS */
854
855 return 0;
856 }
857
858 /*
859 * RF value list for rt2870
860 * Supports: 2.4 GHz (all) & 5.2 GHz (RF2850 & RF2750)
861 */
862 static const struct rf_channel rf_vals[] = {
863 { 1, 0x18402ecc, 0x184c0786, 0x1816b455, 0x1800510b },
864 { 2, 0x18402ecc, 0x184c0786, 0x18168a55, 0x1800519f },
865 { 3, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800518b },
866 { 4, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800519f },
867 { 5, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800518b },
868 { 6, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800519f },
869 { 7, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800518b },
870 { 8, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800519f },
871 { 9, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800518b },
872 { 10, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800519f },
873 { 11, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800518b },
874 { 12, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800519f },
875 { 13, 0x18402ecc, 0x184c079e, 0x18168a55, 0x1800518b },
876 { 14, 0x18402ecc, 0x184c07a2, 0x18168a55, 0x18005193 },
877
878 /* 802.11 UNI / HyperLan 2 */
879 { 36, 0x18402ecc, 0x184c099a, 0x18158a55, 0x180ed1a3 },
880 { 38, 0x18402ecc, 0x184c099e, 0x18158a55, 0x180ed193 },
881 { 40, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed183 },
882 { 44, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed1a3 },
883 { 46, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed18b },
884 { 48, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed19b },
885 { 52, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed193 },
886 { 54, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed1a3 },
887 { 56, 0x18402ec8, 0x184c068e, 0x18158a55, 0x180ed18b },
888 { 60, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed183 },
889 { 62, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed193 },
890 { 64, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed1a3 },
891
892 /* 802.11 HyperLan 2 */
893 { 100, 0x18402ec8, 0x184c06b2, 0x18178a55, 0x180ed783 },
894 { 102, 0x18402ec8, 0x184c06b2, 0x18578a55, 0x180ed793 },
895 { 104, 0x18402ec8, 0x185c06b2, 0x18578a55, 0x180ed1a3 },
896 { 108, 0x18402ecc, 0x185c0a32, 0x18578a55, 0x180ed193 },
897 { 110, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed183 },
898 { 112, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed19b },
899 { 116, 0x18402ecc, 0x184c0a3a, 0x18178a55, 0x180ed1a3 },
900 { 118, 0x18402ecc, 0x184c0a3e, 0x18178a55, 0x180ed193 },
901 { 120, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed183 },
902 { 124, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed193 },
903 { 126, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed15b },
904 { 128, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed1a3 },
905 { 132, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed18b },
906 { 134, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed193 },
907 { 136, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed19b },
908 { 140, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed183 },
909
910 /* 802.11 UNII */
911 { 149, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed1a7 },
912 { 151, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed187 },
913 { 153, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed18f },
914 { 157, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed19f },
915 { 159, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed1a7 },
916 { 161, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed187 },
917 { 165, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed197 },
918 { 167, 0x18402ec4, 0x184c03d2, 0x18179855, 0x1815531f },
919 { 169, 0x18402ec4, 0x184c03d2, 0x18179855, 0x18155327 },
920 { 171, 0x18402ec4, 0x184c03d6, 0x18179855, 0x18155307 },
921 { 173, 0x18402ec4, 0x184c03d6, 0x18179855, 0x1815530f },
922
923 /* 802.11 Japan */
924 { 184, 0x15002ccc, 0x1500491e, 0x1509be55, 0x150c0a0b },
925 { 188, 0x15002ccc, 0x15004922, 0x1509be55, 0x150c0a13 },
926 { 192, 0x15002ccc, 0x15004926, 0x1509be55, 0x150c0a1b },
927 { 196, 0x15002ccc, 0x1500492a, 0x1509be55, 0x150c0a23 },
928 { 208, 0x15002ccc, 0x1500493a, 0x1509be55, 0x150c0a13 },
929 { 212, 0x15002ccc, 0x1500493e, 0x1509be55, 0x150c0a1b },
930 { 216, 0x15002ccc, 0x15004982, 0x1509be55, 0x150c0a23 },
931 };
932
933 /*
934 * RF value list for rt3070
935 * Supports: 2.4 GHz
936 */
937 static const struct rf_channel rf_vals_3070[] = {
938 {1, 241, 2, 2 },
939 {2, 241, 2, 7 },
940 {3, 242, 2, 2 },
941 {4, 242, 2, 7 },
942 {5, 243, 2, 2 },
943 {6, 243, 2, 7 },
944 {7, 244, 2, 2 },
945 {8, 244, 2, 7 },
946 {9, 245, 2, 2 },
947 {10, 245, 2, 7 },
948 {11, 246, 2, 2 },
949 {12, 246, 2, 7 },
950 {13, 247, 2, 2 },
951 {14, 248, 2, 4 },
952 };
953
954 static int rt2800usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
955 {
956 struct hw_mode_spec *spec = &rt2x00dev->spec;
957 struct channel_info *info;
958 char *tx_power1;
959 char *tx_power2;
960 unsigned int i;
961 u16 eeprom;
962
963 /*
964 * Initialize all hw fields.
965 */
966 rt2x00dev->hw->flags =
967 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
968 IEEE80211_HW_SIGNAL_DBM |
969 IEEE80211_HW_SUPPORTS_PS |
970 IEEE80211_HW_PS_NULLFUNC_STACK;
971 rt2x00dev->hw->extra_tx_headroom = TXINFO_DESC_SIZE + TXWI_DESC_SIZE;
972
973 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
974 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
975 rt2x00_eeprom_addr(rt2x00dev,
976 EEPROM_MAC_ADDR_0));
977
978 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
979
980 /*
981 * Initialize HT information.
982 */
983 spec->ht.ht_supported = true;
984 spec->ht.cap =
985 IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
986 IEEE80211_HT_CAP_GRN_FLD |
987 IEEE80211_HT_CAP_SGI_20 |
988 IEEE80211_HT_CAP_SGI_40 |
989 IEEE80211_HT_CAP_TX_STBC |
990 IEEE80211_HT_CAP_RX_STBC |
991 IEEE80211_HT_CAP_PSMP_SUPPORT;
992 spec->ht.ampdu_factor = 3;
993 spec->ht.ampdu_density = 4;
994 spec->ht.mcs.tx_params =
995 IEEE80211_HT_MCS_TX_DEFINED |
996 IEEE80211_HT_MCS_TX_RX_DIFF |
997 ((rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) - 1) <<
998 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
999
1000 switch (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH)) {
1001 case 3:
1002 spec->ht.mcs.rx_mask[2] = 0xff;
1003 case 2:
1004 spec->ht.mcs.rx_mask[1] = 0xff;
1005 case 1:
1006 spec->ht.mcs.rx_mask[0] = 0xff;
1007 spec->ht.mcs.rx_mask[4] = 0x1; /* MCS32 */
1008 break;
1009 }
1010
1011 /*
1012 * Initialize hw_mode information.
1013 */
1014 spec->supported_bands = SUPPORT_BAND_2GHZ;
1015 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1016
1017 if (rt2x00_rf(&rt2x00dev->chip, RF2820) ||
1018 rt2x00_rf(&rt2x00dev->chip, RF2720)) {
1019 spec->num_channels = 14;
1020 spec->channels = rf_vals;
1021 } else if (rt2x00_rf(&rt2x00dev->chip, RF2850) ||
1022 rt2x00_rf(&rt2x00dev->chip, RF2750)) {
1023 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1024 spec->num_channels = ARRAY_SIZE(rf_vals);
1025 spec->channels = rf_vals;
1026 } else if (rt2x00_rf(&rt2x00dev->chip, RF3020) ||
1027 rt2x00_rf(&rt2x00dev->chip, RF2020)) {
1028 spec->num_channels = ARRAY_SIZE(rf_vals_3070);
1029 spec->channels = rf_vals_3070;
1030 }
1031
1032 /*
1033 * Create channel information array
1034 */
1035 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1036 if (!info)
1037 return -ENOMEM;
1038
1039 spec->channels_info = info;
1040
1041 tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG1);
1042 tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG2);
1043
1044 for (i = 0; i < 14; i++) {
1045 info[i].tx_power1 = TXPOWER_G_FROM_DEV(tx_power1[i]);
1046 info[i].tx_power2 = TXPOWER_G_FROM_DEV(tx_power2[i]);
1047 }
1048
1049 if (spec->num_channels > 14) {
1050 tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A1);
1051 tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A2);
1052
1053 for (i = 14; i < spec->num_channels; i++) {
1054 info[i].tx_power1 = TXPOWER_A_FROM_DEV(tx_power1[i]);
1055 info[i].tx_power2 = TXPOWER_A_FROM_DEV(tx_power2[i]);
1056 }
1057 }
1058
1059 return 0;
1060 }
1061
1062 static const struct rt2800_ops rt2800usb_rt2800_ops = {
1063 .register_read = rt2x00usb_register_read,
1064 .register_write = rt2x00usb_register_write,
1065 .register_write_lock = rt2x00usb_register_write_lock,
1066
1067 .register_multiread = rt2x00usb_register_multiread,
1068 .register_multiwrite = rt2x00usb_register_multiwrite,
1069
1070 .regbusy_read = rt2x00usb_regbusy_read,
1071 };
1072
1073 static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1074 {
1075 int retval;
1076
1077 rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_USB);
1078
1079 rt2x00dev->priv = (void *)&rt2800usb_rt2800_ops;
1080
1081 /*
1082 * Allocate eeprom data.
1083 */
1084 retval = rt2800usb_validate_eeprom(rt2x00dev);
1085 if (retval)
1086 return retval;
1087
1088 retval = rt2800usb_init_eeprom(rt2x00dev);
1089 if (retval)
1090 return retval;
1091
1092 /*
1093 * Initialize hw specifications.
1094 */
1095 retval = rt2800usb_probe_hw_mode(rt2x00dev);
1096 if (retval)
1097 return retval;
1098
1099 /*
1100 * This device has multiple filters for control frames
1101 * and has a separate filter for PS Poll frames.
1102 */
1103 __set_bit(DRIVER_SUPPORT_CONTROL_FILTERS, &rt2x00dev->flags);
1104 __set_bit(DRIVER_SUPPORT_CONTROL_FILTER_PSPOLL, &rt2x00dev->flags);
1105
1106 /*
1107 * This device requires firmware.
1108 */
1109 __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1110 __set_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags);
1111 if (!modparam_nohwcrypt)
1112 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
1113
1114 /*
1115 * Set the rssi offset.
1116 */
1117 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1118
1119 return 0;
1120 }
1121
1122 static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
1123 .probe_hw = rt2800usb_probe_hw,
1124 .get_firmware_name = rt2800usb_get_firmware_name,
1125 .check_firmware = rt2800usb_check_firmware,
1126 .load_firmware = rt2800usb_load_firmware,
1127 .initialize = rt2x00usb_initialize,
1128 .uninitialize = rt2x00usb_uninitialize,
1129 .clear_entry = rt2x00usb_clear_entry,
1130 .set_device_state = rt2800usb_set_device_state,
1131 .rfkill_poll = rt2800_rfkill_poll,
1132 .link_stats = rt2800_link_stats,
1133 .reset_tuner = rt2800_reset_tuner,
1134 .link_tuner = rt2800_link_tuner,
1135 .write_tx_desc = rt2800usb_write_tx_desc,
1136 .write_tx_data = rt2x00usb_write_tx_data,
1137 .write_beacon = rt2800usb_write_beacon,
1138 .get_tx_data_len = rt2800usb_get_tx_data_len,
1139 .kick_tx_queue = rt2800usb_kick_tx_queue,
1140 .kill_tx_queue = rt2x00usb_kill_tx_queue,
1141 .fill_rxdone = rt2800usb_fill_rxdone,
1142 .config_shared_key = rt2800_config_shared_key,
1143 .config_pairwise_key = rt2800_config_pairwise_key,
1144 .config_filter = rt2800_config_filter,
1145 .config_intf = rt2800_config_intf,
1146 .config_erp = rt2800_config_erp,
1147 .config_ant = rt2800_config_ant,
1148 .config = rt2800_config,
1149 };
1150
1151 static const struct data_queue_desc rt2800usb_queue_rx = {
1152 .entry_num = RX_ENTRIES,
1153 .data_size = AGGREGATION_SIZE,
1154 .desc_size = RXINFO_DESC_SIZE + RXWI_DESC_SIZE,
1155 .priv_size = sizeof(struct queue_entry_priv_usb),
1156 };
1157
1158 static const struct data_queue_desc rt2800usb_queue_tx = {
1159 .entry_num = TX_ENTRIES,
1160 .data_size = AGGREGATION_SIZE,
1161 .desc_size = TXINFO_DESC_SIZE + TXWI_DESC_SIZE,
1162 .priv_size = sizeof(struct queue_entry_priv_usb),
1163 };
1164
1165 static const struct data_queue_desc rt2800usb_queue_bcn = {
1166 .entry_num = 8 * BEACON_ENTRIES,
1167 .data_size = MGMT_FRAME_SIZE,
1168 .desc_size = TXINFO_DESC_SIZE + TXWI_DESC_SIZE,
1169 .priv_size = sizeof(struct queue_entry_priv_usb),
1170 };
1171
1172 static const struct rt2x00_ops rt2800usb_ops = {
1173 .name = KBUILD_MODNAME,
1174 .max_sta_intf = 1,
1175 .max_ap_intf = 8,
1176 .eeprom_size = EEPROM_SIZE,
1177 .rf_size = RF_SIZE,
1178 .tx_queues = NUM_TX_QUEUES,
1179 .rx = &rt2800usb_queue_rx,
1180 .tx = &rt2800usb_queue_tx,
1181 .bcn = &rt2800usb_queue_bcn,
1182 .lib = &rt2800usb_rt2x00_ops,
1183 .hw = &rt2800_mac80211_ops,
1184 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1185 .debugfs = &rt2800_rt2x00debug,
1186 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1187 };
1188
1189 /*
1190 * rt2800usb module information.
1191 */
1192 static struct usb_device_id rt2800usb_device_table[] = {
1193 /* Abocom */
1194 { USB_DEVICE(0x07b8, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
1195 { USB_DEVICE(0x07b8, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
1196 { USB_DEVICE(0x07b8, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
1197 { USB_DEVICE(0x07b8, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
1198 { USB_DEVICE(0x07b8, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
1199 { USB_DEVICE(0x1482, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
1200 /* AirTies */
1201 { USB_DEVICE(0x1eda, 0x2310), USB_DEVICE_DATA(&rt2800usb_ops) },
1202 /* Amigo */
1203 { USB_DEVICE(0x0e0b, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) },
1204 { USB_DEVICE(0x0e0b, 0x9041), USB_DEVICE_DATA(&rt2800usb_ops) },
1205 /* Amit */
1206 { USB_DEVICE(0x15c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) },
1207 /* ASUS */
1208 { USB_DEVICE(0x0b05, 0x1731), USB_DEVICE_DATA(&rt2800usb_ops) },
1209 { USB_DEVICE(0x0b05, 0x1732), USB_DEVICE_DATA(&rt2800usb_ops) },
1210 { USB_DEVICE(0x0b05, 0x1742), USB_DEVICE_DATA(&rt2800usb_ops) },
1211 { USB_DEVICE(0x0b05, 0x1760), USB_DEVICE_DATA(&rt2800usb_ops) },
1212 { USB_DEVICE(0x0b05, 0x1761), USB_DEVICE_DATA(&rt2800usb_ops) },
1213 /* AzureWave */
1214 { USB_DEVICE(0x13d3, 0x3247), USB_DEVICE_DATA(&rt2800usb_ops) },
1215 { USB_DEVICE(0x13d3, 0x3262), USB_DEVICE_DATA(&rt2800usb_ops) },
1216 { USB_DEVICE(0x13d3, 0x3273), USB_DEVICE_DATA(&rt2800usb_ops) },
1217 { USB_DEVICE(0x13d3, 0x3284), USB_DEVICE_DATA(&rt2800usb_ops) },
1218 /* Belkin */
1219 { USB_DEVICE(0x050d, 0x8053), USB_DEVICE_DATA(&rt2800usb_ops) },
1220 { USB_DEVICE(0x050d, 0x805c), USB_DEVICE_DATA(&rt2800usb_ops) },
1221 { USB_DEVICE(0x050d, 0x815c), USB_DEVICE_DATA(&rt2800usb_ops) },
1222 { USB_DEVICE(0x050d, 0x825a), USB_DEVICE_DATA(&rt2800usb_ops) },
1223 /* Buffalo */
1224 { USB_DEVICE(0x0411, 0x00e8), USB_DEVICE_DATA(&rt2800usb_ops) },
1225 { USB_DEVICE(0x0411, 0x012e), USB_DEVICE_DATA(&rt2800usb_ops) },
1226 /* Conceptronic */
1227 { USB_DEVICE(0x14b2, 0x3c06), USB_DEVICE_DATA(&rt2800usb_ops) },
1228 { USB_DEVICE(0x14b2, 0x3c07), USB_DEVICE_DATA(&rt2800usb_ops) },
1229 { USB_DEVICE(0x14b2, 0x3c08), USB_DEVICE_DATA(&rt2800usb_ops) },
1230 { USB_DEVICE(0x14b2, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
1231 { USB_DEVICE(0x14b2, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) },
1232 { USB_DEVICE(0x14b2, 0x3c12), USB_DEVICE_DATA(&rt2800usb_ops) },
1233 { USB_DEVICE(0x14b2, 0x3c23), USB_DEVICE_DATA(&rt2800usb_ops) },
1234 { USB_DEVICE(0x14b2, 0x3c25), USB_DEVICE_DATA(&rt2800usb_ops) },
1235 { USB_DEVICE(0x14b2, 0x3c27), USB_DEVICE_DATA(&rt2800usb_ops) },
1236 { USB_DEVICE(0x14b2, 0x3c28), USB_DEVICE_DATA(&rt2800usb_ops) },
1237 /* Corega */
1238 { USB_DEVICE(0x07aa, 0x002f), USB_DEVICE_DATA(&rt2800usb_ops) },
1239 { USB_DEVICE(0x07aa, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) },
1240 { USB_DEVICE(0x07aa, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) },
1241 { USB_DEVICE(0x18c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) },
1242 { USB_DEVICE(0x18c5, 0x0012), USB_DEVICE_DATA(&rt2800usb_ops) },
1243 /* D-Link */
1244 { USB_DEVICE(0x07d1, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
1245 { USB_DEVICE(0x07d1, 0x3c0a), USB_DEVICE_DATA(&rt2800usb_ops) },
1246 { USB_DEVICE(0x07d1, 0x3c0b), USB_DEVICE_DATA(&rt2800usb_ops) },
1247 { USB_DEVICE(0x07d1, 0x3c0d), USB_DEVICE_DATA(&rt2800usb_ops) },
1248 { USB_DEVICE(0x07d1, 0x3c0e), USB_DEVICE_DATA(&rt2800usb_ops) },
1249 { USB_DEVICE(0x07d1, 0x3c0f), USB_DEVICE_DATA(&rt2800usb_ops) },
1250 { USB_DEVICE(0x07d1, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) },
1251 { USB_DEVICE(0x07d1, 0x3c13), USB_DEVICE_DATA(&rt2800usb_ops) },
1252 /* Edimax */
1253 { USB_DEVICE(0x7392, 0x7711), USB_DEVICE_DATA(&rt2800usb_ops) },
1254 { USB_DEVICE(0x7392, 0x7717), USB_DEVICE_DATA(&rt2800usb_ops) },
1255 { USB_DEVICE(0x7392, 0x7718), USB_DEVICE_DATA(&rt2800usb_ops) },
1256 /* Encore */
1257 { USB_DEVICE(0x203d, 0x1480), USB_DEVICE_DATA(&rt2800usb_ops) },
1258 /* EnGenius */
1259 { USB_DEVICE(0X1740, 0x9701), USB_DEVICE_DATA(&rt2800usb_ops) },
1260 { USB_DEVICE(0x1740, 0x9702), USB_DEVICE_DATA(&rt2800usb_ops) },
1261 { USB_DEVICE(0x1740, 0x9703), USB_DEVICE_DATA(&rt2800usb_ops) },
1262 { USB_DEVICE(0x1740, 0x9705), USB_DEVICE_DATA(&rt2800usb_ops) },
1263 { USB_DEVICE(0x1740, 0x9706), USB_DEVICE_DATA(&rt2800usb_ops) },
1264 { USB_DEVICE(0x1740, 0x9801), USB_DEVICE_DATA(&rt2800usb_ops) },
1265 /* Gemtek */
1266 { USB_DEVICE(0x15a9, 0x0010), USB_DEVICE_DATA(&rt2800usb_ops) },
1267 /* Gigabyte */
1268 { USB_DEVICE(0x1044, 0x800b), USB_DEVICE_DATA(&rt2800usb_ops) },
1269 { USB_DEVICE(0x1044, 0x800c), USB_DEVICE_DATA(&rt2800usb_ops) },
1270 { USB_DEVICE(0x1044, 0x800d), USB_DEVICE_DATA(&rt2800usb_ops) },
1271 /* Hawking */
1272 { USB_DEVICE(0x0e66, 0x0001), USB_DEVICE_DATA(&rt2800usb_ops) },
1273 { USB_DEVICE(0x0e66, 0x0003), USB_DEVICE_DATA(&rt2800usb_ops) },
1274 { USB_DEVICE(0x0e66, 0x0009), USB_DEVICE_DATA(&rt2800usb_ops) },
1275 { USB_DEVICE(0x0e66, 0x000b), USB_DEVICE_DATA(&rt2800usb_ops) },
1276 /* I-O DATA */
1277 { USB_DEVICE(0x04bb, 0x0945), USB_DEVICE_DATA(&rt2800usb_ops) },
1278 /* LevelOne */
1279 { USB_DEVICE(0x1740, 0x0605), USB_DEVICE_DATA(&rt2800usb_ops) },
1280 { USB_DEVICE(0x1740, 0x0615), USB_DEVICE_DATA(&rt2800usb_ops) },
1281 /* Linksys */
1282 { USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) },
1283 { USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) },
1284 { USB_DEVICE(0x1737, 0x0077), USB_DEVICE_DATA(&rt2800usb_ops) },
1285 /* Logitec */
1286 { USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) },
1287 { USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) },
1288 { USB_DEVICE(0x0789, 0x0164), USB_DEVICE_DATA(&rt2800usb_ops) },
1289 /* Motorola */
1290 { USB_DEVICE(0x100d, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) },
1291 { USB_DEVICE(0x100d, 0x9032), USB_DEVICE_DATA(&rt2800usb_ops) },
1292 /* Ovislink */
1293 { USB_DEVICE(0x1b75, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
1294 /* Pegatron */
1295 { USB_DEVICE(0x1d4d, 0x0002), USB_DEVICE_DATA(&rt2800usb_ops) },
1296 { USB_DEVICE(0x1d4d, 0x000c), USB_DEVICE_DATA(&rt2800usb_ops) },
1297 { USB_DEVICE(0x1d4d, 0x000e), USB_DEVICE_DATA(&rt2800usb_ops) },
1298 /* Philips */
1299 { USB_DEVICE(0x0471, 0x200f), USB_DEVICE_DATA(&rt2800usb_ops) },
1300 /* Planex */
1301 { USB_DEVICE(0x2019, 0xed06), USB_DEVICE_DATA(&rt2800usb_ops) },
1302 { USB_DEVICE(0x2019, 0xab24), USB_DEVICE_DATA(&rt2800usb_ops) },
1303 { USB_DEVICE(0x2019, 0xab25), USB_DEVICE_DATA(&rt2800usb_ops) },
1304 /* Qcom */
1305 { USB_DEVICE(0x18e8, 0x6259), USB_DEVICE_DATA(&rt2800usb_ops) },
1306 /* Quanta */
1307 { USB_DEVICE(0x1a32, 0x0304), USB_DEVICE_DATA(&rt2800usb_ops) },
1308 /* Ralink */
1309 { USB_DEVICE(0x0db0, 0x3820), USB_DEVICE_DATA(&rt2800usb_ops) },
1310 { USB_DEVICE(0x0db0, 0x6899), USB_DEVICE_DATA(&rt2800usb_ops) },
1311 { USB_DEVICE(0x148f, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) },
1312 { USB_DEVICE(0x148f, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
1313 { USB_DEVICE(0x148f, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
1314 { USB_DEVICE(0x148f, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
1315 { USB_DEVICE(0x148f, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
1316 { USB_DEVICE(0x148f, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
1317 { USB_DEVICE(0x148f, 0x3572), USB_DEVICE_DATA(&rt2800usb_ops) },
1318 /* Samsung */
1319 { USB_DEVICE(0x04e8, 0x2018), USB_DEVICE_DATA(&rt2800usb_ops) },
1320 /* Siemens */
1321 { USB_DEVICE(0x129b, 0x1828), USB_DEVICE_DATA(&rt2800usb_ops) },
1322 /* Sitecom */
1323 { USB_DEVICE(0x0df6, 0x0017), USB_DEVICE_DATA(&rt2800usb_ops) },
1324 { USB_DEVICE(0x0df6, 0x002b), USB_DEVICE_DATA(&rt2800usb_ops) },
1325 { USB_DEVICE(0x0df6, 0x002c), USB_DEVICE_DATA(&rt2800usb_ops) },
1326 { USB_DEVICE(0x0df6, 0x002d), USB_DEVICE_DATA(&rt2800usb_ops) },
1327 { USB_DEVICE(0x0df6, 0x0039), USB_DEVICE_DATA(&rt2800usb_ops) },
1328 { USB_DEVICE(0x0df6, 0x003b), USB_DEVICE_DATA(&rt2800usb_ops) },
1329 { USB_DEVICE(0x0df6, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) },
1330 { USB_DEVICE(0x0df6, 0x003d), USB_DEVICE_DATA(&rt2800usb_ops) },
1331 { USB_DEVICE(0x0df6, 0x003e), USB_DEVICE_DATA(&rt2800usb_ops) },
1332 { USB_DEVICE(0x0df6, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) },
1333 { USB_DEVICE(0x0df6, 0x0040), USB_DEVICE_DATA(&rt2800usb_ops) },
1334 { USB_DEVICE(0x0df6, 0x0042), USB_DEVICE_DATA(&rt2800usb_ops) },
1335 /* SMC */
1336 { USB_DEVICE(0x083a, 0x6618), USB_DEVICE_DATA(&rt2800usb_ops) },
1337 { USB_DEVICE(0x083a, 0x7511), USB_DEVICE_DATA(&rt2800usb_ops) },
1338 { USB_DEVICE(0x083a, 0x7512), USB_DEVICE_DATA(&rt2800usb_ops) },
1339 { USB_DEVICE(0x083a, 0x7522), USB_DEVICE_DATA(&rt2800usb_ops) },
1340 { USB_DEVICE(0x083a, 0x8522), USB_DEVICE_DATA(&rt2800usb_ops) },
1341 { USB_DEVICE(0x083a, 0xa512), USB_DEVICE_DATA(&rt2800usb_ops) },
1342 { USB_DEVICE(0x083a, 0xa618), USB_DEVICE_DATA(&rt2800usb_ops) },
1343 { USB_DEVICE(0x083a, 0xb522), USB_DEVICE_DATA(&rt2800usb_ops) },
1344 { USB_DEVICE(0x083a, 0xc522), USB_DEVICE_DATA(&rt2800usb_ops) },
1345 /* Sparklan */
1346 { USB_DEVICE(0x15a9, 0x0006), USB_DEVICE_DATA(&rt2800usb_ops) },
1347 /* Sweex */
1348 { USB_DEVICE(0x177f, 0x0153), USB_DEVICE_DATA(&rt2800usb_ops) },
1349 { USB_DEVICE(0x177f, 0x0302), USB_DEVICE_DATA(&rt2800usb_ops) },
1350 { USB_DEVICE(0x177f, 0x0313), USB_DEVICE_DATA(&rt2800usb_ops) },
1351 /* U-Media*/
1352 { USB_DEVICE(0x157e, 0x300e), USB_DEVICE_DATA(&rt2800usb_ops) },
1353 /* ZCOM */
1354 { USB_DEVICE(0x0cde, 0x0022), USB_DEVICE_DATA(&rt2800usb_ops) },
1355 { USB_DEVICE(0x0cde, 0x0025), USB_DEVICE_DATA(&rt2800usb_ops) },
1356 /* Zinwell */
1357 { USB_DEVICE(0x5a57, 0x0280), USB_DEVICE_DATA(&rt2800usb_ops) },
1358 { USB_DEVICE(0x5a57, 0x0282), USB_DEVICE_DATA(&rt2800usb_ops) },
1359 { USB_DEVICE(0x5a57, 0x0283), USB_DEVICE_DATA(&rt2800usb_ops) },
1360 { USB_DEVICE(0x5a57, 0x5257), USB_DEVICE_DATA(&rt2800usb_ops) },
1361 /* Zyxel */
1362 { USB_DEVICE(0x0586, 0x3416), USB_DEVICE_DATA(&rt2800usb_ops) },
1363 { USB_DEVICE(0x0586, 0x341a), USB_DEVICE_DATA(&rt2800usb_ops) },
1364 { 0, }
1365 };
1366
1367 MODULE_AUTHOR(DRV_PROJECT);
1368 MODULE_VERSION(DRV_VERSION);
1369 MODULE_DESCRIPTION("Ralink RT2800 USB Wireless LAN driver.");
1370 MODULE_SUPPORTED_DEVICE("Ralink RT2870 USB chipset based cards");
1371 MODULE_DEVICE_TABLE(usb, rt2800usb_device_table);
1372 MODULE_FIRMWARE(FIRMWARE_RT2870);
1373 MODULE_LICENSE("GPL");
1374
1375 static struct usb_driver rt2800usb_driver = {
1376 .name = KBUILD_MODNAME,
1377 .id_table = rt2800usb_device_table,
1378 .probe = rt2x00usb_probe,
1379 .disconnect = rt2x00usb_disconnect,
1380 .suspend = rt2x00usb_suspend,
1381 .resume = rt2x00usb_resume,
1382 };
1383
1384 static int __init rt2800usb_init(void)
1385 {
1386 return usb_register(&rt2800usb_driver);
1387 }
1388
1389 static void __exit rt2800usb_exit(void)
1390 {
1391 usb_deregister(&rt2800usb_driver);
1392 }
1393
1394 module_init(rt2800usb_init);
1395 module_exit(rt2800usb_exit);
Linux kernel - Deliverables
This page took 0.057473 seconds and 4 git commands to generate.