Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
1 /*
2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2x00lib
23 Abstract: rt2x00 queue specific routines.
24 */
25
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/dma-mapping.h>
29
30 #include "rt2x00.h"
31 #include "rt2x00lib.h"
32
33 struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
34 struct queue_entry *entry)
35 {
36 struct sk_buff *skb;
37 struct skb_frame_desc *skbdesc;
38 unsigned int frame_size;
39 unsigned int head_size = 0;
40 unsigned int tail_size = 0;
41
42 /*
43 * The frame size includes descriptor size, because the
44 * hardware directly receive the frame into the skbuffer.
45 */
46 frame_size = entry->queue->data_size + entry->queue->desc_size;
47
48 /*
49 * The payload should be aligned to a 4-byte boundary,
50 * this means we need at least 3 bytes for moving the frame
51 * into the correct offset.
52 */
53 head_size = 4;
54
55 /*
56 * For IV/EIV/ICV assembly we must make sure there is
57 * at least 8 bytes bytes available in headroom for IV/EIV
58 * and 4 bytes for ICV data as tailroon.
59 */
60 #ifdef CONFIG_RT2X00_LIB_CRYPTO
61 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
62 head_size += 8;
63 tail_size += 4;
64 }
65 #endif /* CONFIG_RT2X00_LIB_CRYPTO */
66
67 /*
68 * Allocate skbuffer.
69 */
70 skb = dev_alloc_skb(frame_size + head_size + tail_size);
71 if (!skb)
72 return NULL;
73
74 /*
75 * Make sure we not have a frame with the requested bytes
76 * available in the head and tail.
77 */
78 skb_reserve(skb, head_size);
79 skb_put(skb, frame_size);
80
81 /*
82 * Populate skbdesc.
83 */
84 skbdesc = get_skb_frame_desc(skb);
85 memset(skbdesc, 0, sizeof(*skbdesc));
86 skbdesc->entry = entry;
87
88 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
89 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
90 skb->data,
91 skb->len,
92 DMA_FROM_DEVICE);
93 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
94 }
95
96 return skb;
97 }
98
99 void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
100 {
101 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
102
103 /*
104 * If device has requested headroom, we should make sure that
105 * is also mapped to the DMA so it can be used for transfering
106 * additional descriptor information to the hardware.
107 */
108 skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
109
110 skbdesc->skb_dma =
111 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
112
113 /*
114 * Restore data pointer to original location again.
115 */
116 skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
117
118 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
119 }
120 EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
121
122 void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
123 {
124 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
125
126 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
127 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
128 DMA_FROM_DEVICE);
129 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
130 }
131
132 if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
133 /*
134 * Add headroom to the skb length, it has been removed
135 * by the driver, but it was actually mapped to DMA.
136 */
137 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
138 skb->len + rt2x00dev->hw->extra_tx_headroom,
139 DMA_TO_DEVICE);
140 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
141 }
142 }
143
144 void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
145 {
146 if (!skb)
147 return;
148
149 rt2x00queue_unmap_skb(rt2x00dev, skb);
150 dev_kfree_skb_any(skb);
151 }
152
153 static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
154 struct txentry_desc *txdesc)
155 {
156 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
157 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
158 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
159 struct ieee80211_rate *rate =
160 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
161 const struct rt2x00_rate *hwrate;
162 unsigned int data_length;
163 unsigned int duration;
164 unsigned int residual;
165 unsigned long irqflags;
166
167 memset(txdesc, 0, sizeof(*txdesc));
168
169 /*
170 * Initialize information from queue
171 */
172 txdesc->queue = entry->queue->qid;
173 txdesc->cw_min = entry->queue->cw_min;
174 txdesc->cw_max = entry->queue->cw_max;
175 txdesc->aifs = entry->queue->aifs;
176
177 /* Data length + CRC + IV/EIV/ICV/MMIC (when using encryption) */
178 data_length = entry->skb->len + 4;
179
180 /*
181 * Check whether this frame is to be acked.
182 */
183 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
184 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
185
186 #ifdef CONFIG_RT2X00_LIB_CRYPTO
187 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags) &&
188 !entry->skb->do_not_encrypt) {
189 struct ieee80211_key_conf *hw_key = tx_info->control.hw_key;
190
191 __set_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags);
192
193 txdesc->cipher = rt2x00crypto_key_to_cipher(hw_key);
194
195 if (hw_key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
196 __set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags);
197
198 txdesc->key_idx = hw_key->hw_key_idx;
199 txdesc->iv_offset = ieee80211_get_hdrlen_from_skb(entry->skb);
200
201 /*
202 * Extend frame length to include all encryption overhead
203 * that will be added by the hardware.
204 */
205 data_length += rt2x00crypto_tx_overhead(tx_info);
206
207 if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV))
208 __set_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags);
209
210 if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_MMIC))
211 __set_bit(ENTRY_TXD_ENCRYPT_MMIC, &txdesc->flags);
212 }
213 #endif /* CONFIG_RT2X00_LIB_CRYPTO */
214
215 /*
216 * Check if this is a RTS/CTS frame
217 */
218 if (ieee80211_is_rts(hdr->frame_control) ||
219 ieee80211_is_cts(hdr->frame_control)) {
220 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
221 if (ieee80211_is_rts(hdr->frame_control))
222 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
223 else
224 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
225 if (tx_info->control.rts_cts_rate_idx >= 0)
226 rate =
227 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
228 }
229
230 /*
231 * Determine retry information.
232 */
233 txdesc->retry_limit = tx_info->control.retry_limit;
234 if (tx_info->flags & IEEE80211_TX_CTL_LONG_RETRY_LIMIT)
235 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
236
237 /*
238 * Check if more fragments are pending
239 */
240 if (ieee80211_has_morefrags(hdr->frame_control)) {
241 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
242 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
243 }
244
245 /*
246 * Beacons and probe responses require the tsf timestamp
247 * to be inserted into the frame.
248 */
249 if (ieee80211_is_beacon(hdr->frame_control) ||
250 ieee80211_is_probe_resp(hdr->frame_control))
251 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
252
253 /*
254 * Determine with what IFS priority this frame should be send.
255 * Set ifs to IFS_SIFS when the this is not the first fragment,
256 * or this fragment came after RTS/CTS.
257 */
258 if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
259 txdesc->ifs = IFS_SIFS;
260 } else if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) {
261 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
262 txdesc->ifs = IFS_BACKOFF;
263 } else {
264 txdesc->ifs = IFS_SIFS;
265 }
266
267 /*
268 * Hardware should insert sequence counter.
269 * FIXME: We insert a software sequence counter first for
270 * hardware that doesn't support hardware sequence counting.
271 *
272 * This is wrong because beacons are not getting sequence
273 * numbers assigned properly.
274 *
275 * A secondary problem exists for drivers that cannot toggle
276 * sequence counting per-frame, since those will override the
277 * sequence counter given by mac80211.
278 */
279 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
280 if (likely(tx_info->control.vif)) {
281 struct rt2x00_intf *intf;
282
283 intf = vif_to_intf(tx_info->control.vif);
284
285 spin_lock_irqsave(&intf->seqlock, irqflags);
286
287 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
288 intf->seqno += 0x10;
289 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
290 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
291
292 spin_unlock_irqrestore(&intf->seqlock, irqflags);
293
294 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
295 }
296 }
297
298 /*
299 * PLCP setup
300 * Length calculation depends on OFDM/CCK rate.
301 */
302 hwrate = rt2x00_get_rate(rate->hw_value);
303 txdesc->signal = hwrate->plcp;
304 txdesc->service = 0x04;
305
306 if (hwrate->flags & DEV_RATE_OFDM) {
307 __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
308
309 txdesc->length_high = (data_length >> 6) & 0x3f;
310 txdesc->length_low = data_length & 0x3f;
311 } else {
312 /*
313 * Convert length to microseconds.
314 */
315 residual = get_duration_res(data_length, hwrate->bitrate);
316 duration = get_duration(data_length, hwrate->bitrate);
317
318 if (residual != 0) {
319 duration++;
320
321 /*
322 * Check if we need to set the Length Extension
323 */
324 if (hwrate->bitrate == 110 && residual <= 30)
325 txdesc->service |= 0x80;
326 }
327
328 txdesc->length_high = (duration >> 8) & 0xff;
329 txdesc->length_low = duration & 0xff;
330
331 /*
332 * When preamble is enabled we should set the
333 * preamble bit for the signal.
334 */
335 if (rt2x00_get_rate_preamble(rate->hw_value))
336 txdesc->signal |= 0x08;
337 }
338 }
339
340 static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
341 struct txentry_desc *txdesc)
342 {
343 struct data_queue *queue = entry->queue;
344 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
345
346 rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
347
348 /*
349 * All processing on the frame has been completed, this means
350 * it is now ready to be dumped to userspace through debugfs.
351 */
352 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
353
354 /*
355 * Check if we need to kick the queue, there are however a few rules
356 * 1) Don't kick beacon queue
357 * 2) Don't kick unless this is the last in frame in a burst.
358 * When the burst flag is set, this frame is always followed
359 * by another frame which in some way are related to eachother.
360 * This is true for fragments, RTS or CTS-to-self frames.
361 * 3) Rule 2 can be broken when the available entries
362 * in the queue are less then a certain threshold.
363 */
364 if (entry->queue->qid == QID_BEACON)
365 return;
366
367 if (rt2x00queue_threshold(queue) ||
368 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
369 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
370 }
371
372 int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
373 {
374 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
375 struct txentry_desc txdesc;
376 struct skb_frame_desc *skbdesc;
377 unsigned int iv_len = 0;
378
379 if (unlikely(rt2x00queue_full(queue)))
380 return -EINVAL;
381
382 if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
383 ERROR(queue->rt2x00dev,
384 "Arrived at non-free entry in the non-full queue %d.\n"
385 "Please file bug report to %s.\n",
386 queue->qid, DRV_PROJECT);
387 return -EINVAL;
388 }
389
390 /*
391 * Copy all TX descriptor information into txdesc,
392 * after that we are free to use the skb->cb array
393 * for our information.
394 */
395 entry->skb = skb;
396 rt2x00queue_create_tx_descriptor(entry, &txdesc);
397
398 if (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)
399 iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len;
400
401 /*
402 * All information is retreived from the skb->cb array,
403 * now we should claim ownership of the driver part of that
404 * array.
405 */
406 skbdesc = get_skb_frame_desc(entry->skb);
407 memset(skbdesc, 0, sizeof(*skbdesc));
408 skbdesc->entry = entry;
409
410 /*
411 * When hardware encryption is supported, and this frame
412 * is to be encrypted, we should strip the IV/EIV data from
413 * the frame so we can provide it to the driver seperately.
414 */
415 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
416 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
417 rt2x00crypto_tx_remove_iv(skb, iv_len);
418 }
419
420 /*
421 * It could be possible that the queue was corrupted and this
422 * call failed. Just drop the frame, we cannot rollback and pass
423 * the frame to mac80211 because the skb->cb has now been tainted.
424 */
425 if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
426 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
427 dev_kfree_skb_any(entry->skb);
428 entry->skb = NULL;
429 return 0;
430 }
431
432 if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
433 rt2x00queue_map_txskb(queue->rt2x00dev, skb);
434
435 set_bit(ENTRY_DATA_PENDING, &entry->flags);
436
437 rt2x00queue_index_inc(queue, Q_INDEX);
438 rt2x00queue_write_tx_descriptor(entry, &txdesc);
439
440 return 0;
441 }
442
443 int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
444 struct ieee80211_vif *vif)
445 {
446 struct rt2x00_intf *intf = vif_to_intf(vif);
447 struct skb_frame_desc *skbdesc;
448 struct txentry_desc txdesc;
449 __le32 desc[16];
450
451 if (unlikely(!intf->beacon))
452 return -ENOBUFS;
453
454 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
455 if (!intf->beacon->skb)
456 return -ENOMEM;
457
458 /*
459 * Copy all TX descriptor information into txdesc,
460 * after that we are free to use the skb->cb array
461 * for our information.
462 */
463 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
464
465 /*
466 * For the descriptor we use a local array from where the
467 * driver can move it to the correct location required for
468 * the hardware.
469 */
470 memset(desc, 0, sizeof(desc));
471
472 /*
473 * Fill in skb descriptor
474 */
475 skbdesc = get_skb_frame_desc(intf->beacon->skb);
476 memset(skbdesc, 0, sizeof(*skbdesc));
477 skbdesc->desc = desc;
478 skbdesc->desc_len = intf->beacon->queue->desc_size;
479 skbdesc->entry = intf->beacon;
480
481 /*
482 * Write TX descriptor into reserved room in front of the beacon.
483 */
484 rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
485
486 /*
487 * Send beacon to hardware.
488 * Also enable beacon generation, which might have been disabled
489 * by the driver during the config_beacon() callback function.
490 */
491 rt2x00dev->ops->lib->write_beacon(intf->beacon);
492 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
493
494 return 0;
495 }
496
497 struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
498 const enum data_queue_qid queue)
499 {
500 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
501
502 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
503 return &rt2x00dev->tx[queue];
504
505 if (!rt2x00dev->bcn)
506 return NULL;
507
508 if (queue == QID_BEACON)
509 return &rt2x00dev->bcn[0];
510 else if (queue == QID_ATIM && atim)
511 return &rt2x00dev->bcn[1];
512
513 return NULL;
514 }
515 EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
516
517 struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
518 enum queue_index index)
519 {
520 struct queue_entry *entry;
521 unsigned long irqflags;
522
523 if (unlikely(index >= Q_INDEX_MAX)) {
524 ERROR(queue->rt2x00dev,
525 "Entry requested from invalid index type (%d)\n", index);
526 return NULL;
527 }
528
529 spin_lock_irqsave(&queue->lock, irqflags);
530
531 entry = &queue->entries[queue->index[index]];
532
533 spin_unlock_irqrestore(&queue->lock, irqflags);
534
535 return entry;
536 }
537 EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
538
539 void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
540 {
541 unsigned long irqflags;
542
543 if (unlikely(index >= Q_INDEX_MAX)) {
544 ERROR(queue->rt2x00dev,
545 "Index change on invalid index type (%d)\n", index);
546 return;
547 }
548
549 spin_lock_irqsave(&queue->lock, irqflags);
550
551 queue->index[index]++;
552 if (queue->index[index] >= queue->limit)
553 queue->index[index] = 0;
554
555 if (index == Q_INDEX) {
556 queue->length++;
557 } else if (index == Q_INDEX_DONE) {
558 queue->length--;
559 queue->count ++;
560 }
561
562 spin_unlock_irqrestore(&queue->lock, irqflags);
563 }
564
565 static void rt2x00queue_reset(struct data_queue *queue)
566 {
567 unsigned long irqflags;
568
569 spin_lock_irqsave(&queue->lock, irqflags);
570
571 queue->count = 0;
572 queue->length = 0;
573 memset(queue->index, 0, sizeof(queue->index));
574
575 spin_unlock_irqrestore(&queue->lock, irqflags);
576 }
577
578 void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev)
579 {
580 struct data_queue *queue = rt2x00dev->rx;
581 unsigned int i;
582
583 rt2x00queue_reset(queue);
584
585 if (!rt2x00dev->ops->lib->init_rxentry)
586 return;
587
588 for (i = 0; i < queue->limit; i++) {
589 queue->entries[i].flags = 0;
590
591 rt2x00dev->ops->lib->init_rxentry(rt2x00dev,
592 &queue->entries[i]);
593 }
594 }
595
596 void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev)
597 {
598 struct data_queue *queue;
599 unsigned int i;
600
601 txall_queue_for_each(rt2x00dev, queue) {
602 rt2x00queue_reset(queue);
603
604 if (!rt2x00dev->ops->lib->init_txentry)
605 continue;
606
607 for (i = 0; i < queue->limit; i++) {
608 queue->entries[i].flags = 0;
609
610 rt2x00dev->ops->lib->init_txentry(rt2x00dev,
611 &queue->entries[i]);
612 }
613 }
614 }
615
616 static int rt2x00queue_alloc_entries(struct data_queue *queue,
617 const struct data_queue_desc *qdesc)
618 {
619 struct queue_entry *entries;
620 unsigned int entry_size;
621 unsigned int i;
622
623 rt2x00queue_reset(queue);
624
625 queue->limit = qdesc->entry_num;
626 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
627 queue->data_size = qdesc->data_size;
628 queue->desc_size = qdesc->desc_size;
629
630 /*
631 * Allocate all queue entries.
632 */
633 entry_size = sizeof(*entries) + qdesc->priv_size;
634 entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
635 if (!entries)
636 return -ENOMEM;
637
638 #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
639 ( ((char *)(__base)) + ((__limit) * (__esize)) + \
640 ((__index) * (__psize)) )
641
642 for (i = 0; i < queue->limit; i++) {
643 entries[i].flags = 0;
644 entries[i].queue = queue;
645 entries[i].skb = NULL;
646 entries[i].entry_idx = i;
647 entries[i].priv_data =
648 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
649 sizeof(*entries), qdesc->priv_size);
650 }
651
652 #undef QUEUE_ENTRY_PRIV_OFFSET
653
654 queue->entries = entries;
655
656 return 0;
657 }
658
659 static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
660 struct data_queue *queue)
661 {
662 unsigned int i;
663
664 if (!queue->entries)
665 return;
666
667 for (i = 0; i < queue->limit; i++) {
668 if (queue->entries[i].skb)
669 rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
670 }
671 }
672
673 static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
674 struct data_queue *queue)
675 {
676 unsigned int i;
677 struct sk_buff *skb;
678
679 for (i = 0; i < queue->limit; i++) {
680 skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
681 if (!skb)
682 return -ENOMEM;
683 queue->entries[i].skb = skb;
684 }
685
686 return 0;
687 }
688
689 int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
690 {
691 struct data_queue *queue;
692 int status;
693
694 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
695 if (status)
696 goto exit;
697
698 tx_queue_for_each(rt2x00dev, queue) {
699 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
700 if (status)
701 goto exit;
702 }
703
704 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
705 if (status)
706 goto exit;
707
708 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
709 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
710 rt2x00dev->ops->atim);
711 if (status)
712 goto exit;
713 }
714
715 status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
716 if (status)
717 goto exit;
718
719 return 0;
720
721 exit:
722 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
723
724 rt2x00queue_uninitialize(rt2x00dev);
725
726 return status;
727 }
728
729 void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
730 {
731 struct data_queue *queue;
732
733 rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
734
735 queue_for_each(rt2x00dev, queue) {
736 kfree(queue->entries);
737 queue->entries = NULL;
738 }
739 }
740
741 static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
742 struct data_queue *queue, enum data_queue_qid qid)
743 {
744 spin_lock_init(&queue->lock);
745
746 queue->rt2x00dev = rt2x00dev;
747 queue->qid = qid;
748 queue->txop = 0;
749 queue->aifs = 2;
750 queue->cw_min = 5;
751 queue->cw_max = 10;
752 }
753
754 int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
755 {
756 struct data_queue *queue;
757 enum data_queue_qid qid;
758 unsigned int req_atim =
759 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
760
761 /*
762 * We need the following queues:
763 * RX: 1
764 * TX: ops->tx_queues
765 * Beacon: 1
766 * Atim: 1 (if required)
767 */
768 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
769
770 queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
771 if (!queue) {
772 ERROR(rt2x00dev, "Queue allocation failed.\n");
773 return -ENOMEM;
774 }
775
776 /*
777 * Initialize pointers
778 */
779 rt2x00dev->rx = queue;
780 rt2x00dev->tx = &queue[1];
781 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
782
783 /*
784 * Initialize queue parameters.
785 * RX: qid = QID_RX
786 * TX: qid = QID_AC_BE + index
787 * TX: cw_min: 2^5 = 32.
788 * TX: cw_max: 2^10 = 1024.
789 * BCN: qid = QID_BEACON
790 * ATIM: qid = QID_ATIM
791 */
792 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
793
794 qid = QID_AC_BE;
795 tx_queue_for_each(rt2x00dev, queue)
796 rt2x00queue_init(rt2x00dev, queue, qid++);
797
798 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
799 if (req_atim)
800 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
801
802 return 0;
803 }
804
805 void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
806 {
807 kfree(rt2x00dev->rx);
808 rt2x00dev->rx = NULL;
809 rt2x00dev->tx = NULL;
810 rt2x00dev->bcn = NULL;
811 }
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