drivers/net/wireless/rt2x00/rt2x00reg.h

   1 /*
   2         Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt2x00
  23         Abstract: rt2x00 generic register information.
  24  */
  25
  26 #ifndef RT2X00REG_H
  27 #define RT2X00REG_H
  28
  29 /*
  30  * RX crypto status
  31  */
  32 enum rx_crypto {
  33         RX_CRYPTO_SUCCESS = 0,
  34         RX_CRYPTO_FAIL_ICV = 1,
  35         RX_CRYPTO_FAIL_MIC = 2,
  36         RX_CRYPTO_FAIL_KEY = 3,
  37 };
  38
  39 /*
  40  * Antenna values
  41  */
  42 enum antenna {
  43         ANTENNA_SW_DIVERSITY = 0,
  44         ANTENNA_A = 1,
  45         ANTENNA_B = 2,
  46         ANTENNA_HW_DIVERSITY = 3,
  47 };
  48
  49 /*
  50  * Led mode values.
  51  */
  52 enum led_mode {
  53         LED_MODE_DEFAULT = 0,
  54         LED_MODE_TXRX_ACTIVITY = 1,
  55         LED_MODE_SIGNAL_STRENGTH = 2,
  56         LED_MODE_ASUS = 3,
  57         LED_MODE_ALPHA = 4,
  58 };
  59
  60 /*
  61  * TSF sync values
  62  */
  63 enum tsf_sync {
  64         TSF_SYNC_NONE = 0,
  65         TSF_SYNC_INFRA = 1,
  66         TSF_SYNC_ADHOC = 2,
  67         TSF_SYNC_AP_NONE = 3,
  68 };
  69
  70 /*
  71  * Device states
  72  */
  73 enum dev_state {
  74         STATE_DEEP_SLEEP = 0,
  75         STATE_SLEEP = 1,
  76         STATE_STANDBY = 2,
  77         STATE_AWAKE = 3,
  78
  79 /*
  80  * Additional device states, these values are
  81  * not strict since they are not directly passed
  82  * into the device.
  83  */
  84         STATE_RADIO_ON,
  85         STATE_RADIO_OFF,
  86         STATE_RADIO_IRQ_ON,
  87         STATE_RADIO_IRQ_OFF,
  88         STATE_RADIO_IRQ_ON_ISR,
  89         STATE_RADIO_IRQ_OFF_ISR,
  90 };
  91
  92 /*
  93  * IFS backoff values
  94  */
  95 enum ifs {
  96         IFS_BACKOFF = 0,
  97         IFS_SIFS = 1,
  98         IFS_NEW_BACKOFF = 2,
  99         IFS_NONE = 3,
 100 };
 101
 102 /*
 103  * IFS backoff values for HT devices
 104  */
 105 enum txop {
 106         TXOP_HTTXOP = 0,
 107         TXOP_PIFS = 1,
 108         TXOP_SIFS = 2,
 109         TXOP_BACKOFF = 3,
 110 };
 111
 112 /*
 113  * Cipher types for hardware encryption
 114  */
 115 enum cipher {
 116         CIPHER_NONE = 0,
 117         CIPHER_WEP64 = 1,
 118         CIPHER_WEP128 = 2,
 119         CIPHER_TKIP = 3,
 120         CIPHER_AES = 4,
 121 /*
 122  * The following fields were added by rt61pci and rt73usb.
 123  */
 124         CIPHER_CKIP64 = 5,
 125         CIPHER_CKIP128 = 6,
 126         CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */
 127
 128 /*
 129  * Max cipher type.
 130  * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128
 131  * are excluded due to limitations in mac80211.
 132  */
 133         CIPHER_MAX = 4,
 134 };
 135
 136 /*
 137  * Rate modulations
 138  */
 139 enum rate_modulation {
 140         RATE_MODE_CCK = 0,
 141         RATE_MODE_OFDM = 1,
 142         RATE_MODE_HT_MIX = 2,
 143         RATE_MODE_HT_GREENFIELD = 3,
 144 };
 145
 146 /*
 147  * Firmware validation error codes
 148  */
 149 enum firmware_errors {
 150         FW_OK,
 151         FW_BAD_CRC,
 152         FW_BAD_LENGTH,
 153         FW_BAD_VERSION,
 154 };
 155
 156 /*
 157  * Register handlers.
 158  * We store the position of a register field inside a field structure,
 159  * This will simplify the process of setting and reading a certain field
 160  * inside the register while making sure the process remains byte order safe.
 161  */
 162 struct rt2x00_field8 {
 163         u8 bit_offset;
 164         u8 bit_mask;
 165 };
 166
 167 struct rt2x00_field16 {
 168         u16 bit_offset;
 169         u16 bit_mask;
 170 };
 171
 172 struct rt2x00_field32 {
 173         u32 bit_offset;
 174         u32 bit_mask;
 175 };
 176
 177 /*
 178  * Power of two check, this will check
 179  * if the mask that has been given contains and contiguous set of bits.
 180  * Note that we cannot use the is_power_of_2() function since this
 181  * check must be done at compile-time.
 182  */
 183 #define is_power_of_two(x)      ( !((x) & ((x)-1)) )
 184 #define low_bit_mask(x)         ( ((x)-1) & ~(x) )
 185 #define is_valid_mask(x)        is_power_of_two(1LU + (x) + low_bit_mask(x))
 186
 187 /*
 188  * Macros to find first set bit in a variable.
 189  * These macros behave the same as the __ffs() functions but
 190  * the most important difference that this is done during
 191  * compile-time rather then run-time.
 192  */
 193 #define compile_ffs2(__x) \
 194         __builtin_choose_expr(((__x) & 0x1), 0, 1)
 195
 196 #define compile_ffs4(__x) \
 197         __builtin_choose_expr(((__x) & 0x3), \
 198                               (compile_ffs2((__x))), \
 199                               (compile_ffs2((__x) >> 2) + 2))
 200
 201 #define compile_ffs8(__x) \
 202         __builtin_choose_expr(((__x) & 0xf), \
 203                               (compile_ffs4((__x))), \
 204                               (compile_ffs4((__x) >> 4) + 4))
 205
 206 #define compile_ffs16(__x) \
 207         __builtin_choose_expr(((__x) & 0xff), \
 208                               (compile_ffs8((__x))), \
 209                               (compile_ffs8((__x) >> 8) + 8))
 210
 211 #define compile_ffs32(__x) \
 212         __builtin_choose_expr(((__x) & 0xffff), \
 213                               (compile_ffs16((__x))), \
 214                               (compile_ffs16((__x) >> 16) + 16))
 215
 216 /*
 217  * This macro will check the requirements for the FIELD{8,16,32} macros
 218  * The mask should be a constant non-zero contiguous set of bits which
 219  * does not exceed the given typelimit.
 220  */
 221 #define FIELD_CHECK(__mask, __type)                     \
 222         BUILD_BUG_ON(!(__mask) ||                       \
 223                      !is_valid_mask(__mask) ||          \
 224                      (__mask) != (__type)(__mask))      \
 225
 226 #define FIELD8(__mask)                          \
 227 ({                                              \
 228         FIELD_CHECK(__mask, u8);                \
 229         (struct rt2x00_field8) {                \
 230                 compile_ffs8(__mask), (__mask)  \
 231         };                                      \
 232 })
 233
 234 #define FIELD16(__mask)                         \
 235 ({                                              \
 236         FIELD_CHECK(__mask, u16);               \
 237         (struct rt2x00_field16) {               \
 238                 compile_ffs16(__mask), (__mask) \
 239         };                                      \
 240 })
 241
 242 #define FIELD32(__mask)                         \
 243 ({                                              \
 244         FIELD_CHECK(__mask, u32);               \
 245         (struct rt2x00_field32) {               \
 246                 compile_ffs32(__mask), (__mask) \
 247         };                                      \
 248 })
 249
 250 #define SET_FIELD(__reg, __type, __field, __value)\
 251 ({                                              \
 252         typecheck(__type, __field);             \
 253         *(__reg) &= ~((__field).bit_mask);      \
 254         *(__reg) |= ((__value) <<               \
 255             ((__field).bit_offset)) &           \
 256             ((__field).bit_mask);               \
 257 })
 258
 259 #define GET_FIELD(__reg, __type, __field)       \
 260 ({                                              \
 261         typecheck(__type, __field);             \
 262         ((__reg) & ((__field).bit_mask)) >>     \
 263             ((__field).bit_offset);             \
 264 })
 265
 266 #define rt2x00_set_field32(__reg, __field, __value) \
 267         SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
 268 #define rt2x00_get_field32(__reg, __field) \
 269         GET_FIELD(__reg, struct rt2x00_field32, __field)
 270
 271 #define rt2x00_set_field16(__reg, __field, __value) \
 272         SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
 273 #define rt2x00_get_field16(__reg, __field) \
 274         GET_FIELD(__reg, struct rt2x00_field16, __field)
 275
 276 #define rt2x00_set_field8(__reg, __field, __value) \
 277         SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
 278 #define rt2x00_get_field8(__reg, __field) \
 279         GET_FIELD(__reg, struct rt2x00_field8, __field)
 280
 281 #endif /* RT2X00REG_H */