2 * Linux device driver for RTL8187
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10 * The driver was extended to the RTL8187B in 2008 by:
11 * Herton Ronaldo Krzesinski <herton@mandriva.com.br>
12 * Hin-Tak Leung <htl10@users.sourceforge.net>
13 * Larry Finger <Larry.Finger@lwfinger.net>
15 * Magic delays and register offsets below are taken from the original
16 * r8187 driver sources. Thanks to Realtek for their support!
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
23 #include <linux/init.h>
24 #include <linux/usb.h>
25 #include <linux/delay.h>
26 #include <linux/etherdevice.h>
27 #include <linux/eeprom_93cx6.h>
28 #include <net/mac80211.h>
31 #include "rtl8187_rtl8225.h"
32 #ifdef CONFIG_RTL8187_LEDS
33 #include "rtl8187_leds.h"
35 #include "rtl8187_rfkill.h"
37 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
38 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
39 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
40 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
41 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
42 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
43 MODULE_LICENSE("GPL");
45 static struct usb_device_id rtl8187_table
[] __devinitdata
= {
47 {USB_DEVICE(0x0b05, 0x171d), .driver_info
= DEVICE_RTL8187
},
49 {USB_DEVICE(0x050d, 0x705e), .driver_info
= DEVICE_RTL8187B
},
51 {USB_DEVICE(0x0bda, 0x8187), .driver_info
= DEVICE_RTL8187
},
52 {USB_DEVICE(0x0bda, 0x8189), .driver_info
= DEVICE_RTL8187B
},
53 {USB_DEVICE(0x0bda, 0x8197), .driver_info
= DEVICE_RTL8187B
},
54 {USB_DEVICE(0x0bda, 0x8198), .driver_info
= DEVICE_RTL8187B
},
56 {USB_DEVICE(0x0769, 0x11F2), .driver_info
= DEVICE_RTL8187
},
58 {USB_DEVICE(0x0789, 0x010C), .driver_info
= DEVICE_RTL8187
},
60 {USB_DEVICE(0x0846, 0x6100), .driver_info
= DEVICE_RTL8187
},
61 {USB_DEVICE(0x0846, 0x6a00), .driver_info
= DEVICE_RTL8187
},
62 {USB_DEVICE(0x0846, 0x4260), .driver_info
= DEVICE_RTL8187B
},
64 {USB_DEVICE(0x03f0, 0xca02), .driver_info
= DEVICE_RTL8187
},
66 {USB_DEVICE(0x0df6, 0x000d), .driver_info
= DEVICE_RTL8187
},
67 {USB_DEVICE(0x0df6, 0x0028), .driver_info
= DEVICE_RTL8187B
},
68 /* Sphairon Access Systems GmbH */
69 {USB_DEVICE(0x114B, 0x0150), .driver_info
= DEVICE_RTL8187
},
70 /* Dick Smith Electronics */
71 {USB_DEVICE(0x1371, 0x9401), .driver_info
= DEVICE_RTL8187
},
73 {USB_DEVICE(0x13d1, 0xabe6), .driver_info
= DEVICE_RTL8187
},
75 {USB_DEVICE(0x18E8, 0x6232), .driver_info
= DEVICE_RTL8187
},
77 {USB_DEVICE(0x1b75, 0x8187), .driver_info
= DEVICE_RTL8187
},
79 {USB_DEVICE(0x1737, 0x0073), .driver_info
= DEVICE_RTL8187B
},
83 MODULE_DEVICE_TABLE(usb
, rtl8187_table
);
85 static const struct ieee80211_rate rtl818x_rates
[] = {
86 { .bitrate
= 10, .hw_value
= 0, },
87 { .bitrate
= 20, .hw_value
= 1, },
88 { .bitrate
= 55, .hw_value
= 2, },
89 { .bitrate
= 110, .hw_value
= 3, },
90 { .bitrate
= 60, .hw_value
= 4, },
91 { .bitrate
= 90, .hw_value
= 5, },
92 { .bitrate
= 120, .hw_value
= 6, },
93 { .bitrate
= 180, .hw_value
= 7, },
94 { .bitrate
= 240, .hw_value
= 8, },
95 { .bitrate
= 360, .hw_value
= 9, },
96 { .bitrate
= 480, .hw_value
= 10, },
97 { .bitrate
= 540, .hw_value
= 11, },
100 static const struct ieee80211_channel rtl818x_channels
[] = {
101 { .center_freq
= 2412 },
102 { .center_freq
= 2417 },
103 { .center_freq
= 2422 },
104 { .center_freq
= 2427 },
105 { .center_freq
= 2432 },
106 { .center_freq
= 2437 },
107 { .center_freq
= 2442 },
108 { .center_freq
= 2447 },
109 { .center_freq
= 2452 },
110 { .center_freq
= 2457 },
111 { .center_freq
= 2462 },
112 { .center_freq
= 2467 },
113 { .center_freq
= 2472 },
114 { .center_freq
= 2484 },
117 static void rtl8187_iowrite_async_cb(struct urb
*urb
)
122 static void rtl8187_iowrite_async(struct rtl8187_priv
*priv
, __le16 addr
,
125 struct usb_ctrlrequest
*dr
;
127 struct rtl8187_async_write_data
{
129 struct usb_ctrlrequest dr
;
133 buf
= kmalloc(sizeof(*buf
), GFP_ATOMIC
);
137 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
145 dr
->bRequestType
= RTL8187_REQT_WRITE
;
146 dr
->bRequest
= RTL8187_REQ_SET_REG
;
149 dr
->wLength
= cpu_to_le16(len
);
151 memcpy(buf
, data
, len
);
153 usb_fill_control_urb(urb
, priv
->udev
, usb_sndctrlpipe(priv
->udev
, 0),
154 (unsigned char *)dr
, buf
, len
,
155 rtl8187_iowrite_async_cb
, buf
);
156 usb_anchor_urb(urb
, &priv
->anchored
);
157 rc
= usb_submit_urb(urb
, GFP_ATOMIC
);
160 usb_unanchor_urb(urb
);
165 static inline void rtl818x_iowrite32_async(struct rtl8187_priv
*priv
,
166 __le32
*addr
, u32 val
)
168 __le32 buf
= cpu_to_le32(val
);
170 rtl8187_iowrite_async(priv
, cpu_to_le16((unsigned long)addr
),
174 void rtl8187_write_phy(struct ieee80211_hw
*dev
, u8 addr
, u32 data
)
176 struct rtl8187_priv
*priv
= dev
->priv
;
181 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[3], (data
>> 24) & 0xFF);
182 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[2], (data
>> 16) & 0xFF);
183 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[1], (data
>> 8) & 0xFF);
184 rtl818x_iowrite8(priv
, &priv
->map
->PHY
[0], data
& 0xFF);
187 static void rtl8187_tx_cb(struct urb
*urb
)
189 struct sk_buff
*skb
= (struct sk_buff
*)urb
->context
;
190 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
191 struct ieee80211_hw
*hw
= info
->rate_driver_data
[0];
192 struct rtl8187_priv
*priv
= hw
->priv
;
194 skb_pull(skb
, priv
->is_rtl8187b
? sizeof(struct rtl8187b_tx_hdr
) :
195 sizeof(struct rtl8187_tx_hdr
));
196 ieee80211_tx_info_clear_status(info
);
198 if (!(urb
->status
) && !(info
->flags
& IEEE80211_TX_CTL_NO_ACK
)) {
199 if (priv
->is_rtl8187b
) {
200 skb_queue_tail(&priv
->b_tx_status
.queue
, skb
);
202 /* queue is "full", discard last items */
203 while (skb_queue_len(&priv
->b_tx_status
.queue
) > 5) {
204 struct sk_buff
*old_skb
;
206 dev_dbg(&priv
->udev
->dev
,
207 "transmit status queue full\n");
209 old_skb
= skb_dequeue(&priv
->b_tx_status
.queue
);
210 ieee80211_tx_status_irqsafe(hw
, old_skb
);
214 info
->flags
|= IEEE80211_TX_STAT_ACK
;
217 if (priv
->is_rtl8187b
)
218 ieee80211_tx_status_irqsafe(hw
, skb
);
220 /* Retry information for the RTI8187 is only available by
221 * reading a register in the device. We are in interrupt mode
222 * here, thus queue the skb and finish on a work queue. */
223 skb_queue_tail(&priv
->b_tx_status
.queue
, skb
);
224 ieee80211_queue_delayed_work(hw
, &priv
->work
, 0);
228 static int rtl8187_tx(struct ieee80211_hw
*dev
, struct sk_buff
*skb
)
230 struct rtl8187_priv
*priv
= dev
->priv
;
231 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
239 urb
= usb_alloc_urb(0, GFP_ATOMIC
);
246 flags
|= RTL818X_TX_DESC_FLAG_NO_ENC
;
248 flags
|= ieee80211_get_tx_rate(dev
, info
)->hw_value
<< 24;
249 if (ieee80211_has_morefrags(((struct ieee80211_hdr
*)skb
->data
)->frame_control
))
250 flags
|= RTL818X_TX_DESC_FLAG_MOREFRAG
;
251 if (info
->control
.rates
[0].flags
& IEEE80211_TX_RC_USE_RTS_CTS
) {
252 flags
|= RTL818X_TX_DESC_FLAG_RTS
;
253 flags
|= ieee80211_get_rts_cts_rate(dev
, info
)->hw_value
<< 19;
254 rts_dur
= ieee80211_rts_duration(dev
, priv
->vif
,
256 } else if (info
->control
.rates
[0].flags
& IEEE80211_TX_RC_USE_CTS_PROTECT
) {
257 flags
|= RTL818X_TX_DESC_FLAG_CTS
;
258 flags
|= ieee80211_get_rts_cts_rate(dev
, info
)->hw_value
<< 19;
261 if (!priv
->is_rtl8187b
) {
262 struct rtl8187_tx_hdr
*hdr
=
263 (struct rtl8187_tx_hdr
*)skb_push(skb
, sizeof(*hdr
));
264 hdr
->flags
= cpu_to_le32(flags
);
266 hdr
->rts_duration
= rts_dur
;
267 hdr
->retry
= cpu_to_le32((info
->control
.rates
[0].count
- 1) << 8);
272 /* fc needs to be calculated before skb_push() */
273 unsigned int epmap
[4] = { 6, 7, 5, 4 };
274 struct ieee80211_hdr
*tx_hdr
=
275 (struct ieee80211_hdr
*)(skb
->data
);
276 u16 fc
= le16_to_cpu(tx_hdr
->frame_control
);
278 struct rtl8187b_tx_hdr
*hdr
=
279 (struct rtl8187b_tx_hdr
*)skb_push(skb
, sizeof(*hdr
));
280 struct ieee80211_rate
*txrate
=
281 ieee80211_get_tx_rate(dev
, info
);
282 memset(hdr
, 0, sizeof(*hdr
));
283 hdr
->flags
= cpu_to_le32(flags
);
284 hdr
->rts_duration
= rts_dur
;
285 hdr
->retry
= cpu_to_le32((info
->control
.rates
[0].count
- 1) << 8);
287 ieee80211_generic_frame_duration(dev
, priv
->vif
,
291 if ((fc
& IEEE80211_FCTL_FTYPE
) == IEEE80211_FTYPE_MGMT
)
294 ep
= epmap
[skb_get_queue_mapping(skb
)];
297 info
->rate_driver_data
[0] = dev
;
298 info
->rate_driver_data
[1] = urb
;
300 usb_fill_bulk_urb(urb
, priv
->udev
, usb_sndbulkpipe(priv
->udev
, ep
),
301 buf
, skb
->len
, rtl8187_tx_cb
, skb
);
302 urb
->transfer_flags
|= URB_ZERO_PACKET
;
303 usb_anchor_urb(urb
, &priv
->anchored
);
304 rc
= usb_submit_urb(urb
, GFP_ATOMIC
);
306 usb_unanchor_urb(urb
);
314 static void rtl8187_rx_cb(struct urb
*urb
)
316 struct sk_buff
*skb
= (struct sk_buff
*)urb
->context
;
317 struct rtl8187_rx_info
*info
= (struct rtl8187_rx_info
*)skb
->cb
;
318 struct ieee80211_hw
*dev
= info
->dev
;
319 struct rtl8187_priv
*priv
= dev
->priv
;
320 struct ieee80211_rx_status rx_status
= { 0 };
325 spin_lock_irqsave(&priv
->rx_queue
.lock
, f
);
326 __skb_unlink(skb
, &priv
->rx_queue
);
327 spin_unlock_irqrestore(&priv
->rx_queue
.lock
, f
);
328 skb_put(skb
, urb
->actual_length
);
330 if (unlikely(urb
->status
)) {
331 dev_kfree_skb_irq(skb
);
335 if (!priv
->is_rtl8187b
) {
336 struct rtl8187_rx_hdr
*hdr
=
337 (typeof(hdr
))(skb_tail_pointer(skb
) - sizeof(*hdr
));
338 flags
= le32_to_cpu(hdr
->flags
);
339 /* As with the RTL8187B below, the AGC is used to calculate
340 * signal strength. In this case, the scaling
341 * constants are derived from the output of p54usb.
343 signal
= -4 - ((27 * hdr
->agc
) >> 6);
344 rx_status
.antenna
= (hdr
->signal
>> 7) & 1;
345 rx_status
.mactime
= le64_to_cpu(hdr
->mac_time
);
347 struct rtl8187b_rx_hdr
*hdr
=
348 (typeof(hdr
))(skb_tail_pointer(skb
) - sizeof(*hdr
));
349 /* The Realtek datasheet for the RTL8187B shows that the RX
350 * header contains the following quantities: signal quality,
351 * RSSI, AGC, the received power in dB, and the measured SNR.
352 * In testing, none of these quantities show qualitative
353 * agreement with AP signal strength, except for the AGC,
354 * which is inversely proportional to the strength of the
355 * signal. In the following, the signal strength
356 * is derived from the AGC. The arbitrary scaling constants
357 * are chosen to make the results close to the values obtained
358 * for a BCM4312 using b43 as the driver. The noise is ignored
361 flags
= le32_to_cpu(hdr
->flags
);
362 signal
= 14 - hdr
->agc
/ 2;
363 rx_status
.antenna
= (hdr
->rssi
>> 7) & 1;
364 rx_status
.mactime
= le64_to_cpu(hdr
->mac_time
);
367 rx_status
.signal
= signal
;
368 priv
->signal
= signal
;
369 rate
= (flags
>> 20) & 0xF;
370 skb_trim(skb
, flags
& 0x0FFF);
371 rx_status
.rate_idx
= rate
;
372 rx_status
.freq
= dev
->conf
.channel
->center_freq
;
373 rx_status
.band
= dev
->conf
.channel
->band
;
374 rx_status
.flag
|= RX_FLAG_TSFT
;
375 if (flags
& RTL818X_RX_DESC_FLAG_CRC32_ERR
)
376 rx_status
.flag
|= RX_FLAG_FAILED_FCS_CRC
;
377 memcpy(IEEE80211_SKB_RXCB(skb
), &rx_status
, sizeof(rx_status
));
378 ieee80211_rx_irqsafe(dev
, skb
);
380 skb
= dev_alloc_skb(RTL8187_MAX_RX
);
381 if (unlikely(!skb
)) {
382 /* TODO check rx queue length and refill *somewhere* */
386 info
= (struct rtl8187_rx_info
*)skb
->cb
;
389 urb
->transfer_buffer
= skb_tail_pointer(skb
);
391 skb_queue_tail(&priv
->rx_queue
, skb
);
393 usb_anchor_urb(urb
, &priv
->anchored
);
394 if (usb_submit_urb(urb
, GFP_ATOMIC
)) {
395 usb_unanchor_urb(urb
);
396 skb_unlink(skb
, &priv
->rx_queue
);
397 dev_kfree_skb_irq(skb
);
401 static int rtl8187_init_urbs(struct ieee80211_hw
*dev
)
403 struct rtl8187_priv
*priv
= dev
->priv
;
404 struct urb
*entry
= NULL
;
406 struct rtl8187_rx_info
*info
;
409 while (skb_queue_len(&priv
->rx_queue
) < 16) {
410 skb
= __dev_alloc_skb(RTL8187_MAX_RX
, GFP_KERNEL
);
415 entry
= usb_alloc_urb(0, GFP_KERNEL
);
420 usb_fill_bulk_urb(entry
, priv
->udev
,
421 usb_rcvbulkpipe(priv
->udev
,
422 priv
->is_rtl8187b
? 3 : 1),
423 skb_tail_pointer(skb
),
424 RTL8187_MAX_RX
, rtl8187_rx_cb
, skb
);
425 info
= (struct rtl8187_rx_info
*)skb
->cb
;
428 skb_queue_tail(&priv
->rx_queue
, skb
);
429 usb_anchor_urb(entry
, &priv
->anchored
);
430 ret
= usb_submit_urb(entry
, GFP_KERNEL
);
432 skb_unlink(skb
, &priv
->rx_queue
);
433 usb_unanchor_urb(entry
);
443 usb_kill_anchored_urbs(&priv
->anchored
);
447 static void rtl8187b_status_cb(struct urb
*urb
)
449 struct ieee80211_hw
*hw
= (struct ieee80211_hw
*)urb
->context
;
450 struct rtl8187_priv
*priv
= hw
->priv
;
452 unsigned int cmd_type
;
454 if (unlikely(urb
->status
))
458 * Read from status buffer:
460 * bits [30:31] = cmd type:
461 * - 0 indicates tx beacon interrupt
462 * - 1 indicates tx close descriptor
464 * In the case of tx beacon interrupt:
465 * [0:9] = Last Beacon CW
468 * [32:63] = Last Beacon TSF
470 * If it's tx close descriptor:
471 * [0:7] = Packet Retry Count
472 * [8:14] = RTS Retry Count
474 * [16:27] = Sequence No
478 * [32:47] = unused (reserved?)
479 * [48:63] = MAC Used Time
481 val
= le64_to_cpu(priv
->b_tx_status
.buf
);
483 cmd_type
= (val
>> 30) & 0x3;
485 unsigned int pkt_rc
, seq_no
;
488 struct ieee80211_hdr
*ieee80211hdr
;
492 tok
= val
& (1 << 15);
493 seq_no
= (val
>> 16) & 0xFFF;
495 spin_lock_irqsave(&priv
->b_tx_status
.queue
.lock
, flags
);
496 skb_queue_reverse_walk(&priv
->b_tx_status
.queue
, skb
) {
497 ieee80211hdr
= (struct ieee80211_hdr
*)skb
->data
;
500 * While testing, it was discovered that the seq_no
501 * doesn't actually contains the sequence number.
502 * Instead of returning just the 12 bits of sequence
503 * number, hardware is returning entire sequence control
504 * (fragment number plus sequence number) in a 12 bit
505 * only field overflowing after some time. As a
506 * workaround, just consider the lower bits, and expect
507 * it's unlikely we wrongly ack some sent data
509 if ((le16_to_cpu(ieee80211hdr
->seq_ctrl
)
513 if (skb
!= (struct sk_buff
*) &priv
->b_tx_status
.queue
) {
514 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
516 __skb_unlink(skb
, &priv
->b_tx_status
.queue
);
518 info
->flags
|= IEEE80211_TX_STAT_ACK
;
519 info
->status
.rates
[0].count
= pkt_rc
+ 1;
521 ieee80211_tx_status_irqsafe(hw
, skb
);
523 spin_unlock_irqrestore(&priv
->b_tx_status
.queue
.lock
, flags
);
526 usb_anchor_urb(urb
, &priv
->anchored
);
527 if (usb_submit_urb(urb
, GFP_ATOMIC
))
528 usb_unanchor_urb(urb
);
531 static int rtl8187b_init_status_urb(struct ieee80211_hw
*dev
)
533 struct rtl8187_priv
*priv
= dev
->priv
;
537 entry
= usb_alloc_urb(0, GFP_KERNEL
);
541 usb_fill_bulk_urb(entry
, priv
->udev
, usb_rcvbulkpipe(priv
->udev
, 9),
542 &priv
->b_tx_status
.buf
, sizeof(priv
->b_tx_status
.buf
),
543 rtl8187b_status_cb
, dev
);
545 usb_anchor_urb(entry
, &priv
->anchored
);
546 ret
= usb_submit_urb(entry
, GFP_KERNEL
);
548 usb_unanchor_urb(entry
);
554 static int rtl8187_cmd_reset(struct ieee80211_hw
*dev
)
556 struct rtl8187_priv
*priv
= dev
->priv
;
560 reg
= rtl818x_ioread8(priv
, &priv
->map
->CMD
);
562 reg
|= RTL818X_CMD_RESET
;
563 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
568 if (!(rtl818x_ioread8(priv
, &priv
->map
->CMD
) &
574 printk(KERN_ERR
"%s: Reset timeout!\n", wiphy_name(dev
->wiphy
));
578 /* reload registers from eeprom */
579 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_LOAD
);
584 if (!(rtl818x_ioread8(priv
, &priv
->map
->EEPROM_CMD
) &
585 RTL818X_EEPROM_CMD_CONFIG
))
590 printk(KERN_ERR
"%s: eeprom reset timeout!\n",
591 wiphy_name(dev
->wiphy
));
598 static int rtl8187_init_hw(struct ieee80211_hw
*dev
)
600 struct rtl8187_priv
*priv
= dev
->priv
;
605 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
606 RTL818X_EEPROM_CMD_CONFIG
);
607 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
608 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
|
609 RTL818X_CONFIG3_ANAPARAM_WRITE
);
610 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM
,
611 RTL8187_RTL8225_ANAPARAM_ON
);
612 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM2
,
613 RTL8187_RTL8225_ANAPARAM2_ON
);
614 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
&
615 ~RTL818X_CONFIG3_ANAPARAM_WRITE
);
616 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
617 RTL818X_EEPROM_CMD_NORMAL
);
619 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0);
622 rtl818x_iowrite8(priv
, (u8
*)0xFE18, 0x10);
623 rtl818x_iowrite8(priv
, (u8
*)0xFE18, 0x11);
624 rtl818x_iowrite8(priv
, (u8
*)0xFE18, 0x00);
627 res
= rtl8187_cmd_reset(dev
);
631 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
632 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
633 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
,
634 reg
| RTL818X_CONFIG3_ANAPARAM_WRITE
);
635 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM
,
636 RTL8187_RTL8225_ANAPARAM_ON
);
637 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM2
,
638 RTL8187_RTL8225_ANAPARAM2_ON
);
639 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
,
640 reg
& ~RTL818X_CONFIG3_ANAPARAM_WRITE
);
641 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
644 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0);
645 rtl818x_iowrite8(priv
, &priv
->map
->GPIO0
, 0);
647 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, (4 << 8));
648 rtl818x_iowrite8(priv
, &priv
->map
->GPIO0
, 1);
649 rtl818x_iowrite8(priv
, &priv
->map
->GP_ENABLE
, 0);
651 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
653 rtl818x_iowrite16(priv
, (__le16
*)0xFFF4, 0xFFFF);
654 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG1
);
657 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG1
, reg
);
659 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
661 rtl818x_iowrite32(priv
, &priv
->map
->INT_TIMEOUT
, 0);
662 rtl818x_iowrite8(priv
, &priv
->map
->WPA_CONF
, 0);
663 rtl818x_iowrite8(priv
, &priv
->map
->RATE_FALLBACK
, 0);
665 // TODO: set RESP_RATE and BRSR properly
666 rtl818x_iowrite8(priv
, &priv
->map
->RESP_RATE
, (8 << 4) | 0);
667 rtl818x_iowrite16(priv
, &priv
->map
->BRSR
, 0x01F3);
670 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0);
671 rtl818x_iowrite8(priv
, &priv
->map
->GPIO0
, 0);
672 reg
= rtl818x_ioread8(priv
, (u8
*)0xFE53);
673 rtl818x_iowrite8(priv
, (u8
*)0xFE53, reg
| (1 << 7));
674 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, (4 << 8));
675 rtl818x_iowrite8(priv
, &priv
->map
->GPIO0
, 0x20);
676 rtl818x_iowrite8(priv
, &priv
->map
->GP_ENABLE
, 0);
677 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsOutput
, 0x80);
678 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0x80);
679 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsEnable
, 0x80);
682 rtl818x_iowrite32(priv
, &priv
->map
->RF_TIMING
, 0x000a8008);
683 rtl818x_iowrite16(priv
, &priv
->map
->BRSR
, 0xFFFF);
684 rtl818x_iowrite32(priv
, &priv
->map
->RF_PARA
, 0x00100044);
685 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
686 RTL818X_EEPROM_CMD_CONFIG
);
687 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, 0x44);
688 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
689 RTL818X_EEPROM_CMD_NORMAL
);
690 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsEnable
, 0x1FF7);
695 rtl818x_iowrite16(priv
, &priv
->map
->BRSR
, 0x01F3);
696 reg
= rtl818x_ioread8(priv
, &priv
->map
->PGSELECT
) & ~1;
697 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
| 1);
698 rtl818x_iowrite16(priv
, (__le16
*)0xFFFE, 0x10);
699 rtl818x_iowrite8(priv
, &priv
->map
->TALLY_SEL
, 0x80);
700 rtl818x_iowrite8(priv
, (u8
*)0xFFFF, 0x60);
701 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
);
706 static const u8 rtl8187b_reg_table
[][3] = {
707 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
708 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
709 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
710 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
712 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
713 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
714 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
715 {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
716 {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
717 {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
719 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
720 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
721 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
722 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
723 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
724 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
725 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
728 {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
729 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
730 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
731 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
732 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
734 {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
738 static int rtl8187b_init_hw(struct ieee80211_hw
*dev
)
740 struct rtl8187_priv
*priv
= dev
->priv
;
744 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
745 RTL818X_EEPROM_CMD_CONFIG
);
747 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
748 reg
|= RTL818X_CONFIG3_ANAPARAM_WRITE
| RTL818X_CONFIG3_GNT_SELECT
;
749 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
);
750 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM2
,
751 RTL8187B_RTL8225_ANAPARAM2_ON
);
752 rtl818x_iowrite32(priv
, &priv
->map
->ANAPARAM
,
753 RTL8187B_RTL8225_ANAPARAM_ON
);
754 rtl818x_iowrite8(priv
, &priv
->map
->ANAPARAM3
,
755 RTL8187B_RTL8225_ANAPARAM3_ON
);
757 rtl818x_iowrite8(priv
, (u8
*)0xFF61, 0x10);
758 reg
= rtl818x_ioread8(priv
, (u8
*)0xFF62);
759 rtl818x_iowrite8(priv
, (u8
*)0xFF62, reg
& ~(1 << 5));
760 rtl818x_iowrite8(priv
, (u8
*)0xFF62, reg
| (1 << 5));
762 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
763 reg
&= ~RTL818X_CONFIG3_ANAPARAM_WRITE
;
764 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
);
766 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
767 RTL818X_EEPROM_CMD_NORMAL
);
769 res
= rtl8187_cmd_reset(dev
);
773 rtl818x_iowrite16(priv
, (__le16
*)0xFF2D, 0x0FFF);
774 reg
= rtl818x_ioread8(priv
, &priv
->map
->CW_CONF
);
775 reg
|= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT
;
776 rtl818x_iowrite8(priv
, &priv
->map
->CW_CONF
, reg
);
777 reg
= rtl818x_ioread8(priv
, &priv
->map
->TX_AGC_CTL
);
778 reg
|= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT
|
779 RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT
;
780 rtl818x_iowrite8(priv
, &priv
->map
->TX_AGC_CTL
, reg
);
782 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFFE0, 0x0FFF, 1);
784 rtl818x_iowrite16(priv
, &priv
->map
->BEACON_INTERVAL
, 100);
785 rtl818x_iowrite16(priv
, &priv
->map
->ATIM_WND
, 2);
786 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFFD4, 0xFFFF, 1);
788 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
789 RTL818X_EEPROM_CMD_CONFIG
);
790 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG1
);
791 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG1
, (reg
& 0x3F) | 0x80);
792 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
793 RTL818X_EEPROM_CMD_NORMAL
);
795 rtl818x_iowrite8(priv
, &priv
->map
->WPA_CONF
, 0);
796 for (i
= 0; i
< ARRAY_SIZE(rtl8187b_reg_table
); i
++) {
797 rtl818x_iowrite8_idx(priv
,
799 (rtl8187b_reg_table
[i
][0] | 0xFF00),
800 rtl8187b_reg_table
[i
][1],
801 rtl8187b_reg_table
[i
][2]);
804 rtl818x_iowrite16(priv
, &priv
->map
->TID_AC_MAP
, 0xFA50);
805 rtl818x_iowrite16(priv
, &priv
->map
->INT_MIG
, 0);
807 rtl818x_iowrite32_idx(priv
, (__le32
*)0xFFF0, 0, 1);
808 rtl818x_iowrite32_idx(priv
, (__le32
*)0xFFF4, 0, 1);
809 rtl818x_iowrite8_idx(priv
, (u8
*)0xFFF8, 0, 1);
811 rtl818x_iowrite32(priv
, &priv
->map
->RF_TIMING
, 0x00004001);
813 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF72, 0x569A, 2);
815 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
816 RTL818X_EEPROM_CMD_CONFIG
);
817 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG3
);
818 reg
|= RTL818X_CONFIG3_ANAPARAM_WRITE
;
819 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG3
, reg
);
820 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
,
821 RTL818X_EEPROM_CMD_NORMAL
);
823 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsOutput
, 0x0480);
824 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsSelect
, 0x2488);
825 rtl818x_iowrite16(priv
, &priv
->map
->RFPinsEnable
, 0x1FFF);
830 reg
= RTL818X_CMD_TX_ENABLE
| RTL818X_CMD_RX_ENABLE
;
831 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
832 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0xFFFF);
834 rtl818x_iowrite8(priv
, (u8
*)0xFE41, 0xF4);
835 rtl818x_iowrite8(priv
, (u8
*)0xFE40, 0x00);
836 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x00);
837 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x01);
838 rtl818x_iowrite8(priv
, (u8
*)0xFE40, 0x0F);
839 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x00);
840 rtl818x_iowrite8(priv
, (u8
*)0xFE42, 0x01);
842 reg
= rtl818x_ioread8(priv
, (u8
*)0xFFDB);
843 rtl818x_iowrite8(priv
, (u8
*)0xFFDB, reg
| (1 << 2));
844 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF72, 0x59FA, 3);
845 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF74, 0x59D2, 3);
846 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF76, 0x59D2, 3);
847 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF78, 0x19FA, 3);
848 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF7A, 0x19FA, 3);
849 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFF7C, 0x00D0, 3);
850 rtl818x_iowrite8(priv
, (u8
*)0xFF61, 0);
851 rtl818x_iowrite8_idx(priv
, (u8
*)0xFF80, 0x0F, 1);
852 rtl818x_iowrite8_idx(priv
, (u8
*)0xFF83, 0x03, 1);
853 rtl818x_iowrite8(priv
, (u8
*)0xFFDA, 0x10);
854 rtl818x_iowrite8_idx(priv
, (u8
*)0xFF4D, 0x08, 2);
856 rtl818x_iowrite32(priv
, &priv
->map
->HSSI_PARA
, 0x0600321B);
858 rtl818x_iowrite16_idx(priv
, (__le16
*)0xFFEC, 0x0800, 1);
860 priv
->slot_time
= 0x9;
861 priv
->aifsn
[0] = 2; /* AIFSN[AC_VO] */
862 priv
->aifsn
[1] = 2; /* AIFSN[AC_VI] */
863 priv
->aifsn
[2] = 7; /* AIFSN[AC_BK] */
864 priv
->aifsn
[3] = 3; /* AIFSN[AC_BE] */
865 rtl818x_iowrite8(priv
, &priv
->map
->ACM_CONTROL
, 0);
867 /* ENEDCA flag must always be set, transmit issues? */
868 rtl818x_iowrite8(priv
, &priv
->map
->MSR
, RTL818X_MSR_ENEDCA
);
873 static void rtl8187_work(struct work_struct
*work
)
875 /* The RTL8187 returns the retry count through register 0xFFFA. In
876 * addition, it appears to be a cumulative retry count, not the
877 * value for the current TX packet. When multiple TX entries are
878 * queued, the retry count will be valid for the last one in the queue.
879 * The "error" should not matter for purposes of rate setting. */
880 struct rtl8187_priv
*priv
= container_of(work
, struct rtl8187_priv
,
882 struct ieee80211_tx_info
*info
;
883 struct ieee80211_hw
*dev
= priv
->dev
;
887 mutex_lock(&priv
->conf_mutex
);
888 tmp
= rtl818x_ioread16(priv
, (__le16
*)0xFFFA);
889 while (skb_queue_len(&priv
->b_tx_status
.queue
) > 0) {
890 struct sk_buff
*old_skb
;
892 old_skb
= skb_dequeue(&priv
->b_tx_status
.queue
);
893 info
= IEEE80211_SKB_CB(old_skb
);
894 info
->status
.rates
[0].count
= tmp
- retry
+ 1;
895 ieee80211_tx_status_irqsafe(dev
, old_skb
);
898 mutex_unlock(&priv
->conf_mutex
);
901 static int rtl8187_start(struct ieee80211_hw
*dev
)
903 struct rtl8187_priv
*priv
= dev
->priv
;
907 mutex_lock(&priv
->conf_mutex
);
909 ret
= (!priv
->is_rtl8187b
) ? rtl8187_init_hw(dev
) :
910 rtl8187b_init_hw(dev
);
912 goto rtl8187_start_exit
;
914 init_usb_anchor(&priv
->anchored
);
917 if (priv
->is_rtl8187b
) {
918 reg
= RTL818X_RX_CONF_MGMT
|
919 RTL818X_RX_CONF_DATA
|
920 RTL818X_RX_CONF_BROADCAST
|
921 RTL818X_RX_CONF_NICMAC
|
922 RTL818X_RX_CONF_BSSID
|
923 (7 << 13 /* RX FIFO threshold NONE */) |
924 (7 << 10 /* MAX RX DMA */) |
925 RTL818X_RX_CONF_RX_AUTORESETPHY
|
926 RTL818X_RX_CONF_ONLYERLPKT
|
927 RTL818X_RX_CONF_MULTICAST
;
929 rtl818x_iowrite32(priv
, &priv
->map
->RX_CONF
, reg
);
931 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
,
932 RTL818X_TX_CONF_HW_SEQNUM
|
933 RTL818X_TX_CONF_DISREQQSIZE
|
934 (7 << 8 /* short retry limit */) |
935 (7 << 0 /* long retry limit */) |
936 (7 << 21 /* MAX TX DMA */));
937 rtl8187_init_urbs(dev
);
938 rtl8187b_init_status_urb(dev
);
939 goto rtl8187_start_exit
;
942 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0xFFFF);
944 rtl818x_iowrite32(priv
, &priv
->map
->MAR
[0], ~0);
945 rtl818x_iowrite32(priv
, &priv
->map
->MAR
[1], ~0);
947 rtl8187_init_urbs(dev
);
949 reg
= RTL818X_RX_CONF_ONLYERLPKT
|
950 RTL818X_RX_CONF_RX_AUTORESETPHY
|
951 RTL818X_RX_CONF_BSSID
|
952 RTL818X_RX_CONF_MGMT
|
953 RTL818X_RX_CONF_DATA
|
954 (7 << 13 /* RX FIFO threshold NONE */) |
955 (7 << 10 /* MAX RX DMA */) |
956 RTL818X_RX_CONF_BROADCAST
|
957 RTL818X_RX_CONF_NICMAC
;
960 rtl818x_iowrite32(priv
, &priv
->map
->RX_CONF
, reg
);
962 reg
= rtl818x_ioread8(priv
, &priv
->map
->CW_CONF
);
963 reg
&= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT
;
964 reg
|= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT
;
965 rtl818x_iowrite8(priv
, &priv
->map
->CW_CONF
, reg
);
967 reg
= rtl818x_ioread8(priv
, &priv
->map
->TX_AGC_CTL
);
968 reg
&= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT
;
969 reg
&= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT
;
970 reg
&= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT
;
971 rtl818x_iowrite8(priv
, &priv
->map
->TX_AGC_CTL
, reg
);
973 reg
= RTL818X_TX_CONF_CW_MIN
|
974 (7 << 21 /* MAX TX DMA */) |
975 RTL818X_TX_CONF_NO_ICV
;
976 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
, reg
);
978 reg
= rtl818x_ioread8(priv
, &priv
->map
->CMD
);
979 reg
|= RTL818X_CMD_TX_ENABLE
;
980 reg
|= RTL818X_CMD_RX_ENABLE
;
981 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
982 INIT_DELAYED_WORK(&priv
->work
, rtl8187_work
);
985 mutex_unlock(&priv
->conf_mutex
);
989 static void rtl8187_stop(struct ieee80211_hw
*dev
)
991 struct rtl8187_priv
*priv
= dev
->priv
;
995 mutex_lock(&priv
->conf_mutex
);
996 rtl818x_iowrite16(priv
, &priv
->map
->INT_MASK
, 0);
998 reg
= rtl818x_ioread8(priv
, &priv
->map
->CMD
);
999 reg
&= ~RTL818X_CMD_TX_ENABLE
;
1000 reg
&= ~RTL818X_CMD_RX_ENABLE
;
1001 rtl818x_iowrite8(priv
, &priv
->map
->CMD
, reg
);
1003 priv
->rf
->stop(dev
);
1005 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
1006 reg
= rtl818x_ioread8(priv
, &priv
->map
->CONFIG4
);
1007 rtl818x_iowrite8(priv
, &priv
->map
->CONFIG4
, reg
| RTL818X_CONFIG4_VCOOFF
);
1008 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
1010 while ((skb
= skb_dequeue(&priv
->b_tx_status
.queue
)))
1011 dev_kfree_skb_any(skb
);
1013 usb_kill_anchored_urbs(&priv
->anchored
);
1014 mutex_unlock(&priv
->conf_mutex
);
1016 if (!priv
->is_rtl8187b
)
1017 cancel_delayed_work_sync(&priv
->work
);
1020 static int rtl8187_add_interface(struct ieee80211_hw
*dev
,
1021 struct ieee80211_if_init_conf
*conf
)
1023 struct rtl8187_priv
*priv
= dev
->priv
;
1025 int ret
= -EOPNOTSUPP
;
1027 mutex_lock(&priv
->conf_mutex
);
1028 if (priv
->mode
!= NL80211_IFTYPE_MONITOR
)
1031 switch (conf
->type
) {
1032 case NL80211_IFTYPE_STATION
:
1033 priv
->mode
= conf
->type
;
1040 priv
->vif
= conf
->vif
;
1042 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
1043 for (i
= 0; i
< ETH_ALEN
; i
++)
1044 rtl818x_iowrite8(priv
, &priv
->map
->MAC
[i
],
1045 ((u8
*)conf
->mac_addr
)[i
]);
1046 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
1049 mutex_unlock(&priv
->conf_mutex
);
1053 static void rtl8187_remove_interface(struct ieee80211_hw
*dev
,
1054 struct ieee80211_if_init_conf
*conf
)
1056 struct rtl8187_priv
*priv
= dev
->priv
;
1057 mutex_lock(&priv
->conf_mutex
);
1058 priv
->mode
= NL80211_IFTYPE_MONITOR
;
1060 mutex_unlock(&priv
->conf_mutex
);
1063 static int rtl8187_config(struct ieee80211_hw
*dev
, u32 changed
)
1065 struct rtl8187_priv
*priv
= dev
->priv
;
1066 struct ieee80211_conf
*conf
= &dev
->conf
;
1069 mutex_lock(&priv
->conf_mutex
);
1070 reg
= rtl818x_ioread32(priv
, &priv
->map
->TX_CONF
);
1071 /* Enable TX loopback on MAC level to avoid TX during channel
1072 * changes, as this has be seen to causes problems and the
1073 * card will stop work until next reset
1075 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
,
1076 reg
| RTL818X_TX_CONF_LOOPBACK_MAC
);
1077 priv
->rf
->set_chan(dev
, conf
);
1079 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
, reg
);
1081 rtl818x_iowrite16(priv
, &priv
->map
->ATIM_WND
, 2);
1082 rtl818x_iowrite16(priv
, &priv
->map
->ATIMTR_INTERVAL
, 100);
1083 rtl818x_iowrite16(priv
, &priv
->map
->BEACON_INTERVAL
, 100);
1084 rtl818x_iowrite16(priv
, &priv
->map
->BEACON_INTERVAL_TIME
, 100);
1085 mutex_unlock(&priv
->conf_mutex
);
1090 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1091 * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1093 static __le32
*rtl8187b_ac_addr
[4] = {
1094 (__le32
*) 0xFFF0, /* AC_VO */
1095 (__le32
*) 0xFFF4, /* AC_VI */
1096 (__le32
*) 0xFFFC, /* AC_BK */
1097 (__le32
*) 0xFFF8, /* AC_BE */
1100 #define SIFS_TIME 0xa
1102 static void rtl8187_conf_erp(struct rtl8187_priv
*priv
, bool use_short_slot
,
1103 bool use_short_preamble
)
1105 if (priv
->is_rtl8187b
) {
1110 if (use_short_slot
) {
1111 priv
->slot_time
= 0x9;
1115 priv
->slot_time
= 0x14;
1119 rtl818x_iowrite8(priv
, &priv
->map
->SIFS
, 0x22);
1120 rtl818x_iowrite8(priv
, &priv
->map
->SLOT
, priv
->slot_time
);
1121 rtl818x_iowrite8(priv
, &priv
->map
->DIFS
, difs
);
1124 * BRSR+1 on 8187B is in fact EIFS register
1125 * Value in units of 4 us
1127 rtl818x_iowrite8(priv
, (u8
*)&priv
->map
->BRSR
+ 1, eifs
);
1130 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1131 * register. In units of 4 us like eifs register
1132 * ack_timeout = ack duration + plcp + difs + preamble
1134 ack_timeout
= 112 + 48 + difs
;
1135 if (use_short_preamble
)
1139 rtl818x_iowrite8(priv
, &priv
->map
->CARRIER_SENSE_COUNTER
,
1140 DIV_ROUND_UP(ack_timeout
, 4));
1142 for (queue
= 0; queue
< 4; queue
++)
1143 rtl818x_iowrite8(priv
, (u8
*) rtl8187b_ac_addr
[queue
],
1144 priv
->aifsn
[queue
] * priv
->slot_time
+
1147 rtl818x_iowrite8(priv
, &priv
->map
->SIFS
, 0x22);
1148 if (use_short_slot
) {
1149 rtl818x_iowrite8(priv
, &priv
->map
->SLOT
, 0x9);
1150 rtl818x_iowrite8(priv
, &priv
->map
->DIFS
, 0x14);
1151 rtl818x_iowrite8(priv
, &priv
->map
->EIFS
, 91 - 0x14);
1153 rtl818x_iowrite8(priv
, &priv
->map
->SLOT
, 0x14);
1154 rtl818x_iowrite8(priv
, &priv
->map
->DIFS
, 0x24);
1155 rtl818x_iowrite8(priv
, &priv
->map
->EIFS
, 91 - 0x24);
1160 static void rtl8187_bss_info_changed(struct ieee80211_hw
*dev
,
1161 struct ieee80211_vif
*vif
,
1162 struct ieee80211_bss_conf
*info
,
1165 struct rtl8187_priv
*priv
= dev
->priv
;
1169 if (changed
& BSS_CHANGED_BSSID
) {
1170 mutex_lock(&priv
->conf_mutex
);
1171 for (i
= 0; i
< ETH_ALEN
; i
++)
1172 rtl818x_iowrite8(priv
, &priv
->map
->BSSID
[i
],
1175 if (priv
->is_rtl8187b
)
1176 reg
= RTL818X_MSR_ENEDCA
;
1180 if (is_valid_ether_addr(info
->bssid
)) {
1181 reg
|= RTL818X_MSR_INFRA
;
1182 rtl818x_iowrite8(priv
, &priv
->map
->MSR
, reg
);
1184 reg
|= RTL818X_MSR_NO_LINK
;
1185 rtl818x_iowrite8(priv
, &priv
->map
->MSR
, reg
);
1188 mutex_unlock(&priv
->conf_mutex
);
1191 if (changed
& (BSS_CHANGED_ERP_SLOT
| BSS_CHANGED_ERP_PREAMBLE
))
1192 rtl8187_conf_erp(priv
, info
->use_short_slot
,
1193 info
->use_short_preamble
);
1196 static u64
rtl8187_prepare_multicast(struct ieee80211_hw
*dev
,
1197 int mc_count
, struct dev_addr_list
*mc_list
)
1202 static void rtl8187_configure_filter(struct ieee80211_hw
*dev
,
1203 unsigned int changed_flags
,
1204 unsigned int *total_flags
,
1207 struct rtl8187_priv
*priv
= dev
->priv
;
1209 if (changed_flags
& FIF_FCSFAIL
)
1210 priv
->rx_conf
^= RTL818X_RX_CONF_FCS
;
1211 if (changed_flags
& FIF_CONTROL
)
1212 priv
->rx_conf
^= RTL818X_RX_CONF_CTRL
;
1213 if (changed_flags
& FIF_OTHER_BSS
)
1214 priv
->rx_conf
^= RTL818X_RX_CONF_MONITOR
;
1215 if (*total_flags
& FIF_ALLMULTI
|| multicast
> 0)
1216 priv
->rx_conf
|= RTL818X_RX_CONF_MULTICAST
;
1218 priv
->rx_conf
&= ~RTL818X_RX_CONF_MULTICAST
;
1222 if (priv
->rx_conf
& RTL818X_RX_CONF_FCS
)
1223 *total_flags
|= FIF_FCSFAIL
;
1224 if (priv
->rx_conf
& RTL818X_RX_CONF_CTRL
)
1225 *total_flags
|= FIF_CONTROL
;
1226 if (priv
->rx_conf
& RTL818X_RX_CONF_MONITOR
)
1227 *total_flags
|= FIF_OTHER_BSS
;
1228 if (priv
->rx_conf
& RTL818X_RX_CONF_MULTICAST
)
1229 *total_flags
|= FIF_ALLMULTI
;
1231 rtl818x_iowrite32_async(priv
, &priv
->map
->RX_CONF
, priv
->rx_conf
);
1234 static int rtl8187_conf_tx(struct ieee80211_hw
*dev
, u16 queue
,
1235 const struct ieee80211_tx_queue_params
*params
)
1237 struct rtl8187_priv
*priv
= dev
->priv
;
1243 cw_min
= fls(params
->cw_min
);
1244 cw_max
= fls(params
->cw_max
);
1246 if (priv
->is_rtl8187b
) {
1247 priv
->aifsn
[queue
] = params
->aifs
;
1250 * This is the structure of AC_*_PARAM registers in 8187B:
1251 * - TXOP limit field, bit offset = 16
1252 * - ECWmax, bit offset = 12
1253 * - ECWmin, bit offset = 8
1254 * - AIFS, bit offset = 0
1256 rtl818x_iowrite32(priv
, rtl8187b_ac_addr
[queue
],
1257 (params
->txop
<< 16) | (cw_max
<< 12) |
1258 (cw_min
<< 8) | (params
->aifs
*
1259 priv
->slot_time
+ SIFS_TIME
));
1264 rtl818x_iowrite8(priv
, &priv
->map
->CW_VAL
,
1265 cw_min
| (cw_max
<< 4));
1270 static const struct ieee80211_ops rtl8187_ops
= {
1272 .start
= rtl8187_start
,
1273 .stop
= rtl8187_stop
,
1274 .add_interface
= rtl8187_add_interface
,
1275 .remove_interface
= rtl8187_remove_interface
,
1276 .config
= rtl8187_config
,
1277 .bss_info_changed
= rtl8187_bss_info_changed
,
1278 .prepare_multicast
= rtl8187_prepare_multicast
,
1279 .configure_filter
= rtl8187_configure_filter
,
1280 .conf_tx
= rtl8187_conf_tx
,
1281 .rfkill_poll
= rtl8187_rfkill_poll
1284 static void rtl8187_eeprom_register_read(struct eeprom_93cx6
*eeprom
)
1286 struct ieee80211_hw
*dev
= eeprom
->data
;
1287 struct rtl8187_priv
*priv
= dev
->priv
;
1288 u8 reg
= rtl818x_ioread8(priv
, &priv
->map
->EEPROM_CMD
);
1290 eeprom
->reg_data_in
= reg
& RTL818X_EEPROM_CMD_WRITE
;
1291 eeprom
->reg_data_out
= reg
& RTL818X_EEPROM_CMD_READ
;
1292 eeprom
->reg_data_clock
= reg
& RTL818X_EEPROM_CMD_CK
;
1293 eeprom
->reg_chip_select
= reg
& RTL818X_EEPROM_CMD_CS
;
1296 static void rtl8187_eeprom_register_write(struct eeprom_93cx6
*eeprom
)
1298 struct ieee80211_hw
*dev
= eeprom
->data
;
1299 struct rtl8187_priv
*priv
= dev
->priv
;
1300 u8 reg
= RTL818X_EEPROM_CMD_PROGRAM
;
1302 if (eeprom
->reg_data_in
)
1303 reg
|= RTL818X_EEPROM_CMD_WRITE
;
1304 if (eeprom
->reg_data_out
)
1305 reg
|= RTL818X_EEPROM_CMD_READ
;
1306 if (eeprom
->reg_data_clock
)
1307 reg
|= RTL818X_EEPROM_CMD_CK
;
1308 if (eeprom
->reg_chip_select
)
1309 reg
|= RTL818X_EEPROM_CMD_CS
;
1311 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, reg
);
1315 static int __devinit
rtl8187_probe(struct usb_interface
*intf
,
1316 const struct usb_device_id
*id
)
1318 struct usb_device
*udev
= interface_to_usbdev(intf
);
1319 struct ieee80211_hw
*dev
;
1320 struct rtl8187_priv
*priv
;
1321 struct eeprom_93cx6 eeprom
;
1322 struct ieee80211_channel
*channel
;
1323 const char *chip_name
;
1327 dev
= ieee80211_alloc_hw(sizeof(*priv
), &rtl8187_ops
);
1329 printk(KERN_ERR
"rtl8187: ieee80211 alloc failed\n");
1334 priv
->is_rtl8187b
= (id
->driver_info
== DEVICE_RTL8187B
);
1336 /* allocate "DMA aware" buffer for register accesses */
1337 priv
->io_dmabuf
= kmalloc(sizeof(*priv
->io_dmabuf
), GFP_KERNEL
);
1338 if (!priv
->io_dmabuf
) {
1342 mutex_init(&priv
->io_mutex
);
1344 SET_IEEE80211_DEV(dev
, &intf
->dev
);
1345 usb_set_intfdata(intf
, dev
);
1350 skb_queue_head_init(&priv
->rx_queue
);
1352 BUILD_BUG_ON(sizeof(priv
->channels
) != sizeof(rtl818x_channels
));
1353 BUILD_BUG_ON(sizeof(priv
->rates
) != sizeof(rtl818x_rates
));
1355 memcpy(priv
->channels
, rtl818x_channels
, sizeof(rtl818x_channels
));
1356 memcpy(priv
->rates
, rtl818x_rates
, sizeof(rtl818x_rates
));
1357 priv
->map
= (struct rtl818x_csr
*)0xFF00;
1359 priv
->band
.band
= IEEE80211_BAND_2GHZ
;
1360 priv
->band
.channels
= priv
->channels
;
1361 priv
->band
.n_channels
= ARRAY_SIZE(rtl818x_channels
);
1362 priv
->band
.bitrates
= priv
->rates
;
1363 priv
->band
.n_bitrates
= ARRAY_SIZE(rtl818x_rates
);
1364 dev
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] = &priv
->band
;
1367 priv
->mode
= NL80211_IFTYPE_MONITOR
;
1368 dev
->flags
= IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING
|
1369 IEEE80211_HW_SIGNAL_DBM
|
1370 IEEE80211_HW_RX_INCLUDES_FCS
;
1373 eeprom
.register_read
= rtl8187_eeprom_register_read
;
1374 eeprom
.register_write
= rtl8187_eeprom_register_write
;
1375 if (rtl818x_ioread32(priv
, &priv
->map
->RX_CONF
) & (1 << 6))
1376 eeprom
.width
= PCI_EEPROM_WIDTH_93C66
;
1378 eeprom
.width
= PCI_EEPROM_WIDTH_93C46
;
1380 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_CONFIG
);
1383 eeprom_93cx6_multiread(&eeprom
, RTL8187_EEPROM_MAC_ADDR
,
1384 (__le16 __force
*)dev
->wiphy
->perm_addr
, 3);
1385 if (!is_valid_ether_addr(dev
->wiphy
->perm_addr
)) {
1386 printk(KERN_WARNING
"rtl8187: Invalid hwaddr! Using randomly "
1387 "generated MAC address\n");
1388 random_ether_addr(dev
->wiphy
->perm_addr
);
1391 channel
= priv
->channels
;
1392 for (i
= 0; i
< 3; i
++) {
1393 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_CHAN_1
+ i
,
1395 (*channel
++).hw_value
= txpwr
& 0xFF;
1396 (*channel
++).hw_value
= txpwr
>> 8;
1398 for (i
= 0; i
< 2; i
++) {
1399 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_CHAN_4
+ i
,
1401 (*channel
++).hw_value
= txpwr
& 0xFF;
1402 (*channel
++).hw_value
= txpwr
>> 8;
1405 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_BASE
,
1408 reg
= rtl818x_ioread8(priv
, &priv
->map
->PGSELECT
) & ~1;
1409 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
| 1);
1410 /* 0 means asic B-cut, we should use SW 3 wire
1411 * bit-by-bit banging for radio. 1 means we can use
1412 * USB specific request to write radio registers */
1413 priv
->asic_rev
= rtl818x_ioread8(priv
, (u8
*)0xFFFE) & 0x3;
1414 rtl818x_iowrite8(priv
, &priv
->map
->PGSELECT
, reg
);
1415 rtl818x_iowrite8(priv
, &priv
->map
->EEPROM_CMD
, RTL818X_EEPROM_CMD_NORMAL
);
1417 if (!priv
->is_rtl8187b
) {
1419 reg32
= rtl818x_ioread32(priv
, &priv
->map
->TX_CONF
);
1420 reg32
&= RTL818X_TX_CONF_HWVER_MASK
;
1422 case RTL818X_TX_CONF_R8187vD_B
:
1423 /* Some RTL8187B devices have a USB ID of 0x8187
1424 * detect them here */
1425 chip_name
= "RTL8187BvB(early)";
1426 priv
->is_rtl8187b
= 1;
1427 priv
->hw_rev
= RTL8187BvB
;
1429 case RTL818X_TX_CONF_R8187vD
:
1430 chip_name
= "RTL8187vD";
1433 chip_name
= "RTL8187vB (default)";
1437 * Force USB request to write radio registers for 8187B, Realtek
1438 * only uses it in their sources
1440 /*if (priv->asic_rev == 0) {
1441 printk(KERN_WARNING "rtl8187: Forcing use of USB "
1442 "requests to write to radio registers\n");
1445 switch (rtl818x_ioread8(priv
, (u8
*)0xFFE1)) {
1446 case RTL818X_R8187B_B
:
1447 chip_name
= "RTL8187BvB";
1448 priv
->hw_rev
= RTL8187BvB
;
1450 case RTL818X_R8187B_D
:
1451 chip_name
= "RTL8187BvD";
1452 priv
->hw_rev
= RTL8187BvD
;
1454 case RTL818X_R8187B_E
:
1455 chip_name
= "RTL8187BvE";
1456 priv
->hw_rev
= RTL8187BvE
;
1459 chip_name
= "RTL8187BvB (default)";
1460 priv
->hw_rev
= RTL8187BvB
;
1464 if (!priv
->is_rtl8187b
) {
1465 for (i
= 0; i
< 2; i
++) {
1466 eeprom_93cx6_read(&eeprom
,
1467 RTL8187_EEPROM_TXPWR_CHAN_6
+ i
,
1469 (*channel
++).hw_value
= txpwr
& 0xFF;
1470 (*channel
++).hw_value
= txpwr
>> 8;
1473 eeprom_93cx6_read(&eeprom
, RTL8187_EEPROM_TXPWR_CHAN_6
,
1475 (*channel
++).hw_value
= txpwr
& 0xFF;
1477 eeprom_93cx6_read(&eeprom
, 0x0A, &txpwr
);
1478 (*channel
++).hw_value
= txpwr
& 0xFF;
1480 eeprom_93cx6_read(&eeprom
, 0x1C, &txpwr
);
1481 (*channel
++).hw_value
= txpwr
& 0xFF;
1482 (*channel
++).hw_value
= txpwr
>> 8;
1486 * XXX: Once this driver supports anything that requires
1487 * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1489 dev
->wiphy
->interface_modes
= BIT(NL80211_IFTYPE_STATION
);
1491 if ((id
->driver_info
== DEVICE_RTL8187
) && priv
->is_rtl8187b
)
1492 printk(KERN_INFO
"rtl8187: inconsistency between id with OEM"
1495 priv
->rf
= rtl8187_detect_rf(dev
);
1496 dev
->extra_tx_headroom
= (!priv
->is_rtl8187b
) ?
1497 sizeof(struct rtl8187_tx_hdr
) :
1498 sizeof(struct rtl8187b_tx_hdr
);
1499 if (!priv
->is_rtl8187b
)
1504 err
= ieee80211_register_hw(dev
);
1506 printk(KERN_ERR
"rtl8187: Cannot register device\n");
1507 goto err_free_dmabuf
;
1509 mutex_init(&priv
->conf_mutex
);
1510 skb_queue_head_init(&priv
->b_tx_status
.queue
);
1512 printk(KERN_INFO
"%s: hwaddr %pM, %s V%d + %s\n",
1513 wiphy_name(dev
->wiphy
), dev
->wiphy
->perm_addr
,
1514 chip_name
, priv
->asic_rev
, priv
->rf
->name
);
1516 #ifdef CONFIG_RTL8187_LEDS
1517 eeprom_93cx6_read(&eeprom
, 0x3F, ®
);
1519 rtl8187_leds_init(dev
, reg
);
1521 rtl8187_rfkill_init(dev
);
1526 kfree(priv
->io_dmabuf
);
1528 ieee80211_free_hw(dev
);
1529 usb_set_intfdata(intf
, NULL
);
1534 static void __devexit
rtl8187_disconnect(struct usb_interface
*intf
)
1536 struct ieee80211_hw
*dev
= usb_get_intfdata(intf
);
1537 struct rtl8187_priv
*priv
;
1542 #ifdef CONFIG_RTL8187_LEDS
1543 rtl8187_leds_exit(dev
);
1545 rtl8187_rfkill_exit(dev
);
1546 ieee80211_unregister_hw(dev
);
1549 usb_reset_device(priv
->udev
);
1550 usb_put_dev(interface_to_usbdev(intf
));
1551 kfree(priv
->io_dmabuf
);
1552 ieee80211_free_hw(dev
);
1555 static struct usb_driver rtl8187_driver
= {
1556 .name
= KBUILD_MODNAME
,
1557 .id_table
= rtl8187_table
,
1558 .probe
= rtl8187_probe
,
1559 .disconnect
= __devexit_p(rtl8187_disconnect
),
1562 static int __init
rtl8187_init(void)
1564 return usb_register(&rtl8187_driver
);
1567 static void __exit
rtl8187_exit(void)
1569 usb_deregister(&rtl8187_driver
);
1572 module_init(rtl8187_init
);
1573 module_exit(rtl8187_exit
);