drivers/net/wireless/wl12xx/wl1271.h

   1 /*
   2  * This file is part of wl1271
   3  *
   4  * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
   5  * Copyright (C) 2008-2009 Nokia Corporation
   6  *
   7  * Contact: Luciano Coelho <luciano.coelho@nokia.com>
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * version 2 as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21  * 02110-1301 USA
  22  *
  23  */
  24
  25 #ifndef __WL1271_H__
  26 #define __WL1271_H__
  27
  28 #include <linux/mutex.h>
  29 #include <linux/completion.h>
  30 #include <linux/spinlock.h>
  31 #include <linux/list.h>
  32 #include <linux/bitops.h>
  33 #include <net/mac80211.h>
  34
  35 #define DRIVER_NAME "wl1271"
  36 #define DRIVER_PREFIX DRIVER_NAME ": "
  37
  38 enum {
  39         DEBUG_NONE      = 0,
  40         DEBUG_IRQ       = BIT(0),
  41         DEBUG_SPI       = BIT(1),
  42         DEBUG_BOOT      = BIT(2),
  43         DEBUG_MAILBOX   = BIT(3),
  44         DEBUG_NETLINK   = BIT(4),
  45         DEBUG_EVENT     = BIT(5),
  46         DEBUG_TX        = BIT(6),
  47         DEBUG_RX        = BIT(7),
  48         DEBUG_SCAN      = BIT(8),
  49         DEBUG_CRYPT     = BIT(9),
  50         DEBUG_PSM       = BIT(10),
  51         DEBUG_MAC80211  = BIT(11),
  52         DEBUG_CMD       = BIT(12),
  53         DEBUG_ACX       = BIT(13),
  54         DEBUG_ALL       = ~0,
  55 };
  56
  57 #define DEBUG_LEVEL (DEBUG_NONE)
  58
  59 #define DEBUG_DUMP_LIMIT 1024
  60
  61 #define wl1271_error(fmt, arg...) \
  62         printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
  63
  64 #define wl1271_warning(fmt, arg...) \
  65         printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
  66
  67 #define wl1271_notice(fmt, arg...) \
  68         printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
  69
  70 #define wl1271_info(fmt, arg...) \
  71         printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
  72
  73 #define wl1271_debug(level, fmt, arg...) \
  74         do { \
  75                 if (level & DEBUG_LEVEL) \
  76                         printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
  77         } while (0)
  78
  79 #define wl1271_dump(level, prefix, buf, len)    \
  80         do { \
  81                 if (level & DEBUG_LEVEL) \
  82                         print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
  83                                        DUMP_PREFIX_OFFSET, 16, 1,       \
  84                                        buf,                             \
  85                                        min_t(size_t, len, DEBUG_DUMP_LIMIT), \
  86                                        0);                              \
  87         } while (0)
  88
  89 #define wl1271_dump_ascii(level, prefix, buf, len)      \
  90         do { \
  91                 if (level & DEBUG_LEVEL) \
  92                         print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
  93                                        DUMP_PREFIX_OFFSET, 16, 1,       \
  94                                        buf,                             \
  95                                        min_t(size_t, len, DEBUG_DUMP_LIMIT), \
  96                                        true);                           \
  97         } while (0)
  98
  99 #define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN |   \
 100                                   CFG_BSSID_FILTER_EN)
 101
 102 #define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN |  \
 103                                   CFG_RX_MGMT_EN | CFG_RX_DATA_EN |   \
 104                                   CFG_RX_CTL_EN | CFG_RX_BCN_EN |     \
 105                                   CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
 106
 107 #define WL1271_FW_NAME "wl1271-fw.bin"
 108 #define WL1271_NVS_NAME "wl1271-nvs.bin"
 109
 110 #define WL1271_BUSY_WORD_LEN 8
 111
 112 #define WL1271_ELP_HW_STATE_ASLEEP 0
 113 #define WL1271_ELP_HW_STATE_IRQ    1
 114
 115 enum wl1271_state {
 116         WL1271_STATE_OFF,
 117         WL1271_STATE_ON,
 118         WL1271_STATE_PLT,
 119 };
 120
 121 enum wl1271_partition_type {
 122         PART_DOWN,
 123         PART_WORK,
 124         PART_DRPW,
 125
 126         PART_TABLE_LEN
 127 };
 128
 129 struct wl1271_partition {
 130         u32 size;
 131         u32 start;
 132 };
 133
 134 struct wl1271_partition_set {
 135         struct wl1271_partition mem;
 136         struct wl1271_partition reg;
 137 };
 138
 139 struct wl1271;
 140
 141 /* FIXME: I'm not sure about this structure name */
 142 struct wl1271_chip {
 143         u32 id;
 144         char fw_ver[21];
 145 };
 146
 147 struct wl1271_stats {
 148         struct acx_statistics *fw_stats;
 149         unsigned long fw_stats_update;
 150
 151         unsigned int retry_count;
 152         unsigned int excessive_retries;
 153 };
 154
 155 struct wl1271_debugfs {
 156         struct dentry *rootdir;
 157         struct dentry *fw_statistics;
 158
 159         struct dentry *tx_internal_desc_overflow;
 160
 161         struct dentry *rx_out_of_mem;
 162         struct dentry *rx_hdr_overflow;
 163         struct dentry *rx_hw_stuck;
 164         struct dentry *rx_dropped;
 165         struct dentry *rx_fcs_err;
 166         struct dentry *rx_xfr_hint_trig;
 167         struct dentry *rx_path_reset;
 168         struct dentry *rx_reset_counter;
 169
 170         struct dentry *dma_rx_requested;
 171         struct dentry *dma_rx_errors;
 172         struct dentry *dma_tx_requested;
 173         struct dentry *dma_tx_errors;
 174
 175         struct dentry *isr_cmd_cmplt;
 176         struct dentry *isr_fiqs;
 177         struct dentry *isr_rx_headers;
 178         struct dentry *isr_rx_mem_overflow;
 179         struct dentry *isr_rx_rdys;
 180         struct dentry *isr_irqs;
 181         struct dentry *isr_tx_procs;
 182         struct dentry *isr_decrypt_done;
 183         struct dentry *isr_dma0_done;
 184         struct dentry *isr_dma1_done;
 185         struct dentry *isr_tx_exch_complete;
 186         struct dentry *isr_commands;
 187         struct dentry *isr_rx_procs;
 188         struct dentry *isr_hw_pm_mode_changes;
 189         struct dentry *isr_host_acknowledges;
 190         struct dentry *isr_pci_pm;
 191         struct dentry *isr_wakeups;
 192         struct dentry *isr_low_rssi;
 193
 194         struct dentry *wep_addr_key_count;
 195         struct dentry *wep_default_key_count;
 196         /* skipping wep.reserved */
 197         struct dentry *wep_key_not_found;
 198         struct dentry *wep_decrypt_fail;
 199         struct dentry *wep_packets;
 200         struct dentry *wep_interrupt;
 201
 202         struct dentry *pwr_ps_enter;
 203         struct dentry *pwr_elp_enter;
 204         struct dentry *pwr_missing_bcns;
 205         struct dentry *pwr_wake_on_host;
 206         struct dentry *pwr_wake_on_timer_exp;
 207         struct dentry *pwr_tx_with_ps;
 208         struct dentry *pwr_tx_without_ps;
 209         struct dentry *pwr_rcvd_beacons;
 210         struct dentry *pwr_power_save_off;
 211         struct dentry *pwr_enable_ps;
 212         struct dentry *pwr_disable_ps;
 213         struct dentry *pwr_fix_tsf_ps;
 214         /* skipping cont_miss_bcns_spread for now */
 215         struct dentry *pwr_rcvd_awake_beacons;
 216
 217         struct dentry *mic_rx_pkts;
 218         struct dentry *mic_calc_failure;
 219
 220         struct dentry *aes_encrypt_fail;
 221         struct dentry *aes_decrypt_fail;
 222         struct dentry *aes_encrypt_packets;
 223         struct dentry *aes_decrypt_packets;
 224         struct dentry *aes_encrypt_interrupt;
 225         struct dentry *aes_decrypt_interrupt;
 226
 227         struct dentry *event_heart_beat;
 228         struct dentry *event_calibration;
 229         struct dentry *event_rx_mismatch;
 230         struct dentry *event_rx_mem_empty;
 231         struct dentry *event_rx_pool;
 232         struct dentry *event_oom_late;
 233         struct dentry *event_phy_transmit_error;
 234         struct dentry *event_tx_stuck;
 235
 236         struct dentry *ps_pspoll_timeouts;
 237         struct dentry *ps_upsd_timeouts;
 238         struct dentry *ps_upsd_max_sptime;
 239         struct dentry *ps_upsd_max_apturn;
 240         struct dentry *ps_pspoll_max_apturn;
 241         struct dentry *ps_pspoll_utilization;
 242         struct dentry *ps_upsd_utilization;
 243
 244         struct dentry *rxpipe_rx_prep_beacon_drop;
 245         struct dentry *rxpipe_descr_host_int_trig_rx_data;
 246         struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
 247         struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
 248         struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
 249
 250         struct dentry *tx_queue_len;
 251
 252         struct dentry *retry_count;
 253         struct dentry *excessive_retries;
 254 };
 255
 256 #define NUM_TX_QUEUES              4
 257 #define NUM_RX_PKT_DESC            8
 258
 259 /* FW status registers */
 260 struct wl1271_fw_status {
 261         u32 intr;
 262         u8  fw_rx_counter;
 263         u8  drv_rx_counter;
 264         u8  reserved;
 265         u8  tx_results_counter;
 266         u32 rx_pkt_descs[NUM_RX_PKT_DESC];
 267         u32 tx_released_blks[NUM_TX_QUEUES];
 268         u32 fw_localtime;
 269         u32 padding[2];
 270 } __attribute__ ((packed));
 271
 272 struct wl1271_rx_mem_pool_addr {
 273         u32 addr;
 274         u32 addr_extra;
 275 };
 276
 277 struct wl1271 {
 278         struct ieee80211_hw *hw;
 279         bool mac80211_registered;
 280
 281         struct spi_device *spi;
 282
 283         void (*set_power)(bool enable);
 284         int irq;
 285
 286         spinlock_t wl_lock;
 287
 288         enum wl1271_state state;
 289         struct mutex mutex;
 290
 291         int physical_mem_addr;
 292         int physical_reg_addr;
 293         int virtual_mem_addr;
 294         int virtual_reg_addr;
 295
 296         struct wl1271_chip chip;
 297
 298         int cmd_box_addr;
 299         int event_box_addr;
 300
 301         u8 *fw;
 302         size_t fw_len;
 303         u8 *nvs;
 304         size_t nvs_len;
 305
 306         u8 bssid[ETH_ALEN];
 307         u8 mac_addr[ETH_ALEN];
 308         u8 bss_type;
 309         u8 ssid[IW_ESSID_MAX_SIZE + 1];
 310         u8 ssid_len;
 311         u8 listen_int;
 312         int channel;
 313
 314         struct wl1271_acx_mem_map *target_mem_map;
 315
 316         /* Accounting for allocated / available TX blocks on HW */
 317         u32 tx_blocks_freed[NUM_TX_QUEUES];
 318         u32 tx_blocks_available;
 319         u8 tx_results_count;
 320
 321         /* Transmitted TX packets counter for chipset interface */
 322         int tx_packets_count;
 323
 324         /* Time-offset between host and chipset clocks */
 325         int time_offset;
 326
 327         /* Session counter for the chipset */
 328         int session_counter;
 329
 330         /* Frames scheduled for transmission, not handled yet */
 331         struct sk_buff_head tx_queue;
 332         bool tx_queue_stopped;
 333
 334         struct work_struct tx_work;
 335         struct work_struct filter_work;
 336
 337         /* Pending TX frames */
 338         struct sk_buff *tx_frames[16];
 339
 340         /* FW Rx counter */
 341         u32 rx_counter;
 342
 343         /* Rx memory pool address */
 344         struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
 345
 346         /* The target interrupt mask */
 347         struct work_struct irq_work;
 348
 349         /* The mbox event mask */
 350         u32 event_mask;
 351
 352         /* Mailbox pointers */
 353         u32 mbox_ptr[2];
 354
 355         /* Are we currently scanning */
 356         bool scanning;
 357
 358         /* Our association ID */
 359         u16 aid;
 360
 361         /* Default key (for WEP) */
 362         u32 default_key;
 363
 364         unsigned int rx_config;
 365         unsigned int rx_filter;
 366
 367         /* is firmware in elp mode */
 368         bool elp;
 369
 370         struct completion *elp_compl;
 371
 372         /* we can be in psm, but not in elp, we have to differentiate */
 373         bool psm;
 374
 375         /* PSM mode requested */
 376         bool psm_requested;
 377
 378         /* in dBm */
 379         int power_level;
 380
 381         struct wl1271_stats stats;
 382         struct wl1271_debugfs debugfs;
 383
 384         u32 buffer_32;
 385         u32 buffer_cmd;
 386         u8 buffer_busyword[WL1271_BUSY_WORD_LEN];
 387         struct wl1271_rx_descriptor *rx_descriptor;
 388
 389         struct wl1271_fw_status *fw_status;
 390         struct wl1271_tx_hw_res_if *tx_res_if;
 391 };
 392
 393 int wl1271_plt_start(struct wl1271 *wl);
 394 int wl1271_plt_stop(struct wl1271 *wl);
 395
 396 #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
 397
 398 #define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
 399
 400 #define WL1271_DEFAULT_POWER_LEVEL 0
 401
 402 #define WL1271_TX_QUEUE_MAX_LENGTH 20
 403
 404 /* WL1271 needs a 200ms sleep after power on */
 405 #define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
 406
 407 #endif