4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 * Copyright (C) 2011 Advanced Micro Devices,
7 * PCI Express I/O Virtualization (IOV) support.
8 * Address Translation Service 1.0
9 * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
10 * PASID support added by Joerg Roedel <joerg.roedel@amd.com>
13 #include <linux/pci-ats.h>
14 #include <linux/pci.h>
18 static int ats_alloc_one(struct pci_dev
*dev
, int ps
)
24 pos
= pci_find_ext_capability(dev
, PCI_EXT_CAP_ID_ATS
);
28 ats
= kzalloc(sizeof(*ats
), GFP_KERNEL
);
34 pci_read_config_word(dev
, pos
+ PCI_ATS_CAP
, &cap
);
35 ats
->qdep
= PCI_ATS_CAP_QDEP(cap
) ? PCI_ATS_CAP_QDEP(cap
) :
42 static void ats_free_one(struct pci_dev
*dev
)
49 * pci_enable_ats - enable the ATS capability
50 * @dev: the PCI device
51 * @ps: the IOMMU page shift
53 * Returns 0 on success, or negative on failure.
55 int pci_enable_ats(struct pci_dev
*dev
, int ps
)
60 BUG_ON(dev
->ats
&& dev
->ats
->is_enabled
);
62 if (ps
< PCI_ATS_MIN_STU
)
65 if (dev
->is_physfn
|| dev
->is_virtfn
) {
66 struct pci_dev
*pdev
= dev
->is_physfn
? dev
: dev
->physfn
;
68 mutex_lock(&pdev
->sriov
->lock
);
70 rc
= pdev
->ats
->stu
== ps
? 0 : -EINVAL
;
72 rc
= ats_alloc_one(pdev
, ps
);
76 mutex_unlock(&pdev
->sriov
->lock
);
81 if (!dev
->is_physfn
) {
82 rc
= ats_alloc_one(dev
, ps
);
87 ctrl
= PCI_ATS_CTRL_ENABLE
;
89 ctrl
|= PCI_ATS_CTRL_STU(ps
- PCI_ATS_MIN_STU
);
90 pci_write_config_word(dev
, dev
->ats
->pos
+ PCI_ATS_CTRL
, ctrl
);
92 dev
->ats
->is_enabled
= 1;
96 EXPORT_SYMBOL_GPL(pci_enable_ats
);
99 * pci_disable_ats - disable the ATS capability
100 * @dev: the PCI device
102 void pci_disable_ats(struct pci_dev
*dev
)
106 BUG_ON(!dev
->ats
|| !dev
->ats
->is_enabled
);
108 pci_read_config_word(dev
, dev
->ats
->pos
+ PCI_ATS_CTRL
, &ctrl
);
109 ctrl
&= ~PCI_ATS_CTRL_ENABLE
;
110 pci_write_config_word(dev
, dev
->ats
->pos
+ PCI_ATS_CTRL
, ctrl
);
112 dev
->ats
->is_enabled
= 0;
114 if (dev
->is_physfn
|| dev
->is_virtfn
) {
115 struct pci_dev
*pdev
= dev
->is_physfn
? dev
: dev
->physfn
;
117 mutex_lock(&pdev
->sriov
->lock
);
118 pdev
->ats
->ref_cnt
--;
119 if (!pdev
->ats
->ref_cnt
)
121 mutex_unlock(&pdev
->sriov
->lock
);
127 EXPORT_SYMBOL_GPL(pci_disable_ats
);
130 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
131 * @dev: the PCI device
133 * Returns the queue depth on success, or negative on failure.
135 * The ATS spec uses 0 in the Invalidate Queue Depth field to
136 * indicate that the function can accept 32 Invalidate Request.
137 * But here we use the `real' values (i.e. 1~32) for the Queue
138 * Depth; and 0 indicates the function shares the Queue with
139 * other functions (doesn't exclusively own a Queue).
141 int pci_ats_queue_depth(struct pci_dev
*dev
)
150 return dev
->ats
->qdep
;
152 pos
= pci_find_ext_capability(dev
, PCI_EXT_CAP_ID_ATS
);
156 pci_read_config_word(dev
, pos
+ PCI_ATS_CAP
, &cap
);
158 return PCI_ATS_CAP_QDEP(cap
) ? PCI_ATS_CAP_QDEP(cap
) :
161 EXPORT_SYMBOL_GPL(pci_ats_queue_depth
);
163 #ifdef CONFIG_PCI_PRI
165 * pci_enable_pri - Enable PRI capability
166 * @ pdev: PCI device structure
168 * Returns 0 on success, negative value on error
170 int pci_enable_pri(struct pci_dev
*pdev
, u32 reqs
)
176 pos
= pci_find_ext_capability(pdev
, PCI_PRI_CAP
);
180 pci_read_config_word(pdev
, pos
+ PCI_PRI_CONTROL_OFF
, &control
);
181 pci_read_config_word(pdev
, pos
+ PCI_PRI_STATUS_OFF
, &status
);
182 if ((control
& PCI_PRI_ENABLE
) || !(status
& PCI_PRI_STATUS_STOPPED
))
185 pci_read_config_dword(pdev
, pos
+ PCI_PRI_MAX_REQ_OFF
, &max_requests
);
186 reqs
= min(max_requests
, reqs
);
187 pci_write_config_dword(pdev
, pos
+ PCI_PRI_ALLOC_REQ_OFF
, reqs
);
189 control
|= PCI_PRI_ENABLE
;
190 pci_write_config_word(pdev
, pos
+ PCI_PRI_CONTROL_OFF
, control
);
194 EXPORT_SYMBOL_GPL(pci_enable_pri
);
197 * pci_disable_pri - Disable PRI capability
198 * @pdev: PCI device structure
200 * Only clears the enabled-bit, regardless of its former value
202 void pci_disable_pri(struct pci_dev
*pdev
)
207 pos
= pci_find_ext_capability(pdev
, PCI_PRI_CAP
);
211 pci_read_config_word(pdev
, pos
+ PCI_PRI_CONTROL_OFF
, &control
);
212 control
&= ~PCI_PRI_ENABLE
;
213 pci_write_config_word(pdev
, pos
+ PCI_PRI_CONTROL_OFF
, control
);
215 EXPORT_SYMBOL_GPL(pci_disable_pri
);
218 * pci_pri_enabled - Checks if PRI capability is enabled
219 * @pdev: PCI device structure
221 * Returns true if PRI is enabled on the device, false otherwise
223 bool pci_pri_enabled(struct pci_dev
*pdev
)
228 pos
= pci_find_ext_capability(pdev
, PCI_PRI_CAP
);
232 pci_read_config_word(pdev
, pos
+ PCI_PRI_CONTROL_OFF
, &control
);
234 return (control
& PCI_PRI_ENABLE
) ? true : false;
236 EXPORT_SYMBOL_GPL(pci_pri_enabled
);
239 * pci_reset_pri - Resets device's PRI state
240 * @pdev: PCI device structure
242 * The PRI capability must be disabled before this function is called.
243 * Returns 0 on success, negative value on error.
245 int pci_reset_pri(struct pci_dev
*pdev
)
250 pos
= pci_find_ext_capability(pdev
, PCI_PRI_CAP
);
254 pci_read_config_word(pdev
, pos
+ PCI_PRI_CONTROL_OFF
, &control
);
255 if (control
& PCI_PRI_ENABLE
)
258 control
|= PCI_PRI_RESET
;
260 pci_write_config_word(pdev
, pos
+ PCI_PRI_CONTROL_OFF
, control
);
264 EXPORT_SYMBOL_GPL(pci_reset_pri
);
267 * pci_pri_stopped - Checks whether the PRI capability is stopped
268 * @pdev: PCI device structure
270 * Returns true if the PRI capability on the device is disabled and the
271 * device has no outstanding PRI requests, false otherwise. The device
272 * indicates this via the STOPPED bit in the status register of the
274 * The device internal state can be cleared by resetting the PRI state
275 * with pci_reset_pri(). This can force the capability into the STOPPED
278 bool pci_pri_stopped(struct pci_dev
*pdev
)
283 pos
= pci_find_ext_capability(pdev
, PCI_PRI_CAP
);
287 pci_read_config_word(pdev
, pos
+ PCI_PRI_CONTROL_OFF
, &control
);
288 pci_read_config_word(pdev
, pos
+ PCI_PRI_STATUS_OFF
, &status
);
290 if (control
& PCI_PRI_ENABLE
)
293 return (status
& PCI_PRI_STATUS_STOPPED
) ? true : false;
295 EXPORT_SYMBOL_GPL(pci_pri_stopped
);
298 * pci_pri_status - Request PRI status of a device
299 * @pdev: PCI device structure
301 * Returns negative value on failure, status on success. The status can
302 * be checked against status-bits. Supported bits are currently:
303 * PCI_PRI_STATUS_RF: Response failure
304 * PCI_PRI_STATUS_UPRGI: Unexpected Page Request Group Index
305 * PCI_PRI_STATUS_STOPPED: PRI has stopped
307 int pci_pri_status(struct pci_dev
*pdev
)
312 pos
= pci_find_ext_capability(pdev
, PCI_PRI_CAP
);
316 pci_read_config_word(pdev
, pos
+ PCI_PRI_CONTROL_OFF
, &control
);
317 pci_read_config_word(pdev
, pos
+ PCI_PRI_STATUS_OFF
, &status
);
319 /* Stopped bit is undefined when enable == 1, so clear it */
320 if (control
& PCI_PRI_ENABLE
)
321 status
&= ~PCI_PRI_STATUS_STOPPED
;
325 EXPORT_SYMBOL_GPL(pci_pri_status
);
326 #endif /* CONFIG_PCI_PRI */
328 #ifdef CONFIG_PCI_PASID
330 * pci_enable_pasid - Enable the PASID capability
331 * @pdev: PCI device structure
332 * @features: Features to enable
334 * Returns 0 on success, negative value on error. This function checks
335 * whether the features are actually supported by the device and returns
338 int pci_enable_pasid(struct pci_dev
*pdev
, int features
)
340 u16 control
, supported
;
343 pos
= pci_find_ext_capability(pdev
, PCI_PASID_CAP
);
347 pci_read_config_word(pdev
, pos
+ PCI_PASID_CONTROL_OFF
, &control
);
348 pci_read_config_word(pdev
, pos
+ PCI_PASID_CAP_OFF
, &supported
);
350 if (!(supported
& PCI_PASID_ENABLE
))
353 supported
&= PCI_PASID_EXEC
| PCI_PASID_PRIV
;
355 /* User wants to enable anything unsupported? */
356 if ((supported
& features
) != features
)
359 control
= PCI_PASID_ENABLE
| features
;
361 pci_write_config_word(pdev
, pos
+ PCI_PASID_CONTROL_OFF
, control
);
365 EXPORT_SYMBOL_GPL(pci_enable_pasid
);
368 * pci_disable_pasid - Disable the PASID capability
369 * @pdev: PCI device structure
372 void pci_disable_pasid(struct pci_dev
*pdev
)
377 pos
= pci_find_ext_capability(pdev
, PCI_PASID_CAP
);
381 pci_write_config_word(pdev
, pos
+ PCI_PASID_CONTROL_OFF
, control
);
383 EXPORT_SYMBOL_GPL(pci_disable_pasid
);
386 * pci_pasid_features - Check which PASID features are supported
387 * @pdev: PCI device structure
389 * Returns a negative value when no PASI capability is present.
390 * Otherwise is returns a bitmask with supported features. Current
391 * features reported are:
392 * PCI_PASID_ENABLE - PASID capability can be enabled
393 * PCI_PASID_EXEC - Execute permission supported
394 * PCI_PASID_PRIV - Priviledged mode supported
396 int pci_pasid_features(struct pci_dev
*pdev
)
401 pos
= pci_find_ext_capability(pdev
, PCI_PASID_CAP
);
405 pci_read_config_word(pdev
, pos
+ PCI_PASID_CAP_OFF
, &supported
);
407 supported
&= PCI_PASID_ENABLE
| PCI_PASID_EXEC
| PCI_PASID_PRIV
;
411 EXPORT_SYMBOL_GPL(pci_pasid_features
);
413 #define PASID_NUMBER_SHIFT 8
414 #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
416 * pci_max_pasid - Get maximum number of PASIDs supported by device
417 * @pdev: PCI device structure
419 * Returns negative value when PASID capability is not present.
420 * Otherwise it returns the numer of supported PASIDs.
422 int pci_max_pasids(struct pci_dev
*pdev
)
427 pos
= pci_find_ext_capability(pdev
, PCI_PASID_CAP
);
431 pci_read_config_word(pdev
, pos
+ PCI_PASID_CAP_OFF
, &supported
);
433 supported
= (supported
& PASID_NUMBER_MASK
) >> PASID_NUMBER_SHIFT
;
435 return (1 << supported
);
437 EXPORT_SYMBOL_GPL(pci_max_pasids
);
438 #endif /* CONFIG_PCI_PASID */
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