PCI: pciehp: ignore undefined bit in link status register
[deliverable/linux.git] / drivers / pci / pci.h
1 #ifndef DRIVERS_PCI_H
2 #define DRIVERS_PCI_H
3
4 #define PCI_CFG_SPACE_SIZE 256
5 #define PCI_CFG_SPACE_EXP_SIZE 4096
6
7 /* Functions internal to the PCI core code */
8
9 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
10 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
11 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
12 extern void pci_cleanup_rom(struct pci_dev *dev);
13 #ifdef HAVE_PCI_MMAP
14 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
15 struct vm_area_struct *vma);
16 #endif
17
18 /**
19 * Firmware PM callbacks
20 *
21 * @is_manageable - returns 'true' if given device is power manageable by the
22 * platform firmware
23 *
24 * @set_state - invokes the platform firmware to set the device's power state
25 *
26 * @choose_state - returns PCI power state of given device preferred by the
27 * platform; to be used during system-wide transitions from a
28 * sleeping state to the working state and vice versa
29 *
30 * @can_wakeup - returns 'true' if given device is capable of waking up the
31 * system from a sleeping state
32 *
33 * @sleep_wake - enables/disables the system wake up capability of given device
34 *
35 * If given platform is generally capable of power managing PCI devices, all of
36 * these callbacks are mandatory.
37 */
38 struct pci_platform_pm_ops {
39 bool (*is_manageable)(struct pci_dev *dev);
40 int (*set_state)(struct pci_dev *dev, pci_power_t state);
41 pci_power_t (*choose_state)(struct pci_dev *dev);
42 bool (*can_wakeup)(struct pci_dev *dev);
43 int (*sleep_wake)(struct pci_dev *dev, bool enable);
44 };
45
46 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
47 extern void pci_pm_init(struct pci_dev *dev);
48 extern void platform_pci_wakeup_init(struct pci_dev *dev);
49 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
50
51 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
52 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
53 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
54 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
55 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
56 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
57
58 struct pci_vpd_ops {
59 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
60 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
61 void (*release)(struct pci_dev *dev);
62 };
63
64 struct pci_vpd {
65 unsigned int len;
66 const struct pci_vpd_ops *ops;
67 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
68 };
69
70 extern int pci_vpd_pci22_init(struct pci_dev *dev);
71 static inline void pci_vpd_release(struct pci_dev *dev)
72 {
73 if (dev->vpd)
74 dev->vpd->ops->release(dev);
75 }
76
77 /* PCI /proc functions */
78 #ifdef CONFIG_PROC_FS
79 extern int pci_proc_attach_device(struct pci_dev *dev);
80 extern int pci_proc_detach_device(struct pci_dev *dev);
81 extern int pci_proc_detach_bus(struct pci_bus *bus);
82 #else
83 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
84 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
85 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
86 #endif
87
88 /* Functions for PCI Hotplug drivers to use */
89 extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
90
91 #ifdef HAVE_PCI_LEGACY
92 extern void pci_create_legacy_files(struct pci_bus *bus);
93 extern void pci_remove_legacy_files(struct pci_bus *bus);
94 #else
95 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
96 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
97 #endif
98
99 /* Lock for read/write access to pci device and bus lists */
100 extern struct rw_semaphore pci_bus_sem;
101
102 extern unsigned int pci_pm_d3_delay;
103
104 #ifdef CONFIG_PCI_MSI
105 void pci_no_msi(void);
106 extern void pci_msi_init_pci_dev(struct pci_dev *dev);
107 #else
108 static inline void pci_no_msi(void) { }
109 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
110 #endif
111
112 #ifdef CONFIG_PCIEAER
113 void pci_no_aer(void);
114 #else
115 static inline void pci_no_aer(void) { }
116 #endif
117
118 static inline int pci_no_d1d2(struct pci_dev *dev)
119 {
120 unsigned int parent_dstates = 0;
121
122 if (dev->bus->self)
123 parent_dstates = dev->bus->self->no_d1d2;
124 return (dev->no_d1d2 || parent_dstates);
125
126 }
127 extern int pcie_mch_quirk;
128 extern struct device_attribute pci_dev_attrs[];
129 extern struct device_attribute dev_attr_cpuaffinity;
130 extern struct device_attribute dev_attr_cpulistaffinity;
131
132 /**
133 * pci_match_one_device - Tell if a PCI device structure has a matching
134 * PCI device id structure
135 * @id: single PCI device id structure to match
136 * @dev: the PCI device structure to match against
137 *
138 * Returns the matching pci_device_id structure or %NULL if there is no match.
139 */
140 static inline const struct pci_device_id *
141 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
142 {
143 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
144 (id->device == PCI_ANY_ID || id->device == dev->device) &&
145 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
146 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
147 !((id->class ^ dev->class) & id->class_mask))
148 return id;
149 return NULL;
150 }
151
152 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
153
154 /* PCI slot sysfs helper code */
155 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
156
157 extern struct kset *pci_slots_kset;
158
159 struct pci_slot_attribute {
160 struct attribute attr;
161 ssize_t (*show)(struct pci_slot *, char *);
162 ssize_t (*store)(struct pci_slot *, const char *, size_t);
163 };
164 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
165
166 enum pci_bar_type {
167 pci_bar_unknown, /* Standard PCI BAR probe */
168 pci_bar_io, /* An io port BAR */
169 pci_bar_mem32, /* A 32-bit memory BAR */
170 pci_bar_mem64, /* A 64-bit memory BAR */
171 };
172
173 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
174 struct resource *res, unsigned int reg);
175 extern int pci_resource_bar(struct pci_dev *dev, int resno,
176 enum pci_bar_type *type);
177 extern int pci_bus_add_child(struct pci_bus *bus);
178 extern void pci_enable_ari(struct pci_dev *dev);
179 /**
180 * pci_ari_enabled - query ARI forwarding status
181 * @bus: the PCI bus
182 *
183 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
184 */
185 static inline int pci_ari_enabled(struct pci_bus *bus)
186 {
187 return bus->self && bus->self->ari_enabled;
188 }
189
190 #endif /* DRIVERS_PCI_H */
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