2 * Alchemy Semi Au1000 pcmcia driver include file
4 * Copyright 2001 MontaVista Software Inc.
5 * Author: MontaVista Software, Inc.
6 * ppopov@mvista.com or source@mvista.com
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
21 #ifndef __ASM_AU1000_PCMCIA_H
22 #define __ASM_AU1000_PCMCIA_H
24 /* include the world */
26 #include <pcmcia/cs_types.h>
27 #include <pcmcia/cs.h>
28 #include <pcmcia/ss.h>
29 #include <pcmcia/cistpl.h>
30 #include "cs_internal.h"
32 #define AU1000_PCMCIA_POLL_PERIOD (2*HZ)
33 #define AU1000_PCMCIA_IO_SPEED (255)
34 #define AU1000_PCMCIA_MEM_SPEED (300)
36 #define AU1X_SOCK0_IO 0xF00000000ULL
37 #define AU1X_SOCK0_PHYS_ATTR 0xF40000000ULL
38 #define AU1X_SOCK0_PHYS_MEM 0xF80000000ULL
39 /* pseudo 32 bit phys addresses, which get fixed up to the
40 * real 36 bit address in fixup_bigphys_addr() */
41 #define AU1X_SOCK0_PSEUDO_PHYS_ATTR 0xF4000000
42 #define AU1X_SOCK0_PSEUDO_PHYS_MEM 0xF8000000
44 /* pcmcia socket 1 needs external glue logic so the memory map
45 * differs from board to board.
47 #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || \
48 defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) || \
49 defined(CONFIG_MIPS_PB1200)
50 #define AU1X_SOCK1_IO 0xF08000000ULL
51 #define AU1X_SOCK1_PHYS_ATTR 0xF48000000ULL
52 #define AU1X_SOCK1_PHYS_MEM 0xF88000000ULL
53 #define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000
54 #define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8800000
55 #elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \
56 defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) || \
57 defined(CONFIG_MIPS_DB1200)
58 #define AU1X_SOCK1_IO 0xF04000000ULL
59 #define AU1X_SOCK1_PHYS_ATTR 0xF44000000ULL
60 #define AU1X_SOCK1_PHYS_MEM 0xF84000000ULL
61 #define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4400000
62 #define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8400000
75 struct pcmcia_configure
{
91 struct au1000_pcmcia_socket
{
92 struct pcmcia_socket socket
;
95 * Info from low level handler
104 struct pcmcia_low_level
*ops
;
107 socket_state_t cs_state
;
109 unsigned short spd_io
[MAX_IO_WIN
];
110 unsigned short spd_mem
[MAX_WIN
];
111 unsigned short spd_attr
[MAX_WIN
];
113 struct resource res_skt
;
114 struct resource res_io
;
115 struct resource res_mem
;
116 struct resource res_attr
;
119 unsigned int phys_io
;
120 unsigned int phys_attr
;
121 unsigned int phys_mem
;
122 unsigned short speed_io
, speed_attr
, speed_mem
;
124 unsigned int irq_state
;
126 struct timer_list poll_timer
;
129 struct pcmcia_low_level
{
130 struct module
*owner
;
132 int (*hw_init
)(struct au1000_pcmcia_socket
*);
133 void (*hw_shutdown
)(struct au1000_pcmcia_socket
*);
135 void (*socket_state
)(struct au1000_pcmcia_socket
*, struct pcmcia_state
*);
136 int (*configure_socket
)(struct au1000_pcmcia_socket
*, struct socket_state_t
*);
139 * Enable card status IRQs on (re-)initialisation. This can
140 * be called at initialisation, power management event, or
143 void (*socket_init
)(struct au1000_pcmcia_socket
*);
146 * Disable card status IRQs and PCMCIA bus on suspend.
148 void (*socket_suspend
)(struct au1000_pcmcia_socket
*);
151 extern int au1x_board_init(struct device
*dev
);
153 #endif /* __ASM_AU1000_PCMCIA_H */
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