12 This framework is designed to provide a generic interface for PHY
13 devices present in the kernel. This layer will have the generic
14 API by which phy drivers can create PHY using the phy framework and
15 phy users can obtain reference to the PHY. All the users of this
16 framework should select this config.
18 config PHY_EXYNOS_MIPI_VIDEO
19 tristate "S5P/EXYNOS SoC series MIPI CSI-2/DSI PHY driver"
21 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
23 default y if ARCH_S5PV210 || ARCH_EXYNOS
25 Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P
30 depends on ARCH_KIRKWOOD || ARCH_DOVE || MACH_DOVE || MACH_KIRKWOOD
34 config OMAP_CONTROL_PHY
35 tristate "OMAP CONTROL PHY Driver"
36 depends on ARCH_OMAP2PLUS || COMPILE_TEST
38 Enable this to add support for the PHY part present in the control
39 module. This driver has API to power on the USB2 PHY and to write to
40 the mailbox. The mailbox is present only in omap4 and the register to
41 power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
42 additional register to power on USB3 PHY/SATA PHY/PCIE PHY
46 tristate "OMAP USB2 PHY Driver"
47 depends on ARCH_OMAP2PLUS
50 select OMAP_CONTROL_PHY
51 depends on OMAP_OCP2SCP
53 Enable this to support the transceiver that is part of SOC. This
54 driver takes care of all the PHY functionality apart from comparator.
55 The USB OTG controller communicates with the comparator using this
59 tristate "TI PIPE3 PHY Driver"
60 depends on ARCH_OMAP2PLUS || COMPILE_TEST
62 select OMAP_CONTROL_PHY
63 depends on OMAP_OCP2SCP
65 Enable this to support the PIPE3 PHY that is part of TI SOCs. This
66 driver takes care of all the PHY functionality apart from comparator.
67 This driver interacts with the "OMAP Control PHY Driver" to power
71 tristate "TWL4030 USB Transceiver Driver"
72 depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS
76 Enable this to support the USB OTG transceiver on TWL4030
77 family chips (including the TWL5030 and TPS659x0 devices).
78 This transceiver supports high and full speed devices plus,
79 in host mode, low speed.
81 config PHY_EXYNOS_DP_VIDEO
82 tristate "EXYNOS SoC series Display Port PHY driver"
84 depends on ARCH_EXYNOS || COMPILE_TEST
88 Support for Display Port PHY found on Samsung EXYNOS SoCs.
90 config BCM_KONA_USB2_PHY
91 tristate "Broadcom Kona USB2 PHY Driver"
95 Enable this to support the Broadcom Kona USB 2.0 PHY.
97 config PHY_EXYNOS5250_SATA
98 tristate "Exynos5250 Sata SerDes/PHY driver"
99 depends on SOC_EXYNOS5250
107 Enable this to support SATA SerDes/Phy found on Samsung's
108 Exynos5250 based SoCs.This SerDes/Phy supports SATA 1.5 Gb/s,
109 SATA 3.0 Gb/s, SATA 6.0 Gb/s speeds. It supports one SATA host
110 port to accept one SATA device.
112 config PHY_HIX5HD2_SATA
113 tristate "HIX5HD2 SATA PHY Driver"
114 depends on ARCH_HIX5HD2 && OF && HAS_IOMEM
118 Support for SATA PHY on Hisilicon hix5hd2 Soc.
121 tristate "Allwinner sunxi SoC USB PHY driver"
122 depends on ARCH_SUNXI && HAS_IOMEM && OF
123 depends on RESET_CONTROLLER
126 Enable this to support the transceiver that is part of Allwinner
129 This driver controls the entire USB PHY block, both the USB OTG
130 parts, as well as the 2 regular USB 2 host PHYs.
132 config PHY_SAMSUNG_USB2
133 tristate "Samsung USB 2.0 PHY driver"
135 depends on USB_EHCI_EXYNOS || USB_OHCI_EXYNOS || USB_DWC2
140 Enable this to support the Samsung USB 2.0 PHY driver for Samsung
141 SoCs. This driver provides the interface for USB 2.0 PHY. Support
142 for particular PHYs will be enabled based on the SoC type in addition
145 config PHY_EXYNOS4210_USB2
147 depends on PHY_SAMSUNG_USB2
148 default CPU_EXYNOS4210
150 config PHY_EXYNOS4X12_USB2
152 depends on PHY_SAMSUNG_USB2
153 default SOC_EXYNOS3250 || SOC_EXYNOS4212 || SOC_EXYNOS4412
155 config PHY_EXYNOS5250_USB2
157 depends on PHY_SAMSUNG_USB2
158 default SOC_EXYNOS5250 || SOC_EXYNOS5420
160 config PHY_EXYNOS5_USBDRD
161 tristate "Exynos5 SoC series USB DRD PHY driver"
162 depends on ARCH_EXYNOS5 && OF
167 Enable USB DRD PHY support for Exynos 5 SoC series.
168 This driver provides PHY interface for USB 3.0 DRD controller
169 present on Exynos5 SoC series.
172 tristate "APM X-Gene 15Gbps PHY support"
173 depends on HAS_IOMEM && OF && (ARM64 || COMPILE_TEST)
176 This option enables support for APM X-Gene SoC multi-purpose PHY.