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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[deliverable/linux.git] / drivers / phy / phy-twl4030-usb.c
1 /*
2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
3 *
4 * Copyright (C) 2004-2007 Texas Instruments
5 * Copyright (C) 2008 Nokia Corporation
6 * Contact: Felipe Balbi <felipe.balbi@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Current status:
23 * - HS USB ULPI mode works.
24 * - 3-pin mode support may be added in future.
25 */
26
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/interrupt.h>
30 #include <linux/platform_device.h>
31 #include <linux/spinlock.h>
32 #include <linux/workqueue.h>
33 #include <linux/io.h>
34 #include <linux/delay.h>
35 #include <linux/usb/otg.h>
36 #include <linux/phy/phy.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/usb/musb-omap.h>
39 #include <linux/usb/ulpi.h>
40 #include <linux/i2c/twl.h>
41 #include <linux/regulator/consumer.h>
42 #include <linux/err.h>
43 #include <linux/slab.h>
44
45 /* Register defines */
46
47 #define MCPC_CTRL 0x30
48 #define MCPC_CTRL_RTSOL (1 << 7)
49 #define MCPC_CTRL_EXTSWR (1 << 6)
50 #define MCPC_CTRL_EXTSWC (1 << 5)
51 #define MCPC_CTRL_VOICESW (1 << 4)
52 #define MCPC_CTRL_OUT64K (1 << 3)
53 #define MCPC_CTRL_RTSCTSSW (1 << 2)
54 #define MCPC_CTRL_HS_UART (1 << 0)
55
56 #define MCPC_IO_CTRL 0x33
57 #define MCPC_IO_CTRL_MICBIASEN (1 << 5)
58 #define MCPC_IO_CTRL_CTS_NPU (1 << 4)
59 #define MCPC_IO_CTRL_RXD_PU (1 << 3)
60 #define MCPC_IO_CTRL_TXDTYP (1 << 2)
61 #define MCPC_IO_CTRL_CTSTYP (1 << 1)
62 #define MCPC_IO_CTRL_RTSTYP (1 << 0)
63
64 #define MCPC_CTRL2 0x36
65 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
66
67 #define OTHER_FUNC_CTRL 0x80
68 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
69 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
70
71 #define OTHER_IFC_CTRL 0x83
72 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
73 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
74 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
75 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
76 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
77 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
78
79 #define OTHER_INT_EN_RISE 0x86
80 #define OTHER_INT_EN_FALL 0x89
81 #define OTHER_INT_STS 0x8C
82 #define OTHER_INT_LATCH 0x8D
83 #define OTHER_INT_VB_SESS_VLD (1 << 7)
84 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
85 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
86 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
87 #define OTHER_INT_MANU (1 << 1)
88 #define OTHER_INT_ABNORMAL_STRESS (1 << 0)
89
90 #define ID_STATUS 0x96
91 #define ID_RES_FLOAT (1 << 4)
92 #define ID_RES_440K (1 << 3)
93 #define ID_RES_200K (1 << 2)
94 #define ID_RES_102K (1 << 1)
95 #define ID_RES_GND (1 << 0)
96
97 #define POWER_CTRL 0xAC
98 #define POWER_CTRL_OTG_ENAB (1 << 5)
99
100 #define OTHER_IFC_CTRL2 0xAF
101 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
102 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
103 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
104 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
105 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
106 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
107
108 #define REG_CTRL_EN 0xB2
109 #define REG_CTRL_ERROR 0xB5
110 #define ULPI_I2C_CONFLICT_INTEN (1 << 0)
111
112 #define OTHER_FUNC_CTRL2 0xB8
113 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
114
115 /* following registers do not have separate _clr and _set registers */
116 #define VBUS_DEBOUNCE 0xC0
117 #define ID_DEBOUNCE 0xC1
118 #define VBAT_TIMER 0xD3
119 #define PHY_PWR_CTRL 0xFD
120 #define PHY_PWR_PHYPWD (1 << 0)
121 #define PHY_CLK_CTRL 0xFE
122 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
123 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
124 #define REQ_PHY_DPLL_CLK (1 << 0)
125 #define PHY_CLK_CTRL_STS 0xFF
126 #define PHY_DPLL_CLK (1 << 0)
127
128 /* In module TWL_MODULE_PM_MASTER */
129 #define STS_HW_CONDITIONS 0x0F
130
131 /* In module TWL_MODULE_PM_RECEIVER */
132 #define VUSB_DEDICATED1 0x7D
133 #define VUSB_DEDICATED2 0x7E
134 #define VUSB1V5_DEV_GRP 0x71
135 #define VUSB1V5_TYPE 0x72
136 #define VUSB1V5_REMAP 0x73
137 #define VUSB1V8_DEV_GRP 0x74
138 #define VUSB1V8_TYPE 0x75
139 #define VUSB1V8_REMAP 0x76
140 #define VUSB3V1_DEV_GRP 0x77
141 #define VUSB3V1_TYPE 0x78
142 #define VUSB3V1_REMAP 0x79
143
144 /* In module TWL4030_MODULE_INTBR */
145 #define PMBR1 0x0D
146 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
147
148 struct twl4030_usb {
149 struct usb_phy phy;
150 struct device *dev;
151
152 /* TWL4030 internal USB regulator supplies */
153 struct regulator *usb1v5;
154 struct regulator *usb1v8;
155 struct regulator *usb3v1;
156
157 /* for vbus reporting with irqs disabled */
158 spinlock_t lock;
159
160 /* pin configuration */
161 enum twl4030_usb_mode usb_mode;
162
163 int irq;
164 enum omap_musb_vbus_id_status linkstat;
165 bool vbus_supplied;
166 u8 asleep;
167 bool irq_enabled;
168
169 struct delayed_work id_workaround_work;
170 };
171
172 /* internal define on top of container_of */
173 #define phy_to_twl(x) container_of((x), struct twl4030_usb, phy)
174
175 /*-------------------------------------------------------------------------*/
176
177 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
178 u8 module, u8 data, u8 address)
179 {
180 u8 check;
181
182 if ((twl_i2c_write_u8(module, data, address) >= 0) &&
183 (twl_i2c_read_u8(module, &check, address) >= 0) &&
184 (check == data))
185 return 0;
186 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
187 1, module, address, check, data);
188
189 /* Failed once: Try again */
190 if ((twl_i2c_write_u8(module, data, address) >= 0) &&
191 (twl_i2c_read_u8(module, &check, address) >= 0) &&
192 (check == data))
193 return 0;
194 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
195 2, module, address, check, data);
196
197 /* Failed again: Return error */
198 return -EBUSY;
199 }
200
201 #define twl4030_usb_write_verify(twl, address, data) \
202 twl4030_i2c_write_u8_verify(twl, TWL_MODULE_USB, (data), (address))
203
204 static inline int twl4030_usb_write(struct twl4030_usb *twl,
205 u8 address, u8 data)
206 {
207 int ret = 0;
208
209 ret = twl_i2c_write_u8(TWL_MODULE_USB, data, address);
210 if (ret < 0)
211 dev_dbg(twl->dev,
212 "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
213 return ret;
214 }
215
216 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
217 {
218 u8 data;
219 int ret = 0;
220
221 ret = twl_i2c_read_u8(module, &data, address);
222 if (ret >= 0)
223 ret = data;
224 else
225 dev_dbg(twl->dev,
226 "TWL4030:readb[0x%x,0x%x] Error %d\n",
227 module, address, ret);
228
229 return ret;
230 }
231
232 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
233 {
234 return twl4030_readb(twl, TWL_MODULE_USB, address);
235 }
236
237 /*-------------------------------------------------------------------------*/
238
239 static inline int
240 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
241 {
242 return twl4030_usb_write(twl, ULPI_SET(reg), bits);
243 }
244
245 static inline int
246 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
247 {
248 return twl4030_usb_write(twl, ULPI_CLR(reg), bits);
249 }
250
251 /*-------------------------------------------------------------------------*/
252
253 static bool twl4030_is_driving_vbus(struct twl4030_usb *twl)
254 {
255 int ret;
256
257 ret = twl4030_usb_read(twl, PHY_CLK_CTRL_STS);
258 if (ret < 0 || !(ret & PHY_DPLL_CLK))
259 /*
260 * if clocks are off, registers are not updated,
261 * but we can assume we don't drive VBUS in this case
262 */
263 return false;
264
265 ret = twl4030_usb_read(twl, ULPI_OTG_CTRL);
266 if (ret < 0)
267 return false;
268
269 return (ret & (ULPI_OTG_DRVVBUS | ULPI_OTG_CHRGVBUS)) ? true : false;
270 }
271
272 static enum omap_musb_vbus_id_status
273 twl4030_usb_linkstat(struct twl4030_usb *twl)
274 {
275 int status;
276 enum omap_musb_vbus_id_status linkstat = OMAP_MUSB_UNKNOWN;
277
278 twl->vbus_supplied = false;
279
280 /*
281 * For ID/VBUS sensing, see manual section 15.4.8 ...
282 * except when using only battery backup power, two
283 * comparators produce VBUS_PRES and ID_PRES signals,
284 * which don't match docs elsewhere. But ... BIT(7)
285 * and BIT(2) of STS_HW_CONDITIONS, respectively, do
286 * seem to match up. If either is true the USB_PRES
287 * signal is active, the OTG module is activated, and
288 * its interrupt may be raised (may wake the system).
289 */
290 status = twl4030_readb(twl, TWL_MODULE_PM_MASTER, STS_HW_CONDITIONS);
291 if (status < 0)
292 dev_err(twl->dev, "USB link status err %d\n", status);
293 else if (status & (BIT(7) | BIT(2))) {
294 if (status & BIT(7)) {
295 if (twl4030_is_driving_vbus(twl))
296 status &= ~BIT(7);
297 else
298 twl->vbus_supplied = true;
299 }
300
301 if (status & BIT(2))
302 linkstat = OMAP_MUSB_ID_GROUND;
303 else if (status & BIT(7))
304 linkstat = OMAP_MUSB_VBUS_VALID;
305 else
306 linkstat = OMAP_MUSB_VBUS_OFF;
307 } else {
308 if (twl->linkstat != OMAP_MUSB_UNKNOWN)
309 linkstat = OMAP_MUSB_VBUS_OFF;
310 }
311
312 dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
313 status, status, linkstat);
314
315 /* REVISIT this assumes host and peripheral controllers
316 * are registered, and that both are active...
317 */
318
319 return linkstat;
320 }
321
322 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
323 {
324 twl->usb_mode = mode;
325
326 switch (mode) {
327 case T2_USB_MODE_ULPI:
328 twl4030_usb_clear_bits(twl, ULPI_IFC_CTRL,
329 ULPI_IFC_CTRL_CARKITMODE);
330 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
331 twl4030_usb_clear_bits(twl, ULPI_FUNC_CTRL,
332 ULPI_FUNC_CTRL_XCVRSEL_MASK |
333 ULPI_FUNC_CTRL_OPMODE_MASK);
334 break;
335 case -1:
336 /* FIXME: power on defaults */
337 break;
338 default:
339 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
340 mode);
341 break;
342 }
343 }
344
345 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
346 {
347 unsigned long timeout;
348 int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
349
350 if (val >= 0) {
351 if (on) {
352 /* enable DPLL to access PHY registers over I2C */
353 val |= REQ_PHY_DPLL_CLK;
354 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
355 (u8)val) < 0);
356
357 timeout = jiffies + HZ;
358 while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
359 PHY_DPLL_CLK)
360 && time_before(jiffies, timeout))
361 udelay(10);
362 if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
363 PHY_DPLL_CLK))
364 dev_err(twl->dev, "Timeout setting T2 HSUSB "
365 "PHY DPLL clock\n");
366 } else {
367 /* let ULPI control the DPLL clock */
368 val &= ~REQ_PHY_DPLL_CLK;
369 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
370 (u8)val) < 0);
371 }
372 }
373 }
374
375 static void __twl4030_phy_power(struct twl4030_usb *twl, int on)
376 {
377 u8 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
378
379 if (on)
380 pwr &= ~PHY_PWR_PHYPWD;
381 else
382 pwr |= PHY_PWR_PHYPWD;
383
384 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
385 }
386
387 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
388 {
389 int ret;
390
391 if (on) {
392 ret = regulator_enable(twl->usb3v1);
393 if (ret)
394 dev_err(twl->dev, "Failed to enable usb3v1\n");
395
396 ret = regulator_enable(twl->usb1v8);
397 if (ret)
398 dev_err(twl->dev, "Failed to enable usb1v8\n");
399
400 /*
401 * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
402 * in twl4030) resets the VUSB_DEDICATED2 register. This reset
403 * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
404 * SLEEP. We work around this by clearing the bit after usv3v1
405 * is re-activated. This ensures that VUSB3V1 is really active.
406 */
407 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
408
409 ret = regulator_enable(twl->usb1v5);
410 if (ret)
411 dev_err(twl->dev, "Failed to enable usb1v5\n");
412
413 __twl4030_phy_power(twl, 1);
414 twl4030_usb_write(twl, PHY_CLK_CTRL,
415 twl4030_usb_read(twl, PHY_CLK_CTRL) |
416 (PHY_CLK_CTRL_CLOCKGATING_EN |
417 PHY_CLK_CTRL_CLK32K_EN));
418 } else {
419 __twl4030_phy_power(twl, 0);
420 regulator_disable(twl->usb1v5);
421 regulator_disable(twl->usb1v8);
422 regulator_disable(twl->usb3v1);
423 }
424 }
425
426 static int twl4030_usb_runtime_suspend(struct device *dev)
427 {
428 struct twl4030_usb *twl = dev_get_drvdata(dev);
429
430 dev_dbg(twl->dev, "%s\n", __func__);
431 if (twl->asleep)
432 return 0;
433
434 twl4030_phy_power(twl, 0);
435 twl->asleep = 1;
436
437 return 0;
438 }
439
440 static int twl4030_usb_runtime_resume(struct device *dev)
441 {
442 struct twl4030_usb *twl = dev_get_drvdata(dev);
443
444 dev_dbg(twl->dev, "%s\n", __func__);
445 if (!twl->asleep)
446 return 0;
447
448 twl4030_phy_power(twl, 1);
449 twl->asleep = 0;
450
451 return 0;
452 }
453
454 static int twl4030_phy_power_off(struct phy *phy)
455 {
456 struct twl4030_usb *twl = phy_get_drvdata(phy);
457
458 dev_dbg(twl->dev, "%s\n", __func__);
459 pm_runtime_mark_last_busy(twl->dev);
460 pm_runtime_put_autosuspend(twl->dev);
461
462 return 0;
463 }
464
465 static int twl4030_phy_power_on(struct phy *phy)
466 {
467 struct twl4030_usb *twl = phy_get_drvdata(phy);
468
469 dev_dbg(twl->dev, "%s\n", __func__);
470 pm_runtime_get_sync(twl->dev);
471 twl4030_i2c_access(twl, 1);
472 twl4030_usb_set_mode(twl, twl->usb_mode);
473 if (twl->usb_mode == T2_USB_MODE_ULPI)
474 twl4030_i2c_access(twl, 0);
475
476 /*
477 * XXX When VBUS gets driven after musb goes to A mode,
478 * ID_PRES related interrupts no longer arrive, why?
479 * Register itself is updated fine though, so we must poll.
480 */
481 if (twl->linkstat == OMAP_MUSB_ID_GROUND) {
482 cancel_delayed_work(&twl->id_workaround_work);
483 schedule_delayed_work(&twl->id_workaround_work, HZ);
484 }
485 return 0;
486 }
487
488 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
489 {
490 /* Enable writing to power configuration registers */
491 twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
492 TWL4030_PM_MASTER_PROTECT_KEY);
493
494 twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
495 TWL4030_PM_MASTER_PROTECT_KEY);
496
497 /* Keep VUSB3V1 LDO in sleep state until VBUS/ID change detected*/
498 /*twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);*/
499
500 /* input to VUSB3V1 LDO is from VBAT, not VBUS */
501 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
502
503 /* Initialize 3.1V regulator */
504 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
505
506 twl->usb3v1 = devm_regulator_get(twl->dev, "usb3v1");
507 if (IS_ERR(twl->usb3v1))
508 return -ENODEV;
509
510 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
511
512 /* Initialize 1.5V regulator */
513 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
514
515 twl->usb1v5 = devm_regulator_get(twl->dev, "usb1v5");
516 if (IS_ERR(twl->usb1v5))
517 return -ENODEV;
518
519 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
520
521 /* Initialize 1.8V regulator */
522 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
523
524 twl->usb1v8 = devm_regulator_get(twl->dev, "usb1v8");
525 if (IS_ERR(twl->usb1v8))
526 return -ENODEV;
527
528 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
529
530 /* disable access to power configuration registers */
531 twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
532 TWL4030_PM_MASTER_PROTECT_KEY);
533
534 return 0;
535 }
536
537 static ssize_t twl4030_usb_vbus_show(struct device *dev,
538 struct device_attribute *attr, char *buf)
539 {
540 struct twl4030_usb *twl = dev_get_drvdata(dev);
541 unsigned long flags;
542 int ret = -EINVAL;
543
544 spin_lock_irqsave(&twl->lock, flags);
545 ret = sprintf(buf, "%s\n",
546 twl->vbus_supplied ? "on" : "off");
547 spin_unlock_irqrestore(&twl->lock, flags);
548
549 return ret;
550 }
551 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
552
553 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
554 {
555 struct twl4030_usb *twl = _twl;
556 enum omap_musb_vbus_id_status status;
557 bool status_changed = false;
558
559 status = twl4030_usb_linkstat(twl);
560
561 spin_lock_irq(&twl->lock);
562 if (status >= 0 && status != twl->linkstat) {
563 twl->linkstat = status;
564 status_changed = true;
565 }
566 spin_unlock_irq(&twl->lock);
567
568 if (status_changed) {
569 /* FIXME add a set_power() method so that B-devices can
570 * configure the charger appropriately. It's not always
571 * correct to consume VBUS power, and how much current to
572 * consume is a function of the USB configuration chosen
573 * by the host.
574 *
575 * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
576 * its disconnect() sibling, when changing to/from the
577 * USB_LINK_VBUS state. musb_hdrc won't care until it
578 * starts to handle softconnect right.
579 */
580 if ((status == OMAP_MUSB_VBUS_VALID) ||
581 (status == OMAP_MUSB_ID_GROUND)) {
582 if (twl->asleep)
583 pm_runtime_get_sync(twl->dev);
584 } else {
585 if (!twl->asleep) {
586 pm_runtime_mark_last_busy(twl->dev);
587 pm_runtime_put_autosuspend(twl->dev);
588 }
589 }
590 omap_musb_mailbox(status);
591 }
592
593 /* don't schedule during sleep - irq works right then */
594 if (status == OMAP_MUSB_ID_GROUND && !twl->asleep) {
595 cancel_delayed_work(&twl->id_workaround_work);
596 schedule_delayed_work(&twl->id_workaround_work, HZ);
597 }
598
599 if (irq)
600 sysfs_notify(&twl->dev->kobj, NULL, "vbus");
601
602 return IRQ_HANDLED;
603 }
604
605 static void twl4030_id_workaround_work(struct work_struct *work)
606 {
607 struct twl4030_usb *twl = container_of(work, struct twl4030_usb,
608 id_workaround_work.work);
609
610 twl4030_usb_irq(0, twl);
611 }
612
613 static int twl4030_phy_init(struct phy *phy)
614 {
615 struct twl4030_usb *twl = phy_get_drvdata(phy);
616 enum omap_musb_vbus_id_status status;
617
618 pm_runtime_get_sync(twl->dev);
619 status = twl4030_usb_linkstat(twl);
620 twl->linkstat = status;
621
622 if (status == OMAP_MUSB_ID_GROUND || status == OMAP_MUSB_VBUS_VALID)
623 omap_musb_mailbox(twl->linkstat);
624
625 sysfs_notify(&twl->dev->kobj, NULL, "vbus");
626 pm_runtime_mark_last_busy(twl->dev);
627 pm_runtime_put_autosuspend(twl->dev);
628
629 return 0;
630 }
631
632 static int twl4030_set_peripheral(struct usb_otg *otg,
633 struct usb_gadget *gadget)
634 {
635 if (!otg)
636 return -ENODEV;
637
638 otg->gadget = gadget;
639 if (!gadget)
640 otg->phy->state = OTG_STATE_UNDEFINED;
641
642 return 0;
643 }
644
645 static int twl4030_set_host(struct usb_otg *otg, struct usb_bus *host)
646 {
647 if (!otg)
648 return -ENODEV;
649
650 otg->host = host;
651 if (!host)
652 otg->phy->state = OTG_STATE_UNDEFINED;
653
654 return 0;
655 }
656
657 static const struct phy_ops ops = {
658 .init = twl4030_phy_init,
659 .power_on = twl4030_phy_power_on,
660 .power_off = twl4030_phy_power_off,
661 .owner = THIS_MODULE,
662 };
663
664 static const struct dev_pm_ops twl4030_usb_pm_ops = {
665 SET_RUNTIME_PM_OPS(twl4030_usb_runtime_suspend,
666 twl4030_usb_runtime_resume, NULL)
667 };
668
669 static int twl4030_usb_probe(struct platform_device *pdev)
670 {
671 struct twl4030_usb_data *pdata = dev_get_platdata(&pdev->dev);
672 struct twl4030_usb *twl;
673 struct phy *phy;
674 int status, err;
675 struct usb_otg *otg;
676 struct device_node *np = pdev->dev.of_node;
677 struct phy_provider *phy_provider;
678 struct phy_init_data *init_data = NULL;
679
680 twl = devm_kzalloc(&pdev->dev, sizeof(*twl), GFP_KERNEL);
681 if (!twl)
682 return -ENOMEM;
683
684 if (np)
685 of_property_read_u32(np, "usb_mode",
686 (enum twl4030_usb_mode *)&twl->usb_mode);
687 else if (pdata) {
688 twl->usb_mode = pdata->usb_mode;
689 init_data = pdata->init_data;
690 } else {
691 dev_err(&pdev->dev, "twl4030 initialized without pdata\n");
692 return -EINVAL;
693 }
694
695 otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
696 if (!otg)
697 return -ENOMEM;
698
699 twl->dev = &pdev->dev;
700 twl->irq = platform_get_irq(pdev, 0);
701 twl->vbus_supplied = false;
702 twl->asleep = 1;
703 twl->linkstat = OMAP_MUSB_UNKNOWN;
704
705 twl->phy.dev = twl->dev;
706 twl->phy.label = "twl4030";
707 twl->phy.otg = otg;
708 twl->phy.type = USB_PHY_TYPE_USB2;
709
710 otg->phy = &twl->phy;
711 otg->set_host = twl4030_set_host;
712 otg->set_peripheral = twl4030_set_peripheral;
713
714 phy = devm_phy_create(twl->dev, NULL, &ops, init_data);
715 if (IS_ERR(phy)) {
716 dev_dbg(&pdev->dev, "Failed to create PHY\n");
717 return PTR_ERR(phy);
718 }
719
720 phy_set_drvdata(phy, twl);
721
722 phy_provider = devm_of_phy_provider_register(twl->dev,
723 of_phy_simple_xlate);
724 if (IS_ERR(phy_provider))
725 return PTR_ERR(phy_provider);
726
727 /* init spinlock for workqueue */
728 spin_lock_init(&twl->lock);
729
730 INIT_DELAYED_WORK(&twl->id_workaround_work, twl4030_id_workaround_work);
731
732 err = twl4030_usb_ldo_init(twl);
733 if (err) {
734 dev_err(&pdev->dev, "ldo init failed\n");
735 return err;
736 }
737 usb_add_phy_dev(&twl->phy);
738
739 platform_set_drvdata(pdev, twl);
740 if (device_create_file(&pdev->dev, &dev_attr_vbus))
741 dev_warn(&pdev->dev, "could not create sysfs file\n");
742
743 ATOMIC_INIT_NOTIFIER_HEAD(&twl->phy.notifier);
744
745 pm_runtime_use_autosuspend(&pdev->dev);
746 pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
747 pm_runtime_enable(&pdev->dev);
748 pm_runtime_get_sync(&pdev->dev);
749
750 /* Our job is to use irqs and status from the power module
751 * to keep the transceiver disabled when nothing's connected.
752 *
753 * FIXME we actually shouldn't start enabling it until the
754 * USB controller drivers have said they're ready, by calling
755 * set_host() and/or set_peripheral() ... OTG_capable boards
756 * need both handles, otherwise just one suffices.
757 */
758 twl->irq_enabled = true;
759 status = devm_request_threaded_irq(twl->dev, twl->irq, NULL,
760 twl4030_usb_irq, IRQF_TRIGGER_FALLING |
761 IRQF_TRIGGER_RISING | IRQF_ONESHOT, "twl4030_usb", twl);
762 if (status < 0) {
763 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
764 twl->irq, status);
765 return status;
766 }
767
768 pm_runtime_mark_last_busy(&pdev->dev);
769 pm_runtime_put_autosuspend(twl->dev);
770
771 dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
772 return 0;
773 }
774
775 static int twl4030_usb_remove(struct platform_device *pdev)
776 {
777 struct twl4030_usb *twl = platform_get_drvdata(pdev);
778 int val;
779
780 pm_runtime_get_sync(twl->dev);
781 cancel_delayed_work(&twl->id_workaround_work);
782 device_remove_file(twl->dev, &dev_attr_vbus);
783
784 /* set transceiver mode to power on defaults */
785 twl4030_usb_set_mode(twl, -1);
786
787 /* autogate 60MHz ULPI clock,
788 * clear dpll clock request for i2c access,
789 * disable 32KHz
790 */
791 val = twl4030_usb_read(twl, PHY_CLK_CTRL);
792 if (val >= 0) {
793 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
794 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
795 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
796 }
797
798 /* disable complete OTG block */
799 twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
800 pm_runtime_mark_last_busy(twl->dev);
801 pm_runtime_put(twl->dev);
802
803 return 0;
804 }
805
806 #ifdef CONFIG_OF
807 static const struct of_device_id twl4030_usb_id_table[] = {
808 { .compatible = "ti,twl4030-usb" },
809 {}
810 };
811 MODULE_DEVICE_TABLE(of, twl4030_usb_id_table);
812 #endif
813
814 static struct platform_driver twl4030_usb_driver = {
815 .probe = twl4030_usb_probe,
816 .remove = twl4030_usb_remove,
817 .driver = {
818 .name = "twl4030_usb",
819 .pm = &twl4030_usb_pm_ops,
820 .owner = THIS_MODULE,
821 .of_match_table = of_match_ptr(twl4030_usb_id_table),
822 },
823 };
824
825 static int __init twl4030_usb_init(void)
826 {
827 return platform_driver_register(&twl4030_usb_driver);
828 }
829 subsys_initcall(twl4030_usb_init);
830
831 static void __exit twl4030_usb_exit(void)
832 {
833 platform_driver_unregister(&twl4030_usb_driver);
834 }
835 module_exit(twl4030_usb_exit);
836
837 MODULE_ALIAS("platform:twl4030_usb");
838 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
839 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
840 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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